| Matt Arsenault | aac47c1 | 2017-08-07 17:08:44 +0000 | [diff] [blame] | 1 | ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -inline < %s | FileCheck %s |
| 2 | ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s |
| 3 | |
| 4 | ; CHECK-LABEL: @func_no_target_cpu( |
| 5 | define i32 @func_no_target_cpu() #0 { |
| 6 | ret i32 0 |
| 7 | } |
| 8 | |
| 9 | ; CHECK-LABEL: @target_cpu_call_no_target_cpu( |
| 10 | ; CHECK-NEXT: ret i32 0 |
| 11 | define i32 @target_cpu_call_no_target_cpu() #1 { |
| 12 | %call = call i32 @func_no_target_cpu() |
| 13 | ret i32 %call |
| 14 | } |
| 15 | |
| 16 | ; CHECK-LABEL: @target_cpu_target_features_call_no_target_cpu( |
| 17 | ; CHECK-NEXT: ret i32 0 |
| 18 | define i32 @target_cpu_target_features_call_no_target_cpu() #2 { |
| 19 | %call = call i32 @func_no_target_cpu() |
| 20 | ret i32 %call |
| 21 | } |
| 22 | |
| 23 | ; CHECK-LABEL: @fp32_denormals( |
| 24 | define i32 @fp32_denormals() #3 { |
| 25 | ret i32 0 |
| 26 | } |
| 27 | |
| 28 | ; CHECK-LABEL: @no_fp32_denormals_call_f32_denormals( |
| 29 | ; CHECK-NEXT: call i32 @fp32_denormals() |
| 30 | define i32 @no_fp32_denormals_call_f32_denormals() #4 { |
| 31 | %call = call i32 @fp32_denormals() |
| 32 | ret i32 %call |
| 33 | } |
| 34 | |
| 35 | ; Make sure gfx9 can call unspecified functions because of movrel |
| 36 | ; feature change. |
| 37 | ; CHECK-LABEL: @gfx9_target_features_call_no_target_cpu( |
| 38 | ; CHECK-NEXT: ret i32 0 |
| 39 | define i32 @gfx9_target_features_call_no_target_cpu() #5 { |
| 40 | %call = call i32 @func_no_target_cpu() |
| 41 | ret i32 %call |
| 42 | } |
| 43 | |
| 44 | define i32 @func_no_halfrate64ops() #6 { |
| 45 | ret i32 0 |
| 46 | } |
| 47 | |
| 48 | define i32 @func_with_halfrate64ops() #7 { |
| 49 | ret i32 0 |
| 50 | } |
| 51 | |
| 52 | ; CHECK-LABEL: @call_func_without_halfrate64ops( |
| 53 | ; CHECK-NEXT: ret i32 0 |
| 54 | define i32 @call_func_without_halfrate64ops() #7 { |
| 55 | %call = call i32 @func_no_halfrate64ops() |
| 56 | ret i32 %call |
| 57 | } |
| 58 | |
| 59 | ; CHECK-LABEL: @call_func_with_halfrate64ops( |
| 60 | ; CHECK-NEXT: ret i32 0 |
| 61 | define i32 @call_func_with_halfrate64ops() #6 { |
| 62 | %call = call i32 @func_with_halfrate64ops() |
| 63 | ret i32 %call |
| 64 | } |
| 65 | |
| 66 | define i32 @func_no_loadstoreopt() #8 { |
| 67 | ret i32 0 |
| 68 | } |
| 69 | |
| 70 | define i32 @func_with_loadstoreopt() #9 { |
| 71 | ret i32 0 |
| 72 | } |
| 73 | |
| 74 | ; CHECK-LABEL: @call_func_without_loadstoreopt( |
| 75 | ; CHECK-NEXT: ret i32 0 |
| 76 | define i32 @call_func_without_loadstoreopt() #9 { |
| 77 | %call = call i32 @func_no_loadstoreopt() |
| 78 | ret i32 %call |
| 79 | } |
| 80 | |
| 81 | attributes #0 = { nounwind } |
| 82 | attributes #1 = { nounwind "target-cpu"="fiji" } |
| 83 | attributes #2 = { nounwind "target-cpu"="fiji" "target-features"="+fp32-denormals" } |
| 84 | attributes #3 = { nounwind "target-features"="+fp32-denormals" } |
| 85 | attributes #4 = { nounwind "target-features"="-fp32-denormals" } |
| 86 | attributes #5 = { nounwind "target-cpu"="gfx900" } |
| 87 | attributes #6 = { nounwind "target-features"="-half-rate-64-ops" } |
| 88 | attributes #7 = { nounwind "target-features"="+half-rate-64-ops" } |
| 89 | attributes #8 = { nounwind "target-features"="-load-store-opt" } |
| 90 | attributes #9 = { nounwind "target-features"="+load-store-opt" } |