blob: 1f106bd894a85e929d60b60e14d8f013718858d7 [file] [log] [blame]
Stanislav Mekhanoshinee2dd782017-03-17 17:13:41 +00001; RUN: opt -mtriple=amdgcn-- -O3 -S %s | FileCheck %s
2
3; Check that loop unswitch happened and condition hoisted out of the loop.
4; Condition is uniform so all targets should perform unswitching.
5
Matt Arsenault3dbeefa2017-03-21 21:39:51 +00006; CHECK-LABEL: {{^}}define amdgpu_kernel void @uniform_unswitch
Stanislav Mekhanoshinee2dd782017-03-17 17:13:41 +00007; CHECK: entry:
8; CHECK-NEXT: [[LOOP_COND:%[a-z0-9]+]] = icmp
9; CHECK-NEXT: [[IF_COND:%[a-z0-9]+]] = icmp eq i32 %x, 123456
10; CHECK-NEXT: and i1 [[LOOP_COND]], [[IF_COND]]
11; CHECK-NEXT: br i1
12
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000013define amdgpu_kernel void @uniform_unswitch(i32 * nocapture %out, i32 %n, i32 %x) {
Stanislav Mekhanoshinee2dd782017-03-17 17:13:41 +000014entry:
15 %cmp6 = icmp sgt i32 %n, 0
16 br i1 %cmp6, label %for.body.lr.ph, label %for.cond.cleanup
17
18for.body.lr.ph: ; preds = %entry
19 %cmp1 = icmp eq i32 %x, 123456
20 br label %for.body
21
22for.cond.cleanup.loopexit: ; preds = %for.inc
23 br label %for.cond.cleanup
24
25for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
26 ret void
27
28for.body: ; preds = %for.inc, %for.body.lr.ph
29 %i.07 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
30 br i1 %cmp1, label %if.then, label %for.inc
31
32if.then: ; preds = %for.body
33 %arrayidx = getelementptr inbounds i32, i32 * %out, i32 %i.07
34 store i32 %i.07, i32 * %arrayidx, align 4
35 br label %for.inc
36
37for.inc: ; preds = %for.body, %if.then
38 %inc = add nuw nsw i32 %i.07, 1
39 %exitcond = icmp eq i32 %inc, %n
40 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
41}
42
43; Check that loop unswitch does not happen if condition is divergent.
44
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000045; CHECK-LABEL: {{^}}define amdgpu_kernel void @divergent_unswitch
Stanislav Mekhanoshinee2dd782017-03-17 17:13:41 +000046; CHECK: entry:
47; CHECK: icmp
48; CHECK: [[IF_COND:%[a-z0-9]+]] = icmp {{.*}} 567890
49; CHECK: br label
50; CHECK: br i1 [[IF_COND]]
51
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000052define amdgpu_kernel void @divergent_unswitch(i32 * nocapture %out, i32 %n) {
Stanislav Mekhanoshinee2dd782017-03-17 17:13:41 +000053entry:
54 %cmp9 = icmp sgt i32 %n, 0
55 br i1 %cmp9, label %for.body.lr.ph, label %for.cond.cleanup
56
57for.body.lr.ph: ; preds = %entry
58 %call = tail call i32 @llvm.amdgcn.workitem.id.x() #0
59 %cmp2 = icmp eq i32 %call, 567890
60 br label %for.body
61
62for.cond.cleanup.loopexit: ; preds = %for.inc
63 br label %for.cond.cleanup
64
65for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
66 ret void
67
68for.body: ; preds = %for.inc, %for.body.lr.ph
69 %i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
70 br i1 %cmp2, label %if.then, label %for.inc
71
72if.then: ; preds = %for.body
73 %arrayidx = getelementptr inbounds i32, i32 * %out, i32 %i.010
74 store i32 %i.010, i32 * %arrayidx, align 4
75 br label %for.inc
76
77for.inc: ; preds = %for.body, %if.then
78 %inc = add nuw nsw i32 %i.010, 1
79 %exitcond = icmp eq i32 %inc, %n
80 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
81}
82
83declare i32 @llvm.amdgcn.workitem.id.x() #0
84
85attributes #0 = { nounwind readnone }