Peter Collingbourne | b15a35e | 2017-09-11 22:34:42 +0000 | [diff] [blame] | 1 | ; RUN: opt -mtriple=x86_64-unknown-linux-gnu -wholeprogramdevirt -wholeprogramdevirt-summary-action=export -wholeprogramdevirt-read-summary=%S/Inputs/export.yaml -wholeprogramdevirt-write-summary=%t -S -o - %s | FileCheck --check-prefixes=CHECK,X86 %s |
| 2 | ; RUN: FileCheck --check-prefixes=SUMMARY,SUMMARY-X86 %s < %t |
| 3 | |
| 4 | ; RUN: opt -mtriple=armv7-unknown-linux-gnu -wholeprogramdevirt -wholeprogramdevirt-summary-action=export -wholeprogramdevirt-read-summary=%S/Inputs/export.yaml -wholeprogramdevirt-write-summary=%t -S -o - %s | FileCheck --check-prefixes=CHECK,ARM %s |
| 5 | ; RUN: FileCheck --check-prefixes=SUMMARY,SUMMARY-ARM %s < %t |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 6 | |
| 7 | target datalayout = "e-p:64:64" |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 8 | |
| 9 | ; SUMMARY: TypeIdMap: |
| 10 | ; SUMMARY-NEXT: typeid3: |
| 11 | ; SUMMARY-NEXT: TTRes: |
| 12 | ; SUMMARY-NEXT: Kind: Unsat |
| 13 | ; SUMMARY-NEXT: SizeM1BitWidth: 0 |
Peter Collingbourne | b9b6025 | 2017-09-11 22:49:10 +0000 | [diff] [blame] | 14 | ; SUMMARY-NEXT: AlignLog2: 0 |
| 15 | ; SUMMARY-NEXT: SizeM1: 0 |
| 16 | ; SUMMARY-NEXT: BitMask: 0 |
| 17 | ; SUMMARY-NEXT: InlineBits: 0 |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 18 | ; SUMMARY-NEXT: WPDRes: |
| 19 | ; SUMMARY-NEXT: 0: |
| 20 | ; SUMMARY-NEXT: Kind: Indir |
| 21 | ; SUMMARY-NEXT: SingleImplName: '' |
| 22 | ; SUMMARY-NEXT: ResByArg: |
| 23 | ; SUMMARY-NEXT: 12,24: |
| 24 | ; SUMMARY-NEXT: Kind: VirtualConstProp |
| 25 | ; SUMMARY-NEXT: Info: 0 |
Peter Collingbourne | b15a35e | 2017-09-11 22:34:42 +0000 | [diff] [blame] | 26 | ; SUMMARY-X86-NEXT: Byte: 0 |
| 27 | ; SUMMARY-X86-NEXT: Bit: 0 |
| 28 | ; SUMMARY-ARM-NEXT: Byte: 4294967295 |
| 29 | ; SUMMARY-ARM-NEXT: Bit: 1 |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 30 | ; SUMMARY-NEXT: typeid4: |
| 31 | ; SUMMARY-NEXT: TTRes: |
| 32 | ; SUMMARY-NEXT: Kind: Unsat |
| 33 | ; SUMMARY-NEXT: SizeM1BitWidth: 0 |
Peter Collingbourne | b9b6025 | 2017-09-11 22:49:10 +0000 | [diff] [blame] | 34 | ; SUMMARY-NEXT: AlignLog2: 0 |
| 35 | ; SUMMARY-NEXT: SizeM1: 0 |
| 36 | ; SUMMARY-NEXT: BitMask: 0 |
| 37 | ; SUMMARY-NEXT: InlineBits: 0 |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 38 | ; SUMMARY-NEXT: WPDRes: |
| 39 | ; SUMMARY-NEXT: 0: |
| 40 | ; SUMMARY-NEXT: Kind: Indir |
| 41 | ; SUMMARY-NEXT: SingleImplName: '' |
| 42 | ; SUMMARY-NEXT: ResByArg: |
| 43 | ; SUMMARY-NEXT: 24,12: |
| 44 | ; SUMMARY-NEXT: Kind: VirtualConstProp |
| 45 | ; SUMMARY-NEXT: Info: 0 |
Peter Collingbourne | b15a35e | 2017-09-11 22:34:42 +0000 | [diff] [blame] | 46 | ; SUMMARY-X86-NEXT: Byte: 0 |
| 47 | ; SUMMARY-X86-NEXT: Bit: 0 |
| 48 | ; SUMMARY-ARM-NEXT: Byte: 4294967292 |
| 49 | ; SUMMARY-ARM-NEXT: Bit: 1 |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 50 | |
| 51 | ; CHECK: [[CVT3A:.*]] = private constant { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] } { [8 x i8] zeroinitializer, i1 (i8*, i32, i32)* @vf0i1, [0 x i8] zeroinitializer }, !type !0 |
| 52 | @vt3a = constant i1 (i8*, i32, i32)* @vf0i1, !type !0 |
| 53 | |
| 54 | ; CHECK: [[CVT3B:.*]] = private constant { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] } { [8 x i8] c"\00\00\00\00\00\00\00\01", i1 (i8*, i32, i32)* @vf1i1, [0 x i8] zeroinitializer }, !type !0 |
| 55 | @vt3b = constant i1 (i8*, i32, i32)* @vf1i1, !type !0 |
| 56 | |
| 57 | ; CHECK: [[CVT3C:.*]] = private constant { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] } { [8 x i8] zeroinitializer, i1 (i8*, i32, i32)* @vf0i1, [0 x i8] zeroinitializer }, !type !0 |
| 58 | @vt3c = constant i1 (i8*, i32, i32)* @vf0i1, !type !0 |
| 59 | |
| 60 | ; CHECK: [[CVT3D:.*]] = private constant { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] } { [8 x i8] c"\00\00\00\00\00\00\00\01", i1 (i8*, i32, i32)* @vf1i1, [0 x i8] zeroinitializer }, !type !0 |
| 61 | @vt3d = constant i1 (i8*, i32, i32)* @vf1i1, !type !0 |
| 62 | |
| 63 | ; CHECK: [[CVT4A:.*]] = private constant { [8 x i8], i32 (i8*, i32, i32)*, [0 x i8] } { [8 x i8] c"\00\00\00\00\01\00\00\00", i32 (i8*, i32, i32)* @vf1i32, [0 x i8] zeroinitializer }, !type !1 |
| 64 | @vt4a = constant i32 (i8*, i32, i32)* @vf1i32, !type !1 |
| 65 | |
| 66 | ; CHECK: [[CVT4B:.*]] = private constant { [8 x i8], i32 (i8*, i32, i32)*, [0 x i8] } { [8 x i8] c"\00\00\00\00\02\00\00\00", i32 (i8*, i32, i32)* @vf2i32, [0 x i8] zeroinitializer }, !type !1 |
| 67 | @vt4b = constant i32 (i8*, i32, i32)* @vf2i32, !type !1 |
| 68 | |
Peter Collingbourne | b15a35e | 2017-09-11 22:34:42 +0000 | [diff] [blame] | 69 | ; X86: @__typeid_typeid3_0_12_24_byte = hidden alias i8, inttoptr (i32 -1 to i8*) |
| 70 | ; X86: @__typeid_typeid3_0_12_24_bit = hidden alias i8, inttoptr (i32 1 to i8*) |
| 71 | ; X86: @__typeid_typeid4_0_24_12_byte = hidden alias i8, inttoptr (i32 -4 to i8*) |
| 72 | ; X86: @__typeid_typeid4_0_24_12_bit = hidden alias i8, inttoptr (i32 1 to i8*) |
| 73 | ; ARM-NOT: alias {{.*}} inttoptr |
Peter Collingbourne | 14dcf02 | 2017-03-10 20:13:58 +0000 | [diff] [blame] | 74 | |
| 75 | ; CHECK: @vt3a = alias i1 (i8*, i32, i32)*, getelementptr inbounds ({ [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }, { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }* [[CVT3A]], i32 0, i32 1) |
| 76 | ; CHECK: @vt3b = alias i1 (i8*, i32, i32)*, getelementptr inbounds ({ [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }, { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }* [[CVT3B]], i32 0, i32 1) |
| 77 | ; CHECK: @vt3c = alias i1 (i8*, i32, i32)*, getelementptr inbounds ({ [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }, { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }* [[CVT3C]], i32 0, i32 1) |
| 78 | ; CHECK: @vt3d = alias i1 (i8*, i32, i32)*, getelementptr inbounds ({ [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }, { [8 x i8], i1 (i8*, i32, i32)*, [0 x i8] }* [[CVT3D]], i32 0, i32 1) |
| 79 | ; CHECK: @vt4a = alias i32 (i8*, i32, i32)*, getelementptr inbounds ({ [8 x i8], i32 (i8*, i32, i32)*, [0 x i8] }, { [8 x i8], i32 (i8*, i32, i32)*, [0 x i8] }* [[CVT4A]], i32 0, i32 1) |
| 80 | ; CHECK: @vt4b = alias i32 (i8*, i32, i32)*, getelementptr inbounds ({ [8 x i8], i32 (i8*, i32, i32)*, [0 x i8] }, { [8 x i8], i32 (i8*, i32, i32)*, [0 x i8] }* [[CVT4B]], i32 0, i32 1) |
| 81 | |
| 82 | define i1 @vf0i1(i8* %this, i32, i32) readnone { |
| 83 | ret i1 0 |
| 84 | } |
| 85 | |
| 86 | define i1 @vf1i1(i8* %this, i32, i32) readnone { |
| 87 | ret i1 1 |
| 88 | } |
| 89 | |
| 90 | define i32 @vf1i32(i8* %this, i32, i32) readnone { |
| 91 | ret i32 1 |
| 92 | } |
| 93 | |
| 94 | define i32 @vf2i32(i8* %this, i32, i32) readnone { |
| 95 | ret i32 2 |
| 96 | } |
| 97 | |
| 98 | ; CHECK: !0 = !{i32 8, !"typeid3"} |
| 99 | ; CHECK: !1 = !{i32 8, !"typeid4"} |
| 100 | |
| 101 | !0 = !{i32 0, !"typeid3"} |
| 102 | !1 = !{i32 0, !"typeid4"} |