| Simon Pilgrim | fc4d4b2 | 2016-07-19 13:35:11 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mtriple=arm64-apple-ios7.0.0 | FileCheck %s |
| Louis Gerbarg | b9a0551 | 2014-04-11 22:27:58 +0000 | [diff] [blame] | 2 | |
| 3 | target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" |
| Louis Gerbarg | b9a0551 | 2014-04-11 22:27:58 +0000 | [diff] [blame] | 4 | |
| 5 | ; Function Attrs: nounwind readnone |
| 6 | declare i32 @llvm.ctlz.i32(i32, i1) #0 |
| 7 | declare i64 @llvm.ctlz.i64(i64, i1) #1 |
| 8 | |
| 9 | ; Function Attrs: nounwind ssp |
| 10 | define i32 @clrsb32(i32 %x) #2 { |
| 11 | entry: |
| 12 | %shr = ashr i32 %x, 31 |
| 13 | %xor = xor i32 %shr, %x |
| 14 | %mul = shl i32 %xor, 1 |
| 15 | %add = or i32 %mul, 1 |
| 16 | %0 = tail call i32 @llvm.ctlz.i32(i32 %add, i1 false) |
| 17 | |
| 18 | ret i32 %0 |
| 19 | ; CHECK-LABEL: clrsb32 |
| 20 | ; CHECK: cls [[TEMP:w[0-9]+]], [[TEMP]] |
| 21 | } |
| 22 | |
| 23 | ; Function Attrs: nounwind ssp |
| 24 | define i64 @clrsb64(i64 %x) #3 { |
| 25 | entry: |
| 26 | %shr = ashr i64 %x, 63 |
| 27 | %xor = xor i64 %shr, %x |
| 28 | %mul = shl nsw i64 %xor, 1 |
| 29 | %add = or i64 %mul, 1 |
| 30 | %0 = tail call i64 @llvm.ctlz.i64(i64 %add, i1 false) |
| 31 | |
| 32 | ret i64 %0 |
| 33 | ; CHECK-LABEL: clrsb64 |
| 34 | ; CHECK: cls [[TEMP:x[0-9]+]], [[TEMP]] |
| 35 | } |