Hideki Saito | d722d61 | 2018-05-08 18:57:34 +0000 | [diff] [blame] | 1 | ; RUN: opt -passes='loop-vectorize' -force-vector-width=2 -S < %s | FileCheck %s |
| 2 | ; |
| 3 | ; Forcing VF=2 to trigger vector code gen |
| 4 | ; |
| 5 | ; This is a test case that let's vectorizer's code gen to generate |
| 6 | ; more than one BasicBlocks in the loop body (emulated masked scatter) |
| 7 | ; for those targets that do not support masked scatter. Broadcast |
| 8 | ; code generation was previously dependent on loop body being |
| 9 | ; a single basic block and this test case exposed incorrect code gen |
| 10 | ; resulting in an assert in IL verification. Test passes if IL verification |
| 11 | ; does not fail. |
| 12 | ; |
| 13 | ; Performing minimal check in the output to ensure the loop is actually |
| 14 | ; vectorized. |
| 15 | ; |
| 16 | ; CHECK: vector.body |
| 17 | |
| 18 | @a = external global [2 x i16], align 1 |
| 19 | |
| 20 | define void @f1() { |
| 21 | entry: |
| 22 | br label %for.body |
| 23 | |
| 24 | for.body: ; preds = %land.end, %entry |
| 25 | %0 = phi i32 [ undef, %entry ], [ %dec, %land.end ] |
| 26 | br i1 undef, label %land.end, label %land.rhs |
| 27 | |
| 28 | land.rhs: ; preds = %for.body |
| 29 | %1 = load i32, i32* undef, align 1 |
| 30 | br label %land.end |
| 31 | |
| 32 | land.end: ; preds = %land.rhs, %for.body |
| 33 | %2 = trunc i32 %0 to i16 |
| 34 | %arrayidx = getelementptr inbounds [2 x i16], [2 x i16]* @a, i16 0, i16 %2 |
| 35 | store i16 undef, i16* %arrayidx, align 1 |
| 36 | %dec = add nsw i32 %0, -1 |
| 37 | %cmp = icmp sgt i32 %0, 1 |
| 38 | br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge |
| 39 | |
| 40 | for.cond.for.end_crit_edge: ; preds = %land.end |
| 41 | unreachable |
| 42 | } |