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gerrit-public.fairphone.software / toolchain / llvm-project / e9a5a77ee3e861ec2b1a5fefc55d86fbb1252fcb / . / llvm / test / CodeGen / AMDGPU / memory-legalizer-atomic-store.ll
blob: 14b7d3e62f86500dee420d1a679b2fd8883f9b6e [file] [log] [blame]
Konstantin Zhuravlyove9a5a772017-07-21 21:19:23 +0000[diff] [blame^]1; RUN: llc -mtriple=amdgcn-amd- -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck %s
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck %s
3
4; CHECK-LABEL: {{^}}system_unordered
5; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
6; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
7define amdgpu_kernel void @system_unordered(
8 i32 %in, i32 addrspace(4)* %out) {
9entry:
10 store atomic i32 %in, i32 addrspace(4)* %out unordered, align 4
11 ret void
12}
13
14; CHECK-LABEL: {{^}}system_monotonic
15; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
16; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
17define amdgpu_kernel void @system_monotonic(
18 i32 %in, i32 addrspace(4)* %out) {
19entry:
20 store atomic i32 %in, i32 addrspace(4)* %out monotonic, align 4
21 ret void
22}
23
24; CHECK-LABEL: {{^}}system_release
25; CHECK: s_waitcnt vmcnt(0){{$}}
26; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
27define amdgpu_kernel void @system_release(
28 i32 %in, i32 addrspace(4)* %out) {
29entry:
30 store atomic i32 %in, i32 addrspace(4)* %out release, align 4
31 ret void
32}
33
34; CHECK-LABEL: {{^}}system_seq_cst
35; CHECK: s_waitcnt vmcnt(0){{$}}
36; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
37define amdgpu_kernel void @system_seq_cst(
38 i32 %in, i32 addrspace(4)* %out) {
39entry:
40 store atomic i32 %in, i32 addrspace(4)* %out seq_cst, align 4
41 ret void
42}
43
44; CHECK-LABEL: {{^}}singlethread_unordered
45; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
46; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
47define amdgpu_kernel void @singlethread_unordered(
48 i32 %in, i32 addrspace(4)* %out) {
49entry:
50 store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") unordered, align 4
51 ret void
52}
53
54; CHECK-LABEL: {{^}}singlethread_monotonic
55; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
56; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
57define amdgpu_kernel void @singlethread_monotonic(
58 i32 %in, i32 addrspace(4)* %out) {
59entry:
60 store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") monotonic, align 4
61 ret void
62}
63
64; CHECK-LABEL: {{^}}singlethread_release
65; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
66; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
67define amdgpu_kernel void @singlethread_release(
68 i32 %in, i32 addrspace(4)* %out) {
69entry:
70 store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") release, align 4
71 ret void
72}
73
74; CHECK-LABEL: {{^}}singlethread_seq_cst
75; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
76; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
77define amdgpu_kernel void @singlethread_seq_cst(
78 i32 %in, i32 addrspace(4)* %out) {
79entry:
80 store atomic i32 %in, i32 addrspace(4)* %out syncscope("singlethread") seq_cst, align 4
81 ret void
82}
83
84; CHECK-LABEL: {{^}}agent_unordered
85; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
86; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
87define amdgpu_kernel void @agent_unordered(
88 i32 %in, i32 addrspace(4)* %out) {
89entry:
90 store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") unordered, align 4
91 ret void
92}
93
94; CHECK-LABEL: {{^}}agent_monotonic
95; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
96; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
97define amdgpu_kernel void @agent_monotonic(
98 i32 %in, i32 addrspace(4)* %out) {
99entry:
100 store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") monotonic, align 4
101 ret void
102}
103
104; CHECK-LABEL: {{^}}agent_release
105; CHECK: s_waitcnt vmcnt(0){{$}}
106; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
107define amdgpu_kernel void @agent_release(
108 i32 %in, i32 addrspace(4)* %out) {
109entry:
110 store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") release, align 4
111 ret void
112}
113
114; CHECK-LABEL: {{^}}agent_seq_cst
115; CHECK: s_waitcnt vmcnt(0){{$}}
116; CHECK-NEXT: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
117define amdgpu_kernel void @agent_seq_cst(
118 i32 %in, i32 addrspace(4)* %out) {
119entry:
120 store atomic i32 %in, i32 addrspace(4)* %out syncscope("agent") seq_cst, align 4
121 ret void
122}
123
124; CHECK-LABEL: {{^}}workgroup_unordered
125; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
126; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
127define amdgpu_kernel void @workgroup_unordered(
128 i32 %in, i32 addrspace(4)* %out) {
129entry:
130 store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") unordered, align 4
131 ret void
132}
133
134; CHECK-LABEL: {{^}}workgroup_monotonic
135; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
136; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
137define amdgpu_kernel void @workgroup_monotonic(
138 i32 %in, i32 addrspace(4)* %out) {
139entry:
140 store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") monotonic, align 4
141 ret void
142}
143
144; CHECK-LABEL: {{^}}workgroup_release
145; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
146; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
147define amdgpu_kernel void @workgroup_release(
148 i32 %in, i32 addrspace(4)* %out) {
149entry:
150 store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") release, align 4
151 ret void
152}
153
154; CHECK-LABEL: {{^}}workgroup_seq_cst
155; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
156; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
157define amdgpu_kernel void @workgroup_seq_cst(
158 i32 %in, i32 addrspace(4)* %out) {
159entry:
160 store atomic i32 %in, i32 addrspace(4)* %out syncscope("workgroup") seq_cst, align 4
161 ret void
162}
163
164; CHECK-LABEL: {{^}}wavefront_unordered
165; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
166; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
167define amdgpu_kernel void @wavefront_unordered(
168 i32 %in, i32 addrspace(4)* %out) {
169entry:
170 store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") unordered, align 4
171 ret void
172}
173
174; CHECK-LABEL: {{^}}wavefront_monotonic
175; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
176; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
177define amdgpu_kernel void @wavefront_monotonic(
178 i32 %in, i32 addrspace(4)* %out) {
179entry:
180 store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") monotonic, align 4
181 ret void
182}
183
184; CHECK-LABEL: {{^}}wavefront_release
185; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
186; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
187define amdgpu_kernel void @wavefront_release(
188 i32 %in, i32 addrspace(4)* %out) {
189entry:
190 store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") release, align 4
191 ret void
192}
193
194; CHECK-LABEL: {{^}}wavefront_seq_cst
195; CHECK-NOT: s_waitcnt vmcnt(0){{$}}
196; CHECK: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
197define amdgpu_kernel void @wavefront_seq_cst(
198 i32 %in, i32 addrspace(4)* %out) {
199entry:
200 store atomic i32 %in, i32 addrspace(4)* %out syncscope("wavefront") seq_cst, align 4
201 ret void
202}