Reid Spencer | ea8b07e | 2007-03-23 20:48:34 +0000 | [diff] [blame^] | 1 | ; This test makes sure that add instructions are properly eliminated. |
| 2 | ; This test is for Integer BitWidth > 64 && BitWidth <= 1024. |
| 3 | |
| 4 | ; RUN: llvm-as < %s | opt -instcombine -disable-output && |
| 5 | ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ |
| 6 | ; RUN: grep -v OK | not grep add |
| 7 | |
| 8 | implementation |
| 9 | |
| 10 | define i111 @test1(i111 %x) { |
| 11 | %tmp.2 = shl i111 1, 110 |
| 12 | %tmp.4 = xor i111 %x, %tmp.2 |
| 13 | ;; Add of sign bit -> xor of sign bit. |
| 14 | %tmp.6 = add i111 %tmp.4, %tmp.2 |
| 15 | ret i111 %tmp.6 |
| 16 | } |
| 17 | |
| 18 | define i65 @test2(i65 %x) { |
| 19 | %tmp.0 = shl i65 1, 64 |
| 20 | %tmp.2 = xor i65 %x, %tmp.0 |
| 21 | ;; Add of sign bit -> xor of sign bit. |
| 22 | %tmp.4 = add i65 %tmp.2, %tmp.0 |
| 23 | ret i65 %tmp.4 |
| 24 | } |
| 25 | |
| 26 | define i1024 @test3(i1024 %x) { |
| 27 | %tmp.0 = shl i1024 1, 1023 |
| 28 | %tmp.2 = xor i1024 %x, %tmp.0 |
| 29 | ;; Add of sign bit -> xor of sign bit. |
| 30 | %tmp.4 = add i1024 %tmp.2, %tmp.0 |
| 31 | ret i1024 %tmp.4 |
| 32 | } |
| 33 | |
| 34 | define i128 @test4(i128 %x) { |
| 35 | ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext. |
| 36 | %tmp.5 = shl i128 1, 127 |
| 37 | %tmp.1 = ashr i128 %tmp.5, 120 |
| 38 | %tmp.2 = xor i128 %x, %tmp.1 |
| 39 | %tmp.4 = add i128 %tmp.2, %tmp.5 |
| 40 | ret i128 %tmp.4 |
| 41 | } |
| 42 | |
| 43 | define i99 @test5(i99 %x) { |
| 44 | ;; If we have ADD(XOR(AND(X, 0xFF), 0x80), 0xF..F80), it's a sext. |
| 45 | %X = and i99 %x, 562949953421311 |
| 46 | %tmp.2 = xor i99 %X, 281474976710656 |
| 47 | %tmp.4 = add i99 %tmp.2, -281474976710656 |
| 48 | ret i99 %tmp.4 |
| 49 | } |
| 50 | |
| 51 | define i77 @test6(i77 %x) { |
| 52 | ;; (x & 254)+1 -> (x & 254)|1 |
| 53 | %tmp.2 = and i77 %x, 562949953421310 |
| 54 | %tmp.4 = add i77 %tmp.2, 1 |
| 55 | ret i77 %tmp.4 |
| 56 | } |