Wei Mi | a2f0b59 | 2016-12-22 19:44:45 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=x86_64-unknown-unknown -force-split-store < %s | FileCheck %s |
Wei Mi | c54d129 | 2016-09-02 17:17:04 +0000 | [diff] [blame] | 2 | |
| 3 | ; CHECK-LABEL: int32_float_pair |
Nirav Dave | 93f9d5c | 2017-02-02 18:24:55 +0000 | [diff] [blame] | 4 | ; CHECK: movl %edi, (%rsi) |
| 5 | ; CHECK: movss %xmm0, 4(%rsi) |
Wei Mi | c54d129 | 2016-09-02 17:17:04 +0000 | [diff] [blame] | 6 | define void @int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) { |
| 7 | entry: |
| 8 | %t0 = bitcast float %tmp2 to i32 |
| 9 | %t1 = zext i32 %t0 to i64 |
| 10 | %t2 = shl nuw i64 %t1, 32 |
| 11 | %t3 = zext i32 %tmp1 to i64 |
| 12 | %t4 = or i64 %t2, %t3 |
| 13 | store i64 %t4, i64* %ref.tmp, align 8 |
| 14 | ret void |
| 15 | } |
| 16 | |
| 17 | ; CHECK-LABEL: float_int32_pair |
Nirav Dave | 93f9d5c | 2017-02-02 18:24:55 +0000 | [diff] [blame] | 18 | ; CHECK: movss %xmm0, (%rsi) |
| 19 | ; CHECK: movl %edi, 4(%rsi) |
Wei Mi | c54d129 | 2016-09-02 17:17:04 +0000 | [diff] [blame] | 20 | define void @float_int32_pair(float %tmp1, i32 %tmp2, i64* %ref.tmp) { |
| 21 | entry: |
| 22 | %t0 = bitcast float %tmp1 to i32 |
| 23 | %t1 = zext i32 %tmp2 to i64 |
| 24 | %t2 = shl nuw i64 %t1, 32 |
| 25 | %t3 = zext i32 %t0 to i64 |
| 26 | %t4 = or i64 %t2, %t3 |
| 27 | store i64 %t4, i64* %ref.tmp, align 8 |
| 28 | ret void |
| 29 | } |
| 30 | |
| 31 | ; CHECK-LABEL: int16_float_pair |
Nirav Dave | 93f9d5c | 2017-02-02 18:24:55 +0000 | [diff] [blame] | 32 | ; CHECK: movzwl %di, %eax |
| 33 | ; CHECK: movl %eax, (%rsi) |
| 34 | ; CHECK: movss %xmm0, 4(%rsi) |
Wei Mi | c54d129 | 2016-09-02 17:17:04 +0000 | [diff] [blame] | 35 | define void @int16_float_pair(i16 signext %tmp1, float %tmp2, i64* %ref.tmp) { |
| 36 | entry: |
| 37 | %t0 = bitcast float %tmp2 to i32 |
| 38 | %t1 = zext i32 %t0 to i64 |
| 39 | %t2 = shl nuw i64 %t1, 32 |
| 40 | %t3 = zext i16 %tmp1 to i64 |
| 41 | %t4 = or i64 %t2, %t3 |
| 42 | store i64 %t4, i64* %ref.tmp, align 8 |
| 43 | ret void |
| 44 | } |
| 45 | |
| 46 | ; CHECK-LABEL: int8_float_pair |
Nirav Dave | 93f9d5c | 2017-02-02 18:24:55 +0000 | [diff] [blame] | 47 | ; CHECK: movzbl %dil, %eax |
| 48 | ; CHECK: movl %eax, (%rsi) |
| 49 | ; CHECK: movss %xmm0, 4(%rsi) |
Wei Mi | c54d129 | 2016-09-02 17:17:04 +0000 | [diff] [blame] | 50 | define void @int8_float_pair(i8 signext %tmp1, float %tmp2, i64* %ref.tmp) { |
| 51 | entry: |
| 52 | %t0 = bitcast float %tmp2 to i32 |
| 53 | %t1 = zext i32 %t0 to i64 |
| 54 | %t2 = shl nuw i64 %t1, 32 |
| 55 | %t3 = zext i8 %tmp1 to i64 |
| 56 | %t4 = or i64 %t2, %t3 |
| 57 | store i64 %t4, i64* %ref.tmp, align 8 |
| 58 | ret void |
| 59 | } |
Wei Mi | a2f0b59 | 2016-12-22 19:44:45 +0000 | [diff] [blame] | 60 | |
| 61 | ; CHECK-LABEL: int32_int32_pair |
| 62 | ; CHECK: movl %edi, (%rdx) |
| 63 | ; CHECK: movl %esi, 4(%rdx) |
| 64 | define void @int32_int32_pair(i32 %tmp1, i32 %tmp2, i64* %ref.tmp) { |
| 65 | entry: |
| 66 | %t1 = zext i32 %tmp2 to i64 |
| 67 | %t2 = shl nuw i64 %t1, 32 |
| 68 | %t3 = zext i32 %tmp1 to i64 |
| 69 | %t4 = or i64 %t2, %t3 |
| 70 | store i64 %t4, i64* %ref.tmp, align 8 |
| 71 | ret void |
| 72 | } |
| 73 | |
| 74 | ; CHECK-LABEL: int16_int16_pair |
| 75 | ; CHECK: movw %di, (%rdx) |
| 76 | ; CHECK: movw %si, 2(%rdx) |
| 77 | define void @int16_int16_pair(i16 signext %tmp1, i16 signext %tmp2, i32* %ref.tmp) { |
| 78 | entry: |
| 79 | %t1 = zext i16 %tmp2 to i32 |
| 80 | %t2 = shl nuw i32 %t1, 16 |
| 81 | %t3 = zext i16 %tmp1 to i32 |
| 82 | %t4 = or i32 %t2, %t3 |
| 83 | store i32 %t4, i32* %ref.tmp, align 4 |
| 84 | ret void |
| 85 | } |
| 86 | |
| 87 | ; CHECK-LABEL: int8_int8_pair |
| 88 | ; CHECK: movb %dil, (%rdx) |
| 89 | ; CHECK: movb %sil, 1(%rdx) |
| 90 | define void @int8_int8_pair(i8 signext %tmp1, i8 signext %tmp2, i16* %ref.tmp) { |
| 91 | entry: |
| 92 | %t1 = zext i8 %tmp2 to i16 |
| 93 | %t2 = shl nuw i16 %t1, 8 |
| 94 | %t3 = zext i8 %tmp1 to i16 |
| 95 | %t4 = or i16 %t2, %t3 |
| 96 | store i16 %t4, i16* %ref.tmp, align 2 |
| 97 | ret void |
| 98 | } |
| 99 | |
| 100 | ; CHECK-LABEL: int31_int31_pair |
| 101 | ; CHECK: andl $2147483647, %edi |
| 102 | ; CHECK: movl %edi, (%rdx) |
| 103 | ; CHECK: andl $2147483647, %esi |
| 104 | ; CHECK: movl %esi, 4(%rdx) |
| 105 | define void @int31_int31_pair(i31 %tmp1, i31 %tmp2, i64* %ref.tmp) { |
| 106 | entry: |
| 107 | %t1 = zext i31 %tmp2 to i64 |
| 108 | %t2 = shl nuw i64 %t1, 32 |
| 109 | %t3 = zext i31 %tmp1 to i64 |
| 110 | %t4 = or i64 %t2, %t3 |
| 111 | store i64 %t4, i64* %ref.tmp, align 8 |
| 112 | ret void |
| 113 | } |
| 114 | |
| 115 | ; CHECK-LABEL: int31_int17_pair |
| 116 | ; CHECK: andl $2147483647, %edi |
| 117 | ; CHECK: movl %edi, (%rdx) |
| 118 | ; CHECK: andl $131071, %esi |
| 119 | ; CHECK: movl %esi, 4(%rdx) |
| 120 | define void @int31_int17_pair(i31 %tmp1, i17 %tmp2, i64* %ref.tmp) { |
| 121 | entry: |
| 122 | %t1 = zext i17 %tmp2 to i64 |
| 123 | %t2 = shl nuw i64 %t1, 32 |
| 124 | %t3 = zext i31 %tmp1 to i64 |
| 125 | %t4 = or i64 %t2, %t3 |
| 126 | store i64 %t4, i64* %ref.tmp, align 8 |
| 127 | ret void |
| 128 | } |
| 129 | |
| 130 | ; CHECK-LABEL: int7_int3_pair |
| 131 | ; CHECK: andb $127, %dil |
| 132 | ; CHECK: movb %dil, (%rdx) |
| 133 | ; CHECK: andb $7, %sil |
| 134 | ; CHECK: movb %sil, 1(%rdx) |
| 135 | define void @int7_int3_pair(i7 signext %tmp1, i3 signext %tmp2, i16* %ref.tmp) { |
| 136 | entry: |
| 137 | %t1 = zext i3 %tmp2 to i16 |
| 138 | %t2 = shl nuw i16 %t1, 8 |
| 139 | %t3 = zext i7 %tmp1 to i16 |
| 140 | %t4 = or i16 %t2, %t3 |
| 141 | store i16 %t4, i16* %ref.tmp, align 2 |
| 142 | ret void |
| 143 | } |
| 144 | |
| 145 | ; CHECK-LABEL: int24_int24_pair |
| 146 | ; CHECK: movw %di, (%rdx) |
| 147 | ; CHECK: shrl $16, %edi |
| 148 | ; CHECK: movb %dil, 2(%rdx) |
Nirav Dave | 93f9d5c | 2017-02-02 18:24:55 +0000 | [diff] [blame] | 149 | ; CHECK: movl %esi, %eax |
| 150 | ; CHECK: shrl $16, %eax |
| 151 | ; CHECK: movb %al, 6(%rdx) |
| 152 | ; CHECK: movw %si, 4(%rdx) |
Wei Mi | a2f0b59 | 2016-12-22 19:44:45 +0000 | [diff] [blame] | 153 | define void @int24_int24_pair(i24 signext %tmp1, i24 signext %tmp2, i48* %ref.tmp) { |
| 154 | entry: |
| 155 | %t1 = zext i24 %tmp2 to i48 |
| 156 | %t2 = shl nuw i48 %t1, 24 |
| 157 | %t3 = zext i24 %tmp1 to i48 |
| 158 | %t4 = or i48 %t2, %t3 |
| 159 | store i48 %t4, i48* %ref.tmp, align 2 |
| 160 | ret void |
| 161 | } |
| 162 | |
| 163 | ; getTypeSizeInBits(i12) != getTypeStoreSizeInBits(i12), so store split doesn't kick in. |
| 164 | ; CHECK-LABEL: int12_int12_pair |
| 165 | ; CHECK: movl %esi, %eax |
| 166 | ; CHECK: shll $12, %eax |
| 167 | ; CHECK: andl $4095, %edi |
| 168 | ; CHECK: orl %eax, %edi |
| 169 | ; CHECK: shrl $4, %esi |
| 170 | ; CHECK: movb %sil, 2(%rdx) |
| 171 | ; CHECK: movw %di, (%rdx) |
| 172 | define void @int12_int12_pair(i12 signext %tmp1, i12 signext %tmp2, i24* %ref.tmp) { |
| 173 | entry: |
| 174 | %t1 = zext i12 %tmp2 to i24 |
| 175 | %t2 = shl nuw i24 %t1, 12 |
| 176 | %t3 = zext i12 %tmp1 to i24 |
| 177 | %t4 = or i24 %t2, %t3 |
| 178 | store i24 %t4, i24* %ref.tmp, align 2 |
| 179 | ret void |
| 180 | } |
| 181 | |
| 182 | ; getTypeSizeInBits(i14) != getTypeStoreSizeInBits(i14), so store split doesn't kick in. |
| 183 | ; CHECK-LABEL: int7_int7_pair |
| 184 | ; CHECK: movzbl %sil, %eax |
| 185 | ; CHECK: shll $7, %eax |
| 186 | ; CHECK: andb $127, %dil |
| 187 | ; CHECK: movzbl %dil, %ecx |
| 188 | ; CHECK: orl %eax, %ecx |
| 189 | ; CHECK: andl $16383, %ecx |
| 190 | ; CHECK: movw %cx, (%rdx) |
| 191 | define void @int7_int7_pair(i7 signext %tmp1, i7 signext %tmp2, i14* %ref.tmp) { |
| 192 | entry: |
| 193 | %t1 = zext i7 %tmp2 to i14 |
| 194 | %t2 = shl nuw i14 %t1, 7 |
| 195 | %t3 = zext i7 %tmp1 to i14 |
| 196 | %t4 = or i14 %t2, %t3 |
| 197 | store i14 %t4, i14* %ref.tmp, align 2 |
| 198 | ret void |
| 199 | } |
| 200 | |
| 201 | ; getTypeSizeInBits(i2) != getTypeStoreSizeInBits(i2), so store split doesn't kick in. |
| 202 | ; CHECK-LABEL: int1_int1_pair |
| 203 | ; CHECK: addb %sil, %sil |
| 204 | ; CHECK: andb $1, %dil |
| 205 | ; CHECK: orb %sil, %dil |
| 206 | ; CHECK: andb $3, %dil |
| 207 | ; CHECK: movb %dil, (%rdx) |
| 208 | define void @int1_int1_pair(i1 signext %tmp1, i1 signext %tmp2, i2* %ref.tmp) { |
| 209 | entry: |
| 210 | %t1 = zext i1 %tmp2 to i2 |
| 211 | %t2 = shl nuw i2 %t1, 1 |
| 212 | %t3 = zext i1 %tmp1 to i2 |
| 213 | %t4 = or i2 %t2, %t3 |
| 214 | store i2 %t4, i2* %ref.tmp, align 1 |
| 215 | ret void |
| 216 | } |
| 217 | |
| 218 | ; CHECK-LABEL: mbb_int32_float_pair |
| 219 | ; CHECK: movl %edi, (%rsi) |
| 220 | ; CHECK: movss %xmm0, 4(%rsi) |
| 221 | define void @mbb_int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) { |
| 222 | entry: |
| 223 | %t0 = bitcast float %tmp2 to i32 |
| 224 | br label %next |
| 225 | next: |
| 226 | %t1 = zext i32 %t0 to i64 |
| 227 | %t2 = shl nuw i64 %t1, 32 |
| 228 | %t3 = zext i32 %tmp1 to i64 |
| 229 | %t4 = or i64 %t2, %t3 |
| 230 | store i64 %t4, i64* %ref.tmp, align 8 |
| 231 | ret void |
| 232 | } |
| 233 | |
| 234 | ; CHECK-LABEL: mbb_int32_float_multi_stores |
| 235 | ; CHECK: movl %edi, (%rsi) |
| 236 | ; CHECK: movss %xmm0, 4(%rsi) |
| 237 | ; CHECK: # %bb2 |
| 238 | ; CHECK: movl %edi, (%rdx) |
| 239 | ; CHECK: movss %xmm0, 4(%rdx) |
| 240 | define void @mbb_int32_float_multi_stores(i32 %tmp1, float %tmp2, i64* %ref.tmp, i64* %ref.tmp1, i1 %cmp) { |
| 241 | entry: |
| 242 | %t0 = bitcast float %tmp2 to i32 |
| 243 | br label %bb1 |
| 244 | bb1: |
| 245 | %t1 = zext i32 %t0 to i64 |
| 246 | %t2 = shl nuw i64 %t1, 32 |
| 247 | %t3 = zext i32 %tmp1 to i64 |
| 248 | %t4 = or i64 %t2, %t3 |
| 249 | store i64 %t4, i64* %ref.tmp, align 8 |
| 250 | br i1 %cmp, label %bb2, label %exitbb |
| 251 | bb2: |
| 252 | store i64 %t4, i64* %ref.tmp1, align 8 |
| 253 | br label %exitbb |
| 254 | exitbb: |
| 255 | ret void |
| 256 | } |