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gerrit-public.fairphone.software / toolchain / llvm-project / ec8af0db6c97362a10994ab17ba9d175ac833f6c / . / llvm / test / CodeGen / Thumb2 / mve-minmax.ll
blob: 38648afaabfa0ffc6886cb5ba193d188258056d2 [file] [log] [blame]
David Greenec8af0d2019-07-13 14:29:02 +0000[diff] [blame^]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE
3; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP
4
5define arm_aapcs_vfpcc <4 x float> @maxnm_float32_t(<4 x float> %src1, <4 x float> %src2) {
6; CHECK-MVE-LABEL: maxnm_float32_t:
7; CHECK-MVE: @ %bb.0: @ %entry
8; CHECK-MVE-NEXT: vmaxnm.f32 s11, s7, s3
9; CHECK-MVE-NEXT: vmaxnm.f32 s10, s6, s2
10; CHECK-MVE-NEXT: vmaxnm.f32 s9, s5, s1
11; CHECK-MVE-NEXT: vmaxnm.f32 s8, s4, s0
12; CHECK-MVE-NEXT: vmov q0, q2
13; CHECK-MVE-NEXT: bx lr
14;
15; CHECK-MVEFP-LABEL: maxnm_float32_t:
16; CHECK-MVEFP: @ %bb.0: @ %entry
17; CHECK-MVEFP-NEXT: vmaxnm.f32 q0, q1, q0
18; CHECK-MVEFP-NEXT: bx lr
19entry:
20 %cmp = fcmp fast ogt <4 x float> %src2, %src1
21 %0 = select <4 x i1> %cmp, <4 x float> %src2, <4 x float> %src1
22 ret <4 x float> %0
23}
24
25define arm_aapcs_vfpcc <8 x half> @minnm_float16_t(<8 x half> %src1, <8 x half> %src2) {
26; CHECK-MVE-LABEL: minnm_float16_t:
27; CHECK-MVE: @ %bb.0: @ %entry
28; CHECK-MVE-NEXT: vmov.u16 r0, q0[0]
29; CHECK-MVE-NEXT: vmov.u16 r1, q0[1]
30; CHECK-MVE-NEXT: vmov s8, r0
31; CHECK-MVE-NEXT: vmov.u16 r0, q1[0]
32; CHECK-MVE-NEXT: vmov s10, r0
33; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
34; CHECK-MVE-NEXT: vminnm.f16 s8, s10, s8
35; CHECK-MVE-NEXT: vmov s10, r2
36; CHECK-MVE-NEXT: vmov r0, s8
37; CHECK-MVE-NEXT: vmov s8, r1
38; CHECK-MVE-NEXT: vminnm.f16 s8, s10, s8
39; CHECK-MVE-NEXT: vmov r1, s8
40; CHECK-MVE-NEXT: vmov.16 q2[0], r0
41; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
42; CHECK-MVE-NEXT: vmov.16 q2[1], r1
43; CHECK-MVE-NEXT: vmov s12, r0
44; CHECK-MVE-NEXT: vmov.u16 r0, q1[2]
45; CHECK-MVE-NEXT: vmov s14, r0
46; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
47; CHECK-MVE-NEXT: vmov r0, s12
48; CHECK-MVE-NEXT: vmov.16 q2[2], r0
49; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
50; CHECK-MVE-NEXT: vmov s12, r0
51; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
52; CHECK-MVE-NEXT: vmov s14, r0
53; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
54; CHECK-MVE-NEXT: vmov r0, s12
55; CHECK-MVE-NEXT: vmov.16 q2[3], r0
56; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
57; CHECK-MVE-NEXT: vmov s12, r0
58; CHECK-MVE-NEXT: vmov.u16 r0, q1[4]
59; CHECK-MVE-NEXT: vmov s14, r0
60; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
61; CHECK-MVE-NEXT: vmov r0, s12
62; CHECK-MVE-NEXT: vmov.16 q2[4], r0
63; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
64; CHECK-MVE-NEXT: vmov s12, r0
65; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
66; CHECK-MVE-NEXT: vmov s14, r0
67; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
68; CHECK-MVE-NEXT: vmov r0, s12
69; CHECK-MVE-NEXT: vmov.16 q2[5], r0
70; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
71; CHECK-MVE-NEXT: vmov s12, r0
72; CHECK-MVE-NEXT: vmov.u16 r0, q1[6]
73; CHECK-MVE-NEXT: vmov s14, r0
74; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
75; CHECK-MVE-NEXT: vmov r0, s12
76; CHECK-MVE-NEXT: vmov.16 q2[6], r0
77; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
78; CHECK-MVE-NEXT: vmov s0, r0
79; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
80; CHECK-MVE-NEXT: vmov s2, r0
81; CHECK-MVE-NEXT: vminnm.f16 s0, s2, s0
82; CHECK-MVE-NEXT: vmov r0, s0
83; CHECK-MVE-NEXT: vmov.16 q2[7], r0
84; CHECK-MVE-NEXT: vmov q0, q2
85; CHECK-MVE-NEXT: bx lr
86;
87; CHECK-MVEFP-LABEL: minnm_float16_t:
88; CHECK-MVEFP: @ %bb.0: @ %entry
89; CHECK-MVEFP-NEXT: vminnm.f16 q0, q1, q0
90; CHECK-MVEFP-NEXT: bx lr
91entry:
92 %cmp = fcmp fast ogt <8 x half> %src2, %src1
93 %0 = select <8 x i1> %cmp, <8 x half> %src1, <8 x half> %src2
94 ret <8 x half> %0
95}