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Jia Liub22310f2012-02-18 12:03:15 +00001//===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
David Goodwinade05a32009-07-02 22:18:33 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000014#ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
15#define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
David Goodwinade05a32009-07-02 22:18:33 +000016
Craig Topper188ed9d2012-03-17 07:33:42 +000017#include "ARMBaseInstrInfo.h"
David Goodwinade05a32009-07-02 22:18:33 +000018#include "Thumb1RegisterInfo.h"
19
20namespace llvm {
21 class ARMSubtarget;
22
23class Thumb1InstrInfo : public ARMBaseInstrInfo {
24 Thumb1RegisterInfo RI;
25public:
26 explicit Thumb1InstrInfo(const ARMSubtarget &STI);
27
Jim Grosbach617f84dd2012-02-28 23:53:30 +000028 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
Craig Topper6bc27bf2014-03-10 02:09:33 +000029 void getNoopForMachoTarget(MCInst &NopInst) const override;
Jim Grosbach617f84dd2012-02-28 23:53:30 +000030
David Goodwinaf7451b2009-07-08 16:09:28 +000031 // Return the non-pre/post incrementing version of 'Opc'. Return 0
32 // if there is not such an opcode.
Craig Topper6bc27bf2014-03-10 02:09:33 +000033 unsigned getUnindexedOpcode(unsigned Opc) const override;
David Goodwinaf7451b2009-07-08 16:09:28 +000034
David Goodwinade05a32009-07-02 22:18:33 +000035 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
36 /// such, whenever a client has an instance of instruction info, it should
37 /// always be able to get register info as well (through this method).
38 ///
Craig Topper6bc27bf2014-03-10 02:09:33 +000039 const Thumb1RegisterInfo &getRegisterInfo() const override { return RI; }
David Goodwinade05a32009-07-02 22:18:33 +000040
Jakob Stoklund Olesend7b33002010-07-11 06:33:54 +000041 void copyPhysReg(MachineBasicBlock &MBB,
42 MachineBasicBlock::iterator I, DebugLoc DL,
43 unsigned DestReg, unsigned SrcReg,
Craig Topper6bc27bf2014-03-10 02:09:33 +000044 bool KillSrc) const override;
David Goodwinade05a32009-07-02 22:18:33 +000045 void storeRegToStackSlot(MachineBasicBlock &MBB,
Eric Christopherd2466682010-10-15 22:49:28 +000046 MachineBasicBlock::iterator MBBI,
47 unsigned SrcReg, bool isKill, int FrameIndex,
Evan Chengefb126a2010-05-06 19:06:44 +000048 const TargetRegisterClass *RC,
Craig Topper6bc27bf2014-03-10 02:09:33 +000049 const TargetRegisterInfo *TRI) const override;
David Goodwinade05a32009-07-02 22:18:33 +000050
David Goodwinade05a32009-07-02 22:18:33 +000051 void loadRegFromStackSlot(MachineBasicBlock &MBB,
Eric Christopherd2466682010-10-15 22:49:28 +000052 MachineBasicBlock::iterator MBBI,
53 unsigned DestReg, int FrameIndex,
Evan Chengefb126a2010-05-06 19:06:44 +000054 const TargetRegisterClass *RC,
Craig Topper6bc27bf2014-03-10 02:09:33 +000055 const TargetRegisterInfo *TRI) const override;
David Goodwinade05a32009-07-02 22:18:33 +000056
Akira Hatanakae5b6e0d2014-07-25 19:31:34 +000057private:
58 void expandLoadStackGuard(MachineBasicBlock::iterator MI,
59 Reloc::Model RM) const override;
David Goodwinade05a32009-07-02 22:18:33 +000060};
61}
62
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000063#endif