Brendon Cahoon | 254f889 | 2016-07-29 16:44:44 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon -disable-hsdr -hexagon-subreg-liveness < %s | FileCheck %s |
Krzysztof Parzyszek | 1adca30 | 2016-07-26 18:30:11 +0000 | [diff] [blame] | 2 | ; Check that we don't generate any bitwise operations. |
| 3 | |
| 4 | ; CHECK-NOT: = or( |
| 5 | ; CHECK-NOT: = and( |
| 6 | |
| 7 | target triple = "hexagon" |
| 8 | |
| 9 | define i32 @fred(i32* nocapture readonly %p, i32 %n) #0 { |
| 10 | entry: |
| 11 | %t.sroa.0.048 = load i32, i32* %p, align 4 |
| 12 | %cmp49 = icmp ugt i32 %n, 1 |
| 13 | br i1 %cmp49, label %for.body, label %for.end |
| 14 | |
| 15 | for.body: ; preds = %entry, %for.body |
| 16 | %t.sroa.0.052 = phi i32 [ %t.sroa.0.0, %for.body ], [ %t.sroa.0.048, %entry ] |
| 17 | %t.sroa.11.051 = phi i64 [ %t.sroa.11.0.extract.shift, %for.body ], [ 0, %entry ] |
| 18 | %i.050 = phi i32 [ %inc, %for.body ], [ 1, %entry ] |
| 19 | %t.sroa.0.0.insert.ext = zext i32 %t.sroa.0.052 to i64 |
| 20 | %t.sroa.0.0.insert.insert = or i64 %t.sroa.0.0.insert.ext, %t.sroa.11.051 |
| 21 | %0 = tail call i64 @llvm.hexagon.A2.addp(i64 %t.sroa.0.0.insert.insert, i64 %t.sroa.0.0.insert.insert) |
| 22 | %t.sroa.11.0.extract.shift = and i64 %0, -4294967296 |
| 23 | %arrayidx4 = getelementptr inbounds i32, i32* %p, i32 %i.050 |
| 24 | %inc = add nuw i32 %i.050, 1 |
| 25 | %t.sroa.0.0 = load i32, i32* %arrayidx4, align 4 |
| 26 | %exitcond = icmp eq i32 %inc, %n |
| 27 | br i1 %exitcond, label %for.end, label %for.body |
| 28 | |
| 29 | for.end: ; preds = %for.body, %entry |
| 30 | %t.sroa.0.0.lcssa = phi i32 [ %t.sroa.0.048, %entry ], [ %t.sroa.0.0, %for.body ] |
| 31 | %t.sroa.11.0.lcssa = phi i64 [ 0, %entry ], [ %t.sroa.11.0.extract.shift, %for.body ] |
| 32 | %t.sroa.0.0.insert.ext17 = zext i32 %t.sroa.0.0.lcssa to i64 |
| 33 | %t.sroa.0.0.insert.insert19 = or i64 %t.sroa.0.0.insert.ext17, %t.sroa.11.0.lcssa |
| 34 | %1 = tail call i64 @llvm.hexagon.A2.addp(i64 %t.sroa.0.0.insert.insert19, i64 %t.sroa.0.0.insert.insert19) |
| 35 | %t.sroa.11.0.extract.shift41 = lshr i64 %1, 32 |
| 36 | %t.sroa.11.0.extract.trunc42 = trunc i64 %t.sroa.11.0.extract.shift41 to i32 |
| 37 | ret i32 %t.sroa.11.0.extract.trunc42 |
| 38 | } |
| 39 | |
| 40 | declare i64 @llvm.hexagon.A2.addp(i64, i64) #1 |
| 41 | |
| 42 | attributes #0 = { norecurse nounwind readonly } |
| 43 | attributes #1 = { nounwind readnone } |