Krzysztof Parzyszek | 46abcb2 | 2018-03-30 15:09:05 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s | FileCheck %s |
| 2 | ; RUN: llc -march=hexagon -mcpu=hexagonv62 -enable-pipeliner < %s | FileCheck --check-prefix=CHECK-V62 %s |
| 3 | ; RUN: llc -march=hexagon -mcpu=hexagonv65 -enable-pipeliner < %s | FileCheck --check-prefix=CHECK-V65 %s |
| 4 | |
| 5 | ; |
| 6 | ; Make sure we pipeline the loop and that we generate the correct |
| 7 | ; base+offset values for the loads. |
| 8 | |
| 9 | ; CHECK: loop0(.LBB0_[[LOOP:.]], |
| 10 | ; CHECK: .LBB0_[[LOOP]]: |
| 11 | ; CHECK: r{{[0-9]+}} = memw([[REG1:(r[0-9]+)]]+#{{[0,4]}}) |
| 12 | ; CHECK: r{{[0-9]+}} = memw([[REG1]]++#4) |
| 13 | ; CHECK: }{{[ \t]*}}:endloop |
| 14 | ; CHECK-V62-NOT: }{{[ \t]*}}:mem_noshuf |
| 15 | ; CHECK-V65: }{{[ \t]*}}:mem_noshuf |
| 16 | |
| 17 | ; Function Attrs: nounwind |
| 18 | define void @f0() #0 { |
| 19 | b0: |
| 20 | br i1 undef, label %b1, label %b4 |
| 21 | |
| 22 | b1: ; preds = %b1, %b0 |
| 23 | %v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ] |
| 24 | %v1 = getelementptr inbounds i8*, i8** undef, i32 %v0 |
| 25 | %v2 = load i8*, i8** %v1, align 4 |
| 26 | %v3 = bitcast i8* %v2 to i32* |
| 27 | store i32 0, i32* %v3, align 4 |
| 28 | %v4 = load i8*, i8** %v1, align 4 |
| 29 | %v5 = getelementptr inbounds i8, i8* %v4, i32 8 |
| 30 | %v6 = bitcast i8* %v5 to i32* |
| 31 | store i32 0, i32* %v6, align 4 |
| 32 | %v7 = add nsw i32 %v0, 1 |
| 33 | %v8 = icmp eq i32 %v7, 2 |
| 34 | br i1 %v8, label %b2, label %b1 |
| 35 | |
| 36 | b2: ; preds = %b1 |
| 37 | br i1 undef, label %b3, label %b4 |
| 38 | |
| 39 | b3: ; preds = %b2 |
| 40 | unreachable |
| 41 | |
| 42 | b4: ; preds = %b2, %b0 |
| 43 | unreachable |
| 44 | } |
| 45 | |
| 46 | attributes #0 = { nounwind } |