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gerrit-public.fairphone.software / toolchain / llvm-project / f0b165a7f8492973d71f33b824acaea1eb26bba3 / . / llvm / test / CodeGen / WebAssembly / switch.ll
blob: c62333c336faef9e6c4900f9ab93ba3dc918f41b [file] [log] [blame]
Dan Gohmanf0b165a2015-12-05 03:03:35 +0000[diff] [blame^]1; RUN: llc < %s -asm-verbose=false -disable-block-placement | FileCheck %s
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]2
Dan Gohmanf0b165a2015-12-05 03:03:35 +0000[diff] [blame^]3; Test switch instructions. Block placement is disabled because it reorders
4; the blocks in a way that isn't interesting here.
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]5
6target datalayout = "e-p:32:32-i64:64-n32:64-S128"
7target triple = "wasm32-unknown-unknown"
8
9declare void @foo0()
10declare void @foo1()
11declare void @foo2()
12declare void @foo3()
13declare void @foo4()
14declare void @foo5()
15
Dan Gohmane51c0582015-10-06 00:27:55 +0000[diff] [blame]16; CHECK-LABEL: bar32:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]17; CHECK: block BB0_8{{$}}
18; CHECK: block BB0_7{{$}}
19; CHECK: block BB0_6{{$}}
20; CHECK: block BB0_5{{$}}
21; CHECK: block BB0_4{{$}}
22; CHECK: block BB0_3{{$}}
23; CHECK: block BB0_2{{$}}
Dan Gohmanbb7ce8e2015-11-20 03:02:49 +0000[diff] [blame]24; CHECK: tableswitch {{.*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}}
Dan Gohmane51c0582015-10-06 00:27:55 +0000[diff] [blame]25; CHECK: BB0_2:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]26; CHECK: call foo0
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]27; CHECK: BB0_3:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]28; CHECK: call foo1
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]29; CHECK: BB0_4:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]30; CHECK: call foo2
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]31; CHECK: BB0_5:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]32; CHECK: call foo3
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]33; CHECK: BB0_6:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]34; CHECK: call foo4
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]35; CHECK: BB0_7:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]36; CHECK: call foo5
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]37; CHECK: BB0_8:
Dan Gohmane51c0582015-10-06 00:27:55 +0000[diff] [blame]38; CHECK: return{{$}}
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]39define void @bar32(i32 %n) {
40entry:
41 switch i32 %n, label %sw.epilog [
42 i32 0, label %sw.bb
43 i32 1, label %sw.bb
44 i32 2, label %sw.bb
45 i32 3, label %sw.bb
46 i32 4, label %sw.bb
47 i32 5, label %sw.bb
48 i32 6, label %sw.bb
49 i32 7, label %sw.bb.1
50 i32 8, label %sw.bb.1
51 i32 9, label %sw.bb.1
52 i32 10, label %sw.bb.1
53 i32 11, label %sw.bb.1
54 i32 12, label %sw.bb.1
55 i32 13, label %sw.bb.1
56 i32 14, label %sw.bb.1
57 i32 15, label %sw.bb.2
58 i32 16, label %sw.bb.2
59 i32 17, label %sw.bb.2
60 i32 18, label %sw.bb.2
61 i32 19, label %sw.bb.2
62 i32 20, label %sw.bb.2
63 i32 21, label %sw.bb.3
64 i32 22, label %sw.bb.4
65 i32 23, label %sw.bb.5
66 ]
67
68sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
69 tail call void @foo0()
70 br label %sw.epilog
71
72sw.bb.1: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
73 tail call void @foo1()
74 br label %sw.epilog
75
76sw.bb.2: ; preds = %entry, %entry, %entry, %entry, %entry, %entry
77 tail call void @foo2()
78 br label %sw.epilog
79
80sw.bb.3: ; preds = %entry
81 tail call void @foo3()
82 br label %sw.epilog
83
84sw.bb.4: ; preds = %entry
85 tail call void @foo4()
86 br label %sw.epilog
87
88sw.bb.5: ; preds = %entry
89 tail call void @foo5()
90 br label %sw.epilog
91
92sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb
93 ret void
94}
95
Dan Gohmane51c0582015-10-06 00:27:55 +0000[diff] [blame]96; CHECK-LABEL: bar64:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]97; CHECK: block BB1_8{{$}}
98; CHECK: block BB1_7{{$}}
99; CHECK: block BB1_6{{$}}
100; CHECK: block BB1_5{{$}}
101; CHECK: block BB1_4{{$}}
102; CHECK: block BB1_3{{$}}
103; CHECK: block BB1_2{{$}}
Dan Gohmanbb7ce8e2015-11-20 03:02:49 +0000[diff] [blame]104; CHECK: tableswitch {{.*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}}
Dan Gohmane51c0582015-10-06 00:27:55 +0000[diff] [blame]105; CHECK: BB1_2:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]106; CHECK: call foo0
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]107; CHECK: BB1_3:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]108; CHECK: call foo1
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]109; CHECK: BB1_4:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]110; CHECK: call foo2
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]111; CHECK: BB1_5:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]112; CHECK: call foo3
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]113; CHECK: BB1_6:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]114; CHECK: call foo4
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]115; CHECK: BB1_7:
Dan Gohmancf4748f2015-11-12 17:04:33 +0000[diff] [blame]116; CHECK: call foo5
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]117; CHECK: BB1_8:
Dan Gohmane51c0582015-10-06 00:27:55 +0000[diff] [blame]118; CHECK: return{{$}}
Dan Gohman950a13c2015-09-16 16:51:30 +0000[diff] [blame]119define void @bar64(i64 %n) {
120entry:
121 switch i64 %n, label %sw.epilog [
122 i64 0, label %sw.bb
123 i64 1, label %sw.bb
124 i64 2, label %sw.bb
125 i64 3, label %sw.bb
126 i64 4, label %sw.bb
127 i64 5, label %sw.bb
128 i64 6, label %sw.bb
129 i64 7, label %sw.bb.1
130 i64 8, label %sw.bb.1
131 i64 9, label %sw.bb.1
132 i64 10, label %sw.bb.1
133 i64 11, label %sw.bb.1
134 i64 12, label %sw.bb.1
135 i64 13, label %sw.bb.1
136 i64 14, label %sw.bb.1
137 i64 15, label %sw.bb.2
138 i64 16, label %sw.bb.2
139 i64 17, label %sw.bb.2
140 i64 18, label %sw.bb.2
141 i64 19, label %sw.bb.2
142 i64 20, label %sw.bb.2
143 i64 21, label %sw.bb.3
144 i64 22, label %sw.bb.4
145 i64 23, label %sw.bb.5
146 ]
147
148sw.bb: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry
149 tail call void @foo0()
150 br label %sw.epilog
151
152sw.bb.1: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
153 tail call void @foo1()
154 br label %sw.epilog
155
156sw.bb.2: ; preds = %entry, %entry, %entry, %entry, %entry, %entry
157 tail call void @foo2()
158 br label %sw.epilog
159
160sw.bb.3: ; preds = %entry
161 tail call void @foo3()
162 br label %sw.epilog
163
164sw.bb.4: ; preds = %entry
165 tail call void @foo4()
166 br label %sw.epilog
167
168sw.bb.5: ; preds = %entry
169 tail call void @foo5()
170 br label %sw.epilog
171
172sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb
173 ret void
174}