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Tom Stellard75aadc22012-12-11 21:25:42 +00001//===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
12//
13//===----------------------------------------------------------------------===//
14
15#include "AMDGPUSubtarget.h"
Tom Stellard2e59a452014-06-13 01:32:00 +000016#include "R600InstrInfo.h"
17#include "SIInstrInfo.h"
Matt Arsenaultf171cf22014-07-14 23:40:49 +000018#include "llvm/ADT/SmallString.h"
Tom Stellard75aadc22012-12-11 21:25:42 +000019
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +000020#include "llvm/ADT/SmallString.h"
21
Tom Stellard75aadc22012-12-11 21:25:42 +000022using namespace llvm;
23
Chandler Carruthe96dd892014-04-21 22:55:11 +000024#define DEBUG_TYPE "amdgpu-subtarget"
25
Tom Stellard75aadc22012-12-11 21:25:42 +000026#define GET_SUBTARGETINFO_ENUM
27#define GET_SUBTARGETINFO_TARGET_DESC
28#define GET_SUBTARGETINFO_CTOR
29#include "AMDGPUGenSubtargetInfo.inc"
30
Matt Arsenaultd782d052014-06-27 17:57:00 +000031AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) :
32 AMDGPUGenSubtargetInfo(TT, GPU, FS),
33 DevName(GPU),
34 Is64bit(false),
35 DumpCode(false),
36 R600ALUInst(false),
37 HasVertexCache(false),
38 TexVTXClauseSize(0),
39 Gen(AMDGPUSubtarget::R600),
40 FP64(false),
Matt Arsenaultf171cf22014-07-14 23:40:49 +000041 FP64Denormals(false),
42 FP32Denormals(false),
Matt Arsenaultd782d052014-06-27 17:57:00 +000043 CaymanISA(false),
44 EnableIRStructurizer(true),
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +000045 EnablePromoteAlloca(false),
Matt Arsenaultd782d052014-06-27 17:57:00 +000046 EnableIfCvt(true),
47 WavefrontSize(0),
48 CFALUBug(false),
49 LocalMemorySize(0),
50 InstrItins(getInstrItineraryForCPU(GPU)) {
Matt Arsenaultf171cf22014-07-14 23:40:49 +000051 // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be
52 // enabled, but some instructions do not respect them and they run at the
53 // double precision rate, so don't enable by default.
54 //
55 // We want to be able to turn these off, but making this a subtarget feature
56 // for SI has the unhelpful behavior that it unsets everything else if you
57 // disable it.
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +000058
Matt Arsenaultf171cf22014-07-14 23:40:49 +000059 SmallString<256> FullFS("+promote-alloca,+fp64-denormals,");
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +000060 FullFS += FS;
61
62 ParseSubtargetFeatures(GPU, FullFS);
Tom Stellard2e59a452014-06-13 01:32:00 +000063
64 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
65 InstrInfo.reset(new R600InstrInfo(*this));
Matt Arsenaultf171cf22014-07-14 23:40:49 +000066
67 // FIXME: I don't think think Evergreen has any useful support for
68 // denormals, but should be checked. Should we issue a warning somewhere if
69 // someone tries to enable these?
70 FP32Denormals = false;
71 FP64Denormals = false;
Tom Stellard2e59a452014-06-13 01:32:00 +000072 } else {
73 InstrInfo.reset(new SIInstrInfo(*this));
74 }
Tom Stellard75aadc22012-12-11 21:25:42 +000075}
76
Matt Arsenaultd782d052014-06-27 17:57:00 +000077unsigned AMDGPUSubtarget::getStackEntrySize() const {
Tom Stellarda40f9712014-01-22 21:55:43 +000078 assert(getGeneration() <= NORTHERN_ISLANDS);
79 switch(getWavefrontSize()) {
80 case 16:
81 return 8;
82 case 32:
Matt Arsenaultd782d052014-06-27 17:57:00 +000083 return hasCaymanISA() ? 4 : 8;
Tom Stellarda40f9712014-01-22 21:55:43 +000084 case 64:
85 return 4;
86 default:
87 llvm_unreachable("Illegal wavefront size.");
88 }
89}