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Dylan McKay6d8078f2016-05-06 10:12:31 +00001//===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the AVR specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AVRTargetMachine.h"
15
16#include "llvm/CodeGen/Passes.h"
Matthias Braun31d19d42016-05-10 03:21:59 +000017#include "llvm/CodeGen/TargetPassConfig.h"
Dylan McKay6d8078f2016-05-06 10:12:31 +000018#include "llvm/IR/Module.h"
19#include "llvm/IR/LegacyPassManager.h"
20#include "llvm/Support/TargetRegistry.h"
21
22#include "AVRTargetObjectFile.h"
23#include "AVR.h"
24#include "MCTargetDesc/AVRMCTargetDesc.h"
25
26namespace llvm {
27
28/// Processes a CPU name.
Dylan McKayf1f1c012016-05-18 11:11:38 +000029static StringRef getCPU(StringRef CPU) {
Dylan McKay6d8078f2016-05-06 10:12:31 +000030 if (CPU.empty() || CPU == "generic") {
31 return "avr2";
32 }
33
34 return CPU;
35}
36
37AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
38 StringRef CPU, StringRef FS,
39 const TargetOptions &Options,
40 Reloc::Model RM, CodeModel::Model CM,
41 CodeGenOpt::Level OL)
42 : LLVMTargetMachine(
43 T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8", TT,
Dylan McKayf1f1c012016-05-18 11:11:38 +000044 getCPU(CPU), FS, Options, RM, CM, OL),
45 SubTarget(TT, getCPU(CPU), FS, *this) {
Dylan McKay6d8078f2016-05-06 10:12:31 +000046 this->TLOF = make_unique<AVRTargetObjectFile>();
47 initAsmInfo();
48}
49
50namespace {
51/// AVR Code Generator Pass Configuration Options.
52class AVRPassConfig : public TargetPassConfig {
53public:
54 AVRPassConfig(AVRTargetMachine *TM, PassManagerBase &PM)
55 : TargetPassConfig(TM, PM) {}
56
57 AVRTargetMachine &getAVRTargetMachine() const {
58 return getTM<AVRTargetMachine>();
59 }
60
61 bool addInstSelector() override;
62 void addPreSched2() override;
63 void addPreRegAlloc() override;
64 void addPreEmitPass() override;
65};
66} // namespace
67
68TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
69 return new AVRPassConfig(this, PM);
70}
Dylan McKayc498ba32015-11-12 09:26:44 +000071
72extern "C" void LLVMInitializeAVRTarget() {
Dylan McKay6d8078f2016-05-06 10:12:31 +000073 // Register the target.
74 RegisterTargetMachine<AVRTargetMachine> X(TheAVRTarget);
Dylan McKayc498ba32015-11-12 09:26:44 +000075}
Dylan McKay6d8078f2016-05-06 10:12:31 +000076
77const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
78 return &SubTarget;
79}
80
81const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const {
82 return &SubTarget;
83}
84
85//===----------------------------------------------------------------------===//
86// Pass Pipeline Configuration
87//===----------------------------------------------------------------------===//
88
89bool AVRPassConfig::addInstSelector() {
90 return false;
91}
92
93void AVRPassConfig::addPreRegAlloc() {
94}
95
96void AVRPassConfig::addPreSched2() { }
97
98void AVRPassConfig::addPreEmitPass() {
99}
100
101} // end of namespace llvm