Matt Arsenault | d0799df | 2016-01-30 05:10:59 +0000 | [diff] [blame] | 1 | ; RUN: opt -S -mtriple=amdgcn-unknown-unknown -amdgpu-annotate-kernel-features < %s | FileCheck -check-prefix=NOHSA -check-prefix=ALL %s |
Matt Arsenault | 3931948 | 2015-11-06 18:01:57 +0000 | [diff] [blame] | 2 | |
| 3 | declare i32 @llvm.r600.read.tgid.x() #0 |
| 4 | declare i32 @llvm.r600.read.tgid.y() #0 |
| 5 | declare i32 @llvm.r600.read.tgid.z() #0 |
| 6 | |
| 7 | declare i32 @llvm.r600.read.tidig.x() #0 |
| 8 | declare i32 @llvm.r600.read.tidig.y() #0 |
| 9 | declare i32 @llvm.r600.read.tidig.z() #0 |
| 10 | |
| 11 | declare i32 @llvm.r600.read.local.size.x() #0 |
| 12 | declare i32 @llvm.r600.read.local.size.y() #0 |
| 13 | declare i32 @llvm.r600.read.local.size.z() #0 |
| 14 | |
Matt Arsenault | 3931948 | 2015-11-06 18:01:57 +0000 | [diff] [blame] | 15 | ; ALL: define void @use_tgid_x(i32 addrspace(1)* %ptr) #1 { |
| 16 | define void @use_tgid_x(i32 addrspace(1)* %ptr) #1 { |
| 17 | %val = call i32 @llvm.r600.read.tgid.x() |
| 18 | store i32 %val, i32 addrspace(1)* %ptr |
| 19 | ret void |
| 20 | } |
| 21 | |
| 22 | ; ALL: define void @use_tgid_y(i32 addrspace(1)* %ptr) #2 { |
| 23 | define void @use_tgid_y(i32 addrspace(1)* %ptr) #1 { |
| 24 | %val = call i32 @llvm.r600.read.tgid.y() |
| 25 | store i32 %val, i32 addrspace(1)* %ptr |
| 26 | ret void |
| 27 | } |
| 28 | |
| 29 | ; ALL: define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #2 { |
| 30 | define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #1 { |
| 31 | %val0 = call i32 @llvm.r600.read.tgid.y() |
| 32 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 33 | %val1 = call i32 @llvm.r600.read.tgid.y() |
| 34 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 35 | ret void |
| 36 | } |
| 37 | |
| 38 | ; ALL: define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #2 { |
| 39 | define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #1 { |
| 40 | %val0 = call i32 @llvm.r600.read.tgid.x() |
| 41 | %val1 = call i32 @llvm.r600.read.tgid.y() |
| 42 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 43 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 44 | ret void |
| 45 | } |
| 46 | |
| 47 | ; ALL: define void @use_tgid_z(i32 addrspace(1)* %ptr) #3 { |
| 48 | define void @use_tgid_z(i32 addrspace(1)* %ptr) #1 { |
| 49 | %val = call i32 @llvm.r600.read.tgid.z() |
| 50 | store i32 %val, i32 addrspace(1)* %ptr |
| 51 | ret void |
| 52 | } |
| 53 | |
| 54 | ; ALL: define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #3 { |
| 55 | define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #1 { |
| 56 | %val0 = call i32 @llvm.r600.read.tgid.x() |
| 57 | %val1 = call i32 @llvm.r600.read.tgid.z() |
| 58 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 59 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 60 | ret void |
| 61 | } |
| 62 | |
| 63 | ; ALL: define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #4 { |
| 64 | define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #1 { |
| 65 | %val0 = call i32 @llvm.r600.read.tgid.y() |
| 66 | %val1 = call i32 @llvm.r600.read.tgid.z() |
| 67 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 68 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 69 | ret void |
| 70 | } |
| 71 | |
| 72 | ; ALL: define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #4 { |
| 73 | define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #1 { |
| 74 | %val0 = call i32 @llvm.r600.read.tgid.x() |
| 75 | %val1 = call i32 @llvm.r600.read.tgid.y() |
| 76 | %val2 = call i32 @llvm.r600.read.tgid.z() |
| 77 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 78 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 79 | store volatile i32 %val2, i32 addrspace(1)* %ptr |
| 80 | ret void |
| 81 | } |
| 82 | |
| 83 | ; ALL: define void @use_tidig_x(i32 addrspace(1)* %ptr) #1 { |
| 84 | define void @use_tidig_x(i32 addrspace(1)* %ptr) #1 { |
| 85 | %val = call i32 @llvm.r600.read.tidig.x() |
| 86 | store i32 %val, i32 addrspace(1)* %ptr |
| 87 | ret void |
| 88 | } |
| 89 | |
| 90 | ; ALL: define void @use_tidig_y(i32 addrspace(1)* %ptr) #5 { |
| 91 | define void @use_tidig_y(i32 addrspace(1)* %ptr) #1 { |
| 92 | %val = call i32 @llvm.r600.read.tidig.y() |
| 93 | store i32 %val, i32 addrspace(1)* %ptr |
| 94 | ret void |
| 95 | } |
| 96 | |
| 97 | ; ALL: define void @use_tidig_z(i32 addrspace(1)* %ptr) #6 { |
| 98 | define void @use_tidig_z(i32 addrspace(1)* %ptr) #1 { |
| 99 | %val = call i32 @llvm.r600.read.tidig.z() |
| 100 | store i32 %val, i32 addrspace(1)* %ptr |
| 101 | ret void |
| 102 | } |
| 103 | |
| 104 | ; ALL: define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { |
| 105 | define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { |
| 106 | %val0 = call i32 @llvm.r600.read.tidig.x() |
| 107 | %val1 = call i32 @llvm.r600.read.tgid.x() |
| 108 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 109 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 110 | ret void |
| 111 | } |
| 112 | |
| 113 | ; ALL: define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #7 { |
| 114 | define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #1 { |
| 115 | %val0 = call i32 @llvm.r600.read.tidig.y() |
| 116 | %val1 = call i32 @llvm.r600.read.tgid.y() |
| 117 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 118 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 119 | ret void |
| 120 | } |
| 121 | |
| 122 | ; ALL: define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #8 { |
| 123 | define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #1 { |
| 124 | %val0 = call i32 @llvm.r600.read.tidig.x() |
| 125 | %val1 = call i32 @llvm.r600.read.tidig.y() |
| 126 | %val2 = call i32 @llvm.r600.read.tidig.z() |
| 127 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 128 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 129 | store volatile i32 %val2, i32 addrspace(1)* %ptr |
| 130 | ret void |
| 131 | } |
| 132 | |
| 133 | ; ALL: define void @use_all_workitems(i32 addrspace(1)* %ptr) #9 { |
| 134 | define void @use_all_workitems(i32 addrspace(1)* %ptr) #1 { |
| 135 | %val0 = call i32 @llvm.r600.read.tidig.x() |
| 136 | %val1 = call i32 @llvm.r600.read.tidig.y() |
| 137 | %val2 = call i32 @llvm.r600.read.tidig.z() |
| 138 | %val3 = call i32 @llvm.r600.read.tgid.x() |
| 139 | %val4 = call i32 @llvm.r600.read.tgid.y() |
| 140 | %val5 = call i32 @llvm.r600.read.tgid.z() |
| 141 | store volatile i32 %val0, i32 addrspace(1)* %ptr |
| 142 | store volatile i32 %val1, i32 addrspace(1)* %ptr |
| 143 | store volatile i32 %val2, i32 addrspace(1)* %ptr |
| 144 | store volatile i32 %val3, i32 addrspace(1)* %ptr |
| 145 | store volatile i32 %val4, i32 addrspace(1)* %ptr |
| 146 | store volatile i32 %val5, i32 addrspace(1)* %ptr |
| 147 | ret void |
| 148 | } |
| 149 | |
| 150 | ; HSA: define void @use_get_local_size_x(i32 addrspace(1)* %ptr) #10 { |
| 151 | ; NOHSA: define void @use_get_local_size_x(i32 addrspace(1)* %ptr) #1 { |
| 152 | define void @use_get_local_size_x(i32 addrspace(1)* %ptr) #1 { |
| 153 | %val = call i32 @llvm.r600.read.local.size.x() |
| 154 | store i32 %val, i32 addrspace(1)* %ptr |
| 155 | ret void |
| 156 | } |
| 157 | |
| 158 | ; HSA: define void @use_get_local_size_y(i32 addrspace(1)* %ptr) #10 { |
| 159 | ; NOHSA: define void @use_get_local_size_y(i32 addrspace(1)* %ptr) #1 { |
| 160 | define void @use_get_local_size_y(i32 addrspace(1)* %ptr) #1 { |
| 161 | %val = call i32 @llvm.r600.read.local.size.y() |
| 162 | store i32 %val, i32 addrspace(1)* %ptr |
| 163 | ret void |
| 164 | } |
| 165 | |
| 166 | ; HSA: define void @use_get_local_size_z(i32 addrspace(1)* %ptr) #10 { |
| 167 | ; NOHSA: define void @use_get_local_size_z(i32 addrspace(1)* %ptr) #1 { |
| 168 | define void @use_get_local_size_z(i32 addrspace(1)* %ptr) #1 { |
| 169 | %val = call i32 @llvm.r600.read.local.size.z() |
| 170 | store i32 %val, i32 addrspace(1)* %ptr |
| 171 | ret void |
| 172 | } |
| 173 | |
| 174 | attributes #0 = { nounwind readnone } |
| 175 | attributes #1 = { nounwind } |
| 176 | |
| 177 | ; HSA: attributes #0 = { nounwind readnone } |
| 178 | ; HSA: attributes #1 = { nounwind } |
| 179 | ; HSA: attributes #2 = { nounwind "amdgpu-work-group-id-y" } |
| 180 | ; HSA: attributes #3 = { nounwind "amdgpu-work-group-id-z" } |
| 181 | ; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" } |
| 182 | ; HSA: attributes #5 = { nounwind "amdgpu-work-item-id-y" } |
| 183 | ; HSA: attributes #6 = { nounwind "amdgpu-work-item-id-z" } |
| 184 | ; HSA: attributes #7 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-item-id-y" } |
| 185 | ; HSA: attributes #8 = { nounwind "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" } |
| 186 | ; HSA: attributes #9 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" } |
| 187 | ; HSA: attributes #10 = { nounwind "amdgpu-dispatch-ptr" } |