| Tim Northover | e3d4236 | 2013-02-01 11:40:47 +0000 | [diff] [blame] | 1 | ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s | 
| Amara Emerson | f80f95f | 2013-10-31 09:32:11 +0000 | [diff] [blame^] | 2 | ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 3 |  | 
|  | 4 | @var32 = global i32 0 | 
|  | 5 | @var64 = global i64 0 | 
|  | 6 |  | 
|  | 7 | define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 8 | ; CHECK-LABEL: test_csel: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 9 |  | 
|  | 10 | %tst1 = icmp ugt i32 %lhs32, %rhs32 | 
|  | 11 | %val1 = select i1 %tst1, i32 42, i32 52 | 
|  | 12 | store i32 %val1, i32* @var32 | 
| Tim Northover | 1fdb076 | 2013-10-09 07:53:57 +0000 | [diff] [blame] | 13 | ; CHECK-DAG: movz [[W52:w[0-9]+]], #52 | 
|  | 14 | ; CHECK-DAG: movz [[W42:w[0-9]+]], #42 | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 15 | ; CHECK: csel {{w[0-9]+}}, [[W42]], [[W52]], hi | 
|  | 16 |  | 
|  | 17 | %rhs64 = sext i32 %rhs32 to i64 | 
|  | 18 | %tst2 = icmp sle i64 %lhs64, %rhs64 | 
|  | 19 | %val2 = select i1 %tst2, i64 %lhs64, i64 %rhs64 | 
|  | 20 | store i64 %val2, i64* @var64 | 
| Tim Northover | 1fdb076 | 2013-10-09 07:53:57 +0000 | [diff] [blame] | 21 | ; CHECK-DAG: cmp [[LHS:x[0-9]+]], [[RHS:w[0-9]+]], sxtw | 
|  | 22 | ; CHECK-DAG: sxtw [[EXT_RHS:x[0-9]+]], [[RHS]] | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 23 | ; CHECK: csel {{x[0-9]+}}, [[LHS]], [[EXT_RHS]], le | 
|  | 24 |  | 
|  | 25 | ret void | 
|  | 26 | ; CHECK: ret | 
|  | 27 | } | 
|  | 28 |  | 
|  | 29 | define void @test_floatcsel(float %lhs32, float %rhs32, double %lhs64, double %rhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 30 | ; CHECK-LABEL: test_floatcsel: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 31 |  | 
|  | 32 | %tst1 = fcmp one float %lhs32, %rhs32 | 
|  | 33 | ; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}} | 
| Amara Emerson | f80f95f | 2013-10-31 09:32:11 +0000 | [diff] [blame^] | 34 | ; CHECK-NOFP-NOT: fcmp | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 35 | %val1 = select i1 %tst1, i32 42, i32 52 | 
|  | 36 | store i32 %val1, i32* @var32 | 
|  | 37 | ; CHECK: movz [[W52:w[0-9]+]], #52 | 
|  | 38 | ; CHECK: movz [[W42:w[0-9]+]], #42 | 
|  | 39 | ; CHECK: csel [[MAYBETRUE:w[0-9]+]], [[W42]], [[W52]], mi | 
|  | 40 | ; CHECK: csel {{w[0-9]+}}, [[W42]], [[MAYBETRUE]], gt | 
|  | 41 |  | 
|  | 42 |  | 
|  | 43 | %tst2 = fcmp ueq double %lhs64, %rhs64 | 
|  | 44 | ; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}} | 
| Amara Emerson | f80f95f | 2013-10-31 09:32:11 +0000 | [diff] [blame^] | 45 | ; CHECK-NOFP-NOT: fcmp | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 46 | %val2 = select i1 %tst2, i64 9, i64 15 | 
|  | 47 | store i64 %val2, i64* @var64 | 
|  | 48 | ; CHECK: movz [[CONST15:x[0-9]+]], #15 | 
|  | 49 | ; CHECK: movz [[CONST9:x[0-9]+]], #9 | 
|  | 50 | ; CHECK: csel [[MAYBETRUE:x[0-9]+]], [[CONST9]], [[CONST15]], eq | 
|  | 51 | ; CHECK: csel {{x[0-9]+}}, [[CONST9]], [[MAYBETRUE]], vs | 
|  | 52 |  | 
|  | 53 | ret void | 
|  | 54 | ; CHECK: ret | 
|  | 55 | } | 
|  | 56 |  | 
|  | 57 |  | 
|  | 58 | define void @test_csinc(i32 %lhs32, i32 %rhs32, i64 %lhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 59 | ; CHECK-LABEL: test_csinc: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 60 |  | 
|  | 61 | ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls). | 
|  | 62 | %tst1 = icmp ugt i32 %lhs32, %rhs32 | 
|  | 63 | %inc1 = add i32 %rhs32, 1 | 
|  | 64 | %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32 | 
|  | 65 | store volatile i32 %val1, i32* @var32 | 
|  | 66 | ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]] | 
|  | 67 | ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls | 
|  | 68 |  | 
|  | 69 | %rhs2 = add i32 %rhs32, 42 | 
|  | 70 | %tst2 = icmp sle i32 %lhs32, %rhs2 | 
|  | 71 | %inc2 = add i32 %rhs32, 1 | 
|  | 72 | %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2 | 
|  | 73 | store volatile i32 %val2, i32* @var32 | 
|  | 74 | ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}} | 
|  | 75 | ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le | 
|  | 76 |  | 
|  | 77 | ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls). | 
|  | 78 | %rhs3 = sext i32 %rhs32 to i64 | 
|  | 79 | %tst3 = icmp ugt i64 %lhs64, %rhs3 | 
|  | 80 | %inc3 = add i64 %rhs3, 1 | 
|  | 81 | %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64 | 
|  | 82 | store volatile i64 %val3, i64* @var64 | 
|  | 83 | ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}} | 
|  | 84 | ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls | 
|  | 85 |  | 
|  | 86 | %rhs4 = zext i32 %rhs32 to i64 | 
|  | 87 | %tst4 = icmp sle i64 %lhs64, %rhs4 | 
|  | 88 | %inc4 = add i64 %rhs4, 1 | 
|  | 89 | %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4 | 
|  | 90 | store volatile i64 %val4, i64* @var64 | 
|  | 91 | ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}} | 
|  | 92 | ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le | 
|  | 93 |  | 
|  | 94 | ret void | 
|  | 95 | ; CHECK: ret | 
|  | 96 | } | 
|  | 97 |  | 
|  | 98 | define void @test_csinv(i32 %lhs32, i32 %rhs32, i64 %lhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 99 | ; CHECK-LABEL: test_csinv: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 100 |  | 
|  | 101 | ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls). | 
|  | 102 | %tst1 = icmp ugt i32 %lhs32, %rhs32 | 
|  | 103 | %inc1 = xor i32 -1, %rhs32 | 
|  | 104 | %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32 | 
|  | 105 | store volatile i32 %val1, i32* @var32 | 
|  | 106 | ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]] | 
|  | 107 | ; CHECK: csinv {{w[0-9]+}}, [[LHS]], [[RHS]], ls | 
|  | 108 |  | 
|  | 109 | %rhs2 = add i32 %rhs32, 42 | 
|  | 110 | %tst2 = icmp sle i32 %lhs32, %rhs2 | 
|  | 111 | %inc2 = xor i32 -1, %rhs32 | 
|  | 112 | %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2 | 
|  | 113 | store volatile i32 %val2, i32* @var32 | 
|  | 114 | ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}} | 
|  | 115 | ; CHECK: csinv {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le | 
|  | 116 |  | 
|  | 117 | ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls). | 
|  | 118 | %rhs3 = sext i32 %rhs32 to i64 | 
|  | 119 | %tst3 = icmp ugt i64 %lhs64, %rhs3 | 
|  | 120 | %inc3 = xor i64 -1, %rhs3 | 
|  | 121 | %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64 | 
|  | 122 | store volatile i64 %val3, i64* @var64 | 
|  | 123 | ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}} | 
|  | 124 | ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls | 
|  | 125 |  | 
|  | 126 | %rhs4 = zext i32 %rhs32 to i64 | 
|  | 127 | %tst4 = icmp sle i64 %lhs64, %rhs4 | 
|  | 128 | %inc4 = xor i64 -1, %rhs4 | 
|  | 129 | %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4 | 
|  | 130 | store volatile i64 %val4, i64* @var64 | 
|  | 131 | ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}} | 
|  | 132 | ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le | 
|  | 133 |  | 
|  | 134 | ret void | 
|  | 135 | ; CHECK: ret | 
|  | 136 | } | 
|  | 137 |  | 
|  | 138 | define void @test_csneg(i32 %lhs32, i32 %rhs32, i64 %lhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 139 | ; CHECK-LABEL: test_csneg: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 140 |  | 
|  | 141 | ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls). | 
|  | 142 | %tst1 = icmp ugt i32 %lhs32, %rhs32 | 
|  | 143 | %inc1 = sub i32 0, %rhs32 | 
|  | 144 | %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32 | 
|  | 145 | store volatile i32 %val1, i32* @var32 | 
|  | 146 | ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]] | 
|  | 147 | ; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls | 
|  | 148 |  | 
|  | 149 | %rhs2 = add i32 %rhs32, 42 | 
|  | 150 | %tst2 = icmp sle i32 %lhs32, %rhs2 | 
|  | 151 | %inc2 = sub i32 0, %rhs32 | 
|  | 152 | %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2 | 
|  | 153 | store volatile i32 %val2, i32* @var32 | 
|  | 154 | ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}} | 
|  | 155 | ; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le | 
|  | 156 |  | 
|  | 157 | ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls). | 
|  | 158 | %rhs3 = sext i32 %rhs32 to i64 | 
|  | 159 | %tst3 = icmp ugt i64 %lhs64, %rhs3 | 
|  | 160 | %inc3 = sub i64 0, %rhs3 | 
|  | 161 | %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64 | 
|  | 162 | store volatile i64 %val3, i64* @var64 | 
|  | 163 | ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}} | 
|  | 164 | ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls | 
|  | 165 |  | 
|  | 166 | %rhs4 = zext i32 %rhs32 to i64 | 
|  | 167 | %tst4 = icmp sle i64 %lhs64, %rhs4 | 
|  | 168 | %inc4 = sub i64 0, %rhs4 | 
|  | 169 | %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4 | 
|  | 170 | store volatile i64 %val4, i64* @var64 | 
|  | 171 | ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}} | 
|  | 172 | ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le | 
|  | 173 |  | 
|  | 174 | ret void | 
|  | 175 | ; CHECK: ret | 
|  | 176 | } | 
|  | 177 |  | 
|  | 178 | define void @test_cset(i32 %lhs, i32 %rhs, i64 %lhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 179 | ; CHECK-LABEL: test_cset: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 180 |  | 
|  | 181 | ; N.b. code is not optimal here (32-bit csinc would be better) but | 
|  | 182 | ; incoming DAG is too complex | 
|  | 183 | %tst1 = icmp eq i32 %lhs, %rhs | 
|  | 184 | %val1 = zext i1 %tst1 to i32 | 
|  | 185 | store i32 %val1, i32* @var32 | 
|  | 186 | ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}} | 
|  | 187 | ; CHECK: csinc {{w[0-9]+}}, wzr, wzr, ne | 
|  | 188 |  | 
|  | 189 | %rhs64 = sext i32 %rhs to i64 | 
|  | 190 | %tst2 = icmp ule i64 %lhs64, %rhs64 | 
|  | 191 | %val2 = zext i1 %tst2 to i64 | 
|  | 192 | store i64 %val2, i64* @var64 | 
|  | 193 | ; CHECK: csinc {{w[0-9]+}}, wzr, wzr, hi | 
|  | 194 |  | 
|  | 195 | ret void | 
|  | 196 | ; CHECK: ret | 
|  | 197 | } | 
|  | 198 |  | 
|  | 199 | define void @test_csetm(i32 %lhs, i32 %rhs, i64 %lhs64) { | 
| Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 200 | ; CHECK-LABEL: test_csetm: | 
| Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 201 |  | 
|  | 202 | %tst1 = icmp eq i32 %lhs, %rhs | 
|  | 203 | %val1 = sext i1 %tst1 to i32 | 
|  | 204 | store i32 %val1, i32* @var32 | 
|  | 205 | ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}} | 
|  | 206 | ; CHECK: csinv {{w[0-9]+}}, wzr, wzr, ne | 
|  | 207 |  | 
|  | 208 | %rhs64 = sext i32 %rhs to i64 | 
|  | 209 | %tst2 = icmp ule i64 %lhs64, %rhs64 | 
|  | 210 | %val2 = sext i1 %tst2 to i64 | 
|  | 211 | store i64 %val2, i64* @var64 | 
|  | 212 | ; CHECK: csinv {{x[0-9]+}}, xzr, xzr, hi | 
|  | 213 |  | 
|  | 214 | ret void | 
|  | 215 | ; CHECK: ret | 
|  | 216 | } |