| Mark Searles | e4f067e | 2017-12-19 19:26:23 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=amdgcn--amdhsa-amdgiz -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s |
| 2 | |
| 3 | ; Effectively, check that the compile finishes; in the case |
| 4 | ; of an infinite loop, llc toggles between merging 2 ST4s |
| 5 | ; ( MergeConsecutiveStores() ) and breaking the resulting ST8 |
| 6 | ; apart ( LegalizeStoreOps() ). |
| 7 | |
| 8 | target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5" |
| 9 | |
| 10 | ; GCN-LABEL: {{^}}_Z6brokenPd: |
| 11 | ; GCN: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}} |
| 12 | ; GCN: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}} |
| 13 | define amdgpu_kernel void @_Z6brokenPd(double* %arg) { |
| 14 | bb: |
| 15 | %tmp = alloca double, align 8, addrspace(5) |
| 16 | %tmp1 = alloca double, align 8, addrspace(5) |
| 17 | %tmp2 = load double, double* %arg, align 8 |
| 18 | br i1 1, label %bb6, label %bb4 |
| 19 | |
| 20 | bb3: ; No predecessors! |
| 21 | br label %bb4 |
| 22 | |
| 23 | bb4: ; preds = %bb3, %bb |
| 24 | %tmp5 = phi double addrspace(5)* [ %tmp1, %bb3 ], [ %tmp, %bb ] |
| 25 | store double %tmp2, double addrspace(5)* %tmp5, align 8 |
| 26 | br label %bb6 |
| 27 | |
| 28 | bb6: ; preds = %bb4, %bb |
| 29 | %tmp7 = phi double [ 0x7FF8123000000000, %bb4 ], [ 0x7FF8000000000000, %bb ] |
| 30 | store double %tmp7, double* %arg, align 8 |
| 31 | ret void |
| 32 | } |