| Krzysztof Parzyszek | 046090d | 2018-03-12 14:01:28 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon < %s | FileCheck %s |
| 2 | ; REQUIRES: asserts |
| 3 | ; CHECK: f0: |
| 4 | |
| 5 | target triple = "hexagon" |
| 6 | |
| 7 | ; Function Attrs: nounwind readonly |
| 8 | define void @f0(i16* nocapture %a0) #0 { |
| 9 | b0: |
| 10 | %v0 = alloca [16 x i16], align 8 |
| 11 | %v1 = load i16, i16* %a0, align 2, !tbaa !0 |
| 12 | %v2 = getelementptr [16 x i16], [16 x i16]* %v0, i32 0, i32 5 |
| 13 | br label %b12 |
| 14 | |
| 15 | b1: ; preds = %b11 |
| 16 | %v3 = icmp slt i16 %v1, 46 |
| 17 | br i1 %v3, label %b3, label %b2 |
| 18 | |
| 19 | b2: ; preds = %b1 |
| 20 | br label %b5 |
| 21 | |
| 22 | b3: ; preds = %b1 |
| 23 | br label %b4 |
| 24 | |
| 25 | b4: ; preds = %b4, %b3 |
| 26 | %v4 = phi i32 [ %v6, %b4 ], [ 0, %b3 ] |
| 27 | %v5 = getelementptr inbounds [16 x i16], [16 x i16]* %v0, i32 0, i32 %v4 |
| 28 | store i16 1, i16* %v5, align 2, !tbaa !0 |
| 29 | %v6 = add nsw i32 %v4, 1 |
| 30 | %v7 = icmp eq i32 %v6, 16 |
| 31 | br i1 %v7, label %b8, label %b4 |
| 32 | |
| 33 | b5: ; preds = %b7, %b2 |
| 34 | %v8 = phi i32 [ %v12, %b7 ], [ 0, %b2 ] |
| 35 | %v9 = getelementptr inbounds [16 x i16], [16 x i16]* %v0, i32 0, i32 %v8 |
| 36 | %v10 = load i16, i16* %v9, align 2, !tbaa !0 |
| 37 | %v11 = icmp slt i16 %v10, 13 |
| 38 | br i1 %v11, label %b6, label %b7 |
| 39 | |
| 40 | b6: ; preds = %b5 |
| 41 | store i16 1, i16* %v9, align 2, !tbaa !0 |
| 42 | br label %b7 |
| 43 | |
| 44 | b7: ; preds = %b6, %b5 |
| 45 | %v12 = add nsw i32 %v8, 1 |
| 46 | %v13 = icmp eq i32 %v12, 16 |
| 47 | br i1 %v13, label %b9, label %b5 |
| 48 | |
| 49 | b8: ; preds = %b4 |
| 50 | br label %b10 |
| 51 | |
| 52 | b9: ; preds = %b7 |
| 53 | br label %b10 |
| 54 | |
| 55 | b10: ; preds = %b11, %b9, %b8 |
| 56 | ret void |
| 57 | |
| 58 | b11: ; preds = %b12 |
| 59 | %v14 = add <2 x i32> %v31, %v32 |
| 60 | %v15 = extractelement <2 x i32> %v14, i32 0 |
| 61 | %v16 = extractelement <2 x i32> %v14, i32 1 |
| 62 | %v17 = add i32 %v16, %v15 |
| 63 | %v18 = icmp eq i32 %v17, 1 |
| 64 | br i1 %v18, label %b1, label %b10 |
| 65 | |
| 66 | b12: ; preds = %b12, %b0 |
| 67 | %v19 = phi <2 x i32> [ zeroinitializer, %b0 ], [ %v31, %b12 ] |
| 68 | %v20 = phi <2 x i32> [ zeroinitializer, %b0 ], [ %v32, %b12 ] |
| 69 | %v21 = phi i16* [ %v2, %b0 ], [ %v35, %b12 ] |
| 70 | %v22 = phi i32 [ 0, %b0 ], [ %v33, %b12 ] |
| 71 | %v23 = bitcast i16* %v21 to <4 x i16>* |
| 72 | %v24 = load <4 x i16>, <4 x i16>* %v23, align 2 |
| 73 | %v25 = icmp sgt <4 x i16> %v24, <i16 11, i16 11, i16 11, i16 11> |
| 74 | %v26 = zext <4 x i1> %v25 to <4 x i16> |
| 75 | %v27 = shufflevector <4 x i16> %v26, <4 x i16> undef, <2 x i32> <i32 2, i32 3> |
| 76 | %v28 = shufflevector <4 x i16> %v26, <4 x i16> undef, <2 x i32> <i32 0, i32 1> |
| 77 | %v29 = zext <2 x i16> %v28 to <2 x i32> |
| 78 | %v30 = zext <2 x i16> %v27 to <2 x i32> |
| 79 | %v31 = add <2 x i32> %v19, %v29 |
| 80 | %v32 = add <2 x i32> %v20, %v30 |
| 81 | %v33 = add nsw i32 %v22, 4 |
| 82 | %v34 = icmp slt i32 %v22, 4 |
| 83 | %v35 = getelementptr i16, i16* %v21, i32 4 |
| 84 | br i1 %v34, label %b12, label %b11 |
| 85 | } |
| 86 | |
| 87 | attributes #0 = { nounwind readonly "target-cpu"="hexagonv55" } |
| 88 | |
| 89 | !0 = !{!1, !1, i64 0} |
| 90 | !1 = !{!"short", !2} |
| 91 | !2 = !{!"omnipotent char", !3} |
| 92 | !3 = !{!"Simple C/C++ TBAA"} |