| Sirish Pande | f8e5e3c | 2012-05-03 21:52:53 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s |
| 2 | ; Check that we generate dual stores in one packet in V4 |
| 3 | |
| 4 | ; CHECK: memw(r{{[0-9]+}} + #{{[0-9]+}}) = r{{[0-9]+}} |
| 5 | ; CHECK-NEXT: memw(r{{[0-9]+}} + #{{[0-9]+}}) = r{{[0-9]+}} |
| 6 | ; CHECK-NEXT: } |
| 7 | |
| 8 | @Reg = global i32 0, align 4 |
| 9 | define i32 @main() nounwind { |
| 10 | entry: |
| 11 | %number= alloca i32, align 4 |
| 12 | store i32 500000, i32* %number, align 4 |
| 13 | %number1= alloca i32, align 4 |
| 14 | store i32 100000, i32* %number1, align 4 |
| 15 | ret i32 0 |
| 16 | } |
| 17 | |