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gerrit-public.fairphone.software / toolchain / llvm-project / f8f86ab176c349a2ca2c7656d26b1d546438010b / . / llvm / lib / Target / X86 / InstPrinter / X86InstComments.cpp
blob: 247b969cb0717d291f86dafc533fad155fe8b78a [file] [log] [blame]
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]1//===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This defines functionality used to emit comments about X86 instructions to
11// an output stream for -fverbose-asm.
12//
13//===----------------------------------------------------------------------===//
14
15#include "X86InstComments.h"
16#include "MCTargetDesc/X86MCTargetDesc.h"
17#include "Utils/X86ShuffleDecode.h"
18#include "llvm/MC/MCInst.h"
19#include "llvm/CodeGen/MachineValueType.h"
20#include "llvm/Support/raw_ostream.h"
21
22using namespace llvm;
23
24/// \brief Extracts the src/dst types for a given zero extension instruction.
25/// \note While the number of elements in DstVT type correct, the
26/// number in the SrcVT type is expanded to fill the src xmm register and the
27/// upper elements may not be included in the dst xmm/ymm register.
28static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT) {
29 switch (MI->getOpcode()) {
30 default:
31 llvm_unreachable("Unknown zero extension instruction");
32 // i8 zero extension
33 case X86::PMOVZXBWrm:
34 case X86::PMOVZXBWrr:
35 case X86::VPMOVZXBWrm:
36 case X86::VPMOVZXBWrr:
37 SrcVT = MVT::v16i8;
38 DstVT = MVT::v8i16;
39 break;
40 case X86::VPMOVZXBWYrm:
41 case X86::VPMOVZXBWYrr:
42 SrcVT = MVT::v16i8;
43 DstVT = MVT::v16i16;
44 break;
45 case X86::PMOVZXBDrm:
46 case X86::PMOVZXBDrr:
47 case X86::VPMOVZXBDrm:
48 case X86::VPMOVZXBDrr:
49 SrcVT = MVT::v16i8;
50 DstVT = MVT::v4i32;
51 break;
52 case X86::VPMOVZXBDYrm:
53 case X86::VPMOVZXBDYrr:
54 SrcVT = MVT::v16i8;
55 DstVT = MVT::v8i32;
56 break;
57 case X86::PMOVZXBQrm:
58 case X86::PMOVZXBQrr:
59 case X86::VPMOVZXBQrm:
60 case X86::VPMOVZXBQrr:
61 SrcVT = MVT::v16i8;
62 DstVT = MVT::v2i64;
63 break;
64 case X86::VPMOVZXBQYrm:
65 case X86::VPMOVZXBQYrr:
66 SrcVT = MVT::v16i8;
67 DstVT = MVT::v4i64;
68 break;
69 // i16 zero extension
70 case X86::PMOVZXWDrm:
71 case X86::PMOVZXWDrr:
72 case X86::VPMOVZXWDrm:
73 case X86::VPMOVZXWDrr:
74 SrcVT = MVT::v8i16;
75 DstVT = MVT::v4i32;
76 break;
77 case X86::VPMOVZXWDYrm:
78 case X86::VPMOVZXWDYrr:
79 SrcVT = MVT::v8i16;
80 DstVT = MVT::v8i32;
81 break;
82 case X86::PMOVZXWQrm:
83 case X86::PMOVZXWQrr:
84 case X86::VPMOVZXWQrm:
85 case X86::VPMOVZXWQrr:
86 SrcVT = MVT::v8i16;
87 DstVT = MVT::v2i64;
88 break;
89 case X86::VPMOVZXWQYrm:
90 case X86::VPMOVZXWQYrr:
91 SrcVT = MVT::v8i16;
92 DstVT = MVT::v4i64;
93 break;
94 // i32 zero extension
95 case X86::PMOVZXDQrm:
96 case X86::PMOVZXDQrr:
97 case X86::VPMOVZXDQrm:
98 case X86::VPMOVZXDQrr:
99 SrcVT = MVT::v4i32;
100 DstVT = MVT::v2i64;
101 break;
102 case X86::VPMOVZXDQYrm:
103 case X86::VPMOVZXDQYrr:
104 SrcVT = MVT::v4i32;
105 DstVT = MVT::v4i64;
106 break;
107 }
108}
109
110//===----------------------------------------------------------------------===//
111// Top Level Entrypoint
112//===----------------------------------------------------------------------===//
113
114/// EmitAnyX86InstComments - This function decodes x86 instructions and prints
115/// newline terminated strings to the specified string if desired. This
116/// information is shown in disassembly dumps when verbose assembly is enabled.
117bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
118 const char *(*getRegName)(unsigned)) {
119 // If this is a shuffle operation, the switch should fill in this state.
120 SmallVector<int, 8> ShuffleMask;
121 const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
122
123 switch (MI->getOpcode()) {
124 default:
125 // Not an instruction for which we can decode comments.
126 return false;
127
128 case X86::BLENDPDrri:
129 case X86::VBLENDPDrri:
130 Src2Name = getRegName(MI->getOperand(2).getReg());
131 // FALL THROUGH.
132 case X86::BLENDPDrmi:
133 case X86::VBLENDPDrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]134 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]135 DecodeBLENDMask(MVT::v2f64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]136 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]137 ShuffleMask);
138 Src1Name = getRegName(MI->getOperand(1).getReg());
139 DestName = getRegName(MI->getOperand(0).getReg());
140 break;
141 case X86::VBLENDPDYrri:
142 Src2Name = getRegName(MI->getOperand(2).getReg());
143 // FALL THROUGH.
144 case X86::VBLENDPDYrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]145 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]146 DecodeBLENDMask(MVT::v4f64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]147 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]148 ShuffleMask);
149 Src1Name = getRegName(MI->getOperand(1).getReg());
150 DestName = getRegName(MI->getOperand(0).getReg());
151 break;
152
153 case X86::BLENDPSrri:
154 case X86::VBLENDPSrri:
155 Src2Name = getRegName(MI->getOperand(2).getReg());
156 // FALL THROUGH.
157 case X86::BLENDPSrmi:
158 case X86::VBLENDPSrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]159 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]160 DecodeBLENDMask(MVT::v4f32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]161 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]162 ShuffleMask);
163 Src1Name = getRegName(MI->getOperand(1).getReg());
164 DestName = getRegName(MI->getOperand(0).getReg());
165 break;
166 case X86::VBLENDPSYrri:
167 Src2Name = getRegName(MI->getOperand(2).getReg());
168 // FALL THROUGH.
169 case X86::VBLENDPSYrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]170 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]171 DecodeBLENDMask(MVT::v8f32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]172 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]173 ShuffleMask);
174 Src1Name = getRegName(MI->getOperand(1).getReg());
175 DestName = getRegName(MI->getOperand(0).getReg());
176 break;
177
178 case X86::PBLENDWrri:
179 case X86::VPBLENDWrri:
180 Src2Name = getRegName(MI->getOperand(2).getReg());
181 // FALL THROUGH.
182 case X86::PBLENDWrmi:
183 case X86::VPBLENDWrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]184 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]185 DecodeBLENDMask(MVT::v8i16,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]186 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]187 ShuffleMask);
188 Src1Name = getRegName(MI->getOperand(1).getReg());
189 DestName = getRegName(MI->getOperand(0).getReg());
190 break;
191 case X86::VPBLENDWYrri:
192 Src2Name = getRegName(MI->getOperand(2).getReg());
193 // FALL THROUGH.
194 case X86::VPBLENDWYrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]195 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]196 DecodeBLENDMask(MVT::v16i16,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]197 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]198 ShuffleMask);
199 Src1Name = getRegName(MI->getOperand(1).getReg());
200 DestName = getRegName(MI->getOperand(0).getReg());
201 break;
202
203 case X86::VPBLENDDrri:
204 Src2Name = getRegName(MI->getOperand(2).getReg());
205 // FALL THROUGH.
206 case X86::VPBLENDDrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]207 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]208 DecodeBLENDMask(MVT::v4i32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]209 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]210 ShuffleMask);
211 Src1Name = getRegName(MI->getOperand(1).getReg());
212 DestName = getRegName(MI->getOperand(0).getReg());
213 break;
214
215 case X86::VPBLENDDYrri:
216 Src2Name = getRegName(MI->getOperand(2).getReg());
217 // FALL THROUGH.
218 case X86::VPBLENDDYrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]219 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]220 DecodeBLENDMask(MVT::v8i32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]221 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]222 ShuffleMask);
223 Src1Name = getRegName(MI->getOperand(1).getReg());
224 DestName = getRegName(MI->getOperand(0).getReg());
225 break;
226
227 case X86::INSERTPSrr:
228 case X86::VINSERTPSrr:
229 Src2Name = getRegName(MI->getOperand(2).getReg());
230 // FALL THROUGH.
231 case X86::INSERTPSrm:
232 case X86::VINSERTPSrm:
233 DestName = getRegName(MI->getOperand(0).getReg());
234 Src1Name = getRegName(MI->getOperand(1).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]235 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
236 DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]237 ShuffleMask);
238 break;
239
240 case X86::MOVLHPSrr:
241 case X86::VMOVLHPSrr:
242 Src2Name = getRegName(MI->getOperand(2).getReg());
243 Src1Name = getRegName(MI->getOperand(1).getReg());
244 DestName = getRegName(MI->getOperand(0).getReg());
245 DecodeMOVLHPSMask(2, ShuffleMask);
246 break;
247
248 case X86::MOVHLPSrr:
249 case X86::VMOVHLPSrr:
250 Src2Name = getRegName(MI->getOperand(2).getReg());
251 Src1Name = getRegName(MI->getOperand(1).getReg());
252 DestName = getRegName(MI->getOperand(0).getReg());
253 DecodeMOVHLPSMask(2, ShuffleMask);
254 break;
255
256 case X86::MOVSLDUPrr:
257 case X86::VMOVSLDUPrr:
258 Src1Name = getRegName(MI->getOperand(1).getReg());
259 // FALL THROUGH.
260 case X86::MOVSLDUPrm:
261 case X86::VMOVSLDUPrm:
262 DestName = getRegName(MI->getOperand(0).getReg());
263 DecodeMOVSLDUPMask(MVT::v4f32, ShuffleMask);
264 break;
265
266 case X86::VMOVSHDUPYrr:
267 Src1Name = getRegName(MI->getOperand(1).getReg());
268 // FALL THROUGH.
269 case X86::VMOVSHDUPYrm:
270 DestName = getRegName(MI->getOperand(0).getReg());
271 DecodeMOVSHDUPMask(MVT::v8f32, ShuffleMask);
272 break;
273
274 case X86::VMOVSLDUPYrr:
275 Src1Name = getRegName(MI->getOperand(1).getReg());
276 // FALL THROUGH.
277 case X86::VMOVSLDUPYrm:
278 DestName = getRegName(MI->getOperand(0).getReg());
279 DecodeMOVSLDUPMask(MVT::v8f32, ShuffleMask);
280 break;
281
282 case X86::MOVSHDUPrr:
283 case X86::VMOVSHDUPrr:
284 Src1Name = getRegName(MI->getOperand(1).getReg());
285 // FALL THROUGH.
286 case X86::MOVSHDUPrm:
287 case X86::VMOVSHDUPrm:
288 DestName = getRegName(MI->getOperand(0).getReg());
289 DecodeMOVSHDUPMask(MVT::v4f32, ShuffleMask);
290 break;
291
292 case X86::VMOVDDUPYrr:
293 Src1Name = getRegName(MI->getOperand(1).getReg());
294 // FALL THROUGH.
295 case X86::VMOVDDUPYrm:
296 DestName = getRegName(MI->getOperand(0).getReg());
297 DecodeMOVDDUPMask(MVT::v4f64, ShuffleMask);
298 break;
299
300 case X86::MOVDDUPrr:
301 case X86::VMOVDDUPrr:
302 Src1Name = getRegName(MI->getOperand(1).getReg());
303 // FALL THROUGH.
304 case X86::MOVDDUPrm:
305 case X86::VMOVDDUPrm:
306 DestName = getRegName(MI->getOperand(0).getReg());
307 DecodeMOVDDUPMask(MVT::v2f64, ShuffleMask);
308 break;
309
310 case X86::PSLLDQri:
311 case X86::VPSLLDQri:
312 Src1Name = getRegName(MI->getOperand(1).getReg());
313 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]314 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]315 DecodePSLLDQMask(MVT::v16i8,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]316 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]317 ShuffleMask);
318 break;
319
320 case X86::VPSLLDQYri:
321 Src1Name = getRegName(MI->getOperand(1).getReg());
322 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]323 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]324 DecodePSLLDQMask(MVT::v32i8,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]325 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]326 ShuffleMask);
327 break;
328
329 case X86::PSRLDQri:
330 case X86::VPSRLDQri:
331 Src1Name = getRegName(MI->getOperand(1).getReg());
332 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]333 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]334 DecodePSRLDQMask(MVT::v16i8,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]335 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]336 ShuffleMask);
337 break;
338
339 case X86::VPSRLDQYri:
340 Src1Name = getRegName(MI->getOperand(1).getReg());
341 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]342 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]343 DecodePSRLDQMask(MVT::v32i8,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]344 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]345 ShuffleMask);
346 break;
347
348 case X86::PALIGNR128rr:
349 case X86::VPALIGNR128rr:
350 Src1Name = getRegName(MI->getOperand(2).getReg());
351 // FALL THROUGH.
352 case X86::PALIGNR128rm:
353 case X86::VPALIGNR128rm:
354 Src2Name = getRegName(MI->getOperand(1).getReg());
355 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]356 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]357 DecodePALIGNRMask(MVT::v16i8,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]358 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]359 ShuffleMask);
360 break;
361 case X86::VPALIGNR256rr:
362 Src1Name = getRegName(MI->getOperand(2).getReg());
363 // FALL THROUGH.
364 case X86::VPALIGNR256rm:
365 Src2Name = getRegName(MI->getOperand(1).getReg());
366 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]367 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]368 DecodePALIGNRMask(MVT::v32i8,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]369 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]370 ShuffleMask);
371 break;
372
373 case X86::PSHUFDri:
374 case X86::VPSHUFDri:
375 Src1Name = getRegName(MI->getOperand(1).getReg());
376 // FALL THROUGH.
377 case X86::PSHUFDmi:
378 case X86::VPSHUFDmi:
379 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]380 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]381 DecodePSHUFMask(MVT::v4i32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]382 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]383 ShuffleMask);
384 break;
385 case X86::VPSHUFDYri:
386 Src1Name = getRegName(MI->getOperand(1).getReg());
387 // FALL THROUGH.
388 case X86::VPSHUFDYmi:
389 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]390 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]391 DecodePSHUFMask(MVT::v8i32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]392 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]393 ShuffleMask);
394 break;
395
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]396 case X86::PSHUFHWri:
397 case X86::VPSHUFHWri:
398 Src1Name = getRegName(MI->getOperand(1).getReg());
399 // FALL THROUGH.
400 case X86::PSHUFHWmi:
401 case X86::VPSHUFHWmi:
402 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]403 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]404 DecodePSHUFHWMask(MVT::v8i16,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]405 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]406 ShuffleMask);
407 break;
408 case X86::VPSHUFHWYri:
409 Src1Name = getRegName(MI->getOperand(1).getReg());
410 // FALL THROUGH.
411 case X86::VPSHUFHWYmi:
412 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]413 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]414 DecodePSHUFHWMask(MVT::v16i16,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]415 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]416 ShuffleMask);
417 break;
418 case X86::PSHUFLWri:
419 case X86::VPSHUFLWri:
420 Src1Name = getRegName(MI->getOperand(1).getReg());
421 // FALL THROUGH.
422 case X86::PSHUFLWmi:
423 case X86::VPSHUFLWmi:
424 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]425 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]426 DecodePSHUFLWMask(MVT::v8i16,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]427 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]428 ShuffleMask);
429 break;
430 case X86::VPSHUFLWYri:
431 Src1Name = getRegName(MI->getOperand(1).getReg());
432 // FALL THROUGH.
433 case X86::VPSHUFLWYmi:
434 DestName = getRegName(MI->getOperand(0).getReg());
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]435 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]436 DecodePSHUFLWMask(MVT::v16i16,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]437 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]438 ShuffleMask);
439 break;
440
Simon Pilgrimf8f86ab2015-09-13 11:28:45 +0000[diff] [blame^]441 case X86::MMX_PSHUFWri:
442 Src1Name = getRegName(MI->getOperand(1).getReg());
443 // FALL THROUGH.
444 case X86::MMX_PSHUFWmi:
445 DestName = getRegName(MI->getOperand(0).getReg());
446 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
447 DecodePSHUFMask(MVT::v4i16,
448 MI->getOperand(MI->getNumOperands() - 1).getImm(),
449 ShuffleMask);
450 break;
451
452 case X86::PSWAPDrr:
453 Src1Name = getRegName(MI->getOperand(1).getReg());
454 // FALL THROUGH.
455 case X86::PSWAPDrm:
456 DestName = getRegName(MI->getOperand(0).getReg());
457 DecodePSWAPMask(MVT::v2i32, ShuffleMask);
458 break;
459
460 case X86::MMX_PUNPCKHBWirr:
461 Src2Name = getRegName(MI->getOperand(2).getReg());
462 case X86::MMX_PUNPCKHBWirm:
463 Src1Name = getRegName(MI->getOperand(1).getReg());
464 DestName = getRegName(MI->getOperand(0).getReg());
465 DecodeUNPCKHMask(MVT::v8i8, ShuffleMask);
466 break;
467 case X86::MMX_PUNPCKHWDirr:
468 Src2Name = getRegName(MI->getOperand(2).getReg());
469 case X86::MMX_PUNPCKHWDirm:
470 Src1Name = getRegName(MI->getOperand(1).getReg());
471 DestName = getRegName(MI->getOperand(0).getReg());
472 DecodeUNPCKHMask(MVT::v4i16, ShuffleMask);
473 break;
474 case X86::MMX_PUNPCKHDQirr:
475 Src2Name = getRegName(MI->getOperand(2).getReg());
476 case X86::MMX_PUNPCKHDQirm:
477 Src1Name = getRegName(MI->getOperand(1).getReg());
478 DestName = getRegName(MI->getOperand(0).getReg());
479 DecodeUNPCKHMask(MVT::v2i32, ShuffleMask);
480 break;
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]481 case X86::PUNPCKHBWrr:
482 case X86::VPUNPCKHBWrr:
483 Src2Name = getRegName(MI->getOperand(2).getReg());
484 // FALL THROUGH.
485 case X86::PUNPCKHBWrm:
486 case X86::VPUNPCKHBWrm:
487 Src1Name = getRegName(MI->getOperand(1).getReg());
488 DestName = getRegName(MI->getOperand(0).getReg());
489 DecodeUNPCKHMask(MVT::v16i8, ShuffleMask);
490 break;
491 case X86::VPUNPCKHBWYrr:
492 Src2Name = getRegName(MI->getOperand(2).getReg());
493 // FALL THROUGH.
494 case X86::VPUNPCKHBWYrm:
495 Src1Name = getRegName(MI->getOperand(1).getReg());
496 DestName = getRegName(MI->getOperand(0).getReg());
497 DecodeUNPCKHMask(MVT::v32i8, ShuffleMask);
498 break;
499 case X86::PUNPCKHWDrr:
500 case X86::VPUNPCKHWDrr:
501 Src2Name = getRegName(MI->getOperand(2).getReg());
502 // FALL THROUGH.
503 case X86::PUNPCKHWDrm:
504 case X86::VPUNPCKHWDrm:
505 Src1Name = getRegName(MI->getOperand(1).getReg());
506 DestName = getRegName(MI->getOperand(0).getReg());
507 DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
508 break;
509 case X86::VPUNPCKHWDYrr:
510 Src2Name = getRegName(MI->getOperand(2).getReg());
511 // FALL THROUGH.
512 case X86::VPUNPCKHWDYrm:
513 Src1Name = getRegName(MI->getOperand(1).getReg());
514 DestName = getRegName(MI->getOperand(0).getReg());
515 DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
516 break;
517 case X86::PUNPCKHDQrr:
518 case X86::VPUNPCKHDQrr:
519 Src2Name = getRegName(MI->getOperand(2).getReg());
520 // FALL THROUGH.
521 case X86::PUNPCKHDQrm:
522 case X86::VPUNPCKHDQrm:
523 Src1Name = getRegName(MI->getOperand(1).getReg());
524 DestName = getRegName(MI->getOperand(0).getReg());
525 DecodeUNPCKHMask(MVT::v4i32, ShuffleMask);
526 break;
527 case X86::VPUNPCKHDQYrr:
528 Src2Name = getRegName(MI->getOperand(2).getReg());
529 // FALL THROUGH.
530 case X86::VPUNPCKHDQYrm:
531 Src1Name = getRegName(MI->getOperand(1).getReg());
532 DestName = getRegName(MI->getOperand(0).getReg());
533 DecodeUNPCKHMask(MVT::v8i32, ShuffleMask);
534 break;
535 case X86::VPUNPCKHDQZrr:
536 Src2Name = getRegName(MI->getOperand(2).getReg());
537 // FALL THROUGH.
538 case X86::VPUNPCKHDQZrm:
539 Src1Name = getRegName(MI->getOperand(1).getReg());
540 DestName = getRegName(MI->getOperand(0).getReg());
541 DecodeUNPCKHMask(MVT::v16i32, ShuffleMask);
542 break;
543 case X86::PUNPCKHQDQrr:
544 case X86::VPUNPCKHQDQrr:
545 Src2Name = getRegName(MI->getOperand(2).getReg());
546 // FALL THROUGH.
547 case X86::PUNPCKHQDQrm:
548 case X86::VPUNPCKHQDQrm:
549 Src1Name = getRegName(MI->getOperand(1).getReg());
550 DestName = getRegName(MI->getOperand(0).getReg());
551 DecodeUNPCKHMask(MVT::v2i64, ShuffleMask);
552 break;
553 case X86::VPUNPCKHQDQYrr:
554 Src2Name = getRegName(MI->getOperand(2).getReg());
555 // FALL THROUGH.
556 case X86::VPUNPCKHQDQYrm:
557 Src1Name = getRegName(MI->getOperand(1).getReg());
558 DestName = getRegName(MI->getOperand(0).getReg());
559 DecodeUNPCKHMask(MVT::v4i64, ShuffleMask);
560 break;
561 case X86::VPUNPCKHQDQZrr:
562 Src2Name = getRegName(MI->getOperand(2).getReg());
563 // FALL THROUGH.
564 case X86::VPUNPCKHQDQZrm:
565 Src1Name = getRegName(MI->getOperand(1).getReg());
566 DestName = getRegName(MI->getOperand(0).getReg());
567 DecodeUNPCKHMask(MVT::v8i64, ShuffleMask);
568 break;
569
Simon Pilgrimf8f86ab2015-09-13 11:28:45 +0000[diff] [blame^]570 case X86::MMX_PUNPCKLBWirr:
571 Src2Name = getRegName(MI->getOperand(2).getReg());
572 case X86::MMX_PUNPCKLBWirm:
573 Src1Name = getRegName(MI->getOperand(1).getReg());
574 DestName = getRegName(MI->getOperand(0).getReg());
575 DecodeUNPCKLMask(MVT::v8i8, ShuffleMask);
576 break;
577 case X86::MMX_PUNPCKLWDirr:
578 Src2Name = getRegName(MI->getOperand(2).getReg());
579 case X86::MMX_PUNPCKLWDirm:
580 Src1Name = getRegName(MI->getOperand(1).getReg());
581 DestName = getRegName(MI->getOperand(0).getReg());
582 DecodeUNPCKLMask(MVT::v4i16, ShuffleMask);
583 break;
584 case X86::MMX_PUNPCKLDQirr:
585 Src2Name = getRegName(MI->getOperand(2).getReg());
586 case X86::MMX_PUNPCKLDQirm:
587 Src1Name = getRegName(MI->getOperand(1).getReg());
588 DestName = getRegName(MI->getOperand(0).getReg());
589 DecodeUNPCKLMask(MVT::v2i32, ShuffleMask);
590 break;
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]591 case X86::PUNPCKLBWrr:
592 case X86::VPUNPCKLBWrr:
593 Src2Name = getRegName(MI->getOperand(2).getReg());
594 // FALL THROUGH.
595 case X86::PUNPCKLBWrm:
596 case X86::VPUNPCKLBWrm:
597 Src1Name = getRegName(MI->getOperand(1).getReg());
598 DestName = getRegName(MI->getOperand(0).getReg());
599 DecodeUNPCKLMask(MVT::v16i8, ShuffleMask);
600 break;
601 case X86::VPUNPCKLBWYrr:
602 Src2Name = getRegName(MI->getOperand(2).getReg());
603 // FALL THROUGH.
604 case X86::VPUNPCKLBWYrm:
605 Src1Name = getRegName(MI->getOperand(1).getReg());
606 DestName = getRegName(MI->getOperand(0).getReg());
607 DecodeUNPCKLMask(MVT::v32i8, ShuffleMask);
608 break;
609 case X86::PUNPCKLWDrr:
610 case X86::VPUNPCKLWDrr:
611 Src2Name = getRegName(MI->getOperand(2).getReg());
612 // FALL THROUGH.
613 case X86::PUNPCKLWDrm:
614 case X86::VPUNPCKLWDrm:
615 Src1Name = getRegName(MI->getOperand(1).getReg());
616 DestName = getRegName(MI->getOperand(0).getReg());
617 DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
618 break;
619 case X86::VPUNPCKLWDYrr:
620 Src2Name = getRegName(MI->getOperand(2).getReg());
621 // FALL THROUGH.
622 case X86::VPUNPCKLWDYrm:
623 Src1Name = getRegName(MI->getOperand(1).getReg());
624 DestName = getRegName(MI->getOperand(0).getReg());
625 DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
626 break;
627 case X86::PUNPCKLDQrr:
628 case X86::VPUNPCKLDQrr:
629 Src2Name = getRegName(MI->getOperand(2).getReg());
630 // FALL THROUGH.
631 case X86::PUNPCKLDQrm:
632 case X86::VPUNPCKLDQrm:
633 Src1Name = getRegName(MI->getOperand(1).getReg());
634 DestName = getRegName(MI->getOperand(0).getReg());
635 DecodeUNPCKLMask(MVT::v4i32, ShuffleMask);
636 break;
637 case X86::VPUNPCKLDQYrr:
638 Src2Name = getRegName(MI->getOperand(2).getReg());
639 // FALL THROUGH.
640 case X86::VPUNPCKLDQYrm:
641 Src1Name = getRegName(MI->getOperand(1).getReg());
642 DestName = getRegName(MI->getOperand(0).getReg());
643 DecodeUNPCKLMask(MVT::v8i32, ShuffleMask);
644 break;
645 case X86::VPUNPCKLDQZrr:
646 Src2Name = getRegName(MI->getOperand(2).getReg());
647 // FALL THROUGH.
648 case X86::VPUNPCKLDQZrm:
649 Src1Name = getRegName(MI->getOperand(1).getReg());
650 DestName = getRegName(MI->getOperand(0).getReg());
651 DecodeUNPCKLMask(MVT::v16i32, ShuffleMask);
652 break;
653 case X86::PUNPCKLQDQrr:
654 case X86::VPUNPCKLQDQrr:
655 Src2Name = getRegName(MI->getOperand(2).getReg());
656 // FALL THROUGH.
657 case X86::PUNPCKLQDQrm:
658 case X86::VPUNPCKLQDQrm:
659 Src1Name = getRegName(MI->getOperand(1).getReg());
660 DestName = getRegName(MI->getOperand(0).getReg());
661 DecodeUNPCKLMask(MVT::v2i64, ShuffleMask);
662 break;
663 case X86::VPUNPCKLQDQYrr:
664 Src2Name = getRegName(MI->getOperand(2).getReg());
665 // FALL THROUGH.
666 case X86::VPUNPCKLQDQYrm:
667 Src1Name = getRegName(MI->getOperand(1).getReg());
668 DestName = getRegName(MI->getOperand(0).getReg());
669 DecodeUNPCKLMask(MVT::v4i64, ShuffleMask);
670 break;
671 case X86::VPUNPCKLQDQZrr:
672 Src2Name = getRegName(MI->getOperand(2).getReg());
673 // FALL THROUGH.
674 case X86::VPUNPCKLQDQZrm:
675 Src1Name = getRegName(MI->getOperand(1).getReg());
676 DestName = getRegName(MI->getOperand(0).getReg());
677 DecodeUNPCKLMask(MVT::v8i64, ShuffleMask);
678 break;
679
680 case X86::SHUFPDrri:
681 case X86::VSHUFPDrri:
682 Src2Name = getRegName(MI->getOperand(2).getReg());
683 // FALL THROUGH.
684 case X86::SHUFPDrmi:
685 case X86::VSHUFPDrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]686 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]687 DecodeSHUFPMask(MVT::v2f64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]688 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]689 ShuffleMask);
690 Src1Name = getRegName(MI->getOperand(1).getReg());
691 DestName = getRegName(MI->getOperand(0).getReg());
692 break;
693 case X86::VSHUFPDYrri:
694 Src2Name = getRegName(MI->getOperand(2).getReg());
695 // FALL THROUGH.
696 case X86::VSHUFPDYrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]697 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]698 DecodeSHUFPMask(MVT::v4f64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]699 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]700 ShuffleMask);
701 Src1Name = getRegName(MI->getOperand(1).getReg());
702 DestName = getRegName(MI->getOperand(0).getReg());
703 break;
704
705 case X86::SHUFPSrri:
706 case X86::VSHUFPSrri:
707 Src2Name = getRegName(MI->getOperand(2).getReg());
708 // FALL THROUGH.
709 case X86::SHUFPSrmi:
710 case X86::VSHUFPSrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]711 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]712 DecodeSHUFPMask(MVT::v4f32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]713 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]714 ShuffleMask);
715 Src1Name = getRegName(MI->getOperand(1).getReg());
716 DestName = getRegName(MI->getOperand(0).getReg());
717 break;
718 case X86::VSHUFPSYrri:
719 Src2Name = getRegName(MI->getOperand(2).getReg());
720 // FALL THROUGH.
721 case X86::VSHUFPSYrmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]722 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]723 DecodeSHUFPMask(MVT::v8f32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]724 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]725 ShuffleMask);
726 Src1Name = getRegName(MI->getOperand(1).getReg());
727 DestName = getRegName(MI->getOperand(0).getReg());
728 break;
729
730 case X86::UNPCKLPDrr:
731 case X86::VUNPCKLPDrr:
732 Src2Name = getRegName(MI->getOperand(2).getReg());
733 // FALL THROUGH.
734 case X86::UNPCKLPDrm:
735 case X86::VUNPCKLPDrm:
736 DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
737 Src1Name = getRegName(MI->getOperand(1).getReg());
738 DestName = getRegName(MI->getOperand(0).getReg());
739 break;
740 case X86::VUNPCKLPDYrr:
741 Src2Name = getRegName(MI->getOperand(2).getReg());
742 // FALL THROUGH.
743 case X86::VUNPCKLPDYrm:
744 DecodeUNPCKLMask(MVT::v4f64, ShuffleMask);
745 Src1Name = getRegName(MI->getOperand(1).getReg());
746 DestName = getRegName(MI->getOperand(0).getReg());
747 break;
748 case X86::VUNPCKLPDZrr:
749 Src2Name = getRegName(MI->getOperand(2).getReg());
750 // FALL THROUGH.
751 case X86::VUNPCKLPDZrm:
752 DecodeUNPCKLMask(MVT::v8f64, ShuffleMask);
753 Src1Name = getRegName(MI->getOperand(1).getReg());
754 DestName = getRegName(MI->getOperand(0).getReg());
755 break;
756 case X86::UNPCKLPSrr:
757 case X86::VUNPCKLPSrr:
758 Src2Name = getRegName(MI->getOperand(2).getReg());
759 // FALL THROUGH.
760 case X86::UNPCKLPSrm:
761 case X86::VUNPCKLPSrm:
762 DecodeUNPCKLMask(MVT::v4f32, ShuffleMask);
763 Src1Name = getRegName(MI->getOperand(1).getReg());
764 DestName = getRegName(MI->getOperand(0).getReg());
765 break;
766 case X86::VUNPCKLPSYrr:
767 Src2Name = getRegName(MI->getOperand(2).getReg());
768 // FALL THROUGH.
769 case X86::VUNPCKLPSYrm:
770 DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
771 Src1Name = getRegName(MI->getOperand(1).getReg());
772 DestName = getRegName(MI->getOperand(0).getReg());
773 break;
774 case X86::VUNPCKLPSZrr:
775 Src2Name = getRegName(MI->getOperand(2).getReg());
776 // FALL THROUGH.
777 case X86::VUNPCKLPSZrm:
778 DecodeUNPCKLMask(MVT::v16f32, ShuffleMask);
779 Src1Name = getRegName(MI->getOperand(1).getReg());
780 DestName = getRegName(MI->getOperand(0).getReg());
781 break;
782 case X86::UNPCKHPDrr:
783 case X86::VUNPCKHPDrr:
784 Src2Name = getRegName(MI->getOperand(2).getReg());
785 // FALL THROUGH.
786 case X86::UNPCKHPDrm:
787 case X86::VUNPCKHPDrm:
788 DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
789 Src1Name = getRegName(MI->getOperand(1).getReg());
790 DestName = getRegName(MI->getOperand(0).getReg());
791 break;
792 case X86::VUNPCKHPDYrr:
793 Src2Name = getRegName(MI->getOperand(2).getReg());
794 // FALL THROUGH.
795 case X86::VUNPCKHPDYrm:
796 DecodeUNPCKHMask(MVT::v4f64, ShuffleMask);
797 Src1Name = getRegName(MI->getOperand(1).getReg());
798 DestName = getRegName(MI->getOperand(0).getReg());
799 break;
800 case X86::VUNPCKHPDZrr:
801 Src2Name = getRegName(MI->getOperand(2).getReg());
802 // FALL THROUGH.
803 case X86::VUNPCKHPDZrm:
804 DecodeUNPCKHMask(MVT::v8f64, ShuffleMask);
805 Src1Name = getRegName(MI->getOperand(1).getReg());
806 DestName = getRegName(MI->getOperand(0).getReg());
807 break;
808 case X86::UNPCKHPSrr:
809 case X86::VUNPCKHPSrr:
810 Src2Name = getRegName(MI->getOperand(2).getReg());
811 // FALL THROUGH.
812 case X86::UNPCKHPSrm:
813 case X86::VUNPCKHPSrm:
814 DecodeUNPCKHMask(MVT::v4f32, ShuffleMask);
815 Src1Name = getRegName(MI->getOperand(1).getReg());
816 DestName = getRegName(MI->getOperand(0).getReg());
817 break;
818 case X86::VUNPCKHPSYrr:
819 Src2Name = getRegName(MI->getOperand(2).getReg());
820 // FALL THROUGH.
821 case X86::VUNPCKHPSYrm:
822 DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
823 Src1Name = getRegName(MI->getOperand(1).getReg());
824 DestName = getRegName(MI->getOperand(0).getReg());
825 break;
826 case X86::VUNPCKHPSZrr:
827 Src2Name = getRegName(MI->getOperand(2).getReg());
828 // FALL THROUGH.
829 case X86::VUNPCKHPSZrm:
830 DecodeUNPCKHMask(MVT::v16f32, ShuffleMask);
831 Src1Name = getRegName(MI->getOperand(1).getReg());
832 DestName = getRegName(MI->getOperand(0).getReg());
833 break;
834 case X86::VPERMILPSri:
835 Src1Name = getRegName(MI->getOperand(1).getReg());
836 // FALL THROUGH.
837 case X86::VPERMILPSmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]838 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]839 DecodePSHUFMask(MVT::v4f32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]840 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]841 ShuffleMask);
842 DestName = getRegName(MI->getOperand(0).getReg());
843 break;
844 case X86::VPERMILPSYri:
845 Src1Name = getRegName(MI->getOperand(1).getReg());
846 // FALL THROUGH.
847 case X86::VPERMILPSYmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]848 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]849 DecodePSHUFMask(MVT::v8f32,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]850 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]851 ShuffleMask);
852 DestName = getRegName(MI->getOperand(0).getReg());
853 break;
854 case X86::VPERMILPDri:
855 Src1Name = getRegName(MI->getOperand(1).getReg());
856 // FALL THROUGH.
857 case X86::VPERMILPDmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]858 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]859 DecodePSHUFMask(MVT::v2f64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]860 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]861 ShuffleMask);
862 DestName = getRegName(MI->getOperand(0).getReg());
863 break;
864 case X86::VPERMILPDYri:
865 Src1Name = getRegName(MI->getOperand(1).getReg());
866 // FALL THROUGH.
867 case X86::VPERMILPDYmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]868 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]869 DecodePSHUFMask(MVT::v4f64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]870 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]871 ShuffleMask);
872 DestName = getRegName(MI->getOperand(0).getReg());
873 break;
874 case X86::VPERM2F128rr:
875 case X86::VPERM2I128rr:
876 Src2Name = getRegName(MI->getOperand(2).getReg());
877 // FALL THROUGH.
878 case X86::VPERM2F128rm:
879 case X86::VPERM2I128rm:
880 // For instruction comments purpose, assume the 256-bit vector is v4i64.
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]881 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]882 DecodeVPERM2X128Mask(MVT::v4i64,
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]883 MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]884 ShuffleMask);
885 Src1Name = getRegName(MI->getOperand(1).getReg());
886 DestName = getRegName(MI->getOperand(0).getReg());
887 break;
888 case X86::VPERMQYri:
889 case X86::VPERMPDYri:
890 Src1Name = getRegName(MI->getOperand(1).getReg());
891 // FALL THROUGH.
892 case X86::VPERMQYmi:
893 case X86::VPERMPDYmi:
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]894 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
895 DecodeVPERMMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]896 ShuffleMask);
897 DestName = getRegName(MI->getOperand(0).getReg());
898 break;
899
900 case X86::MOVSDrr:
901 case X86::VMOVSDrr:
902 Src2Name = getRegName(MI->getOperand(2).getReg());
903 Src1Name = getRegName(MI->getOperand(1).getReg());
904 // FALL THROUGH.
905 case X86::MOVSDrm:
906 case X86::VMOVSDrm:
907 DecodeScalarMoveMask(MVT::v2f64, nullptr == Src2Name, ShuffleMask);
908 DestName = getRegName(MI->getOperand(0).getReg());
909 break;
910 case X86::MOVSSrr:
911 case X86::VMOVSSrr:
912 Src2Name = getRegName(MI->getOperand(2).getReg());
913 Src1Name = getRegName(MI->getOperand(1).getReg());
914 // FALL THROUGH.
915 case X86::MOVSSrm:
916 case X86::VMOVSSrm:
917 DecodeScalarMoveMask(MVT::v4f32, nullptr == Src2Name, ShuffleMask);
918 DestName = getRegName(MI->getOperand(0).getReg());
919 break;
920
921 case X86::MOVPQI2QIrr:
922 case X86::MOVZPQILo2PQIrr:
923 case X86::VMOVPQI2QIrr:
924 case X86::VMOVZPQILo2PQIrr:
925 Src1Name = getRegName(MI->getOperand(1).getReg());
926 // FALL THROUGH.
927 case X86::MOVQI2PQIrm:
928 case X86::MOVZQI2PQIrm:
929 case X86::MOVZPQILo2PQIrm:
930 case X86::VMOVQI2PQIrm:
931 case X86::VMOVZQI2PQIrm:
932 case X86::VMOVZPQILo2PQIrm:
933 DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask);
934 DestName = getRegName(MI->getOperand(0).getReg());
935 break;
936 case X86::MOVDI2PDIrm:
937 case X86::VMOVDI2PDIrm:
938 DecodeZeroMoveLowMask(MVT::v4i32, ShuffleMask);
939 DestName = getRegName(MI->getOperand(0).getReg());
940 break;
941
Simon Pilgrimd85cae32015-07-06 20:46:41 +0000[diff] [blame]942 case X86::EXTRQI:
943 if (MI->getOperand(2).isImm() &&
944 MI->getOperand(3).isImm())
945 DecodeEXTRQIMask(MI->getOperand(2).getImm(),
946 MI->getOperand(3).getImm(),
947 ShuffleMask);
948
949 DestName = getRegName(MI->getOperand(0).getReg());
950 Src1Name = getRegName(MI->getOperand(1).getReg());
951 break;
952
953 case X86::INSERTQI:
954 if (MI->getOperand(3).isImm() &&
955 MI->getOperand(4).isImm())
956 DecodeINSERTQIMask(MI->getOperand(3).getImm(),
957 MI->getOperand(4).getImm(),
958 ShuffleMask);
959
960 DestName = getRegName(MI->getOperand(0).getReg());
961 Src1Name = getRegName(MI->getOperand(1).getReg());
962 Src2Name = getRegName(MI->getOperand(2).getReg());
963 break;
964
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]965 case X86::PMOVZXBWrr:
966 case X86::PMOVZXBDrr:
967 case X86::PMOVZXBQrr:
968 case X86::PMOVZXWDrr:
969 case X86::PMOVZXWQrr:
970 case X86::PMOVZXDQrr:
971 case X86::VPMOVZXBWrr:
972 case X86::VPMOVZXBDrr:
973 case X86::VPMOVZXBQrr:
974 case X86::VPMOVZXWDrr:
975 case X86::VPMOVZXWQrr:
976 case X86::VPMOVZXDQrr:
977 case X86::VPMOVZXBWYrr:
978 case X86::VPMOVZXBDYrr:
979 case X86::VPMOVZXBQYrr:
980 case X86::VPMOVZXWDYrr:
981 case X86::VPMOVZXWQYrr:
982 case X86::VPMOVZXDQYrr:
983 Src1Name = getRegName(MI->getOperand(1).getReg());
984 // FALL THROUGH.
985 case X86::PMOVZXBWrm:
986 case X86::PMOVZXBDrm:
987 case X86::PMOVZXBQrm:
988 case X86::PMOVZXWDrm:
989 case X86::PMOVZXWQrm:
990 case X86::PMOVZXDQrm:
991 case X86::VPMOVZXBWrm:
992 case X86::VPMOVZXBDrm:
993 case X86::VPMOVZXBQrm:
994 case X86::VPMOVZXWDrm:
995 case X86::VPMOVZXWQrm:
996 case X86::VPMOVZXDQrm:
997 case X86::VPMOVZXBWYrm:
998 case X86::VPMOVZXBDYrm:
999 case X86::VPMOVZXBQYrm:
1000 case X86::VPMOVZXWDYrm:
1001 case X86::VPMOVZXWQYrm:
1002 case X86::VPMOVZXDQYrm: {
1003 MVT SrcVT, DstVT;
1004 getZeroExtensionTypes(MI, SrcVT, DstVT);
1005 DecodeZeroExtendMask(SrcVT, DstVT, ShuffleMask);
1006 DestName = getRegName(MI->getOperand(0).getReg());
1007 } break;
1008 }
1009
1010 // The only comments we decode are shuffles, so give up if we were unable to
1011 // decode a shuffle mask.
1012 if (ShuffleMask.empty())
1013 return false;
1014
1015 if (!DestName) DestName = Src1Name;
1016 OS << (DestName ? DestName : "mem") << " = ";
1017
1018 // If the two sources are the same, canonicalize the input elements to be
1019 // from the first src so that we get larger element spans.
1020 if (Src1Name == Src2Name) {
1021 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
1022 if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]1023 ShuffleMask[i] >= (int)e) // From second mask.
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]1024 ShuffleMask[i] -= e;
1025 }
1026 }
1027
1028 // The shuffle mask specifies which elements of the src1/src2 fill in the
1029 // destination, with a few sentinel values. Loop through and print them
1030 // out.
1031 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
1032 if (i != 0)
1033 OS << ',';
1034 if (ShuffleMask[i] == SM_SentinelZero) {
1035 OS << "zero";
1036 continue;
1037 }
1038
1039 // Otherwise, it must come from src1 or src2. Print the span of elements
1040 // that comes from this src.
1041 bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
1042 const char *SrcName = isSrc1 ? Src1Name : Src2Name;
1043 OS << (SrcName ? SrcName : "mem") << '[';
1044 bool IsFirst = true;
1045 while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&
1046 (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
1047 if (!IsFirst)
1048 OS << ',';
1049 else
1050 IsFirst = false;
1051 if (ShuffleMask[i] == SM_SentinelUndef)
1052 OS << "u";
1053 else
1054 OS << ShuffleMask[i] % ShuffleMask.size();
1055 ++i;
1056 }
1057 OS << ']';
NAKAMURA Takumi5582a6a2015-05-25 01:43:34 +0000[diff] [blame]1058 --i; // For loop increments element #.
NAKAMURA Takumifb3bd712015-05-25 01:43:23 +0000[diff] [blame]1059 }
1060 //MI->print(OS, 0);
1061 OS << "\n";
1062
1063 // We successfully added a comment to this instruction.
1064 return true;
1065}