| Alexander Kornienko | 4d9d76d | 2018-09-18 10:53:13 +0000 | [diff] [blame] | 1 | ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s |
| 2 | ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s |
| QingShan Zhang | df1a2d8 | 2018-09-18 01:59:22 +0000 | [diff] [blame] | 3 | ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \ |
| 4 | ; RUN: --check-prefix=CHECK-ITIN |
| Alexander Kornienko | 4d9d76d | 2018-09-18 10:53:13 +0000 | [diff] [blame] | 5 | ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s \ |
| QingShan Zhang | df1a2d8 | 2018-09-18 01:59:22 +0000 | [diff] [blame] | 6 | ; RUN: --check-prefix=CHECK-ITIN |
| 7 | ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \ |
| 8 | ; RUN: --check-prefix=CHECK-ITIN |
| 9 | |
| 10 | define void @bn_mul_comba8(i64* nocapture %r, i64* nocapture readonly %a, i64* nocapture readonly %b) { |
| 11 | ; CHECK-LABEL: bn_mul_comba8: |
| 12 | ; CHECK: mulhdu |
| 13 | ; CHECK-NEXT: mulld |
| QingShan Zhang | f24ec7b | 2019-01-03 05:04:18 +0000 | [diff] [blame] | 14 | ; CHECK: mulhdu |
| 15 | ; CHECK: mulld |
| QingShan Zhang | df1a2d8 | 2018-09-18 01:59:22 +0000 | [diff] [blame] | 16 | ; CHECK-NEXT: mulhdu |
| 17 | |
| 18 | |
| 19 | ; CHECK-ITIN-LABEL: bn_mul_comba8: |
| 20 | ; CHECK-ITIN: mulhdu |
| QingShan Zhang | df1a2d8 | 2018-09-18 01:59:22 +0000 | [diff] [blame] | 21 | ; CHECK-ITIN-NEXT: mulld |
| 22 | ; CHECK-ITIN-NEXT: mulhdu |
| 23 | ; CHECK-ITIN-NEXT: mulld |
| QingShan Zhang | f1b0b47 | 2018-09-18 02:05:18 +0000 | [diff] [blame] | 24 | ; CHECK-ITIN-NEXT: mulhdu |
| QingShan Zhang | df1a2d8 | 2018-09-18 01:59:22 +0000 | [diff] [blame] | 25 | |
| 26 | %1 = load i64, i64* %a, align 8 |
| 27 | %conv = zext i64 %1 to i128 |
| 28 | %2 = load i64, i64* %b, align 8 |
| 29 | %conv2 = zext i64 %2 to i128 |
| 30 | %mul = mul nuw i128 %conv2, %conv |
| 31 | %shr = lshr i128 %mul, 64 |
| 32 | %agep = getelementptr inbounds i64, i64* %a, i64 1 |
| 33 | %3 = load i64, i64* %agep, align 8 |
| 34 | %conv14 = zext i64 %3 to i128 |
| 35 | %mul15 = mul nuw i128 %conv14, %conv |
| 36 | %add17 = add i128 %mul15, %shr |
| 37 | %shr19 = lshr i128 %add17, 64 |
| 38 | %conv20 = trunc i128 %shr19 to i64 |
| 39 | %bgep = getelementptr inbounds i64, i64* %b, i64 1 |
| 40 | %4 = load i64, i64* %bgep, align 8 |
| 41 | %conv28 = zext i64 %4 to i128 |
| 42 | %mul31 = mul nuw i128 %conv28, %conv2 |
| 43 | %conv32 = and i128 %add17, 18446744073709551615 |
| 44 | %add33 = add i128 %conv32, %mul31 |
| 45 | %shr35 = lshr i128 %add33, 64 |
| 46 | %conv36 = trunc i128 %shr35 to i64 |
| 47 | %add37 = add i64 %conv36, %conv20 |
| 48 | %cmp38 = icmp ult i64 %add37, %conv36 |
| 49 | %conv148 = zext i1 %cmp38 to i64 |
| 50 | store i64 %conv148, i64* %r, align 8 |
| 51 | ret void |
| 52 | } |
| 53 | |