blob: dd9f25aad7f22e59554cdd01710506aca4329ec5 [file] [log] [blame]
Tom Stellard49f8bfd2015-01-06 18:00:21 +00001; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI %s
Matt Arsenault9215b172014-08-03 05:27:14 +00002
3; Make sure there isn't an extra space between the instruction name and first operands.
4
Tom Stellard79243d92014-10-01 17:15:17 +00005; SI-LABEL: {{^}}add_f32:
Tom Stellard326d6ec2014-11-05 14:50:53 +00006; SI-DAG: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
7; SI-DAG: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
8; SI: v_mov_b32_e32 [[VREGB:v[0-9]+]], [[SREGB]]
9; SI: v_add_f32_e32 [[RESULT:v[0-9]+]], [[SREGA]], [[VREGB]]
10; SI: buffer_store_dword [[RESULT]],
Matt Arsenault9215b172014-08-03 05:27:14 +000011define void @add_f32(float addrspace(1)* %out, float %a, float %b) {
12 %result = fadd float %a, %b
13 store float %result, float addrspace(1)* %out
14 ret void
15}