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Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +00001//===-- xray_AArch64.cc -----------------------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file is a part of XRay, a dynamic runtime instrumentation system.
11//
12// Implementation of AArch64-specific routines (64-bit).
13//
14//===----------------------------------------------------------------------===//
15#include "sanitizer_common/sanitizer_common.h"
16#include "xray_defs.h"
Diana Picus6b88e322016-12-22 07:35:56 +000017#include "xray_emulate_tsc.h"
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +000018#include "xray_interface_internal.h"
19#include <atomic>
20#include <cassert>
21
Serge Rogatch4ab7a302017-01-10 16:16:33 +000022
23extern "C" void __clear_cache(void* start, void* end);
24
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +000025namespace __xray {
26
Diana Picus6b88e322016-12-22 07:35:56 +000027uint64_t cycleFrequency() XRAY_NEVER_INSTRUMENT {
28 // There is no instruction like RDTSCP in user mode on ARM. ARM's CP15 does
29 // not have a constant frequency like TSC on x86[_64]; it may go faster or
30 // slower depending on CPU's turbo or power saving modes. Furthermore, to
31 // read from CP15 on ARM a kernel modification or a driver is needed.
32 // We can not require this from users of compiler-rt.
33 // So on ARM we use clock_gettime(2) which gives the result in nanoseconds.
34 // To get the measurements per second, we scale this by the number of
35 // nanoseconds per second, pretending that the TSC frequency is 1GHz and
36 // one TSC tick is 1 nanosecond.
37 return NanosecondsPerSecond;
38}
39
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +000040// The machine codes for some instructions used in runtime patching.
41enum class PatchOpcodes : uint32_t {
42 PO_StpX0X30SP_m16e = 0xA9BF7BE0, // STP X0, X30, [SP, #-16]!
43 PO_LdrW0_12 = 0x18000060, // LDR W0, #12
44 PO_LdrX16_12 = 0x58000070, // LDR X16, #12
45 PO_BlrX16 = 0xD63F0200, // BLR X16
46 PO_LdpX0X30SP_16 = 0xA8C17BE0, // LDP X0, X30, [SP], #16
47 PO_B32 = 0x14000008 // B #32
48};
49
50inline static bool patchSled(const bool Enable, const uint32_t FuncId,
51 const XRaySledEntry &Sled,
52 void (*TracingHook)()) XRAY_NEVER_INSTRUMENT {
53 // When |Enable| == true,
54 // We replace the following compile-time stub (sled):
55 //
56 // xray_sled_n:
57 // B #32
58 // 7 NOPs (24 bytes)
59 //
60 // With the following runtime patch:
61 //
62 // xray_sled_n:
63 // STP X0, X30, [SP, #-16]! ; PUSH {r0, lr}
64 // LDR W0, #12 ; W0 := function ID
65 // LDR X16,#12 ; X16 := address of the trampoline
66 // BLR X16
67 // ;DATA: 32 bits of function ID
68 // ;DATA: lower 32 bits of the address of the trampoline
69 // ;DATA: higher 32 bits of the address of the trampoline
70 // LDP X0, X30, [SP], #16 ; POP {r0, lr}
71 //
72 // Replacement of the first 4-byte instruction should be the last and atomic
73 // operation, so that the user code which reaches the sled concurrently
74 // either jumps over the whole sled, or executes the whole sled when the
75 // latter is ready.
76 //
77 // When |Enable|==false, we set back the first instruction in the sled to be
78 // B #32
79
80 uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.Address);
Serge Rogatch4ab7a302017-01-10 16:16:33 +000081 uint32_t *CurAddress = FirstAddress + 1;
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +000082 if (Enable) {
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +000083 *CurAddress = uint32_t(PatchOpcodes::PO_LdrW0_12);
84 CurAddress++;
85 *CurAddress = uint32_t(PatchOpcodes::PO_LdrX16_12);
86 CurAddress++;
87 *CurAddress = uint32_t(PatchOpcodes::PO_BlrX16);
88 CurAddress++;
89 *CurAddress = FuncId;
90 CurAddress++;
91 *reinterpret_cast<void (**)()>(CurAddress) = TracingHook;
92 CurAddress += 2;
93 *CurAddress = uint32_t(PatchOpcodes::PO_LdpX0X30SP_16);
Serge Rogatch4ab7a302017-01-10 16:16:33 +000094 CurAddress++;
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +000095 std::atomic_store_explicit(
96 reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress),
97 uint32_t(PatchOpcodes::PO_StpX0X30SP_m16e), std::memory_order_release);
98 } else {
99 std::atomic_store_explicit(
100 reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress),
101 uint32_t(PatchOpcodes::PO_B32), std::memory_order_release);
102 }
Serge Rogatch4ab7a302017-01-10 16:16:33 +0000103 __clear_cache(reinterpret_cast<char*>(FirstAddress),
104 reinterpret_cast<char*>(CurAddress));
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +0000105 return true;
106}
107
108bool patchFunctionEntry(const bool Enable, const uint32_t FuncId,
109 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
110 return patchSled(Enable, FuncId, Sled, __xray_FunctionEntry);
111}
112
113bool patchFunctionExit(const bool Enable, const uint32_t FuncId,
114 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
115 return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
116}
117
118bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
119 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
Serge Rogatchfa846a12017-01-25 20:27:19 +0000120 return patchSled(Enable, FuncId, Sled, __xray_FunctionTailExit);
Dean Michael Berrisbad8f0f2016-11-21 03:20:43 +0000121}
122
123} // namespace __xray