| Matt Arsenault | 9861a85 | 2020-01-03 09:10:00 -0500 | [diff] [blame] | 1 | //===- AMDGPUGlobalISelUtils -------------------------------------*- C++ -*-==// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H |
| 10 | #define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H |
| 11 | |
| 12 | #include "llvm/CodeGen/Register.h" |
| 13 | #include <tuple> |
| 14 | |
| 15 | namespace llvm { |
| 16 | |
| 17 | class MachineInstr; |
| 18 | class MachineRegisterInfo; |
| 19 | |
| 20 | namespace AMDGPU { |
| 21 | |
| 22 | /// Returns Base register, constant offset, and offset def point. |
| 23 | std::tuple<Register, unsigned, MachineInstr *> |
| 24 | getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg); |
| 25 | |
| 26 | } |
| 27 | } |
| 28 | |
| 29 | #endif |