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Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001//===-------- InlineSpiller.cpp - Insert spills and restores inline -------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// The inline spiller modifies the machine function directly instead of
11// inserting spills and restores in VirtRegMap.
12//
13//===----------------------------------------------------------------------===//
14
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000015#include "Spiller.h"
Benjamin Kramerbc6666b2013-05-23 15:42:57 +000016#include "llvm/ADT/SetVector.h"
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +000017#include "llvm/ADT/Statistic.h"
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +000018#include "llvm/ADT/TinyPtrVector.h"
Jakob Stoklund Olesen868dd4e2010-11-10 23:55:56 +000019#include "llvm/Analysis/AliasAnalysis.h"
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000020#include "llvm/CodeGen/LiveIntervalAnalysis.h"
Pete Cooper3ca96f92012-04-02 22:44:18 +000021#include "llvm/CodeGen/LiveRangeEdit.h"
Jakob Stoklund Olesene2c340c2010-10-26 00:11:35 +000022#include "llvm/CodeGen/LiveStackAnalysis.h"
Benjamin Kramere2a1d892013-06-17 19:00:36 +000023#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
Manman Renc9355602014-03-21 21:46:24 +000024#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000025#include "llvm/CodeGen/MachineDominators.h"
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000026#include "llvm/CodeGen/MachineFrameInfo.h"
27#include "llvm/CodeGen/MachineFunction.h"
David Blaikie0252265b2013-06-16 20:34:15 +000028#include "llvm/CodeGen/MachineInstrBuilder.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000029#include "llvm/CodeGen/MachineInstrBundle.h"
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +000030#include "llvm/CodeGen/MachineLoopInfo.h"
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000031#include "llvm/CodeGen/MachineRegisterInfo.h"
Jakob Stoklund Olesen26c9d702012-11-28 19:13:06 +000032#include "llvm/CodeGen/VirtRegMap.h"
Jakob Stoklund Olesenbceb9e52011-09-15 21:06:00 +000033#include "llvm/Support/CommandLine.h"
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000034#include "llvm/Support/Debug.h"
35#include "llvm/Support/raw_ostream.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000036#include "llvm/Target/TargetInstrInfo.h"
37#include "llvm/Target/TargetMachine.h"
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000038
39using namespace llvm;
40
Chandler Carruth1b9dde02014-04-22 02:02:50 +000041#define DEBUG_TYPE "regalloc"
42
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +000043STATISTIC(NumSpilledRanges, "Number of spilled live ranges");
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +000044STATISTIC(NumSnippets, "Number of spilled snippets");
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +000045STATISTIC(NumSpills, "Number of spills inserted");
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +000046STATISTIC(NumSpillsRemoved, "Number of spills removed");
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +000047STATISTIC(NumReloads, "Number of reloads inserted");
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +000048STATISTIC(NumReloadsRemoved, "Number of reloads removed");
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +000049STATISTIC(NumFolded, "Number of folded stack accesses");
50STATISTIC(NumFoldedLoads, "Number of folded loads");
51STATISTIC(NumRemats, "Number of rematerialized defs for spilling");
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +000052STATISTIC(NumOmitReloadSpill, "Number of omitted spills of reloads");
53STATISTIC(NumHoists, "Number of hoisted spills");
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +000054
Jakob Stoklund Olesenbceb9e52011-09-15 21:06:00 +000055static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden,
56 cl::desc("Disable inline spill hoisting"));
57
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000058namespace {
59class InlineSpiller : public Spiller {
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +000060 MachineFunction &MF;
61 LiveIntervals &LIS;
62 LiveStacks &LSS;
63 AliasAnalysis *AA;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +000064 MachineDominatorTree &MDT;
65 MachineLoopInfo &Loops;
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +000066 VirtRegMap &VRM;
67 MachineFrameInfo &MFI;
68 MachineRegisterInfo &MRI;
69 const TargetInstrInfo &TII;
70 const TargetRegisterInfo &TRI;
Benjamin Kramere2a1d892013-06-17 19:00:36 +000071 const MachineBlockFrequencyInfo &MBFI;
Jakob Stoklund Olesenbde96ad2010-06-30 23:03:52 +000072
73 // Variables that are valid during spill(), but used by multiple methods.
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +000074 LiveRangeEdit *Edit;
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +000075 LiveInterval *StackInt;
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +000076 int StackSlot;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +000077 unsigned Original;
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +000078
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +000079 // All registers to spill to StackSlot, including the main register.
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +000080 SmallVector<unsigned, 8> RegsToSpill;
81
82 // All COPY instructions to/from snippets.
83 // They are ignored since both operands refer to the same stack slot.
84 SmallPtrSet<MachineInstr*, 8> SnippetCopies;
85
Jakob Stoklund Olesen2edaa2f2010-10-20 22:00:51 +000086 // Values that failed to remat at some point.
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +000087 SmallPtrSet<VNInfo*, 8> UsedValues;
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +000088
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +000089public:
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +000090 // Information about a value that was defined by a copy from a sibling
91 // register.
92 struct SibValueInfo {
93 // True when all reaching defs were reloads: No spill is necessary.
94 bool AllDefsAreReloads;
95
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +000096 // True when value is defined by an original PHI not from splitting.
97 bool DefByOrigPHI;
98
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +000099 // True when the COPY defining this value killed its source.
100 bool KillsSource;
101
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000102 // The preferred register to spill.
103 unsigned SpillReg;
104
105 // The value of SpillReg that should be spilled.
106 VNInfo *SpillVNI;
107
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000108 // The block where SpillVNI should be spilled. Currently, this must be the
109 // block containing SpillVNI->def.
110 MachineBasicBlock *SpillMBB;
111
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000112 // A defining instruction that is not a sibling copy or a reload, or NULL.
113 // This can be used as a template for rematerialization.
114 MachineInstr *DefMI;
115
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000116 // List of values that depend on this one. These values are actually the
117 // same, but live range splitting has placed them in different registers,
118 // or SSA update needed to insert PHI-defs to preserve SSA form. This is
119 // copies of the current value and phi-kills. Usually only phi-kills cause
120 // more than one dependent value.
121 TinyPtrVector<VNInfo*> Deps;
122
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000123 SibValueInfo(unsigned Reg, VNInfo *VNI)
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +0000124 : AllDefsAreReloads(true), DefByOrigPHI(false), KillsSource(false),
Craig Topperc0196b12014-04-14 00:51:57 +0000125 SpillReg(Reg), SpillVNI(VNI), SpillMBB(nullptr), DefMI(nullptr) {}
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000126
127 // Returns true when a def has been found.
128 bool hasDef() const { return DefByOrigPHI || DefMI; }
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000129 };
130
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000131private:
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000132 // Values in RegsToSpill defined by sibling copies.
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000133 typedef DenseMap<VNInfo*, SibValueInfo> SibValueMap;
134 SibValueMap SibValues;
135
136 // Dead defs generated during spilling.
137 SmallVector<MachineInstr*, 8> DeadDefs;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000138
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +0000139 ~InlineSpiller() {}
140
141public:
Eric Christopherd9134482014-08-04 21:25:23 +0000142 InlineSpiller(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm)
143 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()),
144 LSS(pass.getAnalysis<LiveStacks>()),
145 AA(&pass.getAnalysis<AliasAnalysis>()),
146 MDT(pass.getAnalysis<MachineDominatorTree>()),
147 Loops(pass.getAnalysis<MachineLoopInfo>()), VRM(vrm),
148 MFI(*mf.getFrameInfo()), MRI(mf.getRegInfo()),
Eric Christopherfc6de422014-08-05 02:39:49 +0000149 TII(*mf.getSubtarget().getInstrInfo()),
150 TRI(*mf.getSubtarget().getRegisterInfo()),
Eric Christopherd9134482014-08-04 21:25:23 +0000151 MBFI(pass.getAnalysis<MachineBlockFrequencyInfo>()) {}
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +0000152
Craig Topper4584cd52014-03-07 09:26:03 +0000153 void spill(LiveRangeEdit &) override;
Jakob Stoklund Olesen72911e42010-10-14 23:49:52 +0000154
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000155private:
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000156 bool isSnippet(const LiveInterval &SnipLI);
157 void collectRegsToSpill();
158
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000159 bool isRegToSpill(unsigned Reg) {
160 return std::find(RegsToSpill.begin(),
161 RegsToSpill.end(), Reg) != RegsToSpill.end();
162 }
163
164 bool isSibling(unsigned Reg);
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000165 MachineInstr *traceSiblingValue(unsigned, VNInfo*, VNInfo*);
Craig Topperc0196b12014-04-14 00:51:57 +0000166 void propagateSiblingValue(SibValueMap::iterator, VNInfo *VNI = nullptr);
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000167 void analyzeSiblingValues();
168
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000169 bool hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI);
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000170 void eliminateRedundantSpills(LiveInterval &LI, VNInfo *VNI);
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000171
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000172 void markValueUsed(LiveInterval*, VNInfo*);
173 bool reMaterializeFor(LiveInterval&, MachineBasicBlock::iterator MI);
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000174 void reMaterializeAll();
175
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000176 bool coalesceStackAccess(MachineInstr *MI, unsigned Reg);
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +0000177 bool foldMemoryOperand(ArrayRef<std::pair<MachineInstr*, unsigned> >,
Craig Topperc0196b12014-04-14 00:51:57 +0000178 MachineInstr *LoadMI = nullptr);
Mark Lacey9d8103d2013-08-14 23:50:16 +0000179 void insertReload(unsigned VReg, SlotIndex, MachineBasicBlock::iterator MI);
180 void insertSpill(unsigned VReg, bool isKill, MachineBasicBlock::iterator MI);
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000181
182 void spillAroundUses(unsigned Reg);
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +0000183 void spillAll();
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +0000184};
185}
186
187namespace llvm {
Jakob Stoklund Olesen0fef9dd2010-07-20 23:50:15 +0000188Spiller *createInlineSpiller(MachineFunctionPass &pass,
189 MachineFunction &mf,
190 VirtRegMap &vrm) {
191 return new InlineSpiller(pass, mf, vrm);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +0000192}
193}
194
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000195//===----------------------------------------------------------------------===//
196// Snippets
197//===----------------------------------------------------------------------===//
198
199// When spilling a virtual register, we also spill any snippets it is connected
200// to. The snippets are small live ranges that only have a single real use,
201// leftovers from live range splitting. Spilling them enables memory operand
202// folding or tightens the live range around the single use.
203//
204// This minimizes register pressure and maximizes the store-to-load distance for
205// spill slots which can be important in tight loops.
206
207/// isFullCopyOf - If MI is a COPY to or from Reg, return the other register,
208/// otherwise return 0.
209static unsigned isFullCopyOf(const MachineInstr *MI, unsigned Reg) {
Rafael Espindola070f96c2011-06-30 21:15:52 +0000210 if (!MI->isFullCopy())
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000211 return 0;
212 if (MI->getOperand(0).getReg() == Reg)
213 return MI->getOperand(1).getReg();
214 if (MI->getOperand(1).getReg() == Reg)
215 return MI->getOperand(0).getReg();
216 return 0;
217}
218
219/// isSnippet - Identify if a live interval is a snippet that should be spilled.
220/// It is assumed that SnipLI is a virtual register with the same original as
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000221/// Edit->getReg().
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000222bool InlineSpiller::isSnippet(const LiveInterval &SnipLI) {
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000223 unsigned Reg = Edit->getReg();
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000224
225 // A snippet is a tiny live range with only a single instruction using it
226 // besides copies to/from Reg or spills/fills. We accept:
227 //
228 // %snip = COPY %Reg / FILL fi#
229 // %snip = USE %snip
230 // %Reg = COPY %snip / SPILL %snip, fi#
231 //
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000232 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI))
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000233 return false;
234
Craig Topperc0196b12014-04-14 00:51:57 +0000235 MachineInstr *UseMI = nullptr;
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000236
237 // Check that all uses satisfy our criteria.
Owen Andersonabb90c92014-03-13 06:02:25 +0000238 for (MachineRegisterInfo::reg_instr_nodbg_iterator
239 RI = MRI.reg_instr_nodbg_begin(SnipLI.reg),
240 E = MRI.reg_instr_nodbg_end(); RI != E; ) {
241 MachineInstr *MI = &*(RI++);
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000242
243 // Allow copies to/from Reg.
244 if (isFullCopyOf(MI, Reg))
245 continue;
246
247 // Allow stack slot loads.
248 int FI;
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000249 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000250 continue;
251
252 // Allow stack slot stores.
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000253 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000254 continue;
255
256 // Allow a single additional instruction.
257 if (UseMI && MI != UseMI)
258 return false;
259 UseMI = MI;
260 }
261 return true;
262}
263
264/// collectRegsToSpill - Collect live range snippets that only have a single
265/// real use.
266void InlineSpiller::collectRegsToSpill() {
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000267 unsigned Reg = Edit->getReg();
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000268
269 // Main register always spills.
270 RegsToSpill.assign(1, Reg);
271 SnippetCopies.clear();
272
273 // Snippets all have the same original, so there can't be any for an original
274 // register.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000275 if (Original == Reg)
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000276 return;
277
Owen Andersonabb90c92014-03-13 06:02:25 +0000278 for (MachineRegisterInfo::reg_instr_iterator
279 RI = MRI.reg_instr_begin(Reg), E = MRI.reg_instr_end(); RI != E; ) {
280 MachineInstr *MI = &*(RI++);
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000281 unsigned SnipReg = isFullCopyOf(MI, Reg);
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000282 if (!isSibling(SnipReg))
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000283 continue;
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000284 LiveInterval &SnipLI = LIS.getInterval(SnipReg);
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000285 if (!isSnippet(SnipLI))
286 continue;
287 SnippetCopies.insert(MI);
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000288 if (isRegToSpill(SnipReg))
289 continue;
290 RegsToSpill.push_back(SnipReg);
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000291 DEBUG(dbgs() << "\talso spill snippet " << SnipLI << '\n');
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000292 ++NumSnippets;
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000293 }
294}
295
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000296
297//===----------------------------------------------------------------------===//
298// Sibling Values
299//===----------------------------------------------------------------------===//
300
301// After live range splitting, some values to be spilled may be defined by
302// copies from sibling registers. We trace the sibling copies back to the
303// original value if it still exists. We need it for rematerialization.
304//
305// Even when the value can't be rematerialized, we still want to determine if
306// the value has already been spilled, or we may want to hoist the spill from a
307// loop.
308
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000309bool InlineSpiller::isSibling(unsigned Reg) {
310 return TargetRegisterInfo::isVirtualRegister(Reg) &&
311 VRM.getOriginal(Reg) == Original;
312}
313
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000314#ifndef NDEBUG
315static raw_ostream &operator<<(raw_ostream &OS,
316 const InlineSpiller::SibValueInfo &SVI) {
317 OS << "spill " << PrintReg(SVI.SpillReg) << ':'
318 << SVI.SpillVNI->id << '@' << SVI.SpillVNI->def;
319 if (SVI.SpillMBB)
320 OS << " in BB#" << SVI.SpillMBB->getNumber();
321 if (SVI.AllDefsAreReloads)
322 OS << " all-reloads";
323 if (SVI.DefByOrigPHI)
324 OS << " orig-phi";
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +0000325 if (SVI.KillsSource)
326 OS << " kill";
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000327 OS << " deps[";
328 for (unsigned i = 0, e = SVI.Deps.size(); i != e; ++i)
329 OS << ' ' << SVI.Deps[i]->id << '@' << SVI.Deps[i]->def;
330 OS << " ]";
331 if (SVI.DefMI)
332 OS << " def: " << *SVI.DefMI;
333 else
334 OS << '\n';
335 return OS;
336}
337#endif
338
339/// propagateSiblingValue - Propagate the value in SVI to dependents if it is
340/// known. Otherwise remember the dependency for later.
341///
Benjamin Kramerbc6666b2013-05-23 15:42:57 +0000342/// @param SVIIter SibValues entry to propagate.
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000343/// @param VNI Dependent value, or NULL to propagate to all saved dependents.
Benjamin Kramerbc6666b2013-05-23 15:42:57 +0000344void InlineSpiller::propagateSiblingValue(SibValueMap::iterator SVIIter,
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000345 VNInfo *VNI) {
Benjamin Kramerbc6666b2013-05-23 15:42:57 +0000346 SibValueMap::value_type *SVI = &*SVIIter;
347
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000348 // When VNI is non-NULL, add it to SVI's deps, and only propagate to that.
349 TinyPtrVector<VNInfo*> FirstDeps;
350 if (VNI) {
351 FirstDeps.push_back(VNI);
352 SVI->second.Deps.push_back(VNI);
353 }
354
355 // Has the value been completely determined yet? If not, defer propagation.
356 if (!SVI->second.hasDef())
357 return;
358
Benjamin Kramerbc6666b2013-05-23 15:42:57 +0000359 // Work list of values to propagate.
360 SmallSetVector<SibValueMap::value_type *, 8> WorkList;
361 WorkList.insert(SVI);
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000362
363 do {
364 SVI = WorkList.pop_back_val();
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000365 TinyPtrVector<VNInfo*> *Deps = VNI ? &FirstDeps : &SVI->second.Deps;
Craig Topperc0196b12014-04-14 00:51:57 +0000366 VNI = nullptr;
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000367
368 SibValueInfo &SV = SVI->second;
369 if (!SV.SpillMBB)
370 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def);
371
372 DEBUG(dbgs() << " prop to " << Deps->size() << ": "
373 << SVI->first->id << '@' << SVI->first->def << ":\t" << SV);
374
375 assert(SV.hasDef() && "Propagating undefined value");
376
377 // Should this value be propagated as a preferred spill candidate? We don't
378 // propagate values of registers that are about to spill.
Jakob Stoklund Olesenbceb9e52011-09-15 21:06:00 +0000379 bool PropSpill = !DisableHoisting && !isRegToSpill(SV.SpillReg);
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000380 unsigned SpillDepth = ~0u;
381
382 for (TinyPtrVector<VNInfo*>::iterator DepI = Deps->begin(),
383 DepE = Deps->end(); DepI != DepE; ++DepI) {
384 SibValueMap::iterator DepSVI = SibValues.find(*DepI);
385 assert(DepSVI != SibValues.end() && "Dependent value not in SibValues");
386 SibValueInfo &DepSV = DepSVI->second;
387 if (!DepSV.SpillMBB)
388 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def);
389
390 bool Changed = false;
391
392 // Propagate defining instruction.
393 if (!DepSV.hasDef()) {
394 Changed = true;
395 DepSV.DefMI = SV.DefMI;
396 DepSV.DefByOrigPHI = SV.DefByOrigPHI;
397 }
398
399 // Propagate AllDefsAreReloads. For PHI values, this computes an AND of
400 // all predecessors.
401 if (!SV.AllDefsAreReloads && DepSV.AllDefsAreReloads) {
402 Changed = true;
403 DepSV.AllDefsAreReloads = false;
404 }
405
406 // Propagate best spill value.
407 if (PropSpill && SV.SpillVNI != DepSV.SpillVNI) {
408 if (SV.SpillMBB == DepSV.SpillMBB) {
409 // DepSV is in the same block. Hoist when dominated.
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +0000410 if (DepSV.KillsSource && SV.SpillVNI->def < DepSV.SpillVNI->def) {
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000411 // This is an alternative def earlier in the same MBB.
412 // Hoist the spill as far as possible in SpillMBB. This can ease
413 // register pressure:
414 //
415 // x = def
416 // y = use x
417 // s = copy x
418 //
419 // Hoisting the spill of s to immediately after the def removes the
420 // interference between x and y:
421 //
422 // x = def
423 // spill x
424 // y = use x<kill>
425 //
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +0000426 // This hoist only helps when the DepSV copy kills its source.
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000427 Changed = true;
428 DepSV.SpillReg = SV.SpillReg;
429 DepSV.SpillVNI = SV.SpillVNI;
430 DepSV.SpillMBB = SV.SpillMBB;
431 }
432 } else {
433 // DepSV is in a different block.
434 if (SpillDepth == ~0u)
435 SpillDepth = Loops.getLoopDepth(SV.SpillMBB);
436
437 // Also hoist spills to blocks with smaller loop depth, but make sure
438 // that the new value dominates. Non-phi dependents are always
439 // dominated, phis need checking.
Manman Renc9355602014-03-21 21:46:24 +0000440
441 const BranchProbability MarginProb(4, 5); // 80%
442 // Hoist a spill to outer loop if there are multiple dependents (it
443 // can be beneficial if more than one dependents are hoisted) or
444 // if DepSV (the hoisting source) is hotter than SV (the hoisting
445 // destination) (we add a 80% margin to bias a little towards
446 // loop depth).
447 bool HoistCondition =
448 (MBFI.getBlockFreq(DepSV.SpillMBB) >=
449 (MBFI.getBlockFreq(SV.SpillMBB) * MarginProb)) ||
450 Deps->size() > 1;
451
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000452 if ((Loops.getLoopDepth(DepSV.SpillMBB) > SpillDepth) &&
Manman Renc9355602014-03-21 21:46:24 +0000453 HoistCondition &&
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000454 (!DepSVI->first->isPHIDef() ||
455 MDT.dominates(SV.SpillMBB, DepSV.SpillMBB))) {
456 Changed = true;
457 DepSV.SpillReg = SV.SpillReg;
458 DepSV.SpillVNI = SV.SpillVNI;
459 DepSV.SpillMBB = SV.SpillMBB;
460 }
461 }
462 }
463
464 if (!Changed)
465 continue;
466
467 // Something changed in DepSVI. Propagate to dependents.
Benjamin Kramerbc6666b2013-05-23 15:42:57 +0000468 WorkList.insert(&*DepSVI);
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000469
470 DEBUG(dbgs() << " update " << DepSVI->first->id << '@'
471 << DepSVI->first->def << " to:\t" << DepSV);
472 }
473 } while (!WorkList.empty());
474}
475
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000476/// traceSiblingValue - Trace a value that is about to be spilled back to the
477/// real defining instructions by looking through sibling copies. Always stay
478/// within the range of OrigVNI so the registers are known to carry the same
479/// value.
480///
481/// Determine if the value is defined by all reloads, so spilling isn't
482/// necessary - the value is already in the stack slot.
483///
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000484/// Return a defining instruction that may be a candidate for rematerialization.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000485///
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000486MachineInstr *InlineSpiller::traceSiblingValue(unsigned UseReg, VNInfo *UseVNI,
487 VNInfo *OrigVNI) {
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000488 // Check if a cached value already exists.
489 SibValueMap::iterator SVI;
490 bool Inserted;
Benjamin Kramerd6f1f842014-03-02 13:30:33 +0000491 std::tie(SVI, Inserted) =
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000492 SibValues.insert(std::make_pair(UseVNI, SibValueInfo(UseReg, UseVNI)));
493 if (!Inserted) {
494 DEBUG(dbgs() << "Cached value " << PrintReg(UseReg) << ':'
495 << UseVNI->id << '@' << UseVNI->def << ' ' << SVI->second);
496 return SVI->second.DefMI;
497 }
498
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000499 DEBUG(dbgs() << "Tracing value " << PrintReg(UseReg) << ':'
500 << UseVNI->id << '@' << UseVNI->def << '\n');
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000501
502 // List of (Reg, VNI) that have been inserted into SibValues, but need to be
503 // processed.
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000504 SmallVector<std::pair<unsigned, VNInfo*>, 8> WorkList;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000505 WorkList.push_back(std::make_pair(UseReg, UseVNI));
506
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000507 do {
508 unsigned Reg;
509 VNInfo *VNI;
Benjamin Kramerd6f1f842014-03-02 13:30:33 +0000510 std::tie(Reg, VNI) = WorkList.pop_back_val();
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000511 DEBUG(dbgs() << " " << PrintReg(Reg) << ':' << VNI->id << '@' << VNI->def
512 << ":\t");
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000513
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000514 // First check if this value has already been computed.
515 SVI = SibValues.find(VNI);
516 assert(SVI != SibValues.end() && "Missing SibValues entry");
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000517
518 // Trace through PHI-defs created by live range splitting.
519 if (VNI->isPHIDef()) {
Jakob Stoklund Olesen07b35032011-09-15 16:41:12 +0000520 // Stop at original PHIs. We don't know the value at the predecessors.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000521 if (VNI->def == OrigVNI->def) {
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000522 DEBUG(dbgs() << "orig phi value\n");
523 SVI->second.DefByOrigPHI = true;
524 SVI->second.AllDefsAreReloads = false;
525 propagateSiblingValue(SVI);
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000526 continue;
527 }
Jakob Stoklund Olesen07b35032011-09-15 16:41:12 +0000528
529 // This is a PHI inserted by live range splitting. We could trace the
530 // live-out value from predecessor blocks, but that search can be very
531 // expensive if there are many predecessors and many more PHIs as
532 // generated by tail-dup when it sees an indirectbr. Instead, look at
533 // all the non-PHI defs that have the same value as OrigVNI. They must
534 // jointly dominate VNI->def. This is not optimal since VNI may actually
535 // be jointly dominated by a smaller subset of defs, so there is a change
536 // we will miss a AllDefsAreReloads optimization.
537
538 // Separate all values dominated by OrigVNI into PHIs and non-PHIs.
539 SmallVector<VNInfo*, 8> PHIs, NonPHIs;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000540 LiveInterval &LI = LIS.getInterval(Reg);
Jakob Stoklund Olesen07b35032011-09-15 16:41:12 +0000541 LiveInterval &OrigLI = LIS.getInterval(Original);
542
543 for (LiveInterval::vni_iterator VI = LI.vni_begin(), VE = LI.vni_end();
544 VI != VE; ++VI) {
545 VNInfo *VNI2 = *VI;
546 if (VNI2->isUnused())
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000547 continue;
Jakob Stoklund Olesen07b35032011-09-15 16:41:12 +0000548 if (!OrigLI.containsOneValue() &&
549 OrigLI.getVNInfoAt(VNI2->def) != OrigVNI)
550 continue;
551 if (VNI2->isPHIDef() && VNI2->def != OrigVNI->def)
552 PHIs.push_back(VNI2);
553 else
554 NonPHIs.push_back(VNI2);
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000555 }
Jakob Stoklund Olesen07b35032011-09-15 16:41:12 +0000556 DEBUG(dbgs() << "split phi value, checking " << PHIs.size()
557 << " phi-defs, and " << NonPHIs.size()
558 << " non-phi/orig defs\n");
559
560 // Create entries for all the PHIs. Don't add them to the worklist, we
561 // are processing all of them in one go here.
562 for (unsigned i = 0, e = PHIs.size(); i != e; ++i)
563 SibValues.insert(std::make_pair(PHIs[i], SibValueInfo(Reg, PHIs[i])));
564
565 // Add every PHI as a dependent of all the non-PHIs.
566 for (unsigned i = 0, e = NonPHIs.size(); i != e; ++i) {
567 VNInfo *NonPHI = NonPHIs[i];
568 // Known value? Try an insertion.
Benjamin Kramerd6f1f842014-03-02 13:30:33 +0000569 std::tie(SVI, Inserted) =
Jakob Stoklund Olesen07b35032011-09-15 16:41:12 +0000570 SibValues.insert(std::make_pair(NonPHI, SibValueInfo(Reg, NonPHI)));
571 // Add all the PHIs as dependents of NonPHI.
572 for (unsigned pi = 0, pe = PHIs.size(); pi != pe; ++pi)
573 SVI->second.Deps.push_back(PHIs[pi]);
574 // This is the first time we see NonPHI, add it to the worklist.
575 if (Inserted)
576 WorkList.push_back(std::make_pair(Reg, NonPHI));
577 else
578 // Propagate to all inserted PHIs, not just VNI.
579 propagateSiblingValue(SVI);
580 }
581
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000582 // Next work list item.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000583 continue;
584 }
585
586 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
587 assert(MI && "Missing def");
588
589 // Trace through sibling copies.
590 if (unsigned SrcReg = isFullCopyOf(MI, Reg)) {
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000591 if (isSibling(SrcReg)) {
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000592 LiveInterval &SrcLI = LIS.getInterval(SrcReg);
Matthias Braun88dd0ab2013-10-10 21:28:52 +0000593 LiveQueryResult SrcQ = SrcLI.Query(VNI->def);
Jakob Stoklund Olesen2aeead42012-05-20 02:44:33 +0000594 assert(SrcQ.valueIn() && "Copy from non-existing value");
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +0000595 // Check if this COPY kills its source.
Jakob Stoklund Olesen2aeead42012-05-20 02:44:33 +0000596 SVI->second.KillsSource = SrcQ.isKill();
597 VNInfo *SrcVNI = SrcQ.valueIn();
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000598 DEBUG(dbgs() << "copy of " << PrintReg(SrcReg) << ':'
Jakob Stoklund Olesene8339b22011-09-16 00:03:33 +0000599 << SrcVNI->id << '@' << SrcVNI->def
600 << " kill=" << unsigned(SVI->second.KillsSource) << '\n');
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000601 // Known sibling source value? Try an insertion.
Benjamin Kramerd6f1f842014-03-02 13:30:33 +0000602 std::tie(SVI, Inserted) = SibValues.insert(
603 std::make_pair(SrcVNI, SibValueInfo(SrcReg, SrcVNI)));
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000604 // This is the first time we see Src, add it to the worklist.
605 if (Inserted)
606 WorkList.push_back(std::make_pair(SrcReg, SrcVNI));
607 propagateSiblingValue(SVI, VNI);
608 // Next work list item.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000609 continue;
610 }
611 }
612
613 // Track reachable reloads.
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000614 SVI->second.DefMI = MI;
615 SVI->second.SpillMBB = MI->getParent();
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000616 int FI;
617 if (Reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) {
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000618 DEBUG(dbgs() << "reload\n");
619 propagateSiblingValue(SVI);
620 // Next work list item.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000621 continue;
622 }
623
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000624 // Potential remat candidate.
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000625 DEBUG(dbgs() << "def " << *MI);
626 SVI->second.AllDefsAreReloads = false;
627 propagateSiblingValue(SVI);
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000628 } while (!WorkList.empty());
629
Logan Chien64f361e2012-09-01 12:11:41 +0000630 // Look up the value we were looking for. We already did this lookup at the
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000631 // top of the function, but SibValues may have been invalidated.
632 SVI = SibValues.find(UseVNI);
633 assert(SVI != SibValues.end() && "Didn't compute requested info");
634 DEBUG(dbgs() << " traced to:\t" << SVI->second);
635 return SVI->second.DefMI;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000636}
637
638/// analyzeSiblingValues - Trace values defined by sibling copies back to
639/// something that isn't a sibling copy.
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000640///
641/// Keep track of values that may be rematerializable.
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000642void InlineSpiller::analyzeSiblingValues() {
643 SibValues.clear();
644
645 // No siblings at all?
646 if (Edit->getReg() == Original)
647 return;
648
649 LiveInterval &OrigLI = LIS.getInterval(Original);
650 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
651 unsigned Reg = RegsToSpill[i];
652 LiveInterval &LI = LIS.getInterval(Reg);
653 for (LiveInterval::const_vni_iterator VI = LI.vni_begin(),
654 VE = LI.vni_end(); VI != VE; ++VI) {
655 VNInfo *VNI = *VI;
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000656 if (VNI->isUnused())
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000657 continue;
Craig Topperc0196b12014-04-14 00:51:57 +0000658 MachineInstr *DefMI = nullptr;
Jakob Stoklund Olesenad6b22e2012-02-04 05:20:49 +0000659 if (!VNI->isPHIDef()) {
660 DefMI = LIS.getInstructionFromIndex(VNI->def);
661 assert(DefMI && "No defining instruction");
662 }
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000663 // Check possible sibling copies.
Jakob Stoklund Olesenad6b22e2012-02-04 05:20:49 +0000664 if (VNI->isPHIDef() || DefMI->isCopy()) {
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000665 VNInfo *OrigVNI = OrigLI.getVNInfoAt(VNI->def);
Jakob Stoklund Olesenbbad3bc2011-07-05 15:38:41 +0000666 assert(OrigVNI && "Def outside original live range");
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000667 if (OrigVNI->def != VNI->def)
668 DefMI = traceSiblingValue(Reg, VNI, OrigVNI);
669 }
Pete Cooper2bde2f42012-04-02 22:22:53 +0000670 if (DefMI && Edit->checkRematerializable(VNI, DefMI, AA)) {
Jakob Stoklund Olesen86e53ce2011-04-20 22:14:20 +0000671 DEBUG(dbgs() << "Value " << PrintReg(Reg) << ':' << VNI->id << '@'
672 << VNI->def << " may remat from " << *DefMI);
673 }
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +0000674 }
675 }
676}
677
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000678/// hoistSpill - Given a sibling copy that defines a value to be spilled, insert
679/// a spill at a better location.
680bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI) {
681 SlotIndex Idx = LIS.getInstructionIndex(CopyMI);
Jakob Stoklund Olesen90b5e562011-11-13 20:45:27 +0000682 VNInfo *VNI = SpillLI.getVNInfoAt(Idx.getRegSlot());
683 assert(VNI && VNI->def == Idx.getRegSlot() && "Not defined by copy");
Jakob Stoklund Olesenec9b4a62011-04-30 06:42:21 +0000684 SibValueMap::iterator I = SibValues.find(VNI);
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000685 if (I == SibValues.end())
686 return false;
687
688 const SibValueInfo &SVI = I->second;
689
690 // Let the normal folding code deal with the boring case.
691 if (!SVI.AllDefsAreReloads && SVI.SpillVNI == VNI)
692 return false;
693
Jakob Stoklund Olesenec9b4a62011-04-30 06:42:21 +0000694 // SpillReg may have been deleted by remat and DCE.
695 if (!LIS.hasInterval(SVI.SpillReg)) {
696 DEBUG(dbgs() << "Stale interval: " << PrintReg(SVI.SpillReg) << '\n');
697 SibValues.erase(I);
698 return false;
699 }
700
701 LiveInterval &SibLI = LIS.getInterval(SVI.SpillReg);
702 if (!SibLI.containsValue(SVI.SpillVNI)) {
703 DEBUG(dbgs() << "Stale value: " << PrintReg(SVI.SpillReg) << '\n');
704 SibValues.erase(I);
705 return false;
706 }
707
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000708 // Conservatively extend the stack slot range to the range of the original
709 // value. We may be able to do better with stack slot coloring by being more
710 // careful here.
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +0000711 assert(StackInt && "No stack slot assigned yet.");
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000712 LiveInterval &OrigLI = LIS.getInterval(Original);
713 VNInfo *OrigVNI = OrigLI.getVNInfoAt(Idx);
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +0000714 StackInt->MergeValueInAsValue(OrigLI, OrigVNI, StackInt->getValNumInfo(0));
Jakob Stoklund Olesen86985072011-03-19 23:02:47 +0000715 DEBUG(dbgs() << "\tmerged orig valno " << OrigVNI->id << ": "
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +0000716 << *StackInt << '\n');
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000717
718 // Already spilled everywhere.
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000719 if (SVI.AllDefsAreReloads) {
Jakob Stoklund Olesen278bf022011-09-09 18:11:41 +0000720 DEBUG(dbgs() << "\tno spill needed: " << SVI);
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000721 ++NumOmitReloadSpill;
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000722 return true;
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000723 }
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000724 // We are going to spill SVI.SpillVNI immediately after its def, so clear out
725 // any later spills of the same value.
Jakob Stoklund Olesenec9b4a62011-04-30 06:42:21 +0000726 eliminateRedundantSpills(SibLI, SVI.SpillVNI);
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000727
728 MachineBasicBlock *MBB = LIS.getMBBFromIndex(SVI.SpillVNI->def);
729 MachineBasicBlock::iterator MII;
730 if (SVI.SpillVNI->isPHIDef())
731 MII = MBB->SkipPHIsAndLabels(MBB->begin());
732 else {
Jakob Stoklund Olesenec9b4a62011-04-30 06:42:21 +0000733 MachineInstr *DefMI = LIS.getInstructionFromIndex(SVI.SpillVNI->def);
734 assert(DefMI && "Defining instruction disappeared");
735 MII = DefMI;
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000736 ++MII;
737 }
738 // Insert spill without kill flag immediately after def.
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +0000739 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot,
740 MRI.getRegClass(SVI.SpillReg), &TRI);
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000741 --MII; // Point to store instruction.
742 LIS.InsertMachineInstrInMaps(MII);
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000743 DEBUG(dbgs() << "\thoisted: " << SVI.SpillVNI->def << '\t' << *MII);
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000744
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +0000745 ++NumSpills;
746 ++NumHoists;
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000747 return true;
748}
749
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000750/// eliminateRedundantSpills - SLI:VNI is known to be on the stack. Remove any
751/// redundant spills of this value in SLI.reg and sibling copies.
752void InlineSpiller::eliminateRedundantSpills(LiveInterval &SLI, VNInfo *VNI) {
Jakob Stoklund Olesene55003f2011-03-20 05:44:58 +0000753 assert(VNI && "Missing value");
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000754 SmallVector<std::pair<LiveInterval*, VNInfo*>, 8> WorkList;
755 WorkList.push_back(std::make_pair(&SLI, VNI));
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +0000756 assert(StackInt && "No stack slot assigned yet.");
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000757
758 do {
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000759 LiveInterval *LI;
Benjamin Kramerd6f1f842014-03-02 13:30:33 +0000760 std::tie(LI, VNI) = WorkList.pop_back_val();
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000761 unsigned Reg = LI->reg;
Jakob Stoklund Olesenec9b4a62011-04-30 06:42:21 +0000762 DEBUG(dbgs() << "Checking redundant spills for "
763 << VNI->id << '@' << VNI->def << " in " << *LI << '\n');
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000764
765 // Regs to spill are taken care of.
766 if (isRegToSpill(Reg))
767 continue;
768
769 // Add all of VNI's live range to StackInt.
Jakob Stoklund Olesene4663452011-03-26 22:16:41 +0000770 StackInt->MergeValueInAsValue(*LI, VNI, StackInt->getValNumInfo(0));
771 DEBUG(dbgs() << "Merged to stack int: " << *StackInt << '\n');
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000772
773 // Find all spills and copies of VNI.
Owen Andersonabb90c92014-03-13 06:02:25 +0000774 for (MachineRegisterInfo::use_instr_nodbg_iterator
775 UI = MRI.use_instr_nodbg_begin(Reg), E = MRI.use_instr_nodbg_end();
776 UI != E; ) {
777 MachineInstr *MI = &*(UI++);
Evan Cheng7f8e5632011-12-07 07:15:52 +0000778 if (!MI->isCopy() && !MI->mayStore())
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000779 continue;
780 SlotIndex Idx = LIS.getInstructionIndex(MI);
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000781 if (LI->getVNInfoAt(Idx) != VNI)
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000782 continue;
783
784 // Follow sibling copies down the dominator tree.
785 if (unsigned DstReg = isFullCopyOf(MI, Reg)) {
786 if (isSibling(DstReg)) {
787 LiveInterval &DstLI = LIS.getInterval(DstReg);
Jakob Stoklund Olesen90b5e562011-11-13 20:45:27 +0000788 VNInfo *DstVNI = DstLI.getVNInfoAt(Idx.getRegSlot());
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000789 assert(DstVNI && "Missing defined value");
Jakob Stoklund Olesen90b5e562011-11-13 20:45:27 +0000790 assert(DstVNI->def == Idx.getRegSlot() && "Wrong copy def slot");
Jakob Stoklund Olesen39488642011-03-20 05:44:55 +0000791 WorkList.push_back(std::make_pair(&DstLI, DstVNI));
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000792 }
793 continue;
794 }
795
796 // Erase spills.
797 int FI;
798 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) {
799 DEBUG(dbgs() << "Redundant spill " << Idx << '\t' << *MI);
800 // eliminateDeadDefs won't normally remove stores, so switch opcode.
801 MI->setDesc(TII.get(TargetOpcode::KILL));
802 DeadDefs.push_back(MI);
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +0000803 ++NumSpillsRemoved;
804 --NumSpills;
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +0000805 }
806 }
807 } while (!WorkList.empty());
808}
809
Jakob Stoklund Olesen2edaa2f2010-10-20 22:00:51 +0000810
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000811//===----------------------------------------------------------------------===//
812// Rematerialization
813//===----------------------------------------------------------------------===//
814
815/// markValueUsed - Remember that VNI failed to rematerialize, so its defining
816/// instruction cannot be eliminated. See through snippet copies
817void InlineSpiller::markValueUsed(LiveInterval *LI, VNInfo *VNI) {
818 SmallVector<std::pair<LiveInterval*, VNInfo*>, 8> WorkList;
819 WorkList.push_back(std::make_pair(LI, VNI));
820 do {
Benjamin Kramerd6f1f842014-03-02 13:30:33 +0000821 std::tie(LI, VNI) = WorkList.pop_back_val();
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000822 if (!UsedValues.insert(VNI))
823 continue;
824
825 if (VNI->isPHIDef()) {
826 MachineBasicBlock *MBB = LIS.getMBBFromIndex(VNI->def);
827 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
828 PE = MBB->pred_end(); PI != PE; ++PI) {
Jakob Stoklund Olesend7bcf432011-11-14 01:39:36 +0000829 VNInfo *PVNI = LI->getVNInfoBefore(LIS.getMBBEndIdx(*PI));
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000830 if (PVNI)
831 WorkList.push_back(std::make_pair(LI, PVNI));
832 }
833 continue;
834 }
835
836 // Follow snippet copies.
837 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
838 if (!SnippetCopies.count(MI))
839 continue;
840 LiveInterval &SnipLI = LIS.getInterval(MI->getOperand(1).getReg());
841 assert(isRegToSpill(SnipLI.reg) && "Unexpected register in copy");
Jakob Stoklund Olesen90b5e562011-11-13 20:45:27 +0000842 VNInfo *SnipVNI = SnipLI.getVNInfoAt(VNI->def.getRegSlot(true));
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000843 assert(SnipVNI && "Snippet undefined before copy");
844 WorkList.push_back(std::make_pair(&SnipLI, SnipVNI));
845 } while (!WorkList.empty());
846}
847
848/// reMaterializeFor - Attempt to rematerialize before MI instead of reloading.
849bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg,
850 MachineBasicBlock::iterator MI) {
Jakob Stoklund Olesen90b5e562011-11-13 20:45:27 +0000851 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true);
Jakob Stoklund Olesenc0dd3da2011-07-18 05:31:59 +0000852 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex());
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000853
854 if (!ParentVNI) {
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000855 DEBUG(dbgs() << "\tadding <undef> flags: ");
856 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
857 MachineOperand &MO = MI->getOperand(i);
Jakob Stoklund Olesen0ed9ebc2011-03-29 17:47:02 +0000858 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg)
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000859 MO.setIsUndef();
860 }
861 DEBUG(dbgs() << UseIdx << '\t' << *MI);
862 return true;
863 }
Jakob Stoklund Olesen2edaa2f2010-10-20 22:00:51 +0000864
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000865 if (SnippetCopies.count(MI))
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000866 return false;
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000867
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000868 // Use an OrigVNI from traceSiblingValue when ParentVNI is a sibling copy.
869 LiveRangeEdit::Remat RM(ParentVNI);
870 SibValueMap::const_iterator SibI = SibValues.find(ParentVNI);
871 if (SibI != SibValues.end())
872 RM.OrigMI = SibI->second.DefMI;
Pete Cooper2bde2f42012-04-02 22:22:53 +0000873 if (!Edit->canRematerializeAt(RM, UseIdx, false)) {
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000874 markValueUsed(&VirtReg, ParentVNI);
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000875 DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI);
876 return false;
877 }
878
Jakob Stoklund Olesen0ed9ebc2011-03-29 17:47:02 +0000879 // If the instruction also writes VirtReg.reg, it had better not require the
880 // same register for uses and defs.
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +0000881 SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops;
James Molloy381fab92012-09-12 10:03:31 +0000882 MIBundleOperands::VirtRegInfo RI =
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +0000883 MIBundleOperands(MI).analyzeVirtReg(VirtReg.reg, &Ops);
884 if (RI.Tied) {
885 markValueUsed(&VirtReg, ParentVNI);
886 DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << *MI);
887 return false;
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000888 }
889
Jakob Stoklund Olesen3b2966d2010-12-18 03:04:14 +0000890 // Before rematerializing into a register for a single instruction, try to
891 // fold a load into the instruction. That avoids allocating a new register.
Evan Cheng7f8e5632011-12-07 07:15:52 +0000892 if (RM.OrigMI->canFoldAsLoad() &&
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +0000893 foldMemoryOperand(Ops, RM.OrigMI)) {
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000894 Edit->markRematerialized(RM.ParentVNI);
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000895 ++NumFoldedLoads;
Jakob Stoklund Olesen3b2966d2010-12-18 03:04:14 +0000896 return true;
897 }
898
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000899 // Alocate a new register for the remat.
Mark Lacey9d8103d2013-08-14 23:50:16 +0000900 unsigned NewVReg = Edit->createFrom(Original);
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000901
902 // Finally we can rematerialize OrigMI before MI.
Mark Lacey9d8103d2013-08-14 23:50:16 +0000903 SlotIndex DefIdx = Edit->rematerializeAt(*MI->getParent(), MI, NewVReg, RM,
Pete Cooper2bde2f42012-04-02 22:22:53 +0000904 TRI);
Mark Lacey9d8103d2013-08-14 23:50:16 +0000905 (void)DefIdx;
Jakob Stoklund Olesenc6a20412011-02-08 19:33:55 +0000906 DEBUG(dbgs() << "\tremat: " << DefIdx << '\t'
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000907 << *LIS.getInstructionFromIndex(DefIdx));
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000908
909 // Replace operands
910 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +0000911 MachineOperand &MO = MI->getOperand(Ops[i].second);
Jakob Stoklund Olesen0ed9ebc2011-03-29 17:47:02 +0000912 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) {
Mark Lacey9d8103d2013-08-14 23:50:16 +0000913 MO.setReg(NewVReg);
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000914 MO.setIsKill();
915 }
916 }
Mark Lacey9d8103d2013-08-14 23:50:16 +0000917 DEBUG(dbgs() << "\t " << UseIdx << '\t' << *MI << '\n');
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000918
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +0000919 ++NumRemats;
Jakob Stoklund Olesenbde96ad2010-06-30 23:03:52 +0000920 return true;
921}
922
Jakob Stoklund Olesen72911e42010-10-14 23:49:52 +0000923/// reMaterializeAll - Try to rematerialize as many uses as possible,
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000924/// and trim the live ranges after.
925void InlineSpiller::reMaterializeAll() {
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000926 // analyzeSiblingValues has already tested all relevant defining instructions.
Pete Cooper2bde2f42012-04-02 22:22:53 +0000927 if (!Edit->anyRematerializable(AA))
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000928 return;
929
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000930 UsedValues.clear();
Jakob Stoklund Olesen2edaa2f2010-10-20 22:00:51 +0000931
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000932 // Try to remat before all uses of snippets.
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000933 bool anyRemat = false;
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000934 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
935 unsigned Reg = RegsToSpill[i];
936 LiveInterval &LI = LIS.getInterval(Reg);
Owen Andersonabb90c92014-03-13 06:02:25 +0000937 for (MachineRegisterInfo::use_bundle_nodbg_iterator
938 RI = MRI.use_bundle_nodbg_begin(Reg), E = MRI.use_bundle_nodbg_end();
939 RI != E; ) {
940 MachineInstr *MI = &*(RI++);
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000941 anyRemat |= reMaterializeFor(LI, MI);
Owen Andersonabb90c92014-03-13 06:02:25 +0000942 }
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000943 }
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000944 if (!anyRemat)
945 return;
946
947 // Remove any values that were completely rematted.
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000948 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
949 unsigned Reg = RegsToSpill[i];
950 LiveInterval &LI = LIS.getInterval(Reg);
951 for (LiveInterval::vni_iterator I = LI.vni_begin(), E = LI.vni_end();
952 I != E; ++I) {
953 VNInfo *VNI = *I;
Jakob Stoklund Olesenadd79c62011-03-29 17:47:00 +0000954 if (VNI->isUnused() || VNI->isPHIDef() || UsedValues.count(VNI))
Jakob Stoklund Olesencf6c5c92010-07-02 19:54:40 +0000955 continue;
Jakob Stoklund Olesend8af5292011-03-29 03:12:02 +0000956 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
957 MI->addRegisterDead(Reg, &TRI);
958 if (!MI->allDefsAreDead())
959 continue;
960 DEBUG(dbgs() << "All defs dead: " << *MI);
961 DeadDefs.push_back(MI);
Jakob Stoklund Olesencf6c5c92010-07-02 19:54:40 +0000962 }
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000963 }
Jakob Stoklund Olesenadd79c62011-03-29 17:47:00 +0000964
965 // Eliminate dead code after remat. Note that some snippet copies may be
966 // deleted here.
967 if (DeadDefs.empty())
968 return;
969 DEBUG(dbgs() << "Remat created " << DeadDefs.size() << " dead defs.\n");
Pete Cooper2bde2f42012-04-02 22:22:53 +0000970 Edit->eliminateDeadDefs(DeadDefs, RegsToSpill);
Jakob Stoklund Olesenadd79c62011-03-29 17:47:00 +0000971
972 // Get rid of deleted and empty intervals.
Benjamin Kramer391f5a62013-05-05 11:29:14 +0000973 unsigned ResultPos = 0;
974 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
975 unsigned Reg = RegsToSpill[i];
976 if (!LIS.hasInterval(Reg))
977 continue;
978
979 LiveInterval &LI = LIS.getInterval(Reg);
980 if (LI.empty()) {
981 Edit->eraseVirtReg(Reg);
Jakob Stoklund Olesenadd79c62011-03-29 17:47:00 +0000982 continue;
983 }
Benjamin Kramer391f5a62013-05-05 11:29:14 +0000984
985 RegsToSpill[ResultPos++] = Reg;
Jakob Stoklund Olesenadd79c62011-03-29 17:47:00 +0000986 }
Benjamin Kramer391f5a62013-05-05 11:29:14 +0000987 RegsToSpill.erase(RegsToSpill.begin() + ResultPos, RegsToSpill.end());
Jakob Stoklund Olesenadd79c62011-03-29 17:47:00 +0000988 DEBUG(dbgs() << RegsToSpill.size() << " registers to spill after remat.\n");
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +0000989}
990
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +0000991
992//===----------------------------------------------------------------------===//
993// Spilling
994//===----------------------------------------------------------------------===//
995
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +0000996/// If MI is a load or store of StackSlot, it can be removed.
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +0000997bool InlineSpiller::coalesceStackAccess(MachineInstr *MI, unsigned Reg) {
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +0000998 int FI = 0;
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +0000999 unsigned InstrReg = TII.isLoadFromStackSlot(MI, FI);
1000 bool IsLoad = InstrReg;
1001 if (!IsLoad)
1002 InstrReg = TII.isStoreToStackSlot(MI, FI);
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +00001003
1004 // We have a stack access. Is it the right register and slot?
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001005 if (InstrReg != Reg || FI != StackSlot)
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +00001006 return false;
1007
1008 DEBUG(dbgs() << "Coalescing stack access: " << *MI);
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001009 LIS.RemoveMachineInstrFromMaps(MI);
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +00001010 MI->eraseFromParent();
Jakob Stoklund Olesen37eb6962011-09-15 17:54:28 +00001011
1012 if (IsLoad) {
1013 ++NumReloadsRemoved;
1014 --NumReloads;
1015 } else {
1016 ++NumSpillsRemoved;
1017 --NumSpills;
1018 }
1019
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +00001020 return true;
1021}
1022
Mark Lacey9d8103d2013-08-14 23:50:16 +00001023#if !defined(NDEBUG)
1024// Dump the range of instructions from B to E with their slot indexes.
1025static void dumpMachineInstrRangeWithSlotIndex(MachineBasicBlock::iterator B,
1026 MachineBasicBlock::iterator E,
1027 LiveIntervals const &LIS,
1028 const char *const header,
1029 unsigned VReg =0) {
1030 char NextLine = '\n';
1031 char SlotIndent = '\t';
1032
Benjamin Kramerb6d0bd42014-03-02 12:27:27 +00001033 if (std::next(B) == E) {
Mark Lacey9d8103d2013-08-14 23:50:16 +00001034 NextLine = ' ';
1035 SlotIndent = ' ';
1036 }
1037
1038 dbgs() << '\t' << header << ": " << NextLine;
1039
1040 for (MachineBasicBlock::iterator I = B; I != E; ++I) {
1041 SlotIndex Idx = LIS.getInstructionIndex(I).getRegSlot();
1042
1043 // If a register was passed in and this instruction has it as a
1044 // destination that is marked as an early clobber, print the
1045 // early-clobber slot index.
1046 if (VReg) {
1047 MachineOperand *MO = I->findRegisterDefOperand(VReg);
1048 if (MO && MO->isEarlyClobber())
1049 Idx = Idx.getRegSlot(true);
1050 }
1051
1052 dbgs() << SlotIndent << Idx << '\t' << *I;
1053 }
1054}
1055#endif
1056
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001057/// foldMemoryOperand - Try folding stack slot references in Ops into their
1058/// instructions.
1059///
1060/// @param Ops Operand indices from analyzeVirtReg().
Jakob Stoklund Olesen3b2966d2010-12-18 03:04:14 +00001061/// @param LoadMI Load instruction to use instead of stack slot when non-null.
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001062/// @return True on success.
1063bool InlineSpiller::
1064foldMemoryOperand(ArrayRef<std::pair<MachineInstr*, unsigned> > Ops,
1065 MachineInstr *LoadMI) {
1066 if (Ops.empty())
1067 return false;
1068 // Don't attempt folding in bundles.
1069 MachineInstr *MI = Ops.front().first;
1070 if (Ops.back().first != MI || MI->isBundled())
1071 return false;
1072
Jakob Stoklund Olesenc94c9672011-09-15 18:22:52 +00001073 bool WasCopy = MI->isCopy();
Jakob Stoklund Oleseneef48b62011-11-10 00:17:03 +00001074 unsigned ImpReg = 0;
1075
Andrew Trick10d5be42013-11-17 01:36:23 +00001076 bool SpillSubRegs = (MI->getOpcode() == TargetOpcode::PATCHPOINT ||
1077 MI->getOpcode() == TargetOpcode::STACKMAP);
1078
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001079 // TargetInstrInfo::foldMemoryOperand only expects explicit, non-tied
1080 // operands.
1081 SmallVector<unsigned, 8> FoldOps;
1082 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001083 unsigned Idx = Ops[i].second;
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001084 MachineOperand &MO = MI->getOperand(Idx);
Jakob Stoklund Oleseneef48b62011-11-10 00:17:03 +00001085 if (MO.isImplicit()) {
1086 ImpReg = MO.getReg();
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001087 continue;
Jakob Stoklund Oleseneef48b62011-11-10 00:17:03 +00001088 }
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001089 // FIXME: Teach targets to deal with subregs.
Andrew Trick10d5be42013-11-17 01:36:23 +00001090 if (!SpillSubRegs && MO.getSubReg())
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001091 return false;
Jakob Stoklund Olesenc6a20412011-02-08 19:33:55 +00001092 // We cannot fold a load instruction into a def.
1093 if (LoadMI && MO.isDef())
1094 return false;
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001095 // Tied use operands should not be passed to foldMemoryOperand.
1096 if (!MI->isRegTiedToDefOperand(Idx))
1097 FoldOps.push_back(Idx);
1098 }
1099
Mark Lacey9d8103d2013-08-14 23:50:16 +00001100 MachineInstrSpan MIS(MI);
1101
Jakob Stoklund Olesen3b2966d2010-12-18 03:04:14 +00001102 MachineInstr *FoldMI =
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001103 LoadMI ? TII.foldMemoryOperand(MI, FoldOps, LoadMI)
1104 : TII.foldMemoryOperand(MI, FoldOps, StackSlot);
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001105 if (!FoldMI)
1106 return false;
Andrew Trick5749b8b2013-06-21 18:33:26 +00001107
1108 // Remove LIS for any dead defs in the original MI not in FoldMI.
1109 for (MIBundleOperands MO(MI); MO.isValid(); ++MO) {
1110 if (!MO->isReg())
1111 continue;
1112 unsigned Reg = MO->getReg();
1113 if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg) ||
1114 MRI.isReserved(Reg)) {
1115 continue;
1116 }
Andrew Trickdfacda32014-01-07 07:31:10 +00001117 // Skip non-Defs, including undef uses and internal reads.
1118 if (MO->isUse())
1119 continue;
Andrew Trick5749b8b2013-06-21 18:33:26 +00001120 MIBundleOperands::PhysRegInfo RI =
1121 MIBundleOperands(FoldMI).analyzePhysReg(Reg, &TRI);
Andrew Trick5749b8b2013-06-21 18:33:26 +00001122 if (RI.Defines)
1123 continue;
1124 // FoldMI does not define this physreg. Remove the LI segment.
1125 assert(MO->isDead() && "Cannot fold physreg def");
1126 for (MCRegUnitIterator Units(Reg, &TRI); Units.isValid(); ++Units) {
Matthias Braun34e1be92013-10-10 21:29:02 +00001127 if (LiveRange *LR = LIS.getCachedRegUnit(*Units)) {
Andrew Trick5749b8b2013-06-21 18:33:26 +00001128 SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot();
Matthias Braun34e1be92013-10-10 21:29:02 +00001129 if (VNInfo *VNI = LR->getVNInfoAt(Idx))
1130 LR->removeValNo(VNI);
Andrew Trick5749b8b2013-06-21 18:33:26 +00001131 }
1132 }
1133 }
Mark Lacey9d8103d2013-08-14 23:50:16 +00001134
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001135 LIS.ReplaceMachineInstrInMaps(MI, FoldMI);
Jakob Stoklund Olesenbd953d12010-07-09 17:29:08 +00001136 MI->eraseFromParent();
Jakob Stoklund Oleseneef48b62011-11-10 00:17:03 +00001137
Mark Lacey9d8103d2013-08-14 23:50:16 +00001138 // Insert any new instructions other than FoldMI into the LIS maps.
1139 assert(!MIS.empty() && "Unexpected empty span of instructions!");
1140 for (MachineBasicBlock::iterator MII = MIS.begin(), End = MIS.end();
1141 MII != End; ++MII)
1142 if (&*MII != FoldMI)
1143 LIS.InsertMachineInstrInMaps(&*MII);
1144
Jakob Stoklund Oleseneef48b62011-11-10 00:17:03 +00001145 // TII.foldMemoryOperand may have left some implicit operands on the
1146 // instruction. Strip them.
1147 if (ImpReg)
1148 for (unsigned i = FoldMI->getNumOperands(); i; --i) {
1149 MachineOperand &MO = FoldMI->getOperand(i - 1);
1150 if (!MO.isReg() || !MO.isImplicit())
1151 break;
1152 if (MO.getReg() == ImpReg)
1153 FoldMI->RemoveOperand(i - 1);
1154 }
1155
Mark Lacey9d8103d2013-08-14 23:50:16 +00001156 DEBUG(dumpMachineInstrRangeWithSlotIndex(MIS.begin(), MIS.end(), LIS,
1157 "folded"));
1158
Jakob Stoklund Olesenc94c9672011-09-15 18:22:52 +00001159 if (!WasCopy)
1160 ++NumFolded;
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001161 else if (Ops.front().second == 0)
Jakob Stoklund Olesenc94c9672011-09-15 18:22:52 +00001162 ++NumSpills;
1163 else
1164 ++NumReloads;
Jakob Stoklund Olesen8656a452010-07-01 00:13:04 +00001165 return true;
1166}
1167
Mark Lacey9d8103d2013-08-14 23:50:16 +00001168void InlineSpiller::insertReload(unsigned NewVReg,
Jakob Stoklund Olesen9f294a92011-04-18 20:23:27 +00001169 SlotIndex Idx,
Jakob Stoklund Olesenbde96ad2010-06-30 23:03:52 +00001170 MachineBasicBlock::iterator MI) {
1171 MachineBasicBlock &MBB = *MI->getParent();
Mark Lacey9d8103d2013-08-14 23:50:16 +00001172
1173 MachineInstrSpan MIS(MI);
1174 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot,
1175 MRI.getRegClass(NewVReg), &TRI);
1176
1177 LIS.InsertMachineInstrRangeInMaps(MIS.begin(), MI);
1178
1179 DEBUG(dumpMachineInstrRangeWithSlotIndex(MIS.begin(), MI, LIS, "reload",
1180 NewVReg));
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +00001181 ++NumReloads;
Jakob Stoklund Olesenbde96ad2010-06-30 23:03:52 +00001182}
1183
Mark Lacey9d8103d2013-08-14 23:50:16 +00001184/// insertSpill - Insert a spill of NewVReg after MI.
1185void InlineSpiller::insertSpill(unsigned NewVReg, bool isKill,
1186 MachineBasicBlock::iterator MI) {
Jakob Stoklund Olesenbde96ad2010-06-30 23:03:52 +00001187 MachineBasicBlock &MBB = *MI->getParent();
Mark Lacey9d8103d2013-08-14 23:50:16 +00001188
1189 MachineInstrSpan MIS(MI);
Benjamin Kramerb6d0bd42014-03-02 12:27:27 +00001190 TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot,
Mark Lacey9d8103d2013-08-14 23:50:16 +00001191 MRI.getRegClass(NewVReg), &TRI);
1192
Benjamin Kramerb6d0bd42014-03-02 12:27:27 +00001193 LIS.InsertMachineInstrRangeInMaps(std::next(MI), MIS.end());
Mark Lacey9d8103d2013-08-14 23:50:16 +00001194
Benjamin Kramerb6d0bd42014-03-02 12:27:27 +00001195 DEBUG(dumpMachineInstrRangeWithSlotIndex(std::next(MI), MIS.end(), LIS,
Mark Lacey9d8103d2013-08-14 23:50:16 +00001196 "spill"));
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +00001197 ++NumSpills;
Jakob Stoklund Olesenbde96ad2010-06-30 23:03:52 +00001198}
1199
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001200/// spillAroundUses - insert spill code around each use of Reg.
1201void InlineSpiller::spillAroundUses(unsigned Reg) {
Jakob Stoklund Olesen31a0b5e2011-05-11 18:25:10 +00001202 DEBUG(dbgs() << "spillAroundUses " << PrintReg(Reg) << '\n');
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001203 LiveInterval &OldLI = LIS.getInterval(Reg);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001204
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001205 // Iterate over instructions using Reg.
Owen Andersonabb90c92014-03-13 06:02:25 +00001206 for (MachineRegisterInfo::reg_bundle_iterator
1207 RegI = MRI.reg_bundle_begin(Reg), E = MRI.reg_bundle_end();
1208 RegI != E; ) {
Owen Andersonec5d4802014-03-14 05:02:18 +00001209 MachineInstr *MI = &*(RegI++);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001210
Jakob Stoklund Olesencf6c5c92010-07-02 19:54:40 +00001211 // Debug values are not allowed to affect codegen.
1212 if (MI->isDebugValue()) {
1213 // Modify DBG_VALUE now that the value is in a spill slot.
Adrian Prantldb3e26d2013-09-16 23:29:03 +00001214 bool IsIndirect = MI->isIndirectDebugValue();
Adrian Prantlc31ec1c2013-07-10 16:56:47 +00001215 uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
Jakob Stoklund Olesencf6c5c92010-07-02 19:54:40 +00001216 const MDNode *MDPtr = MI->getOperand(2).getMetadata();
1217 DebugLoc DL = MI->getDebugLoc();
David Blaikie0252265b2013-06-16 20:34:15 +00001218 DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << *MI);
1219 MachineBasicBlock *MBB = MI->getParent();
1220 BuildMI(*MBB, MBB->erase(MI), DL, TII.get(TargetOpcode::DBG_VALUE))
1221 .addFrameIndex(StackSlot).addImm(Offset).addMetadata(MDPtr);
Jakob Stoklund Olesencf6c5c92010-07-02 19:54:40 +00001222 continue;
1223 }
1224
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001225 // Ignore copies to/from snippets. We'll delete them.
1226 if (SnippetCopies.count(MI))
1227 continue;
1228
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +00001229 // Stack slot accesses may coalesce away.
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001230 if (coalesceStackAccess(MI, Reg))
Jakob Stoklund Olesen7fd49052010-08-04 22:35:11 +00001231 continue;
1232
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001233 // Analyze instruction.
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001234 SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops;
James Molloy381fab92012-09-12 10:03:31 +00001235 MIBundleOperands::VirtRegInfo RI =
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001236 MIBundleOperands(MI).analyzeVirtReg(Reg, &Ops);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001237
Jakob Stoklund Olesen9f294a92011-04-18 20:23:27 +00001238 // Find the slot index where this instruction reads and writes OldLI.
1239 // This is usually the def slot, except for tied early clobbers.
Jakob Stoklund Olesen90b5e562011-11-13 20:45:27 +00001240 SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot();
1241 if (VNInfo *VNI = OldLI.getVNInfoAt(Idx.getRegSlot(true)))
Jakob Stoklund Olesen9f294a92011-04-18 20:23:27 +00001242 if (SlotIndex::isSameInstr(Idx, VNI->def))
1243 Idx = VNI->def;
1244
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +00001245 // Check for a sibling copy.
1246 unsigned SibReg = isFullCopyOf(MI, Reg);
Jakob Stoklund Olesene55003f2011-03-20 05:44:58 +00001247 if (SibReg && isSibling(SibReg)) {
Jakob Stoklund Olesen31a0b5e2011-05-11 18:25:10 +00001248 // This may actually be a copy between snippets.
1249 if (isRegToSpill(SibReg)) {
1250 DEBUG(dbgs() << "Found new snippet copy: " << *MI);
1251 SnippetCopies.insert(MI);
1252 continue;
1253 }
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001254 if (RI.Writes) {
Jakob Stoklund Olesene55003f2011-03-20 05:44:58 +00001255 // Hoist the spill of a sib-reg copy.
1256 if (hoistSpill(OldLI, MI)) {
1257 // This COPY is now dead, the value is already in the stack slot.
1258 MI->getOperand(0).setIsDead();
1259 DeadDefs.push_back(MI);
1260 continue;
1261 }
1262 } else {
1263 // This is a reload for a sib-reg copy. Drop spills downstream.
Jakob Stoklund Olesene55003f2011-03-20 05:44:58 +00001264 LiveInterval &SibLI = LIS.getInterval(SibReg);
1265 eliminateRedundantSpills(SibLI, SibLI.getVNInfoAt(Idx));
1266 // The COPY will fold to a reload below.
1267 }
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +00001268 }
1269
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +00001270 // Attempt to fold memory ops.
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001271 if (foldMemoryOperand(Ops))
Jakob Stoklund Olesen96037182010-07-02 17:44:57 +00001272 continue;
1273
Mark Lacey9d8103d2013-08-14 23:50:16 +00001274 // Create a new virtual register for spill/fill.
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001275 // FIXME: Infer regclass from instruction alone.
Mark Lacey9d8103d2013-08-14 23:50:16 +00001276 unsigned NewVReg = Edit->createFrom(Reg);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001277
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001278 if (RI.Reads)
Mark Lacey9d8103d2013-08-14 23:50:16 +00001279 insertReload(NewVReg, Idx, MI);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001280
1281 // Rewrite instruction operands.
1282 bool hasLiveDef = false;
1283 for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001284 MachineOperand &MO = Ops[i].first->getOperand(Ops[i].second);
Mark Lacey9d8103d2013-08-14 23:50:16 +00001285 MO.setReg(NewVReg);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001286 if (MO.isUse()) {
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001287 if (!Ops[i].first->isRegTiedToDefOperand(Ops[i].second))
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001288 MO.setIsKill();
1289 } else {
1290 if (!MO.isDead())
1291 hasLiveDef = true;
1292 }
1293 }
Mark Lacey9d8103d2013-08-14 23:50:16 +00001294 DEBUG(dbgs() << "\trewrite: " << Idx << '\t' << *MI << '\n');
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001295
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001296 // FIXME: Use a second vreg if instruction has no tied ops.
Mark Lacey9d8103d2013-08-14 23:50:16 +00001297 if (RI.Writes)
Jakob Stoklund Olesenabe8c092012-03-01 01:43:25 +00001298 if (hasLiveDef)
Mark Lacey9d8103d2013-08-14 23:50:16 +00001299 insertSpill(NewVReg, true, MI);
Jakob Stoklund Olesenf8889112010-06-29 23:58:39 +00001300 }
1301}
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001302
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001303/// spillAll - Spill all registers remaining after rematerialization.
1304void InlineSpiller::spillAll() {
1305 // Update LiveStacks now that we are committed to spilling.
1306 if (StackSlot == VirtRegMap::NO_STACK_SLOT) {
1307 StackSlot = VRM.assignVirt2StackSlot(Original);
1308 StackInt = &LSS.getOrCreateInterval(StackSlot, MRI.getRegClass(Original));
Jakob Stoklund Olesenad6b22e2012-02-04 05:20:49 +00001309 StackInt->getNextValue(SlotIndex(), LSS.getVNInfoAllocator());
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001310 } else
1311 StackInt = &LSS.getInterval(StackSlot);
1312
1313 if (Original != Edit->getReg())
1314 VRM.assignVirt2StackSlot(Edit->getReg(), StackSlot);
1315
1316 assert(StackInt->getNumValNums() == 1 && "Bad stack interval values");
1317 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)
Matthias Braun13ddb7c2013-10-10 21:28:43 +00001318 StackInt->MergeSegmentsInAsValue(LIS.getInterval(RegsToSpill[i]),
1319 StackInt->getValNumInfo(0));
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001320 DEBUG(dbgs() << "Merged spilled regs: " << *StackInt << '\n');
1321
1322 // Spill around uses of all RegsToSpill.
1323 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)
1324 spillAroundUses(RegsToSpill[i]);
1325
1326 // Hoisted spills may cause dead code.
1327 if (!DeadDefs.empty()) {
1328 DEBUG(dbgs() << "Eliminating " << DeadDefs.size() << " dead defs\n");
Pete Cooper2bde2f42012-04-02 22:22:53 +00001329 Edit->eliminateDeadDefs(DeadDefs, RegsToSpill);
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001330 }
1331
1332 // Finally delete the SnippetCopies.
Jakob Stoklund Olesen31a0b5e2011-05-11 18:25:10 +00001333 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i) {
Owen Andersonabb90c92014-03-13 06:02:25 +00001334 for (MachineRegisterInfo::reg_instr_iterator
1335 RI = MRI.reg_instr_begin(RegsToSpill[i]), E = MRI.reg_instr_end();
1336 RI != E; ) {
1337 MachineInstr *MI = &*(RI++);
Jakob Stoklund Olesen31a0b5e2011-05-11 18:25:10 +00001338 assert(SnippetCopies.count(MI) && "Remaining use wasn't a snippet copy");
1339 // FIXME: Do this with a LiveRangeEdit callback.
Jakob Stoklund Olesen31a0b5e2011-05-11 18:25:10 +00001340 LIS.RemoveMachineInstrFromMaps(MI);
1341 MI->eraseFromParent();
1342 }
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001343 }
1344
1345 // Delete all spilled registers.
1346 for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)
Pete Cooper2bde2f42012-04-02 22:22:53 +00001347 Edit->eraseVirtReg(RegsToSpill[i]);
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001348}
1349
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001350void InlineSpiller::spill(LiveRangeEdit &edit) {
Jakob Stoklund Olesenc5a8c082011-05-05 17:22:53 +00001351 ++NumSpilledRanges;
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001352 Edit = &edit;
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001353 assert(!TargetRegisterInfo::isStackSlot(edit.getReg())
1354 && "Trying to spill a stack slot.");
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +00001355 // Share a stack slot among all descendants of Original.
1356 Original = VRM.getOriginal(edit.getReg());
1357 StackSlot = VRM.getStackSlot(Original);
Craig Topperc0196b12014-04-14 00:51:57 +00001358 StackInt = nullptr;
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +00001359
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001360 DEBUG(dbgs() << "Inline spilling "
Jakob Stoklund Olesena00bab22011-03-14 19:56:43 +00001361 << MRI.getRegClass(edit.getReg())->getName()
Matthias Braunf6fe6bf2013-10-10 21:29:05 +00001362 << ':' << edit.getParent()
Mark Lacey9d8103d2013-08-14 23:50:16 +00001363 << "\nFrom original " << PrintReg(Original) << '\n');
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001364 assert(edit.getParent().isSpillable() &&
1365 "Attempting to spill already spilled value.");
Jakob Stoklund Olesen27320cb2011-03-18 04:23:06 +00001366 assert(DeadDefs.empty() && "Previous spill didn't remove dead defs");
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001367
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001368 collectRegsToSpill();
Jakob Stoklund Olesena0d5ec12011-03-15 21:13:25 +00001369 analyzeSiblingValues();
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001370 reMaterializeAll();
1371
1372 // Remat may handle everything.
Jakob Stoklund Olesene991f722011-03-29 21:20:19 +00001373 if (!RegsToSpill.empty())
1374 spillAll();
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001375
Benjamin Kramere2a1d892013-06-17 19:00:36 +00001376 Edit->calculateRegClassAndHint(MF, Loops, MBFI);
Jakob Stoklund Olesena86595e2011-03-12 04:17:20 +00001377}