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gerrit-public.fairphone.software / toolchain / llvm-project / 29cde35b43a8ff413ecec55abfa64ab43f99b3f1 / llvm / lib / Target / Mips / Disassembler / MipsDisassembler.cpp
  1. 5da2f6c [mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions by Zlatko Buljan · 10 years ago
  2. a887b36 [mips][microMIPS] Fix issue with offset operand of BALC and BC instructions by Zoran Jovanovic · 10 years ago
  3. ebee612 Fix UMRs in Mips disassembler on invalid instruction streams by Reid Kleckner · 10 years ago
  4. 797c2ae [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructions by Zlatko Buljan · 10 years ago
  5. ea4f653 [mips][ias] Range check uimm2 operands and fix a bug this revealed. by Daniel Sanders · 10 years ago
  6. 1814867 [mips][microMIPS] Implement PAUSE, RDHWR, RDPGPR, SDBBP, SSNOP, SYNC, SYNCI and WAIT instructions by Hrvoje Varga · 10 years ago
  7. 3c88fbd [mips][microMIPS] Implement LB, LBE, LBU and LBUE instructions by Hrvoje Varga · 10 years ago
  8. 3ef4dd7 [mips][microMIPS] Implement LLE and SCE instructions by Hrvoje Varga · 10 years ago
  9. df19a5e [mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values. by Daniel Sanders · 10 years ago
  10. dc4b8c2 [mips][microMIPS] Fix an issue with disassembling lwm32 instruction by Zoran Jovanovic · 10 years ago
  11. e4e83a7 [mips] Added support for various EVA ASE instructions. by Daniel Sanders · 10 years ago
  12. 6b28f09 [mips][microMIPS] Implement ADDU16, AND16, ANDI16, NOT16, OR16, SLL16 and SRL16 instructions by Zoran Jovanovic · 10 years ago
  13. d979079 [mips][microMIPS] Implement CACHEE and PREFE instructions by Zoran Jovanovic · 10 years ago
  14. 9eaa30d [mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructions by Zoran Jovanovic · 10 years ago
  15. ada7091 [mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions by Zoran Jovanovic · 10 years ago
  16. a6593ff [mips][microMIPS] Implement SW and SWE instructions by Zoran Jovanovic · 10 years ago
  17. 366783e [mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, DAHI, DATI, DEXT, DEXTM and DEXTU instructions by Zoran Jovanovic · 10 years ago
  18. a3134fa [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0. by Daniel Sanders · 10 years ago
  19. 6499b5f [mips] Fix some UB by shifting before sign-extending by Justin Bogner · 10 years ago
  20. 3adf9b8 [mips] Add new format for dmtc2/dmfc2 for Octeon CPUs. by Kai Nacke · 10 years ago
  21. db0712f Use std::bitset for SubtargetFeatures. by Michael Kuperstein · 10 years ago
  22. e9119e4 MC: Modernize MCOperand API naming. NFC. by Jim Grosbach · 10 years ago
  23. c3434b3 Reverting r237234, "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 10 years ago
  24. aba4a34 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 10 years ago
  25. 676d601 [mips][microMIPSr6] Implement disassembler support by Jozef Kolek · 11 years ago
  26. 29704e7 Revert "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 11 years ago
  27. 774b441 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
  28. efd7a96 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures. by Michael Kuperstein · 11 years ago
  29. ba5b04c Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
  30. a19216c [mips] Merge disassemblers into a single implementation. by Daniel Sanders · 11 years ago
  31. 4168867 [mips][microMIPS] Implement movep instruction by Zoran Jovanovic · 11 years ago
  32. d68d424a [mips][microMIPS] Fix disassembling of 16-bit microMIPS instructions LWM16 and SWM16 by Jozef Kolek · 11 years ago
  33. df464ae [Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions. by Vladimir Medic · 11 years ago
  34. e10a02e [mips][microMIPS] Implement LWGP instruction by Jozef Kolek · 11 years ago
  35. 4ea2f60 [mips] fix spelling of 'disassembler' by Alexei Starovoitov · 11 years ago
  36. 5cfebdd [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B by Jozef Kolek · 11 years ago
  37. 2c6d732 [mips][microMIPS] Implement ADDIUPC instruction by Jozef Kolek · 11 years ago
  38. 435cf8a [Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions. by Vladimir Medic · 11 years ago
  39. 0d49117 Reverted revision 226577. by Jozef Kolek · 11 years ago
  40. 45f7f9c [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B by Jozef Kolek · 11 years ago
  41. 9761e96 [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions by Jozef Kolek · 11 years ago
  42. ab6d1cc [mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions by Jozef Kolek · 11 years ago
  43. 12c6982 [mips][microMIPS] Implement LWSP and SWSP instructions by Jozef Kolek · 11 years ago
  44. 2c55974 Fix UBSan bootstrap: replace shift of negative value with multiplication. by Alexey Samsonov · 11 years ago
  45. e886093 The single check for N64 inside MipsDisassemblerBase's subclasses is actually wrong. It should be testing for FeatureGP64bit.There are no functional changes. by Vladimir Medic · 11 years ago
  46. 2deca34 [mips][microMIPS] Implement SWP and LWP instructions by Zoran Jovanovic · 11 years ago
  47. d7ecf49 Add disassembler tests for mips3 platform. There are no functional changes. by Vladimir Medic · 11 years ago
  48. b682ddf The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests. by Vladimir Medic · 11 years ago
  49. f9a0250 [mips][microMIPS] Implement SWM16 and LWM16 instructions by Zoran Jovanovic · 11 years ago
  50. b4484d6 [mips] Add synci instruction. by Daniel Sanders · 11 years ago
  51. aa2b927 [mips][microMIPS] Implement disassembler support for 16-bit instructions LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5 by Jozef Kolek · 11 years ago
  52. 315e7ec [mips][microMIPS] Implement disassembler support for 16-bit instructions LBU16, LHU16, LW16, SB16, SH16 and SW16 by Jozef Kolek · 11 years ago
  53. 1904fa2 [mips][microMIPS] Implement 16-bit instructions registers including ZERO instead of S0 by Jozef Kolek · 11 years ago
  54. ea22c4c [mips][microMIPS] Implement disassembler support for 16-bit instructions by Jozef Kolek · 11 years ago
  55. a4c4b5f [mips][micromips] Implement SWM32 and LWM32 instructions by Zoran Jovanovic · 11 years ago
  56. 7fc5b87 Pass an ArrayRef to MCDisassembler::getInstruction. by Rafael Espindola · 11 years ago
  57. 4aa6bea Misc style fixes. NFC. by Rafael Espindola · 11 years ago
  58. b0852e5 [mips][microMIPS] Implement microMIPS 16-bit instructions registers by Zoran Jovanovic · 11 years ago
  59. 92db6b7 [mips] Fix disassembly of [ls][wd]c[23], cache, and pref by Daniel Sanders · 11 years ago
  60. d37bab6 Fix left shifts of negative values in MipsDisassembler. by Alexey Samsonov · 11 years ago
  61. 24e08fd [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves by Daniel Sanders · 11 years ago
  62. 5c14b06 [mips][mips64r6] Add BLTC and BLTUC instructions by Zoran Jovanovic · 11 years ago
  63. 6a803f6 [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6. by Daniel Sanders · 11 years ago
  64. c171f65 [mips] Add cache and pref instructions by Daniel Sanders · 11 years ago
  65. 0fa6041 [mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available on MIPS32r6/MIPS64r6 by Daniel Sanders · 11 years ago
  66. 28a0ca0 [mips][mips64r6] Add bgec and bgeuc instructions by Zoran Jovanovic · 11 years ago
  67. 2855142 [mips][mips64r6] Add LDPC instruction by Zoran Jovanovic · 11 years ago
  68. 5c582b2 [mips][mips64r6] Add b[on]vc by Daniel Sanders · 11 years ago
  69. 2a83d68 [mips][mips64r6] Add bc[12](eq|ne)z by Daniel Sanders · 11 years ago
  70. 3c8869d [mips][mips64r6] Add compact branch instructions by Zoran Jovanovic · 11 years ago
  71. b59e1a4 [mips][mips64r6] Add addiupc, aluipc, and auipc by Daniel Sanders · 11 years ago
  72. 56c590a [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition by Craig Topper · 11 years ago
  73. e96dd89 [Modules] Make Support/Debug.h modular. This requires it to not change by Chandler Carruth · 12 years ago
  74. a1bc0f5 [MC] Require an MCContext when constructing an MCDisassembler. by Lang Hames · 12 years ago
  75. b50ccf8 [mips] Rewrite MipsAsmParser and MipsOperand. by Daniel Sanders · 12 years ago
  76. e34a120 Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot errors in lld tests. by Daniel Sanders · 12 years ago
  77. 0c648ba [mips] Rewrite MipsAsmParser and MipsOperand. by Daniel Sanders · 12 years ago
  78. 285cc28 Fixed operand of SC microMIPS instruction. by Zoran Jovanovic · 12 years ago
  79. 6b59c44 [mips][msa] Fix issue with immediate fields of LD/ST instructions by Matheus Almeida · 12 years ago
  80. 779c593 [mips][msa] Fix immediate value of LSA instruction as it was being wrongly encoded. by Matheus Almeida · 12 years ago
  81. 8a80aa7 Support for microMIPS branch instructions. by Zoran Jovanovic · 12 years ago
  82. 507e084 Support for microMIPS jump instructions by Zoran Jovanovic · 12 years ago
  83. fe0bf9f [mips][msa] Direct Object Emission support for LD/ST instructions. by Matheus Almeida · 12 years ago
  84. a591fdc [mips][msa] Direct Object Emission support for CTCMSA and CFCMSA. by Matheus Almeida · 12 years ago
  85. 3eb663b [mips][msa] Direct Object Emission for 3R instructions. by Jack Carter · 12 years ago
  86. 5dc8ac9 [mips][msa] Direct Object Emission support for the MSA instruction set. by Jack Carter · 12 years ago
  87. dde3d58 This patch adds support for microMIPS disassembler and disassembler make check tests. by Vladimir Medic · 12 years ago
  88. 9bfa2e2 [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. by Akira Hatanaka · 12 years ago
  89. 14e31a2 [mips] Define register class FGRH32 for the high half of the 64-bit floating by Akira Hatanaka · 12 years ago
  90. 654655f [mips] Rename DSPRegs. by Akira Hatanaka · 12 years ago
  91. 8002a3f [mips] Rename HIRegs and LORegs. by Akira Hatanaka · 12 years ago
  92. 00fcf2e [mips] Rename accumulator register classes and FP register operands. by Akira Hatanaka · 12 years ago
  93. 18abf4e Remove unused functions introduced in r172685 to unbreak the Clang -Werror build by David Blaikie · 12 years ago
  94. 13e6ccf [mips] Rename register classes CPURegs and CPU64Regs. by Akira Hatanaka · 12 years ago
  95. dcfd5b5 Stop leaking register infos in the disassemblers. by Benjamin Kramer · 12 years ago
  96. 1fb1b8b [mips] Fix FP branch instructions to have explicit FP condition code register by Akira Hatanaka · 12 years ago
  97. a73970b Fixing a buildbot failure:unused function. by Vladimir Medic · 12 years ago
  98. 253777f [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg by Chad Rosier · 12 years ago
  99. 534d3a4 Remove the Copied parameter from MemoryObject::readBytes. by Benjamin Kramer · 12 years ago
  100. 59bfaf7 [mips] DSP-ASE move from HI/LO register instructions. by Akira Hatanaka · 13 years ago