Merge "ARM: Allow panic on division by zero in the kernel"
diff --git a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
index 9af81da..1b881f0 100644
--- a/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
+++ b/Documentation/devicetree/bindings/arm/msm/cpr-regulator.txt
@@ -22,16 +22,13 @@
should be 1 for SVS corner
- regulator-max-microvolt: Maximum corner value as max constraint, which
should be 4 for SUPER_TURBO or 3 for TURBO
-- qcom,pvs-init-voltage: A list of integers whose length is equal to 2
- to the power of qcom,pvs-fuse[num-of-bits]. The
- location or 0-based index of an element in the
- list corresponds to the bin number. The value of
- each integer corresponds to the initial voltage
- of the PVS bin in turbo mode in microvolts.
-- qcom,pvs-corner-ceiling-slow: Ceiling voltages of all corners for APC_PVS_SLOW
-- qcom,pvs-corner-ceiling-nom: Ceiling voltages of all corners for APC_PVS_NOM
-- qcom,pvs-corner-ceiling-fast: Ceiling voltages of all corners for APC_PVS_FAST
- The ceiling voltages for each of above three
+- qcom,pvs-voltage-table: Array of triples in which each triple indicates the initial voltage
+ of the PVS bin in SVS, NOM and Turbo corner in microvolts.
+ The location or 0-based index of an triple in the
+ list corresponds to the bin number.
+- qcom,cpr-voltage-ceiling: Ceiling voltages of SVS, NOM and TURBO corners respectively
+- qcom,cpr-voltage-floor: Floor voltages of SVS, NOM and TURBO corners respectively
+ The ceiling voltages for each of above two
properties may look like this:
0 (SVS voltage): 1050000 uV
1 (NORMAL voltage): 1150000 uV
@@ -140,7 +137,15 @@
1 => equal to PVS corner ceiling voltage
2 => equal to slow speed corner ceiling
3 => equal to qcom,vdd-mx-vmax
+ 4 => equal to VDD_APC corner mapped vdd-mx voltage
This is required when vdd-mx-supply is present.
+- qcom,vdd-mx-corner-map: Array of 3 elements which defines the mapping from VDD_APC
+ fuse voltage corners to vdd-mx-supply voltages.
+ The 3 elements with index[0..2] are:
+ [0] => voltage to set for vdd-mx when VDD_APC is running at SVS corner
+ [1] => voltage to set for vdd-mx when VDD_APC is running at NOM corner
+ [2] => voltage to set for vdd-mx when VDD_APC is running at TURBO corner
+ This is required when the qcom,vdd-mx-vmin-method property has a value of 4.
- qcom,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
- qcom,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
This property is required if cpr-fuse-redun-bp-cpr-disable
@@ -213,10 +218,18 @@
the virtual corner value. For example, the first element in the list is the fuse corner
value that virtual corner 1 maps to.
This is required if qcom,cpr-quot-adjust-table is present.
-- qcom,cpr-quotient-adjustment: Present: CPR adjusts quotient value. The
- adjustment equals to the quotient adjustment
- in millivolts multiply the KV value.
- Not Present: CPR will not adjust quotient value.
+- qcom,cpr-quotient-adjustment: Array of three elements of CPR quotient adjustments for each corner.
+ The 3 quotient adjustments with index[0..2] are:
+ [0] => amount to add to the SVS quotient
+ [1] => amount to add to the NORM quotient
+ [2] => amount to add to the TURBO quotient
+ If this property is specified, then the quotient adjustment values are added to the target
+ quotient values read from fuses before writing them into the CPR GCNT target control registers.
+ This property can be used to add static margin to the voltage rail managed by the CPR controller.
+- vdd-apc-optional-prim-supply: Present: Regulator of highest priority to supply VDD APC power
+ Not Present: No such regulator.
+- vdd-apc-optional-sec-supply: Present: Regulator of second highest priority to supply VDD APC power.
+ Not Present: No such regulator.
Example:
apc_vreg_corner: regulator@f9018000 {
@@ -227,24 +240,50 @@
interrupts = <0 15 0>;
regulator-name = "apc_corner";
regulator-min-microvolt = <1>;
- regulator-max-microvolt = <3>;
+ regulator-max-microvolt = <12>;
qcom,pvs-fuse = <22 6 5 1>;
qcom,pvs-fuse-redun-sel = <22 24 3 2 1>;
qcom,pvs-fuse-redun = <22 27 5 1>;
- qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000
- 1310000 1300000 1290000 1280000
- 1270000 1260000 1250000 1240000
- 1230000 1220000 1210000 1200000
- 1190000 1180000 1170000 1160000
- 1150000 1140000 1140000 1140000
- 1140000 1140000 1140000 1140000
- 1140000 1140000 1140000 1140000>;
- qcom,pvs-corner-ceiling-slow = <1050000 1160000 1275000>;
- qcom,pvs-corner-ceiling-nom = <975000 1075000 1200000>;
- qcom,pvs-corner-ceiling-fast = <900000 1000000 1140000>;
+ qcom,pvs-voltage-table =
+ <1050000 1150000 1350000>,
+ <1050000 1150000 1340000>,
+ <1050000 1150000 1330000>,
+ <1050000 1150000 1320000>,
+ <1050000 1150000 1310000>,
+ <1050000 1150000 1300000>,
+ <1050000 1150000 1290000>,
+ <1050000 1150000 1280000>,
+ <1050000 1150000 1270000>,
+ <1050000 1140000 1260000>,
+ <1050000 1130000 1250000>,
+ <1050000 1120000 1240000>,
+ <1050000 1110000 1230000>,
+ <1050000 1100000 1220000>,
+ <1050000 1090000 1210000>,
+ <1050000 1080000 1200000>,
+ <1050000 1070000 1190000>,
+ <1050000 1060000 1180000>,
+ <1050000 1050000 1170000>,
+ <1050000 1050000 1160000>,
+ <1050000 1050000 1150000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>;
+ qcom,cpr-voltage-ceiling = <1050000 1150000 1280000>;
+ qcom,cpr-voltage-floor = <1050000 1050000 1100000>;
vdd-apc-supply = <&pm8226_s2>;
+ vdd-apc-optional-prim-supply = <&ncp6335d>;
+ vdd-apc-optional-sec-supply = <&fan53555>;
vdd-mx-supply = <&pm8226_l3_ao>;
qcom,vdd-mx-vmax = <1350000>;
qcom,vdd-mx-vmin-method = <1>;
diff --git a/Documentation/devicetree/bindings/arm/msm/ext-buck-control.txt b/Documentation/devicetree/bindings/arm/msm/ext-buck-control.txt
new file mode 100644
index 0000000..37c0995
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/ext-buck-control.txt
@@ -0,0 +1,26 @@
+* MSM EXT BUCK REGULATOR CONTROL
+
+External buck regulator is used to power up the APC rail.
+This buck can be turn-on & turn-off by toggling a gpio
+line which is connected to buck enable pin. This driver
+control the external regulator behaviour with the help
+of RPM by sending the sleep and active sets when APPS
+decide to enter into low power state with RPM assisted.
+
+The required properties for EXT BUCK CONTROL are:
+
+- compatible: "qcom,ext-buck-control"
+
+The optional properties are:
+- qcom,gpio-num: Indicates the GPIO number which will turn-on and turn-off
+ the external buck.
+- qcom,settling-time-us: Indicates the settling time for the external buck to
+ get turn-on or turn-off. Settling time is calculated
+ in terms of QTIMER(19.2MHz) and the value is in us.
+
+Example:
+ qcom,ext-buck-control {
+ compatible = "qcom,ext-buck-control";
+ qcom,gpio-num = <50>;
+ qcom,settling-time-us = <2580>;
+};
diff --git a/Documentation/devicetree/bindings/arm/msm/lpm-levels.txt b/Documentation/devicetree/bindings/arm/msm/lpm-levels.txt
index 0696730..7f52be8 100644
--- a/Documentation/devicetree/bindings/arm/msm/lpm-levels.txt
+++ b/Documentation/devicetree/bindings/arm/msm/lpm-levels.txt
@@ -58,6 +58,9 @@
- qcom,min-cpu-mode: The min cpu sleep mode at which the given system level is
valid. All cpus should have entered this low power mode before
this system level can be chosen.
+- qcom,send-rpm-sleep-set: The system mode notifies RPM of Apps sleep and should
+ send the current sleep set votes and configure MPM before
+ entering this low power mode.
Example:
qcom,lpm-levels {
diff --git a/Documentation/devicetree/bindings/arm/msm/msm_bus.txt b/Documentation/devicetree/bindings/arm/msm/msm_bus.txt
index 6283a82..9f74225 100644
--- a/Documentation/devicetree/bindings/arm/msm/msm_bus.txt
+++ b/Documentation/devicetree/bindings/arm/msm/msm_bus.txt
@@ -20,10 +20,12 @@
these features:
qcom,ntieredslaves: Number of tiered slaves on the bus.
-qcom,qos-freq: QoS frequency (In Hz)
+qcom,qos-freq: QoS frequency (In KHz)
qcom,hw-sel: A string which decides whether QoS data
should be sent to RPM, set using BIMC or NoCs.
It can be set to "RPM", "NoC" or "BIMC".
+qcom,qos-baseoffset: Base address offset of QoS registers from the bus device
+ base address.
qcom,rpm-en: A boolean flag indicating whether RPM transactions are
supported for nodes of the bus.
qcom,ahb: A boolean flag indicating whether the bus is ahb type.
diff --git a/Documentation/devicetree/bindings/arm/msm/rpm-regulator-smd.txt b/Documentation/devicetree/bindings/arm/msm/rpm-regulator-smd.txt
index 3d70a9b..2b25fcb 100644
--- a/Documentation/devicetree/bindings/arm/msm/rpm-regulator-smd.txt
+++ b/Documentation/devicetree/bindings/arm/msm/rpm-regulator-smd.txt
@@ -32,6 +32,10 @@
- qcom,enable-time: Time in us to delay after enabling the regulator
- qcom,hpm-min-load: Load current in uA which corresponds to the minimum load
which requires the regulator to be in high power mode.
+- qcom,apps-only: Flag which indicates that the regulator only has
+ consumers on the application processor. If this flag
+ is specified, then voltage and current updates are
+ only sent to the RPM if the regulator is enabled.
[Second Level Nodes]
@@ -84,6 +88,7 @@
current updates are only sent if the given
regulator has also been enabled by a Linux
consumer.
+
The following properties specify initial values for parameters to be sent to the
RPM in regulator requests.
- qcom,init-enable: 0 = regulator disabled
diff --git a/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt b/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt
index 01cc798..1bb4659 100644
--- a/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt
+++ b/Documentation/devicetree/bindings/crypto/msm/qcrypto.txt
@@ -16,6 +16,13 @@
Optional properties:
- qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE.
- qcom,ce-hw-key : optional, indicates if the hardware supports use of HW KEY.
+ - qcom,use-sw-aes-cbc-ecb-ctr-algo : optional, indicates if use SW aes-cbc/ecb/ctr algorithm.
+ - qcom,use-sw-aes-xts-algo : optional, indicates if use SW aes-xts algorithm.
+ - qcom,use-sw-aead-algo : optional, indicates if use SW aead algorithm.
+ - qcom,use-sw-ahash-algo : optional, indicates if use SW hash algorithm.
+ - qcom,use-sw-hmac-algo : optional, indicates if use SW hmac algorithm.
+ - qcom,use-sw-aes-ccm-algo : optional, indicates if use SW aes-ccm algorithm.
+ - qcom,clk-mgmt-sus-res : optional, indicate if the ce clocks need to be disabled/enabled in suspend/resume function.
Example:
diff --git a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
index 113ded8..ae6f8ef 100644
--- a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
@@ -126,6 +126,9 @@
implemented during suspend/resume.
"dfps_immediate_clk_mode" = FPS change request is
implemented immediately using DSI clocks.
+ "dfps_immediate_porch_mode" = FPS change request is
+ implemented immediately by changing panel porch
+ values.
- qcom,mdss-dsi-bl-pmic-control-type: A string that specifies the implementation of backlight
control for this panel.
"bl_ctrl_pwm" = Backlight controlled by PWM gpio.
@@ -156,15 +159,9 @@
1 = TE through TE gpio pin. (default)
- qcom,mdss-dsi-te-dcs-command: Inserts the dcs command.
1 = default value.
-- qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line: Configures the scan line number that the dsi
- pixel transfer will start on. Rasing this number
- will result in delaying the start of the pixel
- transfer.
+- qcom,mdss-dsi-wr-mem-start: DCS command for write_memory_start.
0x2c = default value.
-- qcom,mdss-dsi-te-v-sync-continue-lines: Represents the difference in number of lines
- between estimated read pointer and write pointer
- to allow the updating of all the lines except
- the first line of the frame.
+- qcom,mdss-dsi-wr-mem-continue: DCS command for write_memory_continue.
0x3c = default value.
- qcom,mdss-dsi-h-sync-pulse: Specifies the pulse mode option for the panel.
0 = Don't send hsa/he following vs/ve packet(default)
@@ -307,8 +304,8 @@
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-te-dcs-command = <1>;
- qcom,mdss-dsi-te-v-sync-continue-lines = <0x3c>;
- qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>;
+ qcom,mdss-dsi-wr-mem-continue = <0x3c>;
+ qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-te-pin-select = <1>;
qcom,mdss-dsi-h-sync-pulse = <1>;
qcom,mdss-dsi-hfp-power-mode;
diff --git a/Documentation/devicetree/bindings/fb/mdss-mdp.txt b/Documentation/devicetree/bindings/fb/mdss-mdp.txt
index 191db07..c2b963f 100644
--- a/Documentation/devicetree/bindings/fb/mdss-mdp.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-mdp.txt
@@ -117,6 +117,79 @@
- "edp"
- "hdmi"
+Bus Scaling Data:
+- qcom,msm-bus,name: String property describing MDSS client.
+- qcom,msm-bus,num-cases: This is the the number of Bus Scaling use cases
+ defined in the vectors property. This must be
+ set to <3> for MDSS driver where use-case 0 is
+ used to take off MDSS BW votes from the system.
+ And use-case 1 & 2 are used in ping-pong fashion
+ to generate run-time BW requests.
+- qcom,msm-bus,active-only: A boolean flag indicating if it is active only.
+- qcom,msm-bus,num-paths: This represents the number of paths in each
+ Bus Scaling Usecase. This value depends on
+ how many number of AXI master ports are
+ dedicated to MDSS for particular chipset.
+- qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format
+ of (src, dst, ab, ib) which is defined at
+ Documentation/devicetree/bindings/arm/msm/msm_bus.txt
+ * Current values of src & dst are defined at
+ arch/arm/mach-msm/msm_bus_board.h
+ src values allowed for MDSS are:
+ 22 = MSM_BUS_MASTER_MDP_PORT0
+ 23 = MSM_BUS_MASTER_MDP_PORT1
+ dst values allowed for MDSS are:
+ 512 = MSM_BUS_SLAVE_EBI_CH0
+ ab: Represents aggregated bandwidth.
+ ib: Represents instantaneous bandwidth.
+ * Total number of 4 cell properties will be
+ (number of use-cases * number of paths).
+ * These values will be overridden by the driver
+ based on the run-time requirements. So initial
+ ab and ib values defined here are random and
+ bare no logic except for the use-case 0 where ab
+ and ib values needs to be 0.
+
+- qcom,mdss-prefill-outstanding-buffer-bytes: The size of mdp outstanding buffer
+ in bytes. The buffer is filled during prefill
+ time and the buffer size shall be included in
+ prefill bandwidth calculation.
+- qcom,mdss-prefill-y-buffer-bytes: The size of mdp y plane buffer in bytes. The
+ buffer is filled during prefill time when format
+ is YUV and the buffer size shall be included in
+ prefill bandwidth calculation.
+- qcom,mdss-prefill-scaler-buffer-lines-bilinear: The value indicates how many lines
+ of scaler line buffer need to be filled during
+ prefill time. If bilinear scalar is enabled, then this
+ number of lines is used to determine how many bytes
+ of scaler buffer to be included in prefill bandwidth
+ calculation.
+- qcom,mdss-prefill-scaler-buffer-lines-caf: The value indicates how many lines of
+ of scaler line buffer need to be filled during
+ prefill time. If CAF mode filter is enabled, then
+ this number of lines is used to determine how many
+ bytes of scaler buffer to be included in prefill
+ bandwidth calculation.
+- qcom,mdss-prefill-post-scaler-buffer: The size of post scaler buffer in bytes.
+ The buffer is used to smooth the output of the
+ scaler. If the buffer is present in h/w, it is
+ filled during prefill time and the number of bytes
+ shall be included in prefill bandwidth calculation.
+- qcom,mdss-prefill-pingpong-buffer-pixels: The size of pingpong buffer in pixels.
+ The buffer is used to keep pixels flowing to the
+ panel interface. If the vertical start position of a
+ layer is in the beginning of the active area, pingpong
+ buffer must be filled during prefill time to generate
+ starting lines. The number of bytes to be filled is
+ determined by the line width, starting position,
+ byte per pixel and scaling ratio, this number shall be
+ included in prefill bandwidth calculation.
+- qcom,mdss-prefill-fbc-lines: The value indicates how many lines are required to fill
+ fbc buffer during prefill time if FBC (Frame Buffer
+ Compressor) is enabled. The number of bytes to be filled
+ is determined by the line width, bytes per pixel and
+ scaling ratio, this number shall be included in prefill bandwidth
+ calculation.
Optional properties:
- vdd-cx-supply : Phandle for vdd CX regulator device node.
- batfet-supply : Phandle for battery FET regulator device node.
@@ -170,6 +243,33 @@
applied in scenarios where panel interface can
be more tolerant to memory latency such as
command mode panels.
+- qcom,mdss-rotator-ot-limit: This integer value indicates maximum number of pending
+ writes that can be allowed from rotator client. Default
+ value is 16 which is the maximum. This value can be
+ used to reduce the pending writes limit dynamically
+ and can be tuned to match performance requirements
+ depending upon system state.
+
+Fudge Factors: Fudge factors are used to boost demand for
+ resources like bus bandswidth, clk rate etc. to
+ overcome system inefficiencies and avoid any
+ glitches. These fudge factors are expressed in
+ terms of numerator and denominator. First value
+ is numerator followed by denominator. They all
+ are optional but highly recommended.
+ Ex:
+ x = value to be fudged
+ a = numerator, default value is 1
+ b = denominator, default value is 1
+ FUDGE(x, a, b) = ((x * a) / b)
+- qcom,mdss-ib-factor: This fudge factor is applied to calculated ib
+ values in default conditions.
+- qcom,mdss-clk-factor: This fudge factor is applied to calculated mdp
+ clk rate in default conditions.
+- qcom,mdss-highest-bank-bit: Property to indicate tile format as opposed to usual
+ linear format. The value tells the GPU highest memory
+ bank bit used.
+
Optional subnodes:
Child nodes representing the frame buffer virtual devices.
@@ -198,6 +298,12 @@
This property is required whenever the continuous splash
screen feature is enabled for the corresponding
framebuffer device.
+- qcom,mdss-fb-splash-logo-enabled: The boolean entry enables the framebuffer
+ driver to display the splash logo image.
+ It is independent of continuous splash
+ screen feature and has no relation with
+ qcom,cont-splash-enabled entry present in
+ panel configuration.
Example:
mdss_mdp: qcom,mdss_mdp@fd900000 {
@@ -213,6 +319,20 @@
qcom,max-bandwidth-low-kbps = <2300000>;
qcom,max-bandwidth-high-kbps = <3000000>;
+ /* Bus Scale Settings */
+ qcom,msm-bus,name = "mdss_mdp";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>, <23 512 0 0>,
+ <22 512 0 6400000>, <23 512 0 6400000>,
+ <22 512 0 6400000>, <23 512 0 6400000>;
+
+ /* Fudge factors */
+ qcom,mdss-ab-factor = <2 1>; /* 2 times */
+ qcom,mdss-ib-factor = <3 2>; /* 1.5 times */
+ qcom,mdss-clk-factor = <5 4>; /* 1.25 times */
+
qcom,max-clk-rate = <320000000>;
qcom,vbif-settings = <0x0004 0x00000001>,
<0x00D8 0x00000707>;
@@ -237,6 +357,7 @@
qcom,mdss-smp-data = <22 4096>;
qcom,mdss-rot-block-size = <64>;
+ qcom,mdss-rotator-ot-limit = <2>;
qcom,mdss-smp-mb-per-pipe = <2>;
qcom,mdss-pref-prim-intf = "dsi";
qcom,mdss-has-bwc;
@@ -255,11 +376,21 @@
qcom,mdss-intf-off = <0x00021100 0x00021300
0x00021500 0x00021700>;
+ /* buffer parameters to calculate prefill bandwidth */
+ qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
+ qcom,mdss-prefill-y-buffer-bytes = <4096>;
+ qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
+ qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
+ qcom,mdss-prefill-post-scaler-buffer-pixels = <2048>;
+ qcom,mdss-prefill-pingpong-buffer-pixels = <5120>;
+ qcom,mdss-prefill-fbc-lines = <2>;
+
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
qcom,mdss-mixer-swap;
qcom,mdss-fb-split = <480 240>
+ qcom,mdss-fb-splash-logo-enabled:
};
};
diff --git a/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt b/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt
index 8579ec0..b4bfb92 100644
--- a/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt
+++ b/Documentation/devicetree/bindings/fb/msm-hdmi-tx.txt
@@ -28,6 +28,7 @@
- qcom,hdmi-tx-mux-sel: gpio required to toggle HDMI output between
docking station, type A, and liquid device, type D, ports. Required
property for liquid devices.
+- qcom,hdmi-tx-ddc-mux-sel: gpio for ddc mux select.
- qcom,hdmi-tx-mux-en: gpio required to enable mux for HDMI output
on liquid devices. Required property for liquid devices.
@@ -57,6 +58,7 @@
qcom,hdmi-tx-max-voltage-level = <0 0 1800000 1800000>;
qcom,hdmi-tx-peak-current = <0 0 1800000 0>;
+ qcom,hdmi-tx-ddc-mux-sel = <&pma8084_gpios 6 0>;
qcom,hdmi-tx-cec = <&msmgpio 31 0>;
qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>;
qcom,hdmi-tx-ddc-data = <&msmgpio 33 0>;
diff --git a/Documentation/devicetree/bindings/hwmon/qpnp-adc-current.txt b/Documentation/devicetree/bindings/hwmon/qpnp-adc-current.txt
index 31bf540..d0cad52 100644
--- a/Documentation/devicetree/bindings/hwmon/qpnp-adc-current.txt
+++ b/Documentation/devicetree/bindings/hwmon/qpnp-adc-current.txt
@@ -9,7 +9,12 @@
Required properties:
- compatible : should be "qcom,qpnp-iadc" for Current ADC driver.
-- reg : offset and length of the PMIC Aribter register map.
+- reg : offset and length of the PMIC Arbiter register map.
+- reg-names : resource names used for the physical base address of the PMIC IADC
+ peripheral, the SMBB_BAT_IF_TRIM_CNST_RDS register.
+ Should be "iadc-base" for the PMIC IADC peripheral base register.
+ Should be "batt-id-trim-cnst-rds" for reading the
+ SMBB_BAT_IF_TRIM_CNST_RDS register.
- address-cells : Must be one.
- size-cells : Must be zero.
- interrupts : The USR bank peripheral IADC interrupt.
@@ -21,6 +26,13 @@
- qcom,rsense : Use this property when external rsense should be used
for current calculation and specify the units in nano-ohms.
- qcom,iadc-poll-eoc: Use polling instead of interrupts for End of Conversion completion.
+- qcom,use-default-rds-trim : Add this property to check if certain conditions are to be checked
+ reading the SMBB_BAT_IF_CNST_RDS, IADC_RDS trim register and
+ manufacturer type. Check the driver for conditions that each of the type.
+ 0 : Select this type to read the IADC and SMBB trim register and
+ apply the default RSENSE if conditions are met.
+ 1 : Select this type to read the IADC, SMBB trim register and
+ manufacturer type and apply the default RSENSE if conditions are met.
Channel node
NOTE: Atleast one Channel node is required.
diff --git a/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt b/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt
index 1be5504..dd0c440 100644
--- a/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt
+++ b/Documentation/devicetree/bindings/hwmon/qpnp-adc-voltage.txt
@@ -49,6 +49,7 @@
2 : {1, 4}
3 : {1, 6}
4 : {1, 20}
+ 5 : {1, 8}
- qcom,calibration-type : Reference voltage to use for channel calibration.
Channel calibration is dependendent on the channel.
Certain channels like XO_THERM, BATT_THERM use ratiometric
diff --git a/Documentation/devicetree/bindings/i2c/i2c-qup.txt b/Documentation/devicetree/bindings/i2c/i2c-qup.txt
index fd7b635..fd96908 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-qup.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-qup.txt
@@ -36,6 +36,10 @@
callbacks.
- qcom,master-id : Master endpoint number used for voting on clocks using
bus-scaling driver.
+ - qcom,clk-ctl-xfer : When present, the clocks's state (prepare_enable/
+ unprepare_disable) is controlled by i2c-transaction's
+ begining and ending. When missing, the clock's state
+ is controlled by runtime-pm events.
Example:
i2c_3: i2c@f9966000 {
@@ -47,6 +51,7 @@
interrupt-names = "qup_err_intr";
qcom,i2c-bus-freq = <100000>;
qcom,i2c-src-freq = <24000000>;
+ qcom,clk-ctl-xfer;
qcom,scl-gpio = <&msmgpio 7 0>;
qcom,sda-gpio = <&msmgpio 6 0>;
};
diff --git a/Documentation/devicetree/bindings/input/misc/hbtp_input.txt b/Documentation/devicetree/bindings/input/misc/hbtp_input.txt
new file mode 100644
index 0000000..54643c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/misc/hbtp_input.txt
@@ -0,0 +1,14 @@
+Platform device for Host Based Touch Processing (hbtp)
+
+Required properties:
+
+ - compatible : should be "qcom,hbtp"
+ - vcc_ana-supply : Analog power supply needed to power device
+
+Example:
+ &soc {
+ hbtp {
+ compatible = "qcom,hbtp";
+ vcc_ana-supply = <&pm8941_l18>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/input/misc/mma8x5x.txt b/Documentation/devicetree/bindings/input/misc/mma8x5x.txt
index 854939c..7e5d3a4 100644
--- a/Documentation/devicetree/bindings/input/misc/mma8x5x.txt
+++ b/Documentation/devicetree/bindings/input/misc/mma8x5x.txt
@@ -22,6 +22,7 @@
- interrupt-parent : parent of interrupt.
- interrupts : sensor signal interrupt to indicate new data ready or
a motion is detected.
+ - fsl,use-interrupt : to enable interrupt mode.
- fsl,irq-gpio : First irq gpio which is to provide interrupts to host, same
as "interrupts" node. It will also contain active low or active
high information.
@@ -36,4 +37,5 @@
vio-supply = <&pm8110_l14>;
fsl,sensors-position = <5>;
fsl,irq-gpio = <&msmgpio 0x81 0x02>;
+ fsl,use-interrupt;
};
\ No newline at end of file
diff --git a/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt b/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt
index f2ca95b..ba61a2f 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt
@@ -29,7 +29,7 @@
It is a four tuple consisting of min x,
min y, max x and max y values.
- goodix,i2c-pull-up : To specify pull up is required.
- - goodix,no-force-update : To specify force update is allowed.
+ - goodix,force-update : To specify force update is allowed.
- goodix,enable-power-off : Power off touchscreen during suspend.
- goodix,button-map : Button map of key codes. The number of key codes
depend on panel.
@@ -52,6 +52,12 @@
- goodix,cfg-data5 : Touch screen controller config data group 5. Ask vendor
to provide that.
- goodix,fw-name : Touch screen controller firmware file name.
+ - goodix,slide-wakeup : To specify slide-wakeup property is enabled or not.
+ - goodix,dbl-clk-wakeup : To specify dbl-clk-wakeup property is enabled or not.
+ - goodix,change-x2y : To specify change-x2y property is enabled or not.
+ - goodix,driver-send-cfg : To specify driver-send-cfg property is enabled or not.
+ - goodix,have-touch-key : To specify have-touch-key property is enabled or not.
+ - goodix,with-pen : To specify with-pen property is enabled or not.
Example:
i2c@f9927000 {
goodix@5d {
@@ -87,5 +93,7 @@
FF FF FF FF FF FF FF 22 22 22
22 22 22 FF 07 01];
goodix,fw_name = "gtp_fw.bin";
+ goodix,have-touch-key;
+ goodix,driver-send-cfg;
};
};
diff --git a/Documentation/devicetree/bindings/media/video/msm-cci.txt b/Documentation/devicetree/bindings/media/video/msm-cci.txt
index 317c078..f256d78 100644
--- a/Documentation/devicetree/bindings/media/video/msm-cci.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-cci.txt
@@ -48,6 +48,7 @@
Required properties:
- compatible : should be manufacturer name followed by sensor name
+ - "qcom,camera"
- "qcom,s5k3l1yx"
- "sne,imx134"
- "qcom,imx135"
@@ -153,6 +154,8 @@
- qcom,vdd-cx-supply : should contain regulator from which cx voltage is
supplied
- qcom,vdd-cx-name : should contain names of cx regulator
+- qcom,eeprom-src : if eeprom memory is supported by this sensor, this
+ property should contain phandle of respective eeprom nodes
* Qualcomm MSM ACTUATOR
@@ -208,6 +211,7 @@
qcom,csiphy-sd-index = <2>;
qcom,csid-sd-index = <0>;
qcom,actuator-src = <&actuator0>;
+ qcom,eeprom-src = <&eeprom0 &eeprom1>;
qcom,led-flash-src = <&led_flash0>;
qcom,mount-angle = <90>;
qcom,sensor-name = "s5k3l1yx";
diff --git a/Documentation/devicetree/bindings/media/video/msm-eeprom.txt b/Documentation/devicetree/bindings/media/video/msm-eeprom.txt
index c7821f5..6aa0a16 100644
--- a/Documentation/devicetree/bindings/media/video/msm-eeprom.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-eeprom.txt
@@ -57,6 +57,14 @@
- qcom,pageen%d : number %d page enable reg size, start address, address type,
data, data type, delay in ms. size 0 stand for not used.
- cam_vdig-supply : should contain regulator to be used for the digital vdd.
+- qcom,saddr%d : property should specify the slave address for block (%d).
+
+Optional properties -EEPROM Camera Multimodule
+- qcom,mm-data-support - Camera Multimodule data capability flag.
+- qcom,mm-data-compressed - Camera Multimodule data compresion flag.
+- qcom,mm-data-offset - Camera Multimodule data start offset.
+- qcom,mm-data-size - Camera Multimodule data size.
+
Example:
@@ -75,6 +83,12 @@
qcom,pageen1 = <1 0x0202 2 0x01 1 10>;
qcom,poll1 = <0 0x0 2 0 1 1>;
qcom,mem1 = <32 0x3000 2 0 1 0>;
+ qcom,saddr1 = <0x62>;
+
+ qcom,mm-data-support;
+ qcom,mm-data-compressed;
+ qcom,mm-data-offset = 0;
+ qcom,mm-data-size = 0;
cam_vdig-supply = <&pm8226_l5>;
cam_vio-supply = <&pm8226_lvs1>;
diff --git a/Documentation/devicetree/bindings/nfc/nfc-nci.txt b/Documentation/devicetree/bindings/nfc/nfc-nci.txt
index dca7d5c..2c06599 100644
--- a/Documentation/devicetree/bindings/nfc/nfc-nci.txt
+++ b/Documentation/devicetree/bindings/nfc/nfc-nci.txt
@@ -8,13 +8,15 @@
- reg: NCI i2c slave address.
- qcom,dis-gpio: specific gpio for hardware reset.
- qcom,irq-gpio: specific gpio for read interrupt.
-- qcom,clk-src: nfc clock source ("BBCLK2", "RFCLK3", "GPCLK","GPCLK2" ...)
-- qcom,clk-en-gpio: msm gpio clock,used ony if clock source is msm gpio
+- qcom,clk-src: nfc clock source ("BBCLK2", "RFCLK3", "GPCLK", "GPCLK2", ...)
+- qcom,clk-src-gpio: msm gpio clock,used ony if clock source is msm gpio
+- qcom,clk-req-gpio: clk-req input gpio for MSM based clocks.
+ not used for pmic implementation
- vlogic-supply: LDO for power supply
- interrupt-parent: Should be phandle for the interrupt controller
that services interrupts for this device.
-- interrupts: should contain the NFC interrupt. NFC has one read interrupt.
-- qcom,clk-gpio: pmic gpio on which bbclk2 signal is coming.
+- interrupts: Nfc read interrupt,gpio-clk-req interrupt
+- qcom,clk-gpio: pmic or msm gpio on which bbclk2 signal is coming.
LDO example:
@@ -24,8 +26,8 @@
reg = <0x0e>;
qcom,irq-gpio = <&msmgpio 77 0x00>;
qcom,dis-gpio = <&msmgpio 93 0x00>;
- qcom,clk-en-gpio = <&msmgpio 78 0x00>;
- qcom,clk-src = "GPCLK";
+ qcom,clk-src-gpio = <&msmgpio 78 0x00>;
+ qcom,clk-src = "GPCLK2";
interrupt-parent = <&msmgpio>;
interrupts = <77 0>;
qcom,clk-gpio = <&msmgpio 75 0x00>;
diff --git a/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt b/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
index 83237f9..7b70369 100644
--- a/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
+++ b/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
@@ -36,6 +36,10 @@
to include it more than once.
- qcom,s3-debounce The debounce delay for stage3 reset trigger in
secs. The values range from 0 to 128.
+- qcom,s3-src The source for stage 3 reset. It can be one of
+ "kpdpwr", "resin", "kpdpwr-or-resin" or
+ "kpdpwr-and-resin". The default value is
+ "kpdpwr-and-resin".
All the below properties are in the sub-node section (properties of the child
node).
@@ -92,6 +96,7 @@
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
qcom,s3-debounce = <32>;
+ qcom,s3-src = "resin";
qcom,pon_1 {
qcom,pon-type = <0>;
diff --git a/Documentation/devicetree/bindings/power/qpnp-charger.txt b/Documentation/devicetree/bindings/power/qpnp-charger.txt
index 7d8fe0a..50381a2 100644
--- a/Documentation/devicetree/bindings/power/qpnp-charger.txt
+++ b/Documentation/devicetree/bindings/power/qpnp-charger.txt
@@ -103,6 +103,9 @@
- qcom,use-external-rsense A boolean that controls whether BMS will use
an external sensor resistor instead of the default
RDS of the batfet.
+- qcom,vbatdet-maxerr-mv This property in mV is a hystersis value for the charge
+ resume voltage property qcom,vbatdet-delta-mv. If this
+ property is not defined it defaults to 50 mV.
Sub node required structure:
- A qcom,chg node must be a child of an SPMI node that has specified
diff --git a/Documentation/devicetree/bindings/qseecom/qseecom.txt b/Documentation/devicetree/bindings/qseecom/qseecom.txt
index ac82387..9e582e2 100644
--- a/Documentation/devicetree/bindings/qseecom/qseecom.txt
+++ b/Documentation/devicetree/bindings/qseecom/qseecom.txt
@@ -11,6 +11,9 @@
- qcom, msm_bus,num_paths: The paths for source and destination ports
- qcom, msm_bus,vectors: Vectors for bus topology.
+Optional properties:
+ - qcom,support-bus-scaling : optional, indicates if driver support scaling the bus for crypto operation.
+
Example:
qcom,qseecom@fe806000 {
compatible = "qcom,qseecom";
diff --git a/Documentation/devicetree/bindings/regulator/fan53555.txt b/Documentation/devicetree/bindings/regulator/fan53555.txt
new file mode 100644
index 0000000..57b54d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/fan53555.txt
@@ -0,0 +1,50 @@
+Fairchild Semiconductor FAN53555 regulator
+
+The FAN53555 is a step-down switching voltage regulator that delivers a
+digitally programmable output from an input voltage supply of 2.5 V to 5.5 V.
+The output voltage is programmed through an I2C interface capable of operating
+up to 3.4 MHz.
+
+The fan53555 interface is via I2C bus.
+
+Required Properties:
+- compatible: Must be "fairchild,fan53555-regulator".
+- reg: The device 8-bit I2C address.
+- fairchild,backup-vsel: Register ID of backup register.
+ Supported values are 0 or 1.
+ The voltage selection ID used while the system
+ is active will be the other option not used
+ during running.
+- regulator-min-microvolt: Minimum voltage in microvolts supported by this
+ regulator.
+- regulator-max-microvolt: Maximum voltage in microvolts supported by this
+ regulator.
+- regulator-ramp-delay: The slew rate of the regulator, in uV/us.
+ Supported values are 64000, 32000, 16000,
+ 8000, 4000, 2000, 1000 and 500.
+
+Optional Properties:
+- fairchild,vsel-gpio: Present: GPIO connects to the VSEL pin and set
+ the output.
+ Not Present: No GPIO is connected to vsel pin.
+- fairchild,restore-reg: Present: Restore vsel register from backup
+ register.
+ Not Present: No restore.
+- fairchild,disable-suspend: Present: Disable regulator suspend method.
+ Not Present: Do not disable regulator suspend
+ method.
+
+Example:
+ i2c_0 {
+ fan53555-regulator@60 {
+ compatible = "fairchild,fan53555-regulator";
+ reg = <0x60>;
+ fairchild,backup-vsel = <1>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <8000>;
+ fairchild,vsel-gpio = <&msmgpio 2 1>;
+ fairchild,restore-reg;
+ fairchild,disable-suspend;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/regulator/onsemi-ncp6335d.txt b/Documentation/devicetree/bindings/regulator/onsemi-ncp6335d.txt
new file mode 100644
index 0000000..648cb11
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/onsemi-ncp6335d.txt
@@ -0,0 +1,71 @@
+ON Semiconductor NCP6335d regulator
+
+NCP6335d is able to deliver up to 5.0 A, with programmable output voltage from
+0.6 V to 1.87 V in 10mV steps, with synchronous rectification and automatic PWM/
+PFM transitions, enable pins and power good/fail signaling.
+
+The NCP6335d interface is via I2C bus.
+
+Required Properties:
+- compatible: Must be "onnn,ncp6335d-regulator".
+- reg: The device 8-bit I2C address.
+- regulator-min-microvolt: Minimum voltage in microvolts supported by this
+ regulator.
+- regulator-max-microvolt: Maximum voltage in microvolts supported by this
+ regulator.
+- onnn,min-setpoint: Minimum setpoint voltage in microvolts supported
+ by this regulator.
+- onnn,step-size: The step size of the regulator, in uV.
+- onnn,min-slew-ns: Minimum time in ns needed to change voltage by
+ one step size. This value corresponds to DVS
+ mode bit of 00b in command register.
+- onnn,max-slew-ns: Maximum time in ns needed to change voltage by
+ one step size. This value corresponds to DVS
+ mode bit of 11b in command register.
+- onnn,vsel: Working vsel register. Supported value are 0
+ or 1.
+- onnn,slew-ns: Time in ns needed to change voltage by one step
+ size. Supported value are 333, 666, 1333, 2666.
+
+Optional Properties:
+- onnn,discharge-enable: Present: discharge enabled.
+ Not Present: discharge disabled.
+- onnn,restore-reg: Present: Restore vsel register from backup register.
+ Not Present: No restore.
+- onnn,vsel-gpio: Present: GPIO connects to the VSEL pin and set the
+ VSEL pin according to device tree flag.
+ Not Present: No GPIO is connected to vsel pin.
+- onnn,sleep-enable: Present: Forced in sleep mode when EN and VSEL
+ pins are low.
+ Not Present: Low quiescent current mode when EN and VSEL
+ pins are low.
+- onnn,tlmm-config: Array of 2 elements to indicate the mask value and the value
+ to write in the masked bits.
+ This property is used to allow the VSEL GPIO to toggle on certain
+ Qualcomm processors. If it is not specified, then no register write is required.
+ The 2 elements with index[0..1] are:
+ [0] => the mask value;
+ [1] => the value to write into the masked bits.
+- onnn,mode: A string which specifies the initial mode to use for the regulator.
+ Supported values are "pwm" and "auto". PWM mode is more
+ robust, but draws more current than auto mode. If this propery
+ is not specified, then the regulator will be in the hardware default mode.
+
+Example:
+ i2c_0 {
+ ncp6335d-regulator@1c {
+ compatible = "onnn,ncp6335d-regulator";
+ reg = <0x1c>;
+ onnn,vsel = <0>;
+ onnn,slew-rate-ns = <2666>;
+ onnn,discharge-enable;
+ onnn,step-size = <10000>;
+ onnn,min-slew-ns = <333>;
+ onnn,max-slew-ns = <2666>;
+
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1350000>;
+ onnn,min-setpoint = <600000>;
+ onnn,vsel-gpio = <&msmgpio 2 1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/slimbus/slim-msm-ctrl.txt b/Documentation/devicetree/bindings/slimbus/slim-msm-ctrl.txt
index 64f2ddd..e199e55 100644
--- a/Documentation/devicetree/bindings/slimbus/slim-msm-ctrl.txt
+++ b/Documentation/devicetree/bindings/slimbus/slim-msm-ctrl.txt
@@ -54,7 +54,11 @@
are to be used, so that application processor can query
logical address of the ported generic device to be used.
Other than PC, fields of EA are same across platforms.
-
+ -qcom,slim-mdm: This value indicates presence of slimbus component on
+ external mdm. This property enables the slimbus driver to
+ receive subsytem restart notification from mdm and follow
+ appropriate steps to ensure communication on the bus can be
+ resumed after mdm-restart.
Example:
slim@fe12f000 {
cell-index = <1>;
diff --git a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
index 6277054..e672a14 100644
--- a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
+++ b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
@@ -461,7 +461,11 @@
codec.
- qcom,mbhc-bias-internal: Flag to indicate if internal micbias should be used
for headset detection.
-
+- qcom,mbhc-audio-jack-type : String to indicate the jack type on the hardware.
+ Possible Values:
+ 4-pole-jack : Jack on the hardware is 4-pole.
+ 5-pole-jack : Jack on the hardware is 5-pole.
+ 6-pole-jack : Jack on the hardware is 6-pole.
* APQ8074 ASoC Machine driver
Required properties:
@@ -518,6 +522,7 @@
qcom,sec-auxpcm-gpio-sync = <&msmgpio 80 0>;
qcom,sec-auxpcm-gpio-din = <&msmgpio 81 0>;
qcom,sec-auxpcm-gpio-dout = <&msmgpio 82 0>;
+ qcom,mbhc-audio-jack-type = "4-pole-jack";
};
* msm-dai-mi2s
diff --git a/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt b/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt
index e1681ca..415a3ef 100644
--- a/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt
+++ b/Documentation/devicetree/bindings/thermal/qpnp-adc-tm.txt
@@ -26,6 +26,12 @@
to set temperature thresholds and receive notification when the temperature
crosses a set threshold, read temperature and enable/set trip types supported
by the thermal framework.
+- qcom,meas-interval-timer-idx: If present select from the following timer index to choose
+ a preset configurable measurement interval timer value. The driver defaults
+ to timer 1 with a measurement interval of 1 second if the property is not present.
+ 0 : Select Timer 1 for a measurement polling interval of 1 second.
+ 1 : Select Timer 2 for a measurement polling interval of 500ms.
+ 2 : Select Timer 3 for a measurement polling interval of 4 seconds.
Client required property:
- qcom,<consumer name>-adc_tm : The phandle to the corresponding adc_tm device.
@@ -53,6 +59,7 @@
2 : pre-div ratio of {1, 4}
3 : pre-div ratio of {1, 6}
4 : pre-div ratio of {1, 20}
+ 5 : pre-div ratio of {1, 8}
- qcom,calibration-type : Reference voltage to use for channel calibration.
Channel calibration is dependendent on the channel.
Certain channels like XO_THERM, BATT_THERM use ratiometric
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 623a23c..7d3d435 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -93,6 +93,8 @@
enable this feature without proper bus voting.
-qcom,disable-retention-with-vdd-min: If present dont allow phy retention but allow
vdd min.
+- qcom,usbin-vadc: Corresponding vadc device's phandle to read usbin voltage using VADC.
+ This will be used to get value of usb power supply's VOLTAGE_NOW property.
Example HSUSB OTG controller device node :
usb@f9690000 {
@@ -120,6 +122,7 @@
qcom,disable-retention-with-vdd-min;
qcom,hsusb-otg-dpsehv-int = <49>;
qcom,hsusb-otg-dmsehv-int = <58>;
+ qcom,usbin-vadc = <&pm8226_vadc>;
qcom,msm_bus,name = "usb2";
qcom,msm_bus,num_cases = <2>;
qcom,msm_bus,active_only = <0>;
diff --git a/Documentation/devicetree/bindings/usb/msm-ssusb.txt b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
index a7a646d..bfa9abe 100644
--- a/Documentation/devicetree/bindings/usb/msm-ssusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
@@ -58,6 +58,8 @@
for TX fifo allocation in QDSS composition
- qcom,dwc-ssphy-deemphasis-value: This property if present represents ss phy
deemphasis value to be used for overriding into SSPHY register.
+- qcom,usbin-vadc: Corresponding vadc device's phandle to read usbin voltage using VADC.
+ This will be used to get value of usb power supply's VOLTAGE_NOW property,
Sub nodes:
- Sub node for "DWC3- USB3 controller".
@@ -85,6 +87,7 @@
qcom,dwc-usb3-msm-tx-fifo-size = <29696>;
qcom,dwc-usb3-msm-qdss-tx-fifo-size = <16384>;
qcom,dwc-ssphy-deemphasis-value = <26>;
+ qcom,usbin-vadc = <&pm8941_vadc>;
qcom,msm_bus,name = "usb3";
qcom,msm_bus,num_cases = <2>;
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 35e7324..fd826d9 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -17,6 +17,7 @@
denx Denx Software Engineering
epson Seiko Epson Corp.
est ESTeem Wireless Modems
+fairchild Fairchild Semiconductor International, Inc.
focaltech Focaltech systems
fsl Freescale Semiconductor
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
diff --git a/arch/arm/boot/dts/apq8084-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/apq8084-camera-sensor-cdp.dtsi
new file mode 100644
index 0000000..5577d16
--- /dev/null
+++ b/arch/arm/boot/dts/apq8084-camera-sensor-cdp.dtsi
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&cci {
+
+ actuator0: qcom,actuator@36 {
+ cell-index = <1>;
+ reg = <0x36>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ };
+
+ qcom,camera@20 {
+ compatible = "qcom,imx135";
+ reg = <0x20>;
+ qcom,slave-id = <0x20 0x0016 0x0135>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,sensor-name = "imx135";
+ qcom,actuator-src = <&actuator0>;
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 35 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 30000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x1F>;
+ qcom,sensor-position = <0>;
+ qcom,sensor-mode = <0>;
+ qcom,sensor-type = <0>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@6d {
+ compatible = "qcom,imx132";
+ reg = <0x6d>;
+ qcom,slave-id = <0x6c 0x0 0x0132>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,mount-angle = <270>;
+ qcom,sensor-name = "imx132";
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vdig-supply = <&pma8084_l15>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2800000 1200000 0>;
+ qcom,cam-vreg-max-voltage = <2800000 1200000 0>;
+ qcom,cam-vreg-op-mode = <80000 105000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 25 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x7>;
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x00>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,actuator-src = <&actuator0>;
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 35 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x01>;
+ qcom,slave-id = <0x6c 0x0 0x0132>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,mount-angle = <270>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vdig-supply = <&pma8084_l15>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2850000 1225000 0>;
+ qcom,cam-vreg-max-voltage = <2850000 1225000 0>;
+ qcom,cam-vreg-op-mode = <80000 105000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 25 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+};
diff --git a/arch/arm/boot/dts/apq8084-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/apq8084-camera-sensor-mtp.dtsi
new file mode 100644
index 0000000..02d8b59
--- /dev/null
+++ b/arch/arm/boot/dts/apq8084-camera-sensor-mtp.dtsi
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&cci {
+
+ actuator0: qcom,actuator@36 {
+ cell-index = <1>;
+ reg = <0x36>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ };
+
+ qcom,camera@20 {
+ compatible = "qcom,imx135";
+ reg = <0x20>;
+ qcom,slave-id = <0x20 0x0016 0x0135>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,sensor-name = "imx135";
+ qcom,actuator-src = <&actuator0>;
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 35 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 30000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x1F>;
+ qcom,sensor-position = <0>;
+ qcom,sensor-mode = <0>;
+ qcom,sensor-type = <0>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@6d {
+ compatible = "qcom,imx132";
+ reg = <0x6d>;
+ qcom,slave-id = <0x6c 0x0 0x0132>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,mount-angle = <90>;
+ qcom,sensor-name = "imx132";
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vdig-supply = <&pma8084_l15>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2800000 1200000 0>;
+ qcom,cam-vreg-max-voltage = <2800000 1200000 0>;
+ qcom,cam-vreg-op-mode = <80000 105000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 25 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x7>;
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x00>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,actuator-src = <&actuator0>;
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2800000 2700000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 35 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x01>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,mount-angle = <270>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vdig-supply = <&pma8084_l15>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2850000 1225000 0>;
+ qcom,cam-vreg-max-voltage = <2850000 1225000 0>;
+ qcom,cam-vreg-op-mode = <80000 105000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 25 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+};
diff --git a/arch/arm/boot/dts/apq8084-mdss.dtsi b/arch/arm/boot/dts/apq8084-mdss.dtsi
index 0e771ce..329ab32 100644
--- a/arch/arm/boot/dts/apq8084-mdss.dtsi
+++ b/arch/arm/boot/dts/apq8084-mdss.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,6 +24,20 @@
qcom,max-bandwidth-low-kbps = <6000000>;
qcom,max-bandwidth-high-kbps = <6000000>;
+ /* Bus Scale Settings */
+ qcom,msm-bus,name = "mdss_mdp";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>, <23 512 0 0>,
+ <22 512 0 6400000>, <23 512 0 6400000>,
+ <22 512 0 6400000>, <23 512 0 6400000>;
+
+ /* Fudge factors */
+ qcom,mdss-ab-factor = <2 1>; /* 2 times */
+ qcom,mdss-ib-factor = <6 5>; /* 1.2 times */
+ qcom,mdss-clk-factor = <105 100>; /* 1.05 times */
+
qcom,max-clk-rate = <320000000>;
qcom,mdss-pipe-vig-off = <0x00001200 0x00001600
@@ -60,6 +74,15 @@
qcom,mdss-has-bwc;
qcom,mdss-has-decimation;
+ /* buffer parameters to calculate prefill bandwidth */
+ qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
+ qcom,mdss-prefill-y-buffer-bytes = <4096>;
+ qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
+ qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
+ qcom,mdss-prefill-post-scaler-buffer-pixels = <2048>;
+ qcom,mdss-prefill-pingpong-buffer-pixels = <5120>;
+ qcom,mdss-prefill-fbc-lines = <2>;
+
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
diff --git a/arch/arm/boot/dts/dsi-panel-generic-720p-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-generic-720p-cmd.dtsi
index 17e6e94..14d4c35 100644
--- a/arch/arm/boot/dts/dsi-panel-generic-720p-cmd.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-generic-720p-cmd.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -59,8 +59,8 @@
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-te-pin-select = <1>;
- qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>;
- qcom,mdss-dsi-te-v-sync-continues-lines = <0x3c>;
+ qcom,mdss-dsi-wr-mem-start = <0x2c>;
+ qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
diff --git a/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi b/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
index 5302d8ae..760ecd7 100644
--- a/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-hx8394a-720p-video.dtsi
@@ -77,6 +77,8 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 1>, <1 20>;
+ qcom,mdss-pan-physical-width-dimension = <59>;
+ qcom,mdss-pan-physical-height-dimension = <104>;
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-jdi-1080p-video.dtsi b/arch/arm/boot/dts/dsi-panel-jdi-1080p-video.dtsi
index be42509..917c637 100644
--- a/arch/arm/boot/dts/dsi-panel-jdi-1080p-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-jdi-1080p-video.dtsi
@@ -66,5 +66,7 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 200>, <1 20>;
+ qcom,mdss-pan-physical-width-dimension = <61>;
+ qcom,mdss-pan-physical-height-dimension = <110>;
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-jdi-dualmipi0-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi0-cmd.dtsi
new file mode 100644
index 0000000..d8bf36f
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi0-cmd.dtsi
@@ -0,0 +1,91 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_dual_jdi_cmd_0: qcom,mdss_dsi_jdi_qhd_dualmipi0_cmd{
+ qcom,mdss-dsi-panel-name = "Dual 0 cmd mode dsi panel";
+ qcom,mdss-dsi-panel-controller = <&mdss_dsi0>;
+ qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
+ qcom,mdss-dsi-panel-destination = "display_1";
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-width = <1280>;
+ qcom,mdss-dsi-panel-height = <1440>;
+ qcom,mdss-dsi-h-front-porch = <120>;
+ qcom,mdss-dsi-h-back-porch = <44>;
+ qcom,mdss-dsi-h-pulse-width = <16>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <4>;
+ qcom,mdss-dsi-v-front-porch = <8>;
+ qcom,mdss-dsi-v-pulse-width = <4>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-color-order = "rgb_swap_rgb";
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+ qcom,mdss-dsi-lane-map = "lane_map_0123";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-panel-broadcast-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ qcom,mdss-dsi-panel-timings = [cd 32 22 00 60 64 26 34 29 03
+ 04 00];
+ qcom,mdss-dsi-reset-sequence = <1 200>, <0 200>, <1 20>;
+ qcom,mdss-dsi-t-clk-post = <0x03>;
+ qcom,mdss-dsi-t-clk-pre = <0x27>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ qcom,mdss-dsi-te-pin-select = <1>;
+ qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>;
+ qcom,mdss-dsi-te-v-sync-continues-lines = <0x3c>;
+ qcom,mdss-dsi-te-dcs-command = <1>;
+ qcom,mdss-dsi-te-check-enable;
+ qcom,mdss-dsi-te-using-te-pin;
+ qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 b0 03
+ 05 01 00 00 0a 00 01 00
+ /* Soft reset, wait 10ms */
+ 15 01 00 00 0a 00 02 3a 77
+ /* Set Pixel format (24 bpp) */
+ 39 01 00 00 0a 00 05 2a 00 00 04 ff
+ /* Set Column address */
+ 39 01 00 00 0a 00 05 2b 00 00 05 9f
+ /* Set page address */
+ 15 01 00 00 0a 00 02 35 00
+ /* Set tear on */
+ 39 01 00 00 0a 00 03 44 00 00
+ /* Set tear scan line */
+ 15 01 00 00 0a 00 02 51 ff
+ /* write display brightness */
+ 15 01 00 00 0a 00 02 53 24
+ /* write control brightness */
+ 15 01 00 00 0a 00 02 55 00
+ /* CABC brightness */
+ 05 01 00 00 78 00 01 11
+ /* exit sleep mode, wait 120ms */
+ 05 01 00 00 10 00 01 29];
+ /* Set display on, wait 16ms */
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-panel-jdi-dualmipi0-video.dtsi b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi0-video.dtsi
new file mode 100644
index 0000000..5cf88f9
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi0-video.dtsi
@@ -0,0 +1,92 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_dual_jdi_video_0: qcom,dsi_jdi_qhd_video_0 {
+ qcom,mdss-dsi-panel-name = "Dual 0 video mode dsi panel";
+ qcom,mdss-dsi-panel-controller = <&mdss_dsi0>;
+ qcom,mdss-dsi-panel-type = "dsi_video_mode";
+ qcom,mdss-dsi-panel-destination = "display_1";
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-width = <1280>;
+ qcom,mdss-dsi-panel-height = <1440>;
+ qcom,mdss-dsi-h-front-porch = <120>;
+ qcom,mdss-dsi-h-back-porch = <44>;
+ qcom,mdss-dsi-h-pulse-width = <16>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <4>;
+ qcom,mdss-dsi-v-front-porch = <8>;
+ qcom,mdss-dsi-v-pulse-width = <4>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-panel-broadcast-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ qcom,mdss-dsi-panel-timings = [cd 32 22 00 60 64 26 34 29 03
+ 04 00];
+ qcom,mdss-dsi-t-clk-post = <0x03>;
+ qcom,mdss-dsi-t-clk-pre = <0x27>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
+ qcom,mdss-dsi-on-command = [05 01 00 00 0a 00 01 00
+ /* Soft reset, wait 10ms */
+ 15 01 00 00 0a 00 02 3a 77
+ /* Set Pixel format (24 bpp) */
+ 39 01 00 00 0a 00 05 2a 00 00 04 ff
+ /* Set Column address */
+ 39 01 00 00 0a 00 05 2b 00 00 05 9f
+ /* Set page address */
+ 15 01 00 00 0a 00 02 35 00
+ /* Set tear on */
+ 39 01 00 00 0a 00 03 44 00 00
+ /* Set tear scan line */
+ 15 01 00 00 0a 00 02 51 ff
+ /* write display brightness */
+ 15 01 00 00 0a 00 02 53 24
+ /* write control brightness */
+ 15 01 00 00 0a 00 02 55 00
+ /* CABC brightness */
+ 05 01 00 00 78 00 01 11
+ /* exit sleep mode, wait 120ms */
+ 23 01 00 00 0a 00 02 b0 00
+ /* MCAP */
+ 29 01 00 00 0a 00 02 b3 14
+ /* Interface setting */
+ 29 01 00 00 0a 00 14 ce 7d 40 48 56 67
+ 78 88 98 a7 b5 c3 d1 de e9 f2 fa ff 04
+ 00 /* Backlight control 4 */
+ 23 01 00 00 0a 00 02 b0 03
+ /* MCAP */
+ 05 01 00 00 10 00 01 29];
+ /* Set display on, wait 16ms */
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+ qcom,mdss-dsi-reset-sequence = <1 20>, <0 200>, <1 20>;
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-panel-jdi-dualmipi1-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi1-cmd.dtsi
new file mode 100644
index 0000000..e1473ca
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi1-cmd.dtsi
@@ -0,0 +1,91 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_dual_jdi_cmd_1: qcom,mdss_dsi_jdi_qhd_dualmipi1_cmd{
+ qcom,mdss-dsi-panel-name = "Dual 1 cmd mode dsi panel";
+ qcom,mdss-dsi-panel-controller = <&mdss_dsi1>;
+ qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
+ qcom,mdss-dsi-panel-destination = "display_2";
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-width = <1280>;
+ qcom,mdss-dsi-panel-height = <1440>;
+ qcom,mdss-dsi-h-front-porch = <120>;
+ qcom,mdss-dsi-h-back-porch = <44>;
+ qcom,mdss-dsi-h-pulse-width = <16>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <4>;
+ qcom,mdss-dsi-v-front-porch = <8>;
+ qcom,mdss-dsi-v-pulse-width = <4>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-color-order = "rgb_swap_rgb";
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+ qcom,mdss-dsi-lane-map = "lane_map_0123";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-panel-broadcast-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ qcom,mdss-dsi-panel-timings = [cd 32 22 00 60 64 26 34 29 03
+ 04 00];
+ qcom,mdss-dsi-reset-sequence = <1 200>, <0 200>, <1 20>;
+ qcom,mdss-dsi-t-clk-post = <0x03>;
+ qcom,mdss-dsi-t-clk-pre = <0x27>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ qcom,mdss-dsi-te-pin-select = <1>;
+ qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>;
+ qcom,mdss-dsi-te-v-sync-continues-lines = <0x3c>;
+ qcom,mdss-dsi-te-dcs-command = <1>;
+ qcom,mdss-dsi-te-check-enable;
+ qcom,mdss-dsi-te-using-te-pin;
+ qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 b0 03
+ 05 01 00 00 0a 00 01 00
+ /* Soft reset, wait 10ms */
+ 15 01 00 00 0a 00 02 3a 77
+ /* Set Pixel format (24 bpp) */
+ 39 01 00 00 0a 00 05 2a 00 00 04 ff
+ /* Set Column address */
+ 39 01 00 00 0a 00 05 2b 00 00 05 9f
+ /* Set page address */
+ 15 01 00 00 0a 00 02 35 00
+ /* Set tear on */
+ 39 01 00 00 0a 00 03 44 00 00
+ /* Set tear scan line */
+ 15 01 00 00 0a 00 02 51 ff
+ /* write display brightness */
+ 15 01 00 00 0a 00 02 53 24
+ /* write control brightness */
+ 15 01 00 00 0a 00 02 55 00
+ /* CABC brightness */
+ 05 01 00 00 78 00 01 11
+ /* exit sleep mode, wait 120ms */
+ 05 01 00 00 10 00 01 29];
+ /* Set display on, wait 16ms */
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-panel-jdi-dualmipi1-video.dtsi b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi1-video.dtsi
new file mode 100644
index 0000000..a405bff
--- /dev/null
+++ b/arch/arm/boot/dts/dsi-panel-jdi-dualmipi1-video.dtsi
@@ -0,0 +1,92 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_dual_jdi_video_1: qcom,dsi_jdi_qhd_video_1 {
+ qcom,mdss-dsi-panel-name = "Dual 1 video mode dsi panel";
+ qcom,mdss-dsi-panel-controller = <&mdss_dsi1>;
+ qcom,mdss-dsi-panel-type = "dsi_video_mode";
+ qcom,mdss-dsi-panel-destination = "display_2";
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-width = <1280>;
+ qcom,mdss-dsi-panel-height = <1440>;
+ qcom,mdss-dsi-h-front-porch = <120>;
+ qcom,mdss-dsi-h-back-porch = <44>;
+ qcom,mdss-dsi-h-pulse-width = <16>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <4>;
+ qcom,mdss-dsi-v-front-porch = <8>;
+ qcom,mdss-dsi-v-pulse-width = <4>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ qcom,mdss-dsi-panel-broadcast-mode;
+ qcom,mdss-dsi-panel-timings = [cd 32 22 00 60 64 26 34 29 03
+ 04 00];
+ qcom,mdss-dsi-t-clk-post = <0x03>;
+ qcom,mdss-dsi-t-clk-pre = <0x27>;
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ qcom,mdss-dsi-on-command = [05 01 00 00 0a 00 01 00
+ /* Soft reset, wait 10ms */
+ 15 01 00 00 0a 00 02 3a 77
+ /* Set Pixel format (24 bpp) */
+ 39 01 00 00 0a 00 05 2a 00 00 04 ff
+ /* Set Column address */
+ 39 01 00 00 0a 00 05 2b 00 00 05 9f
+ /* Set page address */
+ 15 01 00 00 0a 00 02 35 00
+ /* Set tear on */
+ 39 01 00 00 0a 00 03 44 00 00
+ /* Set tear scan line */
+ 15 01 00 00 0a 00 02 51 ff
+ /* write display brightness */
+ 15 01 00 00 0a 00 02 53 24
+ /* write control brightness */
+ 15 01 00 00 0a 00 02 55 00
+ /* CABC brightness */
+ 05 01 00 00 78 00 01 11
+ /* exit sleep mode, wait 120ms */
+ 23 01 00 00 0a 00 02 b0 00
+ /* MCAP */
+ 29 01 00 00 0a 00 02 b3 14
+ /* Interface setting */
+ 29 01 00 00 0a 00 14 ce 7d 40 48 56 67
+ 78 88 98 a7 b5 c3 d1 de e9 f2 fa ff 04
+ 00 /* Backlight control 4 */
+ 23 01 00 00 0a 00 02 b0 03
+ /* MCAP */
+ 05 01 00 00 10 00 01 29];
+ /* Set display on, wait 16ms */
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+ qcom,mdss-dsi-reset-sequence = <1 20>, <0 200>, <1 20>;
+ };
+};
diff --git a/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi
index d3547d8..cbc38f2 100644
--- a/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-nt35590-720p-cmd.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -517,7 +517,7 @@
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-te-pin-select = <1>;
- qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>;
+ qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
diff --git a/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi b/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi
index 5ebb516..39b10b3 100644
--- a/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-ssd2080m-720p-video.dtsi
@@ -118,5 +118,7 @@
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 20>;
+ qcom,mdss-dsi-lp11-init;
+ qcom,mdss-dsi-init-delay-us = <50000>;
};
};
diff --git a/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi b/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
index 4cd1563..3106cd4 100644
--- a/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-truly-wvga-cmd.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -151,8 +151,8 @@
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-te-pin-select = <1>;
- qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>;
- qcom,mdss-dsi-te-v-sync-continues-lines = <0x3c>;
+ qcom,mdss-dsi-wr-mem-start = <0x2c>;
+ qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
diff --git a/arch/arm/boot/dts/msm-pm8110.dtsi b/arch/arm/boot/dts/msm-pm8110.dtsi
index 20e8a96..9adbf81 100644
--- a/arch/arm/boot/dts/msm-pm8110.dtsi
+++ b/arch/arm/boot/dts/msm-pm8110.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -256,7 +256,9 @@
pm8110_iadc: iadc@3600 {
compatible = "qcom,qpnp-iadc";
- reg = <0x3600 0x100>;
+ reg = <0x3600 0x100>,
+ <0x12f1 0x1>;
+ reg-names = "iadc-base", "batt-id-trim-cnst-rds";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x36 0x0>;
@@ -265,6 +267,7 @@
qcom,adc-vdd-reference = <1800>;
qcom,iadc-vadc = <&pm8110_vadc>;
qcom,iadc-poll-eoc;
+ qcom,use-default-rds-trim = <1>;
chan@0 {
label = "internal_rsense";
diff --git a/arch/arm/boot/dts/msm-pm8226.dtsi b/arch/arm/boot/dts/msm-pm8226.dtsi
index a13e66a..41897da 100644
--- a/arch/arm/boot/dts/msm-pm8226.dtsi
+++ b/arch/arm/boot/dts/msm-pm8226.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,6 +39,7 @@
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
qcom,s3-debounce = <32>;
+ qcom,s3-src = "kpdpwr-and-resin";
qcom,pon_1 {
qcom,pon-type = <0>;
@@ -50,10 +51,6 @@
qcom,pon-type = <1>;
qcom,pull-up = <1>;
linux,code = <114>;
- qcom,s1-timer = <6720>;
- qcom,s2-timer = <2000>;
- qcom,s2-type = <7>;
- qcom,support-reset = <1>;
};
qcom,pon_3 {
@@ -366,6 +363,7 @@
interrupt-names = "eoc-int-en-set";
qcom,adc-bit-resolution = <15>;
qcom,adc-vdd-reference = <1800>;
+ qcom,vadc-poll-eoc;
chan@8 {
label = "die_temp";
@@ -414,7 +412,9 @@
pm8226_iadc: iadc@3600 {
compatible = "qcom,qpnp-iadc";
- reg = <0x3600 0x100>;
+ reg = <0x3600 0x100>,
+ <0x12f1 0x1>;
+ reg-names = "iadc-base", "batt-id-trim-cnst-rds";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x36 0x0>;
@@ -422,6 +422,8 @@
qcom,adc-bit-resolution = <16>;
qcom,adc-vdd-reference = <1800>;
qcom,iadc-vadc = <&pm8226_vadc>;
+ qcom,iadc-poll-eoc;
+ qcom,use-default-rds-trim = <0>;
chan@0 {
label = "internal_rsense";
diff --git a/arch/arm/boot/dts/msm-pm8941.dtsi b/arch/arm/boot/dts/msm-pm8941.dtsi
index 520decd..94a4e83 100644
--- a/arch/arm/boot/dts/msm-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm-pm8941.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -812,7 +812,9 @@
pm8941_iadc: iadc@3600 {
compatible = "qcom,qpnp-iadc";
- reg = <0x3600 0x100>;
+ reg = <0x3600 0x100>,
+ <0x12f1 0x1>;
+ reg-names = "iadc-base", "batt-id-trim-cnst-rds";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x36 0x0>;
@@ -821,6 +823,7 @@
qcom,adc-vdd-reference = <1800>;
qcom,iadc-vadc = <&pm8941_vadc>;
qcom,iadc-poll-eoc;
+ qcom,use-default-rds-trim = <0>;
chan@0 {
label = "internal_rsense";
@@ -872,6 +875,7 @@
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <3>;
qcom,btm-channel-number = <0x68>;
+ qcom,meas-interval-timer-idx = <2>;
};
chan@8 {
diff --git a/arch/arm/boot/dts/msm8226-1080p-cdp.dtsi b/arch/arm/boot/dts/msm8226-1080p-cdp.dtsi
index bb66538..4163b95 100644
--- a/arch/arm/boot/dts/msm8226-1080p-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8226-1080p-cdp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -31,6 +31,7 @@
synaptics,i2c-pull-up;
synaptics,power-down;
synaptics,disable-gpios;
+ synaptics,fw-image-name = "PR1469074-s3408bt_001F010D.img";
};
};
@@ -129,6 +130,7 @@
qcom,cdc-mclk-gpios = <&pm8226_gpios 1 0>;
qcom,cdc-vdd-spkr-gpios = <&pm8226_gpios 2 0>;
qcom,headset-jack-type-NC;
+ qcom,mbhc-audio-jack-type = "6-pole-jack";
};
sound-9302 {
diff --git a/arch/arm/boot/dts/msm8226-1080p-mtp.dtsi b/arch/arm/boot/dts/msm8226-1080p-mtp.dtsi
index 31624de..a99df65 100644
--- a/arch/arm/boot/dts/msm8226-1080p-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8226-1080p-mtp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -31,6 +31,7 @@
synaptics,i2c-pull-up;
synaptics,power-down;
synaptics,disable-gpios;
+ synaptics,fw-image-name = "PR1469074-s3408bt_001F010D.img";
};
};
diff --git a/arch/arm/boot/dts/msm8226-720p-cdp.dtsi b/arch/arm/boot/dts/msm8226-720p-cdp.dtsi
index 9a1eb36..00e90f3 100644
--- a/arch/arm/boot/dts/msm8226-720p-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8226-720p-cdp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -106,6 +106,7 @@
qcom,cdc-mclk-gpios = <&pm8226_gpios 1 0>;
qcom,cdc-vdd-spkr-gpios = <&pm8226_gpios 2 0>;
qcom,headset-jack-type-NC;
+ qcom,mbhc-audio-jack-type = "6-pole-jack";
};
sound-9302 {
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
index 20bb2aa..4170255 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-cdp.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -192,4 +192,63 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,led-flash-src = <&led_flash0>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ cam_vaf-supply = <&pm8226_l15>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 36 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 28 0>,
+ <&msmgpio 35 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
index 07a4383..97e7dff 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-mtp.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -106,4 +106,67 @@
qcom,cci-master = <0>;
status = "ok";
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <0>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,led-flash-src = <&led_flash0>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ cam_vaf-supply = <&pm8226_l15>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 35 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 28 0>,
+ <&msmgpio 36 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
index 0436600..a553918 100644
--- a/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-camera-sensor-qrd.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -442,4 +442,81 @@
qcom,cci-master = <0>;
status = "ok";
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <270>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,eeprom-src = <&eeprom0>;
+ qcom,led-flash-src = <&led_flash0>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ cam_vaf-supply = <&pm8226_l15>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 22 0>,
+ <&msmgpio 34 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vdig = <3>;
+ qcom,gpio-af-pwdm = <4>;
+ qcom,gpio-req-tbl-num = <0 1 2 3 4>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY",
+ "CAM_VDIG",
+ "CAM_AF_PWDM";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,eeprom-src = <&eeprom2>;
+ qcom,mount-angle = <270>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 28 0>,
+ <&msmgpio 35 0>,
+ <&msmgpio 21 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vdig = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY",
+ "CAM_VDIG";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8226-mdss.dtsi b/arch/arm/boot/dts/msm8226-mdss.dtsi
index 84bb234..375c5df 100644
--- a/arch/arm/boot/dts/msm8226-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8226-mdss.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,6 +21,21 @@
qcom,max-bandwidth-low-kbps = <1660000>;
qcom,max-bandwidth-high-kbps = <1660000>;
+
+ /* Bus Scale Settings */
+ qcom,msm-bus,name = "mdss_mdp";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>,
+ <22 512 0 6400000>,
+ <22 512 0 6400000>;
+
+ /* Fudge factors */
+ qcom,mdss-ab-factor = <2 1>; /* 2 times */
+ qcom,mdss-ib-factor = <6 5>; /* 1.2 times */
+ qcom,mdss-clk-factor = <5 4>; /* 1.25 times */
+
qcom,max-clk-rate = <200000000>;
qcom,mdss-pipe-vig-off = <0x00001200>;
qcom,mdss-pipe-rgb-off = <0x00001E00>;
@@ -43,7 +58,8 @@
qcom,mdss-wb-off = <0x00011100 0x00013100>;
qcom,mdss-intf-off = <0x00000000 0x00021300>;
qcom,mdss-rot-block-size = <64>;
- qcom,mdss-smp-mb-per-pipe = <4>;
+ qcom,mdss-rotator-ot-limit = <2>;
+ qcom,mdss-smp-mb-per-pipe = <3>;
vdd-cx-supply = <&pm8226_s1_corner>;
qcom,vbif-settings = <0x004 0x00000001>,
@@ -52,6 +68,15 @@
qcom,mdp-settings = <0x02E0 0x000000A5>,
<0x02E4 0x00000055>;
+ /* buffer parameters to calculate prefill bandwidth */
+ qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
+ qcom,mdss-prefill-y-buffer-bytes = <0>;
+ qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
+ qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
+ qcom,mdss-prefill-post-scaler-buffer-pixels = <0>;
+ qcom,mdss-prefill-pingpong-buffer-pixels = <4096>;
+ qcom,mdss-prefill-fbc-lines = <0>;
+
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
diff --git a/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi b/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi
index c3fcedb..42de953 100755
--- a/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi
+++ b/arch/arm/boot/dts/msm8226-qrd-skuf.dtsi
@@ -125,6 +125,8 @@
FF FF FF FF FF FF FF FF FF FF
FF FF FF FF 3E 01];
goodix,fw_name = "gtp_fw.bin";
+ goodix,have-touch-key;
+ goodix,driver-send-cfg;
};
};
};
diff --git a/arch/arm/boot/dts/msm8226-qrd.dtsi b/arch/arm/boot/dts/msm8226-qrd.dtsi
index 84e46ea..cd56da3 100644
--- a/arch/arm/boot/dts/msm8226-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8226-qrd.dtsi
@@ -482,13 +482,6 @@
};
};
-&slim_msm {
- tapan_codec {
- qcom,cdc-micbias1-ext-cap;
- qcom,cdc-micbias3-ext-cap;
- };
-};
-
&pm8226_vadc {
chan@30 {
label = "batt_therm";
diff --git a/arch/arm/boot/dts/msm8226-regulator.dtsi b/arch/arm/boot/dts/msm8226-regulator.dtsi
index 0146367..5e890d3 100644
--- a/arch/arm/boot/dts/msm8226-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8226-regulator.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -19,7 +19,7 @@
regulator-name = "8226_s2";
reg = <0x1700 0x100>;
regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1275000>;
+ regulator-max-microvolt = <1350000>;
qcom,mode = "auto";
};
};
@@ -35,23 +35,46 @@
reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
interrupts = <0 15 0>;
regulator-name = "apc_corner";
- regulator-min-microvolt = <1>;
- regulator-max-microvolt = <12>;
qcom,pvs-fuse-redun-sel = <22 24 3 2 0>;
qcom,pvs-fuse = <22 6 5 0>;
qcom,pvs-fuse-redun = <22 27 5 0>;
- qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
- 1275000 1260000 1245000 1230000 1215000
- 1200000 1185000 1170000 1155000 1140000
- 1140000 1140000 1140000 1140000 1140000
- 1150000 1140000 1140000 1140000 1140000
- 1140000 1140000 1140000 1275000 1275000
- 1275000 1275000>;
- qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qcom,pvs-corner-ceiling-nom = <1050000 1075000 1200000>;
- qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
+ qcom,pvs-voltage-table =
+ <1050000 1150000 1350000>,
+ <1050000 1150000 1340000>,
+ <1050000 1150000 1330000>,
+ <1050000 1150000 1320000>,
+ <1050000 1150000 1310000>,
+ <1050000 1150000 1300000>,
+ <1050000 1150000 1290000>,
+ <1050000 1150000 1280000>,
+ <1050000 1150000 1270000>,
+ <1050000 1140000 1260000>,
+ <1050000 1130000 1250000>,
+ <1050000 1120000 1240000>,
+ <1050000 1110000 1230000>,
+ <1050000 1100000 1220000>,
+ <1050000 1090000 1210000>,
+ <1050000 1080000 1200000>,
+ <1050000 1070000 1190000>,
+ <1050000 1060000 1180000>,
+ <1050000 1050000 1170000>,
+ <1050000 1050000 1160000>,
+ <1050000 1050000 1150000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>;
+ qcom,cpr-voltage-ceiling = <1050000 1150000 1280000>;
+ qcom,cpr-voltage-floor = <1050000 1050000 1100000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-mx-supply = <&pm8226_l3_ao>;
@@ -63,14 +86,12 @@
qcom,cpr-timer-cons-up = <0>;
qcom,cpr-timer-cons-down = <2>;
qcom,cpr-irq-line = <0>;
- qcom,cpr-step-quotient = <15>;
- qcom,cpr-up-threshold = <0>;
- qcom,cpr-down-threshold = <10>;
+ qcom,cpr-step-quotient = <30>;
qcom,cpr-idle-clocks = <0>;
qcom,cpr-gcnt-time = <1>;
qcom,vdd-apc-step-up-limit = <1>;
qcom,vdd-apc-step-down-limit = <1>;
- qcom,cpr-apc-volt-step = <5000>;
+ qcom,cpr-apc-volt-step = <10000>;
qcom,cpr-fuse-redun-sel = <138 57 1 1 0>;
qcom,cpr-fuse-row = <138 0>;
@@ -91,15 +112,6 @@
qcom,cpr-uplift-max-volt = <1350000>;
qcom,cpr-uplift-speed-bin = <1>;
qcom,speed-bin-fuse-sel = <22 0 3 0>;
- qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
- qcom,cpr-quot-adjust-table =
- <1 5 450>,
- <1 6 375>,
- <1 7 300>,
- <1 8 225>,
- <1 9 187>,
- <1 10 150>,
- <1 11 75>;
};
};
@@ -198,7 +210,7 @@
pm8226_l3: regulator-l3 {
regulator-name = "8226_l3";
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1275000>;
+ regulator-max-microvolt = <1337500>;
status = "okay";
};
pm8226_l3_ao: regulator-3-ao {
@@ -206,7 +218,7 @@
regulator-name = "8226_l3_ao";
qcom,set = <1>;
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1275000>;
+ regulator-max-microvolt = <1337500>;
status = "okay";
};
pm8226_l3_so: regulator-l3-so {
@@ -214,7 +226,7 @@
regulator-name = "8226_l3_so";
qcom,set = <2>;
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1275000>;
+ regulator-max-microvolt = <1337500>;
qcom,init-voltage = <750000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/msm8226-v1-pm.dtsi b/arch/arm/boot/dts/msm8226-v1-pm.dtsi
index a1a8480..d59fab3 100644
--- a/arch/arm/boot/dts/msm8226-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-v1-pm.dtsi
@@ -145,16 +145,6 @@
compatible = "qcom,system-modes";
qcom,system-modes@0 {
- qcom,l2 = "l2_cache_gdhs";
- qcom,latency-us = <10700>;
- qcom,ss-power = <372>;
- qcom,energy-overhead = <738750>;
- qcom,time-overhead = <1410>;
- qcom,min-cpu-mode= "pc";
- qcom,sync-cpus;
- };
-
- qcom,system-modes@1 {
qcom,l2 = "l2_cache_pc_no_rpm";
qcom,latency-us = <1000>;
qcom,ss-power = <315>;
@@ -164,7 +154,7 @@
qcom,sync-cpus;
};
- qcom,system-modes@2 {
+ qcom,system-modes@1 {
qcom,l2 = "l2_cache_pc";
qcom,latency-us = <12700>;
qcom,ss-power = <315>;
@@ -172,6 +162,7 @@
qcom,time-overhead = <2400>;
qcom,min-cpu-mode= "pc";
qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
};
};
};
@@ -235,6 +226,9 @@
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
<0xff 194>, /* lpass_irq_out_apcs(6) */
+ <0xff 195>, /* SLIMbus slimbus_core_ee1_irq */
+ <0xff 196>, /* BAM-Lite - SlimBus */
+ <0xff 198>, /* coresight-tmc-etr interrupt */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
diff --git a/arch/arm/boot/dts/msm8226-v1-qrd-dvt.dts b/arch/arm/boot/dts/msm8226-v1-qrd-dvt.dts
index 7e9f91b..9bfd280 100644
--- a/arch/arm/boot/dts/msm8226-v1-qrd-dvt.dts
+++ b/arch/arm/boot/dts/msm8226-v1-qrd-dvt.dts
@@ -27,3 +27,10 @@
&dsi_hx8394a_720_vid {
qcom,cont-splash-enabled;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v1-qrd-evt.dts b/arch/arm/boot/dts/msm8226-v1-qrd-evt.dts
index c93d9db..44dd280 100644
--- a/arch/arm/boot/dts/msm8226-v1-qrd-evt.dts
+++ b/arch/arm/boot/dts/msm8226-v1-qrd-evt.dts
@@ -27,3 +27,10 @@
&dsi_nt35590_720_vid {
qcom,cont-splash-enabled;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v1-qrd-skuf-pvt.dts b/arch/arm/boot/dts/msm8226-v1-qrd-skuf-pvt.dts
index 43e1e21..75885a3 100644
--- a/arch/arm/boot/dts/msm8226-v1-qrd-skuf-pvt.dts
+++ b/arch/arm/boot/dts/msm8226-v1-qrd-skuf-pvt.dts
@@ -20,3 +20,9 @@
qcom,board-id = <0x2000b 2>;
};
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v1-qrd-skuf.dts b/arch/arm/boot/dts/msm8226-v1-qrd-skuf.dts
index b836928..d5df1d3 100644
--- a/arch/arm/boot/dts/msm8226-v1-qrd-skuf.dts
+++ b/arch/arm/boot/dts/msm8226-v1-qrd-skuf.dts
@@ -27,3 +27,10 @@
&pm8226_iadc {
qcom,rsense = <10000000>;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v1.dtsi b/arch/arm/boot/dts/msm8226-v1.dtsi
index 7f2048f..b9455fb 100644
--- a/arch/arm/boot/dts/msm8226-v1.dtsi
+++ b/arch/arm/boot/dts/msm8226-v1.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -65,3 +65,63 @@
qcom,retain-periph;
qcom,retain-mem;
};
+
+&pm8226_s2 {
+ regulator-max-microvolt = <1275000>;
+};
+
+&pm8226_l3 {
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_ao {
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_so {
+ regulator-max-microvolt = <1287500>;
+};
+
+&apc_vreg_corner {
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <3>;
+ qcom,pvs-voltage-table =
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>;
+ qcom,cpr-voltage-ceiling = <1050000 1150000 1275000>;
+ qcom,cpr-voltage-floor = <1050000 1050000 1100000>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-apc-volt-step = <5000>;
+ qcom,cpr-up-threshold = <0>;
+ qcom,cpr-down-threshold = <10>;
+};
diff --git a/arch/arm/boot/dts/msm8226-v2-pm.dtsi b/arch/arm/boot/dts/msm8226-v2-pm.dtsi
index 2e9f6db..bc8fe5d 100644
--- a/arch/arm/boot/dts/msm8226-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2-pm.dtsi
@@ -96,7 +96,7 @@
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
qcom,saw2-spm-cmd-ret = [00 03 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 20 32 6b c0 e0 d0 42 07 50
+ qcom,saw2-spm-cmd-gdhs = [00 20 32 6b c0 e0 d0 42 03 50
4e 02 02 d0 e0 c0 22 6b 02 32 50 0f];
qcom,saw2-spm-cmd-pc-no-rpm = [00 32 b0 10 e0 d0 6b c0 42 f0
11 03 01 b0 50 4e 02 02 c0 d0 12 e0 6b 02 32
@@ -148,11 +148,11 @@
qcom,system-modes@0 {
qcom,l2 = "l2_cache_gdhs";
- qcom,latency-us = <10700>;
+ qcom,latency-us = <700>;
qcom,ss-power = <372>;
qcom,energy-overhead = <738750>;
qcom,time-overhead = <1410>;
- qcom,min-cpu-mode= "pc";
+ qcom,min-cpu-mode= "standalone_pc";
qcom,sync-cpus;
};
@@ -174,6 +174,7 @@
qcom,time-overhead = <2400>;
qcom,min-cpu-mode= "pc";
qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
};
};
};
@@ -237,6 +238,9 @@
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
<0xff 194>, /* lpass_irq_out_apcs(6) */
+ <0xff 195>, /* SLIMbus slimbus_core_ee1_irq */
+ <0xff 196>, /* BAM-Lite - SlimBus */
+ <0xff 198>, /* coresight-tmc-etr interrupt */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
diff --git a/arch/arm/boot/dts/msm8226-v2-qrd-dvt.dts b/arch/arm/boot/dts/msm8226-v2-qrd-dvt.dts
index 13402af..5fd1d3b 100644
--- a/arch/arm/boot/dts/msm8226-v2-qrd-dvt.dts
+++ b/arch/arm/boot/dts/msm8226-v2-qrd-dvt.dts
@@ -35,3 +35,10 @@
&pm8226_iadc {
qcom,rsense = <10000000>;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v2-qrd-evt.dts b/arch/arm/boot/dts/msm8226-v2-qrd-evt.dts
index b707d1c..fedbb9a 100644
--- a/arch/arm/boot/dts/msm8226-v2-qrd-evt.dts
+++ b/arch/arm/boot/dts/msm8226-v2-qrd-evt.dts
@@ -27,3 +27,10 @@
&dsi_nt35590_720_vid {
qcom,cont-splash-enabled;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v2-qrd-pvt.dts b/arch/arm/boot/dts/msm8226-v2-qrd-pvt.dts
index 4b6a1da..e78f24c 100644
--- a/arch/arm/boot/dts/msm8226-v2-qrd-pvt.dts
+++ b/arch/arm/boot/dts/msm8226-v2-qrd-pvt.dts
@@ -27,3 +27,10 @@
&dsi_nt35590_720_vid {
qcom,cont-splash-enabled;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v2-qrd-skuf-pvt.dts b/arch/arm/boot/dts/msm8226-v2-qrd-skuf-pvt.dts
index f5ac301..ad1d077 100644
--- a/arch/arm/boot/dts/msm8226-v2-qrd-skuf-pvt.dts
+++ b/arch/arm/boot/dts/msm8226-v2-qrd-skuf-pvt.dts
@@ -20,3 +20,9 @@
qcom,board-id = <0x2000b 0x2>;
};
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v2-qrd-skuf.dts b/arch/arm/boot/dts/msm8226-v2-qrd-skuf.dts
index 9aa12f6..be6fb69 100644
--- a/arch/arm/boot/dts/msm8226-v2-qrd-skuf.dts
+++ b/arch/arm/boot/dts/msm8226-v2-qrd-skuf.dts
@@ -27,3 +27,10 @@
&pm8226_iadc {
qcom,rsense = <10000000>;
};
+
+&slim_msm {
+ tapan_codec {
+ qcom,cdc-micbias1-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/msm8226-v2.dtsi b/arch/arm/boot/dts/msm8226-v2.dtsi
index 089d415..6215740 100644
--- a/arch/arm/boot/dts/msm8226-v2.dtsi
+++ b/arch/arm/boot/dts/msm8226-v2.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -31,41 +31,20 @@
<223 0x20000>;
};
-&pm8226_l3 {
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1337500>;
-};
-
-&pm8226_l3_ao {
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1337500>;
-};
-
-&pm8226_l3_so {
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1337500>;
-};
-
-&pm8226_s2 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1330000>;
-};
-
&apc_vreg_corner {
- qcom,pvs-init-voltage = <1330000 1330000 1330000 1320000 1310000
- 1300000 1290000 1280000 1270000 1260000
- 1250000 1240000 1230000 1220000 1210000
- 1200000 1190000 1180000 1170000 1160000
- 1150000 1140000 1140000 1140000 1140000
- 1140000 1140000 1140000 1140000 1140000
- 1140000 1140000>;
- qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qcom,cpr-step-quotient = <30>;
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <14>;
qcom,cpr-up-threshold = <0>;
qcom,cpr-down-threshold = <5>;
- qcom,cpr-apc-volt-step = <10000>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table =
+ <1 5 450>,
+ <1 6 375>,
+ <1 7 300>,
+ <1 8 225>,
+ <1 9 187>,
+ <1 10 150>,
+ <1 11 75>;
};
&msm_gpu {
@@ -78,36 +57,21 @@
reg = <0xf9011050 0x8>,
<0xfc4b80b0 0x8>;
reg-names = "rcg-base", "efuse";
+ qcom,speed0-bin-v0 =
+ < 0 0>,
+ < 384000000 2>,
+ < 787200000 4>,
+ <1190400000 7>;
qcom,speed0-bin-v2 =
< 0 0>,
< 384000000 2>,
< 787200000 4>,
<1190400000 7>;
- qcom,speed6-bin-v2 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1190400000 7>;
qcom,speed2-bin-v2 =
< 0 0>,
< 384000000 2>,
< 787200000 4>,
<1401600000 10>;
- qcom,speed5-bin-v2 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1401600000 10>;
- qcom,speed4-bin-v2 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1401600000 10>;
- qcom,speed7-bin-v2 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1401600000 10>;
qcom,speed1-bin-v2 =
< 0 0>,
< 384000000 2>,
@@ -120,6 +84,20 @@
<1401600000 10>,
<1497600000 11>,
<1593600000 12>;
+ qcom,speed5-bin-v2 =
+ < 0 0>,
+ < 384000000 2>,
+ < 787200000 4>,
+ < 998400000 5>,
+ <1094400000 6>,
+ <1190400000 7>,
+ <1305600000 8>,
+ <1344000000 9>,
+ <1401600000 10>,
+ <1497600000 11>,
+ <1593600000 12>,
+ <1689600000 13>,
+ <1785600000 14>;
};
};
diff --git a/arch/arm/boot/dts/msm8226.dtsi b/arch/arm/boot/dts/msm8226.dtsi
index e0304f5..9113259 100644
--- a/arch/arm/boot/dts/msm8226.dtsi
+++ b/arch/arm/boot/dts/msm8226.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -282,8 +282,9 @@
qcom,hsusb-otg-phy-type = <2>;
qcom,hsusb-otg-mode = <1>;
qcom,hsusb-otg-otg-control = <2>;
+ qcom,hsusb-otg-disable-reset;
qcom,dp-manual-pullup;
- qcom,ahb-async-bridge-bypass;
+ qcom,usbin-vadc = <&pm8226_vadc>;
qcom,msm-bus,name = "usb";
qcom,msm-bus,num-cases = <3>;
@@ -486,6 +487,10 @@
compatible = "qcom,msm-lsm-client";
};
+ qti,msm-pcm-loopback {
+ compatible = "qti,msm-pcm-loopback";
+ };
+
qcom,msm-dai-q6 {
compatible = "qcom,msm-dai-q6";
qcom,msm-dai-q6-sb-0-rx {
@@ -977,7 +982,7 @@
qcom,scl-gpio = <&msmgpio 11 0>;
qcom,master-id = <86>;
};
- i2c@f9926000 { /* BLSP-1 QUP-4 */
+ i2c_0: i2c@f9926000 { /* BLSP-1 QUP-4 */
cell-index = <0>;
compatible = "qcom,i2c-qup";
reg = <0xf9926000 0x1000>;
@@ -987,6 +992,8 @@
interrupts = <0 98 0>;
interrupt-names = "qup_err_intr";
qcom,i2c-bus-freq = <100000>;
+ qcom,i2c-src-freq = <19200000>;
+ qcom,master-id = <86>;
};
i2c@f9927000 { /* BLSP1 QUP5 */
@@ -1011,9 +1018,9 @@
clock-names = "clk-4", "clk-5";
qcom,speed0-bin-v0 =
< 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1190400000 7>;
+ < 384000000 1>,
+ < 787200000 2>,
+ <1190400000 3>;
cpu-vdd-supply = <&apc_vreg_corner>;
};
@@ -1043,7 +1050,9 @@
< 1344000 4066 >,
< 1401600 4066 >,
< 1497600 4066 >,
- < 1593600 4066 >;
+ < 1593600 4066 >,
+ < 1689600 4066 >,
+ < 1785600 4066 >;
};
qcom,ocmem@fdd00000 {
@@ -1303,15 +1312,16 @@
qcom,disk-encrypt-pipe-pair = <2>;
qcom,hlos-ce-hw-instance = <0>;
qcom,qsee-ce-hw-instance = <0>;
+ qcom,support-bus-scaling;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,active-only = <0>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<55 512 0 0>,
- <55 512 3936000 393600>,
- <55 512 3936000 393600>,
- <55 512 3936000 393600>;
+ <55 512 0 0>,
+ <55 512 120000 1200000>,
+ <55 512 393600 3936000>;
};
qcom,qcrypto@fd404000 {
@@ -1503,6 +1513,7 @@
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <3>;
qcom,btm-channel-number = <0x48>;
+ qcom,meas-interval-timer-idx = <2>;
};
chan@8 {
diff --git a/arch/arm/boot/dts/msm8610-bus.dtsi b/arch/arm/boot/dts/msm8610-bus.dtsi
index 54c698c..d26d660 100644
--- a/arch/arm/boot/dts/msm8610-bus.dtsi
+++ b/arch/arm/boot/dts/msm8610-bus.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -41,8 +41,8 @@
qcom,qport = <0>;
qcom,ws = <10000>;
qcom,mas-hw-id = <8>;
- qcom,prio1 = <2>;
- qcom,prio0 = <2>;
+ qcom,prio1 = <3>;
+ qcom,prio0 = <3>;
};
mas-vfe {
diff --git a/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi b/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi
index bdcab77..7f4197f 100644
--- a/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8610-camera-sensor-cdp-mtp.dtsi
@@ -261,5 +261,66 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,led-flash-src = <&led_flash0>;
+ cam_vdig-supply = <&pm8110_l2>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ cam_vaf-supply = <&pm8110_l16>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 0 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 1800000 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1200000 1800000 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <200000 8000 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 13 0>,
+ <&msmgpio 21 0>,
+ <&msmgpio 20 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <90>;
+ cam_vdig-supply = <&pm8110_l4>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 14 0>,
+ <&msmgpio 15 0>,
+ <&msmgpio 8 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY";
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8610-gpu.dtsi b/arch/arm/boot/dts/msm8610-gpu.dtsi
index 7e3ee0d..de480df 100644
--- a/arch/arm/boot/dts/msm8610-gpu.dtsi
+++ b/arch/arm/boot/dts/msm8610-gpu.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,7 +38,7 @@
<26 512 0 0>,
<26 512 0 800000>,
<26 512 0 1600000>,
- <26 512 0 2128000>;
+ <26 512 0 2664000>;
/* GDSC oxili regulators */
vdd-supply = <&gdsc_oxili_cx>;
diff --git a/arch/arm/boot/dts/msm8610-mtp.dtsi b/arch/arm/boot/dts/msm8610-mtp.dtsi
index 3b0f2a2..aad838e 100644
--- a/arch/arm/boot/dts/msm8610-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8610-mtp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-14, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,14 +39,14 @@
/* Object 6, Instance = 0 */
00 00 00 00 00 00
/* Object 38, Instance = 0 */
- 1D 03 00 1E 07 0D 00 00
+ 1D 05 01 0D 01 0E 00 00
/* Object 7, Instance = 0 */
20 08 32
/* Object 8, Instance = 0 */
19 00 14 14 FF 00 FF 00 00 00
/* Object 9, Instance = 0 */
83 00 00 13 0B 00 20 32 01 03
- 00 32 05 30 0A 05 0A 00 70 03
+ 00 32 05 30 05 05 0A 00 70 03
FC 01 04 2F F8 DC 00 00 40 00
00 0A 00 00 02
/* Object 18, Instance = 0 */
@@ -151,10 +151,11 @@
reg = <0x0e>;
qcom,irq-gpio = <&msmgpio 77 0x00>;
qcom,dis-gpio = <&msmgpio 93 0x00>;
- qcom,clk-en-gpio = <&msmgpio 78 0x00>;
+ qcom,clk-req-gpio = <&msmgpio 75 0x00>;
+ qcom,clk-src-gpio = <&msmgpio 78 0x00>;
qcom,clk-src = "GPCLK";
interrupt-parent = <&msmgpio>;
- interrupts = <77 0>;
+ interrupts = <77 75 0>;
qcom,clk-gpio = <&pm8110_gpios 1 0>;
};
};
diff --git a/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi b/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi
index 719830e..53abb95 100644
--- a/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi
+++ b/arch/arm/boot/dts/msm8610-qrd-skuaa.dtsi
@@ -38,11 +38,12 @@
compatible = "qcom,nfc-nci";
reg = <0x0e>;
qcom,irq-gpio = <&msmgpio 77 0x00>;
+ qcom,clk-req-gpio = <&msmgpio 75 0x00>;
qcom,dis-gpio = <&msmgpio 93 0x00>;
- qcom,clk-en-gpio = <&msmgpio 78 0x00>;
+ qcom,clk-src-gpio = <&msmgpio 78 0x00>;
qcom,clk-src = "GPCLK2";
interrupt-parent = <&msmgpio>;
- interrupts = <77 0>;
+ interrupts = <77 75 0>;
qcom,clk-gpio = <&msmgpio 75 0x00>;
};
};
diff --git a/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi b/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
index c7fa9db..1554575 100644
--- a/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
+++ b/arch/arm/boot/dts/msm8610-qrd-skuab.dtsi
@@ -88,6 +88,8 @@
00 FF FF FF FF FF FF FF 00 00
00 FF FF FF FF FF FF FF FF FF
F8 FF FF FF E4 01];
+ goodix,have-touch-key;
+ goodix,driver-send-cfg;
};
};
gen-vkeys {
diff --git a/arch/arm/boot/dts/msm8610-regulator.dtsi b/arch/arm/boot/dts/msm8610-regulator.dtsi
index 1340612..6639668 100644
--- a/arch/arm/boot/dts/msm8610-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8610-regulator.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -36,22 +36,47 @@
interrupts = <0 15 0>;
regulator-name = "apc_corner";
regulator-min-microvolt = <1>;
- regulator-max-microvolt = <12>;
+ regulator-max-microvolt = <3>;
qcom,pvs-fuse-redun-sel = <53 25 3 2 1>;
qcom,pvs-fuse = <23 6 5 1>;
qcom,pvs-fuse-redun = <61 47 5 1>;
- qcom,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
- 1275000 1275000 1275000 1275000 1275000
- 1275000 1275000 1275000 1275000 1275000
- 1275000 1275000 1275000 1275000 1275000
- 1275000 1275000 1275000 1275000 1275000
- 1275000 1275000 1275000 1275000 1275000
- 1275000 1275000>;
- qcom,pvs-corner-ceiling-slow = <1050000 1150000 1275000>;
- qcom,pvs-corner-ceiling-nom = <1050000 1075000 1275000>;
- qcom,pvs-corner-ceiling-fast = <1050000 1050000 1275000>;
+ qcom,pvs-voltage-table =
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>,
+ <1050000 1150000 1275000>;
+ qcom,cpr-voltage-ceiling = <1050000 1150000 1275000>;
+ qcom,cpr-voltage-floor = <1050000 1050000 1275000>;
vdd-apc-supply = <&pm8110_s2>;
vdd-mx-supply = <&pm8110_l3_ao>;
@@ -83,7 +108,6 @@
qcom,cpr-fuse-redun-bp-scheme = <25>;
qcom,cpr-fuse-redun-target-quot = <32 12 0>;
qcom,cpr-fuse-redun-ro-sel = <44 26 29>;
- qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
qcom,cpr-enable;
};
diff --git a/arch/arm/boot/dts/msm8610-v1-pm.dtsi b/arch/arm/boot/dts/msm8610-v1-pm.dtsi
index ea37413..dc1dc8b 100644
--- a/arch/arm/boot/dts/msm8610-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-v1-pm.dtsi
@@ -145,16 +145,6 @@
compatible = "qcom,system-modes";
qcom,system-modes@0 {
- qcom,l2 = "l2_cache_gdhs";
- qcom,latency-us = <10700>;
- qcom,ss-power = <372>;
- qcom,energy-overhead = <738750>;
- qcom,time-overhead = <1410>;
- qcom,min-cpu-mode= "pc";
- qcom,sync-cpus;
- };
-
- qcom,system-modes@1 {
qcom,l2 = "l2_cache_pc_no_rpm";
qcom,latency-us = <1000>;
qcom,ss-power = <315>;
@@ -164,7 +154,7 @@
qcom,sync-cpus;
};
- qcom,system-modes@2 {
+ qcom,system-modes@1 {
qcom,l2 = "l2_cache_pc";
qcom,latency-us = <12700>;
qcom,ss-power = <315>;
@@ -172,6 +162,7 @@
qcom,time-overhead = <2400>;
qcom,min-cpu-mode= "pc";
qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
};
};
};
@@ -236,6 +227,7 @@
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
<0xff 194>, /* lpass_irq_out_apcs(6) */
+ <0xff 198>, /* QDSS - u_qdss */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
@@ -302,6 +294,8 @@
qcom,pc-mode = "tz_l2_int";
qcom,use-sync-timer;
qcom,pc-resets-timer;
+ qcom,cpus-as-clocks;
+ qcom,synced-clocks;
};
qcom,cpu-sleep-status@f9088008{
diff --git a/arch/arm/boot/dts/msm8610-v2-pm.dtsi b/arch/arm/boot/dts/msm8610-v2-pm.dtsi
index 19fb185..2859744 100644
--- a/arch/arm/boot/dts/msm8610-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8610-v2-pm.dtsi
@@ -96,7 +96,7 @@
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
qcom,saw2-spm-cmd-ret = [00 03 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 20 32 6b c0 e0 d0 42 07 50
+ qcom,saw2-spm-cmd-gdhs = [00 20 32 6b c0 e0 d0 42 03 50
4e 02 02 d0 e0 c0 22 6b 02 32 50 0f];
qcom,saw2-spm-cmd-pc = [00 32 b0 10 e0 d0 6b c0 42 f0
11 07 01 b0 50 4e 02 02 c0 d0 12 e0 6b 02 32
@@ -148,11 +148,11 @@
qcom,system-modes@0 {
qcom,l2 = "l2_cache_gdhs";
- qcom,latency-us = <10700>;
+ qcom,latency-us = <700>;
qcom,ss-power = <372>;
qcom,energy-overhead = <738750>;
qcom,time-overhead = <1410>;
- qcom,min-cpu-mode= "pc";
+ qcom,min-cpu-mode= "standalone_pc";
qcom,sync-cpus;
};
@@ -174,6 +174,7 @@
qcom,time-overhead = <2400>;
qcom,min-cpu-mode= "pc";
qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
};
};
};
@@ -238,6 +239,7 @@
<0xff 191>, /* lpass_irq_out_apcs(3) */
<0xff 192>, /* lpass_irq_out_apcs(4) */
<0xff 194>, /* lpass_irq_out_apcs(6) */
+ <0xff 198>, /* QDSS - u_qdss */
<0xff 200>, /* rpm_ipc(4) */
<0xff 201>, /* rpm_ipc(5) */
<0xff 202>, /* rpm_ipc(6) */
@@ -304,6 +306,8 @@
qcom,pc-mode = "tz_l2_int";
qcom,use-sync-timer;
qcom,pc-resets-timer;
+ qcom,cpus-as-clocks;
+ qcom,synced-clocks;
};
qcom,cpu-sleep-status@f9088008{
diff --git a/arch/arm/boot/dts/msm8610.dtsi b/arch/arm/boot/dts/msm8610.dtsi
index 84adad4..f152ceb 100644
--- a/arch/arm/boot/dts/msm8610.dtsi
+++ b/arch/arm/boot/dts/msm8610.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -463,11 +463,39 @@
qcom,ipi-ping;
};
- qcom,acpuclk@f9011050 {
- compatible = "qcom,acpuclk-a7";
+ qcom,clock-a7@f9011050 {
+ compatible = "qcom,clock-a7-8226";
reg = <0xf9011050 0x8>;
- reg-names = "rcg_base";
- a7_cpu-supply = <&apc_vreg_corner>;
+ reg-names = "rcg-base";
+ clock-names = "clk-4", "clk-5";
+ qcom,speed0-bin-v0 =
+ < 0 0>,
+ < 384000000 1>,
+ < 787200000 2>,
+ <1190400000 3>;
+
+ cpu-vdd-supply = <&apc_vreg_corner>;
+ };
+
+ qcom,cpubw {
+ compatible = "qcom,cpubw";
+ qcom,cpu-mem-ports = <1 512>;
+ qcom,bw-tbl =
+ < 762 /* 100 MHz */ >,
+ < 1525 /* 200 MHz */ >,
+ < 2540 /* 333 MHz */ >;
+ };
+
+ qcom,msm-cpufreq@0 {
+ reg = <0 4>;
+ compatible = "qcom,msm-cpufreq";
+ qcom,cpufreq-table =
+ < 300000 762 >,
+ < 384000 762 >,
+ < 600000 1525 >,
+ < 787200 1525 >,
+ < 998400 2540 >,
+ < 1190400 2540 >;
};
spmi_bus: qcom,spmi@fc4c0000 {
@@ -1043,7 +1071,7 @@
label = "vchg_sns";
reg = <2>;
qcom,decimation = <0>;
- qcom,pre-div-channel-scaling = <2>;
+ qcom,pre-div-channel-scaling = <5>;
qcom,calibration-type = "absolute";
qcom,scale-function = <0>;
qcom,hw-settle-time = <0>;
@@ -1140,6 +1168,7 @@
qcom,hw-settle-time = <2>;
qcom,fast-avg-setup = <3>;
qcom,btm-channel-number = <0x48>;
+ qcom,meas-interval-timer-idx = <2>;
};
chan@8 {
diff --git a/arch/arm/boot/dts/msm8612-qrd-camera-sensor.dtsi b/arch/arm/boot/dts/msm8612-qrd-camera-sensor.dtsi
index 205e749..4d50b36 100644
--- a/arch/arm/boot/dts/msm8612-qrd-camera-sensor.dtsi
+++ b/arch/arm/boot/dts/msm8612-qrd-camera-sensor.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -95,4 +95,61 @@
qcom,cci-master = <0>;
status = "ok";
};
+ qcom,camera@1 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x01>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ cam_vdig-supply = <&pm8110_l2>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 1800000 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 1800000 2850000>;
+ qcom,cam-vreg-op-mode = <200000 8000 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 13 0>,
+ <&msmgpio 21 0>,
+ <&msmgpio 20 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+ qcom,camera@2 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x02>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ cam_vdig-supply = <&pm8110_l14>;
+ cam_vana-supply = <&pm8110_l19>;
+ cam_vio-supply = <&pm8110_l14>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1800000 1800000 2850000>;
+ qcom,cam-vreg-max-voltage = <1800000 1800000 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 14 0>,
+ <&msmgpio 15 0>,
+ <&msmgpio 85 0>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
index ac2d908..8e053a9 100644
--- a/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
+++ b/arch/arm/boot/dts/msm8926-camera-sensor-qrd.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -229,4 +229,74 @@
qcom,cci-master = <0>;
status = "ok";
};
+
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x00>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,led-flash-src = <&led_flash0>;
+ qcom,mount-angle = <90>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ cam_vaf-supply = <&pm8226_l15>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000 2800000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 36 0>,
+ <&msmgpio 15 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-af-pwdm = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY",
+ "CAM_AF_PWDM";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x01>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ cam_vdig-supply = <&pm8226_l5>;
+ cam_vana-supply = <&pm8226_l19>;
+ cam_vio-supply = <&pm8226_lvs1>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-type = <0 1 0>;
+ qcom,cam-vreg-min-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 28 0>,
+ <&msmgpio 35 0>,
+ <&msmgpio 23 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vdig = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_STANDBY",
+ "CAM_VDIG";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug.dtsi b/arch/arm/boot/dts/msm8926-qrd-skug.dtsi
index fea5a9e..c93ea12 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug.dtsi
+++ b/arch/arm/boot/dts/msm8926-qrd-skug.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,7 +10,6 @@
* GNU General Public License for more details.
*/
-/include/ "msm8926.dtsi"
/include/ "msm8226-qrd.dtsi"
/include/ "msm8926-camera-sensor-qrd.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-1080p-cdp.dts b/arch/arm/boot/dts/msm8926-v1-1080p-cdp.dts
similarity index 89%
copy from arch/arm/boot/dts/msm8926-1080p-cdp.dts
copy to arch/arm/boot/dts/msm8926-v1-1080p-cdp.dts
index 33e484a..1b6f971 100644
--- a/arch/arm/boot/dts/msm8926-1080p-cdp.dts
+++ b/arch/arm/boot/dts/msm8926-v1-1080p-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v1.dtsi"
/include/ "msm8226-1080p-cdp.dtsi"
/include/ "msm8226-camera-sensor-cdp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-1080p-mtp.dts b/arch/arm/boot/dts/msm8926-v1-1080p-mtp.dts
similarity index 87%
rename from arch/arm/boot/dts/msm8926-1080p-mtp.dts
rename to arch/arm/boot/dts/msm8926-v1-1080p-mtp.dts
index c1217a2..0812c54 100644
--- a/arch/arm/boot/dts/msm8926-1080p-mtp.dts
+++ b/arch/arm/boot/dts/msm8926-v1-1080p-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v1.dtsi"
/include/ "msm8226-1080p-mtp.dtsi"
/include/ "msm8226-camera-sensor-mtp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-720p-cdp.dts b/arch/arm/boot/dts/msm8926-v1-720p-cdp.dts
similarity index 89%
copy from arch/arm/boot/dts/msm8926-720p-cdp.dts
copy to arch/arm/boot/dts/msm8926-v1-720p-cdp.dts
index 80bb5e6..37da01c 100644
--- a/arch/arm/boot/dts/msm8926-720p-cdp.dts
+++ b/arch/arm/boot/dts/msm8926-v1-720p-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v1.dtsi"
/include/ "msm8226-720p-cdp.dtsi"
/include/ "msm8226-camera-sensor-cdp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-720p-mtp.dts b/arch/arm/boot/dts/msm8926-v1-720p-mtp.dts
similarity index 87%
copy from arch/arm/boot/dts/msm8926-720p-mtp.dts
copy to arch/arm/boot/dts/msm8926-v1-720p-mtp.dts
index 32301fd..7b49930 100644
--- a/arch/arm/boot/dts/msm8926-720p-mtp.dts
+++ b/arch/arm/boot/dts/msm8926-v1-720p-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v1.dtsi"
/include/ "msm8226-720p-mtp.dtsi"
/include/ "msm8226-camera-sensor-mtp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug-pvt.dts b/arch/arm/boot/dts/msm8926-v1-qrd-skug-pvt.dts
similarity index 88%
rename from arch/arm/boot/dts/msm8926-qrd-skug-pvt.dts
rename to arch/arm/boot/dts/msm8926-v1-qrd-skug-pvt.dts
index 2a45592..fb5bc01 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug-pvt.dts
+++ b/arch/arm/boot/dts/msm8926-v1-qrd-skug-pvt.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,7 @@
*/
/dts-v1/;
+/include/ "msm8926-v1.dtsi"
/include/ "msm8926-qrd-skug.dtsi"
/ {
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug.dts b/arch/arm/boot/dts/msm8926-v1-qrd-skug.dts
similarity index 86%
rename from arch/arm/boot/dts/msm8926-qrd-skug.dts
rename to arch/arm/boot/dts/msm8926-v1-qrd-skug.dts
index 4aab4f9..0cb6119 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug.dts
+++ b/arch/arm/boot/dts/msm8926-v1-qrd-skug.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,7 @@
*/
/dts-v1/;
+/include/ "msm8926-v1.dtsi"
/include/ "msm8926-qrd-skug.dtsi"
/ {
diff --git a/arch/arm/boot/dts/msm8926-qrd.dts b/arch/arm/boot/dts/msm8926-v1-qrd.dts
similarity index 86%
rename from arch/arm/boot/dts/msm8926-qrd.dts
rename to arch/arm/boot/dts/msm8926-v1-qrd.dts
index 8ee8828..fa6ff64 100644
--- a/arch/arm/boot/dts/msm8926-qrd.dts
+++ b/arch/arm/boot/dts/msm8926-v1-qrd.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*/
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v1.dtsi"
/include/ "msm8226-qrd.dtsi"
/ {
diff --git a/arch/arm/boot/dts/msm8926-qrd.dts b/arch/arm/boot/dts/msm8926-v1.dtsi
similarity index 68%
copy from arch/arm/boot/dts/msm8926-qrd.dts
copy to arch/arm/boot/dts/msm8926-v1.dtsi
index 8ee8828..c70cf71 100644
--- a/arch/arm/boot/dts/msm8926-qrd.dts
+++ b/arch/arm/boot/dts/msm8926-v1.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,12 +10,11 @@
* GNU General Public License for more details.
*/
-/dts-v1/;
/include/ "msm8926.dtsi"
-/include/ "msm8226-qrd.dtsi"
/ {
- model = "Qualcomm MSM 8926 QRD";
- compatible = "qcom,msm8926-qrd", "qcom,msm8926", "qcom,qrd";
- qcom,board-id = <11 0>;
+ qcom,msm-id = <200 0>,
+ <224 0>,
+ <200 0x10001>,
+ <224 0x10001>;
};
diff --git a/arch/arm/boot/dts/msm8926-1080p-cdp.dts b/arch/arm/boot/dts/msm8926-v2-1080p-cdp.dts
similarity index 89%
rename from arch/arm/boot/dts/msm8926-1080p-cdp.dts
rename to arch/arm/boot/dts/msm8926-v2-1080p-cdp.dts
index 33e484a..a4ebbe1 100644
--- a/arch/arm/boot/dts/msm8926-1080p-cdp.dts
+++ b/arch/arm/boot/dts/msm8926-v2-1080p-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2.dtsi"
/include/ "msm8226-1080p-cdp.dtsi"
/include/ "msm8226-camera-sensor-cdp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-1080p-cdp.dts b/arch/arm/boot/dts/msm8926-v2-1080p-ext-buck-cdp.dts
similarity index 86%
copy from arch/arm/boot/dts/msm8926-1080p-cdp.dts
copy to arch/arm/boot/dts/msm8926-v2-1080p-ext-buck-cdp.dts
index 33e484a..64e872b 100644
--- a/arch/arm/boot/dts/msm8926-1080p-cdp.dts
+++ b/arch/arm/boot/dts/msm8926-v2-1080p-ext-buck-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,14 +12,14 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2-ext-buck.dtsi"
/include/ "msm8226-1080p-cdp.dtsi"
/include/ "msm8226-camera-sensor-cdp.dtsi"
/ {
model = "Qualcomm MSM 8926 CDP";
compatible = "qcom,msm8926-cdp", "qcom,msm8926", "qcom,cdp";
- qcom,board-id = <1 2>;
+ qcom,board-id = <1 3>;
};
&pm8226_chg {
diff --git a/arch/arm/boot/dts/msm8926-1080p-mtp.dts b/arch/arm/boot/dts/msm8926-v2-1080p-ext-buck-mtp.dts
similarity index 83%
copy from arch/arm/boot/dts/msm8926-1080p-mtp.dts
copy to arch/arm/boot/dts/msm8926-v2-1080p-ext-buck-mtp.dts
index c1217a2..f9a3cd8 100644
--- a/arch/arm/boot/dts/msm8926-1080p-mtp.dts
+++ b/arch/arm/boot/dts/msm8926-v2-1080p-ext-buck-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,12 +12,12 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2-ext-buck.dtsi"
/include/ "msm8226-1080p-mtp.dtsi"
/include/ "msm8226-camera-sensor-mtp.dtsi"
/ {
model = "Qualcomm MSM 8926 MTP";
compatible = "qcom,msm8926-mtp", "qcom,msm8926", "qcom,mtp";
- qcom,board-id = <8 2>;
+ qcom,board-id = <8 3>;
};
diff --git a/arch/arm/boot/dts/msm8926-1080p-mtp.dts b/arch/arm/boot/dts/msm8926-v2-1080p-mtp.dts
similarity index 87%
copy from arch/arm/boot/dts/msm8926-1080p-mtp.dts
copy to arch/arm/boot/dts/msm8926-v2-1080p-mtp.dts
index c1217a2..1f0bab1 100644
--- a/arch/arm/boot/dts/msm8926-1080p-mtp.dts
+++ b/arch/arm/boot/dts/msm8926-v2-1080p-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2.dtsi"
/include/ "msm8226-1080p-mtp.dtsi"
/include/ "msm8226-camera-sensor-mtp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-720p-cdp.dts b/arch/arm/boot/dts/msm8926-v2-720p-cdp.dts
similarity index 89%
rename from arch/arm/boot/dts/msm8926-720p-cdp.dts
rename to arch/arm/boot/dts/msm8926-v2-720p-cdp.dts
index 80bb5e6..1e6e197 100644
--- a/arch/arm/boot/dts/msm8926-720p-cdp.dts
+++ b/arch/arm/boot/dts/msm8926-v2-720p-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2.dtsi"
/include/ "msm8226-720p-cdp.dtsi"
/include/ "msm8226-camera-sensor-cdp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-720p-mtp.dts b/arch/arm/boot/dts/msm8926-v2-720p-mtp.dts
similarity index 87%
rename from arch/arm/boot/dts/msm8926-720p-mtp.dts
rename to arch/arm/boot/dts/msm8926-v2-720p-mtp.dts
index 32301fd..59ad506 100644
--- a/arch/arm/boot/dts/msm8926-720p-mtp.dts
+++ b/arch/arm/boot/dts/msm8926-v2-720p-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,7 +12,7 @@
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2.dtsi"
/include/ "msm8226-720p-mtp.dtsi"
/include/ "msm8226-camera-sensor-mtp.dtsi"
diff --git a/arch/arm/boot/dts/msm8926-v2-ext-buck.dtsi b/arch/arm/boot/dts/msm8926-v2-ext-buck.dtsi
new file mode 100644
index 0000000..0785def
--- /dev/null
+++ b/arch/arm/boot/dts/msm8926-v2-ext-buck.dtsi
@@ -0,0 +1,87 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "msm8926-v2.dtsi"
+
+&i2c_0 {
+ qcom,sda-gpio = <&msmgpio 14 0>;
+ qcom,scl-gpio = <&msmgpio 15 0>;
+
+ ncp6335d: ncp6335d-regulator@1c {
+ compatible = "onnn,ncp6335d-regulator";
+ reg = <0x1c>;
+ onnn,vsel = <0>;
+ onnn,slew-ns = <2666>;
+ onnn,step-size = <10000>;
+ onnn,min-slew-ns = <333>;
+ onnn,max-slew-ns = <2666>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1350000>;
+ onnn,min-setpoint = <600000>;
+ onnn,vsel-gpio = <&msmgpio 2 1>;
+ onnn,discharge-enable;
+ onnn,restore-reg;
+ onnn,tlmm-config = <0x80 0x0>;
+ };
+
+ fan53555: fan53555-regulator@60 {
+ compatible = "fairchild,fan53555-regulator";
+ reg = <0x60>;
+ fairchild,backup-vsel = <1>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <8000>;
+ fairchild,vsel-gpio = <&msmgpio 2 1>;
+ fairchild,restore-reg;
+ fairchild,disable-suspend;
+ };
+};
+
+&apc_vreg_corner {
+ vdd-apc-optional-prim-supply = <&ncp6335d>;
+ vdd-apc-supply = <&fan53555>;
+};
+
+&soc {
+ qcom,spm@f9012000 {
+ compatible = "qcom,spm-v2";
+ qcom,saw2-spm-cmd-pc-no-rpm = [00 32 10 e0 d0 6b c0 42 f0
+ 03 50 4e 02 02 c0 d0 12 e0 6b 02 32
+ 50 f0 0f];
+ qcom,saw2-spm-cmd-pc = [00 32 10 e0 d0 6b c0 42 f0
+ 07 50 4e 02 02 c0 d0 12 e0 6b 02 32
+ 50 f0 0f];
+ };
+
+ qcom,lpm-levels {
+ qcom,system-modes {
+ compatible = "qcom,system-modes";
+ qcom,system-modes@2 {
+ qcom,l2 = "l2_cache_pc";
+ qcom,latency-us = <13200>;
+ qcom,ss-power = <315>;
+ qcom,energy-overhead = <1027150>;
+ qcom,time-overhead = <2400>;
+ qcom,min-cpu-mode= "pc";
+ qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
+ };
+ };
+ };
+
+ qcom,ext-buck-control {
+ compatible = "qcom,ext-buck-control";
+ qcom,gpio-num = <50>;
+ qcom,settling-time-us = <2580>;
+ };
+
+};
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug-pvt.dts b/arch/arm/boot/dts/msm8926-v2-qrd-skug-pvt.dts
similarity index 88%
copy from arch/arm/boot/dts/msm8926-qrd-skug-pvt.dts
copy to arch/arm/boot/dts/msm8926-v2-qrd-skug-pvt.dts
index 2a45592..f8cd88d 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug-pvt.dts
+++ b/arch/arm/boot/dts/msm8926-v2-qrd-skug-pvt.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,7 @@
*/
/dts-v1/;
+/include/ "msm8926-v2.dtsi"
/include/ "msm8926-qrd-skug.dtsi"
/ {
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug.dts b/arch/arm/boot/dts/msm8926-v2-qrd-skug.dts
similarity index 86%
copy from arch/arm/boot/dts/msm8926-qrd-skug.dts
copy to arch/arm/boot/dts/msm8926-v2-qrd-skug.dts
index 4aab4f9..0d69e51 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug.dts
+++ b/arch/arm/boot/dts/msm8926-v2-qrd-skug.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,6 +11,7 @@
*/
/dts-v1/;
+/include/ "msm8926-v2.dtsi"
/include/ "msm8926-qrd-skug.dtsi"
/ {
diff --git a/arch/arm/boot/dts/msm8926-qrd.dts b/arch/arm/boot/dts/msm8926-v2-qrd.dts
similarity index 86%
copy from arch/arm/boot/dts/msm8926-qrd.dts
copy to arch/arm/boot/dts/msm8926-v2-qrd.dts
index 8ee8828..6223055 100644
--- a/arch/arm/boot/dts/msm8926-qrd.dts
+++ b/arch/arm/boot/dts/msm8926-v2-qrd.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -11,7 +11,7 @@
*/
/dts-v1/;
-/include/ "msm8926.dtsi"
+/include/ "msm8926-v2.dtsi"
/include/ "msm8226-qrd.dtsi"
/ {
diff --git a/arch/arm/boot/dts/msm8926-v2.dtsi b/arch/arm/boot/dts/msm8926-v2.dtsi
new file mode 100644
index 0000000..1322573
--- /dev/null
+++ b/arch/arm/boot/dts/msm8926-v2.dtsi
@@ -0,0 +1,93 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "msm8926.dtsi"
+
+/ {
+ qcom,msm-id = <200 0x20000>,
+ <224 0x20000>;
+};
+
+&msm_gpu {
+ /* Updated chip ID */
+ qcom,chipid = <0x03000512>;
+
+ /* Bus Scale Settings */
+ qcom,msm-bus,num-cases = <4>;
+ qcom,msm-bus,vectors-KBps =
+ <26 512 0 0>, <89 604 0 0>,
+ <26 512 0 1800000>, <89 604 0 3200000>,
+ <26 512 0 3600000>, <89 604 0 5120000>,
+ <26 512 0 4800000>, <89 604 0 6400000>;
+
+ /* Power levels */
+ qcom,gpu-pwrlevels {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,gpu-pwrlevels";
+
+ qcom,gpu-pwrlevel@0 {
+ reg = <0>;
+ qcom,gpu-freq = <500000000>;
+ qcom,bus-freq = <3>;
+ qcom,io-fraction = <0>;
+ };
+
+ qcom,gpu-pwrlevel@1 {
+ reg = <1>;
+ qcom,gpu-freq = <320000000>;
+ qcom,bus-freq = <2>;
+ qcom,io-fraction = <33>;
+ };
+
+ qcom,gpu-pwrlevel@2 {
+ reg = <2>;
+ qcom,gpu-freq = <200000000>;
+ qcom,bus-freq = <1>;
+ qcom,io-fraction = <100>;
+ };
+
+ qcom,gpu-pwrlevel@3 {
+ reg = <3>;
+ qcom,gpu-freq = <19000000>;
+ qcom,bus-freq = <0>;
+ qcom,io-fraction = <0>;
+ };
+ };
+};
+
+&pm8226_l3 {
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_ao {
+ regulator-max-microvolt = <1287500>;
+};
+
+&pm8226_l3_so {
+ regulator-max-microvolt = <1287500>;
+};
+
+&apc_vreg_corner {
+ /delete-property/ qcom,cpr-enable;
+ /delete-property/ qcom,cpr-fuse-cond-min-volt-sel;
+ /delete-property/ qcom,cpr-cond-min-voltage;
+ /delete-property/ qcom,cpr-fuse-uplift-sel;
+ /delete-property/ qcom,cpr-uplift-voltage;
+ /delete-property/ qcom,cpr-uplift-quotient;
+ /delete-property/ qcom,cpr-uplift-max-volt;
+ /delete-property/ qcom,cpr-uplift-speed-bin;
+ qcom,vdd-mx-vmax = <1287500>;
+ qcom,vdd-mx-vmin-method = <4>;
+ qcom,vdd-mx-corner-map = <1050000 1150000 1280000>;
+};
diff --git a/arch/arm/boot/dts/msm8926.dtsi b/arch/arm/boot/dts/msm8926.dtsi
index 1c8fe4a..8a0e5c4 100644
--- a/arch/arm/boot/dts/msm8926.dtsi
+++ b/arch/arm/boot/dts/msm8926.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,10 +22,6 @@
/ {
model = "Qualcomm MSM 8926";
compatible = "qcom,msm8926";
- qcom,msm-id = <200 0>,
- <224 0>,
- <200 0x10001>,
- <224 0x10001>;
};
&soc {
@@ -43,36 +39,21 @@
reg = <0xf9011050 0x8>,
<0xfc4b80b0 0x8>;
reg-names = "rcg-base", "efuse";
+ qcom,speed0-bin-v0 =
+ < 0 0>,
+ < 384000000 2>,
+ < 787200000 4>,
+ <1190400000 7>;
qcom,speed0-bin-v1 =
< 0 0>,
< 384000000 2>,
< 787200000 4>,
<1190400000 7>;
- qcom,speed6-bin-v1 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1190400000 7>;
qcom,speed2-bin-v1 =
< 0 0>,
< 384000000 2>,
< 787200000 4>,
<1401600000 10>;
- qcom,speed5-bin-v1 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1401600000 10>;
- qcom,speed4-bin-v1 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1401600000 10>;
- qcom,speed7-bin-v1 =
- < 0 0>,
- < 384000000 2>,
- < 787200000 4>,
- <1401600000 10>;
qcom,speed1-bin-v1 =
< 0 0>,
< 384000000 2>,
@@ -85,6 +66,20 @@
<1401600000 10>,
<1497600000 11>,
<1593600000 12>;
+ qcom,speed5-bin-v1 =
+ < 0 0>,
+ < 384000000 2>,
+ < 787200000 4>,
+ < 998400000 5>,
+ <1094400000 6>,
+ <1190400000 7>,
+ <1305600000 8>,
+ <1344000000 9>,
+ <1401600000 10>,
+ <1497600000 11>,
+ <1593600000 12>,
+ <1689600000 13>,
+ <1785600000 14>;
};
qcom,msm-thermal {
@@ -137,42 +132,21 @@
};
};
-&pm8226_l3 {
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
-};
-
-&pm8226_l3_ao {
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
-};
-
-&pm8226_l3_so {
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
-};
-
-&pm8226_s2 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1350000>;
-};
-
&apc_vreg_corner {
- qcom,pvs-init-voltage = <1350000 1340000 1330000 1320000 1310000
- 1300000 1290000 1280000 1270000 1260000
- 1250000 1240000 1230000 1220000 1210000
- 1200000 1190000 1180000 1170000 1160000
- 1150000 1140000 1140000 1140000 1140000
- 1140000 1140000 1140000 1140000 1140000
- 1140000 1140000>;
- qcom,pvs-corner-ceiling-slow = <1050000 1150000 1280000>;
- qcom,pvs-corner-ceiling-nom = <1050000 1080000 1200000>;
- qcom,pvs-corner-ceiling-fast = <1050000 1050000 1100000>;
- qcom,cpr-step-quotient = <30>;
qcom,cpr-up-threshold = <0>;
- qcom,cpr-down-threshold = <1>;
- qcom,cpr-apc-volt-step = <10000>;
- qcom,cpr-quotient-adjustment = <96>;
+ qcom,cpr-down-threshold = <2>;
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <14>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3 3 3>;
+ qcom,cpr-quot-adjust-table =
+ <1 5 450>,
+ <1 6 375>,
+ <1 7 300>,
+ <1 8 225>,
+ <1 9 187>,
+ <1 10 150>,
+ <1 11 75>;
+ qcom,cpr-quotient-adjustment = <0 72 72>;
};
&tsens {
@@ -196,3 +170,9 @@
hsic,strobe-gpio = <&msmgpio 119 0x00>;
hsic,data-gpio = <&msmgpio 120 0x00>;
};
+
+&usb_otg {
+ /delete-property/ qcom,hsusb-otg-disable-reset;
+ qcom,ahb-async-bridge-bypass;
+};
+
diff --git a/arch/arm/boot/dts/msm8974-bus.dtsi b/arch/arm/boot/dts/msm8974-bus.dtsi
index af51327..b33b2b5 100644
--- a/arch/arm/boot/dts/msm8974-bus.dtsi
+++ b/arch/arm/boot/dts/msm8974-bus.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1168,12 +1168,18 @@
qcom,masterp = <0>;
qcom,tier = <2>;
qcom,hw-sel = "BIMC";
- qcom,mode = "Fixed";
+ qcom,mode = "Limiter";
qcom,qport = <0>;
qcom,ws = <10000>;
qcom,mas-hw-id = <0>;
qcom,prio-rd = <0>;
qcom,prio-wr = <0>;
+ qcom,mode-thresh = "Fixed";
+ qcom,thresh = <2000000>;
+ qcom,dual-conf;
+ qcom,bimc,bw = <300000>;
+ qcom,bimc,gp = <5000>;
+ qcom,bimc,thmp = <50>;
};
mas-ampss-m1 {
@@ -1182,12 +1188,18 @@
qcom,masterp = <1>;
qcom,tier = <2>;
qcom,hw-sel = "BIMC";
- qcom,mode = "Fixed";
+ qcom,mode = "Limiter";
qcom,qport = <1>;
qcom,ws = <10000>;
qcom,mas-hw-id = <0>;
qcom,prio-rd = <0>;
qcom,prio-wr = <0>;
+ qcom,mode-thresh = "Fixed";
+ qcom,thresh = <2000000>;
+ qcom,dual-conf;
+ qcom,bimc,bw = <300000>;
+ qcom,bimc,gp = <5000>;
+ qcom,bimc,thmp = <50>;
};
mas-mss-proc {
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi
index 9948833..bdc3bef 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-cdp.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -178,4 +178,97 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 90 0>,
+ <&msmgpio 89 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <0>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 92 0>,
+ <&msmgpio 91 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@2 {
+ cell-index = <2>;
+ compatible = "qcom,camera";
+ reg = <0x2>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-max-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-op-mode = <105000 80000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi
index 2f8e558..43b0d75 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-dragonboard.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -185,4 +185,100 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <0>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 90 0>,
+ <&msmgpio 89 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <180>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 92 0>,
+ <&msmgpio 91 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@2 {
+ cell-index = <2>;
+ compatible = "qcom,camera";
+ reg = <0x2>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-fluid.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-fluid.dtsi
index 07eb311..529d3ba 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-fluid.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-fluid.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -190,4 +190,100 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <270>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,led-flash-src = <&led_flash0>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 90 0>,
+ <&msmgpio 89 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <90>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1";
+ qcom,cci-master = <1>;
+ status = "ok";
+ };
+
+ qcom,camera@2 {
+ cell-index = <2>;
+ compatible = "qcom,camera";
+ reg = <0x2>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>,
+ <&msmgpio 28 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <1>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-liquid.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-liquid.dtsi
index bf7f492..854e8f7 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-liquid.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-liquid.dtsi
@@ -1,6 +1,6 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -179,4 +179,98 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <0>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs2>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 90 0>,
+ <&msmgpio 89 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <180>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs2>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-max-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-op-mode = <105000 80000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@2 {
+ cell-index = <2>;
+ compatible = "qcom,camera";
+ reg = <0x2>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>,
+ <&msmgpio 28 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
};
diff --git a/arch/arm/boot/dts/msm8974-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/msm8974-camera-sensor-mtp.dtsi
index 29e2aaa..59e1a7c 100644
--- a/arch/arm/boot/dts/msm8974-camera-sensor-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera-sensor-mtp.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -191,4 +191,95 @@
qcom,sensor-mode = <1>;
qcom,cci-master = <0>;
};
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,actuator-src = <&actuator0>;
+ qcom,led-flash-src = <&led_flash0>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ cam_vaf-supply = <&pm8941_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 90 0>,
+ <&msmgpio 89 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <90>;
+ qcom,vdd-cx-supply = <&pm8841_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-max-voltage = <1225000 0 2850000 3000000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000 100000>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@2 {
+ cell-index = <2>;
+ compatible = "qcom,camera";
+ reg = <0x02>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,mount-angle = <90>;
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-max-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-op-mode = <105000 80000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 17 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1";
+ qcom,cci-master = <1>;
+ status = "ok";
+ };
+
};
diff --git a/arch/arm/boot/dts/msm8974-cdp.dtsi b/arch/arm/boot/dts/msm8974-cdp.dtsi
index 27536db..3b4c881 100644
--- a/arch/arm/boot/dts/msm8974-cdp.dtsi
+++ b/arch/arm/boot/dts/msm8974-cdp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -220,6 +220,7 @@
qcom,hdmi-audio-rx;
qcom,us-euro-gpios = <&pm8941_gpios 20 0>;
qcom,cdc-micbias2-headset-only;
+ qcom,mbhc-audio-jack-type = "6-pole-jack";
};
usb2_otg_sw: regulator-tpd4s214 {
@@ -765,3 +766,26 @@
&dsi_jdi_1080_vid {
qcom,cont-splash-enabled;
};
+
+&dsi_dual_jdi_video_0 {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
+ qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
+ qcom,mdss-dsi-bl-pmic-bank-select = <7>;
+ qcom,cont-splash-enabled;
+};
+
+&dsi_dual_jdi_video_1 {
+ qcom,cont-splash-enabled;
+};
+
+&dsi_dual_jdi_cmd_0 {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
+ qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
+ qcom,mdss-dsi-bl-pmic-bank-select = <7>;
+ qcom,cont-splash-enabled;
+};
+
+&dsi_dual_jdi_cmd_1 {
+ qcom,cont-splash-enabled;
+};
+
diff --git a/arch/arm/boot/dts/msm8974-fluid.dtsi b/arch/arm/boot/dts/msm8974-fluid.dtsi
index d0ca01d..eb5a5b6 100644
--- a/arch/arm/boot/dts/msm8974-fluid.dtsi
+++ b/arch/arm/boot/dts/msm8974-fluid.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -133,6 +133,20 @@
};
};
+ i2c@f9928000 { /* BLSP1 QUP6 */
+ nfc-nci@e {
+ compatible = "qcom,nfc-nci";
+ reg = <0x0e>;
+ qcom,irq-gpio = <&msmgpio 59 0x00>;
+ qcom,dis-gpio = <&msmgpio 13 0x00>;
+ qcom,clk-src = "BBCLK2";
+ qcom,clk-en-gpio = <&msmgpio 0 0x00>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <59 0>;
+ qcom,clk-gpio = <&pm8941_gpios 32 0>;
+ };
+ };
+
i2c@f9967000 {
sii8334@72 {
compatible = "qcom,mhl-sii8334";
@@ -257,6 +271,7 @@
qcom,hdmi-audio-rx;
qcom,ext-ult-lo-amp-gpio = <&pm8941_gpios 6 0>;
qcom,cdc-micbias2-headset-only;
+ qcom,mbhc-audio-jack-type = "6-pole-jack";
};
};
@@ -606,6 +621,11 @@
};
gpio@df00 { /* GPIO 32 */
+ qcom,mode = <0>; /* QPNP_PIN_MODE_DIG_IN */
+ qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
+ qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
+ qcom,src-sel = <2>; /* QPNP_PIN_SEL_FUNC_1 */
+ qcom,master-en = <1>;
};
gpio@e000 { /* GPIO 33 */
diff --git a/arch/arm/boot/dts/msm8974-liquid.dtsi b/arch/arm/boot/dts/msm8974-liquid.dtsi
index 397e10e..942aba4 100644
--- a/arch/arm/boot/dts/msm8974-liquid.dtsi
+++ b/arch/arm/boot/dts/msm8974-liquid.dtsi
@@ -318,7 +318,7 @@
compatible = "qca,ar3002";
qca,bt-reset-gpio = <&pm8941_gpios 34 0>;
qca,bt-chip-pwd-supply = <&ath_chip_pwd_l>;
- qca,bt-vdd-io-supply = <&pm8941_s3>;
+ qca,bt-vdd-io-supply = <&pm8941_l10>;
qca,bt-vdd-pa-supply = <&pm8941_l19>;
};
@@ -380,47 +380,34 @@
qcom,prim-auxpcm-gpio-set = "prim-gpio-tert";
};
- hsic_hub {
- compatible = "qcom,hsic-smsc-hub";
- smsc,model-id = <3503>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- smsc,reset-gpio = <&pm8941_gpios 8 0x00>;
- smsc,refclk-gpio = <&pm8941_gpios 16 0x00>;
- smsc,int-gpio = <&msmgpio 50 0x00>;
- hub_int-supply = <&pm8941_l10>;
- hub_vbus-supply = <&ext_5v>;
+ hsic_host: hsic@f9a00000 {
+ compatible = "qcom,hsic-host";
+ reg = <0xf9a00000 0x400>;
+ #address-cells = <0>;
+ interrupt-parent = <&hsic_host>;
+ interrupts = <0 1 2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xffffffff>;
+ interrupt-map = <0 &intc 0 136 0
+ 1 &intc 0 148 0
+ 2 &msmgpio 144 0x8>;
+ interrupt-names = "core_irq", "async_irq", "wakeup";
+ hsic_vdd_dig-supply = <&pm8841_s2_corner>;
+ HSIC_GDSC-supply = <&gdsc_usb_hsic>;
+ hsic,strobe-gpio = <&msmgpio 144 0x00>;
+ hsic,data-gpio = <&msmgpio 145 0x00>;
+ hsic,ignore-cal-pad-config;
+ hsic,strobe-pad-offset = <0x2050>;
+ hsic,data-pad-offset = <0x2054>;
+ qcom,phy-susp-sof-workaround;
+ hsic,vdd-voltage-level = <1 5 7>;
- hsic_host: hsic@f9a00000 {
- compatible = "qcom,hsic-host";
- reg = <0xf9a00000 0x400>;
- #address-cells = <0>;
- interrupt-parent = <&hsic_host>;
- interrupts = <0 1 2>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0xffffffff>;
- interrupt-map = <0 &intc 0 136 0
- 1 &intc 0 148 0
- 2 &msmgpio 144 0x8>;
- interrupt-names = "core_irq", "async_irq", "wakeup";
- hsic_vdd_dig-supply = <&pm8841_s2_corner>;
- HSIC_GDSC-supply = <&gdsc_usb_hsic>;
- hsic,strobe-gpio = <&msmgpio 144 0x00>;
- hsic,data-gpio = <&msmgpio 145 0x00>;
- hsic,ignore-cal-pad-config;
- hsic,strobe-pad-offset = <0x2050>;
- hsic,data-pad-offset = <0x2054>;
- qcom,phy-susp-sof-workaround;
- hsic,vdd-voltage-level = <1 5 7>;
-
- qcom,msm-bus,name = "hsic";
- qcom,msm-bus,num-cases = <2>;
- qcom,msm-bus,num-paths = <1>;
- qcom,msm-bus,vectors-KBps =
- <85 512 0 0>,
- <85 512 40000 160000>;
- };
+ qcom,msm-bus,name = "hsic";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <85 512 0 0>,
+ <85 512 40000 160000>;
};
wlan0: qca,wlan {
@@ -445,6 +432,38 @@
qcom,msm-bus,name = "wlan_sdio";
qca,wifi-chip-pwd-supply = <&ath_chip_pwd_l>;
};
+
+ qcom,pronto@fb21b000 {
+ status = "disabled";
+ };
+
+ qcom,iris-fm {
+ status = "disabled";
+ };
+
+ qcom,wcnss-wlan@fb000000 {
+ status = "disabled";
+ };
+
+ qcom,smd-wcnss {
+ status = "disabled";
+ };
+
+ qcom,smsm-wcnss {
+ status = "disabled";
+ };
+};
+
+&pm8941_l19 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ qcom,init-voltage = <3300000>;
+};
+
+&pm8941_l10 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
};
&mdss_fb0 {
diff --git a/arch/arm/boot/dts/msm8974-mdss-panels.dtsi b/arch/arm/boot/dts/msm8974-mdss-panels.dtsi
index d405bf8..c11ef0a 100644
--- a/arch/arm/boot/dts/msm8974-mdss-panels.dtsi
+++ b/arch/arm/boot/dts/msm8974-mdss-panels.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,3 +15,7 @@
/include/ "dsi-panel-sharp-qhd-video.dtsi"
/include/ "dsi-panel-generic-720p-cmd.dtsi"
/include/ "dsi-panel-jdi-1080p-video.dtsi"
+/include/ "dsi-panel-jdi-dualmipi0-video.dtsi"
+/include/ "dsi-panel-jdi-dualmipi1-video.dtsi"
+/include/ "dsi-panel-jdi-dualmipi0-cmd.dtsi"
+/include/ "dsi-panel-jdi-dualmipi1-cmd.dtsi"
diff --git a/arch/arm/boot/dts/msm8974-mdss.dtsi b/arch/arm/boot/dts/msm8974-mdss.dtsi
index bf330f3..7f63234 100644
--- a/arch/arm/boot/dts/msm8974-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8974-mdss.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,6 +21,21 @@
qcom,max-bandwidth-low-kbps = <2300000>;
qcom,max-bandwidth-high-kbps = <3000000>;
+
+ /* Bus Scale Settings */
+ qcom,msm-bus,name = "mdss_mdp";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <22 512 0 0>,
+ <22 512 0 6400000>,
+ <22 512 0 6400000>;
+
+ /* Fudge factors */
+ qcom,mdss-ab-factor = <2 1>; /* 2 times */
+ qcom,mdss-ib-factor = <6 5>; /* 1.2 times */
+ qcom,mdss-clk-factor = <5 4>; /* 1.25 times */
+
qcom,max-clk-rate = <320000000>;
qcom,mdss-pipe-vig-off = <0x00001200 0x00001600
0x00001A00>;
@@ -66,6 +81,15 @@
<0x04B0 0xCCCCC0C0>,
<0x04B8 0xCCCCC000>;
+ /* buffer parameters to calculate prefill bandwidth */
+ qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
+ qcom,mdss-prefill-y-buffer-bytes = <4096>;
+ qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
+ qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
+ qcom,mdss-prefill-post-scaler-buffer-pixels = <0>;
+ qcom,mdss-prefill-pingpong-buffer-pixels = <4096>;
+ qcom,mdss-prefill-fbc-lines = <2>;
+
mdss_fb0: qcom,mdss_fb_primary {
cell-index = <0>;
compatible = "qcom,mdss-fb";
@@ -151,6 +175,47 @@
vdda-supply = <&pm8941_l2>;
qcom,mdss-fb-map = <&mdss_fb0>;
qcom,mdss-mdp = <&mdss_mdp>;
+ qcom,platform-strength-ctrl = [ff 06];
+ qcom,platform-bist-ctrl = [00 00 b1 ff 00 00];
+ qcom,platform-regulator-settings = [07 09 03 00 20 00 01];
+ qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97
+ 00 00 00 00 05 00 00 01 97
+ 00 00 00 00 0a 00 00 01 97
+ 00 00 00 00 0f 00 00 01 97
+ 00 c0 00 00 00 00 00 01 bb];
+ qcom,platform-supply-entry1 {
+ qcom,supply-name = "vdd";
+ qcom,supply-min-voltage = <3000000>;
+ qcom,supply-max-voltage = <3000000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ qcom,supply-pre-on-sleep = <0>;
+ qcom,supply-post-on-sleep = <20>;
+ qcom,supply-pre-off-sleep = <0>;
+ qcom,supply-post-off-sleep = <0>;
+ };
+ qcom,platform-supply-entry2 {
+ qcom,supply-name = "vddio";
+ qcom,supply-min-voltage = <1800000>;
+ qcom,supply-max-voltage = <1800000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ qcom,supply-pre-on-sleep = <0>;
+ qcom,supply-post-on-sleep = <20>;
+ qcom,supply-pre-off-sleep = <0>;
+ qcom,supply-post-off-sleep = <0>;
+ };
+ qcom,platform-supply-entry3 {
+ qcom,supply-name = "vdda";
+ qcom,supply-min-voltage = <1200000>;
+ qcom,supply-max-voltage = <1200000>;
+ qcom,supply-enable-load = <100000>;
+ qcom,supply-disable-load = <100>;
+ qcom,supply-pre-on-sleep = <0>;
+ qcom,supply-post-on-sleep = <0>;
+ qcom,supply-pre-off-sleep = <0>;
+ qcom,supply-post-off-sleep = <0>;
+ };
};
mdss_hdmi_tx: qcom,hdmi_tx@fd922100 {
diff --git a/arch/arm/boot/dts/msm8974-mtp.dtsi b/arch/arm/boot/dts/msm8974-mtp.dtsi
index 6cc49c4..d118d51 100644
--- a/arch/arm/boot/dts/msm8974-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8974-mtp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -214,6 +214,7 @@
sound {
qcom,model = "msm8974-taiko-mtp-snd-card";
qcom,cdc-micbias2-headset-only;
+ qcom,mbhc-audio-jack-type = "6-pole-jack";
};
};
@@ -707,6 +708,7 @@
taiko_codec {
qcom,cdc-micbias1-ext-cap;
qcom,cdc-micbias2-ext-cap;
+ qcom,cdc-micbias3-ext-cap;
qcom,cdc-micbias4-ext-cap;
};
};
diff --git a/arch/arm/boot/dts/msm8974-regulator.dtsi b/arch/arm/boot/dts/msm8974-regulator.dtsi
index 9b9202e..5cf98d6 100644
--- a/arch/arm/boot/dts/msm8974-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974-regulator.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -288,7 +288,7 @@
rpm-regulator-ldoa11 {
status = "okay";
pm8941_l11: regulator-l11 {
- regulator-min-microvolt = <1300000>;
+ regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1350000>;
qcom,init-voltage = <1300000>;
status = "okay";
diff --git a/arch/arm/boot/dts/msm8974-v1-pm.dtsi b/arch/arm/boot/dts/msm8974-v1-pm.dtsi
index 179edac..886177d 100644
--- a/arch/arm/boot/dts/msm8974-v1-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v1-pm.dtsi
@@ -124,7 +124,7 @@
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
qcom,saw2-spm-cmd-ret = [1f 00 20 03 22 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 20 32 42 07 44 22 50 02 32 50 0f];
+ qcom,saw2-spm-cmd-gdhs = [00 20 32 42 03 44 22 50 02 32 50 0f];
qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
50 02 32 50 0f];
qcom,L2-spm-is-apcs-master;
diff --git a/arch/arm/boot/dts/msm8974-v1.dtsi b/arch/arm/boot/dts/msm8974-v1.dtsi
index 556e912..6146454 100644
--- a/arch/arm/boot/dts/msm8974-v1.dtsi
+++ b/arch/arm/boot/dts/msm8974-v1.dtsi
@@ -149,6 +149,10 @@
qcom,hsusb-otg-pnoc-errata-fix;
};
+&usb3 {
+ qcom,usbin-vadc = <&pm8941_vadc>;
+};
+
&gdsc_venus {
qcom,skip-logic-collapse;
qcom,retain-periph;
diff --git a/arch/arm/boot/dts/msm8974-v2-pm.dtsi b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
index cdd5fde..84a8c2d 100644
--- a/arch/arm/boot/dts/msm8974-v2-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2-pm.dtsi
@@ -120,7 +120,7 @@
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
qcom,saw2-spm-cmd-ret = [1f 00 03 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 32 42 07 44 50 02 32 50 0f];
+ qcom,saw2-spm-cmd-gdhs = [00 32 42 03 44 50 02 32 50 0f];
qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
50 02 32 50 0f];
qcom,L2-spm-is-apcs-master;
@@ -172,12 +172,13 @@
qcom,system-mode@0 {
qcom,l2 = "l2_cache_gdhs";
- qcom,latency-us = <20000>;
+ qcom,latency-us = <500>;
qcom,ss-power = <163>;
- qcom,energy-overhead = <1577736>;
- qcom,time-overhead = <5067>;
- qcom,min-cpu-mode= "pc";
+ qcom,energy-overhead = <577736>;
+ qcom,time-overhead = <1000>;
+ qcom,min-cpu-mode= "standalone_pc";
qcom,sync-cpus;
+
};
qcom,system-mode@1 {
@@ -188,6 +189,7 @@
qcom,time-overhead = <6605>;
qcom,min-cpu-mode = "pc";
qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
};
};
};
diff --git a/arch/arm/boot/dts/msm8974-v2.2.dtsi b/arch/arm/boot/dts/msm8974-v2.2.dtsi
index 3ed5720..14897ba 100644
--- a/arch/arm/boot/dts/msm8974-v2.2.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2.2.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -93,3 +93,7 @@
qcom,retain-periph;
qcom,retain-mem;
};
+
+&gdsc_venus {
+ qcom,skip-logic-collapse;
+};
diff --git a/arch/arm/boot/dts/msm8974-v2.dtsi b/arch/arm/boot/dts/msm8974-v2.dtsi
index 5607257..7e102fe 100644
--- a/arch/arm/boot/dts/msm8974-v2.dtsi
+++ b/arch/arm/boot/dts/msm8974-v2.dtsi
@@ -49,6 +49,10 @@
};
};
+&usb3 {
+ qcom,usbin-vadc = <&pm8941_vadc>;
+};
+
/* GPU overrides */
&msm_gpu {
/* Updated chip ID */
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index 8b52a3f..23ddc8c 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -215,7 +215,7 @@
vdd-supply = <&gdsc_venus>;
qcom,hfi = "venus";
qcom,has-ocmem;
- qcom,max-hw-load = <1224450>; /* 4k @ 30 + 1080p @ 30*/
+ qcom,max-hw-load = <1216800>; /* 3840 x 2160 @ 30 + 1080p @ 30*/
};
qcom,vidc {
@@ -745,7 +745,7 @@
qcom,cdc-micbias-ldoh-v = <0x3>;
qcom,cdc-micbias-cfilt1-mv = <1800>;
qcom,cdc-micbias-cfilt2-mv = <2700>;
- qcom,cdc-micbias-cfilt3-mv = <1800>;
+ qcom,cdc-micbias-cfilt3-mv = <2700>;
qcom,cdc-micbias1-cfilt-sel = <0x0>;
qcom,cdc-micbias2-cfilt-sel = <0x1>;
qcom,cdc-micbias3-cfilt-sel = <0x2>;
@@ -2001,8 +2001,8 @@
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
- <1 618 0 0>,
- <1 618 0 800>;
+ <88 618 0 0>,
+ <88 618 0 800>;
};
qseecom: qcom,qseecom@7b00000 {
@@ -2012,7 +2012,7 @@
qcom,disk-encrypt-pipe-pair = <2>;
qcom,hlos-ce-hw-instance = <1>;
qcom,qsee-ce-hw-instance = <0>;
- qcom,support-bus-scaling = <1>;
+ qcom,support-bus-scaling;
qcom,msm-bus,name = "qseecom-noc";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <1>;
@@ -2133,9 +2133,13 @@
interrupts = <0 236 0>;
qcom,bam-pipe-pair = <2>;
qcom,ce-hw-instance = <1>;
+ qcom,clk-mgmt-sus-res;
qcom,msm-bus,name = "qcrypto-noc";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
+ qcom,use-sw-aes-cbc-ecb-ctr-algo;
+ qcom,use-sw-aes-xts-algo;
+ qcom,use-sw-ahash-algo;
qcom,msm-bus,vectors-KBps =
<56 512 0 0>,
<56 512 3936000 393600>;
@@ -2347,6 +2351,22 @@
compatible = "qcom,bcl";
};
+ i2c@f9928000 { /* BLSP-1 QUP-6 */
+ cell-index = <3>;
+ compatible = "qcom,i2c-qup";
+ reg = <0xf9928000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg-names = "qup_phys_addr";
+ interrupts = <0 100 0>;
+ interrupt-names = "qup_err_intr";
+ qcom,i2c-bus-freq = <400000>;
+ qcom,i2c-src-freq = <19200000>;
+ qcom,scl-gpio = <&msmgpio 30 0>;
+ qcom,sda-gpio = <&msmgpio 29 0>;
+ qcom,master-id = <86>;
+ };
+
qcom,ssm {
compatible = "qcom,ssm";
qcom,channel-name = "SSM_RTR";
diff --git a/arch/arm/boot/dts/msm8974pro-ab-pm8941-cdp.dts b/arch/arm/boot/dts/msm8974pro-ab-pm8941-cdp.dts
index b6a6fcb..5a01945 100644
--- a/arch/arm/boot/dts/msm8974pro-ab-pm8941-cdp.dts
+++ b/arch/arm/boot/dts/msm8974pro-ab-pm8941-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,3 +20,8 @@
compatible = "qcom,msm8974-cdp", "qcom,msm8974", "qcom,cdp";
qcom,board-id = <1 0>;
};
+
+&sdhc_1 {
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+};
diff --git a/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid-hbtp.dts b/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid-hbtp.dts
new file mode 100644
index 0000000..6ba8b5e
--- /dev/null
+++ b/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid-hbtp.dts
@@ -0,0 +1,47 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/include/ "msm8974pro-ab-pm8941.dtsi"
+/include/ "msm8974-fluid.dtsi"
+
+/ {
+ model = "Qualcomm MSM 8974Pro-AA/AB FLUID";
+ compatible = "qcom,msm8974-fluid", "qcom,msm8974", "qcom,fluid";
+ qcom,board-id = <3 1>;
+};
+
+&soc {
+ spi@f9966000 { /* BLSP2 QUP4 */
+ /* Leave the SPI bus for QDSP to use */
+ status = "disabled";
+ };
+
+ hbtp {
+ compatible = "qcom,hbtp";
+ vcc_ana-supply = <&pm8941_l18>;
+ };
+};
+
+&i2c_0 {
+ /* mhl-sii8334 is on i2c_0 and uses gpio 12 as mhl-pwr-gpio.
+ * Display panel needs gpio 12 as TE gpio in command mode.
+ * Disabling the bus to make sure that display gets the gpio.
+ */
+ status = "disabled";
+};
+
+&sdhc_1 {
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+};
diff --git a/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid.dts b/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid.dts
index be298d1..010a4ad 100644
--- a/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid.dts
+++ b/arch/arm/boot/dts/msm8974pro-ab-pm8941-fluid.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,3 +20,8 @@
compatible = "qcom,msm8974-fluid", "qcom,msm8974", "qcom,fluid";
qcom,board-id = <3 0>;
};
+
+&sdhc_1 {
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+};
diff --git a/arch/arm/boot/dts/msm8974pro-ab-pm8941-liquid.dts b/arch/arm/boot/dts/msm8974pro-ab-pm8941-liquid.dts
index 49c3df0..0192f56 100644
--- a/arch/arm/boot/dts/msm8974pro-ab-pm8941-liquid.dts
+++ b/arch/arm/boot/dts/msm8974pro-ab-pm8941-liquid.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,3 +20,8 @@
compatible = "qcom,msm8974-liquid", "qcom,msm8974", "qcom,liquid";
qcom,board-id = <9 0>;
};
+
+&sdhc_1 {
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+};
diff --git a/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts b/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts
index 6b62391..f80551e 100644
--- a/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts
+++ b/arch/arm/boot/dts/msm8974pro-ab-pm8941-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,5 +22,7 @@
};
&sdhc_1 {
- qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
};
diff --git a/arch/arm/boot/dts/msm8974pro-ac-pm8941-cdp.dts b/arch/arm/boot/dts/msm8974pro-ac-pm8941-cdp.dts
index 3e0feda..08ef393 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-pm8941-cdp.dts
+++ b/arch/arm/boot/dts/msm8974pro-ac-pm8941-cdp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,3 +20,8 @@
compatible = "qcom,msm8974-cdp", "qcom,msm8974", "qcom,cdp";
qcom,board-id = <1 0>;
};
+
+&sdhc_1 {
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+};
diff --git a/arch/arm/boot/dts/msm8974pro-ac-pm8941-liquid.dts b/arch/arm/boot/dts/msm8974pro-ac-pm8941-liquid.dts
index 7b88abe..8118e48 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-pm8941-liquid.dts
+++ b/arch/arm/boot/dts/msm8974pro-ac-pm8941-liquid.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,3 +20,8 @@
compatible = "qcom,msm8974-liquid", "qcom,msm8974", "qcom,liquid";
qcom,board-id = <9 0>;
};
+
+&sdhc_1 {
+ qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+ qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
+};
diff --git a/arch/arm/boot/dts/msm8974pro-ac-pm8941-mtp.dts b/arch/arm/boot/dts/msm8974pro-ac-pm8941-mtp.dts
index f79d361..76d0121 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-pm8941-mtp.dts
+++ b/arch/arm/boot/dts/msm8974pro-ac-pm8941-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,9 +22,6 @@
};
&sdhc_1 {
- qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>;
- qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
-
qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
};
diff --git a/arch/arm/boot/dts/msm8974pro-ac-pm8941.dtsi b/arch/arm/boot/dts/msm8974pro-ac-pm8941.dtsi
index cdcfecb..694049a 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-ac-pm8941.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,3 @@
<213 0x10000>,
<216 0x10000>;
};
-
-&sdhc_1 {
- reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
-};
diff --git a/arch/arm/boot/dts/msm8974pro-ac-pma8084-pm8941.dtsi b/arch/arm/boot/dts/msm8974pro-ac-pma8084-pm8941.dtsi
index dc438bb..bc7ecd2 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-pma8084-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-ac-pma8084-pm8941.dtsi
@@ -102,6 +102,7 @@
vbus_dwc3-supply = <&pm8941_mvs1>;
qcom,misc-ref = <&pm8941_misc>;
dwc_usb3-adc_tm = <&pm8941_adc_tm>;
+ qcom,usbin-vadc = <&pm8941_vadc>;
interrupt-map-mask = <0x0 0xffffffff>;
interrupt-map = <0x0 0 &intc 0 133 0
0x0 1 &spmi_bus 0x0 0x2 0x9 0x0>;
diff --git a/arch/arm/boot/dts/msm8974pro-ac-pma8084.dtsi b/arch/arm/boot/dts/msm8974pro-ac-pma8084.dtsi
index 4b7ed1d..46fae99 100644
--- a/arch/arm/boot/dts/msm8974pro-ac-pma8084.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-ac-pma8084.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,3 @@
<213 0x10000>,
<216 0x10000>;
};
-
-&sdhc_1 {
- reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
-};
diff --git a/arch/arm/boot/dts/msm8974pro-pm.dtsi b/arch/arm/boot/dts/msm8974pro-pm.dtsi
index 29aeccd..34ae372 100644
--- a/arch/arm/boot/dts/msm8974pro-pm.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pm.dtsi
@@ -120,7 +120,7 @@
qcom,phase-port = <0x1>;
qcom,pfm-port = <0x2>;
qcom,saw2-spm-cmd-ret = [1f 00 03 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 32 42 07 44 50 02 32 50 0f];
+ qcom,saw2-spm-cmd-gdhs = [00 32 42 03 44 50 02 32 50 0f];
qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
50 02 32 50 0f];
qcom,L2-spm-is-apcs-master;
@@ -174,11 +174,11 @@
qcom,system-mode@0 {
qcom,l2 = "l2_cache_gdhs";
- qcom,latency-us = <20000>;
+ qcom,latency-us = <500>;
qcom,ss-power = <163>;
- qcom,energy-overhead = <1577736>;
- qcom,time-overhead = <5067>;
- qcom,min-cpu-mode= "pc";
+ qcom,energy-overhead = <577736>;
+ qcom,time-overhead = <1000>;
+ qcom,min-cpu-mode= "standalone_pc";
qcom,sync-cpus;
};
@@ -190,6 +190,7 @@
qcom,time-overhead = <6605>;
qcom,min-cpu-mode = "pc";
qcom,sync-cpus;
+ qcom,send-rpm-sleep-set;
};
};
};
diff --git a/arch/arm/boot/dts/msm8974pro-pm8941.dtsi b/arch/arm/boot/dts/msm8974pro-pm8941.dtsi
index 8b13c9f..decd444 100644
--- a/arch/arm/boot/dts/msm8974pro-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pm8941.dtsi
@@ -64,6 +64,10 @@
qcom,init-smps-mode = <0>; /* Allow AUTO mode for VDD_CX. */
};
+&usb3 {
+ qcom,usbin-vadc = <&pm8941_vadc>;
+};
+
&krait_regulator_pmic {
status = "ok";
diff --git a/arch/arm/boot/dts/msm8974pro-pma8084-mtp.dtsi b/arch/arm/boot/dts/msm8974pro-pma8084-mtp.dtsi
old mode 100755
new mode 100644
index a22d806..680674d
--- a/arch/arm/boot/dts/msm8974pro-pma8084-mtp.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pma8084-mtp.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -42,6 +42,37 @@
cam_vana-supply = <&pma8084_l17>;
cam_vio-supply = <&pma8084_lvs4>;
};
+
+
+ qcom,camera@0 {
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vaf-supply = <&pma8084_l23>;
+ };
+
+ qcom,camera@1 {
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vaf-supply = <&pma8084_l23>;
+ };
+
+ qcom,camera@2 {
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ };
+
+ qcom,camera@3 {
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ };
};
&soc {
@@ -106,9 +137,6 @@
vdd-supply = <&pma8084_l20>;
vdd-io-supply = <&pma8084_s4>;
- qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>;
- qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
-
qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */
};
diff --git a/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi b/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi
index 79d7412..78e2167 100644
--- a/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974pro-pma8084-regulator.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -267,7 +267,7 @@
rpm-regulator-ldoa11 {
status = "okay";
pma8084_l11: regulator-l11 {
- regulator-min-microvolt = <1300000>;
+ regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1300000>;
qcom,init-voltage = <1300000>;
status = "okay";
diff --git a/arch/arm/boot/dts/msm8974pro.dtsi b/arch/arm/boot/dts/msm8974pro.dtsi
old mode 100755
new mode 100644
index 874ce05..a72ebb2
--- a/arch/arm/boot/dts/msm8974pro.dtsi
+++ b/arch/arm/boot/dts/msm8974pro.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1701,7 +1701,7 @@
qcom,dec-ocmem-ab-ib = <0 0>,
<176000 519000>,
<456000 519000>,
- <864000 519000>,
+ <864000 629000>,
<1728000 1038000>,
<2766000 1661000>,
<3456000 2076000>,
@@ -1751,3 +1751,14 @@
qcom,memblock-remove = <0x05a00000 0x7800000
0x0fa00000 0x500000>; /* Address and size of the hole */
};
+
+&gdsc_venus {
+ qcom,skip-logic-collapse;
+};
+
+&sdhc_1 {
+ reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
+
+ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>;
+ qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
+};
diff --git a/arch/arm/boot/dts/msmsamarium-camera-sensor-cdp-interposer.dtsi b/arch/arm/boot/dts/msmsamarium-camera-sensor-cdp-interposer.dtsi
new file mode 100644
index 0000000..81640f8
--- /dev/null
+++ b/arch/arm/boot/dts/msmsamarium-camera-sensor-cdp-interposer.dtsi
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&cci {
+ actuator0: qcom,actuator@18 {
+ cell-index = <0>;
+ reg = <0x18>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ };
+
+ actuator1: qcom,actuator@36 {
+ cell-index = <1>;
+ reg = <0x36>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ };
+
+ qcom,camera@20 {
+ compatible = "qcom,imx135";
+ reg = <0x20>;
+ qcom,slave-id = <0x20 0x0016 0x0135>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,sensor-name = "imx135";
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-op-mode = <135000 0 44000 124000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 81 0>,
+ <&msmgpio 80 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 30000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x1F>;
+ qcom,sensor-position = <0>;
+ qcom,sensor-mode = <0>;
+ qcom,sensor-type = <0>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@6d {
+ compatible = "qcom,imx132";
+ reg = <0x6d>;
+ qcom,slave-id = <0x6c 0x0 0x0132>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ qcom,sensor-name = "imx132";
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-max-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-op-mode = <44000 98000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x7>;
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ };
+
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x00>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-op-mode = <135000 0 44000 124000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 81 0>,
+ <&msmgpio 80 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x01>;
+ qcom,slave-id = <0x6c 0x0 0x0132>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ qcom,vdd-cx-supply = <&pma8084_s2>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-max-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-op-mode = <44000 98000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+};
diff --git a/arch/arm/boot/dts/msmsamarium-camera-sensor-cdp.dtsi b/arch/arm/boot/dts/msmsamarium-camera-sensor-cdp.dtsi
new file mode 100644
index 0000000..27f4a99
--- /dev/null
+++ b/arch/arm/boot/dts/msmsamarium-camera-sensor-cdp.dtsi
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&cci {
+
+ actuator0: qcom,actuator@18 {
+ cell-index = <0>;
+ reg = <0x18>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ };
+
+ actuator1: qcom,actuator@36 {
+ cell-index = <1>;
+ reg = <0x36>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ };
+
+ qcom,camera@20 {
+ compatible = "qcom,imx135";
+ reg = <0x20>;
+ qcom,slave-id = <0x20 0x0016 0x0135>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,sensor-name = "imx135";
+ qcom,vdd-cx-supply = <&pma8084_s2_corner>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-op-mode = <135000 0 44000 124000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 30 0>,
+ <&msmgpio 29 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 30000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x1F>;
+ qcom,sensor-position = <0>;
+ qcom,sensor-mode = <0>;
+ qcom,sensor-type = <0>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@6d {
+ compatible = "qcom,imx132";
+ reg = <0x6d>;
+ qcom,slave-id = <0x6c 0x0 0x0132>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ qcom,sensor-name = "imx132";
+ qcom,vdd-cx-supply = <&pma8084_s2_corner>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-max-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-op-mode = <44000 98000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x7>;
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <1>;
+ qcom,cci-master = <0>;
+ };
+
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x00>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,vdd-cx-supply = <&pma8084_s2_corner>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l27>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ cam_vaf-supply = <&pma8084_l23>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-type = <0 1 0 0>;
+ qcom,cam-vreg-min-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-max-voltage = <1050000 0 2850000 2850000>;
+ qcom,cam-vreg-op-mode = <135000 0 44000 124000>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 15 0>,
+ <&msmgpio 30 0>,
+ <&msmgpio 29 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x01>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <270>;
+ qcom,vdd-cx-supply = <&pma8084_s2_corner>;
+ qcom,vdd-cx-name = "qcom,vdd-cx";
+ cam_vdig-supply = <&pma8084_l3>;
+ cam_vana-supply = <&pma8084_l17>;
+ cam_vio-supply = <&pma8084_lvs4>;
+ qcom,cam-vreg-name = "cam_vana", "cam_vdig", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-max-voltage = <2850000 1200000 0>;
+ qcom,cam-vreg-op-mode = <44000 98000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 18 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <1 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_XSHUTDOWN";
+ qcom,cci-master = <0>;
+ status = "ok";
+ };
+};
+
diff --git a/arch/arm/configs/msm8226-perf_defconfig b/arch/arm/configs/msm8226-perf_defconfig
index 18402ad..3dd9c55 100644
--- a/arch/arm/configs/msm8226-perf_defconfig
+++ b/arch/arm/configs/msm8226-perf_defconfig
@@ -221,6 +221,7 @@
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_QSEECOM=y
+CONFIG_USB_HSIC_SMSC_HUB=y
CONFIG_SCSI=y
CONFIG_SCSI_TGT=y
CONFIG_BLK_DEV_SD=y
@@ -302,6 +303,8 @@
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_WCD9306_CODEC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_ONSEMI_NCP6335D=y
CONFIG_REGULATOR_STUB=y
CONFIG_REGULATOR_QPNP=y
CONFIG_MEDIA_SUPPORT=y
diff --git a/arch/arm/configs/msm8226_defconfig b/arch/arm/configs/msm8226_defconfig
index bfe05c0..38171e6 100644
--- a/arch/arm/configs/msm8226_defconfig
+++ b/arch/arm/configs/msm8226_defconfig
@@ -221,6 +221,7 @@
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_QSEECOM=y
+CONFIG_USB_HSIC_SMSC_HUB=y
CONFIG_SCSI=y
CONFIG_SCSI_TGT=y
CONFIG_BLK_DEV_SD=y
@@ -304,6 +305,8 @@
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_WCD9306_CODEC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_ONSEMI_NCP6335D=y
CONFIG_REGULATOR_STUB=y
CONFIG_REGULATOR_QPNP=y
CONFIG_MEDIA_SUPPORT=y
diff --git a/arch/arm/configs/msm8974-perf_defconfig b/arch/arm/configs/msm8974-perf_defconfig
index 5904aea..915b1c3 100755
--- a/arch/arm/configs/msm8974-perf_defconfig
+++ b/arch/arm/configs/msm8974-perf_defconfig
@@ -295,6 +295,7 @@
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE=y
CONFIG_INPUT_MISC=y
+CONFIG_INPUT_HBTP_INPUT=y
CONFIG_INPUT_UINPUT=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_SERIAL_MSM_HSL=y
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 1f7eb49..f1c285d 100755
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -301,6 +301,7 @@
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE=y
CONFIG_INPUT_MISC=y
+CONFIG_INPUT_HBTP_INPUT=y
CONFIG_INPUT_UINPUT=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_SERIAL_MSM_HSL=y
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index 2eb0c2c..7013a5c 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -148,6 +148,7 @@
#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
#define TIF_SYSCALL_TRACE 8
#define TIF_SYSCALL_AUDIT 9
+#define TIF_SYSCALL_RESTARTSYS 10
#define TIF_POLLING_NRFLAG 16
#define TIF_USING_IWMMXT 17
#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -163,9 +164,11 @@
#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
#define _TIF_SECCOMP (1 << TIF_SECCOMP)
+#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS)
/* Checks for any syscall work in entry-common.S */
-#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
+#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
+ _TIF_SYSCALL_RESTARTSYS)
/*
* Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index c6c6be7..6533c4b 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -24,6 +24,7 @@
#include <linux/hw_breakpoint.h>
#include <linux/regset.h>
#include <linux/audit.h>
+#include <linux/unistd.h>
#include <asm/pgtable.h>
#include <asm/traps.h>
@@ -916,6 +917,8 @@
audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
+ if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))
+ scno = __NR_restart_syscall - __NR_SYSCALL_BASE;
if (!test_thread_flag(TIF_SYSCALL_TRACE))
return scno;
if (!(current->ptrace & PT_PTRACED))
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index edb73b4..7f9d4ee 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -649,12 +649,10 @@
case -ERESTARTNOHAND:
case -ERESTARTSYS:
case -ERESTARTNOINTR:
+ case -ERESTART_RESTARTBLOCK:
regs->ARM_r0 = regs->ARM_ORIG_r0;
regs->ARM_pc = restart_addr;
break;
- case -ERESTART_RESTARTBLOCK:
- regs->ARM_r0 = -EINTR;
- break;
}
}
@@ -675,12 +673,14 @@
* debugger has chosen to restart at a different PC.
*/
if (regs->ARM_pc == restart_addr) {
- if (retval == -ERESTARTNOHAND
+ if (retval == -ERESTARTNOHAND ||
+ retval == -ERESTART_RESTARTBLOCK
|| (retval == -ERESTARTSYS
&& !(ka.sa.sa_flags & SA_RESTART))) {
regs->ARM_r0 = -EINTR;
regs->ARM_pc = continue_addr;
}
+ clear_thread_flag(TIF_SYSCALL_RESTARTSYS);
}
if (test_thread_flag(TIF_RESTORE_SIGMASK))
@@ -708,38 +708,15 @@
* ignore the restart.
*/
if (retval == -ERESTART_RESTARTBLOCK
- && regs->ARM_pc == continue_addr) {
- if (thumb_mode(regs)) {
- regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
- regs->ARM_pc -= 2;
- } else {
-#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
- regs->ARM_r7 = __NR_restart_syscall;
- regs->ARM_pc -= 4;
-#else
- u32 __user *usp;
-
- regs->ARM_sp -= 4;
- usp = (u32 __user *)regs->ARM_sp;
-
- if (put_user(regs->ARM_pc, usp) == 0) {
- regs->ARM_pc = KERN_RESTART_CODE;
- } else {
- regs->ARM_sp += 4;
- force_sigsegv(0, current);
- }
-#endif
- }
- }
-
- /* If there's no signal to deliver, we just put the saved sigmask
- * back.
- */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
- }
+ && regs->ARM_pc == restart_addr)
+ set_thread_flag(TIF_SYSCALL_RESTARTSYS);
}
+
+ /* If there's no signal to deliver, we just put the saved sigmask
+ * back.
+ */
+ if (test_and_clear_thread_flag(TIF_RESTORE_SIGMASK))
+ set_current_blocked(¤t->saved_sigmask);
}
asmlinkage void
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index f2d65fe..b8444c1 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -339,7 +339,6 @@
select MSM_GPIOMUX
select MULTI_IRQ_HANDLER
select PM_DEVFREQ
- select MSM_DEVFREQ_CPUBW
select MSM_PIL
select MSM_NATIVE_RESTART
select MSM_RESTART_V2
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 9c9fffc..1c07e7d 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -297,7 +297,7 @@
obj-$(CONFIG_ARCH_MSM8610) += clock-dsi-8610.o
obj-$(CONFIG_ARCH_MSMKRYPTON) += clock-local2.o clock-pll.o clock-krypton.o clock-rpm.o clock-voter.o
-obj-$(CONFIG_MSM_PM) += msm-pm.o pm-data.o
+obj-$(CONFIG_MSM_PM) += msm-pm.o pm-data.o ext-buck-control.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire.o board-sapphire-gpio.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-keypad.o board-sapphire-panel.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 78df289..c0e9efc 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -69,6 +69,7 @@
dtb-$(CONFIG_ARCH_MSM8974) += msm8974-v2.2-mtp.dtb
dtb-$(CONFIG_ARCH_MSM8974) += msm8974pro-ab-pm8941-cdp.dtb
dtb-$(CONFIG_ARCH_MSM8974) += msm8974pro-ab-pm8941-fluid.dtb
+ dtb-$(CONFIG_ARCH_MSM8974) += msm8974pro-ab-pm8941-fluid-hbtp.dtb
dtb-$(CONFIG_ARCH_MSM8974) += msm8974pro-ab-pm8941-liquid.dtb
dtb-$(CONFIG_ARCH_MSM8974) += msm8974pro-ab-pm8941-mtp.dtb
dtb-$(CONFIG_ARCH_MSM8974) += msm8974pro-ac-pm8941-cdp.dtb
@@ -111,13 +112,22 @@
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-v2-1080p-mtp.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-v2-qrd-evt.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-v2-qrd-dvt.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-720p-cdp.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-1080p-cdp.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-720p-mtp.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-1080p-mtp.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-qrd.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-qrd-skug.dtb
- dtb-$(CONFIG_ARCH_MSM8226) += msm8926-qrd-skug-pvt.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-720p-cdp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-1080p-cdp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-720p-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-1080p-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-qrd.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-qrd-skug.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v1-qrd-skug-pvt.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-720p-cdp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-1080p-cdp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-1080p-ext-buck-cdp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-720p-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-1080p-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-1080p-ext-buck-mtp.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-qrd.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-qrd-skug.dtb
+ dtb-$(CONFIG_ARCH_MSM8226) += msm8926-v2-qrd-skug-pvt.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-v1-qrd-skuf.dtb
dtb-$(CONFIG_ARCH_MSM8226) += msm8226-v2-qrd-skuf.dtb
dtb-$(CONFIG_ARCH_MSM8226) += apq8026-v1-xpm.dtb
diff --git a/arch/arm/mach-msm/board-8226-gpiomux.c b/arch/arm/mach-msm/board-8226-gpiomux.c
index 9767746..5882ebc 100644
--- a/arch/arm/mach-msm/board-8226-gpiomux.c
+++ b/arch/arm/mach-msm/board-8226-gpiomux.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -216,13 +216,6 @@
},
},
{
- .gpio = 2, /* BLSP1 QUP1 SPI_CS1 */
- .settings = {
- [GPIOMUX_ACTIVE] = &gpio_spi_cs_act_config,
- [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config,
- },
- },
- {
.gpio = 3, /* BLSP1 QUP1 SPI_CLK */
.settings = {
[GPIOMUX_ACTIVE] = &gpio_spi_act_config,
@@ -279,6 +272,16 @@
},
};
+static struct msm_gpiomux_config msm_blsp_spi_cs_config[] __initdata = {
+ {
+ .gpio = 2, /* BLSP1 QUP1 SPI_CS1 */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &gpio_spi_cs_act_config,
+ [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config,
+ },
+ },
+};
+
static struct msm_gpiomux_config msm_synaptics_configs[] __initdata = {
{
.gpio = 16,
@@ -827,9 +830,13 @@
if (of_board_is_skuf())
msm_gpiomux_install(msm_skuf_blsp_configs,
ARRAY_SIZE(msm_skuf_blsp_configs));
- else
+ else {
msm_gpiomux_install(msm_blsp_configs,
ARRAY_SIZE(msm_blsp_configs));
+ if (machine_is_msm8226())
+ msm_gpiomux_install(msm_blsp_spi_cs_config,
+ ARRAY_SIZE(msm_blsp_spi_cs_config));
+ }
msm_gpiomux_install(wcnss_5wire_interface,
ARRAY_SIZE(wcnss_5wire_interface));
diff --git a/arch/arm/mach-msm/board-8226.c b/arch/arm/mach-msm/board-8226.c
index 5244918..3539ad3 100644
--- a/arch/arm/mach-msm/board-8226.c
+++ b/arch/arm/mach-msm/board-8226.c
@@ -15,6 +15,7 @@
#include <linux/errno.h>
#include <linux/platform_device.h>
#include <linux/io.h>
+#include <linux/i2c/i2c-qup.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
@@ -24,6 +25,9 @@
#include <linux/of_fdt.h>
#include <linux/of_irq.h>
#include <linux/memory.h>
+#include <linux/regulator/cpr-regulator.h>
+#include <linux/regulator/fan53555.h>
+#include <linux/regulator/onsemi-ncp6335d.h>
#include <linux/regulator/qpnp-regulator.h>
#include <linux/msm_tsens.h>
#include <asm/mach/map.h>
@@ -31,6 +35,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/board.h>
+#include <mach/msm_bus.h>
#include <mach/gpiomux.h>
#include <mach/msm_iomap.h>
#include <mach/restart.h>
@@ -52,6 +57,7 @@
#include "spm.h"
#include "pm.h"
#include "modem_notifier.h"
+#include "spm-regulator.h"
static struct memtype_reserve msm8226_reserve_table[] __initdata = {
[MEMTYPE_SMI] = {
@@ -121,10 +127,16 @@
msm_pm_sleep_status_init();
rpm_regulator_smd_driver_init();
qpnp_regulator_init();
+ spm_regulator_init();
if (of_board_is_rumi())
msm_clock_init(&msm8226_rumi_clock_init_data);
else
msm_clock_init(&msm8226_clock_init_data);
+ msm_bus_fabric_init_driver();
+ qup_i2c_init_driver();
+ ncp6335d_regulator_init();
+ fan53555_regulator_init();
+ cpr_regulator_init();
tsens_tm_init_driver();
msm_thermal_device_init();
}
diff --git a/arch/arm/mach-msm/board-8610-gpiomux.c b/arch/arm/mach-msm/board-8610-gpiomux.c
index affe6bd..2e12fc2 100644
--- a/arch/arm/mach-msm/board-8610-gpiomux.c
+++ b/arch/arm/mach-msm/board-8610-gpiomux.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -451,6 +451,12 @@
},
};
+static struct gpiomux_setting accel_interrupt_config = {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_6MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+
static struct msm_gpiomux_config msm_non_qrd_configs[] __initdata = {
{
.gpio = 8, /* CAM1_STANDBY_N */
@@ -459,6 +465,13 @@
[GPIOMUX_SUSPENDED] = &gpio_suspend_config[1],
},
},
+ {
+ .gpio = 81, /*ACCEL_INT1 */
+ .settings = {
+ [GPIOMUX_ACTIVE] = &accel_interrupt_config,
+ [GPIOMUX_SUSPENDED] = &accel_interrupt_config,
+ },
+ },
};
static struct msm_gpiomux_config msm_sensor_configs[] __initdata = {
@@ -602,6 +615,13 @@
static struct msm_gpiomux_config msm_interrupt_configs[] __initdata = {
{
+ .gpio = 75, /* NFC_CLK_REQ_IRQ*/
+ .settings = {
+ [GPIOMUX_ACTIVE] = &interrupt_gpio_active,
+ [GPIOMUX_SUSPENDED] = &interrupt_gpio_suspend_pullup,
+ },
+ },
+ {
.gpio = 77, /* NFC_IRQ */
.settings = {
[GPIOMUX_ACTIVE] = &interrupt_gpio_active,
diff --git a/arch/arm/mach-msm/board-8974-gpiomux.c b/arch/arm/mach-msm/board-8974-gpiomux.c
index 8ab916c..cec1a8f 100755
--- a/arch/arm/mach-msm/board-8974-gpiomux.c
+++ b/arch/arm/mach-msm/board-8974-gpiomux.c
@@ -22,27 +22,28 @@
static struct gpiomux_setting ap2mdm_cfg = {
.func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_8MA,
+ .drv = GPIOMUX_DRV_2MA,
.pull = GPIOMUX_PULL_NONE,
+ .dir = GPIOMUX_OUT_LOW,
};
static struct gpiomux_setting mdm2ap_status_cfg = {
.func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_DOWN,
- .dir = GPIOMUX_IN,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ .dir = GPIOMUX_OUT_LOW,
};
static struct gpiomux_setting mdm2ap_errfatal_cfg = {
.func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_DOWN,
- .dir = GPIOMUX_IN,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ .dir = GPIOMUX_OUT_LOW,
};
static struct gpiomux_setting mdm2ap_pblrdy = {
.func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_8MA,
+ .drv = GPIOMUX_DRV_2MA,
.pull = GPIOMUX_PULL_NONE,
.dir = GPIOMUX_IN,
};
@@ -50,14 +51,16 @@
static struct gpiomux_setting ap2mdm_soft_reset_cfg = {
.func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_8MA,
+ .drv = GPIOMUX_DRV_2MA,
.pull = GPIOMUX_PULL_NONE,
+ .dir = GPIOMUX_OUT_LOW,
};
static struct gpiomux_setting ap2mdm_wakeup = {
.func = GPIOMUX_FUNC_GPIO,
- .drv = GPIOMUX_DRV_8MA,
- .pull = GPIOMUX_PULL_DOWN,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ .dir = GPIOMUX_OUT_LOW,
};
static struct msm_gpiomux_config mdm_configs[] __initdata = {
diff --git a/arch/arm/mach-msm/clock-8226.c b/arch/arm/mach-msm/clock-8226.c
index 1336ec3..798a33d 100644
--- a/arch/arm/mach-msm/clock-8226.c
+++ b/arch/arm/mach-msm/clock-8226.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2846,6 +2846,8 @@
F_APCS_PLL(1401600000, 73, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL(1497600000, 78, 0x0, 0x1, 0x0, 0x0, 0x0),
F_APCS_PLL(1593600000, 83, 0x0, 0x1, 0x0, 0x0, 0x0),
+ F_APCS_PLL(1689600000, 88, 0x0, 0x1, 0x0, 0x0, 0x0),
+ F_APCS_PLL(1785600000, 93, 0x0, 0x1, 0x0, 0x0, 0x0),
PLL_F_END
};
@@ -3426,6 +3428,10 @@
CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "6a.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "6c.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "20.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "1.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "1.qcom,camera"),
/* eeprom clocks */
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6c.qcom,eeprom"),
diff --git a/arch/arm/mach-msm/clock-8610.c b/arch/arm/mach-msm/clock-8610.c
index 672c512..8bd3bb5 100644
--- a/arch/arm/mach-msm/clock-8610.c
+++ b/arch/arm/mach-msm/clock-8610.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -3029,15 +3029,19 @@
/* MM sensor clocks */
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-006f"),
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-0034"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-0001"),
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-007d"),
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-006d"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "6-0002"),
CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "6-0078"),
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-0020"),
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6-006a"),
CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-006f"),
CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-0034"),
+ CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-0001"),
CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-007d"),
CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-006d"),
+ CLK_LOOKUP("cam_clk", mclk1_clk.c, "6-0002"),
CLK_LOOKUP("cam_clk", mclk1_clk.c, "6-0078"),
CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-0020"),
CLK_LOOKUP("cam_clk", mclk0_clk.c, "6-006a"),
@@ -3150,6 +3154,12 @@
CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "scm"),
CLK_LOOKUP("core_clk_src", ce1_clk_src.c, "scm"),
+ /* GUD Clocks */
+ CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "mcd"),
+ CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "mcd"),
+ CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "mcd"),
+ CLK_LOOKUP("core_clk_src", ce1_clk_src.c, "mcd"),
+
/* Add QCEDEV clocks */
CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "fd400000.qcom,qcedev"),
CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "fd400000.qcom,qcedev"),
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index 5ef31c3..acfbfc7 100755
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1546,7 +1546,7 @@
},
};
-/* This table is for MSM8974Pro AC SDCC1 */
+/* For MSM8974Pro SDCC1 */
static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk_ac[] = {
F( 144000, cxo, 16, 3, 25),
F( 400000, cxo, 12, 1, 4),
@@ -1559,11 +1559,7 @@
F_END
};
-/*
- * This table is for:
- * 1) SDCC[1-4] on MSM8974Pro AB, MSM8974 v2 and before
- * 2) SDCC[2-4] on MSM8974Pro AC
- */
+/* For SDCC1 on MSM8974 v2 and SDCC[2-4] on all MSM8974 */
static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] = {
F( 144000, cxo, 16, 3, 25),
F( 400000, cxo, 12, 1, 4),
@@ -4891,6 +4887,12 @@
CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "20.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk2_clk.c, "6c.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "90.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "1.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk2_clk_src.c, "2.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "1.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk2_clk.c, "2.qcom,camera"),
};
static struct clk_lookup msm_clocks_8974_only[] __initdata = {
@@ -4902,6 +4904,12 @@
CLK_LOOKUP("cam_clk", camss_gp0_clk.c, "20.qcom,camera"),
CLK_LOOKUP("cam_clk", gcc_gp1_clk.c, "6c.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_gp1_clk.c, "90.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mmss_gp0_clk_src.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", gp1_clk_src.c, "2.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mmss_gp1_clk_src.c, "1.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_gp0_clk.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_clk", gcc_gp1_clk.c, "2.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_gp1_clk.c, "1.qcom,camera"),
};
static struct clk_lookup msm_clocks_8974_common[] __initdata = {
@@ -5066,6 +5074,7 @@
CLK_LOOKUP("core_clk", mdss_edpaux_clk.c, "fd923400.qcom,mdss_edp"),
CLK_LOOKUP("pixel_clk", mdss_edppixel_clk.c, "fd923400.qcom,mdss_edp"),
CLK_LOOKUP("link_clk", mdss_edplink_clk.c, "fd923400.qcom,mdss_edp"),
+ CLK_LOOKUP("mdp_core_clk", mdss_mdp_clk.c, "fd923400.qcom,mdss_edp"),
CLK_LOOKUP("byte_clk", mdss_byte0_clk.c, "fd922800.qcom,mdss_dsi"),
CLK_LOOKUP("byte_clk", mdss_byte1_clk.c, "fd922e00.qcom,mdss_dsi"),
CLK_LOOKUP("core_clk", mdss_esc0_clk.c, "fd922800.qcom,mdss_dsi"),
@@ -5777,11 +5786,9 @@
ce2_clk_src.c.fmax[VDD_DIG_NOMINAL] = 150000000;
ce2_clk_src.freq_tbl = ftbl_gcc_ce2_pro_clk;
- if (cpu_is_msm8974pro_ac()) {
- sdcc1_apps_clk_src.c.fmax[VDD_DIG_LOW] = 200000000;
- sdcc1_apps_clk_src.c.fmax[VDD_DIG_NOMINAL] = 400000000;
- sdcc1_apps_clk_src.freq_tbl = ftbl_gcc_sdcc1_apps_clk_ac;
- }
+ sdcc1_apps_clk_src.c.fmax[VDD_DIG_LOW] = 200000000;
+ sdcc1_apps_clk_src.c.fmax[VDD_DIG_NOMINAL] = 400000000;
+ sdcc1_apps_clk_src.freq_tbl = ftbl_gcc_sdcc1_apps_clk_ac;
vfe0_clk_src.c.fmax[VDD_DIG_LOW] = 150000000;
vfe0_clk_src.c.fmax[VDD_DIG_NOMINAL] = 320000000;
diff --git a/arch/arm/mach-msm/clock-a7.c b/arch/arm/mach-msm/clock-a7.c
index d09e4b6..a610a23 100644
--- a/arch/arm/mach-msm/clock-a7.c
+++ b/arch/arm/mach-msm/clock-a7.c
@@ -97,9 +97,7 @@
static int cortex_enable(struct mux_div_clk *md)
{
- u32 src_sel = parent_to_src_sel(md->parents, md->num_parents,
- md->c.parent);
- return cortex_set_config(md, src_sel, md->data.div);
+ return cortex_set_config(md, md->src_sel, md->data.div);
}
static void cortex_disable(struct mux_div_clk *md)
diff --git a/arch/arm/mach-msm/clock-mdss-8974.c b/arch/arm/mach-msm/clock-mdss-8974.c
index 3ea719f..1fc7f1d 100644
--- a/arch/arm/mach-msm/clock-mdss-8974.c
+++ b/arch/arm/mach-msm/clock-mdss-8974.c
@@ -1077,9 +1077,9 @@
* reset bit off and back on.
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_TEST_CFG, 0x01);
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_TEST_CFG, 0x00);
- udelay(1000);
+ udelay(1);
}
static int dsi_pll_enable_seq_m(void)
@@ -1257,22 +1257,22 @@
* Add necessary delays recommeded by hardware.
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x01);
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x05);
- udelay(1000);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x07);
- udelay(1000);
+ udelay(500);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x0f);
- udelay(1000);
+ udelay(500);
- for (i = 0; i < 3; i++) {
+ for (i = 0; i < 2; i++) {
+ udelay(100);
/* DSI Uniphy lock detect setting */
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
0x0c);
udelay(100);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_LKDET_CFG2,
0x0d);
- udelay(500);
/* poll for PLL ready status */
max_reads = 5;
timeout_us = 100;
@@ -1295,17 +1295,17 @@
* Add necessary delays recommeded by hardware.
*/
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x1);
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x5);
- udelay(1000);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x7);
- udelay(1000);
+ udelay(250);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x5);
- udelay(1000);
+ udelay(200);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0x7);
- udelay(1000);
+ udelay(500);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_GLB_CFG, 0xf);
- udelay(2000);
+ udelay(500);
}
@@ -1480,7 +1480,7 @@
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_SDM_CFG4, 0x00);
/* Add hardware recommended delay for correct PLL configuration */
- udelay(1000);
+ udelay(1);
DSS_REG_W(mdss_dsi_base, DSI_0_PHY_PLL_UNIPHY_PLL_REFCLK_CFG,
(u32)refclk_cfg);
@@ -2010,7 +2010,6 @@
if (status)
return 1;
- pr_err("%s: PLL NOT ready\n", __func__);
return 0;
}
diff --git a/arch/arm/mach-msm/clock-samarium.c b/arch/arm/mach-msm/clock-samarium.c
new file mode 100644
index 0000000..4c5c0c7
--- /dev/null
+++ b/arch/arm/mach-msm/clock-samarium.c
@@ -0,0 +1,3919 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/ctype.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/iopoll.h>
+#include <linux/regulator/consumer.h>
+
+#include <mach/rpm-regulator-smd.h>
+#include <mach/rpm-smd.h>
+#include <mach/clock-generic.h>
+
+#include "clock-local2.h"
+#include "clock-pll.h"
+#include "clock-rpm.h"
+#include "clock-voter.h"
+#include "clock.h"
+#include "clock-krait.h"
+#include "clock-mdss-8974.h"
+
+enum {
+ GCC_BASE,
+ MMSS_BASE,
+ LPASS_BASE,
+ APCS_BASE,
+ N_BASES,
+};
+
+static void __iomem *virt_bases[N_BASES];
+
+#define GCC_REG_BASE(x) (void __iomem *)(virt_bases[GCC_BASE] + (x))
+#define MMSS_REG_BASE(x) (void __iomem *)(virt_bases[MMSS_BASE] + (x))
+#define LPASS_REG_BASE(x) (void __iomem *)(virt_bases[LPASS_BASE] + (x))
+#define APCS_REG_BASE(x) (void __iomem *)(virt_bases[APCS_BASE] + (x))
+
+#define xo_source_val 0
+#define gpll0_source_val 1
+#define gpll4_source_val 5
+#define xo_mm_source_val 0
+#define mmpll0_mm_source_val 1
+#define mmpll1_mm_source_val 2
+#define mmpll3_mm_source_val 3
+#define mmpll4_mm_source_val 3
+#define gpll0_mm_source_val 5
+#define dsipll0_pixel_mm_source_val 1
+#define dsipll0_byte_mm_source_val 1
+
+#define FIXDIV(div) (div ? (2 * (div) - 1) : (0))
+
+#define F(f, s, div, m, n) \
+ { \
+ .freq_hz = (f), \
+ .src_clk = &s.c, \
+ .m_val = (m), \
+ .n_val = ~((n)-(m)) * !!(n), \
+ .d_val = ~(n),\
+ .div_src_val = BVAL(4, 0, (int)(2*(div) - 1)) \
+ | BVAL(10, 8, s##_source_val), \
+ }
+
+#define F_MM(f, s, div, m, n) \
+ { \
+ .freq_hz = (f), \
+ .src_clk = &s.c, \
+ .m_val = (m), \
+ .n_val = ~((n)-(m)) * !!(n), \
+ .d_val = ~(n),\
+ .div_src_val = BVAL(4, 0, (int)(2*(div) - 1)) \
+ | BVAL(10, 8, s##_mm_source_val), \
+ }
+
+#define VDD_DIG_FMAX_MAP1(l1, f1) \
+ .vdd_class = &vdd_dig, \
+ .fmax = (unsigned long[VDD_DIG_NUM]) { \
+ [VDD_DIG_##l1] = (f1), \
+ }, \
+ .num_fmax = VDD_DIG_NUM
+#define VDD_DIG_FMAX_MAP2(l1, f1, l2, f2) \
+ .vdd_class = &vdd_dig, \
+ .fmax = (unsigned long[VDD_DIG_NUM]) { \
+ [VDD_DIG_##l1] = (f1), \
+ [VDD_DIG_##l2] = (f2), \
+ }, \
+ .num_fmax = VDD_DIG_NUM
+#define VDD_DIG_FMAX_MAP3(l1, f1, l2, f2, l3, f3) \
+ .vdd_class = &vdd_dig, \
+ .fmax = (unsigned long[VDD_DIG_NUM]) { \
+ [VDD_DIG_##l1] = (f1), \
+ [VDD_DIG_##l2] = (f2), \
+ [VDD_DIG_##l3] = (f3), \
+ }, \
+ .num_fmax = VDD_DIG_NUM
+
+enum vdd_dig_levels {
+ VDD_DIG_NONE,
+ VDD_DIG_LOW,
+ VDD_DIG_NOMINAL,
+ VDD_DIG_HIGH,
+ VDD_DIG_NUM
+};
+
+static int vdd_corner[] = {
+ RPM_REGULATOR_CORNER_NONE, /* VDD_DIG_NONE */
+ RPM_REGULATOR_CORNER_SVS_SOC, /* VDD_DIG_LOW */
+ RPM_REGULATOR_CORNER_NORMAL, /* VDD_DIG_NOMINAL */
+ RPM_REGULATOR_CORNER_SUPER_TURBO, /* VDD_DIG_HIGH */
+};
+
+static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL);
+
+#define RPM_MISC_CLK_TYPE 0x306b6c63
+#define RPM_BUS_CLK_TYPE 0x316b6c63
+#define RPM_MEM_CLK_TYPE 0x326b6c63
+
+#define CXO_ID 0x0
+#define QDSS_ID 0x1
+#define PNOC_ID 0x0
+#define SNOC_ID 0x1
+#define CNOC_ID 0x2
+#define BIMC_ID 0x0
+#define OCMEM_ID 0x2
+#define OXILI_ID 0x1
+#define MMSSNOC_AHB_ID 0x3
+
+#define BB_CLK1_ID 1
+#define BB_CLK2_ID 2
+#define RF_CLK1_ID 4
+#define RF_CLK2_ID 5
+#define RF_CLK3_ID 6
+#define DIFF_CLK1_ID 7
+#define DIV_CLK1_ID 11
+#define DIV_CLK2_ID 12
+#define DIV_CLK3_ID 13
+
+#define GPLL0_STATUS (0x001C)
+#define GPLL4_STATUS (0x1DDC)
+#define MSS_CFG_AHB_CBCR (0x0280)
+#define MSS_Q6_BIMC_AXI_CBCR (0x0284)
+#define USB_HS_BCR (0x0480)
+#define USB_HS_SYSTEM_CBCR (0x0484)
+#define USB_HS_AHB_CBCR (0x0488)
+#define USB_HS_SYSTEM_CMD_RCGR (0x0490)
+#define USB2A_PHY_SLEEP_CBCR (0x04AC)
+#define SDCC1_APPS_CMD_RCGR (0x04D0)
+#define SDCC1_APPS_CBCR (0x04C4)
+#define SDCC1_AHB_CBCR (0x04C8)
+#define SDCC1_CDCCAL_SLEEP_CBCR (0x04E4)
+#define SDCC1_CDCCAL_FF_CBCR (0x04E8)
+#define SDCC2_APPS_CMD_RCGR (0x0510)
+#define SDCC2_APPS_CBCR (0x0504)
+#define SDCC2_AHB_CBCR (0x0508)
+#define SDCC3_APPS_CMD_RCGR (0x0550)
+#define SDCC3_APPS_CBCR (0x0544)
+#define SDCC3_AHB_CBCR (0x0548)
+#define SDCC4_APPS_CMD_RCGR (0x0590)
+#define SDCC4_APPS_CBCR (0x0584)
+#define SDCC4_AHB_CBCR (0x0588)
+#define BLSP1_AHB_CBCR (0x05C4)
+#define BLSP1_QUP1_SPI_APPS_CBCR (0x0644)
+#define BLSP1_QUP1_I2C_APPS_CBCR (0x0648)
+#define BLSP1_QUP1_I2C_APPS_CMD_RCGR (0x0660)
+#define BLSP1_QUP2_I2C_APPS_CMD_RCGR (0x06E0)
+#define BLSP1_QUP3_I2C_APPS_CMD_RCGR (0x0760)
+#define BLSP1_QUP4_I2C_APPS_CMD_RCGR (0x07E0)
+#define BLSP2_QUP1_I2C_APPS_CMD_RCGR (0x09A0)
+#define BLSP2_QUP2_I2C_APPS_CMD_RCGR (0x0A20)
+#define BLSP2_QUP3_I2C_APPS_CMD_RCGR (0x0AA0)
+#define BLSP2_QUP4_I2C_APPS_CMD_RCGR (0x0B20)
+#define BLSP1_QUP1_SPI_APPS_CMD_RCGR (0x064C)
+#define BLSP1_UART1_APPS_CBCR (0x0684)
+#define BLSP1_UART1_APPS_CMD_RCGR (0x068C)
+#define BLSP1_QUP2_SPI_APPS_CBCR (0x06C4)
+#define BLSP1_QUP2_I2C_APPS_CBCR (0x06C8)
+#define BLSP1_QUP2_SPI_APPS_CMD_RCGR (0x06CC)
+#define BLSP1_UART2_APPS_CBCR (0x0704)
+#define BLSP1_UART2_APPS_CMD_RCGR (0x070C)
+#define BLSP1_QUP3_SPI_APPS_CBCR (0x0744)
+#define BLSP1_QUP3_I2C_APPS_CBCR (0x0748)
+#define BLSP1_QUP3_SPI_APPS_CMD_RCGR (0x074C)
+#define BLSP1_UART3_APPS_CBCR (0x0784)
+#define BLSP1_UART3_APPS_CMD_RCGR (0x078C)
+#define BLSP1_QUP4_SPI_APPS_CBCR (0x07C4)
+#define BLSP1_QUP4_I2C_APPS_CBCR (0x07C8)
+#define BLSP1_QUP4_SPI_APPS_CMD_RCGR (0x07CC)
+#define BLSP1_UART4_APPS_CBCR (0x0804)
+#define BLSP1_UART4_APPS_CMD_RCGR (0x080C)
+#define BLSP2_AHB_CBCR (0x0944)
+#define BLSP2_QUP1_SPI_APPS_CBCR (0x0984)
+#define BLSP2_QUP1_I2C_APPS_CBCR (0x0988)
+#define BLSP2_QUP1_SPI_APPS_CMD_RCGR (0x098C)
+#define BLSP2_UART1_APPS_CBCR (0x09C4)
+#define BLSP2_UART1_APPS_CMD_RCGR (0x09CC)
+#define BLSP2_QUP2_SPI_APPS_CBCR (0x0A04)
+#define BLSP2_QUP2_I2C_APPS_CBCR (0x0A08)
+#define BLSP2_QUP2_SPI_APPS_CMD_RCGR (0x0A0C)
+#define BLSP2_UART2_APPS_CBCR (0x0A44)
+#define BLSP2_UART2_APPS_CMD_RCGR (0x0A4C)
+#define BLSP2_QUP3_SPI_APPS_CBCR (0x0A84)
+#define BLSP2_QUP3_I2C_APPS_CBCR (0x0A88)
+#define BLSP2_QUP3_SPI_APPS_CMD_RCGR (0x0A8C)
+#define BLSP2_UART3_APPS_CBCR (0x0AC4)
+#define BLSP2_UART3_APPS_CMD_RCGR (0x0ACC)
+#define BLSP2_QUP4_SPI_APPS_CBCR (0x0B04)
+#define BLSP2_QUP4_I2C_APPS_CBCR (0x0B08)
+#define BLSP2_QUP4_SPI_APPS_CMD_RCGR (0x0B0C)
+#define BLSP2_UART4_APPS_CBCR (0x0B44)
+#define BLSP2_UART4_APPS_CMD_RCGR (0x0B4C)
+#define PDM_AHB_CBCR (0x0CC4)
+#define PDM2_CBCR (0x0CCC)
+#define PDM2_CMD_RCGR (0x0CD0)
+#define PRNG_AHB_CBCR (0x0D04)
+#define BAM_DMA_AHB_CBCR (0x0D44)
+#define TSIF_AHB_CBCR (0x0D84)
+#define TSIF_REF_CBCR (0x0D88)
+#define TSIF_REF_CMD_RCGR (0x0D90)
+#define BOOT_ROM_AHB_CBCR (0x0E04)
+#define RPM_MISC (0x0F24)
+#define CE1_CMD_RCGR (0x1050)
+#define CE1_CBCR (0x1044)
+#define CE1_AXI_CBCR (0x1048)
+#define CE1_AHB_CBCR (0x104C)
+#define GCC_XO_DIV4_CBCR (0x10C8)
+#define LPASS_Q6_AXI_CBCR (0x11C0)
+#define LPASS_SYS_NOC_MPORT_CBCR (0x11C4)
+#define LPASS_SYS_NOC_SWAY_CBCR (0x11C8)
+#define APCS_GPLL_ENA_VOTE (0x1480)
+#define APCS_CLOCK_BRANCH_ENA_VOTE (0x1484)
+#define GCC_DEBUG_CLK_CTL (0x1880)
+#define CLOCK_FRQ_MEASURE_CTL (0x1884)
+#define CLOCK_FRQ_MEASURE_STATUS (0x1888)
+#define PLLTEST_PAD_CFG (0x188C)
+#define GP1_CBCR (0x1900)
+#define GP1_CMD_RCGR (0x1904)
+#define GLB_CLK_DIAG (0x001C)
+#define SLEEP_CBCR (0x0038)
+#define L2_CBCR (0x004C)
+#define MMPLL0_MODE (0x0000)
+#define MMPLL0_L_VAL (0x0004)
+#define MMPLL0_M_VAL (0x0008)
+#define MMPLL0_N_VAL (0x000C)
+#define MMPLL0_USER_CTL (0x0010)
+#define MMPLL0_STATUS (0x001C)
+#define MMPLL1_MODE (0x0040)
+#define MMPLL1_L_VAL (0x0044)
+#define MMPLL1_M_VAL (0x0048)
+#define MMPLL1_N_VAL (0x004C)
+#define MMPLL1_USER_CTL (0x0050)
+#define MMPLL1_STATUS (0x005C)
+#define MMPLL3_MODE (0x0080)
+#define MMPLL3_L_VAL (0x0084)
+#define MMPLL3_M_VAL (0x0088)
+#define MMPLL3_N_VAL (0x008C)
+#define MMPLL3_USER_CTL (0x0090)
+#define MMPLL3_STATUS (0x009C)
+#define MMPLL4_MODE (0x00A0)
+#define MMPLL4_L_VAL (0x00A4)
+#define MMPLL4_M_VAL (0x00A8)
+#define MMPLL4_N_VAL (0x00AC)
+#define MMPLL4_USER_CTL (0x00B0)
+#define MMPLL4_STATUS (0x00BC)
+#define MMSS_PLL_VOTE_APCS (0x0100)
+#define VCODEC0_CMD_RCGR (0x1000)
+#define VENUS0_VCODEC0_CBCR (0x1028)
+#define VENUS0_AHB_CBCR (0x1030)
+#define VENUS0_AXI_CBCR (0x1034)
+#define VENUS0_OCMEMNOC_CBCR (0x1038)
+#define PCLK0_CMD_RCGR (0x2000)
+#define MDP_CMD_RCGR (0x2040)
+#define VSYNC_CMD_RCGR (0x2080)
+#define BYTE0_CMD_RCGR (0x2120)
+#define ESC0_CMD_RCGR (0x2160)
+#define MDSS_AHB_CBCR (0x2308)
+#define MDSS_AXI_CBCR (0x2310)
+#define MDSS_PCLK0_CBCR (0x2314)
+#define MDSS_MDP_CBCR (0x231C)
+#define MDSS_MDP_LUT_CBCR (0x2320)
+#define MDSS_VSYNC_CBCR (0x2328)
+#define MDSS_BYTE0_CBCR (0x233C)
+#define MDSS_ESC0_CBCR (0x2344)
+#define CSI0PHYTIMER_CMD_RCGR (0x3000)
+#define CAMSS_PHY0_CSI0PHYTIMER_CBCR (0x3024)
+#define CSI1PHYTIMER_CMD_RCGR (0x3030)
+#define CAMSS_PHY1_CSI1PHYTIMER_CBCR (0x3054)
+#define CSI0_CMD_RCGR (0x3090)
+#define CAMSS_CSI0_CBCR (0x30B4)
+#define CAMSS_CSI0_AHB_CBCR (0x30BC)
+#define CAMSS_CSI0PHY_CBCR (0x30C4)
+#define CAMSS_CSI0RDI_CBCR (0x30D4)
+#define CAMSS_CSI0PIX_CBCR (0x30E4)
+#define CSI1_CMD_RCGR (0x3100)
+#define CAMSS_CSI1_CBCR (0x3124)
+#define CAMSS_CSI1_AHB_CBCR (0x3128)
+#define CAMSS_CSI1PHY_CBCR (0x3134)
+#define CAMSS_CSI1RDI_CBCR (0x3144)
+#define CAMSS_CSI1PIX_CBCR (0x3154)
+#define CSI2_CMD_RCGR (0x3160)
+#define CAMSS_CSI2_CBCR (0x3184)
+#define CAMSS_CSI2_AHB_CBCR (0x3188)
+#define CAMSS_CSI2PHY_CBCR (0x3194)
+#define CAMSS_CSI2RDI_CBCR (0x31A4)
+#define CAMSS_CSI2PIX_CBCR (0x31B4)
+#define CAMSS_ISPIF_AHB_CBCR (0x3224)
+#define CCI_CMD_RCGR (0x3300)
+#define CAMSS_CCI_CCI_CBCR (0x3344)
+#define CAMSS_CCI_CCI_AHB_CBCR (0x3348)
+#define MCLK0_CMD_RCGR (0x3360)
+#define CAMSS_MCLK0_CBCR (0x3384)
+#define MCLK1_CMD_RCGR (0x3390)
+#define CAMSS_MCLK1_CBCR (0x33B4)
+#define MCLK2_CMD_RCGR (0x33C0)
+#define CAMSS_MCLK2_CBCR (0x33E4)
+#define MMSS_GP0_CMD_RCGR (0x3420)
+#define CAMSS_GP0_CBCR (0x3444)
+#define MMSS_GP1_CMD_RCGR (0x3450)
+#define CAMSS_GP1_CBCR (0x3474)
+#define CAMSS_TOP_AHB_CBCR (0x3484)
+#define CAMSS_AHB_CBCR (0x348C)
+#define CAMSS_MICRO_BCR (0x3490)
+#define CAMSS_MICRO_AHB_CBCR (0x3494)
+#define JPEG0_CMD_RCGR (0x3500)
+#define CAMSS_JPEG_JPEG0_CBCR (0x35A8)
+#define CAMSS_JPEG_JPEG_AHB_CBCR (0x35B4)
+#define CAMSS_JPEG_JPEG_AXI_CBCR (0x35B8)
+#define VFE0_CMD_RCGR (0x3600)
+#define VFE1_CMD_RCGR (0x3620)
+#define CPP_CMD_RCGR (0x3640)
+#define CAMSS_VFE_VFE0_CBCR (0x36A8)
+#define CAMSS_VFE_VFE1_CBCR (0x36AC)
+#define CAMSS_VFE_CPP_CBCR (0x36B0)
+#define CAMSS_VFE_CPP_AHB_CBCR (0x36B4)
+#define CAMSS_VFE_VFE_AHB_CBCR (0x36B8)
+#define CAMSS_VFE_VFE_AXI_CBCR (0x36BC)
+#define CAMSS_CSI_VFE0_CBCR (0x3704)
+#define CAMSS_CSI_VFE1_CBCR (0x3714)
+#define OXILI_GFX3D_CBCR (0x4028)
+#define OXILICX_AHB_CBCR (0x403C)
+#define OCMEMCX_OCMEMNOC_CBCR (0x4058)
+#define MMSS_MISC_AHB_CBCR (0x502C)
+#define AXI_CMD_RCGR (0x5040)
+#define MMSS_S0_AXI_CBCR (0x5064)
+#define MMSS_MMSSNOC_AXI_CBCR (0x506C)
+#define OCMEMNOC_CMD_RCGR (0x5090)
+#define MMSS_DEBUG_CLK_CTL (0x0900)
+#define LPASS_DBG_CLK (0x32000)
+
+DEFINE_CLK_RPM_SMD_BRANCH(xo, xo_a_clk, RPM_MISC_CLK_TYPE, CXO_ID, 19200000);
+DEFINE_CLK_RPM_SMD(cnoc, cnoc_a_clk, RPM_BUS_CLK_TYPE, CNOC_ID, NULL);
+DEFINE_CLK_RPM_SMD(pnoc, pnoc_a_clk, RPM_BUS_CLK_TYPE, PNOC_ID, NULL);
+DEFINE_CLK_RPM_SMD(snoc, snoc_a_clk, RPM_BUS_CLK_TYPE, SNOC_ID, NULL);
+DEFINE_CLK_RPM_SMD(bimc, bimc_a_clk, RPM_MEM_CLK_TYPE, BIMC_ID, NULL);
+DEFINE_CLK_RPM_SMD_QDSS(qdss, qdss_a_clk, RPM_MISC_CLK_TYPE, QDSS_ID);
+DEFINE_CLK_RPM_SMD(gfx3d, gfx3d_a_clk, RPM_MEM_CLK_TYPE, OXILI_ID, NULL);
+DEFINE_CLK_RPM_SMD(mmssnoc_ahb, mmssnoc_ahb_a_clk, RPM_BUS_CLK_TYPE,
+ MMSSNOC_AHB_ID, NULL);
+DEFINE_CLK_RPM_SMD(ocmemgx, ocmemgx_a_clk, RPM_MEM_CLK_TYPE, OCMEM_ID, NULL);
+
+DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk1, bb_clk1_a, BB_CLK1_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk2, bb_clk2_a, BB_CLK2_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk1, rf_clk1_a, RF_CLK1_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk2, rf_clk2_a, RF_CLK2_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk3, rf_clk3_a, RF_CLK3_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(diff_clk1, diff_clk1_a, DIFF_CLK1_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(div_clk1, div_clk1_a, DIV_CLK1_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(div_clk2, div_clk2_a, DIV_CLK2_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER(div_clk3, div_clk3_a, DIV_CLK3_ID);
+
+DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk1_pin, bb_clk1_a_pin, BB_CLK1_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk2_pin, bb_clk2_a_pin, BB_CLK2_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk1_pin, rf_clk1_a_pin, RF_CLK1_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk2_pin, rf_clk2_a_pin, RF_CLK2_ID);
+DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk3_pin, rf_clk3_a_pin, RF_CLK3_ID);
+
+static DEFINE_CLK_VOTER(pnoc_msmbus_clk, &pnoc.c, LONG_MAX);
+static DEFINE_CLK_VOTER(snoc_msmbus_clk, &snoc.c, LONG_MAX);
+static DEFINE_CLK_VOTER(cnoc_msmbus_clk, &cnoc.c, LONG_MAX);
+static DEFINE_CLK_VOTER(pnoc_msmbus_a_clk, &pnoc_a_clk.c, LONG_MAX);
+static DEFINE_CLK_VOTER(snoc_msmbus_a_clk, &snoc_a_clk.c, LONG_MAX);
+static DEFINE_CLK_VOTER(cnoc_msmbus_a_clk, &cnoc_a_clk.c, LONG_MAX);
+static DEFINE_CLK_VOTER(bimc_msmbus_clk, &bimc.c, LONG_MAX);
+static DEFINE_CLK_VOTER(bimc_msmbus_a_clk, &bimc_a_clk.c, LONG_MAX);
+static DEFINE_CLK_VOTER(oxili_gfx3d_clk_src, &gfx3d.c, LONG_MAX);
+static DEFINE_CLK_VOTER(ocmemgx_msmbus_clk, &ocmemgx.c, LONG_MAX);
+static DEFINE_CLK_VOTER(ocmemgx_msmbus_a_clk, &ocmemgx_a_clk.c, LONG_MAX);
+static DEFINE_CLK_VOTER(ocmemgx_core_clk, &ocmemgx.c, LONG_MAX);
+
+static DEFINE_CLK_VOTER(pnoc_keepalive_a_clk, &pnoc_a_clk.c, LONG_MAX);
+static DEFINE_CLK_VOTER(pnoc_sps_clk, &pnoc.c, 0);
+
+static DEFINE_CLK_BRANCH_VOTER(xo_otg_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(xo_pil_lpass_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(xo_pil_mss_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(xo_wlan_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(xo_pil_pronto_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(xo_ehci_host_clk, &xo.c);
+static DEFINE_CLK_BRANCH_VOTER(xo_lpm_clk, &xo.c);
+
+/*
+ * RPM manages gcc_bimc_gpu_clk automatically. This clock is created
+ * for measurement only.
+ */
+DEFINE_CLK_DUMMY(bimc_gpu, 0);
+
+static unsigned int soft_vote_gpll0;
+
+static struct pll_vote_clk gpll0 = {
+ .en_reg = (void __iomem *)APCS_GPLL_ENA_VOTE,
+ .en_mask = BIT(0),
+ .status_reg = (void __iomem *)GPLL0_STATUS,
+ .status_mask = BIT(17),
+ .soft_vote = &soft_vote_gpll0,
+ .soft_vote_mask = PLL_SOFT_VOTE_PRIMARY,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .rate = 600000000,
+ .parent = &xo.c,
+ .dbg_name = "gpll0",
+ .ops = &clk_ops_pll_acpu_vote,
+ CLK_INIT(gpll0.c),
+ },
+};
+
+static struct pll_vote_clk gpll0_ao = {
+ .en_reg = (void __iomem *)APCS_GPLL_ENA_VOTE,
+ .en_mask = BIT(0),
+ .status_reg = (void __iomem *)GPLL0_STATUS,
+ .status_mask = BIT(17),
+ .soft_vote = &soft_vote_gpll0,
+ .soft_vote_mask = PLL_SOFT_VOTE_ACPU,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .rate = 600000000,
+ .parent = &xo_a_clk.c,
+ .dbg_name = "gpll0_ao",
+ .ops = &clk_ops_pll_acpu_vote,
+ CLK_INIT(gpll0_ao.c),
+ },
+};
+
+static struct pll_vote_clk gpll4 = {
+ .en_reg = (void __iomem *)APCS_GPLL_ENA_VOTE,
+ .en_mask = BIT(4),
+ .status_reg = (void __iomem *)GPLL4_STATUS,
+ .status_mask = BIT(17),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .rate = 768000000,
+ .parent = &xo.c,
+ .dbg_name = "gpll4",
+ .ops = &clk_ops_pll_vote,
+ CLK_INIT(gpll4.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk[] = {
+ F( 19200000, xo, 1, 0, 0),
+ F( 37500000, gpll0, 16, 0, 0),
+ F( 50000000, gpll0, 12, 0, 0),
+ F_END
+};
+
+static struct rcg_clk blsp1_qup1_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP1_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup1_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp1_qup1_i2c_apps_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk[] = {
+ F( 960000, xo, 10, 1, 2),
+ F( 4800000, xo, 4, 0, 0),
+ F( 9600000, xo, 2, 0, 0),
+ F( 15000000, gpll0, 10, 1, 4),
+ F( 19200000, xo, 1, 0, 0),
+ F( 25000000, gpll0, 12, 1, 2),
+ F( 50000000, gpll0, 12, 0, 0),
+ F_END
+};
+
+static struct rcg_clk blsp1_qup1_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP1_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup1_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp1_qup1_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_qup2_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP2_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup2_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp1_qup2_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_qup2_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP2_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup2_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp1_qup2_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_qup3_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP3_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup3_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp1_qup3_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_qup3_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP3_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup3_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp1_qup3_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_qup4_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP4_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup4_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp1_qup4_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_qup4_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_QUP4_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_qup4_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp1_qup4_spi_apps_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_blsp1_2_uart1_4_apps_clk[] = {
+ F( 3686400, gpll0, 1, 96, 15625),
+ F( 7372800, gpll0, 1, 192, 15625),
+ F( 14745600, gpll0, 1, 384, 15625),
+ F( 16000000, gpll0, 5, 2, 15),
+ F( 19200000, xo, 1, 0, 0),
+ F( 24000000, gpll0, 5, 1, 5),
+ F( 32000000, gpll0, 1, 4, 75),
+ F( 40000000, gpll0, 15, 0, 0),
+ F( 46400000, gpll0, 1, 29, 375),
+ F( 48000000, gpll0, 12.5, 0, 0),
+ F( 51200000, gpll0, 1, 32, 375),
+ F( 56000000, gpll0, 1, 7, 75),
+ F( 58982400, gpll0, 1, 1536, 15625),
+ F( 60000000, gpll0, 10, 0, 0),
+ F( 63160000, gpll0, 9.5, 0, 0),
+ F_END
+};
+
+static struct rcg_clk blsp1_uart1_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_UART1_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_uart1_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp1_uart1_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_uart2_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_UART2_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_uart2_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp1_uart2_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_uart3_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_UART3_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_uart3_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp1_uart3_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp1_uart4_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP1_UART4_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp1_uart4_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp1_uart4_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup1_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP1_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup1_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp2_qup1_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup1_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP1_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup1_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp2_qup1_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup2_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP2_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup2_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp2_qup2_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup2_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP2_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup2_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp2_qup2_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup3_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP3_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup3_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp2_qup3_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup3_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP3_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup3_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp2_qup3_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup4_i2c_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP4_I2C_APPS_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_6_i2c_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup4_i2c_apps_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 50000000),
+ CLK_INIT(blsp2_qup4_i2c_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_qup4_spi_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_QUP4_SPI_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_qup1_4_spi_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_qup4_spi_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000),
+ CLK_INIT(blsp2_qup4_spi_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_uart1_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_UART1_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_uart1_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp2_uart1_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_uart2_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_UART2_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_uart2_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp2_uart2_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_uart3_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_UART3_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_uart3_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp2_uart3_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk blsp2_uart4_apps_clk_src = {
+ .cmd_rcgr_reg = BLSP2_UART4_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_blsp1_2_uart1_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "blsp2_uart4_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 31580000, NOMINAL, 63160000),
+ CLK_INIT(blsp2_uart4_apps_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_ce1_clk[] = {
+ F( 75000000, gpll0, 8, 0, 0),
+ F( 171430000, gpll0, 3.5, 0, 0),
+ F_END
+};
+
+static struct rcg_clk ce1_clk_src = {
+ .cmd_rcgr_reg = CE1_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_ce1_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "ce1_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 75000000, NOMINAL, 171430000),
+ CLK_INIT(ce1_clk_src.c),
+ },
+};
+
+static DEFINE_CLK_VOTER(scm_ce1_clk_src, &ce1_clk_src.c, 171430000);
+
+static struct clk_freq_tbl ftbl_gcc_pdm2_clk[] = {
+ F( 60000000, gpll0, 10, 0, 0),
+ F_END
+};
+
+static struct rcg_clk pdm2_clk_src = {
+ .cmd_rcgr_reg = PDM2_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_pdm2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "pdm2_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 60000000),
+ CLK_INIT(pdm2_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk[] = {
+ F( 144000, xo, 16, 3, 25),
+ F( 400000, xo, 12, 1, 4),
+ F( 20000000, gpll0, 15, 1, 2),
+ F( 25000000, gpll0, 12, 1, 2),
+ F( 50000000, gpll0, 12, 0, 0),
+ F( 100000000, gpll0, 6, 0, 0),
+ F( 192000000, gpll4, 4, 0, 0),
+ F( 384000000, gpll4, 2, 0, 0),
+ F_END
+};
+
+static struct clk_freq_tbl ftbl_gcc_sdcc2_4_apps_clk[] = {
+ F( 144000, xo, 16, 3, 25),
+ F( 400000, xo, 12, 1, 4),
+ F( 20000000, gpll0, 15, 1, 2),
+ F( 25000000, gpll0, 12, 1, 2),
+ F( 50000000, gpll0, 12, 0, 0),
+ F( 100000000, gpll0, 6, 0, 0),
+ F( 200000000, gpll0, 3, 0, 0),
+ F_END
+};
+
+static struct rcg_clk sdcc1_apps_clk_src = {
+ .cmd_rcgr_reg = SDCC1_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc1_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "sdcc1_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 50000000, NOMINAL, 400000000),
+ CLK_INIT(sdcc1_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk sdcc2_apps_clk_src = {
+ .cmd_rcgr_reg = SDCC2_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc2_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "sdcc2_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 50000000, NOMINAL, 200000000),
+ CLK_INIT(sdcc2_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk sdcc3_apps_clk_src = {
+ .cmd_rcgr_reg = SDCC3_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc2_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "sdcc3_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 50000000, NOMINAL, 100000000),
+ CLK_INIT(sdcc3_apps_clk_src.c),
+ },
+};
+
+static struct rcg_clk sdcc4_apps_clk_src = {
+ .cmd_rcgr_reg = SDCC4_APPS_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_sdcc2_4_apps_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "sdcc4_apps_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 50000000, NOMINAL, 100000000),
+ CLK_INIT(sdcc4_apps_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_tsif_ref_clk[] = {
+ F( 105000, xo, 2, 1, 91),
+ F_END
+};
+
+static struct rcg_clk tsif_ref_clk_src = {
+ .cmd_rcgr_reg = TSIF_REF_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_gcc_tsif_ref_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "tsif_ref_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP1(LOW, 105500),
+ CLK_INIT(tsif_ref_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_gcc_usb_hs_system_clk[] = {
+ F( 75000000, gpll0, 8, 0, 0),
+ F_END
+};
+
+static struct rcg_clk usb_hs_system_clk_src = {
+ .cmd_rcgr_reg = USB_HS_SYSTEM_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_gcc_usb_hs_system_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "usb_hs_system_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 37500000, NOMINAL, 75000000),
+ CLK_INIT(usb_hs_system_clk_src.c),
+ },
+};
+
+static struct local_vote_clk gcc_bam_dma_ahb_clk = {
+ .cbcr_reg = BAM_DMA_AHB_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(12),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_bam_dma_ahb_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_bam_dma_ahb_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_blsp1_ahb_clk = {
+ .cbcr_reg = BLSP1_AHB_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(17),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_ahb_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_blsp1_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup1_i2c_apps_clk = {
+ .cbcr_reg = BLSP1_QUP1_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup1_i2c_apps_clk",
+ .parent = &blsp1_qup1_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup1_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup1_spi_apps_clk = {
+ .cbcr_reg = BLSP1_QUP1_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup1_spi_apps_clk",
+ .parent = &blsp1_qup1_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup1_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup2_i2c_apps_clk = {
+ .cbcr_reg = BLSP1_QUP2_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup2_i2c_apps_clk",
+ .parent = &blsp1_qup2_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup2_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup2_spi_apps_clk = {
+ .cbcr_reg = BLSP1_QUP2_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup2_spi_apps_clk",
+ .parent = &blsp1_qup2_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup2_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup3_i2c_apps_clk = {
+ .cbcr_reg = BLSP1_QUP3_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup3_i2c_apps_clk",
+ .parent = &blsp1_qup3_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup3_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup3_spi_apps_clk = {
+ .cbcr_reg = BLSP1_QUP3_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup3_spi_apps_clk",
+ .parent = &blsp1_qup3_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup3_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup4_i2c_apps_clk = {
+ .cbcr_reg = BLSP1_QUP4_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup4_i2c_apps_clk",
+ .parent = &blsp1_qup4_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup4_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_qup4_spi_apps_clk = {
+ .cbcr_reg = BLSP1_QUP4_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_qup4_spi_apps_clk",
+ .parent = &blsp1_qup4_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_qup4_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_uart1_apps_clk = {
+ .cbcr_reg = BLSP1_UART1_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_uart1_apps_clk",
+ .parent = &blsp1_uart1_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_uart1_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_uart2_apps_clk = {
+ .cbcr_reg = BLSP1_UART2_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_uart2_apps_clk",
+ .parent = &blsp1_uart2_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_uart2_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_uart3_apps_clk = {
+ .cbcr_reg = BLSP1_UART3_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_uart3_apps_clk",
+ .parent = &blsp1_uart3_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_uart3_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp1_uart4_apps_clk = {
+ .cbcr_reg = BLSP1_UART4_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp1_uart4_apps_clk",
+ .parent = &blsp1_uart4_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp1_uart4_apps_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_blsp2_ahb_clk = {
+ .cbcr_reg = BLSP2_AHB_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(15),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_ahb_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_blsp2_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup1_i2c_apps_clk = {
+ .cbcr_reg = BLSP2_QUP1_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup1_i2c_apps_clk",
+ .parent = &blsp2_qup1_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup1_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup1_spi_apps_clk = {
+ .cbcr_reg = BLSP2_QUP1_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup1_spi_apps_clk",
+ .parent = &blsp2_qup1_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup1_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup2_i2c_apps_clk = {
+ .cbcr_reg = BLSP2_QUP2_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup2_i2c_apps_clk",
+ .parent = &blsp2_qup2_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup2_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup2_spi_apps_clk = {
+ .cbcr_reg = BLSP2_QUP2_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup2_spi_apps_clk",
+ .parent = &blsp2_qup2_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup2_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup3_i2c_apps_clk = {
+ .cbcr_reg = BLSP2_QUP3_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup3_i2c_apps_clk",
+ .parent = &blsp2_qup3_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup3_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup3_spi_apps_clk = {
+ .cbcr_reg = BLSP2_QUP3_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup3_spi_apps_clk",
+ .parent = &blsp2_qup3_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup3_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup4_i2c_apps_clk = {
+ .cbcr_reg = BLSP2_QUP4_I2C_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup4_i2c_apps_clk",
+ .parent = &blsp2_qup4_i2c_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup4_i2c_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_qup4_spi_apps_clk = {
+ .cbcr_reg = BLSP2_QUP4_SPI_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_qup4_spi_apps_clk",
+ .parent = &blsp2_qup4_spi_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_qup4_spi_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_uart1_apps_clk = {
+ .cbcr_reg = BLSP2_UART1_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_uart1_apps_clk",
+ .parent = &blsp2_uart1_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_uart1_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_uart2_apps_clk = {
+ .cbcr_reg = BLSP2_UART2_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_uart2_apps_clk",
+ .parent = &blsp2_uart2_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_uart2_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_uart3_apps_clk = {
+ .cbcr_reg = BLSP2_UART3_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_uart3_apps_clk",
+ .parent = &blsp2_uart3_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_uart3_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_blsp2_uart4_apps_clk = {
+ .cbcr_reg = BLSP2_UART4_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_blsp2_uart4_apps_clk",
+ .parent = &blsp2_uart4_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_blsp2_uart4_apps_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_boot_rom_ahb_clk = {
+ .cbcr_reg = BOOT_ROM_AHB_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(10),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_boot_rom_ahb_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_boot_rom_ahb_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_ce1_ahb_clk = {
+ .cbcr_reg = CE1_AHB_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(3),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_ce1_ahb_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_ce1_ahb_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_ce1_axi_clk = {
+ .cbcr_reg = CE1_AXI_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(4),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_ce1_axi_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_ce1_axi_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_ce1_clk = {
+ .cbcr_reg = CE1_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(5),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_ce1_clk",
+ .parent = &ce1_clk_src.c,
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_ce1_clk.c),
+ },
+};
+
+static struct branch_clk gcc_lpass_q6_axi_clk = {
+ .cbcr_reg = LPASS_Q6_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_lpass_q6_axi_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_lpass_q6_axi_clk.c),
+ },
+};
+
+static struct branch_clk gcc_lpass_sys_noc_mport_clk = {
+ .cbcr_reg = LPASS_SYS_NOC_MPORT_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_lpass_sys_noc_mport_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_lpass_sys_noc_mport_clk.c),
+ },
+};
+
+static struct branch_clk gcc_lpass_sys_noc_sway_clk = {
+ .cbcr_reg = LPASS_SYS_NOC_SWAY_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_lpass_sys_noc_sway_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_lpass_sys_noc_sway_clk.c),
+ },
+};
+
+static struct branch_clk gcc_mss_cfg_ahb_clk = {
+ .cbcr_reg = MSS_CFG_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_mss_cfg_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_mss_cfg_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_mss_q6_bimc_axi_clk = {
+ .cbcr_reg = MSS_Q6_BIMC_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_mss_q6_bimc_axi_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_mss_q6_bimc_axi_clk.c),
+ },
+};
+
+static struct branch_clk gcc_pdm2_clk = {
+ .cbcr_reg = PDM2_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_pdm2_clk",
+ .parent = &pdm2_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_pdm2_clk.c),
+ },
+};
+
+static struct branch_clk gcc_pdm_ahb_clk = {
+ .cbcr_reg = PDM_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_pdm_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_pdm_ahb_clk.c),
+ },
+};
+
+static struct local_vote_clk gcc_prng_ahb_clk = {
+ .cbcr_reg = PRNG_AHB_CBCR,
+ .vote_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .en_mask = BIT(13),
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_prng_ahb_clk",
+ .ops = &clk_ops_vote,
+ CLK_INIT(gcc_prng_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc1_ahb_clk = {
+ .cbcr_reg = SDCC1_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc1_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc1_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc1_apps_clk = {
+ .cbcr_reg = SDCC1_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc1_apps_clk",
+ .parent = &sdcc1_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc1_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc1_cdccal_ff_clk = {
+ .cbcr_reg = SDCC1_CDCCAL_FF_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc1_cdccal_ff_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc1_cdccal_ff_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc1_cdccal_sleep_clk = {
+ .cbcr_reg = SDCC1_CDCCAL_SLEEP_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc1_cdccal_sleep_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc1_cdccal_sleep_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc2_ahb_clk = {
+ .cbcr_reg = SDCC2_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc2_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc2_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc2_apps_clk = {
+ .cbcr_reg = SDCC2_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc2_apps_clk",
+ .parent = &sdcc2_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc2_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc3_ahb_clk = {
+ .cbcr_reg = SDCC3_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc3_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc3_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc3_apps_clk = {
+ .cbcr_reg = SDCC3_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc3_apps_clk",
+ .parent = &sdcc3_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc3_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc4_ahb_clk = {
+ .cbcr_reg = SDCC4_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc4_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc4_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_sdcc4_apps_clk = {
+ .cbcr_reg = SDCC4_APPS_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sdcc4_apps_clk",
+ .parent = &sdcc4_apps_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sdcc4_apps_clk.c),
+ },
+};
+
+static struct branch_clk gcc_tsif_ahb_clk = {
+ .cbcr_reg = TSIF_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_tsif_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_tsif_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_tsif_ref_clk = {
+ .cbcr_reg = TSIF_REF_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_tsif_ref_clk",
+ .parent = &tsif_ref_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_tsif_ref_clk.c),
+ },
+};
+
+static struct branch_clk gcc_usb2a_phy_sleep_clk = {
+ .cbcr_reg = USB2A_PHY_SLEEP_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_usb2a_phy_sleep_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_usb2a_phy_sleep_clk.c),
+ },
+};
+
+static struct branch_clk gcc_usb_hs_ahb_clk = {
+ .cbcr_reg = USB_HS_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_usb_hs_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_usb_hs_ahb_clk.c),
+ },
+};
+
+static struct branch_clk gcc_usb_hs_system_clk = {
+ .cbcr_reg = USB_HS_SYSTEM_CBCR,
+ .bcr_reg = USB_HS_BCR,
+ .has_sibling = 0,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_usb_hs_system_clk",
+ .parent = &usb_hs_system_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_usb_hs_system_clk.c),
+ },
+};
+
+static struct pll_vote_clk mmpll0 = {
+ .en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS,
+ .en_mask = BIT(0),
+ .status_reg = (void __iomem *)MMPLL0_STATUS,
+ .status_mask = BIT(17),
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .rate = 800000000,
+ .parent = &xo.c,
+ .dbg_name = "mmpll0",
+ .ops = &clk_ops_pll_vote,
+ CLK_INIT(mmpll0.c),
+ },
+};
+
+static struct pll_vote_clk mmpll1 = {
+ .en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS,
+ .en_mask = BIT(1),
+ .status_reg = (void __iomem *)MMPLL1_STATUS,
+ .status_mask = BIT(17),
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .rate = 900000000,
+ .parent = &xo.c,
+ .dbg_name = "mmpll1",
+ .ops = &clk_ops_pll_vote,
+ CLK_INIT(mmpll1.c),
+ },
+};
+
+static struct pll_clk mmpll4 = {
+ .mode_reg = (void __iomem *)MMPLL4_MODE,
+ .status_reg = (void __iomem *)MMPLL4_STATUS,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmpll4",
+ .parent = &xo.c,
+ .rate = 930000000,
+ .ops = &clk_ops_local_pll,
+ CLK_INIT(mmpll4.c),
+ },
+};
+
+static struct pll_clk mmpll3 = {
+ .mode_reg = (void __iomem *)MMPLL3_MODE,
+ .status_reg = (void __iomem *)MMPLL3_STATUS,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmpll3",
+ .parent = &xo.c,
+ .rate = 930000000,
+ .ops = &clk_ops_local_pll,
+ CLK_INIT(mmpll3.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_mmss_mmssnoc_axi_clk[] = {
+ F_MM( 19200000, xo, 1, 0, 0),
+ F_MM( 37500000, gpll0, 16, 0, 0),
+ F_MM( 50000000, gpll0, 12, 0, 0),
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 133330000, gpll0, 4.5, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_MM( 300000000, mmpll1, 3, 0, 0),
+ F_END
+};
+
+static struct rcg_clk axi_clk_src = {
+ .cmd_rcgr_reg = AXI_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_mmss_mmssnoc_axi_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "axi_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 133330000, NOMINAL, 266670000, HIGH,
+ 300000000),
+ CLK_INIT(axi_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_csi0_2_clk[] = {
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 200000000, mmpll0, 4, 0, 0),
+ F_END
+};
+
+static struct rcg_clk csi0_clk_src = {
+ .cmd_rcgr_reg = CSI0_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_csi0_2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "csi0_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(csi0_clk_src.c),
+ },
+};
+
+static struct rcg_clk csi1_clk_src = {
+ .cmd_rcgr_reg = CSI1_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_csi0_2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "csi1_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(csi1_clk_src.c),
+ },
+};
+
+static struct rcg_clk csi2_clk_src = {
+ .cmd_rcgr_reg = CSI2_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_csi0_2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "csi2_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(csi2_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_vfe_vfe0_1_clk[] = {
+ F_MM( 37500000, gpll0, 16, 0, 0),
+ F_MM( 50000000, gpll0, 12, 0, 0),
+ F_MM( 60000000, gpll0, 10, 0, 0),
+ F_MM( 80000000, gpll0, 7.5, 0, 0),
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 109090000, gpll0, 5.5, 0, 0),
+ F_MM( 133330000, gpll0, 4.5, 0, 0),
+ F_MM( 150000000, gpll0, 4, 0, 0),
+ F_MM( 200000000, gpll0, 3, 0, 0),
+ F_MM( 228570000, mmpll0, 3.5, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_MM( 320000000, mmpll0, 2.5, 0, 0),
+ F_MM( 400000000, mmpll0, 2, 0, 0),
+ F_MM( 465000000, mmpll4, 2, 0, 0),
+ F_END
+};
+
+static struct rcg_clk vfe0_clk_src = {
+ .cmd_rcgr_reg = VFE0_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_vfe_vfe0_1_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "vfe0_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 320000000, HIGH,
+ 465000000),
+ CLK_INIT(vfe0_clk_src.c),
+ },
+};
+
+static struct rcg_clk vfe1_clk_src = {
+ .cmd_rcgr_reg = VFE1_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_vfe_vfe0_1_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "vfe1_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 133330000, NOMINAL, 266670000, HIGH,
+ 320000000),
+ CLK_INIT(vfe1_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_mdss_mdp_clk[] = {
+ F_MM( 37500000, gpll0, 16, 0, 0),
+ F_MM( 60000000, gpll0, 10, 0, 0),
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM( 85710000, gpll0, 7, 0, 0),
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 150000000, gpll0, 4, 0, 0),
+ F_MM( 160000000, mmpll0, 5, 0, 0),
+ F_MM( 200000000, mmpll0, 4, 0, 0),
+ F_MM( 228570000, mmpll0, 3.5, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_MM( 320000000, mmpll0, 2.5, 0, 0),
+ F_END
+};
+
+static struct rcg_clk mdp_clk_src = {
+ .cmd_rcgr_reg = MDP_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_mdss_mdp_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdp_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 266670000, HIGH,
+ 320000000),
+ CLK_INIT(mdp_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_jpeg_jpeg0_clk[] = {
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM( 133330000, gpll0, 4.5, 0, 0),
+ F_MM( 200000000, gpll0, 3, 0, 0),
+ F_MM( 228570000, mmpll0, 3.5, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_MM( 320000000, mmpll0, 2.5, 0, 0),
+ F_END
+};
+
+static struct rcg_clk jpeg0_clk_src = {
+ .cmd_rcgr_reg = JPEG0_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_jpeg_jpeg0_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "jpeg0_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 133330000, NOMINAL, 266670000, HIGH,
+ 320000000),
+ CLK_INIT(jpeg0_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl pixel_freq_tbl[] = {
+ {
+ .src_clk = &pixel_clk_src_samarium.c,
+ .div_src_val = BVAL(10, 8, dsipll0_pixel_mm_source_val)
+ | BVAL(4, 0, 0),
+ },
+ F_END
+};
+
+static struct rcg_clk pclk0_clk_src = {
+ .cmd_rcgr_reg = PCLK0_CMD_RCGR,
+ .current_freq = pixel_freq_tbl,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .parent = &pixel_clk_src_samarium.c,
+ .dbg_name = "pclk0_clk_src",
+ .ops = &clk_ops_pixel,
+ VDD_DIG_FMAX_MAP2(LOW, 148500000, NOMINAL, 250000000),
+ CLK_INIT(pclk0_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_ocmemcx_ocmemnoc_clk[] = {
+ F_MM( 19200000, xo, 1, 0, 0),
+ F_MM( 37500000, gpll0, 16, 0, 0),
+ F_MM( 50000000, gpll0, 12, 0, 0),
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM( 109090000, gpll0, 5.5, 0, 0),
+ F_MM( 150000000, gpll0, 4, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_MM( 300000000, mmpll1, 3, 0, 0),
+ F_END
+};
+
+static struct rcg_clk ocmemnoc_clk_src = {
+ .cmd_rcgr_reg = OCMEMNOC_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_ocmemcx_ocmemnoc_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "ocmemnoc_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 133330000, NOMINAL, 266670000, HIGH,
+ 300000000),
+ CLK_INIT(ocmemnoc_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_cci_cci_clk[] = {
+ F_MM( 19200000, xo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk cci_clk_src = {
+ .cmd_rcgr_reg = CCI_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_camss_cci_cci_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "cci_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP1(LOW, 19200000),
+ CLK_INIT(cci_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_gp0_1_clk[] = {
+ F_MM( 10000, xo, 16, 1, 120),
+ F_MM( 24000, xo, 16, 1, 50),
+ F_MM( 6000000, gpll0, 10, 1, 10),
+ F_MM( 12000000, gpll0, 10, 1, 5),
+ F_MM( 13000000, gpll0, 4, 13, 150),
+ F_MM( 24000000, gpll0, 5, 1, 5),
+ F_END
+};
+
+static struct rcg_clk mmss_gp0_clk_src = {
+ .cmd_rcgr_reg = MMSS_GP0_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_camss_gp0_1_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmss_gp0_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(mmss_gp0_clk_src.c),
+ },
+};
+
+static struct rcg_clk mmss_gp1_clk_src = {
+ .cmd_rcgr_reg = MMSS_GP1_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_camss_gp0_1_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmss_gp1_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(mmss_gp1_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_mclk0_2_clk[] = {
+ F_MM( 4800000, xo, 4, 0, 0),
+ F_MM( 6000000, gpll0, 10, 1, 10),
+ F_MM( 8000000, gpll0, 15, 1, 5),
+ F_MM( 9600000, xo, 2, 0, 0),
+ F_MM( 16000000, gpll0, 12.5, 1, 3),
+ F_MM( 19200000, xo, 1, 0, 0),
+ F_MM( 24000000, gpll0, 5, 1, 5),
+ F_MM( 32000000, mmpll0, 5, 1, 5),
+ F_MM( 48000000, gpll0, 12.5, 0, 0),
+ F_MM( 64000000, mmpll0, 12.5, 0, 0),
+ F_MM( 66670000, gpll0, 9, 0, 0),
+ F_END
+};
+
+static struct rcg_clk mclk0_clk_src = {
+ .cmd_rcgr_reg = MCLK0_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_camss_mclk0_2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mclk0_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP1(LOW, 66670000),
+ CLK_INIT(mclk0_clk_src.c),
+ },
+};
+
+static struct rcg_clk mclk1_clk_src = {
+ .cmd_rcgr_reg = MCLK1_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_camss_mclk0_2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mclk1_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP1(LOW, 66670000),
+ CLK_INIT(mclk1_clk_src.c),
+ },
+};
+
+static struct rcg_clk mclk2_clk_src = {
+ .cmd_rcgr_reg = MCLK2_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_camss_mclk0_2_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mclk2_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP1(LOW, 66670000),
+ CLK_INIT(mclk2_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_phy0_1_csi0_1phytimer_clk[] = {
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 200000000, mmpll0, 4, 0, 0),
+ F_END
+};
+
+static struct rcg_clk csi0phytimer_clk_src = {
+ .cmd_rcgr_reg = CSI0PHYTIMER_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_phy0_1_csi0_1phytimer_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "csi0phytimer_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(csi0phytimer_clk_src.c),
+ },
+};
+
+static struct rcg_clk csi1phytimer_clk_src = {
+ .cmd_rcgr_reg = CSI1PHYTIMER_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_phy0_1_csi0_1phytimer_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "csi1phytimer_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
+ CLK_INIT(csi1phytimer_clk_src.c),
+ },
+};
+
+static struct branch_clk camss_vfe_vfe0_clk = {
+ .cbcr_reg = CAMSS_VFE_VFE0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_vfe_vfe0_clk",
+ .parent = &vfe0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_vfe_vfe0_clk.c),
+ },
+};
+
+static struct branch_clk camss_vfe_vfe1_clk = {
+ .cbcr_reg = CAMSS_VFE_VFE1_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_vfe_vfe1_clk",
+ .parent = &vfe1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_vfe_vfe1_clk.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_camss_vfe_cpp_clk[] = {
+ F_MM( 150000000, gpll0, 4, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_MM( 320000000, mmpll0, 2.5, 0, 0),
+ F_MM( 400000000, mmpll0, 2, 0, 0),
+ F_MM( 465000000, mmpll4, 2, 0, 0),
+ F_END
+};
+
+static struct rcg_clk cpp_clk_src = {
+ .cmd_rcgr_reg = CPP_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_camss_vfe_cpp_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "cpp_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP3(LOW, 150000000, NOMINAL, 320000000, HIGH,
+ 465000000),
+ CLK_INIT(cpp_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl byte_freq_tbl[] = {
+ {
+ .src_clk = &byte_clk_src_samarium.c,
+ .div_src_val = BVAL(10, 8, dsipll0_byte_mm_source_val),
+ },
+ F_END
+};
+
+static struct rcg_clk byte0_clk_src = {
+ .cmd_rcgr_reg = BYTE0_CMD_RCGR,
+ .current_freq = byte_freq_tbl,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .parent = &byte_clk_src_samarium.c,
+ .dbg_name = "byte0_clk_src",
+ .ops = &clk_ops_byte,
+ VDD_DIG_FMAX_MAP2(LOW, 111370000, NOMINAL, 187500000),
+ CLK_INIT(byte0_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_mdss_esc0_clk[] = {
+ F_MM( 19200000, xo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk esc0_clk_src = {
+ .cmd_rcgr_reg = ESC0_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_mdss_esc0_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "esc0_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 19200000),
+ CLK_INIT(esc0_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_mdss_vsync_clk[] = {
+ F_MM( 19200000, xo, 1, 0, 0),
+ F_END
+};
+
+static struct rcg_clk vsync_clk_src = {
+ .cmd_rcgr_reg = VSYNC_CMD_RCGR,
+ .set_rate = set_rate_hid,
+ .freq_tbl = ftbl_mdss_vsync_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "vsync_clk_src",
+ .ops = &clk_ops_rcg,
+ VDD_DIG_FMAX_MAP1(LOW, 19200000),
+ CLK_INIT(vsync_clk_src.c),
+ },
+};
+
+static struct clk_freq_tbl ftbl_venus0_vcodec0_clk[] = {
+ F_MM( 50000000, gpll0, 12, 0, 0),
+ F_MM( 100000000, gpll0, 6, 0, 0),
+ F_MM( 133330000, mmpll0, 6, 0, 0),
+ F_MM( 200000000, mmpll0, 4, 0, 0),
+ F_MM( 266670000, mmpll0, 3, 0, 0),
+ F_END
+};
+
+static struct rcg_clk vcodec0_clk_src = {
+ .cmd_rcgr_reg = VCODEC0_CMD_RCGR,
+ .set_rate = set_rate_mnd,
+ .freq_tbl = ftbl_venus0_vcodec0_clk,
+ .current_freq = &rcg_dummy_freq,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "vcodec0_clk_src",
+ .ops = &clk_ops_rcg_mnd,
+ VDD_DIG_FMAX_MAP2(LOW, 133330000, NOMINAL, 266670000),
+ CLK_INIT(vcodec0_clk_src.c),
+ },
+};
+
+static struct branch_clk camss_ahb_clk = {
+ .cbcr_reg = CAMSS_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_cci_cci_ahb_clk = {
+ .cbcr_reg = CAMSS_CCI_CCI_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_cci_cci_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_cci_cci_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_cci_cci_clk = {
+ .cbcr_reg = CAMSS_CCI_CCI_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_cci_cci_clk",
+ .parent = &cci_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_cci_cci_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi0_ahb_clk = {
+ .cbcr_reg = CAMSS_CSI0_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi0_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi0_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi0_clk = {
+ .cbcr_reg = CAMSS_CSI0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi0_clk",
+ .parent = &csi0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi0_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi0phy_clk = {
+ .cbcr_reg = CAMSS_CSI0PHY_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi0phy_clk",
+ .parent = &csi0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi0phy_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi0pix_clk = {
+ .cbcr_reg = CAMSS_CSI0PIX_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi0pix_clk",
+ .parent = &csi0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi0pix_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi0rdi_clk = {
+ .cbcr_reg = CAMSS_CSI0RDI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi0rdi_clk",
+ .parent = &csi0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi0rdi_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi1_ahb_clk = {
+ .cbcr_reg = CAMSS_CSI1_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi1_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi1_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi1_clk = {
+ .cbcr_reg = CAMSS_CSI1_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi1_clk",
+ .parent = &csi1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi1_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi1phy_clk = {
+ .cbcr_reg = CAMSS_CSI1PHY_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi1phy_clk",
+ .parent = &csi1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi1phy_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi1pix_clk = {
+ .cbcr_reg = CAMSS_CSI1PIX_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi1pix_clk",
+ .parent = &csi1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi1pix_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi1rdi_clk = {
+ .cbcr_reg = CAMSS_CSI1RDI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi1rdi_clk",
+ .parent = &csi1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi1rdi_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi2_ahb_clk = {
+ .cbcr_reg = CAMSS_CSI2_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi2_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi2_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi2_clk = {
+ .cbcr_reg = CAMSS_CSI2_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi2_clk",
+ .parent = &csi2_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi2_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi2phy_clk = {
+ .cbcr_reg = CAMSS_CSI2PHY_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi2phy_clk",
+ .parent = &csi2_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi2phy_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi2pix_clk = {
+ .cbcr_reg = CAMSS_CSI2PIX_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi2pix_clk",
+ .parent = &csi2_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi2pix_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi2rdi_clk = {
+ .cbcr_reg = CAMSS_CSI2RDI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi2rdi_clk",
+ .parent = &csi2_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi2rdi_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi_vfe0_clk = {
+ .cbcr_reg = CAMSS_CSI_VFE0_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi_vfe0_clk",
+ .parent = &vfe0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi_vfe0_clk.c),
+ },
+};
+
+static struct branch_clk camss_csi_vfe1_clk = {
+ .cbcr_reg = CAMSS_CSI_VFE1_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_csi_vfe1_clk",
+ .parent = &vfe1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_csi_vfe1_clk.c),
+ },
+};
+
+static struct branch_clk camss_gp0_clk = {
+ .cbcr_reg = CAMSS_GP0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_gp0_clk",
+ .parent = &mmss_gp0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_gp0_clk.c),
+ },
+};
+
+static struct branch_clk camss_gp1_clk = {
+ .cbcr_reg = CAMSS_GP1_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_gp1_clk",
+ .parent = &mmss_gp1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_gp1_clk.c),
+ },
+};
+
+static struct branch_clk camss_ispif_ahb_clk = {
+ .cbcr_reg = CAMSS_ISPIF_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_ispif_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_ispif_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_jpeg_jpeg0_clk = {
+ .cbcr_reg = CAMSS_JPEG_JPEG0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_jpeg_jpeg0_clk",
+ .parent = &jpeg0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_jpeg_jpeg0_clk.c),
+ },
+};
+
+static struct branch_clk camss_jpeg_jpeg_ahb_clk = {
+ .cbcr_reg = CAMSS_JPEG_JPEG_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_jpeg_jpeg_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_jpeg_jpeg_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_jpeg_jpeg_axi_clk = {
+ .cbcr_reg = CAMSS_JPEG_JPEG_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_jpeg_jpeg_axi_clk",
+ .parent = &axi_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_jpeg_jpeg_axi_clk.c),
+ },
+};
+
+static struct branch_clk camss_mclk0_clk = {
+ .cbcr_reg = CAMSS_MCLK0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_mclk0_clk",
+ .parent = &mclk0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_mclk0_clk.c),
+ },
+};
+
+static struct branch_clk camss_mclk1_clk = {
+ .cbcr_reg = CAMSS_MCLK1_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_mclk1_clk",
+ .parent = &mclk1_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_mclk1_clk.c),
+ },
+};
+
+static struct branch_clk camss_mclk2_clk = {
+ .cbcr_reg = CAMSS_MCLK2_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_mclk2_clk",
+ .parent = &mclk2_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_mclk2_clk.c),
+ },
+};
+
+static struct branch_clk camss_micro_ahb_clk = {
+ .cbcr_reg = CAMSS_MICRO_AHB_CBCR,
+ .bcr_reg = CAMSS_MICRO_BCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_micro_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_micro_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_phy0_csi0phytimer_clk = {
+ .cbcr_reg = CAMSS_PHY0_CSI0PHYTIMER_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_phy0_csi0phytimer_clk",
+ .parent = &csi0phytimer_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_phy0_csi0phytimer_clk.c),
+ },
+};
+
+static struct branch_clk camss_phy1_csi1phytimer_clk = {
+ .cbcr_reg = CAMSS_PHY1_CSI1PHYTIMER_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_phy1_csi1phytimer_clk",
+ .parent = &csi1phytimer_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_phy1_csi1phytimer_clk.c),
+ },
+};
+
+static struct branch_clk camss_top_ahb_clk = {
+ .cbcr_reg = CAMSS_TOP_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_top_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_top_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_vfe_cpp_ahb_clk = {
+ .cbcr_reg = CAMSS_VFE_CPP_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_vfe_cpp_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_vfe_cpp_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_vfe_cpp_clk = {
+ .cbcr_reg = CAMSS_VFE_CPP_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_vfe_cpp_clk",
+ .parent = &cpp_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_vfe_cpp_clk.c),
+ },
+};
+
+static struct branch_clk camss_vfe_vfe_ahb_clk = {
+ .cbcr_reg = CAMSS_VFE_VFE_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_vfe_vfe_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_vfe_vfe_ahb_clk.c),
+ },
+};
+
+static struct branch_clk camss_vfe_vfe_axi_clk = {
+ .cbcr_reg = CAMSS_VFE_VFE_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "camss_vfe_vfe_axi_clk",
+ .parent = &axi_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(camss_vfe_vfe_axi_clk.c),
+ },
+};
+
+static struct branch_clk mdss_ahb_clk = {
+ .cbcr_reg = MDSS_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_ahb_clk.c),
+ },
+};
+
+static struct branch_clk mdss_axi_clk = {
+ .cbcr_reg = MDSS_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_axi_clk",
+ .parent = &axi_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_axi_clk.c),
+ },
+};
+
+static struct branch_clk mdss_byte0_clk = {
+ .cbcr_reg = MDSS_BYTE0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_byte0_clk",
+ .parent = &byte0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_byte0_clk.c),
+ },
+};
+
+static struct branch_clk mdss_esc0_clk = {
+ .cbcr_reg = MDSS_ESC0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_esc0_clk",
+ .parent = &esc0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_esc0_clk.c),
+ },
+};
+
+static struct branch_clk mdss_mdp_clk = {
+ .cbcr_reg = MDSS_MDP_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_mdp_clk",
+ .parent = &mdp_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_mdp_clk.c),
+ },
+};
+
+static struct branch_clk mdss_mdp_lut_clk = {
+ .cbcr_reg = MDSS_MDP_LUT_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_mdp_lut_clk",
+ .parent = &mdp_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_mdp_lut_clk.c),
+ },
+};
+
+static struct branch_clk mdss_pclk0_clk = {
+ .cbcr_reg = MDSS_PCLK0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_pclk0_clk",
+ .parent = &pclk0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_pclk0_clk.c),
+ },
+};
+
+static struct branch_clk mdss_vsync_clk = {
+ .cbcr_reg = MDSS_VSYNC_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mdss_vsync_clk",
+ .parent = &vsync_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mdss_vsync_clk.c),
+ },
+};
+
+static struct branch_clk mmss_misc_ahb_clk = {
+ .cbcr_reg = MMSS_MISC_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmss_misc_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(mmss_misc_ahb_clk.c),
+ },
+};
+
+static struct branch_clk mmss_mmssnoc_axi_clk = {
+ .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmss_mmssnoc_axi_clk",
+ .parent = &axi_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mmss_mmssnoc_axi_clk.c),
+ },
+};
+
+static struct branch_clk mmss_s0_axi_clk = {
+ .cbcr_reg = MMSS_S0_AXI_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "mmss_s0_axi_clk",
+ .parent = &axi_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(mmss_s0_axi_clk.c),
+ .depends = &mmss_mmssnoc_axi_clk.c,
+ },
+};
+
+static struct branch_clk ocmemcx_ocmemnoc_clk = {
+ .cbcr_reg = OCMEMCX_OCMEMNOC_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "ocmemcx_ocmemnoc_clk",
+ .parent = &ocmemnoc_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(ocmemcx_ocmemnoc_clk.c),
+ },
+};
+
+static struct branch_clk oxili_gfx3d_clk = {
+ .cbcr_reg = OXILI_GFX3D_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "oxili_gfx3d_clk",
+ .parent = &oxili_gfx3d_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(oxili_gfx3d_clk.c),
+ },
+};
+
+static struct branch_clk oxilicx_ahb_clk = {
+ .cbcr_reg = OXILICX_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "oxilicx_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(oxilicx_ahb_clk.c),
+ },
+};
+
+static struct branch_clk venus0_ahb_clk = {
+ .cbcr_reg = VENUS0_AHB_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "venus0_ahb_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(venus0_ahb_clk.c),
+ },
+};
+
+static struct branch_clk venus0_axi_clk = {
+ .cbcr_reg = VENUS0_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "venus0_axi_clk",
+ .parent = &axi_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(venus0_axi_clk.c),
+ },
+};
+
+static struct branch_clk venus0_ocmemnoc_clk = {
+ .cbcr_reg = VENUS0_OCMEMNOC_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "venus0_ocmemnoc_clk",
+ .parent = &ocmemnoc_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(venus0_ocmemnoc_clk.c),
+ },
+};
+
+static struct branch_clk venus0_vcodec0_clk = {
+ .cbcr_reg = VENUS0_VCODEC0_CBCR,
+ .has_sibling = 0,
+ .base = &virt_bases[MMSS_BASE],
+ .c = {
+ .dbg_name = "venus0_vcodec0_clk",
+ .parent = &vcodec0_clk_src.c,
+ .ops = &clk_ops_branch,
+ CLK_INIT(venus0_vcodec0_clk.c),
+ },
+};
+
+#ifdef CONFIG_DEBUG_FS
+enum {
+ M_ACPU0 = 0,
+ M_ACPU1,
+ M_ACPU2,
+ M_ACPU3,
+ M_L2,
+};
+
+struct measure_mux_entry {
+ struct clk *c;
+ int base;
+ u32 debug_mux;
+};
+
+static struct measure_mux_entry measure_mux[] = {
+ {&snoc.c, GCC_BASE, 0x0000},
+ {&cnoc.c, GCC_BASE, 0x0008},
+ {&pnoc.c, GCC_BASE, 0x0010},
+ {&bimc.c, GCC_BASE, 0x0155},
+ {&bimc_gpu.c, GCC_BASE, 0x015c},
+ {&mmssnoc_ahb.c, MMSS_BASE, 0x0001},
+
+ {&gcc_mss_cfg_ahb_clk.c, GCC_BASE, 0x0030},
+ {&gcc_mss_q6_bimc_axi_clk.c, GCC_BASE, 0x0031},
+ {&gcc_usb_hs_system_clk.c, GCC_BASE, 0x0060},
+ {&gcc_usb_hs_ahb_clk.c, GCC_BASE, 0x0061},
+ {&gcc_usb2a_phy_sleep_clk.c, GCC_BASE, 0x0063},
+ {&gcc_sdcc1_apps_clk.c, GCC_BASE, 0x0068},
+ {&gcc_sdcc1_ahb_clk.c, GCC_BASE, 0x0069},
+ {&gcc_sdcc1_cdccal_sleep_clk.c, GCC_BASE, 0x006a},
+ {&gcc_sdcc1_cdccal_ff_clk.c, GCC_BASE, 0x006b},
+ {&gcc_sdcc2_apps_clk.c, GCC_BASE, 0x0070},
+ {&gcc_sdcc2_ahb_clk.c, GCC_BASE, 0x0071},
+ {&gcc_sdcc3_apps_clk.c, GCC_BASE, 0x0078},
+ {&gcc_sdcc3_ahb_clk.c, GCC_BASE, 0x0079},
+ {&gcc_sdcc4_apps_clk.c, GCC_BASE, 0x0080},
+ {&gcc_sdcc4_ahb_clk.c, GCC_BASE, 0x0081},
+ {&gcc_blsp1_ahb_clk.c, GCC_BASE, 0x0088},
+ {&gcc_blsp1_qup1_spi_apps_clk.c, GCC_BASE, 0x008a},
+ {&gcc_blsp1_qup1_i2c_apps_clk.c, GCC_BASE, 0x008b},
+ {&gcc_blsp1_uart1_apps_clk.c, GCC_BASE, 0x008c},
+ {&gcc_blsp1_qup2_spi_apps_clk.c, GCC_BASE, 0x008e},
+ {&gcc_blsp1_qup2_i2c_apps_clk.c, GCC_BASE, 0x0090},
+ {&gcc_blsp1_uart2_apps_clk.c, GCC_BASE, 0x0091},
+ {&gcc_blsp1_qup3_spi_apps_clk.c, GCC_BASE, 0x0093},
+ {&gcc_blsp1_qup3_i2c_apps_clk.c, GCC_BASE, 0x0094},
+ {&gcc_blsp1_uart3_apps_clk.c, GCC_BASE, 0x0095},
+ {&gcc_blsp1_qup4_spi_apps_clk.c, GCC_BASE, 0x0098},
+ {&gcc_blsp1_qup4_i2c_apps_clk.c, GCC_BASE, 0x0099},
+ {&gcc_blsp1_uart4_apps_clk.c, GCC_BASE, 0x009a},
+ {&gcc_blsp2_ahb_clk.c, GCC_BASE, 0x00a8},
+ {&gcc_blsp2_qup1_spi_apps_clk.c, GCC_BASE, 0x00aa},
+ {&gcc_blsp2_qup1_i2c_apps_clk.c, GCC_BASE, 0x00ab},
+ {&gcc_blsp2_uart1_apps_clk.c, GCC_BASE, 0x00ac},
+ {&gcc_blsp2_qup2_spi_apps_clk.c, GCC_BASE, 0x00ae},
+ {&gcc_blsp2_qup2_i2c_apps_clk.c, GCC_BASE, 0x00b0},
+ {&gcc_blsp2_uart2_apps_clk.c, GCC_BASE, 0x00b1},
+ {&gcc_blsp2_qup3_spi_apps_clk.c, GCC_BASE, 0x00b3},
+ {&gcc_blsp2_qup3_i2c_apps_clk.c, GCC_BASE, 0x00b4},
+ {&gcc_blsp2_uart3_apps_clk.c, GCC_BASE, 0x00b5},
+ {&gcc_blsp2_qup4_spi_apps_clk.c, GCC_BASE, 0x00b8},
+ {&gcc_blsp2_qup4_i2c_apps_clk.c, GCC_BASE, 0x00b9},
+ {&gcc_blsp2_uart4_apps_clk.c, GCC_BASE, 0x00ba},
+ {&gcc_pdm_ahb_clk.c, GCC_BASE, 0x00d0},
+ {&gcc_pdm2_clk.c, GCC_BASE, 0x00d2},
+ {&gcc_prng_ahb_clk.c, GCC_BASE, 0x00d8},
+ {&gcc_bam_dma_ahb_clk.c, GCC_BASE, 0x00e0},
+ {&gcc_tsif_ahb_clk.c, GCC_BASE, 0x00e8},
+ {&gcc_tsif_ref_clk.c, GCC_BASE, 0x00e9},
+ {&gcc_boot_rom_ahb_clk.c, GCC_BASE, 0x00f8},
+ {&gcc_ce1_clk.c, GCC_BASE, 0x0138},
+ {&gcc_ce1_axi_clk.c, GCC_BASE, 0x0139},
+ {&gcc_ce1_ahb_clk.c, GCC_BASE, 0x013a},
+ {&gcc_lpass_q6_axi_clk.c, GCC_BASE, 0x0160},
+ {&gcc_lpass_sys_noc_mport_clk.c, GCC_BASE, 0x0162},
+ {&gcc_lpass_sys_noc_sway_clk.c, GCC_BASE, 0x0163},
+
+ {&mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003},
+ {&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004},
+ {&mmss_s0_axi_clk.c, MMSS_BASE, 0x0005},
+ {&ocmemcx_ocmemnoc_clk.c, MMSS_BASE, 0x0007},
+ {&oxilicx_ahb_clk.c, MMSS_BASE, 0x000a},
+ {&oxili_gfx3d_clk.c, MMSS_BASE, 0x000b},
+ {&venus0_vcodec0_clk.c, MMSS_BASE, 0x000c},
+ {&venus0_axi_clk.c, MMSS_BASE, 0x000d},
+ {&venus0_ocmemnoc_clk.c, MMSS_BASE, 0x000e},
+ {&venus0_ahb_clk.c, MMSS_BASE, 0x000f},
+ {&mdss_mdp_clk.c, MMSS_BASE, 0x0012},
+ {&mdss_mdp_lut_clk.c, MMSS_BASE, 0x0013},
+ {&mdss_pclk0_clk.c, MMSS_BASE, 0x0014},
+ {&mdss_vsync_clk.c, MMSS_BASE, 0x0015},
+ {&mdss_byte0_clk.c, MMSS_BASE, 0x0016},
+ {&mdss_esc0_clk.c, MMSS_BASE, 0x0017},
+ {&mdss_ahb_clk.c, MMSS_BASE, 0x0018},
+ {&mdss_axi_clk.c, MMSS_BASE, 0x0019},
+ {&camss_top_ahb_clk.c, MMSS_BASE, 0x001a},
+ {&camss_micro_ahb_clk.c, MMSS_BASE, 0x001b},
+ {&camss_gp0_clk.c, MMSS_BASE, 0x001c},
+ {&camss_gp1_clk.c, MMSS_BASE, 0x001d},
+ {&camss_mclk0_clk.c, MMSS_BASE, 0x001e},
+ {&camss_mclk1_clk.c, MMSS_BASE, 0x001f},
+ {&camss_mclk2_clk.c, MMSS_BASE, 0x0020},
+ {&camss_cci_cci_clk.c, MMSS_BASE, 0x0021},
+ {&camss_cci_cci_ahb_clk.c, MMSS_BASE, 0x0022},
+ {&camss_phy0_csi0phytimer_clk.c, MMSS_BASE, 0x0023},
+ {&camss_phy1_csi1phytimer_clk.c, MMSS_BASE, 0x0024},
+ {&camss_jpeg_jpeg0_clk.c, MMSS_BASE, 0x0025},
+ {&camss_jpeg_jpeg_ahb_clk.c, MMSS_BASE, 0x0026},
+ {&camss_jpeg_jpeg_axi_clk.c, MMSS_BASE, 0x0027},
+ {&camss_vfe_vfe0_clk.c, MMSS_BASE, 0x0028},
+ {&camss_vfe_cpp_clk.c, MMSS_BASE, 0x0029},
+ {&camss_vfe_cpp_ahb_clk.c, MMSS_BASE, 0x002a},
+ {&camss_vfe_vfe_ahb_clk.c, MMSS_BASE, 0x002b},
+ {&camss_vfe_vfe_axi_clk.c, MMSS_BASE, 0x002c},
+ {&camss_ispif_ahb_clk.c, MMSS_BASE, 0x002d},
+ {&camss_csi_vfe0_clk.c, MMSS_BASE, 0x002e},
+ {&camss_csi0_clk.c, MMSS_BASE, 0x002f},
+ {&camss_csi0_ahb_clk.c, MMSS_BASE, 0x0030},
+ {&camss_csi0phy_clk.c, MMSS_BASE, 0x0031},
+ {&camss_csi0rdi_clk.c, MMSS_BASE, 0x0032},
+ {&camss_csi0pix_clk.c, MMSS_BASE, 0x0033},
+ {&camss_csi1_clk.c, MMSS_BASE, 0x0034},
+ {&camss_csi1_ahb_clk.c, MMSS_BASE, 0x0035},
+ {&camss_csi1phy_clk.c, MMSS_BASE, 0x0036},
+ {&camss_csi1rdi_clk.c, MMSS_BASE, 0x0037},
+ {&camss_csi1pix_clk.c, MMSS_BASE, 0x0038},
+ {&camss_csi2_clk.c, MMSS_BASE, 0x0039},
+ {&camss_csi2_ahb_clk.c, MMSS_BASE, 0x003a},
+ {&camss_csi2phy_clk.c, MMSS_BASE, 0x003b},
+ {&camss_csi2rdi_clk.c, MMSS_BASE, 0x003c},
+ {&camss_csi2pix_clk.c, MMSS_BASE, 0x003d},
+ {&camss_csi_vfe1_clk.c, MMSS_BASE, 0x0053},
+ {&camss_vfe_vfe1_clk.c, MMSS_BASE, 0x0055},
+ {&camss_ahb_clk.c, MMSS_BASE, 0x0056},
+
+ {&krait0_clk.c, APCS_BASE, M_ACPU0},
+ {&krait1_clk.c, APCS_BASE, M_ACPU1},
+ {&krait2_clk.c, APCS_BASE, M_ACPU2},
+ {&krait3_clk.c, APCS_BASE, M_ACPU3},
+ {&l2_clk.c, APCS_BASE, M_L2},
+
+ {&dummy_clk, N_BASES, 0x0000},
+};
+
+static int measure_clk_set_parent(struct clk *c, struct clk *parent)
+{
+ struct measure_clk *clk = to_measure_clk(c);
+ unsigned long flags;
+ u32 regval, clk_sel, i;
+
+ if (!parent)
+ return -EINVAL;
+
+ for (i = 0; i < (ARRAY_SIZE(measure_mux) - 1); i++)
+ if (measure_mux[i].c == parent)
+ break;
+
+ if (measure_mux[i].c == &dummy_clk)
+ return -EINVAL;
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ /*
+ * Program the test vector, measurement period (sample_ticks)
+ * and scaling multiplier.
+ */
+ clk->sample_ticks = 0x10000;
+ clk->multiplier = 1;
+
+ switch (measure_mux[i].base) {
+
+ case GCC_BASE:
+ writel_relaxed(0, GCC_REG_BASE(GCC_DEBUG_CLK_CTL));
+ clk_sel = measure_mux[i].debug_mux;
+ break;
+
+ case MMSS_BASE:
+ writel_relaxed(0, MMSS_REG_BASE(MMSS_DEBUG_CLK_CTL));
+ clk_sel = 0x02C;
+ regval = BVAL(11, 0, measure_mux[i].debug_mux);
+ writel_relaxed(regval, MMSS_REG_BASE(MMSS_DEBUG_CLK_CTL));
+
+ /* Activate debug clock output */
+ regval |= BIT(16);
+ writel_relaxed(regval, MMSS_REG_BASE(MMSS_DEBUG_CLK_CTL));
+ break;
+
+ case LPASS_BASE:
+ writel_relaxed(0, LPASS_REG_BASE(LPASS_DBG_CLK));
+ clk_sel = 0x161;
+ regval = BVAL(11, 0, measure_mux[i].debug_mux);
+ writel_relaxed(regval, LPASS_REG_BASE(LPASS_DBG_CLK));
+
+ /* Activate debug clock output */
+ regval |= BIT(20);
+ writel_relaxed(regval, LPASS_REG_BASE(LPASS_DBG_CLK));
+ break;
+
+ case APCS_BASE:
+ clk->multiplier = 4;
+ clk_sel = 0x16A;
+
+ if (measure_mux[i].debug_mux == M_L2)
+ regval = BIT(12);
+ else
+ regval = measure_mux[i].debug_mux << 8;
+ writel_relaxed(BIT(0), APCS_REG_BASE(L2_CBCR));
+ writel_relaxed(regval, APCS_REG_BASE(GLB_CLK_DIAG));
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ /* Set debug mux clock index */
+ regval = BVAL(8, 0, clk_sel);
+ writel_relaxed(regval, GCC_REG_BASE(GCC_DEBUG_CLK_CTL));
+
+ /* Activate debug clock output */
+ regval |= BIT(16);
+ writel_relaxed(regval, GCC_REG_BASE(GCC_DEBUG_CLK_CTL));
+
+ /* Make sure test vector is set before starting measurements. */
+ mb();
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+
+ return 0;
+}
+
+/* Sample clock for 'ticks' reference clock ticks. */
+static u32 run_measurement(unsigned ticks)
+{
+ /* Stop counters and set the XO4 counter start value. */
+ writel_relaxed(ticks, GCC_REG_BASE(CLOCK_FRQ_MEASURE_CTL));
+
+ /* Wait for timer to become ready. */
+ while ((readl_relaxed(GCC_REG_BASE(CLOCK_FRQ_MEASURE_STATUS)) &
+ BIT(25)) != 0)
+ cpu_relax();
+
+ /* Run measurement and wait for completion. */
+ writel_relaxed(BIT(20)|ticks, GCC_REG_BASE(CLOCK_FRQ_MEASURE_CTL));
+ while ((readl_relaxed(GCC_REG_BASE(CLOCK_FRQ_MEASURE_STATUS)) &
+ BIT(25)) == 0)
+ cpu_relax();
+
+ /* Return measured ticks. */
+ return readl_relaxed(GCC_REG_BASE(CLOCK_FRQ_MEASURE_STATUS)) &
+ BM(24, 0);
+}
+
+/*
+ * Perform a hardware rate measurement for a given clock.
+ * FOR DEBUG USE ONLY: Measurements take ~15 ms!
+ */
+static unsigned long measure_clk_get_rate(struct clk *c)
+{
+ unsigned long flags;
+ u32 gcc_xo4_reg_backup;
+ u64 raw_count_short, raw_count_full;
+ struct measure_clk *clk = to_measure_clk(c);
+ unsigned ret;
+
+ ret = clk_prepare_enable(&xo.c);
+ if (ret) {
+ pr_warn("CXO clock failed to enable. Can't measure\n");
+ return 0;
+ }
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+
+ /* Enable CXO/4 and RINGOSC branch. */
+ gcc_xo4_reg_backup = readl_relaxed(GCC_REG_BASE(GCC_XO_DIV4_CBCR));
+ writel_relaxed(0x1, GCC_REG_BASE(GCC_XO_DIV4_CBCR));
+
+ /*
+ * The ring oscillator counter will not reset if the measured clock
+ * is not running. To detect this, run a short measurement before
+ * the full measurement. If the raw results of the two are the same
+ * then the clock must be off.
+ */
+
+ /* Run a short measurement. (~1 ms) */
+ raw_count_short = run_measurement(0x1000);
+ /* Run a full measurement. (~14 ms) */
+ raw_count_full = run_measurement(clk->sample_ticks);
+
+ writel_relaxed(gcc_xo4_reg_backup, GCC_REG_BASE(GCC_XO_DIV4_CBCR));
+
+ /* Return 0 if the clock is off. */
+ if (raw_count_full == raw_count_short) {
+ ret = 0;
+ } else {
+ /* Compute rate in Hz. */
+ raw_count_full = ((raw_count_full * 10) + 15) * 4800000;
+ do_div(raw_count_full, ((clk->sample_ticks * 10) + 35));
+ ret = (raw_count_full * clk->multiplier);
+ }
+
+ writel_relaxed(0x51A00, GCC_REG_BASE(PLLTEST_PAD_CFG));
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+
+ clk_disable_unprepare(&xo.c);
+
+ return ret;
+}
+#else /* !CONFIG_DEBUG_FS */
+static int measure_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ return -EINVAL;
+}
+
+static unsigned long measure_clk_get_rate(struct clk *clk)
+{
+ return 0;
+}
+#endif /* CONFIG_DEBUG_FS */
+
+static struct clk_ops clk_ops_measure = {
+ .set_parent = measure_clk_set_parent,
+ .get_rate = measure_clk_get_rate,
+};
+
+static struct measure_clk measure_clk = {
+ .c = {
+ .dbg_name = "measure_clk",
+ .ops = &clk_ops_measure,
+ CLK_INIT(measure_clk.c),
+ },
+ .multiplier = 1,
+};
+
+static struct clk_lookup msm_clocks_samarium_rumi[] = {
+ CLK_DUMMY("xo", cxo_pil_lpass_clk, "fe200000.qcom,lpass", OFF),
+ CLK_DUMMY("core_clk", q6ss_xo_clk, "fe200000.qcom,lpass", OFF),
+ CLK_DUMMY("bus_clk", gcc_lpass_q6_axi_clk, "fe200000.qcom,lpass", OFF),
+ CLK_DUMMY("iface_clk", q6ss_ahb_lfabif_clk, "fe200000.qcom,lpass", OFF),
+ CLK_DUMMY("reg_clk", q6ss_ahbm_clk, "fe200000.qcom,lpass", OFF),
+
+ CLK_DUMMY("core_clk", venus_vcodec0_clk, "fdce0000.qcom,venus", OFF),
+ CLK_DUMMY("iface_clk", venus_ahb_clk, "fdce0000.qcom,venus", OFF),
+ CLK_DUMMY("bus_clk", venus_axi_clk, "fdce0000.qcom,venus", OFF),
+ CLK_DUMMY("mem_clk", venus_ocmemnoc_clk, "fdce0000.qcom,venus", OFF),
+ CLK_DUMMY("core_clk", venus_vcodec0_clk, "fd8c1024.qcom,gdsc", OFF),
+
+ CLK_DUMMY("xo", CXO_CLK, "fc880000.qcom,mss", OFF),
+ CLK_DUMMY("bus_clk", MSS_BIMC_Q6_CLK, "fc880000.qcom,mss", OFF),
+ CLK_DUMMY("iface_clk", MSS_CFG_AHB_CLK, "fc880000.qcom,mss", OFF),
+ CLK_DUMMY("mem_clk", BOOT_ROM_AHB_CLK, "fc880000.qcom,mss", OFF),
+ CLK_DUMMY("xo", XO_CLK, "fb21b000.qcom,pronto", OFF),
+ CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
+ CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF),
+ CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991e000.serial", OFF),
+ CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991e000.serial", OFF),
+ CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF),
+ CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF),
+ CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF),
+ CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF),
+ CLK_DUMMY("core_clk", USB_HS_SYSTEM_CLK, "msm_otg", OFF),
+ CLK_DUMMY("iface_clk", USB_HS_AHB_CLK, "msm_otg", OFF),
+ CLK_DUMMY("xo", CXO_OTG_CLK, "msm_otg", OFF),
+ CLK_DUMMY("dfab_clk", DFAB_CLK, "msm_sps", OFF),
+ CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, "msm_sps", OFF),
+ CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
+ CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.1", OFF),
+ CLK_DUMMY("core_clk", gcc_prng_ahb_clk.c, "f9bff000.qcom,msm-rng", OFF),
+ CLK_DUMMY("core_clk", I2C_CLK, "f9924000.i2c", OFF),
+ CLK_DUMMY("iface_clk", I2C_P_CLK, "f9924000.i2c", OFF),
+
+ /* CoreSight clocks */
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc326000.tmc", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc320000.tpiu", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc324000.replicator", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc325000.tmc", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc323000.funnel", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc321000.funnel", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc322000.funnel", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc355000.funnel", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc36c000.funnel", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc302000.stm", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc34c000.etm", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc34d000.etm", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc34e000.etm", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc34f000.etm", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc310000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc311000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc312000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc313000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc314000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc315000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc316000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc317000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc318000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc351000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc352000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc353000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc354000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc350000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc330000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc33c000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc360000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc330000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc33c000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fc360000.cti", OFF),
+ CLK_DUMMY("core_clk", qdss_clk.c, "fd828018.hwevent", OFF),
+
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc326000.tmc", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc320000.tpiu", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc324000.replicator", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc325000.tmc", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc323000.funnel", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc321000.funnel", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc322000.funnel", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc355000.funnel", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc36c000.funnel", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc302000.stm", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34c000.etm", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34d000.etm", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34e000.etm", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34f000.etm", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc310000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc311000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc312000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc313000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc314000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc315000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc316000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc317000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc318000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc351000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc352000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc353000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc354000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc350000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc330000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc33c000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc360000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc330000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc33c000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc360000.cti", OFF),
+ CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fd828018.hwevent", OFF),
+
+ CLK_DUMMY("core_mmss_clk", mmss_misc_ahb_clk.c, "fd828018.hwevent",
+ OFF),
+ CLK_DUMMY("core_clk", gcc_ce1_clk.c, "qseecom", OFF),
+ CLK_DUMMY("iface_clk", gcc_ce1_ahb_clk.c, "qseecom", OFF),
+ CLK_DUMMY("bus_clk", gcc_ce1_axi_clk.c, "qseecom", OFF),
+ CLK_DUMMY("core_clk_src", qseecom_ce1_clk_src.c, "qseecom", OFF),
+};
+
+static struct clk_lookup msm_clocks_samarium[] = {
+ /* XO and PLL */
+ CLK_LOOKUP("", xo.c, ""),
+ CLK_LOOKUP("hfpll_src", xo_a_clk.c, "f9016000.qcom,clock-krait"),
+ CLK_LOOKUP("", gpll0.c, ""),
+ CLK_LOOKUP("aux_clk", gpll0_ao.c, "f9016000.qcom,clock-krait"),
+ CLK_LOOKUP("", gpll4.c, ""),
+ CLK_LOOKUP("", mmpll0.c, ""),
+ CLK_LOOKUP("", mmpll1.c, ""),
+ CLK_LOOKUP("", mmpll3.c, ""),
+ CLK_LOOKUP("", mmpll4.c, ""),
+
+ /* measure */
+ CLK_LOOKUP("measure", measure_clk.c, "debug"),
+
+ /* RPM and voter */
+ CLK_LOOKUP("xo", xo_otg_clk.c, "msm_otg"),
+ CLK_LOOKUP("xo", xo_pil_lpass_clk.c, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("xo", xo_pil_mss_clk.c, "fc880000.qcom,mss"),
+ CLK_LOOKUP("xo", xo_wlan_clk.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("rf_clk", rf_clk3.c, "fb000000.qcom,wcnss-wlan"),
+ CLK_LOOKUP("xo", xo_pil_pronto_clk.c, "fb21b000.qcom,pronto"),
+ CLK_LOOKUP("xo", xo_ehci_host_clk.c, "msm_ehci_host"),
+ CLK_LOOKUP("xo", xo_lpm_clk.c, "fc4281d0.qcom,mpm"),
+
+ CLK_LOOKUP("", bb_clk1.c, ""),
+ CLK_LOOKUP("", bb_clk1_a.c, ""),
+ CLK_LOOKUP("", bb_clk2.c, ""),
+ CLK_LOOKUP("", bb_clk2_a.c, ""),
+ CLK_LOOKUP("", rf_clk1.c, ""),
+ CLK_LOOKUP("", rf_clk1_a.c, ""),
+ CLK_LOOKUP("", rf_clk2.c, ""),
+ CLK_LOOKUP("", rf_clk2_a.c, ""),
+ CLK_LOOKUP("", rf_clk3_a.c, ""),
+ CLK_LOOKUP("", div_clk1.c, ""),
+ CLK_LOOKUP("", div_clk1_a.c, ""),
+ CLK_LOOKUP("", div_clk2.c, ""),
+ CLK_LOOKUP("", div_clk2_a.c, ""),
+ CLK_LOOKUP("", div_clk3.c, ""),
+ CLK_LOOKUP("", div_clk3_a.c, ""),
+ CLK_LOOKUP("", diff_clk1.c, ""),
+ CLK_LOOKUP("", diff_clk1_a.c, ""),
+ CLK_LOOKUP("", bb_clk1_pin.c, ""),
+ CLK_LOOKUP("", bb_clk1_a_pin.c, ""),
+ CLK_LOOKUP("", bb_clk2_pin.c, ""),
+ CLK_LOOKUP("ref_clk", bb_clk2_a_pin.c, "3-000e"),
+ CLK_LOOKUP("", rf_clk1_pin.c, ""),
+ CLK_LOOKUP("", rf_clk1_a_pin.c, ""),
+ CLK_LOOKUP("", rf_clk2_pin.c, ""),
+ CLK_LOOKUP("", rf_clk2_a_pin.c, ""),
+ CLK_LOOKUP("", rf_clk3_pin.c, ""),
+ CLK_LOOKUP("", rf_clk3_a_pin.c, ""),
+ CLK_LOOKUP("", cnoc.c, ""),
+ CLK_LOOKUP("", cnoc_a_clk.c, ""),
+ CLK_LOOKUP("", pnoc.c, ""),
+ CLK_LOOKUP("", pnoc_a_clk.c, ""),
+ CLK_LOOKUP("dfab_clk", pnoc_sps_clk.c, "msm_sps"),
+ CLK_LOOKUP("", snoc.c, ""),
+ CLK_LOOKUP("", snoc_a_clk.c, ""),
+ CLK_LOOKUP("", bimc.c, ""),
+ CLK_LOOKUP("", bimc_a_clk.c, ""),
+ CLK_LOOKUP("", bimc_gpu.c, ""),
+ CLK_LOOKUP("", pnoc_keepalive_a_clk.c, ""),
+ CLK_LOOKUP("", mmssnoc_ahb.c, ""),
+ CLK_LOOKUP("", mmssnoc_ahb_a_clk.c, ""),
+
+ /* Bus driver */
+ CLK_LOOKUP("bus_clk", cnoc_msmbus_clk.c, "msm_config_noc"),
+ CLK_LOOKUP("bus_a_clk", cnoc_msmbus_a_clk.c, "msm_config_noc"),
+ CLK_LOOKUP("bus_clk", snoc_msmbus_clk.c, "msm_sys_noc"),
+ CLK_LOOKUP("bus_a_clk", snoc_msmbus_a_clk.c, "msm_sys_noc"),
+ CLK_LOOKUP("bus_clk", pnoc_msmbus_clk.c, "msm_periph_noc"),
+ CLK_LOOKUP("bus_a_clk", pnoc_msmbus_a_clk.c, "msm_periph_noc"),
+ CLK_LOOKUP("mem_clk", bimc_msmbus_clk.c, "msm_bimc"),
+ CLK_LOOKUP("mem_a_clk", bimc_msmbus_a_clk.c, "msm_bimc"),
+ CLK_LOOKUP("ocmem_clk", ocmemgx_msmbus_clk.c, "msm_bus"),
+ CLK_LOOKUP("ocmem_a_clk", ocmemgx_msmbus_a_clk.c, "msm_bus"),
+ CLK_LOOKUP("bus_clk", mmss_s0_axi_clk.c, "msm_mmss_noc"),
+ CLK_LOOKUP("bus_a_clk", mmss_s0_axi_clk.c, "msm_mmss_noc"),
+
+ /* CoreSight clocks */
+ CLK_LOOKUP("core_clk", qdss.c, "fc326000.tmc"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc320000.tpiu"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc324000.replicator"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc325000.tmc"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc323000.funnel"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc321000.funnel"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc322000.funnel"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc355000.funnel"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc36c000.funnel"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc302000.stm"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc34c000.etm"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc34d000.etm"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc34e000.etm"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc34f000.etm"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc310000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc311000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc312000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc313000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc314000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc315000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc316000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc317000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc318000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc351000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc352000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc353000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc354000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc350000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc330000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc33c000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fc360000.cti"),
+ CLK_LOOKUP("core_clk", qdss.c, "fd828018.hwevent"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc326000.tmc"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc320000.tpiu"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc324000.replicator"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc325000.tmc"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc323000.funnel"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc321000.funnel"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc322000.funnel"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc355000.funnel"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc36c000.funnel"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc302000.stm"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc34c000.etm"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc34d000.etm"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc34e000.etm"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc34f000.etm"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc310000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc311000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc312000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc313000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc314000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc315000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc316000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc317000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc318000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc351000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc352000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc353000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc354000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc350000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc330000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc33c000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fc360000.cti"),
+ CLK_LOOKUP("core_a_clk", qdss_a_clk.c, "fd828018.hwevent"),
+
+ CLK_LOOKUP("osr_clk", div_clk1.c, "msm-dai-q6-dev.16384"),
+
+ /* BLSP */
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f991f000.serial"),
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f9924000.i2c"),
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f991e000.serial"),
+ CLK_LOOKUP("iface_clk", gcc_blsp1_ahb_clk.c, "f9923000.i2c"),
+ CLK_LOOKUP("core_clk", gcc_blsp1_qup1_i2c_apps_clk.c, "f9923000.i2c"),
+ CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f9963000.i2c"),
+ CLK_LOOKUP("core_clk", gcc_blsp2_qup1_i2c_apps_clk.c, "f9963000.i2c"),
+ CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f9964000.i2c"),
+ CLK_LOOKUP("core_clk", gcc_blsp2_qup2_i2c_apps_clk.c, "f9964000.i2c"),
+ CLK_LOOKUP("", gcc_blsp1_qup1_spi_apps_clk.c, ""),
+ CLK_LOOKUP("core_clk", gcc_blsp1_qup2_i2c_apps_clk.c, "f9924000.i2c"),
+ CLK_LOOKUP("", gcc_blsp1_qup2_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp1_qup3_i2c_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp1_qup3_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp1_qup4_i2c_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp1_qup4_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp1_uart1_apps_clk.c, ""),
+ CLK_LOOKUP("core_clk", gcc_blsp1_uart2_apps_clk.c, "f991e000.serial"),
+ CLK_LOOKUP("core_clk", gcc_blsp1_uart3_apps_clk.c, "f991f000.serial"),
+ CLK_LOOKUP("", gcc_blsp1_uart4_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_ahb_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup1_i2c_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup1_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup2_i2c_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup2_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup3_i2c_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup3_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup4_i2c_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_qup4_spi_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_uart1_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_uart2_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_uart3_apps_clk.c, ""),
+ CLK_LOOKUP("", gcc_blsp2_uart4_apps_clk.c, ""),
+
+ /* SDCC */
+ CLK_LOOKUP("iface_clk", gcc_sdcc1_ahb_clk.c, "msm_sdcc.1"),
+ CLK_LOOKUP("core_clk", gcc_sdcc1_apps_clk.c, "msm_sdcc.1"),
+ CLK_LOOKUP("cal_clk", gcc_sdcc1_cdccal_ff_clk.c, "msm_sdcc.1"),
+ CLK_LOOKUP("sleep_clk", gcc_sdcc1_cdccal_sleep_clk.c, "msm_sdcc.1"),
+ CLK_LOOKUP("iface_clk", gcc_sdcc2_ahb_clk.c, "msm_sdcc.2"),
+ CLK_LOOKUP("core_clk", gcc_sdcc2_apps_clk.c, "msm_sdcc.2"),
+ CLK_LOOKUP("iface_clk", gcc_sdcc3_ahb_clk.c, "msm_sdcc.3"),
+ CLK_LOOKUP("core_clk", gcc_sdcc3_apps_clk.c, "msm_sdcc.3"),
+ CLK_LOOKUP("iface_clk", gcc_sdcc4_ahb_clk.c, "msm_sdcc.4"),
+ CLK_LOOKUP("core_clk", gcc_sdcc4_apps_clk.c, "msm_sdcc.4"),
+
+ /* SCM PAS */
+ CLK_LOOKUP("core_clk", gcc_ce1_clk.c, "scm"),
+ CLK_LOOKUP("iface_clk", gcc_ce1_ahb_clk.c, "scm"),
+ CLK_LOOKUP("bus_clk", gcc_ce1_axi_clk.c, "scm"),
+ CLK_LOOKUP("core_clk_src", scm_ce1_clk_src.c, "scm"),
+
+ /* Misc GCC branch */
+ CLK_LOOKUP("", ce1_clk_src.c, ""),
+ CLK_LOOKUP("dma_bam_pclk", gcc_bam_dma_ahb_clk.c, "msm_sps"),
+ CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "fc880000.qcom,mss"),
+ CLK_LOOKUP("", gcc_ce1_ahb_clk.c, ""),
+ CLK_LOOKUP("", gcc_ce1_axi_clk.c, ""),
+ CLK_LOOKUP("", gcc_ce1_clk.c, ""),
+ CLK_LOOKUP("bus_clk", gcc_lpass_q6_axi_clk.c, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("mport_clk", gcc_lpass_sys_noc_mport_clk.c,
+ "fe200000.qcom,lpass"),
+ CLK_LOOKUP("sway_clk", gcc_lpass_sys_noc_sway_clk.c,
+ "fe200000.qcom,lpass"),
+ CLK_LOOKUP("core_clk", dummy_clk, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("iface_clk", dummy_clk, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("reg_clk", dummy_clk, "fe200000.qcom,lpass"),
+ CLK_LOOKUP("iface_clk", gcc_mss_cfg_ahb_clk.c, "fc880000.qcom,mss"),
+ CLK_LOOKUP("bus_clk", gcc_mss_q6_bimc_axi_clk.c, "fc880000.qcom,mss"),
+ CLK_LOOKUP("", gcc_pdm2_clk.c, ""),
+ CLK_LOOKUP("", gcc_pdm_ahb_clk.c, ""),
+ CLK_LOOKUP("core_clk", gcc_prng_ahb_clk.c, "f9bff000.qcom,msm-rng"),
+ CLK_LOOKUP("", gcc_tsif_ref_clk.c, ""),
+ CLK_LOOKUP("", gcc_tsif_ahb_clk.c, ""),
+ CLK_LOOKUP("", gcc_usb2a_phy_sleep_clk.c, ""),
+ CLK_LOOKUP("iface_clk", gcc_usb_hs_ahb_clk.c, "msm_otg"),
+ CLK_LOOKUP("core_clk", gcc_usb_hs_system_clk.c, "msm_otg"),
+
+ /* MM sensor clocks */
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6e.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "20.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "90.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "6d.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "1.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk2_clk_src.c, "6c.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "6e.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "20.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "0.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "90.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "6d.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "1.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk2_clk.c, "6c.qcom,camera"),
+
+ /* CCI clocks */
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda0c000.qcom,cci"),
+ CLK_LOOKUP("cci_ahb_clk", camss_cci_cci_ahb_clk.c, "fda0c000.qcom,cci"),
+ CLK_LOOKUP("cci_src_clk", cci_clk_src.c, "fda0c000.qcom,cci"),
+ CLK_LOOKUP("cci_clk", camss_cci_cci_clk.c, "fda0c000.qcom,cci"),
+
+ /* CSIPHY clocks */
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda0ac00.qcom,csiphy"),
+ CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c,
+ "fda0ac00.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_src_clk", csi0phytimer_clk_src.c,
+ "fda0ac00.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_clk", camss_phy0_csi0phytimer_clk.c,
+ "fda0ac00.qcom,csiphy"),
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda0b000.qcom,csiphy"),
+ CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c,
+ "fda0b000.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_src_clk", csi1phytimer_clk_src.c,
+ "fda0b000.qcom,csiphy"),
+ CLK_LOOKUP("csiphy_timer_clk", camss_phy1_csi1phytimer_clk.c,
+ "fda0b000.qcom,csiphy"),
+
+ /* CSID clocks */
+ CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c,
+ "fda08000.qcom,csid"),
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda08000.qcom,csid"),
+ CLK_LOOKUP("csi_ahb_clk", camss_csi0_ahb_clk.c, "fda08000.qcom,csid"),
+ CLK_LOOKUP("csi_src_clk", csi0_clk_src.c, "fda08000.qcom,csid"),
+ CLK_LOOKUP("csi_phy_clk", camss_csi0phy_clk.c, "fda08000.qcom,csid"),
+ CLK_LOOKUP("csi_clk", camss_csi0_clk.c, "fda08000.qcom,csid"),
+ CLK_LOOKUP("csi_pix_clk", camss_csi0pix_clk.c, "fda08000.qcom,csid"),
+ CLK_LOOKUP("csi_rdi_clk", camss_csi0rdi_clk.c, "fda08000.qcom,csid"),
+
+ CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c,
+ "fda08400.qcom,csid"),
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda08400.qcom,csid"),
+ CLK_LOOKUP("csi_ahb_clk", camss_csi1_ahb_clk.c, "fda08400.qcom,csid"),
+ CLK_LOOKUP("csi_src_clk", csi1_clk_src.c, "fda08400.qcom,csid"),
+ CLK_LOOKUP("csi_phy_clk", camss_csi1phy_clk.c, "fda08400.qcom,csid"),
+ CLK_LOOKUP("csi_clk", camss_csi1_clk.c, "fda08400.qcom,csid"),
+ CLK_LOOKUP("csi_pix_clk", camss_csi1pix_clk.c, "fda08400.qcom,csid"),
+ CLK_LOOKUP("csi_rdi_clk", camss_csi1rdi_clk.c, "fda08400.qcom,csid"),
+
+ CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c,
+ "fda08800.qcom,csid"),
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda08800.qcom,csid"),
+ CLK_LOOKUP("csi_ahb_clk", camss_csi2_ahb_clk.c, "fda08800.qcom,csid"),
+ CLK_LOOKUP("csi_src_clk", csi2_clk_src.c, "fda08800.qcom,csid"),
+ CLK_LOOKUP("csi_phy_clk", camss_csi2phy_clk.c, "fda08800.qcom,csid"),
+ CLK_LOOKUP("csi_clk", camss_csi2_clk.c, "fda08800.qcom,csid"),
+ CLK_LOOKUP("csi_pix_clk", camss_csi2pix_clk.c, "fda08800.qcom,csid"),
+ CLK_LOOKUP("csi_rdi_clk", camss_csi2rdi_clk.c, "fda08800.qcom,csid"),
+
+ /* ISPIF clocks */
+ CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c,
+ "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("vfe0_clk_src", vfe0_clk_src.c, "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("camss_vfe_vfe0_clk", camss_vfe_vfe0_clk.c,
+ "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("camss_csi_vfe0_clk", camss_csi_vfe0_clk.c,
+ "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("vfe1_clk_src", vfe1_clk_src.c, "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("camss_vfe_vfe1_clk", camss_vfe_vfe1_clk.c,
+ "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("camss_csi_vfe1_clk", camss_csi_vfe1_clk.c,
+ "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("csi0_src_clk", csi0_clk_src.c, "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("csi0_clk", camss_csi0_clk.c, "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("csi0_pix_clk", camss_csi0pix_clk.c,
+ "fda0a000.qcom,ispif"),
+ CLK_LOOKUP("csi0_rdi_clk", camss_csi0rdi_clk.c,
+ "fda0a000.qcom,ispif"),
+
+ /* CPP clocks */
+ CLK_LOOKUP("micro_iface_clk", camss_micro_ahb_clk.c,
+ "fda04000.qcom,cpp"),
+ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c,
+ "fda04000.qcom,cpp"),
+ CLK_LOOKUP("cpp_iface_clk", camss_vfe_cpp_ahb_clk.c,
+ "fda04000.qcom,cpp"),
+ CLK_LOOKUP("cpp_core_clk", camss_vfe_cpp_clk.c, "fda04000.qcom,cpp"),
+ CLK_LOOKUP("cpp_bus_clk", camss_vfe_vfe_axi_clk.c, "fda04000.qcom,cpp"),
+ CLK_LOOKUP("vfe_clk_src", vfe0_clk_src.c, "fda04000.qcom,cpp"),
+ CLK_LOOKUP("camss_vfe_vfe_clk", camss_vfe_vfe0_clk.c,
+ "fda04000.qcom,cpp"),
+ CLK_LOOKUP("iface_clk", camss_vfe_vfe_ahb_clk.c, "fda04000.qcom,cpp"),
+
+ /* GDSC */
+ CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fd8c1024.qcom,gdsc"),
+ CLK_LOOKUP("core0_clk", camss_vfe_vfe0_clk.c, "fd8c36a4.qcom,gdsc"),
+ CLK_LOOKUP("cpp_clk", camss_vfe_cpp_clk.c, "fd8c36a4.qcom,gdsc"),
+ CLK_LOOKUP("core_clk", oxili_gfx3d_clk.c, "fd8c4024.qcom,gdsc"),
+ CLK_LOOKUP("core_clk", mdss_mdp_clk.c, "fd8c2304.qcom,gdsc"),
+ CLK_LOOKUP("lut_clk", mdss_mdp_lut_clk.c, "fd8c2304.qcom,gdsc"),
+
+ /* DSI PLL clocks */
+ CLK_LOOKUP("", dsi_vco_clk_samarium.c, ""),
+ CLK_LOOKUP("", analog_postdiv_clk_samarium.c, ""),
+ CLK_LOOKUP("", indirect_path_div2_clk_samarium.c, ""),
+ CLK_LOOKUP("", pixel_clk_src_samarium.c, ""),
+ CLK_LOOKUP("", byte_mux_samarium.c, ""),
+ CLK_LOOKUP("", byte_clk_src_samarium.c, ""),
+
+ /* MMSS */
+ CLK_LOOKUP("", axi_clk_src.c, ""),
+ CLK_LOOKUP("", camss_ahb_clk.c, ""),
+ CLK_LOOKUP("", camss_gp0_clk.c, ""),
+ CLK_LOOKUP("", camss_gp1_clk.c, ""),
+ CLK_LOOKUP("", camss_jpeg_jpeg0_clk.c, ""),
+ CLK_LOOKUP("", camss_jpeg_jpeg_ahb_clk.c, ""),
+ CLK_LOOKUP("", camss_jpeg_jpeg_axi_clk.c, ""),
+ CLK_LOOKUP("", gfx3d.c, ""),
+ CLK_LOOKUP("", gfx3d_a_clk.c, ""),
+ CLK_LOOKUP("", jpeg0_clk_src.c, ""),
+ CLK_LOOKUP("core_clk_src", mdp_clk_src.c, "fd900000.qcom,mdss_mdp"),
+ CLK_LOOKUP("iface_clk", mdss_ahb_clk.c, "fd922800.qcom,mdss_dsi"),
+ CLK_LOOKUP("iface_clk", mdss_ahb_clk.c, "fd900000.qcom,mdss_mdp"),
+ CLK_LOOKUP("iface_clk", mdss_ahb_clk.c, "fd928000.qcom,iommu"),
+ CLK_LOOKUP("bus_clk", mdss_axi_clk.c, "fd922800.qcom,mdss_dsi"),
+ CLK_LOOKUP("core_clk", mdss_axi_clk.c, "fd928000.qcom,iommu"),
+ CLK_LOOKUP("bus_clk", mdss_axi_clk.c, "fd900000.qcom,mdss_mdp"),
+ CLK_LOOKUP("", byte0_clk_src.c, ""),
+ CLK_LOOKUP("", pclk0_clk_src.c, ""),
+ CLK_LOOKUP("byte_clk", mdss_byte0_clk.c, "fd922800.qcom,mdss_dsi"),
+ CLK_LOOKUP("core_clk", mdss_esc0_clk.c, "fd922800.qcom,mdss_dsi"),
+ CLK_LOOKUP("core_clk", mdss_mdp_clk.c, "fd900000.qcom,mdss_mdp"),
+ CLK_LOOKUP("mdp_core_clk", mdss_mdp_clk.c, "fd922800.qcom,mdss_dsi"),
+ CLK_LOOKUP("core_clk", mdss_mdp_clk.c, "fd8c2304.qcom,gdsc"),
+ CLK_LOOKUP("lut_clk", mdss_mdp_lut_clk.c, "fd900000.qcom,mdss_mdp"),
+ CLK_LOOKUP("lut_clk", mdss_mdp_lut_clk.c, "fd8c2304.qcom,gdsc"),
+ CLK_LOOKUP("pixel_clk", mdss_pclk0_clk.c, "fd922800.qcom,mdss_dsi"),
+ CLK_LOOKUP("vsync_clk", mdss_vsync_clk.c, "fd900000.qcom,mdss_mdp"),
+ CLK_LOOKUP("core_mmss_clk", mmss_misc_ahb_clk.c, "fd828018.hwevent"),
+ CLK_LOOKUP("", mmss_mmssnoc_axi_clk.c, ""),
+ CLK_LOOKUP("", ocmemgx.c, ""),
+ CLK_LOOKUP("", ocmemgx_a_clk.c, ""),
+ CLK_LOOKUP("core_clk", ocmemgx_core_clk.c, "fdd00000.qcom,ocmem"),
+ CLK_LOOKUP("iface_clk", ocmemcx_ocmemnoc_clk.c, "fdd00000.qcom,ocmem"),
+ CLK_LOOKUP("", ocmemnoc_clk_src.c, ""),
+ CLK_LOOKUP("core_clk", oxili_gfx3d_clk.c, "fdb00000.qcom,kgsl-3d0"),
+ CLK_LOOKUP("iface_clk", oxilicx_ahb_clk.c, "fdb00000.qcom,kgsl-3d0"),
+ CLK_LOOKUP("iface_clk", venus0_ahb_clk.c, "fdce0000.qcom,venus"),
+ CLK_LOOKUP("bus_clk", venus0_axi_clk.c, "fdce0000.qcom,venus"),
+ CLK_LOOKUP("mem_clk", venus0_ocmemnoc_clk.c, "fdce0000.qcom,venus"),
+ CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fdce0000.qcom,venus"),
+ CLK_LOOKUP("core_clk", venus0_vcodec0_clk.c, "fdc00000.qcom,vidc"),
+ CLK_LOOKUP("iface_clk", venus0_ahb_clk.c, "fdc00000.qcom,vidc"),
+ CLK_LOOKUP("bus_clk", venus0_axi_clk.c, "fdc00000.qcom,vidc"),
+ CLK_LOOKUP("mem_clk", venus0_ocmemnoc_clk.c, "fdc00000.qcom,vidc"),
+
+ CLK_LOOKUP("iface_clk", oxilicx_ahb_clk.c, "fdb10000.qcom,iommu"),
+ CLK_LOOKUP("core_clk", oxili_gfx3d_clk.c, "fdb10000.qcom,iommu"),
+ CLK_LOOKUP("iface_clk", mdss_ahb_clk.c, "fd928000.qcom,iommu"),
+ CLK_LOOKUP("core_clk", mdss_axi_clk.c, "fd928000.qcom,iommu"),
+ CLK_LOOKUP("iface_clk", camss_vfe_vfe_ahb_clk.c, "fda44000.qcom,iommu"),
+ CLK_LOOKUP("core_clk", camss_vfe_vfe_axi_clk.c, "fda44000.qcom,iommu"),
+ CLK_LOOKUP("alt_iface_clk", camss_ahb_clk.c, "fda44000.qcom,iommu"),
+ CLK_LOOKUP("alt_core_clk", camss_top_ahb_clk.c, "fda44000.qcom,iommu"),
+ CLK_LOOKUP("iface_clk", venus0_ahb_clk.c, "fdc84000.qcom,iommu"),
+ CLK_LOOKUP("alt_core_clk", venus0_vcodec0_clk.c, "fdc84000.qcom,iommu"),
+ CLK_LOOKUP("core_clk", venus0_axi_clk.c, "fdc84000.qcom,iommu"),
+ CLK_LOOKUP("iface_clk", camss_jpeg_jpeg_ahb_clk.c,
+ "fda64000.qcom,iommu"),
+ CLK_LOOKUP("core_clk", camss_jpeg_jpeg_axi_clk.c,
+ "fda64000.qcom,iommu"),
+ CLK_LOOKUP("alt_iface_clk", camss_ahb_clk.c, "fda64000.qcom,iommu"),
+ CLK_LOOKUP("alt_core_clk", camss_top_ahb_clk.c, "fda64000.qcom,iommu"),
+};
+
+static struct pll_config_regs mmpll0_regs __initdata = {
+ .l_reg = (void __iomem *)MMPLL0_L_VAL,
+ .m_reg = (void __iomem *)MMPLL0_M_VAL,
+ .n_reg = (void __iomem *)MMPLL0_N_VAL,
+ .config_reg = (void __iomem *)MMPLL0_USER_CTL,
+ .mode_reg = (void __iomem *)MMPLL0_MODE,
+ .base = &virt_bases[MMSS_BASE],
+};
+
+/* MMPLL0 at 800 MHz, main output enabled. */
+static struct pll_config mmpll0_config __initdata = {
+ .l = 41,
+ .m = 2,
+ .n = 3,
+ .vco_val = 0x0,
+ .vco_mask = BM(21, 20),
+ .pre_div_val = 0x0,
+ .pre_div_mask = BM(14, 12),
+ .post_div_val = 0x0,
+ .post_div_mask = BM(9, 8),
+ .mn_ena_val = BIT(24),
+ .mn_ena_mask = BIT(24),
+ .main_output_val = BIT(0),
+ .main_output_mask = BIT(0),
+};
+
+static struct pll_config_regs mmpll1_regs __initdata = {
+ .l_reg = (void __iomem *)MMPLL1_L_VAL,
+ .m_reg = (void __iomem *)MMPLL1_M_VAL,
+ .n_reg = (void __iomem *)MMPLL1_N_VAL,
+ .config_reg = (void __iomem *)MMPLL1_USER_CTL,
+ .mode_reg = (void __iomem *)MMPLL1_MODE,
+ .base = &virt_bases[MMSS_BASE],
+};
+
+/* MMPLL1 at 900MHz, main output enabled. */
+static struct pll_config mmpll1_config __initdata = {
+ .l = 46,
+ .m = 7,
+ .n = 8,
+ .vco_val = 0x0,
+ .vco_mask = BM(21, 20),
+ .pre_div_val = 0x0,
+ .pre_div_mask = BM(14, 12),
+ .post_div_val = 0x0,
+ .post_div_mask = BM(9, 8),
+ .mn_ena_val = BIT(24),
+ .mn_ena_mask = BIT(24),
+ .main_output_val = BIT(0),
+ .main_output_mask = BIT(0),
+};
+
+static struct pll_config_regs mmpll3_regs __initdata = {
+ .l_reg = (void __iomem *)MMPLL3_L_VAL,
+ .m_reg = (void __iomem *)MMPLL3_M_VAL,
+ .n_reg = (void __iomem *)MMPLL3_N_VAL,
+ .config_reg = (void __iomem *)MMPLL3_USER_CTL,
+ .mode_reg = (void __iomem *)MMPLL3_MODE,
+ .base = &virt_bases[MMSS_BASE],
+};
+
+/* MMPLL3 at 930 MHz, main output enabled. */
+static struct pll_config mmpll3_config __initdata = {
+ .l = 48,
+ .m = 7,
+ .n = 16,
+ .vco_val = 0x0,
+ .vco_mask = BM(21, 20),
+ .pre_div_val = 0x0,
+ .pre_div_mask = BM(14, 12),
+ .post_div_val = 0x0,
+ .post_div_mask = BM(9, 8),
+ .mn_ena_val = BIT(24),
+ .mn_ena_mask = BIT(24),
+ .main_output_val = BIT(0),
+ .main_output_mask = BIT(0),
+};
+
+static struct pll_config_regs mmpll4_regs __initdata = {
+ .l_reg = (void __iomem *)MMPLL4_L_VAL,
+ .m_reg = (void __iomem *)MMPLL4_M_VAL,
+ .n_reg = (void __iomem *)MMPLL4_N_VAL,
+ .config_reg = (void __iomem *)MMPLL4_USER_CTL,
+ .mode_reg = (void __iomem *)MMPLL4_MODE,
+ .base = &virt_bases[MMSS_BASE],
+};
+
+/* MMPLL4 at 930 MHz, main output enabled. */
+static struct pll_config mmpll4_config __initdata = {
+ .l = 48,
+ .m = 7,
+ .n = 16,
+ .vco_val = 0x0,
+ .vco_mask = BM(21, 20),
+ .pre_div_val = 0x0,
+ .pre_div_mask = BM(14, 12),
+ .post_div_val = 0x0,
+ .post_div_mask = BM(9, 8),
+ .mn_ena_val = BIT(24),
+ .mn_ena_mask = BIT(24),
+ .main_output_val = BIT(0),
+ .main_output_mask = BIT(0),
+};
+
+static void __init reg_init(void)
+{
+ u32 regval;
+
+ /* MMPLL init */
+ configure_sr_hpm_lp_pll(&mmpll0_config, &mmpll0_regs, 1);
+ configure_sr_hpm_lp_pll(&mmpll1_config, &mmpll1_regs, 1);
+ configure_sr_hpm_lp_pll(&mmpll3_config, &mmpll3_regs, 0);
+ configure_sr_hpm_lp_pll(&mmpll4_config, &mmpll4_regs, 0);
+
+ /* Vote for GPLL0 to turn on. Needed by acpuclock. */
+ regval = readl_relaxed(GCC_REG_BASE(APCS_GPLL_ENA_VOTE));
+ regval |= BIT(0);
+ writel_relaxed(regval, GCC_REG_BASE(APCS_GPLL_ENA_VOTE));
+
+ /* Vote for LPASS and MMSS controller to use GPLL0 */
+ regval = readl_relaxed(GCC_REG_BASE(APCS_CLOCK_BRANCH_ENA_VOTE));
+ writel_relaxed(regval | BIT(26) | BIT(25),
+ GCC_REG_BASE(APCS_CLOCK_BRANCH_ENA_VOTE));
+}
+
+static void __init msmsamarium_clock_post_init(void)
+{
+ /*
+ * Hold an active set vote at a rate of 40MHz for the MMSS NOC AHB
+ * source. Sleep set vote is 0.
+ */
+ /* enable for MMSS */
+ clk_set_rate(&mmssnoc_ahb_a_clk.c, 40000000);
+ clk_prepare_enable(&mmssnoc_ahb_a_clk.c);
+
+ /*
+ * Hold an active set vote for the PNOC AHB source. Sleep set vote is 0.
+ */
+ clk_set_rate(&pnoc_keepalive_a_clk.c, 19200000);
+ clk_prepare_enable(&pnoc_keepalive_a_clk.c);
+
+ /*
+ * Hold an active set vote for CXO; this is because CXO is expected
+ * to remain on whenever CPUs aren't power collapsed.
+ */
+ clk_prepare_enable(&xo_a_clk.c);
+}
+
+#define GCC_CC_PHYS 0xFC400000
+#define GCC_CC_SIZE SZ_8K
+
+#define MMSS_CC_PHYS 0xFD8C0000
+#define MMSS_CC_SIZE SZ_32K
+
+#define APCS_GCC_CC_PHYS 0xF9011000
+#define APCS_GCC_CC_SIZE SZ_4K
+
+static void __init msmsamarium_clock_pre_init(void)
+{
+ virt_bases[GCC_BASE] = ioremap(GCC_CC_PHYS, GCC_CC_SIZE);
+ if (!virt_bases[GCC_BASE])
+ panic("clock-samarium: Unable to ioremap GCC memory!");
+
+ virt_bases[MMSS_BASE] = ioremap(MMSS_CC_PHYS, MMSS_CC_SIZE);
+ if (!virt_bases[MMSS_BASE])
+ panic("clock-samarium: Unable to ioremap MMSS_CC memory!");
+
+ virt_bases[APCS_BASE] = ioremap(APCS_GCC_CC_PHYS, APCS_GCC_CC_SIZE);
+ if (!virt_bases[APCS_BASE])
+ panic("clock-samarium: Unable to ioremap APCS_GCC_CC memory!");
+
+ vdd_dig.regulator[0] = regulator_get(NULL, "vdd_dig");
+ if (IS_ERR(vdd_dig.regulator[0]))
+ panic("clock-samarium: Unable to get the vdd_dig regulator!");
+
+ enable_rpm_scaling();
+
+ reg_init();
+
+ /*
+ * MDSS needs the ahb clock and needs to init before we register the
+ * lookup table.
+ */
+ mdss_clk_ctrl_pre_init(&mdss_ahb_clk.c);
+}
+
+static void __init msmsamarium_rumi_clock_pre_init(void)
+{
+ virt_bases[GCC_BASE] = ioremap(GCC_CC_PHYS, GCC_CC_SIZE);
+ if (!virt_bases[GCC_BASE])
+ panic("clock-samarium: Unable to ioremap GCC memory!");
+
+ vdd_dig.regulator[0] = regulator_get(NULL, "vdd_dig");
+ if (IS_ERR(vdd_dig.regulator[0]))
+ panic("clock-samarium: Unable to get the vdd_dig regulator!");
+}
+
+struct clock_init_data msmsamarium_rumi_clock_init_data __initdata = {
+ .table = msm_clocks_samarium_rumi,
+ .size = ARRAY_SIZE(msm_clocks_samarium_rumi),
+ .pre_init = msmsamarium_rumi_clock_pre_init,
+};
+
+struct clock_init_data msmsamarium_clock_init_data __initdata = {
+ .table = msm_clocks_samarium,
+ .size = ARRAY_SIZE(msm_clocks_samarium),
+ .pre_init = msmsamarium_clock_pre_init,
+ .post_init = msmsamarium_clock_post_init,
+};
diff --git a/arch/arm/mach-msm/cpr-regulator.c b/arch/arm/mach-msm/cpr-regulator.c
index 28afc91..b940cb4 100644
--- a/arch/arm/mach-msm/cpr-regulator.c
+++ b/arch/arm/mach-msm/cpr-regulator.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -117,7 +117,6 @@
#define CPR_INT_DEFAULT (CPR_INT_UP | CPR_INT_DOWN)
#define CPR_NUM_RING_OSC 8
-#define CPR_NUM_SAVE_REGS 10
/* RBCPR Clock Control Register */
#define RBCPR_CLK_SEL_MASK BIT(0)
@@ -144,6 +143,10 @@
int quot_adjust;
};
+static const char * const vdd_apc_name[] = {"vdd-apc-optional-prim",
+ "vdd-apc-optional-sec",
+ "vdd-apc"};
+
enum voltage_change_dir {
NO_CHANGE,
DOWN,
@@ -162,11 +165,9 @@
void __iomem *efuse_base;
/* Process voltage parameters */
- u32 pvs_init_v[CPR_PVS_EFUSE_BINS_MAX];
- u32 pvs_corner_v[NUM_APC_PVS][CPR_FUSE_CORNER_MAX];
+ u32 pvs_corner_v[CPR_FUSE_CORNER_MAX];
/* Process voltage variables */
u32 pvs_bin;
- u32 process;
u32 speed_bin;
/* APC voltage regulator */
struct regulator *vdd_apc;
@@ -176,6 +177,7 @@
int vdd_mx_vmax;
int vdd_mx_vmin_method;
int vdd_mx_vmin;
+ int vdd_mx_corner_map[CPR_FUSE_CORNER_MAX];
/* CPR parameters */
u64 cpr_fuse_bits;
@@ -198,9 +200,6 @@
int *save_ctl;
int *save_irq;
- u32 save_regs[CPR_NUM_SAVE_REGS];
- u32 save_reg_val[CPR_NUM_SAVE_REGS];
-
/* Config parameters */
bool enable;
u32 ref_clk_khz;
@@ -219,7 +218,8 @@
int *corner_map;
u32 num_corners;
int *quot_adjust;
- u32 quotient_adjustment;
+
+ bool is_cpr_suspended;
};
#define CPR_DEBUG_MASK_IRQ BIT(0)
@@ -344,6 +344,22 @@
u32 val;
int fuse_corner = cpr_vreg->corner_map[corner];
+ if (cpr_vreg->is_cpr_suspended)
+ return;
+
+ /* Program Consecutive Up & Down */
+ val = ((cpr_vreg->timer_cons_down & RBIF_TIMER_ADJ_CONS_DOWN_MASK)
+ << RBIF_TIMER_ADJ_CONS_DOWN_SHIFT) |
+ (cpr_vreg->timer_cons_up & RBIF_TIMER_ADJ_CONS_UP_MASK);
+ cpr_masked_write(cpr_vreg, REG_RBIF_TIMER_ADJUST,
+ RBIF_TIMER_ADJ_CONS_UP_MASK |
+ RBIF_TIMER_ADJ_CONS_DOWN_MASK, val);
+ cpr_masked_write(cpr_vreg, REG_RBCPR_CTL,
+ RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN |
+ RBCPR_CTL_SW_AUTO_CONT_ACK_EN,
+ cpr_vreg->save_ctl[corner]);
+ cpr_irq_set(cpr_vreg, cpr_vreg->save_irq[corner]);
+
if (cpr_is_allowed(cpr_vreg) &&
(cpr_vreg->ceiling_volt[fuse_corner] >
cpr_vreg->floor_volt[fuse_corner]))
@@ -355,31 +371,21 @@
static void cpr_ctl_disable(struct cpr_regulator *cpr_vreg)
{
+ if (cpr_vreg->is_cpr_suspended)
+ return;
+
+ cpr_irq_set(cpr_vreg, 0);
+ cpr_ctl_modify(cpr_vreg, RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN |
+ RBCPR_CTL_SW_AUTO_CONT_ACK_EN, 0);
+ cpr_masked_write(cpr_vreg, REG_RBIF_TIMER_ADJUST,
+ RBIF_TIMER_ADJ_CONS_UP_MASK |
+ RBIF_TIMER_ADJ_CONS_DOWN_MASK, 0);
+ cpr_irq_clr(cpr_vreg);
+ cpr_write(cpr_vreg, REG_RBIF_CONT_ACK_CMD, 1);
+ cpr_write(cpr_vreg, REG_RBIF_CONT_NACK_CMD, 1);
cpr_ctl_modify(cpr_vreg, RBCPR_CTL_LOOP_EN, 0);
}
-static void cpr_regs_save(struct cpr_regulator *cpr_vreg)
-{
- int i, offset;
-
- for (i = 0; i < CPR_NUM_SAVE_REGS; i++) {
- offset = cpr_vreg->save_regs[i];
- cpr_vreg->save_reg_val[i] = cpr_read(cpr_vreg, offset);
- }
-}
-
-static void cpr_regs_restore(struct cpr_regulator *cpr_vreg)
-{
- int i, offset;
- u32 val;
-
- for (i = 0; i < CPR_NUM_SAVE_REGS; i++) {
- offset = cpr_vreg->save_regs[i];
- val = cpr_vreg->save_reg_val[i];
- cpr_write(cpr_vreg, offset, val);
- }
-}
-
static void cpr_corner_save(struct cpr_regulator *cpr_vreg, int corner)
{
cpr_vreg->save_ctl[corner] = cpr_read(cpr_vreg, REG_RBCPR_CTL);
@@ -491,12 +497,14 @@
vdd_mx = cpr_vreg->ceiling_volt[fuse_corner];
break;
case VDD_MX_VMIN_APC_SLOW_CORNER_CEILING:
- vdd_mx = cpr_vreg->pvs_corner_v[APC_PVS_SLOW]
- [CPR_FUSE_CORNER_TURBO];
+ vdd_mx = cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_TURBO];
break;
case VDD_MX_VMIN_MX_VMAX:
vdd_mx = cpr_vreg->vdd_mx_vmax;
break;
+ case VDD_MX_VMIN_APC_CORNER_MAP:
+ vdd_mx = cpr_vreg->vdd_mx_corner_map[fuse_corner];
+ break;
default:
vdd_mx = 0;
break;
@@ -597,6 +605,10 @@
RBCPR_CTL_UP_THRESHOLD_SHIFT;
reg_val = reg_mask;
cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
+
+ /* Disable UP interrupt */
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT & ~CPR_INT_UP);
+
return;
}
@@ -693,6 +705,9 @@
RBCPR_CTL_UP_THRESHOLD_SHIFT;
cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
+ /* Re-enable default interrupts */
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT);
+
/* Ack */
cpr_irq_clr_ack(cpr_vreg);
@@ -828,8 +843,7 @@
cpr_ctl_disable(cpr_vreg);
new_volt = cpr_vreg->last_volt[corner];
} else {
- new_volt = cpr_vreg->pvs_corner_v
- [cpr_vreg->process][fuse_corner];
+ new_volt = cpr_vreg->pvs_corner_v[fuse_corner];
}
cpr_debug("[corner:%d, fuse_corner:%d] = %d uV\n", corner, fuse_corner,
@@ -878,12 +892,16 @@
{
cpr_debug("suspend\n");
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
cpr_ctl_disable(cpr_vreg);
disable_irq(cpr_vreg->cpr_irq);
cpr_irq_clr(cpr_vreg);
- cpr_regs_save(cpr_vreg);
+ cpr_vreg->is_cpr_suspended = true;
+
+ mutex_unlock(&cpr_vreg->cpr_mutex);
return 0;
}
@@ -892,12 +910,15 @@
{
cpr_debug("resume\n");
- cpr_regs_restore(cpr_vreg);
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ cpr_vreg->is_cpr_suspended = false;
cpr_irq_clr(cpr_vreg);
enable_irq(cpr_vreg->cpr_irq);
cpr_ctl_enable(cpr_vreg, cpr_vreg->corner);
+ mutex_unlock(&cpr_vreg->cpr_mutex);
return 0;
}
@@ -994,21 +1015,6 @@
val |= RBCPR_CTL_SW_AUTO_CONT_ACK_EN;
cpr_write(cpr_vreg, REG_RBCPR_CTL, val);
- /* Registers to save & restore for suspend */
- cpr_vreg->save_regs[0] = REG_RBCPR_TIMER_INTERVAL;
- cpr_vreg->save_regs[1] = REG_RBCPR_STEP_QUOT;
- cpr_vreg->save_regs[2] = REG_RBIF_TIMER_ADJUST;
- cpr_vreg->save_regs[3] = REG_RBIF_LIMIT;
- cpr_vreg->save_regs[4] = REG_RBIF_SW_VLEVEL;
- cpr_vreg->save_regs[5] = REG_RBIF_IRQ_EN(cpr_vreg->irq_line);
- cpr_vreg->save_regs[6] = REG_RBCPR_CTL;
- cpr_vreg->save_regs[7] = REG_RBCPR_GCNT_TARGET
- (cpr_vreg->cpr_fuse_ro_sel[CPR_FUSE_CORNER_SVS]);
- cpr_vreg->save_regs[8] = REG_RBCPR_GCNT_TARGET
- (cpr_vreg->cpr_fuse_ro_sel[CPR_FUSE_CORNER_NORMAL]);
- cpr_vreg->save_regs[9] = REG_RBCPR_GCNT_TARGET
- (cpr_vreg->cpr_fuse_ro_sel[CPR_FUSE_CORNER_TURBO]);
-
cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT);
val = cpr_read(cpr_vreg, REG_RBCPR_VERSION);
@@ -1053,7 +1059,7 @@
{
u32 uplift_voltage;
u32 uplift_max_volt = 0;
- int rc, i;
+ int rc;
rc = of_property_read_u32(of_node,
"qcom,cpr-uplift-voltage", &uplift_voltage);
@@ -1068,11 +1074,9 @@
return rc;
}
- for (i = 0; i < CPR_PVS_EFUSE_BINS_MAX; i++) {
- cpr_vreg->pvs_init_v[i] += uplift_voltage;
- if (cpr_vreg->pvs_init_v[i] > uplift_max_volt)
- cpr_vreg->pvs_init_v[i] = uplift_max_volt;
- }
+ cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_TURBO] += uplift_voltage;
+ if (cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_TURBO] > uplift_max_volt)
+ cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_TURBO] = uplift_max_volt;
return rc;
}
@@ -1082,11 +1086,11 @@
{
struct device_node *of_node = pdev->dev.of_node;
u64 efuse_bits;
- int rc, process;
+ int rc, i, stripe_size;
u32 pvs_fuse[4], pvs_fuse_redun_sel[5];
- u32 init_v, quot_adjust;
bool redundant;
size_t pvs_bins;
+ u32 *tmp;
rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun-sel",
pvs_fuse_redun_sel, 5);
@@ -1121,13 +1125,26 @@
pvs_bins = 1 << pvs_fuse[2];
- rc = of_property_read_u32_array(of_node, "qcom,pvs-init-voltage",
- cpr_vreg->pvs_init_v, pvs_bins);
+ stripe_size = CPR_FUSE_CORNER_MAX - 1;
+ tmp = kzalloc(sizeof(u32) * pvs_bins * stripe_size, GFP_KERNEL);
+ if (!tmp) {
+ pr_err("memory alloc failed\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-voltage-table",
+ tmp, pvs_bins * stripe_size);
if (rc < 0) {
- pr_err("pvs-init-voltage missing: rc=%d\n", rc);
+ pr_err("pvs-voltage-table missing: rc=%d\n", rc);
+ kfree(tmp);
return rc;
}
+ for (i = CPR_FUSE_CORNER_SVS; i < CPR_FUSE_CORNER_MAX; i++)
+ cpr_vreg->pvs_corner_v[i] = tmp[cpr_vreg->pvs_bin *
+ stripe_size + i - 1];
+ kfree(tmp);
+
if (cpr_vreg->flags & FLAGS_UPLIFT_QUOT_VOLT) {
rc = cpr_voltage_uplift_wa_inc_volt(cpr_vreg, of_node);
if (rc < 0) {
@@ -1136,35 +1153,31 @@
}
}
- init_v = cpr_vreg->pvs_init_v[cpr_vreg->pvs_bin];
- for (process = NUM_APC_PVS - 1; process > APC_PVS_NO; process--) {
- if (init_v <= cpr_vreg->pvs_corner_v
- [process][CPR_FUSE_CORNER_TURBO])
- break;
- }
+ if (cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_TURBO] >
+ cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_TURBO])
+ cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_TURBO] =
+ cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_TURBO];
- if (process == APC_PVS_NO) {
- process = APC_PVS_SLOW;
- cpr_vreg->pvs_corner_v[process][CPR_FUSE_CORNER_TURBO] = init_v;
- cpr_vreg->ceiling_max = init_v;
- } else if (process == APC_PVS_FAST &&
- init_v < cpr_vreg->pvs_corner_v
- [APC_PVS_FAST][CPR_FUSE_CORNER_SVS]) {
- process = APC_PVS_SLOW;
- }
+ for (i = CPR_FUSE_CORNER_SVS; i < CPR_FUSE_CORNER_TURBO; i++)
+ if (cpr_vreg->pvs_corner_v[i] > cpr_vreg->ceiling_volt[i])
+ cpr_vreg->pvs_corner_v[i] = cpr_vreg->ceiling_volt[i];
+ else if (cpr_vreg->pvs_corner_v[i] < cpr_vreg->floor_volt[i])
+ cpr_vreg->pvs_corner_v[i] = cpr_vreg->floor_volt[i];
- pr_info("[row:%d] = 0x%llX, n_bits=%d, bin=%d (%d)",
- pvs_fuse[0], efuse_bits, pvs_fuse[2],
- cpr_vreg->pvs_bin, process);
- pr_info("pvs initial turbo voltage_= from %u to %u\n",
- init_v, cpr_vreg->pvs_corner_v[process][CPR_FUSE_CORNER_TURBO]);
+ cpr_vreg->ceiling_max = cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_TURBO];
- cpr_vreg->process = process;
-
- rc = of_property_read_u32(of_node,
- "qcom,cpr-quotient-adjustment", "_adjust);
- if (!rc)
- cpr_vreg->quotient_adjustment = quot_adjust;
+ pr_info("pvs voltage: [%d %d %d] uV\n",
+ cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_SVS],
+ cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_NORMAL],
+ cpr_vreg->pvs_corner_v[CPR_FUSE_CORNER_TURBO]);
+ pr_info("ceiling voltage: [%d %d %d] uV\n",
+ cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_SVS],
+ cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_NORMAL],
+ cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_TURBO]);
+ pr_info("floor voltage: [%d %d %d] uV\n",
+ cpr_vreg->floor_volt[CPR_FUSE_CORNER_SVS],
+ cpr_vreg->floor_volt[CPR_FUSE_CORNER_NORMAL],
+ cpr_vreg->floor_volt[CPR_FUSE_CORNER_TURBO]);
return 0;
}
@@ -1186,11 +1199,17 @@
struct cpr_regulator *cpr_vreg)
{
struct device_node *of_node = pdev->dev.of_node;
- int rc;
+ int i, rc = 0;
- cpr_vreg->vdd_apc = devm_regulator_get(&pdev->dev, "vdd-apc");
- if (IS_ERR_OR_NULL(cpr_vreg->vdd_apc)) {
+ for (i = 0; i < ARRAY_SIZE(vdd_apc_name); i++) {
+ cpr_vreg->vdd_apc = devm_regulator_get(&pdev->dev,
+ vdd_apc_name[i]);
rc = PTR_RET(cpr_vreg->vdd_apc);
+ if (!IS_ERR_OR_NULL(cpr_vreg->vdd_apc))
+ break;
+ }
+
+ if (rc) {
if (rc != -EPROBE_DEFER)
pr_err("devm_regulator_get: rc=%d\n", rc);
return rc;
@@ -1223,11 +1242,23 @@
pr_err("vdd-mx-vmin-method missing: rc=%d\n", rc);
return rc;
}
- if (cpr_vreg->vdd_mx_vmin_method > VDD_MX_VMIN_MX_VMAX) {
+ if (cpr_vreg->vdd_mx_vmin_method > VDD_MX_VMIN_APC_CORNER_MAP) {
pr_err("Invalid vdd-mx-vmin-method(%d)\n",
cpr_vreg->vdd_mx_vmin_method);
return -EINVAL;
}
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,vdd-mx-corner-map",
+ &cpr_vreg->vdd_mx_corner_map[1],
+ CPR_FUSE_CORNER_MAX - 1);
+ if (rc && cpr_vreg->vdd_mx_vmin_method ==
+ VDD_MX_VMIN_APC_CORNER_MAP) {
+ pr_err("qcom,vdd-mx-corner-map missing: rc=%d\n",
+ rc);
+ return rc;
+ }
+
}
return 0;
@@ -1374,6 +1405,7 @@
int bp_ro_sel[CPR_FUSE_CORNER_MAX];
u32 ro_sel, val;
u64 fuse_bits, fuse_bits_2;
+ u32 quot_adjust[CPR_FUSE_CORNER_MAX];
rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-redun-sel",
cpr_fuse_redun_sel, 5);
@@ -1475,13 +1507,22 @@
& CPR_FUSE_RO_SEL_BITS_MASK;
val = (fuse_bits >> bp_target_quot[i])
& CPR_FUSE_TARGET_QUOT_BITS_MASK;
- val += cpr_vreg->quotient_adjustment;
cpr_vreg->cpr_fuse_target_quot[i] = val;
cpr_vreg->cpr_fuse_ro_sel[i] = ro_sel;
pr_info("Corner[%d]: ro_sel = %d, target quot = %d\n",
i, ro_sel, val);
}
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-quotient-adjustment",
+ "_adjust[1], CPR_FUSE_CORNER_MAX - 1);
+ if (!rc) {
+ for (i = CPR_FUSE_CORNER_SVS; i < CPR_FUSE_CORNER_MAX; i++) {
+ cpr_vreg->cpr_fuse_target_quot[i] += quot_adjust[i];
+ pr_info("Corner[%d]: adjusted target quot = %d\n",
+ i, cpr_vreg->cpr_fuse_target_quot[i]);
+ }
+ }
+
if (cpr_vreg->flags & FLAGS_UPLIFT_QUOT_VOLT) {
cpr_voltage_uplift_wa_inc_quot(cpr_vreg, of_node);
for (i = CPR_FUSE_CORNER_SVS; i < CPR_FUSE_CORNER_MAX; i++) {
@@ -1534,17 +1575,9 @@
if (!cpr_vreg->last_volt)
return -EINVAL;
- /* Construct CPR voltage limits */
- for (i = CPR_FUSE_CORNER_SVS; i < CPR_FUSE_CORNER_MAX; i++) {
- cpr_vreg->floor_volt[i] =
- cpr_vreg->pvs_corner_v[APC_PVS_FAST][i];
- cpr_vreg->ceiling_volt[i] =
- cpr_vreg->pvs_corner_v[APC_PVS_SLOW][i];
- }
-
for (i = 1; i < size; i++) {
cpr_vreg->last_volt[i] = cpr_vreg->pvs_corner_v
- [cpr_vreg->process][cpr_vreg->corner_map[i]];
+ [cpr_vreg->corner_map[i]];
}
return 0;
@@ -1781,33 +1814,22 @@
struct cpr_regulator *cpr_vreg)
{
struct device_node *of_node = pdev->dev.of_node;
- int rc, i, j;
+ int rc, i;
u32 min_uv = 0;
- rc = of_property_read_u32_array(of_node,
- "qcom,pvs-corner-ceiling-slow",
- &cpr_vreg->pvs_corner_v[APC_PVS_SLOW][CPR_FUSE_CORNER_SVS],
- CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-voltage-ceiling",
+ &cpr_vreg->ceiling_volt[CPR_FUSE_CORNER_SVS],
+ CPR_FUSE_CORNER_MAX - 1);
if (rc < 0) {
- pr_err("pvs-corner-ceiling-slow missing: rc=%d\n", rc);
+ pr_err("cpr-voltage-ceiling missing: rc=%d\n", rc);
return rc;
}
- rc = of_property_read_u32_array(of_node,
- "qcom,pvs-corner-ceiling-nom",
- &cpr_vreg->pvs_corner_v[APC_PVS_NOM][CPR_FUSE_CORNER_SVS],
- CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-voltage-floor",
+ &cpr_vreg->floor_volt[CPR_FUSE_CORNER_SVS],
+ CPR_FUSE_CORNER_MAX - 1);
if (rc < 0) {
- pr_err("pvs-corner-ceiling-norm missing: rc=%d\n", rc);
- return rc;
- }
-
- rc = of_property_read_u32_array(of_node,
- "qcom,pvs-corner-ceiling-fast",
- &cpr_vreg->pvs_corner_v[APC_PVS_FAST][CPR_FUSE_CORNER_SVS],
- CPR_FUSE_CORNER_MAX - CPR_FUSE_CORNER_SVS);
- if (rc < 0) {
- pr_err("pvs-corner-ceiling-fast missing: rc=%d\n", rc);
+ pr_err("cpr-voltage-floor missing: rc=%d\n", rc);
return rc;
}
@@ -1821,22 +1843,13 @@
if (cpr_vreg->flags & FLAGS_SET_MIN_VOLTAGE) {
of_property_read_u32(of_node, "qcom,cpr-cond-min-voltage",
&min_uv);
- for (i = APC_PVS_SLOW; i < NUM_APC_PVS; i++)
- for (j = CPR_FUSE_CORNER_SVS; j < CPR_FUSE_CORNER_MAX;
- j++)
- if (cpr_vreg->pvs_corner_v[i][j] < min_uv)
- cpr_vreg->pvs_corner_v[i][j] = min_uv;
- }
-
- /* Set ceiling max and use it for APC_PVS_NO */
- cpr_vreg->ceiling_max =
- cpr_vreg->pvs_corner_v[APC_PVS_SLOW][CPR_FUSE_CORNER_TURBO];
-
- for (i = APC_PVS_SLOW; i < NUM_APC_PVS; i++) {
- pr_info("[%d] [%d %d %d] uV\n", i,
- cpr_vreg->pvs_corner_v[i][CPR_FUSE_CORNER_SVS],
- cpr_vreg->pvs_corner_v[i][CPR_FUSE_CORNER_NORMAL],
- cpr_vreg->pvs_corner_v[i][CPR_FUSE_CORNER_TURBO]);
+ for (i = CPR_FUSE_CORNER_SVS; i < CPR_FUSE_CORNER_MAX; i++)
+ if (cpr_vreg->ceiling_volt[i] < min_uv) {
+ cpr_vreg->ceiling_volt[i] = min_uv;
+ cpr_vreg->floor_volt[i] = min_uv;
+ } else if (cpr_vreg->floor_volt[i] < min_uv) {
+ cpr_vreg->floor_volt[i] = min_uv;
+ }
}
return 0;
diff --git a/arch/arm/mach-msm/cpufreq.c b/arch/arm/mach-msm/cpufreq.c
index 46505e0..c81720e 100644
--- a/arch/arm/mach-msm/cpufreq.c
+++ b/arch/arm/mach-msm/cpufreq.c
@@ -228,6 +228,9 @@
static unsigned int msm_cpufreq_get_freq(unsigned int cpu)
{
+ if (is_clk && is_sync)
+ cpu = 0;
+
if (is_clk)
return clk_get_rate(cpu_clk[cpu]) / 1000;
@@ -259,7 +262,7 @@
init_completion(&cpu_work->complete);
/* synchronous cpus share the same policy */
- if (!cpu_clk[policy->cpu])
+ if (is_clk && !cpu_clk[policy->cpu])
return 0;
if (cpufreq_frequency_table_cpuinfo(policy, table)) {
diff --git a/arch/arm/mach-msm/dfe-fsm9xxx.c b/arch/arm/mach-msm/dfe-fsm9xxx.c
index 66272d2..3470710 100644
--- a/arch/arm/mach-msm/dfe-fsm9xxx.c
+++ b/arch/arm/mach-msm/dfe-fsm9xxx.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -50,6 +50,8 @@
HH_IRQ_FIFO_SIZE) == \
(pdev)->irq_fifo_head)
+#define UINT32_MAX (0xFFFFFFFFU)
+
static struct hh_dev_node_info {
spinlock_t hh_lock;
char irq_fifo[HH_IRQ_FIFO_SIZE];
@@ -220,8 +222,9 @@
return -EFAULT;
if (!HH_OFFSET_VALID(param.offset))
return -EINVAL;
- if (param.num == 0)
- break;
+ if ((param.num == 0) ||
+ (param.num >= (UINT32_MAX / sizeof(unsigned int))))
+ return -EINVAL;
req_sz = sizeof(unsigned int) * param.num;
if (pdfi->array_num < param.num) {
@@ -270,8 +273,10 @@
if (copy_from_user(¶m, argp, sizeof param))
return -EFAULT;
- if (param.num == 0)
- break;
+ if ((param.num == 0) ||
+ (param.num >= (UINT32_MAX /
+ sizeof(struct dfe_command_entry))))
+ return -EINVAL;
req_sz = sizeof(struct dfe_command_entry) * param.num;
if (pdfi->cmd_num < param.num) {
diff --git a/arch/arm/mach-msm/ext-buck-control.c b/arch/arm/mach-msm/ext-buck-control.c
new file mode 100644
index 0000000..e0c349a
--- /dev/null
+++ b/arch/arm/mach-msm/ext-buck-control.c
@@ -0,0 +1,121 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <mach/rpm-smd.h>
+
+#define RPM_REQUEST_TYPE_GPIO 0x6f697067 /* gpio */
+#define RPM_GPIO_NUMB_KEY 0x626d756e /* numb */
+#define RPM_GPIO_STAT_KEY 0x74617473 /* stat */
+#define RPM_GPIO_SETT_KEY 0x74746573 /* sett */
+#define RPM_GPIO_RESOURCE_ID 3
+#define GPIO_ON 1
+#define GPIO_OFF 0
+
+static int msm_send_ext_buck_votes(int gpio_num, int settling_time)
+{
+ int rc;
+ int gpio_status_sleep = GPIO_OFF;
+ int gpio_status_active = GPIO_ON;
+
+ struct msm_rpm_kvp kvp_sleep[] = {
+ {
+ .key = RPM_GPIO_STAT_KEY,
+ .data = (void *)&gpio_status_sleep,
+ .length = sizeof(gpio_status_sleep),
+ }
+ };
+
+ struct msm_rpm_kvp kvp_active[] = {
+ {
+ .key = RPM_GPIO_NUMB_KEY,
+ .data = (void *)&gpio_num,
+ .length = sizeof(gpio_num),
+ },
+ {
+ .key = RPM_GPIO_STAT_KEY,
+ .data = (void *)&gpio_status_active,
+ .length = sizeof(gpio_status_active),
+ },
+ {
+ .key = RPM_GPIO_SETT_KEY,
+ .data = (void *)&settling_time,
+ .length = sizeof(settling_time),
+ },
+ };
+
+ rc = msm_rpm_send_message(MSM_RPM_CTX_ACTIVE_SET,
+ RPM_REQUEST_TYPE_GPIO, RPM_GPIO_RESOURCE_ID, kvp_active,
+ ARRAY_SIZE(kvp_active));
+ WARN(rc < 0, "RPM GPIO toggling (active set) did not enable!\n");
+
+ rc = msm_rpm_send_message(MSM_RPM_CTX_SLEEP_SET,
+ RPM_REQUEST_TYPE_GPIO, RPM_GPIO_RESOURCE_ID, kvp_sleep,
+ ARRAY_SIZE(kvp_sleep));
+ WARN(rc < 0, "RPM GPIO toggling (sleep set) did not enable!\n");
+
+ return rc;
+}
+
+static int msm_ext_buck_probe(struct platform_device *pdev)
+{
+ char *key = NULL;
+ int gpio_num;
+ int settling_time_us;
+ int ret = 0;
+
+ key = "qcom,gpio-num";
+ ret = of_property_read_u32(pdev->dev.of_node, key, &gpio_num);
+ if (ret) {
+ pr_err("%s: Cannot read %s from dt (ret:%d)\n",
+ __func__, key, ret);
+ return ret;
+ }
+
+ key = "qcom,settling-time-us";
+ ret = of_property_read_u32(pdev->dev.of_node, key,
+ &settling_time_us);
+ if (ret) {
+ pr_err("%s: Cannot read %s from dt (ret:%d)\n",
+ __func__, key, ret);
+ return ret;
+ }
+
+ ret = msm_send_ext_buck_votes(gpio_num, settling_time_us);
+
+ return ret;
+}
+
+static struct of_device_id msm_ext_buck_table[] = {
+ {.compatible = "qcom,ext-buck-control"},
+ {},
+};
+
+static struct platform_driver msm_ext_buck_driver = {
+ .probe = msm_ext_buck_probe,
+ .driver = {
+ .name = "ext-buck-control",
+ .owner = THIS_MODULE,
+ .of_match_table = msm_ext_buck_table,
+ },
+};
+
+static int __init msm_ext_buck_init(void)
+{
+ return platform_driver_register(&msm_ext_buck_driver);
+}
+late_initcall(msm_ext_buck_init);
diff --git a/arch/arm/mach-msm/gpiomux.c b/arch/arm/mach-msm/gpiomux.c
index 1f7d56a..06eb6dc 100644
--- a/arch/arm/mach-msm/gpiomux.c
+++ b/arch/arm/mach-msm/gpiomux.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010,2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010,2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -123,6 +123,11 @@
}
EXPORT_SYMBOL(msm_gpiomux_put);
+int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg)
+{
+ return readl_relaxed(MSM_TLMM_BASE + misc_reg);
+}
+
void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val)
{
writel_relaxed(val, MSM_TLMM_BASE + misc_reg);
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 6370bd4..89e3b51 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -183,7 +183,8 @@
};
struct msm_camera_gpio_num_info {
- uint16_t gpio_num[7];
+ uint16_t gpio_num[10];
+ uint8_t valid[10];
};
struct msm_camera_gpio_conf {
@@ -513,6 +514,10 @@
/**
* msm_i2c_platform_data: i2c-qup driver configuration data
*
+ * @clk_ctl_xfer : When true, the clocks's state (prepare_enable/
+ * unprepare_disable) is controlled by i2c-transaction's begining and
+ * ending. When false, the clock's state is controlled by runtime-pm
+ * events.
* @active_only when set, votes when system active and removes the vote when
* system goes idle (optimises for performance). When unset, voting using
* runtime pm (optimizes for power).
@@ -521,6 +526,7 @@
*/
struct msm_i2c_platform_data {
int clk_freq;
+ bool clk_ctl_xfer;
uint32_t rmutex;
const char *rsl_id;
uint32_t pm_lat;
diff --git a/arch/arm/mach-msm/include/mach/camera2.h b/arch/arm/mach-msm/include/mach/camera2.h
index a9da79e..7024045 100644
--- a/arch/arm/mach-msm/include/mach/camera2.h
+++ b/arch/arm/mach-msm/include/mach/camera2.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -37,12 +37,6 @@
S_EXIT
};
-enum cci_i2c_master_t {
- MASTER_0,
- MASTER_1,
- MASTER_MAX,
-};
-
struct msm_camera_slave_info {
uint16_t sensor_slave_addr;
uint16_t sensor_id_reg_addr;
@@ -68,19 +62,32 @@
uint16_t order;
};
-struct msm_camera_sensor_board_info {
- const char *sensor_name;
- struct msm_camera_slave_info *slave_info;
- struct msm_camera_csi_lane_params *csi_lane_params;
+struct msm_camera_power_ctrl_t {
+ struct device *dev;
+ struct msm_sensor_power_setting *power_setting;
+ uint16_t power_setting_size;
+ struct msm_sensor_power_setting *power_down_setting;
+ uint16_t power_down_setting_size;
+ struct msm_camera_gpio_conf *gpio_conf;
struct camera_vreg_t *cam_vreg;
int num_vreg;
- struct msm_camera_sensor_strobe_flash_data *strobe_flash_data;
- struct msm_camera_gpio_conf *gpio_conf;
- struct msm_actuator_info *actuator_info;
struct msm_camera_i2c_conf *i2c_conf;
+ struct msm_cam_clk_info *clk_info;
+ uint16_t clk_info_size;
+};
+
+struct msm_camera_sensor_board_info {
+ const char *sensor_name;
+ const char *eeprom_name;
+ const char *actuator_name;
+ struct msm_camera_slave_info *slave_info;
+ struct msm_camera_csi_lane_params *csi_lane_params;
+ struct msm_camera_sensor_strobe_flash_data *strobe_flash_data;
+ struct msm_actuator_info *actuator_info;
struct msm_sensor_info_t *sensor_info;
- struct msm_sensor_init_params *sensor_init_params;
const char *misc_regulator;
+ struct msm_camera_power_ctrl_t power_info;
+ struct msm_camera_sensor_slave_info *cam_slave_info;
};
enum msm_camera_i2c_cmd_type {
@@ -112,31 +119,37 @@
uint32_t delay;
};
-struct eeprom_memory_map_t {
+struct eeprom_slave_add_t {
+ uint32_t addr;
+};
+
+struct msm_eeprom_memory_map_t {
struct eeprom_map_t page;
struct eeprom_map_t pageen;
struct eeprom_map_t poll;
struct eeprom_map_t mem;
+ struct eeprom_slave_add_t saddr;
};
-struct msm_camera_power_ctrl_t {
- struct device *dev;
- struct msm_sensor_power_setting *power_setting;
- uint16_t power_setting_size;
- struct msm_camera_gpio_conf *gpio_conf;
- struct camera_vreg_t *cam_vreg;
- int num_vreg;
- struct msm_camera_i2c_conf *i2c_conf;
- struct msm_cam_clk_info *clk_info;
- uint16_t clk_info_size;
+struct msm_eeprom_memory_block_t {
+ struct msm_eeprom_memory_map_t *map;
+ uint32_t num_map; /* number of map blocks */
+ uint8_t *mapdata;
+ uint32_t num_data; /* size of total mapdata */
+};
+
+struct msm_eeprom_mm_t {
+ uint32_t mm_support;
+ uint32_t mm_compression;
+ uint32_t mm_offset;
+ uint32_t mm_size;
};
struct msm_eeprom_board_info {
const char *eeprom_name;
uint16_t i2c_slaveaddr;
- uint32_t num_blocks;
- struct eeprom_memory_map_t *eeprom_map;
struct msm_camera_power_ctrl_t power_info;
+ struct msm_eeprom_mm_t mm_data;
};
#endif
diff --git a/arch/arm/mach-msm/include/mach/gpiomux.h b/arch/arm/mach-msm/include/mach/gpiomux.h
index 122ffaa..2278677 100644
--- a/arch/arm/mach-msm/include/mach/gpiomux.h
+++ b/arch/arm/mach-msm/include/mach/gpiomux.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011,2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2011,2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -118,8 +118,6 @@
TLMM_CDC_HDRV_PULL_CTL = 0x2058,
};
-void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val);
-
#ifdef CONFIG_MSM_GPIOMUX
/* Before using gpiomux, initialize the subsystem by telling it how many
@@ -170,6 +168,14 @@
* should use msm_gpiomux_write.
*/
void __msm_gpiomux_write(unsigned gpio, struct gpiomux_setting val);
+
+/* Functions that provide an API for drivers to read from and write to
+ * miscellaneous TLMM registers.
+ */
+int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg);
+
+void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val);
+
#else
static inline int msm_gpiomux_init(size_t ngpio)
{
@@ -195,5 +201,16 @@
{
return -ENOSYS;
}
+
+static inline int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg)
+{
+ return -ENOSYS;
+}
+
+static inline void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg,
+ int val)
+{
+}
+
#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_bus.h b/arch/arm/mach-msm/include/mach/msm_bus.h
index ebc43da..57f781f 100644
--- a/arch/arm/mach-msm/include/mach/msm_bus.h
+++ b/arch/arm/mach-msm/include/mach/msm_bus.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -75,6 +75,7 @@
*/
#ifdef CONFIG_MSM_BUS_SCALING
+int __init msm_bus_fabric_init_driver(void);
uint32_t msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata);
int msm_bus_scale_client_update_request(uint32_t cl, unsigned int index);
void msm_bus_scale_unregister_client(uint32_t cl);
@@ -83,6 +84,8 @@
int msm_bus_axi_portunhalt(int master_port);
#else
+static inline int __init msm_bus_fabric_init_driver(void) { return 0; }
+
static inline uint32_t
msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata)
{
diff --git a/arch/arm/mach-msm/include/mach/msm_bus_board.h b/arch/arm/mach-msm/include/mach/msm_bus_board.h
index ef835b8..bc22517 100644
--- a/arch/arm/mach-msm/include/mach/msm_bus_board.h
+++ b/arch/arm/mach-msm/include/mach/msm_bus_board.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -41,6 +41,7 @@
int hw_sel;
void *hw_data;
uint32_t qos_freq;
+ uint32_t qos_baseoffset;
bool virt;
};
diff --git a/arch/arm/mach-msm/include/mach/msm_qmi_interface.h b/arch/arm/mach-msm/include/mach/msm_qmi_interface.h
index 1641e8c..4bcb0e7 100644
--- a/arch/arm/mach-msm/include/mach/msm_qmi_interface.h
+++ b/arch/arm/mach-msm/include/mach/msm_qmi_interface.h
@@ -172,37 +172,44 @@
* qmi_connect_to_service() - Connect the QMI handle with a QMI service
* @handle: QMI handle to be connected with the QMI service.
* @service_id: Service id to identify the QMI service.
- * @instance_id: Instance id to identify the instance of the QMI service.
+ * @service_vers: Version to identify the compatibility.
+ * @service_ins: Instance id to identify the instance of the QMI service.
*
* @return: 0 on success, < 0 on error.
*/
int qmi_connect_to_service(struct qmi_handle *handle,
- uint32_t service_id, uint32_t instance_id);
+ uint32_t service_id,
+ uint32_t service_vers,
+ uint32_t service_ins);
/**
* qmi_svc_event_notifier_register() - Register a notifier block to receive
* events regarding a QMI service
* @service_id: Service ID to identify the QMI service.
- * @instance_id: Instance ID to identify the instance of the QMI service.
+ * @service_vers: Version to identify the compatibility.
+ * @service_ins: Instance ID to identify the instance of the QMI service.
* @nb: Notifier block used to receive the event.
*
* @return: 0 if successfully registered, < 0 on error.
*/
int qmi_svc_event_notifier_register(uint32_t service_id,
- uint32_t instance_id,
+ uint32_t service_vers,
+ uint32_t service_ins,
struct notifier_block *nb);
/**
* qmi_svc_event_notifier_unregister() - Unregister service event
* notifier block
* @service_id: Service ID to identify the QMI service.
- * @instance_id: Instance ID to identify the instance of the QMI service.
+ * @service_vers: Version to identify the compatibility.
+ * @service_ins: Instance ID to identify the instance of the QMI service.
* @nb: Notifier block registered to receive the events.
*
* @return: 0 if successfully registered, < 0 on error.
*/
int qmi_svc_event_notifier_unregister(uint32_t service_id,
- uint32_t instance_id,
+ uint32_t service_vers,
+ uint32_t service_ins,
struct notifier_block *nb);
#else
@@ -260,20 +267,23 @@
static inline int qmi_connect_to_service(struct qmi_handle *handle,
uint32_t service_id,
- uint32_t instance_id)
+ uint32_t service_vers,
+ uint32_t service_ins)
{
return -ENODEV;
}
static inline int qmi_svc_event_notifier_register(uint32_t service_id,
- uint32_t instance_id,
+ uint32_t service_vers,
+ uint32_t service_ins,
struct notifier_block *nb)
{
return -ENODEV;
}
static inline int qmi_svc_event_notifier_unregister(uint32_t service_id,
- uint32_t instance_id,
+ uint32_t service_vers,
+ uint32_t service_ins,
struct notifier_block *nb)
{
return -ENODEV;
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h b/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h
index 9a27fd2..faf50d2 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/usf.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -132,13 +132,6 @@
uint8_t *params_data;
};
-/* Input events sources */
-enum us_input_event_src_type {
- US_INPUT_SRC_PEN,
- US_INPUT_SRC_FINGER,
- US_INPUT_SRC_UNDEF
-};
-
struct us_input_info_type {
/* Touch screen dimensions: min & max;for input module */
int tsc_x_dim[MIN_MAX_DIM];
@@ -149,12 +142,10 @@
int tsc_y_tilt[MIN_MAX_DIM];
/* Touch screen pressure limits: min & max; for input module */
int tsc_pressure[MIN_MAX_DIM];
- /* The requested side buttons bitmap */
- uint16_t req_side_buttons_bitmap;
+ /* The requested buttons bitmap */
+ uint16_t req_buttons_bitmap;
/* Bitmap of types of events (USF_X_EVENT), produced by calculator */
uint16_t event_types;
- /* Input event source */
- enum us_input_event_src_type event_src;
/* Bitmap of types of events from devs, conflicting with USF */
uint16_t conflicting_event_types;
};
@@ -179,8 +170,8 @@
int inclinations[TILTS_DIM];
/* [0-1023] (10bits); 0 - pen up */
uint32_t pressure;
-/* Bitmap for side button state. 1 - down, 0 - up */
- uint16_t side_buttons_state_bitmap;
+/* Bitmap for button state. 1 - down, 0 - up */
+ uint16_t buttons_state_bitmap;
};
/* Mouse buttons, supported by USF */
diff --git a/arch/arm/mach-msm/include/mach/qseecomi.h b/arch/arm/mach-msm/include/mach/qseecomi.h
index 222a171..cb850c2 100644
--- a/arch/arm/mach-msm/include/mach/qseecomi.h
+++ b/arch/arm/mach-msm/include/mach/qseecomi.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,7 @@
#define QSEOS_RESULT_FAIL_KS_ALREADY_DONE -69
#define QSEOS_RESULT_FAIL_KEY_ID_DNE -70
#define QSEOS_RESULT_FAIL_INCORRECT_PSWD -71
+#define QSEOS_RESULT_FAIL_MAX_ATTEMPT -72
enum qseecom_command_scm_resp_type {
QSEOS_APP_ID = 0xEE01,
diff --git a/arch/arm/mach-msm/include/mach/remote_spinlock.h b/arch/arm/mach-msm/include/mach/remote_spinlock.h
index 8c8b821..8ec68a1 100644
--- a/arch/arm/mach-msm/include/mach/remote_spinlock.h
+++ b/arch/arm/mach-msm/include/mach/remote_spinlock.h
@@ -1,4 +1,5 @@
-/* Copyright (c) 2009, 2011, 2013 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2009, 2011, 2013-2014 The Linux Foundation.
+ * All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,6 +23,9 @@
#include <linux/io.h>
#include <linux/types.h>
+#define REMOTE_SPINLOCK_NUM_PID 128
+#define REMOTE_SPINLOCK_TID_START REMOTE_SPINLOCK_NUM_PID
+
/* Remote spinlock definitions. */
struct dek_spinlock {
@@ -48,6 +52,8 @@
int _remote_spin_trylock(_remote_spinlock_t *lock);
int _remote_spin_release(_remote_spinlock_t *lock, uint32_t pid);
int _remote_spin_owner(_remote_spinlock_t *lock);
+void _remote_spin_lock_rlock_id(_remote_spinlock_t *lock, uint32_t tid);
+void _remote_spin_unlock_rlock(_remote_spinlock_t *lock);
#else
static inline
int _remote_spin_lock_init(remote_spinlock_id_t id, _remote_spinlock_t *lock)
@@ -69,6 +75,9 @@
{
return -ENODEV;
}
+static inline void _remote_spin_lock_rlock_id(_remote_spinlock_t *lock,
+ uint32_t tid) {}
+static inline void _remote_spin_unlock_rlock(_remote_spinlock_t *lock) {}
#endif
diff --git a/arch/arm/mach-msm/lpm_levels.c b/arch/arm/mach-msm/lpm_levels.c
index 06160f7..7128017 100644
--- a/arch/arm/mach-msm/lpm_levels.c
+++ b/arch/arm/mach-msm/lpm_levels.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -271,7 +271,7 @@
{
int best_level = -1;
int i;
- uint32_t best_level_pwr = ~0UL;
+ uint32_t best_level_pwr = ~0U;
uint32_t pwr;
uint32_t latency_us = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
@@ -341,7 +341,8 @@
const struct cpumask *nextcpu;
spin_lock(&system_state->sync_lock);
- if (num_powered_cores != system_state->num_cores_in_sync) {
+ if (index < 0 ||
+ num_powered_cores != system_state->num_cores_in_sync) {
spin_unlock(&system_state->sync_lock);
return;
}
@@ -418,7 +419,7 @@
system_lvl->num_cpu_votes--;
}
- if (!first_core_up)
+ if (!first_core_up || index < 0)
goto unlock_and_return;
if (default_l2_mode != system_state->system_level[index].l2_mode)
@@ -429,6 +430,7 @@
msm_mpm_exit_sleep(from_idle);
}
unlock_and_return:
+ system_state->last_entered_cluster_index = -1;
spin_unlock(&system_state->sync_lock);
}
@@ -490,7 +492,7 @@
static noinline int lpm_cpu_power_select(struct cpuidle_device *dev, int *index)
{
int best_level = -1;
- uint32_t best_level_pwr = ~0UL;
+ uint32_t best_level_pwr = ~0U;
uint32_t latency_us = pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
uint32_t sleep_us =
(uint32_t)(ktime_to_us(tick_nohz_get_sleep_length()));
@@ -720,14 +722,11 @@
int idx;
struct lpm_cpu_level *cpu_level = &system_state->cpu_level[cpu_index];
- cpu_level = &system_state->cpu_level[cpu_index];
-
lpm_cpu_prepare(system_state, cpu_index, from_idle);
idx = lpm_system_select(system_state, cpu_index, from_idle);
- if (idx >= 0)
- lpm_system_prepare(system_state, idx, from_idle);
+ lpm_system_prepare(system_state, idx, from_idle);
msm_cpu_pm_enter_sleep(cpu_level->mode, from_idle);
@@ -755,7 +754,7 @@
do_div(time, 1000);
dev->last_residency = (int)time;
local_irq_enable();
- return index;
+ return idx;
}
static int lpm_suspend_enter(suspend_state_t state)
@@ -969,9 +968,8 @@
goto fail;
}
- if (l->l2_mode == MSM_SPM_L2_MODE_GDHS ||
- l->l2_mode == MSM_SPM_L2_MODE_POWER_COLLAPSE)
- l->notify_rpm = true;
+ key = "qcom,send-rpm-sleep-set";
+ l->notify_rpm = of_property_read_bool(node, key);
if (l->l2_mode >= MSM_SPM_L2_MODE_GDHS)
l->sync = true;
@@ -1013,6 +1011,7 @@
}
sys_state.system_level = level;
sys_state.num_system_levels = num_levels;
+ sys_state.last_entered_cluster_index = -1;
return ret;
fail:
kfree(level);
diff --git a/arch/arm/mach-msm/msm-buspm-dev.h b/arch/arm/mach-msm/msm-buspm-dev.h
index a951093..45282c1 100644
--- a/arch/arm/mach-msm/msm-buspm-dev.h
+++ b/arch/arm/mach-msm/msm-buspm-dev.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011,2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -23,7 +23,7 @@
/* Read/write data into kernel buffer */
struct buspm_xfer_req {
- int size; /* Size of this request, in bytes */
+ unsigned int size; /* Size of this request, in bytes */
void *data; /* Data buffer to transfer data to/from */
};
diff --git a/arch/arm/mach-msm/msm-pm.c b/arch/arm/mach-msm/msm-pm.c
index 865cd0a..f9a9343 100644
--- a/arch/arm/mach-msm/msm-pm.c
+++ b/arch/arm/mach-msm/msm-pm.c
@@ -39,6 +39,7 @@
#include "scm-boot.h"
#include "spm.h"
#include "pm-boot.h"
+#include "clock.h"
#define CREATE_TRACE_POINTS
#include <mach/trace_msm_low_power.h>
@@ -452,8 +453,8 @@
if (!msm_pc_debug_counters)
return;
- cnt = readl_relaxed(msm_pc_debug_counters + cpu * 4 + offset * 4);
- writel_relaxed(++cnt, msm_pc_debug_counters + cpu * 4 + offset * 4);
+ cnt = readl_relaxed(msm_pc_debug_counters + cpu * 4 * MSM_PC_NUM_COUNTERS + offset * 4);
+ writel_relaxed(++cnt, msm_pc_debug_counters + cpu * 4 * MSM_PC_NUM_COUNTERS + offset * 4);
mb();
}
@@ -641,6 +642,14 @@
if (MSM_PM_DEBUG_POWER_COLLAPSE & msm_pm_debug_mask)
pr_info("CPU%u: %s: pre power down\n", cpu, __func__);
+ /* This spews a lot of messages when a core is hotplugged. This
+ * information is most useful from last core going down during
+ * power collapse
+ */
+ if ((!from_idle && cpu_online(cpu))
+ || (MSM_PM_DEBUG_IDLE_CLK & msm_pm_debug_mask))
+ clock_debug_print_enabled();
+
avsdscr = avs_get_avsdscr();
avscsr = avs_get_avscsr();
avs_set_avscsr(0); /* Disable AVS */
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
index 058e409..72e3ec3 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -297,6 +297,21 @@
return CREATE_PNODE_ID(src, pnode_num);
}
+static uint64_t get_node_maxib(struct msm_bus_inode_info *info)
+{
+ int i, ctx;
+ uint64_t maxib = 0;
+
+ for (i = 0; i <= info->num_pnodes; i++) {
+ for (ctx = 0; ctx < NUM_CTX; ctx++)
+ maxib = max(info->pnode[i].clk[ctx], maxib);
+ }
+
+ MSM_BUS_DBG("%s: Node %d numpnodes %d maxib %llu", __func__,
+ info->num_pnodes, info->node_info->id, maxib);
+ return maxib;
+}
+
/**
* update_path() - Update the path with the bandwidth and clock values, as
* requested by the client.
@@ -344,15 +359,6 @@
return -ENXIO;
}
- /**
- * If master supports dual configuration, check if
- * the configuration needs to be changed based on
- * incoming requests
- */
- if (info->node_info->dual_conf)
- fabdev->algo->config_master(fabdev, info,
- req_clk, req_bw);
-
info->link_info.sel_bw = &info->link_info.bw[ctx];
info->link_info.sel_clk = &info->link_info.clk[ctx];
*info->link_info.sel_bw += add_bw;
@@ -366,6 +372,19 @@
info->pnode[index].sel_clk = &info->pnode[index].clk[ctx &
cl_active_flag];
*info->pnode[index].sel_bw += add_bw;
+ *info->pnode[index].sel_clk = req_clk;
+
+ /**
+ * If master supports dual configuration, check if
+ * the configuration needs to be changed based on
+ * incoming requests
+ */
+ if (info->node_info->dual_conf) {
+ uint64_t node_maxib = 0;
+ node_maxib = get_node_maxib(info);
+ fabdev->algo->config_master(fabdev, info,
+ node_maxib, req_bw);
+ }
info->link_info.num_tiers = info->node_info->num_tiers;
info->link_info.tier = info->node_info->tier;
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c b/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c
index c745f92..5747f79 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_bimc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1919,10 +1919,12 @@
qbw.thh = div_s64((110 * bw), 100);
/* Check if info is a shared master.
* If it is, mark it dirty
- * If it isn't, then set QOS Bandwidth
+ * If it isn't, then set QOS Bandwidth.
+ * Also if dual-conf is set, don't program bw regs.
**/
- msm_bus_bimc_set_qos_bw(binfo,
- info->node_info->qport[i], &qbw);
+ if (!info->node_info->dual_conf)
+ msm_bus_bimc_set_qos_bw(binfo,
+ info->node_info->qport[i], &qbw);
}
}
@@ -1930,13 +1932,9 @@
ports = hop->node_info->num_sports;
MSM_BUS_DBG("BIMC: ID: %d, Sports: %d\n", hop->node_info->priv_id,
ports);
- if (ports)
- bw = INTERLEAVED_BW(fab_pdata, add_bw, ports);
- else
- return;
for (i = 0; i < ports; i++) {
- sel_cd->slv[hop->node_info->slavep[i]].bw += bw;
+ sel_cd->slv[hop->node_info->slavep[i]].bw += add_bw;
sel_cd->slv[hop->node_info->slavep[i]].hw_id =
hop->node_info->slv_hw_id;
MSM_BUS_DBG("BIMC: Update slave_bw: ID: %d -> %llu\n",
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
index 7c694a7..626c5e8 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -896,9 +896,17 @@
},
};
-static int __init msm_bus_fabric_init_driver(void)
+int __init msm_bus_fabric_init_driver(void)
{
+ static bool initialized;
+
+ if (initialized)
+ return 0;
+ else
+ initialized = true;
+
MSM_BUS_ERR("msm_bus_fabric_init_driver\n");
return platform_driver_register(&msm_bus_fabric_driver);
}
+EXPORT_SYMBOL(msm_bus_fabric_init_driver);
subsys_initcall(msm_bus_fabric_init_driver);
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_noc.c b/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
index 8f7b7f2..988d720 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_noc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,12 +22,14 @@
#define __CLZ(x) ((8 * sizeof(uint32_t)) - 1 - __fls(x))
#define SAT_SCALE 16 /* 16 bytes minimum for saturation */
#define BW_SCALE 256 /* 1/256 byte per cycle unit */
+#define QOS_DEFAULT_BASEOFFSET 0x00003000
#define MAX_BW_FIELD (NOC_QOS_BWn_BW_BMSK >> NOC_QOS_BWn_BW_SHFT)
#define MAX_SAT_FIELD (NOC_QOS_SATn_SAT_BMSK >> NOC_QOS_SATn_SAT_SHFT)
-#define NOC_QOS_REG_BASE(b) ((b) + 0x00003000)
+#define NOC_QOS_REG_BASE(b, o) ((b) + (o))
-#define NOC_QOS_ID_COREIDn_ADDR(b, n) (NOC_QOS_REG_BASE(b) + 0x80 * (n))
+#define NOC_QOS_ID_COREIDn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x80 * (n))
enum noc_qos_id_coreidn {
NOC_QOS_ID_COREIDn_RMSK = 0xffffffff,
NOC_QOS_ID_COREIDn_MAXn = 32,
@@ -37,8 +39,8 @@
NOC_QOS_ID_COREIDn_CORETYPEID_SHFT = 0x0,
};
-#define NOC_QOS_ID_REVISIONIDn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x4 + 0x80 * (n))
+#define NOC_QOS_ID_REVISIONIDn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x4 + 0x80 * (n))
enum noc_qos_id_revisionidn {
NOC_QOS_ID_REVISIONIDn_RMSK = 0xffffffff,
NOC_QOS_ID_REVISIONIDn_MAXn = 32,
@@ -48,8 +50,8 @@
NOC_QOS_ID_REVISIONIDn_USERID_SHFT = 0x0,
};
-#define NOC_QOS_PRIORITYn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x8 + 0x80 * (n))
+#define NOC_QOS_PRIORITYn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x8 + 0x80 * (n))
enum noc_qos_id_priorityn {
NOC_QOS_PRIORITYn_RMSK = 0x0000000f,
NOC_QOS_PRIORITYn_MAXn = 32,
@@ -59,8 +61,8 @@
NOC_QOS_PRIORITYn_P0_SHFT = 0x0,
};
-#define NOC_QOS_MODEn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0xC + 0x80 * (n))
+#define NOC_QOS_MODEn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0xC + 0x80 * (n))
enum noc_qos_id_moden_rmsk {
NOC_QOS_MODEn_RMSK = 0x00000003,
NOC_QOS_MODEn_MAXn = 32,
@@ -68,8 +70,8 @@
NOC_QOS_MODEn_MODE_SHFT = 0x0,
};
-#define NOC_QOS_BWn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x10 + 0x80 * (n))
+#define NOC_QOS_BWn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x10 + 0x80 * (n))
enum noc_qos_id_bwn {
NOC_QOS_BWn_RMSK = 0x0000ffff,
NOC_QOS_BWn_MAXn = 32,
@@ -78,8 +80,8 @@
};
/* QOS Saturation registers */
-#define NOC_QOS_SATn_ADDR(b, n) \
- (NOC_QOS_REG_BASE(b) + 0x14 + 0x80 * (n))
+#define NOC_QOS_SATn_ADDR(b, o, n) \
+ (NOC_QOS_REG_BASE(b, o) + 0x14 + 0x80 * (n))
enum noc_qos_id_saturationn {
NOC_QOS_SATn_RMSK = 0x000003ff,
NOC_QOS_SATn_MAXn = 32,
@@ -196,10 +198,11 @@
uint32_t reg_val;
reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport)) & NOC_QOS_MODEn_RMSK;
+ ninfo->qos_baseoffset, mport)) & NOC_QOS_MODEn_RMSK;
writel_relaxed(((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK))) |
(mode & NOC_QOS_MODEn_MODE_BMSK)),
- NOC_QOS_MODEn_ADDR(ninfo->base, mport));
+ NOC_QOS_MODEn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
}
/* Ensure qos mode is set before exiting */
wmb();
@@ -210,18 +213,23 @@
{
uint32_t reg_val, val;
- reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport))
- & NOC_QOS_PRIORITYn_RMSK;
+ reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset, mport))
+ & NOC_QOS_PRIORITYn_RMSK;
val = priority->p1 << NOC_QOS_PRIORITYn_P1_SHFT;
writel_relaxed(((reg_val & (~(NOC_QOS_PRIORITYn_P1_BMSK))) |
(val & NOC_QOS_PRIORITYn_P1_BMSK)),
- NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport));
+ NOC_QOS_PRIORITYn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
- reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport))
- & NOC_QOS_PRIORITYn_RMSK;
+ reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset,
+ mport))
+ & NOC_QOS_PRIORITYn_RMSK;
writel_relaxed(((reg_val & (~(NOC_QOS_PRIORITYn_P0_BMSK))) |
(priority->p0 & NOC_QOS_PRIORITYn_P0_BMSK)),
- NOC_QOS_PRIORITYn_ADDR(ninfo->base, mport));
+ NOC_QOS_PRIORITYn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
/* Ensure qos priority is set before exiting */
wmb();
}
@@ -251,33 +259,38 @@
* Clear QoS accumulator
**/
mode = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport)) & NOC_QOS_MODEn_MODE_BMSK;
+ ninfo->qos_baseoffset, mport))
+ & NOC_QOS_MODEn_MODE_BMSK;
if (mode == NOC_QOS_MODE_REGULATOR || mode ==
NOC_QOS_MODE_LIMITER) {
reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->
- base, mport));
+ base, ninfo->qos_baseoffset, mport));
val = NOC_QOS_MODE_FIXED;
writel_relaxed((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK)))
| (val & NOC_QOS_MODEn_MODE_BMSK),
- NOC_QOS_MODEn_ADDR(ninfo->base, mport));
+ NOC_QOS_MODEn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset, mport));
}
- reg_val = readl_relaxed(NOC_QOS_BWn_ADDR(ninfo->base, mport));
+ reg_val = readl_relaxed(NOC_QOS_BWn_ADDR(ninfo->base,
+ ninfo->qos_baseoffset, mport));
val = bw_val << NOC_QOS_BWn_BW_SHFT;
writel_relaxed(((reg_val & (~(NOC_QOS_BWn_BW_BMSK))) |
(val & NOC_QOS_BWn_BW_BMSK)),
- NOC_QOS_BWn_ADDR(ninfo->base, mport));
+ NOC_QOS_BWn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
MSM_BUS_DBG("NOC: BW: Wrote value: 0x%x\n", ((reg_val &
(~NOC_QOS_BWn_BW_BMSK)) | (val &
NOC_QOS_BWn_BW_BMSK)));
reg_val = readl_relaxed(NOC_QOS_SATn_ADDR(ninfo->base,
- mport));
+ ninfo->qos_baseoffset, mport));
val = sat_val << NOC_QOS_SATn_SAT_SHFT;
writel_relaxed(((reg_val & (~(NOC_QOS_SATn_SAT_BMSK))) |
(val & NOC_QOS_SATn_SAT_BMSK)),
- NOC_QOS_SATn_ADDR(ninfo->base, mport));
+ NOC_QOS_SATn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
MSM_BUS_DBG("NOC: SAT: Wrote value: 0x%x\n", ((reg_val &
(~NOC_QOS_SATn_SAT_BMSK)) | (val &
@@ -285,10 +298,11 @@
/* Set mode back to what it was initially */
reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport));
+ ninfo->qos_baseoffset, mport));
writel_relaxed((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK)))
| (mode & NOC_QOS_MODEn_MODE_BMSK),
- NOC_QOS_MODEn_ADDR(ninfo->base, mport));
+ NOC_QOS_MODEn_ADDR(ninfo->base, ninfo->qos_baseoffset,
+ mport));
/* Ensure that all writes for bandwidth registers have
* completed before returning
*/
@@ -301,7 +315,8 @@
{
if (NOC_QOS_MODES_ALL_PERM == perm_mode)
return readl_relaxed(NOC_QOS_MODEn_ADDR(ninfo->base,
- mport)) & NOC_QOS_MODEn_MODE_BMSK;
+ ninfo->qos_baseoffset, mport)) &
+ NOC_QOS_MODEn_MODE_BMSK;
else
return 31 - __CLZ(mode &
NOC_QOS_MODES_ALL_PERM);
@@ -311,11 +326,11 @@
uint32_t mport, struct msm_bus_noc_qos_priority *priority)
{
priority->p1 = (readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
- mport)) & NOC_QOS_PRIORITYn_P1_BMSK) >>
+ ninfo->qos_baseoffset, mport)) & NOC_QOS_PRIORITYn_P1_BMSK) >>
NOC_QOS_PRIORITYn_P1_SHFT;
priority->p0 = (readl_relaxed(NOC_QOS_PRIORITYn_ADDR(ninfo->base,
- mport)) & NOC_QOS_PRIORITYn_P0_BMSK) >>
+ ninfo->qos_baseoffset, mport)) & NOC_QOS_PRIORITYn_P0_BMSK) >>
NOC_QOS_PRIORITYn_P0_SHFT;
}
@@ -325,9 +340,11 @@
if (perm_mode & (NOC_QOS_PERM_MODE_LIMITER |
NOC_QOS_PERM_MODE_REGULATOR)) {
uint32_t bw_val = readl_relaxed(NOC_QOS_BWn_ADDR(ninfo->
- base, mport)) & NOC_QOS_BWn_BW_BMSK;
+ base, ninfo->qos_baseoffset, mport)) &
+ NOC_QOS_BWn_BW_BMSK;
uint32_t sat = readl_relaxed(NOC_QOS_SATn_ADDR(ninfo->
- base, mport)) & NOC_QOS_SATn_SAT_BMSK;
+ base, ninfo->qos_baseoffset, mport)) &
+ NOC_QOS_SATn_SAT_BMSK;
qbw->bw = noc_bw(bw_val, ninfo->qos_freq);
qbw->ws = noc_ws(qbw->bw, sat, ninfo->qos_freq);
@@ -431,6 +448,12 @@
ninfo->nqos_masters = fab_pdata->nmasters;
ninfo->nslaves = fab_pdata->nslaves;
ninfo->qos_freq = fab_pdata->qos_freq;
+
+ if (!fab_pdata->qos_baseoffset)
+ ninfo->qos_baseoffset = QOS_DEFAULT_BASEOFFSET;
+ else
+ ninfo->qos_baseoffset = fab_pdata->qos_baseoffset;
+
ninfo->mas_modes = kzalloc(sizeof(uint32_t) * fab_pdata->nmasters,
GFP_KERNEL);
if (!ninfo->mas_modes) {
@@ -563,14 +586,8 @@
skip_mas_bw:
ports = hop->node_info->num_sports;
- if (ports == 0) {
- MSM_BUS_DBG("\nDIVIDE BY 0, hop: %d\n",
- hop->node_info->priv_id);
- return;
- }
- bw = INTERLEAVED_BW(fab_pdata, add_bw, ports);
for (i = 0; i < ports; i++) {
- sel_cd->slv[hop->node_info->slavep[i]].bw += bw;
+ sel_cd->slv[hop->node_info->slavep[i]].bw += add_bw;
sel_cd->slv[hop->node_info->slavep[i]].hw_id =
hop->node_info->slv_hw_id;
MSM_BUS_DBG("NOC: Update slave_bw for ID: %d -> %llu\n",
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_noc.h b/arch/arm/mach-msm/msm_bus/msm_bus_noc.h
index 00479c6..6ba3a24 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_noc.h
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_noc.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -44,6 +44,7 @@
uint32_t nqos_masters;
uint32_t nslaves;
uint32_t qos_freq; /* QOS Clock in KHz */
+ uint32_t qos_baseoffset;
uint32_t *mas_modes;
struct msm_bus_noc_commit cdata[NUM_CTX];
};
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_of.c b/arch/arm/mach-msm/msm_bus/msm_bus_of.c
index 06894c6..52195c7 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_of.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_of.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -173,7 +173,7 @@
of_node = pdev->dev.of_node;
pdata = get_pdata(pdev, of_node);
if (!pdata) {
- pr_err("Error getting bus pdata!\n");
+ pr_err("client has to provide missing entry for successful registration\n");
return NULL;
}
@@ -214,7 +214,7 @@
pdata = get_pdata(pdev, of_node);
if (!pdata) {
- pr_err("Error getting bus pdata!\n");
+ pr_err("client has to provide missing entry for successful registration\n");
return NULL;
}
@@ -552,6 +552,11 @@
if (of_property_read_bool(of_node, "qcom,virt"))
pdata->virt = true;
+ ret = of_property_read_u32(of_node, "qcom,qos-baseoffset",
+ &pdata->qos_baseoffset);
+ if (ret)
+ pr_debug("%s:qos_baseoffset not available\n", __func__);
+
if (of_property_read_bool(of_node, "qcom,rpm-en"))
pdata->rpm_enabled = 1;
diff --git a/arch/arm/mach-msm/msm_qmi_interface.c b/arch/arm/mach-msm/msm_qmi_interface.c
index e2ff0f4..7c5adc1 100644
--- a/arch/arm/mach-msm/msm_qmi_interface.c
+++ b/arch/arm/mach-msm/msm_qmi_interface.c
@@ -33,6 +33,9 @@
#include "msm_qmi_interface_priv.h"
+#define BUILD_INSTANCE_ID(vers, ins) (((vers) & 0xFF) | (((ins) & 0xFF) << 8))
+#define LOOKUP_MASK 0xFFFFFFFF
+
static LIST_HEAD(svc_event_nb_list);
static DEFINE_MUTEX(svc_event_nb_list_lock);
static DEFINE_MUTEX(msm_qmi_init_lock);
@@ -625,12 +628,15 @@
EXPORT_SYMBOL(qmi_recv_msg);
int qmi_connect_to_service(struct qmi_handle *handle,
- uint32_t service_id, uint32_t instance_id)
+ uint32_t service_id,
+ uint32_t service_vers,
+ uint32_t service_ins)
{
struct msm_ipc_port_name svc_name;
struct msm_ipc_server_info svc_info;
struct msm_ipc_addr *svc_dest_addr;
int rc;
+ uint32_t instance_id;
if (!handle)
return -EINVAL;
@@ -642,12 +648,15 @@
return -ENOMEM;
}
+ instance_id = BUILD_INSTANCE_ID(service_vers, service_ins);
svc_name.service = service_id;
svc_name.instance = instance_id;
- rc = msm_ipc_router_lookup_server_name(&svc_name, &svc_info, 1, 0xFF);
+ rc = msm_ipc_router_lookup_server_name(&svc_name, &svc_info,
+ 1, LOOKUP_MASK);
if (rc <= 0) {
- pr_err("%s: Server not found\n", __func__);
+ pr_err("%s: Server %08x:%08x not found\n",
+ __func__, service_id, instance_id);
return -ENODEV;
}
svc_dest_addr->addrtype = MSM_IPC_ADDR_ID;
@@ -780,13 +789,16 @@
}
int qmi_svc_event_notifier_register(uint32_t service_id,
- uint32_t instance_id,
+ uint32_t service_vers,
+ uint32_t service_ins,
struct notifier_block *nb)
{
struct svc_event_nb *temp;
unsigned long flags;
int ret;
+ uint32_t instance_id;
+ instance_id = BUILD_INSTANCE_ID(service_vers, service_ins);
temp = find_and_add_svc_event_nb(service_id, instance_id);
if (!temp)
return -EFAULT;
@@ -810,13 +822,16 @@
EXPORT_SYMBOL(qmi_svc_event_notifier_register);
int qmi_svc_event_notifier_unregister(uint32_t service_id,
- uint32_t instance_id,
+ uint32_t service_vers,
+ uint32_t service_ins,
struct notifier_block *nb)
{
int ret;
struct svc_event_nb *temp;
unsigned long flags;
+ uint32_t instance_id;
+ instance_id = BUILD_INSTANCE_ID(service_vers, service_ins);
mutex_lock(&svc_event_nb_list_lock);
temp = find_svc_event_nb(service_id, instance_id);
if (!temp) {
diff --git a/arch/arm/mach-msm/msm_watchdog_v2.c b/arch/arm/mach-msm/msm_watchdog_v2.c
index ead2e95..979c5bb 100644
--- a/arch/arm/mach-msm/msm_watchdog_v2.c
+++ b/arch/arm/mach-msm/msm_watchdog_v2.c
@@ -478,8 +478,9 @@
wdog_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pdata->size = resource_size(wdog_resource);
pdata->phys_base = wdog_resource->start;
- if (unlikely(!(devm_request_region(&pdev->dev, pdata->phys_base,
- pdata->size, "msm-watchdog")))) {
+ if (unlikely(!(devm_request_mem_region(&pdev->dev, pdata->phys_base,
+ pdata->size, "msm-watchdog")))) {
+
dev_err(&pdev->dev, "%s cannot reserve watchdog region\n",
__func__);
return -ENXIO;
diff --git a/arch/arm/mach-msm/peripheral-loader.c b/arch/arm/mach-msm/peripheral-loader.c
index 157dc01..285c02a 100644
--- a/arch/arm/mach-msm/peripheral-loader.c
+++ b/arch/arm/mach-msm/peripheral-loader.c
@@ -515,7 +515,7 @@
}
}
-#define IOMAP_SIZE SZ_4M
+#define IOMAP_SIZE SZ_1M
static int pil_load_seg(struct pil_desc *desc, struct pil_seg *seg)
{
diff --git a/arch/arm/mach-msm/pil-pronto.c b/arch/arm/mach-msm/pil-pronto.c
index 69df3ae..a7fc204 100644
--- a/arch/arm/mach-msm/pil-pronto.c
+++ b/arch/arm/mach-msm/pil-pronto.c
@@ -85,6 +85,7 @@
bool crash;
struct delayed_work cancel_vote_work;
struct ramdump_device *ramdump_dev;
+ struct work_struct wcnss_wdog_bite_work;
};
static int pil_pronto_make_proxy_vote(struct pil_desc *pil)
@@ -322,6 +323,16 @@
return IRQ_HANDLED;
}
+static void wcnss_wdog_bite_work_hdlr(struct work_struct *wcnss_work)
+{
+ struct pronto_data *drv = container_of(wcnss_work, struct pronto_data,
+ wcnss_wdog_bite_work);
+
+ wcnss_log_debug_regs_on_bite();
+
+ restart_wcnss(drv);
+}
+
static irqreturn_t wcnss_wdog_bite_irq_hdlr(int irq, void *dev_id)
{
struct pronto_data *drv = subsys_to_drv(dev_id);
@@ -334,10 +345,9 @@
pr_err("Ignoring wcnss bite irq, restart in progress\n");
return IRQ_HANDLED;
}
- wcnss_log_debug_regs_on_bite();
drv->restart_inprogress = true;
- restart_wcnss(drv);
+ schedule_work(&drv->wcnss_wdog_bite_work);
return IRQ_HANDLED;
}
@@ -490,6 +500,7 @@
drv->subsys_desc.wdog_bite_handler = wcnss_wdog_bite_irq_hdlr;
INIT_DELAYED_WORK(&drv->cancel_vote_work, wcnss_post_bootup);
+ INIT_WORK(&drv->wcnss_wdog_bite_work, wcnss_wdog_bite_work_hdlr);
drv->subsys = subsys_register(&drv->subsys_desc);
if (IS_ERR(drv->subsys)) {
diff --git a/arch/arm/mach-msm/pm-stats.c b/arch/arm/mach-msm/pm-stats.c
index c4e52be..5614ddd 100644
--- a/arch/arm/mach-msm/pm-stats.c
+++ b/arch/arm/mach-msm/pm-stats.c
@@ -225,6 +225,14 @@
stats[i].total_time = 0;
}
}
+ memset(suspend_stats.bucket,
+ 0, sizeof(suspend_stats.bucket));
+ memset(suspend_stats.min_time,
+ 0, sizeof(suspend_stats.min_time));
+ memset(suspend_stats.max_time,
+ 0, sizeof(suspend_stats.max_time));
+ suspend_stats.count = 0;
+ suspend_stats.total_time = 0;
spin_unlock_irqrestore(&msm_pm_stats_lock, flags);
return count;
diff --git a/arch/arm/mach-msm/qdsp6v2/apr_tal.c b/arch/arm/mach-msm/qdsp6v2/apr_tal.c
index 8826a35..e917f31 100644
--- a/arch/arm/mach-msm/qdsp6v2/apr_tal.c
+++ b/arch/arm/mach-msm/qdsp6v2/apr_tal.c
@@ -190,6 +190,9 @@
apr_tal_close(&apr_svc_ch[dl][dest][svc]);
return NULL;
}
+
+ smd_disable_read_intr(apr_svc_ch[dl][dest][svc].ch);
+
if (!apr_svc_ch[dl][dest][svc].dest_state) {
apr_svc_ch[dl][dest][svc].dest_state = 1;
pr_debug("apr_tal:Waiting for apr svc init\n");
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_utils.c b/arch/arm/mach-msm/qdsp6v2/audio_utils.c
index 2f1ff3e..109e120 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_utils.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_utils.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -23,6 +23,11 @@
#include <asm/ioctls.h>
#include "audio_utils.h"
+#define MIN_FRAME_SIZE 1536
+#define NUM_FRAMES 5
+#define META_SIZE (sizeof(struct meta_out_dsp))
+#define FRAME_SIZE (1 + ((MIN_FRAME_SIZE + META_SIZE) * NUM_FRAMES))
+
static int audio_in_pause(struct q6audio_in *audio)
{
int rc;
@@ -258,6 +263,11 @@
rc = -EINVAL;
break;
}
+ if ((cfg.buffer_size > FRAME_SIZE) ||
+ (cfg.buffer_count != FRAME_NUM)) {
+ rc = -EINVAL;
+ break;
+ }
audio->str_cfg.buffer_size = cfg.buffer_size;
audio->str_cfg.buffer_count = cfg.buffer_count;
if(audio->opened){
diff --git a/arch/arm/mach-msm/qdsp6v2/msm_audio_ion.c b/arch/arm/mach-msm/qdsp6v2/msm_audio_ion.c
index fc6de64..399e073 100644
--- a/arch/arm/mach-msm/qdsp6v2/msm_audio_ion.c
+++ b/arch/arm/mach-msm/qdsp6v2/msm_audio_ion.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -391,7 +391,9 @@
int msm_audio_ion_free_legacy(struct ion_client *client,
struct ion_handle *handle)
{
- /* To add condition for SMMU enabled */
+ if (msm_audio_ion_data.smmu_enabled)
+ ion_unmap_iommu(client, handle,
+ msm_audio_ion_data.domain_id, 0);
ion_unmap_kernel(client, handle);
ion_free(client, handle);
diff --git a/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c b/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
index a18d0f3..cf69e17 100644
--- a/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
+++ b/arch/arm/mach-msm/qdsp6v2/ultrasound/usf.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,8 +27,8 @@
#include "usfcdev.h"
/* The driver version*/
-#define DRV_VERSION "1.5.1"
-#define USF_VERSION_ID 0x0151
+#define DRV_VERSION "1.6.1"
+#define USF_VERSION_ID 0x0161
/* Standard timeout in the asynchronous ops */
#define USF_TIMEOUT_JIFFIES (1*HZ) /* 1 sec */
@@ -118,14 +118,12 @@
uint16_t event_types;
/* The input devices are "input" module registered clients */
struct input_dev *input_ifs[USF_MAX_EVENT_IND];
- /* The event source */
- int event_src;
/* Bitmap of types of events, conflicting to USF's ones */
uint16_t conflicting_event_types;
/* Bitmap of types of events from devs, conflicting with USF */
uint16_t conflicting_event_filters;
- /* The requested side buttons bitmap */
- uint16_t req_side_buttons_bitmap;
+ /* The requested buttons bitmap */
+ uint16_t req_buttons_bitmap;
};
struct usf_input_dev_type {
@@ -148,17 +146,22 @@
/* The MAX number of the supported devices */
#define MAX_DEVS_NUMBER 1
-/* The opened devices container */
-static const int s_event_src_map[] = {
- BTN_TOOL_PEN, /* US_INPUT_SRC_PEN*/
- 0, /* US_INPUT_SRC_FINGER */
- 0, /* US_INPUT_SRC_UNDEF */
-};
+/*
+ * code for a special button that is used to show/hide a
+ * hovering cursor in the input framework. Must be in
+ * sync with the button code definition in the framework
+ * (EventHub.h)
+ */
+#define BTN_USF_HOVERING_CURSOR 0x230
/* Supported buttons container */
static const int s_button_map[] = {
BTN_STYLUS,
- BTN_STYLUS2
+ BTN_STYLUS2,
+ BTN_TOOL_PEN,
+ BTN_TOOL_RUBBER,
+ BTN_TOOL_FINGER,
+ BTN_USF_HOVERING_CURSOR
};
/* The opened devices container */
@@ -192,31 +195,32 @@
const char *name)
{
int i = 0;
- int num_side_buttons = min(ARRAY_SIZE(s_button_map),
- sizeof(input_info->req_side_buttons_bitmap) *
+
+ int num_buttons = min(ARRAY_SIZE(s_button_map),
+ sizeof(input_info->req_buttons_bitmap) *
BITS_IN_BYTE);
- uint16_t max_side_button_bitmap = ((1 << ARRAY_SIZE(s_button_map)) - 1);
+ uint16_t max_buttons_bitmap = ((1 << ARRAY_SIZE(s_button_map)) - 1);
+
struct input_dev *in_dev = allocate_dev(ind, name);
if (in_dev == NULL)
return -ENOMEM;
- if (input_info->req_side_buttons_bitmap > max_side_button_bitmap) {
- pr_err("%s: Requested side buttons[%d] exceeds max side buttons available[%d]\n",
+ if (input_info->req_buttons_bitmap > max_buttons_bitmap) {
+ pr_err("%s: Requested buttons[%d] exceeds max buttons available[%d]\n",
__func__,
- input_info->req_side_buttons_bitmap,
- max_side_button_bitmap);
+ input_info->req_buttons_bitmap,
+ max_buttons_bitmap);
return -EINVAL;
}
usf_info->input_ifs[ind] = in_dev;
- usf_info->req_side_buttons_bitmap =
- input_info->req_side_buttons_bitmap;
+ usf_info->req_buttons_bitmap =
+ input_info->req_buttons_bitmap;
in_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
in_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
-
- for (i = 0; i < num_side_buttons; i++)
- if (input_info->req_side_buttons_bitmap & (1 << i))
+ for (i = 0; i < num_buttons; i++)
+ if (input_info->req_buttons_bitmap & (1 << i))
in_dev->keybit[BIT_WORD(s_button_map[i])] |=
BIT_MASK(s_button_map[i]);
@@ -297,8 +301,8 @@
{
int i = 0;
- int num_side_buttons = min(ARRAY_SIZE(s_button_map),
- sizeof(usf_info->req_side_buttons_bitmap) *
+ int num_buttons = min(ARRAY_SIZE(s_button_map),
+ sizeof(usf_info->req_buttons_bitmap) *
BITS_IN_BYTE);
struct input_dev *input_if = usf_info->input_ifs[if_ind];
@@ -314,19 +318,16 @@
input_report_abs(input_if, ABS_PRESSURE, pe->pressure);
input_report_key(input_if, BTN_TOUCH, !!(pe->pressure));
- for (i = 0; i < num_side_buttons; i++) {
+ for (i = 0; i < num_buttons; i++) {
uint16_t mask = (1 << i),
- btn_state = !!(pe->side_buttons_state_bitmap & mask);
- if (usf_info->req_side_buttons_bitmap & mask)
+ btn_state = !!(pe->buttons_state_bitmap & mask);
+ if (usf_info->req_buttons_bitmap & mask)
input_report_key(input_if, s_button_map[i], btn_state);
}
- if (usf_info->event_src)
- input_report_key(input_if, usf_info->event_src, 1);
-
input_sync(input_if);
- pr_debug("%s: TSC event: xyz[%d;%d;%d], incl[%d;%d], pressure[%d], side_buttons[%d]\n",
+ pr_debug("%s: TSC event: xyz[%d;%d;%d], incl[%d;%d], pressure[%d], buttons[%d]\n",
__func__,
pe->coordinates[X_IND],
pe->coordinates[Y_IND],
@@ -334,7 +335,7 @@
pe->inclinations[X_IND],
pe->inclinations[Y_IND],
pe->pressure,
- pe->side_buttons_state_bitmap);
+ pe->buttons_state_bitmap);
}
static void notify_mouse_event(struct usf_type *usf_info,
@@ -663,12 +664,6 @@
return -EINVAL;
}
- if (input_info->event_src < ARRAY_SIZE(s_event_src_map))
- usf_info->event_src =
- s_event_src_map[input_info->event_src];
- else
- usf_info->event_src = 0;
-
for (ind = 0; ind < USF_MAX_EVENT_IND; ++ind) {
if (usf_info->input_ifs[ind] != NULL) {
pr_err("%s: input_if[%d] is already allocated\n",
@@ -686,12 +681,6 @@
if (rc)
return rc;
-
- if (usf_info->event_src)
- input_set_capability(usf_info->input_ifs[ind],
- EV_KEY,
- usf_info->event_src);
-
rc = input_register_device(usf_info->input_ifs[ind]);
if (rc) {
pr_err("%s: input_reg_dev() failed; rc=%d\n",
diff --git a/arch/arm/mach-msm/remote_spinlock.c b/arch/arm/mach-msm/remote_spinlock.c
index a9ebd7c..0a953ac 100644
--- a/arch/arm/mach-msm/remote_spinlock.c
+++ b/arch/arm/mach-msm/remote_spinlock.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, 2011-2013 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2008-2009, 2011-2014 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -81,6 +81,8 @@
int (*trylock)(raw_remote_spinlock_t *lock);
int (*release)(raw_remote_spinlock_t *lock, uint32_t pid);
int (*owner)(raw_remote_spinlock_t *lock);
+ void (*lock_rlock_id)(raw_remote_spinlock_t *lock, uint32_t tid);
+ void (*unlock_rlock)(raw_remote_spinlock_t *lock);
};
static struct spinlock_ops current_ops;
@@ -364,6 +366,27 @@
writel_relaxed(0, lock);
smp_mb();
}
+
+static void __raw_remote_sfpb_spin_lock_rlock_id(raw_remote_spinlock_t *lock,
+ uint32_t tid)
+{
+ if (unlikely(!tid)) {
+ pr_err("%s: unsupported rlock tid=0\n", __func__);
+ BUG();
+ }
+
+ do {
+ writel_relaxed(tid, lock);
+ smp_mb();
+ } while (readl_relaxed(lock) != tid);
+}
+
+static void __raw_remote_sfpb_spin_unlock_rlock(raw_remote_spinlock_t *lock)
+{
+ writel_relaxed(0, lock);
+ smp_mb();
+}
+
/* end sfpb implementation -------------------------------------------------- */
/* common spinlock API ------------------------------------------------------ */
@@ -458,6 +481,9 @@
current_ops.trylock = __raw_remote_sfpb_spin_trylock;
current_ops.release = __raw_remote_gen_spin_release;
current_ops.owner = __raw_remote_gen_spin_owner;
+ current_ops.lock_rlock_id =
+ __raw_remote_sfpb_spin_lock_rlock_id;
+ current_ops.unlock_rlock = __raw_remote_sfpb_spin_unlock_rlock;
is_hw_lock_type = 1;
break;
case AUTO_MODE:
@@ -474,6 +500,10 @@
current_ops.trylock = __raw_remote_sfpb_spin_trylock;
current_ops.release = __raw_remote_gen_spin_release;
current_ops.owner = __raw_remote_gen_spin_owner;
+ current_ops.lock_rlock_id =
+ __raw_remote_sfpb_spin_lock_rlock_id;
+ current_ops.unlock_rlock =
+ __raw_remote_sfpb_spin_unlock_rlock;
is_hw_lock_type = 1;
break;
}
@@ -517,6 +547,11 @@
int n;
_remote_spinlock_t lock;
+ if (pid >= REMOTE_SPINLOCK_NUM_PID) {
+ pr_err("%s: unsupported PID %d\n", __func__, pid);
+ return;
+ }
+
for (n = 0; n < count; ++n) {
if (remote_spinlock_init_address(n, &lock) == 0)
_remote_spin_release(&lock, pid);
@@ -671,6 +706,23 @@
return current_ops.owner((raw_remote_spinlock_t *)(*lock));
}
EXPORT_SYMBOL(_remote_spin_owner);
+
+void _remote_spin_lock_rlock_id(_remote_spinlock_t *lock, uint32_t tid)
+{
+ if (unlikely(!current_ops.lock_rlock_id))
+ BUG();
+ current_ops.lock_rlock_id((raw_remote_spinlock_t *)(*lock), tid);
+}
+EXPORT_SYMBOL(_remote_spin_lock_rlock_id);
+
+void _remote_spin_unlock_rlock(_remote_spinlock_t *lock)
+{
+ if (unlikely(!current_ops.unlock_rlock))
+ BUG();
+ current_ops.unlock_rlock((raw_remote_spinlock_t *)(*lock));
+}
+EXPORT_SYMBOL(_remote_spin_unlock_rlock);
+
/* end common spinlock API -------------------------------------------------- */
/* remote mutex implementation ---------------------------------------------- */
diff --git a/arch/arm/mach-msm/rpm-regulator-smd.c b/arch/arm/mach-msm/rpm-regulator-smd.c
index 7995e9a..c7e9e75 100644
--- a/arch/arm/mach-msm/rpm-regulator-smd.c
+++ b/arch/arm/mach-msm/rpm-regulator-smd.c
@@ -163,6 +163,7 @@
struct mutex mlock;
unsigned long flags;
bool sleep_request_sent;
+ bool apps_only;
struct msm_rpm_request *handle_active;
struct msm_rpm_request *handle_sleep;
};
@@ -241,6 +242,16 @@
& BIT(RPM_REGULATOR_PARAM_ENABLE)));
}
+static inline bool rpm_vreg_shared_active_or_sleep_enabled_valid
+ (struct rpm_vreg *rpm_vreg)
+{
+ return !rpm_vreg->apps_only &&
+ ((rpm_vreg->aggr_req_active.valid
+ & BIT(RPM_REGULATOR_PARAM_ENABLE))
+ || (rpm_vreg->aggr_req_sleep.valid
+ & BIT(RPM_REGULATOR_PARAM_ENABLE)));
+}
+
/*
* This is used when voting for LPM or HPM by subtracting or adding to the
* hpm_min_load of a regulator. It has units of uA.
@@ -660,7 +671,8 @@
* if the regulator has been configured to always send voltage updates.
*/
if (reg->always_send_voltage
- || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg))
+ || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg)
+ || rpm_vreg_shared_active_or_sleep_enabled_valid(reg->rpm_vreg))
rc = rpm_vreg_aggregate_requests(reg);
if (rc) {
@@ -719,7 +731,8 @@
* updates.
*/
if (reg->always_send_voltage
- || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg))
+ || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg)
+ || rpm_vreg_shared_active_or_sleep_enabled_valid(reg->rpm_vreg))
rc = rpm_vreg_aggregate_requests(reg);
if (rc) {
@@ -774,7 +787,8 @@
* voltage updates.
*/
if (reg->always_send_voltage
- || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg))
+ || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg)
+ || rpm_vreg_shared_active_or_sleep_enabled_valid(reg->rpm_vreg))
rc = rpm_vreg_aggregate_requests(reg);
if (rc) {
@@ -829,7 +843,8 @@
* current updates.
*/
if (reg->always_send_current
- || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg))
+ || rpm_vreg_active_or_sleep_enabled(reg->rpm_vreg)
+ || rpm_vreg_shared_active_or_sleep_enabled_valid(reg->rpm_vreg))
rc = rpm_vreg_aggregate_requests(reg);
if (rc) {
@@ -1579,6 +1594,7 @@
of_property_read_u32(node, "qcom,enable-time", &rpm_vreg->enable_time);
of_property_read_u32(node, "qcom,hpm-min-load",
&rpm_vreg->hpm_min_load);
+ rpm_vreg->apps_only = of_property_read_bool(node, "qcom,apps-only");
rpm_vreg->handle_active = msm_rpm_create_request(RPM_SET_ACTIVE,
resource_type, rpm_vreg->resource_id, RPM_REGULATOR_PARAM_MAX);
diff --git a/arch/arm/mach-msm/smp2p.c b/arch/arm/mach-msm/smp2p.c
index df241f8..5574eae 100644
--- a/arch/arm/mach-msm/smp2p.c
+++ b/arch/arm/mach-msm/smp2p.c
@@ -940,7 +940,7 @@
if (size < sizeof(struct smp2p_smem)) {
SMP2P_ERR(
- "%s pid %d item size too small; expected: %d actual: %d\n",
+ "%s pid %d item size too small; expected: %zu actual: %d\n",
__func__, remote_pid,
sizeof(struct smp2p_smem), size);
smem_item = NULL;
diff --git a/arch/arm/mach-msm/smp2p_private.h b/arch/arm/mach-msm/smp2p_private.h
index 8e0d7a3..7174950 100644
--- a/arch/arm/mach-msm/smp2p_private.h
+++ b/arch/arm/mach-msm/smp2p_private.h
@@ -1,6 +1,6 @@
/* arch/arm/mach-msm/smp2p_private.h
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -44,10 +44,10 @@
#define SMP2P_GET_BITS(hdr_val, mask, bit) \
(((hdr_val) & (mask)) >> (bit))
#define SMP2P_SET_BITS(hdr_val, mask, bit, new_value) \
- do {\
+ {\
hdr_val = (hdr_val & ~(mask)) \
| (((new_value) << (bit)) & (mask)); \
- } while (0)
+ }
#define SMP2P_GET_LOCAL_PID(hdr) \
SMP2P_GET_BITS(hdr, SMP2P_LOCAL_PID_MASK, SMP2P_LOCAL_PID_BIT)
diff --git a/block/blk-core.c b/block/blk-core.c
index 123f79a..00eab3b 100644
--- a/block/blk-core.c
+++ b/block/blk-core.c
@@ -314,7 +314,8 @@
if (!q->notified_urgent &&
q->elevator->type->ops.elevator_is_urgent_fn &&
q->urgent_request_fn &&
- q->elevator->type->ops.elevator_is_urgent_fn(q)) {
+ q->elevator->type->ops.elevator_is_urgent_fn(q) &&
+ list_empty(&q->flush_data_in_flight)) {
q->notified_urgent = true;
q->urgent_request_fn(q);
} else
diff --git a/drivers/bluetooth/bluetooth-power.c b/drivers/bluetooth/bluetooth-power.c
index 13c9080..9ccee05 100644
--- a/drivers/bluetooth/bluetooth-power.c
+++ b/drivers/bluetooth/bluetooth-power.c
@@ -30,7 +30,7 @@
#define BT_PWR_DBG(fmt, arg...) pr_debug("%s: " fmt "\n" , __func__ , ## arg)
#define BT_PWR_INFO(fmt, arg...) pr_info("%s: " fmt "\n" , __func__ , ## arg)
#define BT_PWR_ERR(fmt, arg...) pr_err("%s: " fmt "\n" , __func__ , ## arg)
-
+#define BT_VDD_PA_CURRENT 60000
static struct of_device_id bt_power_match_table[] = {
{ .compatible = "qca,ar3002" },
@@ -213,6 +213,9 @@
BT_PWR_ERR("bt_power vddpa config failed");
goto vdd_pa_fail;
}
+ regulator_set_optimum_mode(
+ bt_power_pdata->bt_vdd_pa->reg,
+ BT_VDD_PA_CURRENT);
}
if (bt_power_pdata->bt_chip_pwd) {
rc = bt_configure_vreg(bt_power_pdata->bt_chip_pwd);
diff --git a/drivers/bluetooth/hci_ath.c b/drivers/bluetooth/hci_ath.c
index 0383d8f..8272528 100644
--- a/drivers/bluetooth/hci_ath.c
+++ b/drivers/bluetooth/hci_ath.c
@@ -5,7 +5,7 @@
* power management protocol extension to H4 to support AR300x Bluetooth Chip.
*
* Copyright (c) 2009-2010 Atheros Communications Inc.
- * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
*
* Acknowledgements:
* This file is based on hci_h4.c, which was written
diff --git a/drivers/char/diag/diag_dci.c b/drivers/char/diag/diag_dci.c
index 12f448f..0edfdad 100644
--- a/drivers/char/diag/diag_dci.c
+++ b/drivers/char/diag/diag_dci.c
@@ -282,7 +282,7 @@
{
uint16_t event_id, event_id_packet, length, temp_len;
uint8_t *event_mask_ptr, byte_mask, payload_len, payload_len_field;
- uint8_t timestamp[8], bit_index, timestamp_len;
+ uint8_t timestamp[8] = {0}, bit_index, timestamp_len;
uint8_t event_data[MAX_EVENT_SIZE];
unsigned int byte_index, total_event_len, i;
struct diag_dci_client_tbl *entry;
@@ -847,6 +847,22 @@
return ret;
}
+int diag_dci_find_client_index_health(int client_id)
+{
+ int i, ret = DCI_CLIENT_INDEX_INVALID;
+
+ for (i = 0; i < MAX_DCI_CLIENTS; i++) {
+ if (driver->dci_client_tbl[i].client != NULL) {
+ if (driver->dci_client_tbl[i].client_id ==
+ client_id) {
+ ret = i;
+ break;
+ }
+ }
+ }
+ return ret;
+}
+
int diag_dci_find_client_index(int client_id)
{
int i, ret = DCI_CLIENT_INDEX_INVALID;
diff --git a/drivers/char/diag/diag_dci.h b/drivers/char/diag/diag_dci.h
index 2ab8a36..870b0f3 100644
--- a/drivers/char/diag/diag_dci.h
+++ b/drivers/char/diag/diag_dci.h
@@ -56,6 +56,7 @@
} __packed;
struct diag_dci_client_tbl {
+ uint32_t client_id;
struct task_struct *client;
uint16_t list; /* bit mask */
int signal_type;
@@ -74,6 +75,7 @@
/* This is used for DCI health stats */
struct diag_dci_health_stats {
+ int client_id;
int dropped_logs;
int dropped_events;
int received_logs;
@@ -119,6 +121,8 @@
int recd_bytes);
int diag_process_dci_transaction(unsigned char *buf, int len);
void extract_dci_pkt_rsp(struct diag_smd_info *smd_info, unsigned char *buf);
+
+int diag_dci_find_client_index_health(int client_id);
int diag_dci_find_client_index(int client_id);
/* DCI Log streaming functions */
void create_dci_log_mask_tbl(unsigned char *tbl_buf);
diff --git a/drivers/char/diag/diag_debugfs.c b/drivers/char/diag/diag_debugfs.c
index d8b5599..3a1c96b 100644
--- a/drivers/char/diag/diag_debugfs.c
+++ b/drivers/char/diag/diag_debugfs.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -33,14 +33,14 @@
{
char *buf;
int ret;
-
+ unsigned int buf_size;
buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
if (!buf) {
pr_err("diag: %s, Error allocating memory\n", __func__);
return -ENOMEM;
}
-
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ buf_size = ksize(buf);
+ ret = scnprintf(buf, buf_size,
"modem ch: 0x%x\n"
"lpass ch: 0x%x\n"
"riva ch: 0x%x\n"
@@ -181,7 +181,7 @@
driver->real_time_mode);
#ifdef CONFIG_DIAG_OVER_USB
- ret += scnprintf(buf+ret, DEBUG_BUF_SIZE,
+ ret += scnprintf(buf+ret, buf_size-ret,
"usb_connected: %d\n",
driver->usb_connected);
#endif
@@ -198,7 +198,8 @@
unsigned int bytes_remaining, bytes_written = 0;
unsigned int bytes_in_buf = 0, i = 0;
struct diag_dci_data_info *temp_data = dci_data_smd;
- int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
+ unsigned int buf_size;
+ buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
if (diag_dbgfs_dci_finished) {
diag_dbgfs_dci_finished = 0;
@@ -211,6 +212,7 @@
return -ENOMEM;
}
+ buf_size = ksize(buf);
bytes_remaining = buf_size;
if (diag_dbgfs_dci_data_index == 0) {
@@ -287,6 +289,7 @@
{
char *buf;
int ret;
+ unsigned int buf_size;
buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
if (!buf) {
@@ -294,7 +297,8 @@
return -ENOMEM;
}
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ buf_size = ksize(buf);
+ ret = scnprintf(buf, buf_size,
"Pending status for work_stucts:\n"
"diag_drain_work: %d\n"
"Modem data diag_read_smd_work: %d\n"
@@ -342,7 +346,7 @@
diag_notify_update_smd_work)));
#ifdef CONFIG_DIAG_OVER_USB
- ret += scnprintf(buf+ret, DEBUG_BUF_SIZE,
+ ret += scnprintf(buf+ret, buf_size-ret,
"diag_proc_hdlc_work: %d\n"
"diag_read_work: %d\n",
work_pending(&(driver->diag_proc_hdlc_work)),
@@ -363,7 +367,8 @@
unsigned int bytes_remaining;
unsigned int bytes_in_buffer = 0;
unsigned int bytes_written;
- int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
+ unsigned int buf_size;
+ buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
if (diag_dbgfs_table_index >= diag_max_reg) {
/* Done. Reset to prepare for future requests */
@@ -376,7 +381,7 @@
pr_err("diag: %s, Error allocating memory\n", __func__);
return -ENOMEM;
}
-
+ buf_size = ksize(buf);
bytes_remaining = buf_size;
if (diag_dbgfs_table_index == 0) {
@@ -385,6 +390,7 @@
"WCNSS: %d, APPS: %d\n",
MODEM_DATA, LPASS_DATA, WCNSS_DATA, APPS_DATA);
bytes_in_buffer += bytes_written;
+ bytes_remaining -= bytes_written;
}
for (i = diag_dbgfs_table_index; i < diag_max_reg; i++) {
@@ -428,14 +434,15 @@
{
char *buf = NULL;
int ret = 0, i = 0;
-
+ unsigned int buf_size;
buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
if (ZERO_OR_NULL_PTR(buf)) {
pr_err("diag: %s, Error allocating memory\n", __func__);
return -ENOMEM;
}
+ buf_size = ksize(buf);
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ ret = scnprintf(buf, buf_size,
"POOL_TYPE_COPY: [0x%p : 0x%p] count = %d\n"
"POOL_TYPE_HDLC: [0x%p : 0x%p] count = %d\n"
"POOL_TYPE_USER: [0x%p : 0x%p] count = %d\n"
@@ -456,7 +463,7 @@
for (i = 0; i < MAX_HSIC_CH; i++) {
if (!diag_hsic[i].hsic_inited)
continue;
- ret += scnprintf(buf+ret, DEBUG_BUF_SIZE-ret,
+ ret += scnprintf(buf+ret, buf_size-ret,
"POOL_TYPE_HSIC_%d: [0x%p : 0x%p] count = %d\n",
i+1,
diag_hsic[i].diag_hsic_pool,
@@ -467,7 +474,7 @@
for (i = 0; i < MAX_HSIC_CH; i++) {
if (!diag_hsic[i].hsic_inited)
continue;
- ret += scnprintf(buf+ret, DEBUG_BUF_SIZE-ret,
+ ret += scnprintf(buf+ret, buf_size-ret,
"POOL_TYPE_HSIC_%d_WRITE: [0x%p : 0x%p] count = %d\n",
i+1,
diag_hsic[i].diag_hsic_write_pool,
@@ -486,6 +493,7 @@
{
char *buf = NULL;
int ret = 0;
+ unsigned int buf_size;
buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
if (ZERO_OR_NULL_PTR(buf)) {
@@ -493,7 +501,8 @@
return -ENOMEM;
}
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ buf_size = ksize(buf);
+ ret = scnprintf(buf, buf_size,
"POOL_TYPE_COPY: [0x%p : 0x%p] count = %d\n"
"POOL_TYPE_HDLC: [0x%p : 0x%p] count = %d\n"
"POOL_TYPE_USER: [0x%p : 0x%p] count = %d\n"
@@ -528,10 +537,12 @@
unsigned int bytes_remaining;
unsigned int bytes_in_buffer = 0;
unsigned int bytes_written;
- int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
+ unsigned int buf_size;
int bytes_hsic_inited = 45;
int bytes_hsic_not_inited = 410;
+ buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
+
if (diag_dbgfs_finished) {
diag_dbgfs_finished = 0;
return 0;
@@ -543,6 +554,7 @@
return -ENOMEM;
}
+ buf_size = ksize(buf);
bytes_remaining = buf_size;
/* Only one smux for now */
@@ -584,8 +596,8 @@
"in_busy_hsic_write: %d\n"
"count_hsic_pool: %d\n"
"count_hsic_write_pool: %d\n"
- "diag_hsic_pool: %x\n"
- "diag_hsic_write_pool: %x\n"
+ "diag_hsic_pool: %p\n"
+ "diag_hsic_write_pool: %p\n"
"HSIC write_len: %d\n"
"num_hsic_buf_tbl_entries: %d\n"
"HSIC usb_connected: %d\n"
@@ -602,8 +614,8 @@
diag_hsic[i].in_busy_hsic_write,
diag_hsic[i].count_hsic_pool,
diag_hsic[i].count_hsic_write_pool,
- (unsigned int)diag_hsic[i].diag_hsic_pool,
- (unsigned int)diag_hsic[i].diag_hsic_write_pool,
+ diag_hsic[i].diag_hsic_pool,
+ diag_hsic[i].diag_hsic_write_pool,
diag_bridge[i].write_len,
diag_hsic[i].num_hsic_buf_tbl_entries,
diag_bridge[i].usb_connected,
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index 0e27693..0e475c9 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -342,6 +342,9 @@
else if (subsys_id == 0x32 && cmd_code_hi >= 0x03 &&
cmd_code_lo <= 0x03)
return 1;
+ else if (subsys_id == 0x57 && cmd_code_hi >= 0x0E &&
+ cmd_code_lo <= 0x0E)
+ return 1;
}
return 0;
}
@@ -476,8 +479,8 @@
for (i = 0; i < diag_hsic[index].poolsize_hsic_write; i++) {
if (hsic_buf_tbl[i].length > 0) {
- pr_debug("diag: HSIC copy to user, i: %d, buf: %x, len: %d\n",
- i, (unsigned int)hsic_buf_tbl[i].buf,
+ pr_debug("diag: HSIC copy to user, i: %d, buf: %p, len: %d\n",
+ i, hsic_buf_tbl[i].buf,
hsic_buf_tbl[i].length);
num_data++;
@@ -940,6 +943,8 @@
for (i = 0; i < MAX_DCI_CLIENTS; i++) {
if (driver->dci_client_tbl[i].client == NULL) {
driver->dci_client_tbl[i].client = current;
+ driver->dci_client_tbl[i].client_id =
+ driver->dci_client_id;
driver->dci_client_tbl[i].list =
dci_params->list;
driver->dci_client_tbl[i].signal_type =
@@ -1040,7 +1045,7 @@
sizeof(struct diag_dci_health_stats)))
return -EFAULT;
mutex_lock(&dci_health_mutex);
- i = diag_dci_find_client_index(current->tgid);
+ i = diag_dci_find_client_index_health(stats.client_id);
if (i != DCI_CLIENT_INDEX_INVALID) {
dci_params = &(driver->dci_client_tbl[i]);
stats.dropped_logs = dci_params->dropped_logs;
@@ -1195,10 +1200,9 @@
for (i = 0; i < driver->buf_tbl_size; i++) {
if (driver->buf_tbl[i].length > 0) {
#ifdef DIAG_DEBUG
- pr_debug("diag: WRITING the buf address "
- "and length is %x , %d\n", (unsigned int)
- (driver->buf_tbl[i].buf),
- driver->buf_tbl[i].length);
+ pr_debug("diag: WRITING the buf address and length is %p , %d\n",
+ driver->buf_tbl[i].buf,
+ driver->buf_tbl[i].length);
#endif
num_data++;
/* Copy the length of data being passed */
@@ -1219,10 +1223,9 @@
ret += driver->buf_tbl[i].length;
drop:
#ifdef DIAG_DEBUG
- pr_debug("diag: DEQUEUE buf address and"
- " length is %x,%d\n", (unsigned int)
- (driver->buf_tbl[i].buf), driver->
- buf_tbl[i].length);
+ pr_debug("diag: DEQUEUE buf address and length is %p, %d\n",
+ driver->buf_tbl[i].buf,
+ driver->buf_tbl[i].length);
#endif
diagmem_free(driver, (unsigned char *)
(driver->buf_tbl[i].buf), POOL_TYPE_HDLC);
diff --git a/drivers/char/diag/diagfwd.c b/drivers/char/diag/diagfwd.c
index 395bea0..028f045 100644
--- a/drivers/char/diag/diagfwd.c
+++ b/drivers/char/diag/diagfwd.c
@@ -825,10 +825,9 @@
driver->buf_tbl[i].length =
driver->used;
#ifdef DIAG_DEBUG
- pr_debug("diag: ENQUEUE buf ptr"
- " and length is %x , %d\n",
- (unsigned int)(driver->buf_
- tbl[i].buf), driver->buf_tbl[i].length);
+ pr_debug("diag: ENQUEUE buf ptr and length is %p , %d\n",
+ driver->buf_tbl[i].buf,
+ driver->buf_tbl[i].length);
#endif
break;
}
@@ -860,9 +859,9 @@
if (foundIndex == -1)
err = -1;
else
- pr_debug("diag: ENQUEUE HSIC buf ptr and length is %x , %d, ch %d\n",
- (unsigned int)buf,
- diag_bridge[index].write_len, index);
+ pr_debug("diag: ENQUEUE HSIC buf ptr and length is %p , %d, ch %d\n",
+ buf, diag_bridge[index].write_len,
+ index);
}
#endif
for (i = 0; i < driver->num_clients; i++)
diff --git a/drivers/cpufreq/cpu-boost.c b/drivers/cpufreq/cpu-boost.c
index 8cd5ef9..f20510d 100644
--- a/drivers/cpufreq/cpu-boost.c
+++ b/drivers/cpufreq/cpu-boost.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -17,6 +17,7 @@
#include <linux/init.h>
#include <linux/notifier.h>
#include <linux/cpufreq.h>
+#include <linux/cpu.h>
#include <linux/sched.h>
#include <linux/jiffies.h>
#include <linux/kthread.h>
@@ -62,6 +63,12 @@
* The CPUFREQ_ADJUST notifier is used to override the current policy min to
* make sure policy min >= boost_min. The cpufreq framework then does the job
* of enforcing the new policy.
+ *
+ * The sync kthread needs to run on the CPU in question to avoid deadlocks in
+ * the wake up code. Achieve this by binding the thread to the respective
+ * CPU. But a CPU going offline unbinds threads from that CPU. So, set it up
+ * again each time the CPU comes back up. We can use CPUFREQ_START to figure
+ * out a CPU is coming online instead of registering for hotplug notifiers.
*/
static int boost_adjust_notify(struct notifier_block *nb, unsigned long val, void *data)
{
@@ -72,22 +79,27 @@
unsigned int ib_min = s->input_boost_min;
unsigned int min;
- if (val != CPUFREQ_ADJUST)
- return NOTIFY_OK;
+ switch (val) {
+ case CPUFREQ_ADJUST:
+ if (!b_min && !ib_min)
+ break;
- if (!b_min && !ib_min)
- return NOTIFY_OK;
+ min = max(b_min, ib_min);
- min = max(b_min, ib_min);
+ pr_debug("CPU%u policy min before boost: %u kHz\n",
+ cpu, policy->min);
+ pr_debug("CPU%u boost min: %u kHz\n", cpu, min);
- pr_debug("CPU%u policy min before boost: %u kHz\n",
- cpu, policy->min);
- pr_debug("CPU%u boost min: %u kHz\n", cpu, min);
+ cpufreq_verify_within_limits(policy, min, UINT_MAX);
- cpufreq_verify_within_limits(policy, min, UINT_MAX);
+ pr_debug("CPU%u policy min after boost: %u kHz\n",
+ cpu, policy->min);
+ break;
- pr_debug("CPU%u policy min after boost: %u kHz\n",
- cpu, policy->min);
+ case CPUFREQ_START:
+ set_cpus_allowed(s->thread, *cpumask_of(cpu));
+ break;
+ }
return NOTIFY_OK;
}
@@ -165,9 +177,15 @@
s->boost_min = src_policy.cur;
}
/* Force policy re-evaluation to trigger adjust notifier. */
- cpufreq_update_policy(dest_cpu);
- queue_delayed_work_on(s->cpu, cpu_boost_wq,
- &s->boost_rem, msecs_to_jiffies(boost_ms));
+ get_online_cpus();
+ if (cpu_online(dest_cpu)) {
+ cpufreq_update_policy(dest_cpu);
+ queue_delayed_work_on(dest_cpu, cpu_boost_wq,
+ &s->boost_rem, msecs_to_jiffies(boost_ms));
+ } else {
+ s->boost_min = 0;
+ }
+ put_online_cpus();
}
return 0;
@@ -202,6 +220,7 @@
struct cpu_sync *i_sync_info;
struct cpufreq_policy policy;
+ get_online_cpus();
for_each_online_cpu(i) {
i_sync_info = &per_cpu(sync_info, i);
@@ -218,6 +237,7 @@
&i_sync_info->input_boost_rem,
msecs_to_jiffies(input_boost_ms));
}
+ put_online_cpus();
}
static void cpuboost_input_event(struct input_handle *handle,
@@ -332,6 +352,7 @@
INIT_DELAYED_WORK(&s->input_boost_rem, do_input_boost_rem);
s->thread = kthread_run(boost_mig_sync_thread, (void *)cpu,
"boost_sync/%d", cpu);
+ set_cpus_allowed(s->thread, *cpumask_of(cpu));
}
atomic_notifier_chain_register(&migration_notifier_head,
&boost_migration_nb);
diff --git a/drivers/cpufreq/cpufreq_interactive.c b/drivers/cpufreq/cpufreq_interactive.c
index 45a41eb..e96d577 100644
--- a/drivers/cpufreq/cpufreq_interactive.c
+++ b/drivers/cpufreq/cpufreq_interactive.c
@@ -445,7 +445,7 @@
continue;
max_load = max(max_load, picpu->prev_load);
- max_freq = max(max_freq, picpu->policy->cur);
+ max_freq = max(max_freq, picpu->target_freq);
}
if (max_freq > up_threshold_any_cpu_freq &&
@@ -1283,6 +1283,7 @@
pcpu = &per_cpu(cpuinfo, j);
down_write(&pcpu->enable_sem);
pcpu->governor_enabled = 0;
+ pcpu->target_freq = 0;
del_timer_sync(&pcpu->cpu_timer);
del_timer_sync(&pcpu->cpu_slack_timer);
up_write(&pcpu->enable_sem);
diff --git a/drivers/crypto/msm/qce.h b/drivers/crypto/msm/qce.h
index afd5141..73438d0 100644
--- a/drivers/crypto/msm/qce.h
+++ b/drivers/crypto/msm/qce.h
@@ -1,6 +1,6 @@
/* Qualcomm Crypto Engine driver API
*
- * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -116,6 +116,13 @@
bool bam;
bool is_shared;
bool hw_key;
+ bool use_sw_aes_cbc_ecb_ctr_algo;
+ bool use_sw_aead_algo;
+ bool use_sw_aes_xts_algo;
+ bool use_sw_ahash_algo;
+ bool use_sw_hmac_algo;
+ bool use_sw_aes_ccm_algo;
+ bool clk_mgmt_sus_res;
};
/* Sha operation parameters */
diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c
index 7f6498a..62fd948 100644
--- a/drivers/crypto/msm/qce50.c
+++ b/drivers/crypto/msm/qce50.c
@@ -1,6 +1,6 @@
/* Qualcomm Crypto Engine driver.
*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,6 +38,7 @@
#include "qce.h"
#include "qce50.h"
#include "qcryptohw_50.h"
+#include "qce_ota.h"
#define CRYPTO_CONFIG_RESET 0xE001F
#define QCE_MAX_NUM_DSCR 0x500
@@ -72,6 +73,7 @@
int is_shared; /* CE HW is shared */
bool support_cmd_dscr;
bool support_hw_key;
+ bool support_clk_mgmt_sus_res;
void __iomem *iobase; /* Virtual io base of CE HW */
unsigned int phy_iobase; /* Physical io base of CE HW */
@@ -96,6 +98,17 @@
enum qce_cipher_mode_enum mode;
struct qce_ce_cfg_reg_setting reg;
struct ce_sps_data ce_sps;
+ uint32_t engines_avail;
+ dma_addr_t phy_ota_src;
+ dma_addr_t phy_ota_dst;
+ unsigned int ota_size;
+
+ bool use_sw_aes_cbc_ecb_ctr_algo;
+ bool use_sw_aead_algo;
+ bool use_sw_aes_xts_algo;
+ bool use_sw_ahash_algo;
+ bool use_sw_hmac_algo;
+ bool use_sw_aes_ccm_algo;
};
/* Standard initialization vector for SHA-1, source: FIPS 180-2 */
@@ -202,6 +215,8 @@
};
pce_dev->ce_sps.minor_version = min_rev;
+ pce_dev->engines_avail = readl_relaxed(pce_dev->iobase +
+ CRYPTO_ENGINES_AVAIL);
dev_info(pce_dev->pdev, "Qualcomm Crypto %d.%d.%d device found @0x%x\n",
maj_rev, min_rev, step_rev, pce_dev->phy_iobase);
@@ -212,12 +227,14 @@
"Consumer (IN) PIPE %d, "
"Producer (OUT) PIPE %d\n"
"IO base BAM = 0x%x\n"
- "BAM IRQ %d\n",
+ "BAM IRQ %d\n"
+ "Engines Availability = 0x%x\n",
(uint32_t) pce_dev->iobase,
pce_dev->ce_sps.dest_pipe_index,
pce_dev->ce_sps.src_pipe_index,
(uint32_t)pce_dev->ce_sps.bam_iobase,
- pce_dev->ce_sps.bam_irq);
+ pce_dev->ce_sps.bam_irq,
+ pce_dev->engines_avail);
return 0;
};
@@ -268,31 +285,38 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
bool sha1 = false;
struct sps_command_element *pce = NULL;
+ bool use_hw_key = false;
+ bool use_pipe_key = false;
+ uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
+ uint32_t auth_cfg;
if ((sreq->alg == QCE_HASH_SHA1_HMAC) ||
(sreq->alg == QCE_HASH_SHA256_HMAC) ||
(sreq->alg == QCE_HASH_AES_CMAC)) {
- uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
- _byte_stream_to_net_words(mackey32, sreq->authkey,
- sreq->authklen);
- /* check for null key. If null, use hw key*/
- for (i = 0; i < authk_size_in_word; i++) {
- if (mackey32[i] != 0)
- break;
- }
-
+ /* no more check for null key. use flag */
+ if ((sreq->flags & QCRYPTO_CTX_USE_HW_KEY)
+ == QCRYPTO_CTX_USE_HW_KEY)
+ use_hw_key = true;
+ else if ((sreq->flags & QCRYPTO_CTX_USE_PIPE_KEY) ==
+ QCRYPTO_CTX_USE_PIPE_KEY)
+ use_pipe_key = true;
pce = cmdlistinfo->go_proc;
- if (i == authk_size_in_word) {
+ if (use_hw_key == true) {
pce->addr = (uint32_t)(CRYPTO_GOPROC_QC_KEY_REG +
pce_dev->phy_iobase);
} else {
pce->addr = (uint32_t)(CRYPTO_GOPROC_REG +
pce_dev->phy_iobase);
pce = cmdlistinfo->auth_key;
- for (i = 0; i < authk_size_in_word; i++, pce++)
- pce->data = mackey32[i];
+ if (use_pipe_key == false) {
+ _byte_stream_to_net_words(mackey32,
+ sreq->authkey,
+ sreq->authklen);
+ for (i = 0; i < authk_size_in_word; i++, pce++)
+ pce->data = mackey32[i];
+ }
}
}
@@ -347,14 +371,19 @@
/* Set/reset last bit in CFG register */
pce = cmdlistinfo->auth_seg_cfg;
+ auth_cfg = pce->data & ~(1 << CRYPTO_LAST |
+ 1 << CRYPTO_FIRST |
+ 1 << CRYPTO_USE_PIPE_KEY_AUTH |
+ 1 << CRYPTO_USE_HW_KEY_AUTH);
if (sreq->last_blk)
- pce->data |= 1 << CRYPTO_LAST;
- else
- pce->data &= ~(1 << CRYPTO_LAST);
+ auth_cfg |= 1 << CRYPTO_LAST;
if (sreq->first_blk)
- pce->data |= 1 << CRYPTO_FIRST;
- else
- pce->data &= ~(1 << CRYPTO_FIRST);
+ auth_cfg |= 1 << CRYPTO_FIRST;
+ if (use_hw_key)
+ auth_cfg |= 1 << CRYPTO_USE_HW_KEY_AUTH;
+ if (use_pipe_key)
+ auth_cfg |= 1 << CRYPTO_USE_PIPE_KEY_AUTH;
+ pce->data = auth_cfg;
go_proc:
/* write auth seg size */
pce = cmdlistinfo->auth_seg_size;
@@ -443,7 +472,7 @@
uint32_t totallen_in, uint32_t coffset,
struct qce_cmdlist_info *cmdlistinfo)
{
- int32_t authk_size_in_word = q_req->authklen/sizeof(uint32_t);
+ int32_t authk_size_in_word = SHA_HMAC_KEY_SIZE/sizeof(uint32_t);
int i;
uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {0};
struct sps_command_element *pce;
@@ -804,12 +833,20 @@
}
/* write xts du size */
pce = cmdlistinfo->encr_xts_du_size;
- if (!(creq->flags & QCRYPTO_CTX_XTS_MASK))
- pce->data = creq->cryptlen;
- else
+ switch (creq->flags & QCRYPTO_CTX_XTS_MASK) {
+ case QCRYPTO_CTX_XTS_DU_SIZE_512B:
pce->data = min((unsigned int)QCE_SECTOR_SIZE,
creq->cryptlen);
-
+ break;
+ case QCRYPTO_CTX_XTS_DU_SIZE_1KB:
+ pce->data =
+ min((unsigned int)QCE_SECTOR_SIZE * 2,
+ creq->cryptlen);
+ break;
+ default:
+ pce->data = creq->cryptlen;
+ break;
+ }
}
if (creq->mode != QCE_MODE_ECB) {
if (creq->mode == QCE_MODE_XTS)
@@ -889,15 +926,141 @@
return 0;
};
+static int _ce_f9_setup(struct qce_device *pce_dev, struct qce_f9_req *req,
+ struct qce_cmdlist_info *cmdlistinfo)
+{
+ uint32_t ikey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+ uint32_t cfg;
+ struct sps_command_element *pce;
+ int i;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cfg = pce_dev->reg.auth_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cfg = pce_dev->reg.auth_cfg_snow3g;
+ break;
+ };
+
+ /* write key in CRYPTO_AUTH_IV0-3_REG */
+ _byte_stream_to_net_words(ikey32, &req->ikey[0], OTA_KEY_SIZE);
+ pce = cmdlistinfo->auth_iv;
+ for (i = 0; i < key_size_in_word; i++, pce++)
+ pce->data = ikey32[i];
+
+ /* write last bits in CRYPTO_AUTH_IV4_REG */
+ pce->data = req->last_bits;
+
+ /* write fresh to CRYPTO_AUTH_BYTECNT0_REG */
+ pce = cmdlistinfo->auth_bytecount;
+ pce->data = req->fresh;
+
+ /* write count-i to CRYPTO_AUTH_BYTECNT1_REG */
+ pce++;
+ pce->data = req->count_i;
+
+ /* write auth seg cfg */
+ pce = cmdlistinfo->auth_seg_cfg;
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ cfg |= BIT(CRYPTO_F9_DIRECTION);
+ pce->data = cfg;
+
+ /* write auth seg size */
+ pce = cmdlistinfo->auth_seg_size;
+ pce->data = req->msize;
+
+ /* write auth seg start*/
+ pce = cmdlistinfo->auth_seg_start;
+ pce->data = 0;
+
+ /* write seg size */
+ pce = cmdlistinfo->seg_size;
+ pce->data = req->msize;
+
+
+ /* write go */
+ pce = cmdlistinfo->go_proc;
+ pce->addr = (uint32_t)(CRYPTO_GOPROC_REG + pce_dev->phy_iobase);
+ return 0;
+}
+
+static int _ce_f8_setup(struct qce_device *pce_dev, struct qce_f8_req *req,
+ bool key_stream_mode, uint16_t npkts, uint16_t cipher_offset,
+ uint16_t cipher_size,
+ struct qce_cmdlist_info *cmdlistinfo)
+{
+ uint32_t ckey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+ uint32_t cfg;
+ struct sps_command_element *pce;
+ int i;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cfg = pce_dev->reg.encr_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cfg = pce_dev->reg.encr_cfg_snow3g;
+ break;
+ };
+ /* write key */
+ _byte_stream_to_net_words(ckey32, &req->ckey[0], OTA_KEY_SIZE);
+ pce = cmdlistinfo->encr_key;
+ for (i = 0; i < key_size_in_word; i++, pce++)
+ pce->data = ckey32[i];
+
+ /* write encr seg cfg */
+ pce = cmdlistinfo->encr_seg_cfg;
+ if (key_stream_mode)
+ cfg |= BIT(CRYPTO_F8_KEYSTREAM_ENABLE);
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ cfg |= BIT(CRYPTO_F8_DIRECTION);
+ pce->data = cfg;
+
+ /* write encr seg start */
+ pce = cmdlistinfo->encr_seg_start;
+ pce->data = (cipher_offset & 0xffff);
+
+ /* write encr seg size */
+ pce = cmdlistinfo->encr_seg_size;
+ pce->data = cipher_size;
+
+ /* write seg size */
+ pce = cmdlistinfo->seg_size;
+ pce->data = req->data_len;
+
+ /* write cntr0_iv0 for countC */
+ pce = cmdlistinfo->encr_cntr_iv;
+ pce->data = req->count_c;
+ /* write cntr1_iv1 for nPkts, and bearer */
+ pce++;
+ if (npkts == 1)
+ npkts = 0;
+ pce->data = req->bearer << CRYPTO_CNTR1_IV1_REG_F8_BEARER |
+ npkts << CRYPTO_CNTR1_IV1_REG_F8_PKT_CNT;
+
+ /* write go */
+ pce = cmdlistinfo->go_proc;
+ pce->addr = (uint32_t)(CRYPTO_GOPROC_REG + pce_dev->phy_iobase);
+
+ return 0;
+}
+
static int _ce_setup_hash_direct(struct qce_device *pce_dev,
struct qce_sha_req *sreq)
{
uint32_t auth32[SHA256_DIGEST_SIZE / sizeof(uint32_t)];
uint32_t diglen;
bool use_hw_key = false;
+ bool use_pipe_key = false;
int i;
uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
bool sha1 = false;
uint32_t auth_cfg = 0;
@@ -944,25 +1107,25 @@
if ((sreq->alg == QCE_HASH_SHA1_HMAC) ||
(sreq->alg == QCE_HASH_SHA256_HMAC) ||
(sreq->alg == QCE_HASH_AES_CMAC)) {
- uint32_t authk_size_in_word = sreq->authklen/sizeof(uint32_t);
_byte_stream_to_net_words(mackey32, sreq->authkey,
sreq->authklen);
- /* check for null key. If null, use hw key*/
- for (i = 0; i < authk_size_in_word; i++) {
- if (mackey32[i] != 0)
- break;
- }
+ /* no more check for null key. use flag to check*/
- if (i == authk_size_in_word)
+ if ((sreq->flags & QCRYPTO_CTX_USE_HW_KEY) ==
+ QCRYPTO_CTX_USE_HW_KEY) {
use_hw_key = true;
- else
- /* Clear auth_ivn, auth_keyn registers */
+ } else if ((sreq->flags & QCRYPTO_CTX_USE_PIPE_KEY) ==
+ QCRYPTO_CTX_USE_PIPE_KEY) {
+ use_pipe_key = true;
+ } else {
+ /* setup key */
for (i = 0; i < authk_size_in_word; i++)
writel_relaxed(mackey32[i], (pce_dev->iobase +
(CRYPTO_AUTH_KEY0_REG +
i*sizeof(uint32_t))));
+ }
}
if (sreq->alg == QCE_HASH_AES_CMAC)
@@ -1036,6 +1199,10 @@
auth_cfg |= 1 << CRYPTO_FIRST;
else
auth_cfg &= ~(1 << CRYPTO_FIRST);
+ if (use_hw_key)
+ auth_cfg |= 1 << CRYPTO_USE_HW_KEY_AUTH;
+ if (use_pipe_key)
+ auth_cfg |= 1 << CRYPTO_USE_PIPE_KEY_AUTH;
go_proc:
/* write seg_cfg */
writel_relaxed(auth_cfg, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
@@ -1071,7 +1238,7 @@
static int _ce_setup_aead_direct(struct qce_device *pce_dev,
struct qce_req *q_req, uint32_t totallen_in, uint32_t coffset)
{
- int32_t authk_size_in_word = q_req->authklen/sizeof(uint32_t);
+ int32_t authk_size_in_word = SHA_HMAC_KEY_SIZE/sizeof(uint32_t);
int i;
uint32_t mackey32[SHA_HMAC_KEY_SIZE/sizeof(uint32_t)] = {0};
uint32_t a_cfg;
@@ -1454,15 +1621,25 @@
(i * sizeof(uint32_t)));
}
/* write xts du size */
- if (use_pipe_key == true)
- writel_relaxed(min((uint32_t)QCE_SECTOR_SIZE,
- creq->cryptlen),
- pce_dev->iobase +
- CRYPTO_ENCR_XTS_DU_SIZE_REG);
- else
- writel_relaxed(creq->cryptlen ,
- pce_dev->iobase +
- CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ switch (creq->flags & QCRYPTO_CTX_XTS_MASK) {
+ case QCRYPTO_CTX_XTS_DU_SIZE_512B:
+ writel_relaxed(
+ min((uint32_t)QCE_SECTOR_SIZE,
+ creq->cryptlen), pce_dev->iobase +
+ CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ break;
+ case QCRYPTO_CTX_XTS_DU_SIZE_1KB:
+ writel_relaxed(
+ min((uint32_t)(QCE_SECTOR_SIZE * 2),
+ creq->cryptlen), pce_dev->iobase +
+ CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ break;
+ default:
+ writel_relaxed(creq->cryptlen,
+ pce_dev->iobase +
+ CRYPTO_ENCR_XTS_DU_SIZE_REG);
+ break;
+ }
}
if (creq->mode != QCE_MODE_ECB) {
if (creq->mode == QCE_MODE_XTS)
@@ -1556,6 +1733,168 @@
return 0;
};
+static int _ce_f9_setup_direct(struct qce_device *pce_dev,
+ struct qce_f9_req *req)
+{
+ uint32_t ikey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+ uint32_t auth_cfg;
+ int i;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ auth_cfg = pce_dev->reg.auth_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ auth_cfg = pce_dev->reg.auth_cfg_snow3g;
+ break;
+ };
+
+ /* clear status */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_STATUS_REG);
+
+ /* set big endian configuration */
+ writel_relaxed(pce_dev->reg.crypto_cfg_be, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /*
+ * Ensure previous instructions (setting the CONFIG register)
+ * was completed before issuing starting to set other config register
+ * This is to ensure the configurations are done in correct endian-ness
+ * as set in the CONFIG registers
+ */
+ mb();
+
+ /* write enc_seg_cfg */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_ENCR_SEG_CFG_REG);
+
+ /* write ecn_seg_size */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_ENCR_SEG_SIZE_REG);
+
+ /* write key in CRYPTO_AUTH_IV0-3_REG */
+ _byte_stream_to_net_words(ikey32, &req->ikey[0], OTA_KEY_SIZE);
+ for (i = 0; i < key_size_in_word; i++)
+ writel_relaxed(ikey32[i], (pce_dev->iobase +
+ (CRYPTO_AUTH_IV0_REG + i*sizeof(uint32_t))));
+
+ /* write last bits in CRYPTO_AUTH_IV4_REG */
+ writel_relaxed(req->last_bits, (pce_dev->iobase +
+ CRYPTO_AUTH_IV4_REG));
+
+ /* write fresh to CRYPTO_AUTH_BYTECNT0_REG */
+ writel_relaxed(req->fresh, (pce_dev->iobase +
+ CRYPTO_AUTH_BYTECNT0_REG));
+
+ /* write count-i to CRYPTO_AUTH_BYTECNT1_REG */
+ writel_relaxed(req->count_i, (pce_dev->iobase +
+ CRYPTO_AUTH_BYTECNT1_REG));
+
+ /* write auth seg cfg */
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ auth_cfg |= BIT(CRYPTO_F9_DIRECTION);
+ writel_relaxed(auth_cfg, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
+
+ /* write auth seg size */
+ writel_relaxed(req->msize, pce_dev->iobase + CRYPTO_AUTH_SEG_SIZE_REG);
+
+ /* write auth seg start*/
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_START_REG);
+
+ /* write seg size */
+ writel_relaxed(req->msize, pce_dev->iobase + CRYPTO_SEG_SIZE_REG);
+
+ /* set little endian configuration before go*/
+ writel_relaxed(pce_dev->reg.crypto_cfg_le, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /* write go */
+ writel_relaxed(((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ pce_dev->iobase + CRYPTO_GOPROC_REG);
+ /*
+ * Ensure previous instructions (setting the GO register)
+ * was completed before issuing a DMA transfer request
+ */
+ mb();
+ return 0;
+}
+
+static int _ce_f8_setup_direct(struct qce_device *pce_dev,
+ struct qce_f8_req *req, bool key_stream_mode,
+ uint16_t npkts, uint16_t cipher_offset, uint16_t cipher_size)
+{
+ int i = 0;
+ uint32_t encr_cfg = 0;
+ uint32_t ckey32[OTA_KEY_SIZE/sizeof(uint32_t)];
+ uint32_t key_size_in_word = OTA_KEY_SIZE/sizeof(uint32_t);
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ encr_cfg = pce_dev->reg.encr_cfg_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ encr_cfg = pce_dev->reg.encr_cfg_snow3g;
+ break;
+ };
+ /* clear status */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_STATUS_REG);
+ /* set big endian configuration */
+ writel_relaxed(pce_dev->reg.crypto_cfg_be, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /* write auth seg configuration */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_CFG_REG);
+ /* write auth seg size */
+ writel_relaxed(0, pce_dev->iobase + CRYPTO_AUTH_SEG_SIZE_REG);
+
+ /* write key */
+ _byte_stream_to_net_words(ckey32, &req->ckey[0], OTA_KEY_SIZE);
+
+ for (i = 0; i < key_size_in_word; i++)
+ writel_relaxed(ckey32[i], (pce_dev->iobase +
+ (CRYPTO_ENCR_KEY0_REG + i*sizeof(uint32_t))));
+ /* write encr seg cfg */
+ if (key_stream_mode)
+ encr_cfg |= BIT(CRYPTO_F8_KEYSTREAM_ENABLE);
+ if (req->direction == QCE_OTA_DIR_DOWNLINK)
+ encr_cfg |= BIT(CRYPTO_F8_DIRECTION);
+ writel_relaxed(encr_cfg, pce_dev->iobase +
+ CRYPTO_ENCR_SEG_CFG_REG);
+
+ /* write encr seg start */
+ writel_relaxed((cipher_offset & 0xffff), pce_dev->iobase +
+ CRYPTO_ENCR_SEG_START_REG);
+ /* write encr seg size */
+ writel_relaxed(cipher_size, pce_dev->iobase +
+ CRYPTO_ENCR_SEG_SIZE_REG);
+
+ /* write seg size */
+ writel_relaxed(req->data_len, pce_dev->iobase +
+ CRYPTO_SEG_SIZE_REG);
+
+ /* write cntr0_iv0 for countC */
+ writel_relaxed(req->count_c, pce_dev->iobase +
+ CRYPTO_CNTR0_IV0_REG);
+ /* write cntr1_iv1 for nPkts, and bearer */
+ if (npkts == 1)
+ npkts = 0;
+ writel_relaxed(req->bearer << CRYPTO_CNTR1_IV1_REG_F8_BEARER |
+ npkts << CRYPTO_CNTR1_IV1_REG_F8_PKT_CNT,
+ pce_dev->iobase + CRYPTO_CNTR1_IV1_REG);
+
+ /* set little endian configuration before go*/
+ writel_relaxed(pce_dev->reg.crypto_cfg_le, (pce_dev->iobase +
+ CRYPTO_CONFIG_REG));
+ /* write go */
+ writel_relaxed(((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ pce_dev->iobase + CRYPTO_GOPROC_REG);
+ /*
+ * Ensure previous instructions (setting the GO register)
+ * was completed before issuing a DMA transfer request
+ */
+ mb();
+ return 0;
+}
+
+
static int _qce_unlock_other_pipes(struct qce_device *pce_dev)
{
int rc = 0;
@@ -1705,6 +2044,48 @@
return 0;
};
+static int _f9_complete(struct qce_device *pce_dev)
+{
+ uint32_t mac_i;
+ uint32_t status;
+ int32_t result_status;
+
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ pce_dev->ota_size, DMA_TO_DEVICE);
+ _byte_stream_to_net_words(&mac_i,
+ (char *)(&pce_dev->ce_sps.result->auth_iv[0]),
+ CRYPTO_REG_SIZE);
+ /* read status before unlock */
+ status = readl_relaxed(pce_dev->iobase + CRYPTO_STATUS_REG);
+ if (_qce_unlock_other_pipes(pce_dev)) {
+ pce_dev->qce_cb(pce_dev->areq, NULL, NULL, -ENXIO);
+ return -ENXIO;
+ }
+ if (status & ((1 << CRYPTO_SW_ERR) | (1 << CRYPTO_AXI_ERR)
+ | (1 << CRYPTO_HSD_ERR))) {
+ pr_err("f9 operation error. Status %x\n", status);
+ result_status = -ENXIO;
+ } else if (pce_dev->ce_sps.consumer_status |
+ pce_dev->ce_sps.producer_status) {
+ pr_err("f9 sps operation error. sps status %x %x\n",
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else if ((status & (1 << CRYPTO_OPERATION_DONE)) == 0) {
+ pr_err("f9 operation not done? Status %x, sps status %x %x\n",
+ status,
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else {
+ result_status = 0;
+ }
+ pce_dev->qce_cb(pce_dev->areq, (void *) mac_i, NULL,
+ result_status);
+
+ return 0;
+}
+
static int _ablk_cipher_complete(struct qce_device *pce_dev)
{
struct ablkcipher_request *areq;
@@ -1811,6 +2192,47 @@
return 0;
};
+static int _f8_complete(struct qce_device *pce_dev)
+{
+ uint32_t status;
+ int32_t result_status;
+
+ if (pce_dev->phy_ota_dst != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_dst,
+ pce_dev->ota_size, DMA_FROM_DEVICE);
+ if (pce_dev->phy_ota_src != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ pce_dev->ota_size, (pce_dev->phy_ota_dst) ?
+ DMA_TO_DEVICE : DMA_BIDIRECTIONAL);
+ /* read status before unlock */
+ status = readl_relaxed(pce_dev->iobase + CRYPTO_STATUS_REG);
+ if (_qce_unlock_other_pipes(pce_dev)) {
+ pce_dev->qce_cb(pce_dev->areq, NULL, NULL, -ENXIO);
+ return -ENXIO;
+ }
+ if (status & ((1 << CRYPTO_SW_ERR) | (1 << CRYPTO_AXI_ERR)
+ | (1 << CRYPTO_HSD_ERR))) {
+ pr_err("f8 operation error. Status %x\n", status);
+ result_status = -ENXIO;
+ } else if (pce_dev->ce_sps.consumer_status |
+ pce_dev->ce_sps.producer_status) {
+ pr_err("f8 sps operation error. sps status %x %x\n",
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else if ((status & (1 << CRYPTO_OPERATION_DONE)) == 0) {
+ pr_err("f8 operation not done? Status %x, sps status %x %x\n",
+ status,
+ pce_dev->ce_sps.consumer_status,
+ pce_dev->ce_sps.producer_status);
+ result_status = -ENXIO;
+ } else {
+ result_status = 0;
+ }
+ pce_dev->qce_cb(pce_dev->areq, NULL, NULL, result_status);
+ return 0;
+}
+
#ifdef QCE_DEBUG
static void _qce_dump_descr_fifos(struct qce_device *pce_dev)
{
@@ -1903,8 +2325,11 @@
static void _qce_set_flag(struct sps_transfer *sps_bam_pipe, uint32_t flag)
{
- struct sps_iovec *iovec = sps_bam_pipe->iovec +
- (sps_bam_pipe->iovec_count - 1);
+ struct sps_iovec *iovec;
+
+ if (sps_bam_pipe->iovec_count == 0)
+ return;
+ iovec = sps_bam_pipe->iovec + (sps_bam_pipe->iovec_count - 1);
iovec->flags |= flag;
}
@@ -1913,16 +2338,26 @@
{
struct sps_iovec *iovec = sps_bam_pipe->iovec +
sps_bam_pipe->iovec_count;
- if (sps_bam_pipe->iovec_count == QCE_MAX_NUM_DSCR) {
- pr_err("Num of descrptor %d exceed max (%d)",
- sps_bam_pipe->iovec_count, (uint32_t)QCE_MAX_NUM_DSCR);
- return -ENOMEM;
- }
- if (len) {
- iovec->size = len;
+ uint32_t data_cnt;
+
+ while (len > 0) {
+ if (sps_bam_pipe->iovec_count == QCE_MAX_NUM_DSCR) {
+ pr_err("Num of descrptor %d exceed max (%d)",
+ sps_bam_pipe->iovec_count,
+ (uint32_t)QCE_MAX_NUM_DSCR);
+ return -ENOMEM;
+ }
+ if (len > SPS_MAX_PKT_SIZE)
+ data_cnt = SPS_MAX_PKT_SIZE;
+ else
+ data_cnt = len;
+ iovec->size = data_cnt;
iovec->addr = addr;
iovec->flags = 0;
sps_bam_pipe->iovec_count++;
+ iovec++;
+ addr += data_cnt;
+ len -= data_cnt;
}
return 0;
}
@@ -1988,13 +2423,15 @@
int rc = 0;
_qce_dump_descr_fifos(pce_dev);
- rc = sps_transfer(pce_dev->ce_sps.consumer.pipe,
+ if (pce_dev->ce_sps.in_transfer.iovec_count) {
+ rc = sps_transfer(pce_dev->ce_sps.consumer.pipe,
&pce_dev->ce_sps.in_transfer);
- if (rc) {
- pr_err("sps_xfr() fail (consumer pipe=0x%x) rc = %d,",
+ if (rc) {
+ pr_err("sps_xfr() fail (consumer pipe=0x%x) rc = %d,",
(u32)pce_dev->ce_sps.consumer.pipe, rc);
- _qce_dump_descr_fifos_fail(pce_dev);
- return rc;
+ _qce_dump_descr_fifos_fail(pce_dev);
+ return rc;
+ }
}
rc = sps_transfer(pce_dev->ce_sps.producer.pipe,
&pce_dev->ce_sps.out_transfer);
@@ -2255,6 +2692,10 @@
CRYPTO_BAM_CNFG_BITS_REG);
pbam->support_cmd_dscr = (bam_cfg & CRYPTO_BAM_CD_ENABLE_MASK) ?
true : false;
+ if (pbam->support_cmd_dscr == false) {
+ pr_info("qce50 don't support command descriptor. bam_cfg%x\n",
+ bam_cfg);
+ }
pce_dev->support_cmd_dscr = pbam->support_cmd_dscr;
bam.phys_addr = pce_dev->ce_sps.bam_mem;
@@ -2282,6 +2723,7 @@
bam.manage = SPS_BAM_MGR_DEVICE_REMOTE;
else
bam.manage = SPS_BAM_MGR_LOCAL;
+
bam.ee = 1;
pr_debug("bam physical base=0x%x\n", (u32)bam.phys_addr);
@@ -2419,6 +2861,55 @@
_sha_complete(pce_dev);
};
+static void _f9_sps_producer_callback(struct sps_event_notify *notify)
+{
+ struct qce_device *pce_dev = (struct qce_device *)
+ ((struct sps_event_notify *)notify)->user;
+
+ pce_dev->ce_sps.notify = *notify;
+ pr_debug("sps ev_id=%d, addr=0x%x, size=0x%x, flags=0x%x\n",
+ notify->event_id,
+ notify->data.transfer.iovec.addr,
+ notify->data.transfer.iovec.size,
+ notify->data.transfer.iovec.flags);
+ /* done */
+ _f9_complete(pce_dev);
+}
+
+static void _f8_sps_producer_callback(struct sps_event_notify *notify)
+{
+ struct qce_device *pce_dev = (struct qce_device *)
+ ((struct sps_event_notify *)notify)->user;
+
+ pce_dev->ce_sps.notify = *notify;
+ pr_debug("sps ev_id=%d, addr=0x%x, size=0x%x, flags=0x%x\n",
+ notify->event_id,
+ notify->data.transfer.iovec.addr,
+ notify->data.transfer.iovec.size,
+ notify->data.transfer.iovec.flags);
+
+ if (pce_dev->ce_sps.producer_state == QCE_PIPE_STATE_COMP) {
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ /* done */
+ _f8_complete(pce_dev);
+ } else {
+ int rc = 0;
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ pce_dev->ce_sps.out_transfer.iovec_count = 0;
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_INT);
+ rc = sps_transfer(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.out_transfer);
+ if (rc) {
+ pr_err("sps_xfr() fail (producer pipe=0x%x) rc = %d,",
+ (u32)pce_dev->ce_sps.producer.pipe, rc);
+ }
+ }
+}
+
static void _ablk_cipher_sps_producer_callback(struct sps_event_notify *notify)
{
struct qce_device *pce_dev = (struct qce_device *)
@@ -3251,6 +3742,172 @@
return 0;
}
+static int _setup_f8_cmdlistptrs(struct qce_device *pdev,
+ unsigned char **pvaddr, enum qce_ota_algo_enum alg)
+{
+ struct sps_command_element *ce_vaddr;
+ uint32_t ce_vaddr_start;
+ struct qce_cmdlistptr_ops *cmdlistptr = &pdev->ce_sps.cmdlistptr;
+ struct qce_cmdlist_info *pcl_info = NULL;
+ int i = 0;
+ uint32_t encr_cfg = 0;
+ uint32_t key_reg = 4;
+
+ *pvaddr = (unsigned char *) ALIGN(((unsigned int)(*pvaddr)),
+ pdev->ce_sps.ce_burst_size);
+ ce_vaddr = (struct sps_command_element *)(*pvaddr);
+ ce_vaddr_start = (uint32_t)(*pvaddr);
+
+ /*
+ * Designate chunks of the allocated memory to various
+ * command list pointers related to f8 cipher algorithm defined
+ * in ce_cmdlistptrs_ops structure.
+ */
+
+ switch (alg) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistptr->f8_kasumi.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f8_kasumi);
+ encr_cfg = pdev->reg.encr_cfg_kasumi;
+ break;
+
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cmdlistptr->f8_snow3g.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f8_snow3g);
+ encr_cfg = pdev->reg.encr_cfg_snow3g;
+ break;
+ }
+ /* clear status register */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_STATUS_REG,
+ 0, NULL);
+ /* set config to big endian */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_SEG_SIZE_REG, 0,
+ &pcl_info->seg_size);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_CFG_REG, encr_cfg,
+ &pcl_info->encr_seg_cfg);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_SIZE_REG, 0,
+ &pcl_info->encr_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_START_REG, 0,
+ &pcl_info->encr_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_CFG_REG, 0,
+ &pcl_info->auth_seg_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_SIZE_REG,
+ 0, &pcl_info->auth_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_START_REG,
+ 0, &pcl_info->auth_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_KEY0_REG, 0,
+ &pcl_info->encr_key);
+ for (i = 1; i < key_reg; i++)
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_ENCR_KEY0_REG + i * sizeof(uint32_t)),
+ 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CNTR0_IV0_REG, 0,
+ &pcl_info->encr_cntr_iv);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CNTR1_IV1_REG, 0,
+ NULL);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_le, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
+ ((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ &pcl_info->go_proc);
+
+ pcl_info->size = (uint32_t)ce_vaddr - (uint32_t)ce_vaddr_start;
+ *pvaddr = (unsigned char *) ce_vaddr;
+
+ return 0;
+}
+
+static int _setup_f9_cmdlistptrs(struct qce_device *pdev,
+ unsigned char **pvaddr, enum qce_ota_algo_enum alg)
+{
+ struct sps_command_element *ce_vaddr;
+ uint32_t ce_vaddr_start;
+ struct qce_cmdlistptr_ops *cmdlistptr = &pdev->ce_sps.cmdlistptr;
+ struct qce_cmdlist_info *pcl_info = NULL;
+ int i = 0;
+ uint32_t auth_cfg = 0;
+ uint32_t iv_reg = 0;
+
+ *pvaddr = (unsigned char *) ALIGN(((unsigned int)(*pvaddr)),
+ pdev->ce_sps.ce_burst_size);
+ ce_vaddr_start = (uint32_t)(*pvaddr);
+ ce_vaddr = (struct sps_command_element *)(*pvaddr);
+
+ /*
+ * Designate chunks of the allocated memory to various
+ * command list pointers related to authentication operations
+ * defined in ce_cmdlistptrs_ops structure.
+ */
+ switch (alg) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistptr->f9_kasumi.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f9_kasumi);
+ auth_cfg = pdev->reg.auth_cfg_kasumi;
+ break;
+
+ case QCE_OTA_ALGO_SNOW3G:
+ default:
+ cmdlistptr->f9_snow3g.cmdlist = (uint32_t)ce_vaddr;
+ pcl_info = &(cmdlistptr->f9_snow3g);
+ auth_cfg = pdev->reg.auth_cfg_snow3g;
+ };
+
+ /* clear status register */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_STATUS_REG,
+ 0, NULL);
+ /* set config to big endian */
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_be, &pcl_info->crypto_cfg);
+
+ iv_reg = 5;
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_SEG_SIZE_REG, 0,
+ &pcl_info->seg_size);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_ENCR_SEG_CFG_REG, 0,
+ &pcl_info->encr_seg_cfg);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_CFG_REG,
+ auth_cfg, &pcl_info->auth_seg_cfg);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_SIZE_REG, 0,
+ &pcl_info->auth_seg_size);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_SEG_START_REG, 0,
+ &pcl_info->auth_seg_start);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_IV0_REG, 0,
+ &pcl_info->auth_iv);
+ for (i = 1; i < iv_reg; i++) {
+ qce_add_cmd_element(pdev, &ce_vaddr,
+ (CRYPTO_AUTH_IV0_REG + i*sizeof(uint32_t)),
+ 0, NULL);
+ }
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_BYTECNT0_REG,
+ 0, &pcl_info->auth_bytecount);
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_AUTH_BYTECNT1_REG, 0, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_CONFIG_REG,
+ pdev->reg.crypto_cfg_le, NULL);
+
+ qce_add_cmd_element(pdev, &ce_vaddr, CRYPTO_GOPROC_REG,
+ ((1 << CRYPTO_GO) | (1 << CRYPTO_RESULTS_DUMP)),
+ &pcl_info->go_proc);
+
+ pcl_info->size = (uint32_t)ce_vaddr - (uint32_t)ce_vaddr_start;
+ *pvaddr = (unsigned char *) ce_vaddr;
+
+ return 0;
+}
+
static int _setup_unlock_pipe_cmdlistptrs(struct qce_device *pdev,
unsigned char **pvaddr)
{
@@ -3334,6 +3991,10 @@
_setup_aead_ccm_cmdlistptrs(pdev, pvaddr, true);
_setup_aead_ccm_cmdlistptrs(pdev, pvaddr, false);
+ _setup_f8_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_KASUMI);
+ _setup_f8_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_SNOW3G);
+ _setup_f9_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_KASUMI);
+ _setup_f9_cmdlistptrs(pdev, pvaddr, QCE_OTA_ALGO_SNOW3G);
_setup_unlock_pipe_cmdlistptrs(pdev, pvaddr);
return 0;
@@ -3461,6 +4122,13 @@
(CRYPTO_ENCR_ALG_DES << CRYPTO_ENCR_ALG) |
(CRYPTO_ENCR_MODE_CBC << CRYPTO_ENCR_MODE);
+ /* Initialize encr_cfg register for kasumi/snow3g alg */
+ pce_dev->reg.encr_cfg_kasumi =
+ (CRYPTO_ENCR_ALG_KASUMI << CRYPTO_ENCR_ALG);
+
+ pce_dev->reg.encr_cfg_snow3g =
+ (CRYPTO_ENCR_ALG_SNOW_3G << CRYPTO_ENCR_ALG);
+
/* Initialize auth_cfg register for CMAC alg */
pce_dev->reg.auth_cfg_cmac_128 =
(1 << CRYPTO_LAST) | (1 << CRYPTO_FIRST) |
@@ -3531,6 +4199,13 @@
((MAX_NONCE/sizeof(uint32_t)) << CRYPTO_AUTH_NONCE_NUM_WORDS);
pce_dev->reg.auth_cfg_aes_ccm_256 &= ~(1 << CRYPTO_USE_HW_KEY_AUTH);
+ /* Initialize auth_cfg register for kasumi/snow3g */
+ pce_dev->reg.auth_cfg_kasumi =
+ (CRYPTO_AUTH_ALG_KASUMI << CRYPTO_AUTH_ALG) |
+ BIT(CRYPTO_FIRST) | BIT(CRYPTO_LAST);
+ pce_dev->reg.auth_cfg_snow3g =
+ (CRYPTO_AUTH_ALG_SNOW3G << CRYPTO_AUTH_ALG) |
+ BIT(CRYPTO_FIRST) | BIT(CRYPTO_LAST);
return 0;
}
@@ -4105,6 +4780,302 @@
}
EXPORT_SYMBOL(qce_process_sha_req);
+int qce_f8_req(void *handle, struct qce_f8_req *req,
+ void *cookie, qce_comp_func_ptr_t qce_cb)
+{
+ struct qce_device *pce_dev = (struct qce_device *) handle;
+ bool key_stream_mode;
+ dma_addr_t dst;
+ int rc;
+ struct qce_cmdlist_info *cmdlistinfo;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_snow3g;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ key_stream_mode = (req->data_in == NULL);
+
+ if ((key_stream_mode && (req->data_len & 0xf)) ||
+ (req->bearer >= QCE_OTA_MAX_BEARER))
+ return -EINVAL;
+
+ /* F8 cipher input */
+ if (key_stream_mode)
+ pce_dev->phy_ota_src = 0;
+ else {
+ pce_dev->phy_ota_src = dma_map_single(pce_dev->pdev,
+ req->data_in, req->data_len,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+ }
+
+ /* F8 cipher output */
+ if (req->data_in != req->data_out) {
+ dst = dma_map_single(pce_dev->pdev, req->data_out,
+ req->data_len, DMA_FROM_DEVICE);
+ pce_dev->phy_ota_dst = dst;
+ } else {
+ /* in place ciphering */
+ dst = pce_dev->phy_ota_src;
+ pce_dev->phy_ota_dst = 0;
+ }
+ pce_dev->ota_size = req->data_len;
+
+
+ /* set up crypto device */
+ if (pce_dev->support_cmd_dscr)
+ rc = _ce_f8_setup(pce_dev, req, key_stream_mode, 1, 0,
+ req->data_len, cmdlistinfo);
+ else
+ rc = _ce_f8_setup_direct(pce_dev, req, key_stream_mode, 1, 0,
+ req->data_len);
+ if (rc < 0)
+ goto bad;
+
+ /* setup for callback, and issue command to sps */
+ pce_dev->areq = cookie;
+ pce_dev->qce_cb = qce_cb;
+
+ /* Register producer callback event for DESC_DONE event. */
+ pce_dev->ce_sps.producer.event.callback =
+ _f8_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+ _qce_sps_iovec_count_init(pce_dev);
+
+ if (pce_dev->support_cmd_dscr)
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+
+ if (!key_stream_mode) {
+ _qce_sps_add_data((uint32_t)pce_dev->phy_ota_src, req->data_len,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+ }
+
+ _qce_sps_add_data((uint32_t)dst, req->data_len,
+ &pce_dev->ce_sps.out_transfer);
+
+ if (req->data_len > SPS_MAX_PKT_SIZE) {
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ } else {
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ }
+ rc = _qce_sps_transfer(pce_dev);
+ if (rc)
+ goto bad;
+ return 0;
+bad:
+ if (pce_dev->phy_ota_dst != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_dst,
+ req->data_len, DMA_FROM_DEVICE);
+ if (pce_dev->phy_ota_src != 0)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ req->data_len,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+ return rc;
+}
+EXPORT_SYMBOL(qce_f8_req);
+
+int qce_f8_multi_pkt_req(void *handle, struct qce_f8_multi_pkt_req *mreq,
+ void *cookie, qce_comp_func_ptr_t qce_cb)
+{
+ struct qce_device *pce_dev = (struct qce_device *) handle;
+ uint16_t num_pkt = mreq->num_pkt;
+ uint16_t cipher_start = mreq->cipher_start;
+ uint16_t cipher_size = mreq->cipher_size;
+ struct qce_f8_req *req = &mreq->qce_f8_req;
+ uint32_t total;
+ dma_addr_t dst = 0;
+ int rc = 0;
+ struct qce_cmdlist_info *cmdlistinfo;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f8_snow3g;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ total = num_pkt * req->data_len;
+
+ /* F8 cipher input */
+ pce_dev->phy_ota_src = dma_map_single(pce_dev->pdev,
+ req->data_in, total,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+
+ /* F8 cipher output */
+ if (req->data_in != req->data_out) {
+ dst = dma_map_single(pce_dev->pdev, req->data_out, total,
+ DMA_FROM_DEVICE);
+ pce_dev->phy_ota_dst = dst;
+ } else {
+ /* in place ciphering */
+ dst = pce_dev->phy_ota_src;
+ pce_dev->phy_ota_dst = 0;
+ }
+
+ pce_dev->ota_size = total;
+
+ /* set up crypto device */
+ if (pce_dev->support_cmd_dscr)
+ rc = _ce_f8_setup(pce_dev, req, false, num_pkt, cipher_start,
+ cipher_size, cmdlistinfo);
+ else
+ rc = _ce_f8_setup_direct(pce_dev, req, false, num_pkt,
+ cipher_start, cipher_size);
+ if (rc)
+ goto bad;
+
+ /* setup for callback, and issue command to sps */
+ pce_dev->areq = cookie;
+ pce_dev->qce_cb = qce_cb;
+
+ /* Register producer callback event for DESC_DONE event. */
+ pce_dev->ce_sps.producer.event.callback =
+ _f8_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+ _qce_sps_iovec_count_init(pce_dev);
+
+ if (pce_dev->support_cmd_dscr)
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+
+ _qce_sps_add_data((uint32_t)pce_dev->phy_ota_src, total,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+
+ _qce_sps_add_data((uint32_t)dst, total,
+ &pce_dev->ce_sps.out_transfer);
+
+ if (total > SPS_MAX_PKT_SIZE) {
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_IDLE;
+ } else {
+ pce_dev->ce_sps.producer_state = QCE_PIPE_STATE_COMP;
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer,
+ SPS_IOVEC_FLAG_INT);
+ }
+ rc = _qce_sps_transfer(pce_dev);
+
+ if (rc == 0)
+ return 0;
+bad:
+ if (pce_dev->phy_ota_dst)
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_dst, total,
+ DMA_FROM_DEVICE);
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src, total,
+ (req->data_in == req->data_out) ?
+ DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
+ return rc;
+}
+EXPORT_SYMBOL(qce_f8_multi_pkt_req);
+
+int qce_f9_req(void *handle, struct qce_f9_req *req, void *cookie,
+ qce_comp_func_ptr_t qce_cb)
+{
+ struct qce_device *pce_dev = (struct qce_device *) handle;
+ int rc;
+ struct qce_cmdlist_info *cmdlistinfo;
+
+ switch (req->algorithm) {
+ case QCE_OTA_ALGO_KASUMI:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f9_kasumi;
+ break;
+ case QCE_OTA_ALGO_SNOW3G:
+ cmdlistinfo = &pce_dev->ce_sps.cmdlistptr.f9_snow3g;
+ break;
+ default:
+ return -EINVAL;
+ };
+
+ pce_dev->phy_ota_src = dma_map_single(pce_dev->pdev, req->message,
+ req->msize, DMA_TO_DEVICE);
+
+ pce_dev->ota_size = req->msize;
+
+ if (pce_dev->support_cmd_dscr)
+ rc = _ce_f9_setup(pce_dev, req, cmdlistinfo);
+ else
+ rc = _ce_f9_setup_direct(pce_dev, req);
+ if (rc < 0)
+ goto bad;
+
+ /* setup for callback, and issue command to sps */
+ pce_dev->areq = cookie;
+ pce_dev->qce_cb = qce_cb;
+
+ /* Register producer callback event for DESC_DONE event. */
+ pce_dev->ce_sps.producer.event.callback = _f9_sps_producer_callback;
+ pce_dev->ce_sps.producer.event.options = SPS_O_DESC_DONE;
+ rc = sps_register_event(pce_dev->ce_sps.producer.pipe,
+ &pce_dev->ce_sps.producer.event);
+ if (rc) {
+ pr_err("Producer callback registration failed rc = %d\n", rc);
+ goto bad;
+ }
+
+ _qce_sps_iovec_count_init(pce_dev);
+ if (pce_dev->support_cmd_dscr)
+ _qce_sps_add_cmd(pce_dev, SPS_IOVEC_FLAG_LOCK, cmdlistinfo,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_sps_add_data((uint32_t)pce_dev->phy_ota_src, req->msize,
+ &pce_dev->ce_sps.in_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.in_transfer,
+ SPS_IOVEC_FLAG_EOT|SPS_IOVEC_FLAG_NWD);
+
+ _qce_sps_add_data(GET_PHYS_ADDR(pce_dev->ce_sps.result_dump),
+ CRYPTO_RESULT_DUMP_SIZE,
+ &pce_dev->ce_sps.out_transfer);
+ _qce_set_flag(&pce_dev->ce_sps.out_transfer, SPS_IOVEC_FLAG_INT);
+ rc = _qce_sps_transfer(pce_dev);
+ if (rc)
+ goto bad;
+ return 0;
+bad:
+ dma_unmap_single(pce_dev->pdev, pce_dev->phy_ota_src,
+ req->msize, DMA_TO_DEVICE);
+ return rc;
+}
+EXPORT_SYMBOL(qce_f9_req);
+
static int __qce_get_device_tree_data(struct platform_device *pdev,
struct qce_device *pce_dev)
{
@@ -4115,6 +5086,28 @@
"qcom,ce-hw-shared");
pce_dev->support_hw_key = of_property_read_bool((&pdev->dev)->of_node,
"qcom,ce-hw-key");
+
+ pce_dev->use_sw_aes_cbc_ecb_ctr_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aes-cbc-ecb-ctr-algo");
+ pce_dev->use_sw_aead_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aead-algo");
+ pce_dev->use_sw_aes_xts_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aes-xts-algo");
+ pce_dev->use_sw_ahash_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-ahash-algo");
+ pce_dev->use_sw_hmac_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-hmac-algo");
+ pce_dev->use_sw_aes_ccm_algo =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,use-sw-aes-ccm-algo");
+ pce_dev->support_clk_mgmt_sus_res = of_property_read_bool(
+ (&pdev->dev)->of_node, "qcom,clk-mgmt-sus-res");
+
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-pair",
&pce_dev->ce_sps.pipe_pair_index)) {
@@ -4339,7 +5332,7 @@
goto err_pce_dev;
}
- pce_dev->memsize = 9 * PAGE_SIZE;
+ pce_dev->memsize = 10 * PAGE_SIZE;
pce_dev->coh_vmem = dma_alloc_coherent(pce_dev->pdev,
pce_dev->memsize, &pce_dev->coh_pmem, GFP_KERNEL);
if (pce_dev->coh_vmem == NULL) {
@@ -4354,7 +5347,7 @@
*rc = qce_enable_clk(pce_dev);
if (*rc)
- goto err;
+ goto err_enable_clk;
if (_probe_ce_engine(pce_dev)) {
*rc = -ENXIO;
@@ -4363,12 +5356,17 @@
*rc = 0;
qce_init_ce_cfg_val(pce_dev);
- qce_sps_init(pce_dev);
+ *rc = qce_sps_init(pce_dev);
+ if (*rc)
+ goto err;
qce_setup_ce_sps_data(pce_dev);
qce_disable_clk(pce_dev);
return pce_dev;
err:
+ qce_disable_clk(pce_dev);
+
+err_enable_clk:
__qce_deinit_clk(pce_dev);
err_mem:
@@ -4410,6 +5408,11 @@
}
EXPORT_SYMBOL(qce_close);
+#define OTA_SUPPORT_MASK (1 << CRYPTO_ENCR_SNOW3G_SEL |\
+ 1 << CRYPTO_ENCR_KASUMI_SEL |\
+ 1 << CRYPTO_AUTH_SNOW3G_SEL |\
+ 1 << CRYPTO_AUTH_KASUMI_SEL)
+
int qce_hw_support(void *handle, struct ce_hw_support *ce_support)
{
struct qce_device *pce_dev = (struct qce_device *)handle;
@@ -4424,15 +5427,32 @@
ce_support->cmac = true;
ce_support->aes_key_192 = false;
ce_support->aes_xts = true;
- ce_support->ota = false;
+ if ((pce_dev->engines_avail & OTA_SUPPORT_MASK) == OTA_SUPPORT_MASK)
+ ce_support->ota = true;
+ else
+ ce_support->ota = false;
ce_support->bam = true;
ce_support->is_shared = (pce_dev->is_shared == 1) ? true : false;
ce_support->hw_key = pce_dev->support_hw_key;
ce_support->aes_ccm = true;
+ ce_support->clk_mgmt_sus_res = pce_dev->support_clk_mgmt_sus_res;
if (pce_dev->ce_sps.minor_version)
ce_support->aligned_only = false;
else
ce_support->aligned_only = true;
+
+ ce_support->use_sw_aes_cbc_ecb_ctr_algo =
+ pce_dev->use_sw_aes_cbc_ecb_ctr_algo;
+ ce_support->use_sw_aead_algo =
+ pce_dev->use_sw_aead_algo;
+ ce_support->use_sw_aes_xts_algo =
+ pce_dev->use_sw_aes_xts_algo;
+ ce_support->use_sw_ahash_algo =
+ pce_dev->use_sw_ahash_algo;
+ ce_support->use_sw_hmac_algo =
+ pce_dev->use_sw_hmac_algo;
+ ce_support->use_sw_aes_ccm_algo =
+ pce_dev->use_sw_aes_ccm_algo;
return 0;
}
EXPORT_SYMBOL(qce_hw_support);
diff --git a/drivers/crypto/msm/qce50.h b/drivers/crypto/msm/qce50.h
index adab5d4..fc387aa 100644
--- a/drivers/crypto/msm/qce50.h
+++ b/drivers/crypto/msm/qce50.h
@@ -113,6 +113,10 @@
struct qce_cmdlist_info aead_hmac_sha1_ecb_3des;
struct qce_cmdlist_info aead_aes_128_ccm;
struct qce_cmdlist_info aead_aes_256_ccm;
+ struct qce_cmdlist_info f8_kasumi;
+ struct qce_cmdlist_info f8_snow3g;
+ struct qce_cmdlist_info f9_kasumi;
+ struct qce_cmdlist_info f9_snow3g;
struct qce_cmdlist_info unlock_all_pipes;
};
@@ -140,6 +144,8 @@
uint32_t encr_cfg_3des_cbc;
uint32_t encr_cfg_3des_ecb;
+ uint32_t encr_cfg_kasumi;
+ uint32_t encr_cfg_snow3g;
uint32_t auth_cfg_cmac_128;
uint32_t auth_cfg_cmac_256;
@@ -154,7 +160,8 @@
uint32_t auth_cfg_aes_ccm_256;
uint32_t auth_cfg_aead_sha1_hmac;
uint32_t auth_cfg_aead_sha256_hmac;
-
+ uint32_t auth_cfg_kasumi;
+ uint32_t auth_cfg_snow3g;
};
/* DM data structure with buffers, commandlists & commmand pointer lists */
diff --git a/drivers/crypto/msm/qcrypto.c b/drivers/crypto/msm/qcrypto.c
index 6606706..3aebaf0 100644
--- a/drivers/crypto/msm/qcrypto.c
+++ b/drivers/crypto/msm/qcrypto.c
@@ -1,6 +1,6 @@
/* Qualcomm Crypto driver
*
- * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,6 +24,10 @@
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/debugfs.h>
+#include <linux/workqueue.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cache.h>
#include <crypto/ctr.h>
#include <crypto/des.h>
@@ -51,6 +55,8 @@
*/
#define MAX_ALIGN_SIZE 0x40
+#define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
+
struct crypto_stat {
u32 aead_sha1_aes_enc;
u32 aead_sha1_aes_dec;
@@ -83,6 +89,30 @@
static struct crypto_stat _qcrypto_stat;
static struct dentry *_debug_dent;
static char _debug_read_buf[DEBUG_MAX_RW_BUF];
+struct crypto_priv;
+struct crypto_engine {
+ struct list_head elist;
+ void *qce; /* qce handle */
+ struct platform_device *pdev; /* platform device */
+ struct crypto_async_request *req; /* current active request */
+ struct crypto_priv *pcp;
+ struct tasklet_struct done_tasklet;
+ uint32_t bus_scale_handle;
+ struct crypto_queue req_queue; /*
+ * request queue for those requests
+ * that have this engine assgined
+ * waiting to be executed
+ */
+ u32 total_req;
+ u32 err_req;
+ u32 unit;
+ int res; /* execution result */
+ unsigned int signature;
+ uint32_t high_bw_req_count;
+ bool high_bw_req;
+ struct timer_list bw_scale_down_timer;
+ struct work_struct low_bw_req_ws;
+};
struct crypto_priv {
/* CE features supported by target device*/
@@ -91,34 +121,25 @@
/* CE features/algorithms supported by HW engine*/
struct ce_hw_support ce_support;
- uint32_t bus_scale_handle;
/* the lock protects queue and req*/
spinlock_t lock;
- /* qce handle */
- void *qce;
-
/* list of registered algorithms */
struct list_head alg_list;
- /* platform device */
- struct platform_device *pdev;
-
/* current active request */
struct crypto_async_request *req;
- int res;
-
- /* request queue */
- struct crypto_queue queue;
uint32_t ce_lock_count;
- uint32_t high_bw_req_count;
-
struct work_struct unlock_ce_ws;
-
- struct tasklet_struct done_tasklet;
+ struct list_head engine_list; /* list of qcrypto engines */
+ int32_t total_units; /* total units of engines */
+ struct mutex engine_lock;
+ struct crypto_engine *next_engine; /* next assign engine */
};
-
+static struct crypto_priv qcrypto_dev;
+static struct crypto_engine *_qcrypto_static_assign_engine(
+ struct crypto_priv *cp);
/*-------------------------------------------------------------------------
* Resource Locking Service
@@ -129,8 +150,6 @@
#define NUM_RETRY 1000
#define CE_BUSY 55
-static DEFINE_MUTEX(qcrypto_sent_bw_req);
-
static int qcrypto_scm_cmd(int resource, int cmd, int *response)
{
#ifdef CONFIG_MSM_SCM
@@ -224,6 +243,7 @@
struct crypto_priv *cp;
unsigned int flags;
+ struct crypto_engine *pengine; /* fixed engine assigned */
};
struct qcrypto_cipher_req_ctx {
@@ -266,30 +286,18 @@
struct qcrypto_sha_ctx {
enum qce_hash_alg_enum alg;
- uint32_t byte_count[4];
- uint8_t digest[SHA_MAX_DIGEST_SIZE];
uint32_t diglen;
- uint8_t *tmp_tbuf;
- uint8_t *trailing_buf;
- uint8_t *in_buf;
uint32_t authkey_in_len;
- uint32_t trailing_buf_len;
- uint8_t first_blk;
- uint8_t last_blk;
uint8_t authkey[SHA_MAX_BLOCK_SIZE];
struct ahash_request *ahash_req;
struct completion ahash_req_complete;
- struct scatterlist *sg;
- struct scatterlist tmp_sg;
struct crypto_priv *cp;
unsigned int flags;
+ struct crypto_engine *pengine; /* fixed engine assigned */
};
struct qcrypto_sha_req_ctx {
- union {
- struct sha1_state sha1_state_ctx;
- struct sha256_state sha256_state_ctx;
- };
+
struct scatterlist *src;
uint32_t nbytes;
@@ -297,6 +305,20 @@
struct scatterlist dsg; /* Data sg */
unsigned char *data; /* Incoming data pointer*/
unsigned char *data2; /* Updated data pointer*/
+
+ uint32_t byte_count[4];
+ u64 count;
+ uint8_t first_blk;
+ uint8_t last_blk;
+ uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
+ uint32_t trailing_buf_len;
+
+ /* dma buffer, Internal use */
+ uint8_t staging_dmabuf
+ [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
+
+ uint8_t digest[SHA_MAX_DIGEST_SIZE];
+ struct scatterlist sg[2];
};
static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
@@ -304,7 +326,7 @@
{
unsigned n;
- n = len / sizeof(uint32_t) ;
+ n = len / sizeof(uint32_t);
for (; n > 0; n--) {
*iv = ((*b << 24) & 0xff000000) |
(((*(b+1)) << 16) & 0xff0000) |
@@ -318,12 +340,12 @@
if (n == 3) {
*iv = ((*b << 24) & 0xff000000) |
(((*(b+1)) << 16) & 0xff0000) |
- (((*(b+2)) << 8) & 0xff00) ;
+ (((*(b+2)) << 8) & 0xff00);
} else if (n == 2) {
*iv = ((*b << 24) & 0xff000000) |
- (((*(b+1)) << 16) & 0xff0000) ;
+ (((*(b+1)) << 16) & 0xff0000);
} else if (n == 1) {
- *iv = ((*b << 24) & 0xff000000) ;
+ *iv = ((*b << 24) & 0xff000000);
}
}
@@ -352,58 +374,103 @@
}
}
-static void qcrypto_ce_high_bw_req(struct crypto_priv *cp, bool high_bw_req)
+static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
+ bool high_bw_req)
{
int ret = 0;
- mutex_lock(&qcrypto_sent_bw_req);
- if (high_bw_req) {
- if (cp->high_bw_req_count == 0) {
- ret = qce_enable_clk(cp->qce);
- if (ret) {
- pr_err("%s Unable enable clk\n", __func__);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
+ if (high_bw_req && pengine->high_bw_req == false) {
+ pm_stay_awake(&pengine->pdev->dev);
+ ret = qce_enable_clk(pengine->qce);
+ if (ret) {
+ pr_err("%s Unable enable clk\n", __func__);
+ goto clk_err;
+ }
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 1);
+ if (ret) {
+ pr_err("%s Unable to set to high bandwidth\n",
+ __func__);
+ qce_disable_clk(pengine->qce);
+ goto clk_err;
+ }
+ pengine->high_bw_req = true;
+ } else if (high_bw_req == false && pengine->high_bw_req == true) {
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 0);
+ if (ret) {
+ pr_err("%s Unable to set to low bandwidth\n",
+ __func__);
+ goto clk_err;
+ }
+ ret = qce_disable_clk(pengine->qce);
+ if (ret) {
+ pr_err("%s Unable disable clk\n", __func__);
ret = msm_bus_scale_client_update_request(
- cp->bus_scale_handle, 1);
- if (ret) {
+ pengine->bus_scale_handle, 1);
+ if (ret)
pr_err("%s Unable to set to high bandwidth\n",
- __func__);
- qce_disable_clk(cp->qce);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
+ __func__);
+ goto clk_err;
}
- cp->high_bw_req_count++;
- } else {
- if (cp->high_bw_req_count == 1) {
- ret = msm_bus_scale_client_update_request(
- cp->bus_scale_handle, 0);
- if (ret) {
- pr_err("%s Unable to set to low bandwidth\n",
- __func__);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
- ret = qce_disable_clk(cp->qce);
- if (ret) {
- pr_err("%s Unable disable clk\n", __func__);
- ret = msm_bus_scale_client_update_request(
- cp->bus_scale_handle, 1);
- if (ret)
- pr_err("%s Unable to set to high bandwidth\n",
- __func__);
- mutex_unlock(&qcrypto_sent_bw_req);
- return;
- }
- }
- cp->high_bw_req_count--;
+ pengine->high_bw_req = false;
+ pm_relax(&pengine->pdev->dev);
}
- mutex_unlock(&qcrypto_sent_bw_req);
+ return;
+clk_err:
+ pm_relax(&pengine->pdev->dev);
+ return;
+
}
-static int _start_qcrypto_process(struct crypto_priv *cp);
+static void qcrypto_bw_scale_down_timer_callback(unsigned long data)
+{
+ struct crypto_engine *pengine = (struct crypto_engine *)data;
+
+ schedule_work(&pengine->low_bw_req_ws);
+
+ return;
+}
+
+static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
+{
+ del_timer_sync(&(pengine->bw_scale_down_timer));
+ pengine->bw_scale_down_timer.data =
+ (unsigned long)(pengine);
+ pengine->bw_scale_down_timer.expires = jiffies +
+ msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
+ add_timer(&(pengine->bw_scale_down_timer));
+}
+
+static void qcrypto_ce_bw_scaling_req(struct crypto_engine *pengine,
+ bool high_bw_req)
+{
+ mutex_lock(&pengine->pcp->engine_lock);
+ if (high_bw_req) {
+ if (pengine->high_bw_req_count == 0)
+ qcrypto_ce_set_bus(pengine, true);
+ pengine->high_bw_req_count++;
+ } else {
+ pengine->high_bw_req_count--;
+ if (pengine->high_bw_req_count == 0)
+ qcrypto_bw_set_timeout(pengine);
+ }
+ mutex_unlock(&pengine->pcp->engine_lock);
+}
+
+static void qcrypto_low_bw_req_work(struct work_struct *work)
+{
+ struct crypto_engine *pengine = container_of(work,
+ struct crypto_engine, low_bw_req_ws);
+
+ mutex_lock(&pengine->pcp->engine_lock);
+ if (pengine->high_bw_req_count == 0)
+ qcrypto_ce_set_bus(pengine, false);
+ mutex_unlock(&pengine->pcp->engine_lock);
+}
+
+static int _start_qcrypto_process(struct crypto_priv *cp,
+ struct crypto_engine *pengine);
static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
{
@@ -499,9 +566,11 @@
/* random first IV */
get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
+ ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
+ if (ctx->pengine == NULL)
+ return -ENODEV;
if (ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(ctx->cp, true);
-
+ qcrypto_ce_bw_scaling_req(ctx->pengine, true);
return 0;
};
@@ -517,30 +586,13 @@
crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
/* update context with ptr to cp */
sha_ctx->cp = q_alg->cp;
- sha_ctx->sg = NULL;
sha_ctx->flags = 0;
-
- sha_ctx->tmp_tbuf = kzalloc(SHA_MAX_BLOCK_SIZE +
- SHA_MAX_DIGEST_SIZE, GFP_KERNEL);
- if (sha_ctx->tmp_tbuf == NULL) {
- pr_err("qcrypto Can't Allocate mem: sha_ctx->tmp_tbuf, error %ld\n",
- PTR_ERR(sha_ctx->tmp_tbuf));
- return -ENOMEM;
- }
-
- sha_ctx->trailing_buf = kzalloc(SHA_MAX_BLOCK_SIZE, GFP_KERNEL);
- if (sha_ctx->trailing_buf == NULL) {
- kfree(sha_ctx->tmp_tbuf);
- sha_ctx->tmp_tbuf = NULL;
- pr_err("qcrypto Can't Allocate mem: sha_ctx->trailing_buf, error %ld\n",
- PTR_ERR(sha_ctx->trailing_buf));
- return -ENOMEM;
- }
-
sha_ctx->ahash_req = NULL;
+ sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
+ if (sha_ctx->pengine == NULL)
+ return -ENODEV;
if (sha_ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(sha_ctx->cp, true);
-
+ qcrypto_ce_bw_scaling_req(sha_ctx->pengine, true);
return 0;
};
@@ -548,20 +600,13 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
- kfree(sha_ctx->tmp_tbuf);
- sha_ctx->tmp_tbuf = NULL;
- kfree(sha_ctx->trailing_buf);
- sha_ctx->trailing_buf = NULL;
- if (sha_ctx->sg != NULL) {
- kfree(sha_ctx->sg);
- sha_ctx->sg = NULL;
- }
if (sha_ctx->ahash_req != NULL) {
ahash_request_free(sha_ctx->ahash_req);
sha_ctx->ahash_req = NULL;
}
- if (sha_ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(sha_ctx->cp, false);
+ if (sha_ctx->pengine &&
+ sha_ctx->cp->platform_support.bus_scale_table != NULL)
+ qcrypto_ce_bw_scaling_req(sha_ctx->pengine, false);
};
@@ -610,22 +655,25 @@
{
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
- if (ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(ctx->cp, false);
+ if (ctx->pengine && ctx->cp->platform_support.bus_scale_table != NULL)
+ qcrypto_ce_bw_scaling_req(ctx->pengine, false);
};
static void _qcrypto_cra_aead_exit(struct crypto_tfm *tfm)
{
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
- if (ctx->cp->platform_support.bus_scale_table != NULL)
- qcrypto_ce_high_bw_req(ctx->cp, false);
+ if (ctx->pengine && ctx->cp->platform_support.bus_scale_table != NULL)
+ qcrypto_ce_bw_scaling_req(ctx->pengine, false);
};
static int _disp_stats(int id)
{
struct crypto_stat *pstat;
int len = 0;
+ unsigned long flags;
+ struct crypto_priv *cp = &qcrypto_dev;
+ struct crypto_engine *pe;
pstat = &_qcrypto_stat;
len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
@@ -722,22 +770,55 @@
len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
" SHA HMAC operation success : %d\n",
pstat->sha_hmac_op_success);
+ spin_lock_irqsave(&cp->lock, flags);
+ list_for_each_entry(pe, &cp->engine_list, elist) {
+ len += snprintf(
+ _debug_read_buf + len,
+ DEBUG_MAX_RW_BUF - len - 1,
+ " Engine %d Req : %d\n",
+ pe->unit,
+ pe->total_req
+ );
+ len += snprintf(
+ _debug_read_buf + len,
+ DEBUG_MAX_RW_BUF - len - 1,
+ " Engine %d Req Error : %d\n",
+ pe->unit,
+ pe->err_req
+ );
+ }
+ spin_unlock_irqrestore(&cp->lock, flags);
return len;
}
-static int _qcrypto_remove(struct platform_device *pdev)
+static void _qcrypto_remove_engine(struct crypto_engine *pengine)
{
struct crypto_priv *cp;
struct qcrypto_alg *q_alg;
struct qcrypto_alg *n;
+ unsigned long flags;
- cp = platform_get_drvdata(pdev);
+ cp = pengine->pcp;
- if (!cp)
- return 0;
+ spin_lock_irqsave(&cp->lock, flags);
+ list_del(&pengine->elist);
+ if (cp->next_engine == pengine)
+ cp->next_engine = NULL;
+ spin_unlock_irqrestore(&cp->lock, flags);
- if (cp->platform_support.bus_scale_table != NULL)
- msm_bus_scale_unregister_client(cp->bus_scale_handle);
+ cp->total_units--;
+
+ tasklet_kill(&pengine->done_tasklet);
+ cancel_work_sync(&pengine->low_bw_req_ws);
+ del_timer_sync(&pengine->bw_scale_down_timer);
+ device_init_wakeup(&pengine->pdev->dev, false);
+
+ if (pengine->bus_scale_handle != 0)
+ msm_bus_scale_unregister_client(pengine->bus_scale_handle);
+ pengine->bus_scale_handle = 0;
+
+ if (cp->total_units)
+ return;
list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
@@ -747,14 +828,26 @@
list_del(&q_alg->entry);
kfree(q_alg);
}
+}
- if (cp->qce)
- qce_close(cp->qce);
- tasklet_kill(&cp->done_tasklet);
- kfree(cp);
+static int _qcrypto_remove(struct platform_device *pdev)
+{
+ struct crypto_engine *pengine;
+ struct crypto_priv *cp;
+
+ pengine = platform_get_drvdata(pdev);
+
+ if (!pengine)
+ return 0;
+ cp = pengine->pcp;
+ mutex_lock(&cp->engine_lock);
+ _qcrypto_remove_engine(pengine);
+ mutex_unlock(&cp->engine_lock);
+ if (pengine->qce)
+ qce_close(pengine->qce);
+ kfree(pengine);
return 0;
-};
-
+}
static int _qcrypto_check_aes_keylen(struct crypto_ablkcipher *cipher,
struct crypto_priv *cp, unsigned int len)
@@ -894,54 +987,24 @@
static void req_done(unsigned long data)
{
struct crypto_async_request *areq;
- struct crypto_priv *cp = (struct crypto_priv *)data;
+ struct crypto_engine *pengine = (struct crypto_engine *)data;
+ struct crypto_priv *cp;
unsigned long flags;
+ int res;
+ cp = pengine->pcp;
spin_lock_irqsave(&cp->lock, flags);
- areq = cp->req;
- cp->req = NULL;
+ areq = pengine->req;
+ pengine->req = NULL;
+ res = pengine->res;
spin_unlock_irqrestore(&cp->lock, flags);
-
if (areq)
- areq->complete(areq, cp->res);
- _start_qcrypto_process(cp);
+ areq->complete(areq, res);
+ if (res)
+ pengine->err_req++;
+ _start_qcrypto_process(cp, pengine);
};
-static void _update_sha1_ctx(struct ahash_request *req)
-{
- struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
- struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
-
- if (sha_ctx->last_blk == 1)
- memset(sha_state_ctx, 0x00, sizeof(struct sha1_state));
- else {
- memset(sha_state_ctx->buffer, 0x00, SHA1_BLOCK_SIZE);
- memcpy(sha_state_ctx->buffer, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- _byte_stream_to_words(sha_state_ctx->state , sha_ctx->digest,
- SHA1_DIGEST_SIZE);
- }
- return;
-}
-
-static void _update_sha256_ctx(struct ahash_request *req)
-{
- struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
- struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
-
- if (sha_ctx->last_blk == 1)
- memset(sha_state_ctx, 0x00, sizeof(struct sha256_state));
- else {
- memset(sha_state_ctx->buf, 0x00, SHA256_BLOCK_SIZE);
- memcpy(sha_state_ctx->buf, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- _byte_stream_to_words(sha_state_ctx->state, sha_ctx->digest,
- SHA256_DIGEST_SIZE);
- }
- return;
-}
static void _qce_ahash_complete(void *cookie, unsigned char *digest,
unsigned char *authdata, int ret)
@@ -954,44 +1017,36 @@
struct crypto_stat *pstat;
uint32_t diglen = crypto_ahash_digestsize(ahash);
uint32_t *auth32 = (uint32_t *)authdata;
+ struct crypto_engine *pengine;
pstat = &_qcrypto_stat;
+ pengine = sha_ctx->pengine;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qce_ahash_complete: %p ret %d\n",
+ dev_info(&pengine->pdev->dev, "_qce_ahash_complete: %p ret %d\n",
areq, ret);
#endif
if (digest) {
- memcpy(sha_ctx->digest, digest, diglen);
+ memcpy(rctx->digest, digest, diglen);
memcpy(areq->result, digest, diglen);
}
if (authdata) {
- sha_ctx->byte_count[0] = auth32[0];
- sha_ctx->byte_count[1] = auth32[1];
- sha_ctx->byte_count[2] = auth32[2];
- sha_ctx->byte_count[3] = auth32[3];
+ rctx->byte_count[0] = auth32[0];
+ rctx->byte_count[1] = auth32[1];
+ rctx->byte_count[2] = auth32[2];
+ rctx->byte_count[3] = auth32[3];
}
areq->src = rctx->src;
areq->nbytes = rctx->nbytes;
- if (sha_ctx->sg != NULL) {
- kfree(sha_ctx->sg);
- sha_ctx->sg = NULL;
- }
-
- if (sha_ctx->alg == QCE_HASH_SHA1)
- _update_sha1_ctx(areq);
- if (sha_ctx->alg == QCE_HASH_SHA256)
- _update_sha256_ctx(areq);
-
- sha_ctx->last_blk = 0;
- sha_ctx->first_blk = 0;
+ rctx->last_blk = 0;
+ rctx->first_blk = 0;
if (ret) {
- cp->res = -ENXIO;
+ pengine->res = -ENXIO;
pstat->sha_op_fail++;
} else {
- cp->res = 0;
+ pengine->res = 0;
pstat->sha_op_success++;
}
if (cp->ce_support.aligned_only) {
@@ -1001,7 +1056,7 @@
if (cp->platform_support.ce_shared)
schedule_work(&cp->unlock_ce_ws);
- tasklet_schedule(&cp->done_tasklet);
+ tasklet_schedule(&pengine->done_tasklet);
};
static void _qce_ablk_cipher_complete(void *cookie, unsigned char *icb,
@@ -1012,21 +1067,22 @@
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
struct crypto_priv *cp = ctx->cp;
struct crypto_stat *pstat;
+ struct crypto_engine *pengine;
pstat = &_qcrypto_stat;
-
+ pengine = ctx->pengine;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qce_ablk_cipher_complete: %p ret %d\n",
+ dev_info(&pengine->pdev->dev, "_qce_ablk_cipher_complete: %p ret %d\n",
areq, ret);
#endif
if (iv)
memcpy(ctx->iv, iv, crypto_ablkcipher_ivsize(ablk));
if (ret) {
- cp->res = -ENXIO;
+ pengine->res = -ENXIO;
pstat->ablk_cipher_op_fail++;
} else {
- cp->res = 0;
+ pengine->res = 0;
pstat->ablk_cipher_op_success++;
}
@@ -1050,7 +1106,7 @@
if (cp->platform_support.ce_shared)
schedule_work(&cp->unlock_ce_ws);
- tasklet_schedule(&cp->done_tasklet);
+ tasklet_schedule(&pengine->done_tasklet);
};
@@ -1063,9 +1119,10 @@
struct crypto_priv *cp = ctx->cp;
struct qcrypto_cipher_req_ctx *rctx;
struct crypto_stat *pstat;
+ struct crypto_engine *pengine;
pstat = &_qcrypto_stat;
-
+ pengine = ctx->pengine;
rctx = aead_request_ctx(areq);
if (rctx->mode == QCE_MODE_CCM) {
@@ -1162,11 +1219,11 @@
else
pstat->aead_op_success++;
- cp->res = ret;
+ pengine->res = ret;
if (cp->platform_support.ce_shared)
schedule_work(&cp->unlock_ce_ws);
- tasklet_schedule(&cp->done_tasklet);
+ tasklet_schedule(&pengine->done_tasklet);
}
static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
@@ -1251,7 +1308,7 @@
return 0;
}
-static int _qcrypto_process_ablkcipher(struct crypto_priv *cp,
+static int _qcrypto_process_ablkcipher(struct crypto_engine *pengine,
struct crypto_async_request *async_req)
{
struct qce_req qreq;
@@ -1265,7 +1322,7 @@
cipher_ctx = crypto_tfm_ctx(async_req->tfm);
rctx = ablkcipher_request_ctx(req);
tfm = crypto_ablkcipher_reqtfm(req);
- if (cp->ce_support.aligned_only) {
+ if (pengine->pcp->ce_support.aligned_only) {
uint32_t bytes = 0;
uint32_t num_sg = 0;
@@ -1306,35 +1363,37 @@
qreq.flags = cipher_ctx->flags;
if ((cipher_ctx->enc_key_len == 0) &&
- (cp->platform_support.hw_key_support == 0))
+ (pengine->pcp->platform_support.hw_key_support == 0))
ret = -EINVAL;
else
- ret = qce_ablk_cipher_req(cp->qce, &qreq);
+ ret = qce_ablk_cipher_req(pengine->qce, &qreq);
return ret;
}
-static int _qcrypto_process_ahash(struct crypto_priv *cp,
+static int _qcrypto_process_ahash(struct crypto_engine *pengine,
struct crypto_async_request *async_req)
{
struct ahash_request *req;
struct qce_sha_req sreq;
+ struct qcrypto_sha_req_ctx *rctx;
struct qcrypto_sha_ctx *sha_ctx;
int ret = 0;
req = container_of(async_req,
struct ahash_request, base);
+ rctx = ahash_request_ctx(req);
sha_ctx = crypto_tfm_ctx(async_req->tfm);
sreq.qce_cb = _qce_ahash_complete;
- sreq.digest = &sha_ctx->digest[0];
+ sreq.digest = &rctx->digest[0];
sreq.src = req->src;
- sreq.auth_data[0] = sha_ctx->byte_count[0];
- sreq.auth_data[1] = sha_ctx->byte_count[1];
- sreq.auth_data[2] = sha_ctx->byte_count[2];
- sreq.auth_data[3] = sha_ctx->byte_count[3];
- sreq.first_blk = sha_ctx->first_blk;
- sreq.last_blk = sha_ctx->last_blk;
+ sreq.auth_data[0] = rctx->byte_count[0];
+ sreq.auth_data[1] = rctx->byte_count[1];
+ sreq.auth_data[2] = rctx->byte_count[2];
+ sreq.auth_data[3] = rctx->byte_count[3];
+ sreq.first_blk = rctx->first_blk;
+ sreq.last_blk = rctx->last_blk;
sreq.size = req->nbytes;
sreq.areq = req;
sreq.flags = sha_ctx->flags;
@@ -1363,12 +1422,12 @@
ret = -1;
break;
};
- ret = qce_process_sha_req(cp->qce, &sreq);
+ ret = qce_process_sha_req(pengine->qce, &sreq);
return ret;
}
-static int _qcrypto_process_aead(struct crypto_priv *cp,
+static int _qcrypto_process_aead(struct crypto_engine *pengine,
struct crypto_async_request *async_req)
{
struct qce_req qreq;
@@ -1417,7 +1476,7 @@
if (ret)
return ret;
- if (cp->ce_support.aligned_only) {
+ if (pengine->pcp->ce_support.aligned_only) {
uint32_t bytes = 0;
uint32_t num_sg = 0;
@@ -1487,7 +1546,7 @@
sg_mark_end(req->assoc);
} else {
/* for aead operations, other than aes(ccm) */
- if (cp->ce_support.aligned_only) {
+ if (pengine->pcp->ce_support.aligned_only) {
uint32_t bytes = 0;
uint32_t num_sg = 0;
@@ -1558,12 +1617,36 @@
req->dst = &rctx->dsg;
}
}
- ret = qce_aead_req(cp->qce, &qreq);
+ ret = qce_aead_req(pengine->qce, &qreq);
return ret;
}
+#define list_next_entry(pos, member) \
+ list_entry(pos->member.next, typeof(*pos), member)
+static struct crypto_engine *_qcrypto_static_assign_engine(
+ struct crypto_priv *cp)
+{
+ struct crypto_engine *pengine;
+ unsigned long flags;
-static int _start_qcrypto_process(struct crypto_priv *cp)
+ spin_lock_irqsave(&cp->lock, flags);
+ if (cp->next_engine)
+ pengine = cp->next_engine;
+ else
+ pengine = list_first_entry(&cp->engine_list,
+ struct crypto_engine, elist);
+
+ if (list_is_last(&pengine->elist, &cp->engine_list))
+ cp->next_engine = list_first_entry(
+ &cp->engine_list, struct crypto_engine, elist);
+ else
+ cp->next_engine = list_next_entry(pengine, elist);
+ spin_unlock_irqrestore(&cp->lock, flags);
+ return pengine;
+}
+
+static int _start_qcrypto_process(struct crypto_priv *cp,
+ struct crypto_engine *pengine)
{
struct crypto_async_request *async_req = NULL;
struct crypto_async_request *backlog = NULL;
@@ -1576,10 +1659,10 @@
again:
spin_lock_irqsave(&cp->lock, flags);
- if (cp->req == NULL) {
- backlog = crypto_get_backlog(&cp->queue);
- async_req = crypto_dequeue_request(&cp->queue);
- cp->req = async_req;
+ if (pengine->req == NULL) {
+ backlog = crypto_get_backlog(&pengine->req_queue);
+ async_req = crypto_dequeue_request(&pengine->req_queue);
+ pengine->req = async_req;
}
spin_unlock_irqrestore(&cp->lock, flags);
if (!async_req)
@@ -1590,21 +1673,22 @@
switch (type) {
case CRYPTO_ALG_TYPE_ABLKCIPHER:
- ret = _qcrypto_process_ablkcipher(cp, async_req);
+ ret = _qcrypto_process_ablkcipher(pengine, async_req);
break;
case CRYPTO_ALG_TYPE_AHASH:
- ret = _qcrypto_process_ahash(cp, async_req);
+ ret = _qcrypto_process_ahash(pengine, async_req);
break;
case CRYPTO_ALG_TYPE_AEAD:
- ret = _qcrypto_process_aead(cp, async_req);
+ ret = _qcrypto_process_aead(pengine, async_req);
break;
default:
ret = -EINVAL;
};
-
+ pengine->total_req++;
if (ret) {
+ pengine->err_req++;
spin_lock_irqsave(&cp->lock, flags);
- cp->req = NULL;
+ pengine->req = NULL;
spin_unlock_irqrestore(&cp->lock, flags);
if (type == CRYPTO_ALG_TYPE_ABLKCIPHER)
@@ -1622,6 +1706,7 @@
};
static int _qcrypto_queue_req(struct crypto_priv *cp,
+ struct crypto_engine *pengine,
struct crypto_async_request *req)
{
int ret;
@@ -1634,9 +1719,9 @@
}
spin_lock_irqsave(&cp->lock, flags);
- ret = crypto_enqueue_request(&cp->queue, req);
+ ret = crypto_enqueue_request(&pengine->req_queue, req);
spin_unlock_irqrestore(&cp->lock, flags);
- _start_qcrypto_process(cp);
+ _start_qcrypto_process(cp, pengine);
return ret;
}
@@ -1653,7 +1738,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_enc_aes_ecb: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ecb: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1662,7 +1747,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_aes_cbc(struct ablkcipher_request *req)
@@ -1677,7 +1762,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_enc_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_cbc: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1686,7 +1771,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_aes_ctr(struct ablkcipher_request *req)
@@ -1701,7 +1786,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_enc_aes_ctr: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ctr: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1710,7 +1795,7 @@
rctx->mode = QCE_MODE_CTR;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_aes_xts(struct ablkcipher_request *req)
@@ -1731,7 +1816,7 @@
rctx->mode = QCE_MODE_XTS;
pstat->ablk_cipher_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
@@ -1757,7 +1842,7 @@
rctx->iv = req->iv;
pstat->aead_ccm_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_enc_des_ecb(struct ablkcipher_request *req)
@@ -1778,7 +1863,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_des_cbc(struct ablkcipher_request *req)
@@ -1799,7 +1884,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_3des_ecb(struct ablkcipher_request *req)
@@ -1820,7 +1905,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_3des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_enc_3des_cbc(struct ablkcipher_request *req)
@@ -1841,7 +1926,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_3des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_ecb(struct ablkcipher_request *req)
@@ -1856,7 +1941,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_dec_aes_ecb: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ecb: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1865,7 +1950,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_cbc(struct ablkcipher_request *req)
@@ -1880,7 +1965,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_dec_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_cbc: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
@@ -1890,7 +1975,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_ctr(struct ablkcipher_request *req)
@@ -1905,7 +1990,7 @@
BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
CRYPTO_ALG_TYPE_ABLKCIPHER);
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_dec_aes_ctr: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ctr: %p\n", req);
#endif
rctx = ablkcipher_request_ctx(req);
rctx->aead = 0;
@@ -1916,7 +2001,7 @@
rctx->dir = QCE_ENCRYPT;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_des_ecb(struct ablkcipher_request *req)
@@ -1937,7 +2022,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_des_cbc(struct ablkcipher_request *req)
@@ -1958,7 +2043,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_3des_ecb(struct ablkcipher_request *req)
@@ -1979,7 +2064,7 @@
rctx->mode = QCE_MODE_ECB;
pstat->ablk_cipher_3des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_3des_cbc(struct ablkcipher_request *req)
@@ -2000,7 +2085,7 @@
rctx->mode = QCE_MODE_CBC;
pstat->ablk_cipher_3des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
static int _qcrypto_dec_aes_xts(struct ablkcipher_request *req)
@@ -2021,7 +2106,7 @@
rctx->dir = QCE_DECRYPT;
pstat->ablk_cipher_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
};
@@ -2048,7 +2133,7 @@
rctx->iv = req->iv;
pstat->aead_ccm_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
@@ -2156,7 +2241,8 @@
pstat = &_qcrypto_stat;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_aead_encrypt_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev,
+ "_qcrypto_aead_encrypt_aes_cbc: %p\n", req);
#endif
rctx = aead_request_ctx(req);
@@ -2167,7 +2253,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
@@ -2180,7 +2266,8 @@
pstat = &_qcrypto_stat;
#ifdef QCRYPTO_DEBUG
- dev_info(&cp->pdev->dev, "_qcrypto_aead_decrypt_aes_cbc: %p\n", req);
+ dev_info(&ctx->pengine->pdev->dev,
+ "_qcrypto_aead_decrypt_aes_cbc: %p\n", req);
#endif
rctx = aead_request_ctx(req);
rctx->aead = 1;
@@ -2190,7 +2277,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_aes_cbc(struct aead_givcrypt_request *req)
@@ -2215,7 +2302,7 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
}
#ifdef QCRYPTO_AEAD_AES_CTR
@@ -2236,7 +2323,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_aes_ctr(struct aead_request *req)
@@ -2259,7 +2346,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_aes_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_aes_ctr(struct aead_givcrypt_request *req)
@@ -2284,7 +2371,7 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_aes_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
};
#endif /* QCRYPTO_AEAD_AES_CTR */
@@ -2305,7 +2392,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
@@ -2325,7 +2412,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_des_cbc(struct aead_givcrypt_request *req)
@@ -2350,7 +2437,7 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_des_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
}
static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
@@ -2370,7 +2457,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_3des_enc++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
@@ -2390,7 +2477,7 @@
rctx->iv = req->iv;
pstat->aead_sha1_3des_dec++;
- return _qcrypto_queue_req(cp, &req->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
}
static int _qcrypto_aead_givencrypt_3des_cbc(struct aead_givcrypt_request *req)
@@ -2415,18 +2502,21 @@
/* avoid consecutive packets going out with same IV */
*(__be64 *)req->giv ^= cpu_to_be64(req->seq);
pstat->aead_sha1_3des_enc++;
- return _qcrypto_queue_req(cp, &areq->base);
+ return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
}
-static int _sha_init(struct qcrypto_sha_ctx *ctx)
+static int _sha_init(struct ahash_request *req)
{
- ctx->first_blk = 1;
- ctx->last_blk = 0;
- ctx->byte_count[0] = 0;
- ctx->byte_count[1] = 0;
- ctx->byte_count[2] = 0;
- ctx->byte_count[3] = 0;
- ctx->trailing_buf_len = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
+
+ rctx->first_blk = 1;
+ rctx->last_blk = 0;
+ rctx->byte_count[0] = 0;
+ rctx->byte_count[1] = 0;
+ rctx->byte_count[2] = 0;
+ rctx->byte_count[3] = 0;
+ rctx->trailing_buf_len = 0;
+ rctx->count = 0;
return 0;
};
@@ -2435,18 +2525,17 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
- _sha_init(sha_ctx);
+ _sha_init(req);
sha_ctx->alg = QCE_HASH_SHA1;
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
- _update_sha1_ctx(req);
-
pstat->sha1_digest++;
return 0;
};
@@ -2455,18 +2544,17 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
- _sha_init(sha_ctx);
+ _sha_init(req);
sha_ctx->alg = QCE_HASH_SHA256;
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
- _update_sha256_ctx(req);
-
pstat->sha256_digest++;
return 0;
};
@@ -2475,82 +2563,126 @@
static int _sha1_export(struct ahash_request *req, void *out)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
struct sha1_state *out_ctx = (struct sha1_state *)out;
- out_ctx->count = sha_state_ctx->count;
- memcpy(out_ctx->state, sha_state_ctx->state, sizeof(out_ctx->state));
- memcpy(out_ctx->buffer, sha_state_ctx->buffer, SHA1_BLOCK_SIZE);
+ out_ctx->count = rctx->count;
+ _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
+ memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
return 0;
};
+static int _sha1_hmac_export(struct ahash_request *req, void *out)
+{
+ return _sha1_export(req, out);
+}
+
+/* crypto hw padding constant for hmac first operation */
+#define HMAC_PADDING 64
+
+static int __sha1_import_common(struct ahash_request *req, const void *in,
+ bool hmac)
+{
+ struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
+ struct sha1_state *in_ctx = (struct sha1_state *)in;
+ u64 hw_count = in_ctx->count;
+
+ rctx->count = in_ctx->count;
+ memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
+ if (in_ctx->count <= SHA1_BLOCK_SIZE) {
+ rctx->first_blk = 1;
+ } else {
+ rctx->first_blk = 0;
+ /*
+ * For hmac, there is a hardware padding done
+ * when first is set. So the byte_count will be
+ * incremened by 64 after the operstion of first
+ */
+ if (hmac)
+ hw_count += HMAC_PADDING;
+ }
+ rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
+ rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
+ _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
+
+ rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
+ (SHA1_BLOCK_SIZE-1));
+ return 0;
+}
+
static int _sha1_import(struct ahash_request *req, const void *in)
{
- struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
- struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
- struct sha1_state *in_ctx = (struct sha1_state *)in;
-
- sha_state_ctx->count = in_ctx->count;
- memcpy(sha_state_ctx->state, in_ctx->state, sizeof(in_ctx->state));
- memcpy(sha_state_ctx->buffer, in_ctx->buffer, SHA1_BLOCK_SIZE);
- memcpy(sha_ctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
-
- sha_ctx->byte_count[0] = (uint32_t)(in_ctx->count & 0xFFFFFFC0);
- sha_ctx->byte_count[1] = (uint32_t)(in_ctx->count >> 32);
- _words_to_byte_stream(in_ctx->state, sha_ctx->digest, sha_ctx->diglen);
-
- sha_ctx->trailing_buf_len = (uint32_t)(in_ctx->count &
- (SHA1_BLOCK_SIZE-1));
-
- if (!(in_ctx->count))
- sha_ctx->first_blk = 1;
- else
- sha_ctx->first_blk = 0;
-
- return 0;
+ return __sha1_import_common(req, in, false);
}
+
+static int _sha1_hmac_import(struct ahash_request *req, const void *in)
+{
+ return __sha1_import_common(req, in, true);
+}
+
static int _sha256_export(struct ahash_request *req, void *out)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
struct sha256_state *out_ctx = (struct sha256_state *)out;
- out_ctx->count = sha_state_ctx->count;
- memcpy(out_ctx->state, sha_state_ctx->state, sizeof(out_ctx->state));
- memcpy(out_ctx->buf, sha_state_ctx->buf, SHA256_BLOCK_SIZE);
+ out_ctx->count = rctx->count;
+ _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
+ memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
return 0;
};
-static int _sha256_import(struct ahash_request *req, const void *in)
+static int _sha256_hmac_export(struct ahash_request *req, void *out)
+{
+ return _sha256_export(req, out);
+}
+
+static int __sha256_import_common(struct ahash_request *req, const void *in,
+ bool hmac)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
struct sha256_state *in_ctx = (struct sha256_state *)in;
+ u64 hw_count = in_ctx->count;
- sha_state_ctx->count = in_ctx->count;
- memcpy(sha_state_ctx->state, in_ctx->state, sizeof(in_ctx->state));
- memcpy(sha_state_ctx->buf, in_ctx->buf, SHA256_BLOCK_SIZE);
- memcpy(sha_ctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
+ rctx->count = in_ctx->count;
+ memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
- sha_ctx->byte_count[0] = (uint32_t)(in_ctx->count & 0xFFFFFFC0);
- sha_ctx->byte_count[1] = (uint32_t)(in_ctx->count >> 32);
- _words_to_byte_stream(in_ctx->state, sha_ctx->digest, sha_ctx->diglen);
+ if (in_ctx->count <= SHA256_BLOCK_SIZE) {
+ rctx->first_blk = 1;
+ } else {
+ rctx->first_blk = 0;
+ /*
+ * for hmac, there is a hardware padding done
+ * when first is set. So the byte_count will be
+ * incremened by 64 after the operstion of first
+ */
+ if (hmac)
+ hw_count += HMAC_PADDING;
+ }
- sha_ctx->trailing_buf_len = (uint32_t)(in_ctx->count &
+ rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
+ rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
+ _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
+
+ rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
(SHA256_BLOCK_SIZE-1));
- if (!(in_ctx->count))
- sha_ctx->first_blk = 1;
- else
- sha_ctx->first_blk = 0;
return 0;
}
+static int _sha256_import(struct ahash_request *req, const void *in)
+{
+ return __sha256_import_common(req, in, false);
+}
+
+static int _sha256_hmac_import(struct ahash_request *req, const void *in)
+{
+ return __sha256_import_common(req, in, true);
+}
+
static int _copy_source(struct ahash_request *req)
{
struct qcrypto_sha_req_ctx *srctx = NULL;
@@ -2593,23 +2725,19 @@
uint32_t nbytes;
uint32_t offset = 0;
uint32_t bytes = 0;
-
+ uint8_t *staging;
int ret = 0;
/* check for trailing buffer from previous updates and append it */
- total = req->nbytes + sha_ctx->trailing_buf_len;
+ total = req->nbytes + rctx->trailing_buf_len;
len = req->nbytes;
if (total <= sha_block_size) {
- k_src = &sha_ctx->trailing_buf[sha_ctx->trailing_buf_len];
+ k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
num_sg = qcrypto_count_sg(req->src, len);
bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
- sha_ctx->trailing_buf_len = total;
- if (sha_ctx->alg == QCE_HASH_SHA1)
- _update_sha1_ctx(req);
- if (sha_ctx->alg == QCE_HASH_SHA256)
- _update_sha256_ctx(req);
+ rctx->trailing_buf_len = total;
return 0;
}
@@ -2617,9 +2745,10 @@
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- memcpy(sha_ctx->tmp_tbuf, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- k_src = &sha_ctx->trailing_buf[0];
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
+ k_src = &rctx->trailing_buf[0];
/* get new trailing buffer */
sha_pad_len = ALIGN(total, sha_block_size) - total;
trailing_buf_len = sha_block_size - sha_pad_len;
@@ -2632,7 +2761,7 @@
nbytes = total - trailing_buf_len;
num_sg = qcrypto_count_sg(req->src, req->nbytes);
- len = sha_ctx->trailing_buf_len;
+ len = rctx->trailing_buf_len;
sg_last = req->src;
while (len < nbytes) {
@@ -2641,56 +2770,41 @@
len += sg_last->length;
sg_last = scatterwalk_sg_next(sg_last);
}
- if (sha_ctx->trailing_buf_len) {
+ if (rctx->trailing_buf_len) {
if (cp->ce_support.aligned_only) {
- sha_ctx->sg = kzalloc(sizeof(struct scatterlist),
- GFP_ATOMIC);
- if (sha_ctx->sg == NULL) {
- pr_err("MemAlloc fail sha_ctx->sg, error %ld\n",
- PTR_ERR(sha_ctx->sg));
- return -ENOMEM;
- }
rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
if (rctx->data2 == NULL) {
pr_err("Mem Alloc fail srctx->data2, err %ld\n",
PTR_ERR(rctx->data2));
- kfree(sha_ctx->sg);
return -ENOMEM;
}
- memcpy(rctx->data2, sha_ctx->tmp_tbuf,
- sha_ctx->trailing_buf_len);
- memcpy((rctx->data2 + sha_ctx->trailing_buf_len),
+ memcpy(rctx->data2, staging,
+ rctx->trailing_buf_len);
+ memcpy((rctx->data2 + rctx->trailing_buf_len),
rctx->data, req->src->length);
kfree(rctx->data);
rctx->data = rctx->data2;
- sg_set_buf(&sha_ctx->sg[0], rctx->data,
- (sha_ctx->trailing_buf_len +
+ sg_set_buf(&rctx->sg[0], rctx->data,
+ (rctx->trailing_buf_len +
req->src->length));
- req->src = sha_ctx->sg;
- sg_mark_end(&sha_ctx->sg[0]);
+ req->src = rctx->sg;
+ sg_mark_end(&rctx->sg[0]);
} else {
sg_mark_end(sg_last);
- sha_ctx->sg = kzalloc(2 * (sizeof(struct scatterlist)),
- GFP_ATOMIC);
- if (sha_ctx->sg == NULL) {
- pr_err("MEMalloc fail sha_ctx->sg, error %ld\n",
- PTR_ERR(sha_ctx->sg));
- return -ENOMEM;
- }
-
- sg_set_buf(&sha_ctx->sg[0], sha_ctx->tmp_tbuf,
- sha_ctx->trailing_buf_len);
- sg_mark_end(&sha_ctx->sg[1]);
- sg_chain(sha_ctx->sg, 2, req->src);
- req->src = sha_ctx->sg;
+ memset(rctx->sg, 0, sizeof(rctx->sg));
+ sg_set_buf(&rctx->sg[0], staging,
+ rctx->trailing_buf_len);
+ sg_mark_end(&rctx->sg[1]);
+ sg_chain(rctx->sg, 2, req->src);
+ req->src = rctx->sg;
}
} else
sg_mark_end(sg_last);
req->nbytes = nbytes;
- sha_ctx->trailing_buf_len = trailing_buf_len;
+ rctx->trailing_buf_len = trailing_buf_len;
- ret = _qcrypto_queue_req(cp, &req->base);
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
return ret;
};
@@ -2698,7 +2812,6 @@
static int _sha1_update(struct ahash_request *req)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha1_state *sha_state_ctx = &rctx->sha1_state_ctx;
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_priv *cp = sha_ctx->cp;
@@ -2706,14 +2819,13 @@
if (_copy_source(req))
return -ENOMEM;
}
- sha_state_ctx->count += req->nbytes;
+ rctx->count += req->nbytes;
return _sha_update(req, SHA1_BLOCK_SIZE);
}
static int _sha256_update(struct ahash_request *req)
{
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
- struct sha256_state *sha_state_ctx = &rctx->sha256_state_ctx;
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_priv *cp = sha_ctx->cp;
@@ -2722,7 +2834,7 @@
return -ENOMEM;
}
- sha_state_ctx->count += req->nbytes;
+ rctx->count += req->nbytes;
return _sha_update(req, SHA256_BLOCK_SIZE);
}
@@ -2732,26 +2844,29 @@
struct crypto_priv *cp = sha_ctx->cp;
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
int ret = 0;
+ uint8_t *staging;
if (cp->ce_support.aligned_only) {
if (_copy_source(req))
return -ENOMEM;
}
- sha_ctx->last_blk = 1;
+ rctx->last_blk = 1;
/* save the original req structure fields*/
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- sg_mark_end(&sha_ctx->tmp_sg);
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
+ sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
+ sg_mark_end(&rctx->sg[0]);
- req->src = &sha_ctx->tmp_sg;
- req->nbytes = sha_ctx->trailing_buf_len;
+ req->src = &rctx->sg[0];
+ req->nbytes = rctx->trailing_buf_len;
- ret = _qcrypto_queue_req(cp, &req->base);
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
return ret;
};
@@ -2781,9 +2896,9 @@
/* save the original req structure fields*/
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- sha_ctx->first_blk = 1;
- sha_ctx->last_blk = 1;
- ret = _qcrypto_queue_req(cp, &req->base);
+ rctx->first_blk = 1;
+ rctx->last_blk = 1;
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
return ret;
}
@@ -2814,32 +2929,49 @@
unsigned int len)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
+ uint8_t *in_buf;
int ret = 0;
+ struct scatterlist sg;
+ struct ahash_request *ahash_req;
+ struct completion ahash_req_complete;
- sha_ctx->in_buf = kzalloc(len + 64, GFP_KERNEL);
- if (sha_ctx->in_buf == NULL) {
- pr_err("qcrypto Can't Allocate mem: sha_ctx->in_buf, error %ld\n",
- PTR_ERR(sha_ctx->in_buf));
+ ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
+ if (ahash_req == NULL)
+ return -ENOMEM;
+ init_completion(&ahash_req_complete);
+ ahash_request_set_callback(ahash_req,
+ CRYPTO_TFM_REQ_MAY_BACKLOG,
+ _crypto_sha_hmac_ahash_req_complete,
+ &ahash_req_complete);
+ crypto_ahash_clear_flags(tfm, ~0);
+
+ in_buf = kzalloc(len + 64, GFP_KERNEL);
+ if (in_buf == NULL) {
+ pr_err("qcrypto Can't Allocate mem: in_buf, error %ld\n",
+ PTR_ERR(in_buf));
+ ahash_request_free(ahash_req);
return -ENOMEM;
}
- memcpy(sha_ctx->in_buf, key, len);
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->in_buf, len);
- sg_mark_end(&sha_ctx->tmp_sg);
+ memcpy(in_buf, key, len);
+ sg_set_buf(&sg, in_buf, len);
+ sg_mark_end(&sg);
- ahash_request_set_crypt(sha_ctx->ahash_req, &sha_ctx->tmp_sg,
+ ahash_request_set_crypt(ahash_req, &sg,
&sha_ctx->authkey[0], len);
- ret = _sha_digest(sha_ctx->ahash_req);
+ if (sha_ctx->alg == QCE_HASH_SHA1)
+ ret = _sha1_digest(ahash_req);
+ else
+ ret = _sha256_digest(ahash_req);
if (ret == -EINPROGRESS || ret == -EBUSY) {
ret =
wait_for_completion_interruptible(
- &sha_ctx->ahash_req_complete);
+ &ahash_req_complete);
INIT_COMPLETION(sha_ctx->ahash_req_complete);
}
- sha_ctx->authkey_in_len = len;
- kfree(sha_ctx->in_buf);
- sha_ctx->in_buf = NULL;
+ kfree(in_buf);
+ ahash_request_free(ahash_req);
return ret;
}
@@ -2848,16 +2980,15 @@
unsigned int len)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
-
- if (len <= SHA1_BLOCK_SIZE)
+ memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
+ if (len <= SHA1_BLOCK_SIZE) {
memcpy(&sha_ctx->authkey[0], key, len);
- else {
- _sha_init(sha_ctx);
+ sha_ctx->authkey_in_len = len;
+ } else {
sha_ctx->alg = QCE_HASH_SHA1;
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
- SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
_sha_hmac_setkey(tfm, key, len);
+ sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
}
return 0;
}
@@ -2867,15 +2998,15 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
- if (len <= SHA256_BLOCK_SIZE)
+ memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
+ if (len <= SHA256_BLOCK_SIZE) {
memcpy(&sha_ctx->authkey[0], key, len);
- else {
- _sha_init(sha_ctx);
+ sha_ctx->authkey_in_len = len;
+ } else {
sha_ctx->alg = QCE_HASH_SHA256;
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
- SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
_sha_hmac_setkey(tfm, key, len);
+ sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
}
return 0;
@@ -2885,11 +3016,12 @@
uint32_t sha_block_size)
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
int i;
for (i = 0; i < sha_block_size; i++)
- sha_ctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
- sha_ctx->trailing_buf_len = sha_block_size;
+ rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
+ rctx->trailing_buf_len = sha_block_size;
return 0;
}
@@ -2900,16 +3032,16 @@
struct crypto_priv *cp = sha_ctx->cp;
struct crypto_stat *pstat;
int ret = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha1_hmac_digest++;
- _sha_init(sha_ctx);
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ _sha_init(req);
+ memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
- _update_sha1_ctx(req);
if (cp->ce_support.sha_hmac)
sha_ctx->alg = QCE_HASH_SHA1_HMAC;
@@ -2927,16 +3059,17 @@
struct crypto_priv *cp = sha_ctx->cp;
struct crypto_stat *pstat;
int ret = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha256_hmac_digest++;
- _sha_init(sha_ctx);
- memset(&sha_ctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ _sha_init(req);
+
+ memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
- _update_sha256_ctx(req);
if (cp->ce_support.sha_hmac)
sha_ctx->alg = QCE_HASH_SHA256_HMAC;
@@ -2965,36 +3098,39 @@
struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
struct crypto_priv *cp = sha_ctx->cp;
int i;
+ uint8_t *staging;
+ uint8_t *p;
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ p = staging;
for (i = 0; i < sha_block_size; i++)
- sha_ctx->tmp_tbuf[i] = sha_ctx->authkey[i] ^ 0x5c;
+ *p++ = sha_ctx->authkey[i] ^ 0x5c;
+ memcpy(p, &rctx->digest[0], sha_digest_size);
+ sg_set_buf(&rctx->sg[0], staging, sha_block_size +
+ sha_digest_size);
+ sg_mark_end(&rctx->sg[0]);
/* save the original req structure fields*/
rctx->src = req->src;
rctx->nbytes = req->nbytes;
- memcpy(&sha_ctx->tmp_tbuf[sha_block_size], &sha_ctx->digest[0],
- sha_digest_size);
-
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->tmp_tbuf, sha_block_size +
- sha_digest_size);
- sg_mark_end(&sha_ctx->tmp_sg);
- req->src = &sha_ctx->tmp_sg;
+ req->src = &rctx->sg[0];
req->nbytes = sha_block_size + sha_digest_size;
- _sha_init(sha_ctx);
+ _sha_init(req);
if (sha_ctx->alg == QCE_HASH_SHA1) {
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
} else {
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
}
- sha_ctx->last_blk = 1;
- return _qcrypto_queue_req(cp, &req->base);
+ rctx->last_blk = 1;
+ return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
}
static int _sha_hmac_inner_hash(struct ahash_request *req,
@@ -3004,17 +3140,19 @@
struct ahash_request *areq = sha_ctx->ahash_req;
struct crypto_priv *cp = sha_ctx->cp;
int ret = 0;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
+ uint8_t *staging;
- sha_ctx->last_blk = 1;
+ staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
+ L1_CACHE_BYTES);
+ memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
+ sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
+ sg_mark_end(&rctx->sg[0]);
- sg_set_buf(&sha_ctx->tmp_sg, sha_ctx->trailing_buf,
- sha_ctx->trailing_buf_len);
- sg_mark_end(&sha_ctx->tmp_sg);
-
- ahash_request_set_crypt(areq, &sha_ctx->tmp_sg, &sha_ctx->digest[0],
- sha_ctx->trailing_buf_len);
- sha_ctx->last_blk = 1;
- ret = _qcrypto_queue_req(cp, &areq->base);
+ ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
+ rctx->trailing_buf_len);
+ rctx->last_blk = 1;
+ ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
if (ret == -EINPROGRESS || ret == -EBUSY) {
ret =
@@ -3067,12 +3205,13 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha1_hmac_digest++;
- _sha_init(sha_ctx);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha1_uint8[0],
+ _sha_init(req);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
SHA1_DIGEST_SIZE);
sha_ctx->diglen = SHA1_DIGEST_SIZE;
sha_ctx->alg = QCE_HASH_SHA1_HMAC;
@@ -3084,12 +3223,13 @@
{
struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
struct crypto_stat *pstat;
+ struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
pstat = &_qcrypto_stat;
pstat->sha256_hmac_digest++;
- _sha_init(sha_ctx);
- memcpy(&sha_ctx->digest[0], &_std_init_vector_sha256_uint8[0],
+ _sha_init(req);
+ memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
SHA256_DIGEST_SIZE);
sha_ctx->diglen = SHA256_DIGEST_SIZE;
sha_ctx->alg = QCE_HASH_SHA256_HMAC;
@@ -3097,6 +3237,16 @@
return _sha_digest(req);
}
+static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
+{
+ char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
+ if (CRYPTO_MAX_ALG_NAME < size + 5)
+ return -EINVAL;
+ strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
+ strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
+ return 0;
+}
+
int qcrypto_cipher_set_flag(struct ablkcipher_request *req, unsigned int flags)
{
struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
@@ -3252,8 +3402,8 @@
.init = _sha1_hmac_init,
.update = _sha1_hmac_update,
.final = _sha1_hmac_final,
- .export = _sha1_export,
- .import = _sha1_import,
+ .export = _sha1_hmac_export,
+ .import = _sha1_hmac_import,
.digest = _sha1_hmac_digest,
.setkey = _sha1_hmac_setkey,
.halg = {
@@ -3280,8 +3430,8 @@
.init = _sha256_hmac_init,
.update = _sha256_hmac_update,
.final = _sha256_hmac_final,
- .export = _sha256_export,
- .import = _sha256_import,
+ .export = _sha256_hmac_export,
+ .import = _sha256_hmac_import,
.digest = _sha256_hmac_digest,
.setkey = _sha256_hmac_setkey,
.halg = {
@@ -3627,38 +3777,59 @@
{
int rc = 0;
void *handle;
- struct crypto_priv *cp;
+ struct crypto_priv *cp = &qcrypto_dev;
int i;
struct msm_ce_hw_support *platform_support;
+ struct crypto_engine *pengine;
+ unsigned long flags;
- cp = kzalloc(sizeof(*cp), GFP_KERNEL);
- if (!cp) {
+ pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
+ if (!pengine) {
pr_err("qcrypto Memory allocation of q_alg FAIL, error %ld\n",
- PTR_ERR(cp));
+ PTR_ERR(pengine));
return -ENOMEM;
}
/* open qce */
handle = qce_open(pdev, &rc);
if (handle == NULL) {
- kfree(cp);
+ kfree(pengine);
platform_set_drvdata(pdev, NULL);
return rc;
}
- INIT_LIST_HEAD(&cp->alg_list);
- platform_set_drvdata(pdev, cp);
- spin_lock_init(&cp->lock);
- tasklet_init(&cp->done_tasklet, req_done, (unsigned long)cp);
- crypto_init_queue(&cp->queue, 50);
- cp->qce = handle;
- cp->pdev = pdev;
- qce_hw_support(cp->qce, &cp->ce_support);
+ platform_set_drvdata(pdev, pengine);
+ pengine->qce = handle;
+ pengine->pcp = cp;
+ pengine->pdev = pdev;
+ pengine->req = NULL;
+
+ pengine->high_bw_req_count = 0;
+ pengine->high_bw_req = false;
+ init_timer(&(pengine->bw_scale_down_timer));
+ INIT_WORK(&pengine->low_bw_req_ws, qcrypto_low_bw_req_work);
+ pengine->bw_scale_down_timer.function =
+ qcrypto_bw_scale_down_timer_callback;
+
+ device_init_wakeup(&pengine->pdev->dev, true);
+
+ tasklet_init(&pengine->done_tasklet, req_done, (unsigned long)pengine);
+ crypto_init_queue(&pengine->req_queue, 50);
+
+ mutex_lock(&cp->engine_lock);
+ cp->total_units++;
+ pengine->unit = cp->total_units;
+
+ spin_lock_irqsave(&cp->lock, flags);
+ list_add_tail(&pengine->elist, &cp->engine_list);
+ cp->next_engine = pengine;
+ spin_unlock_irqrestore(&cp->lock, flags);
+
+ qce_hw_support(pengine->qce, &cp->ce_support);
if (cp->ce_support.bam) {
cp->platform_support.ce_shared = cp->ce_support.is_shared;
cp->platform_support.shared_ce_resource = 0;
cp->platform_support.hw_key_support = cp->ce_support.hw_key;
- cp->platform_support.bus_scale_table = NULL;
cp->platform_support.sha_hmac = 1;
cp->platform_support.bus_scale_table =
@@ -3678,26 +3849,25 @@
platform_support->bus_scale_table;
cp->platform_support.sha_hmac = platform_support->sha_hmac;
}
- cp->high_bw_req_count = 0;
- cp->ce_lock_count = 0;
-
-
- if (cp->platform_support.ce_shared)
- INIT_WORK(&cp->unlock_ce_ws, qcrypto_unlock_ce);
-
+ pengine->bus_scale_handle = 0;
if (cp->platform_support.bus_scale_table != NULL) {
- cp->bus_scale_handle =
+ pengine->bus_scale_handle =
msm_bus_scale_register_client(
(struct msm_bus_scale_pdata *)
cp->platform_support.bus_scale_table);
- if (!cp->bus_scale_handle) {
- printk(KERN_ERR "%s not able to get bus scale\n",
+ if (!pengine->bus_scale_handle) {
+ pr_err("%s not able to get bus scale\n",
__func__);
rc = -ENOMEM;
goto err;
}
}
+ if (cp->total_units != 1) {
+ mutex_unlock(&cp->engine_lock);
+ return 0;
+ }
+
/* register crypto cipher algorithms the device supports */
for (i = 0; i < ARRAY_SIZE(_qcrypto_ablk_cipher_algos); i++) {
struct qcrypto_alg *q_alg;
@@ -3708,6 +3878,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
+ if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3730,6 +3911,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
+ if (cp->ce_support.use_sw_aes_xts_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3755,7 +3947,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
-
+ if (cp->ce_support.use_sw_ahash_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->sha_alg.halg.base.cra_name,
+ strlen(q_alg->sha_alg.halg.base.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->sha_alg.halg.base.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_ahash(&q_alg->sha_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3781,7 +3983,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
-
+ if (cp->ce_support.use_sw_aead_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev,
@@ -3808,7 +4020,18 @@
rc = PTR_ERR(q_alg);
goto err;
}
-
+ if (cp->ce_support.use_sw_hmac_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->sha_alg.halg.base.cra_name,
+ strlen(
+ q_alg->sha_alg.halg.base.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->sha_alg.halg.base.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_ahash(&q_alg->sha_alg);
if (rc) {
dev_err(&pdev->dev,
@@ -3834,6 +4057,17 @@
rc = PTR_ERR(q_alg);
goto err;
}
+ if (cp->ce_support.use_sw_aes_ccm_algo) {
+ rc = _qcrypto_prefix_alg_cra_name(
+ q_alg->cipher_alg.cra_name,
+ strlen(q_alg->cipher_alg.cra_name));
+ if (rc) {
+ dev_err(&pdev->dev,
+ "The algorithm name %s is too long.\n",
+ q_alg->cipher_alg.cra_name);
+ goto err;
+ }
+ }
rc = crypto_register_alg(&q_alg->cipher_alg);
if (rc) {
dev_err(&pdev->dev, "%s alg registration failed\n",
@@ -3846,13 +4080,112 @@
}
}
+ mutex_unlock(&cp->engine_lock);
return 0;
err:
- _qcrypto_remove(pdev);
+ _qcrypto_remove_engine(pengine);
+ mutex_unlock(&cp->engine_lock);
+ if (pengine->qce)
+ qce_close(pengine->qce);
+ kfree(pengine);
return rc;
};
+static int _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ int ret = 0;
+ struct crypto_engine *pengine;
+ struct crypto_priv *cp;
+
+ pengine = platform_get_drvdata(pdev);
+ if (!pengine)
+ return -EINVAL;
+
+ /*
+ * Check if this platform supports clock management in suspend/resume
+ * If not, just simply return 0.
+ */
+ cp = pengine->pcp;
+ if (!cp->ce_support.clk_mgmt_sus_res)
+ return 0;
+
+ mutex_lock(&cp->engine_lock);
+
+ if (pengine->high_bw_req) {
+ del_timer_sync(&(pengine->bw_scale_down_timer));
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 0);
+ if (ret) {
+ dev_err(&pdev->dev, "%s Unable to set to low bandwidth\n",
+ __func__);
+ mutex_unlock(&cp->engine_lock);
+ return ret;
+ }
+ ret = qce_disable_clk(pengine->qce);
+ if (ret) {
+ pr_err("%s Unable disable clk\n", __func__);
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 1);
+ if (ret)
+ dev_err(&pdev->dev,
+ "%s Unable to set to high bandwidth\n",
+ __func__);
+ mutex_unlock(&cp->engine_lock);
+ return ret;
+ }
+ }
+
+ mutex_unlock(&cp->engine_lock);
+ return 0;
+}
+
+static int _qcrypto_resume(struct platform_device *pdev)
+{
+ int ret = 0;
+ struct crypto_engine *pengine;
+ struct crypto_priv *cp;
+
+ pengine = platform_get_drvdata(pdev);
+
+ if (!pengine)
+ return -EINVAL;
+
+ cp = pengine->pcp;
+ if (!cp->ce_support.clk_mgmt_sus_res)
+ return 0;
+
+ mutex_lock(&cp->engine_lock);
+ if (pengine->high_bw_req) {
+ ret = qce_enable_clk(pengine->qce);
+ if (ret) {
+ dev_err(&pdev->dev, "%s Unable to enable clk\n",
+ __func__);
+ mutex_unlock(&cp->engine_lock);
+ return ret;
+ }
+ ret = msm_bus_scale_client_update_request(
+ pengine->bus_scale_handle, 1);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "%s Unable to set to high bandwidth\n",
+ __func__);
+ qce_disable_clk(pengine->qce);
+ mutex_unlock(&cp->engine_lock);
+ return ret;
+ }
+ pengine->bw_scale_down_timer.data =
+ (unsigned long)(pengine);
+ pengine->bw_scale_down_timer.expires = jiffies +
+ msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
+ add_timer(&(pengine->bw_scale_down_timer));
+ }
+
+ mutex_unlock(&cp->engine_lock);
+
+ return 0;
+}
+
static struct of_device_id qcrypto_match[] = {
{ .compatible = "qcom,qcrypto",
},
@@ -3862,6 +4195,8 @@
static struct platform_driver _qualcomm_crypto = {
.probe = _qcrypto_probe,
.remove = _qcrypto_remove,
+ .suspend = _qcrypto_suspend,
+ .resume = _qcrypto_resume,
.driver = {
.owner = THIS_MODULE,
.name = "qcrypto",
@@ -3895,10 +4230,19 @@
static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
+ unsigned long flags;
+ struct crypto_priv *cp = &qcrypto_dev;
+ struct crypto_engine *pe;
memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
+ spin_lock_irqsave(&cp->lock, flags);
+ list_for_each_entry(pe, &cp->engine_list, elist) {
+ pe->total_req = 0;
+ pe->err_req = 0;
+ }
+ spin_unlock_irqrestore(&cp->lock, flags);
return count;
-};
+}
static const struct file_operations _debug_stats_ops = {
.open = _debug_stats_open,
@@ -3938,11 +4282,20 @@
static int __init _qcrypto_init(void)
{
int rc;
+ struct crypto_priv *pcp = &qcrypto_dev;
rc = _qcrypto_debug_init();
if (rc)
return rc;
-
+ INIT_LIST_HEAD(&pcp->alg_list);
+ INIT_LIST_HEAD(&pcp->engine_list);
+ INIT_WORK(&pcp->unlock_ce_ws, qcrypto_unlock_ce);
+ spin_lock_init(&pcp->lock);
+ mutex_init(&pcp->engine_lock);
+ pcp->total_units = 0;
+ pcp->ce_lock_count = 0;
+ pcp->platform_support.bus_scale_table = NULL;
+ pcp->next_engine = NULL;
return platform_driver_register(&_qualcomm_crypto);
}
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 9e49b3e..e13fb5f 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -125,14 +125,20 @@
cur_time = jiffies;
devfreq->time_in_state[lev] +=
cur_time - devfreq->last_stat_updated;
- if (freq != devfreq->previous_freq) {
- prev_lev = devfreq_get_freq_level(devfreq,
- devfreq->previous_freq);
+ devfreq->last_stat_updated = cur_time;
+
+ if (freq == devfreq->previous_freq)
+ return 0;
+
+ prev_lev = devfreq_get_freq_level(devfreq, devfreq->previous_freq);
+ if (prev_lev < 0)
+ return 0;
+
+ if (lev != prev_lev) {
devfreq->trans_table[(prev_lev *
devfreq->profile->max_state) + lev]++;
devfreq->total_trans++;
}
- devfreq->last_stat_updated = cur_time;
return 0;
}
diff --git a/drivers/devfreq/governor_cpubw_hwmon.c b/drivers/devfreq/governor_cpubw_hwmon.c
index fb5a562..e7d373b 100644
--- a/drivers/devfreq/governor_cpubw_hwmon.c
+++ b/drivers/devfreq/governor_cpubw_hwmon.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -77,13 +77,15 @@
static int l2pm_irq;
static unsigned int bytes_per_beat;
-static unsigned int sample_ms = 50;
static unsigned int tolerance_percent = 10;
static unsigned int guard_band_mbps = 100;
static unsigned int decay_rate = 90;
-static unsigned int io_percent = 15;
-static unsigned int bw_step = 200;
+static unsigned int io_percent = 16;
+static unsigned int bw_step = 190;
+#define MIN_MS 10U
+#define MAX_MS 500U
+static unsigned int sample_ms = 50;
static u32 prev_r_start_val;
static u32 prev_w_start_val;
static unsigned long prev_ab;
@@ -245,7 +247,7 @@
}
*ab = roundup(mbps, bw_step);
- *freq = roundup((mbps * 100) / io_percent, bw_step);
+ *freq = (mbps * 100) / io_percent;
}
#define TOO_SOON_US (1 * USEC_PER_MSEC)
@@ -343,7 +345,6 @@
return 0;
}
-gov_attr(sample_ms, 10U, 500U);
gov_attr(tolerance_percent, 0U, 30U);
gov_attr(guard_band_mbps, 0U, 2000U);
gov_attr(decay_rate, 0U, 100U);
@@ -351,7 +352,6 @@
gov_attr(bw_step, 50U, 1000U);
static struct attribute *dev_attr[] = {
- &dev_attr_sample_ms.attr,
&dev_attr_tolerance_percent.attr,
&dev_attr_guard_band_mbps.attr,
&dev_attr_decay_rate.attr,
@@ -378,7 +378,13 @@
ret = sysfs_create_group(&df->dev.kobj, &dev_attr_group);
if (ret)
return ret;
+
+ sample_ms = df->profile->polling_ms;
+ sample_ms = max(MIN_MS, sample_ms);
+ sample_ms = min(MAX_MS, sample_ms);
+ df->profile->polling_ms = sample_ms;
devfreq_monitor_start(df);
+
pr_debug("Enabled CPU BW HW monitor governor\n");
break;
@@ -391,7 +397,10 @@
break;
case DEVFREQ_GOV_INTERVAL:
- devfreq_interval_update(df, (unsigned int *)data);
+ sample_ms = *(unsigned int *)data;
+ sample_ms = max(MIN_MS, sample_ms);
+ sample_ms = min(MAX_MS, sample_ms);
+ devfreq_interval_update(df, &sample_ms);
break;
}
diff --git a/drivers/gpio/qpnp-pin.c b/drivers/gpio/qpnp-pin.c
index 2753082..8d934df 100644
--- a/drivers/gpio/qpnp-pin.c
+++ b/drivers/gpio/qpnp-pin.c
@@ -55,11 +55,13 @@
#define Q_GPIO_SUBTYPE_GPIOC_8CH 0xD
/* mpp peripheral type and subtype values */
-#define Q_MPP_TYPE 0x11
-#define Q_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3
-#define Q_MPP_SUBTYPE_4CH_NO_SINK 0x5
-#define Q_MPP_SUBTYPE_4CH_FULL_FUNC 0x7
-#define Q_MPP_SUBTYPE_8CH_FULL_FUNC 0xF
+#define Q_MPP_TYPE 0x11
+#define Q_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3
+#define Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT 0x4
+#define Q_MPP_SUBTYPE_4CH_NO_SINK 0x5
+#define Q_MPP_SUBTYPE_ULT_4CH_NO_SINK 0x6
+#define Q_MPP_SUBTYPE_4CH_FULL_FUNC 0x7
+#define Q_MPP_SUBTYPE_8CH_FULL_FUNC 0xF
/* control register base address offsets */
#define Q_REG_MODE_CTL 0x40
@@ -235,22 +237,29 @@
static int qpnp_pin_check_config(enum qpnp_pin_param_type idx,
struct qpnp_pin_spec *q_spec, uint32_t val)
{
+ u8 subtype = q_spec->subtype;
+
switch (idx) {
case Q_PIN_CFG_MODE:
if (q_spec->type == Q_GPIO_TYPE &&
val >= QPNP_PIN_GPIO_MODE_INVALID)
return -EINVAL;
- else if (q_spec->type == Q_MPP_TYPE &&
- val >= QPNP_PIN_MPP_MODE_INVALID)
+ else if (q_spec->type == Q_MPP_TYPE) {
+ if (val >= QPNP_PIN_MPP_MODE_INVALID)
return -EINVAL;
+ if ((subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT ||
+ subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_SINK) &&
+ (val == QPNP_PIN_MODE_BIDIR))
+ return -ENXIO;
+ }
break;
case Q_PIN_CFG_OUTPUT_TYPE:
if (q_spec->type != Q_GPIO_TYPE)
return -ENXIO;
if ((val == QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS ||
val == QPNP_PIN_OUT_BUF_OPEN_DRAIN_PMOS) &&
- (q_spec->subtype == Q_GPIO_SUBTYPE_GPIOC_4CH ||
- (q_spec->subtype == Q_GPIO_SUBTYPE_GPIOC_8CH)))
+ (subtype == Q_GPIO_SUBTYPE_GPIOC_4CH ||
+ (subtype == Q_GPIO_SUBTYPE_GPIOC_8CH)))
return -EINVAL;
else if (val >= QPNP_PIN_OUT_BUF_INVALID)
return -EINVAL;
@@ -263,22 +272,28 @@
if (q_spec->type == Q_GPIO_TYPE &&
val >= QPNP_PIN_GPIO_PULL_INVALID)
return -EINVAL;
- if (q_spec->type == Q_MPP_TYPE &&
- val >= QPNP_PIN_MPP_PULL_INVALID)
- return -EINVAL;
+ if (q_spec->type == Q_MPP_TYPE) {
+ if (val >= QPNP_PIN_MPP_PULL_INVALID)
+ return -EINVAL;
+ if (subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT ||
+ subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_SINK)
+ return -ENXIO;
+ }
break;
case Q_PIN_CFG_VIN_SEL:
if (val >= QPNP_PIN_VIN_8CH_INVALID)
return -EINVAL;
else if (val >= QPNP_PIN_VIN_4CH_INVALID) {
if (q_spec->type == Q_GPIO_TYPE &&
- (q_spec->subtype == Q_GPIO_SUBTYPE_GPIO_4CH ||
- q_spec->subtype == Q_GPIO_SUBTYPE_GPIOC_4CH))
+ (subtype == Q_GPIO_SUBTYPE_GPIO_4CH ||
+ subtype == Q_GPIO_SUBTYPE_GPIOC_4CH))
return -EINVAL;
if (q_spec->type == Q_MPP_TYPE &&
- (q_spec->subtype == Q_MPP_SUBTYPE_4CH_NO_ANA_OUT ||
- q_spec->subtype == Q_MPP_SUBTYPE_4CH_NO_SINK ||
- q_spec->subtype == Q_MPP_SUBTYPE_4CH_FULL_FUNC))
+ (subtype == Q_MPP_SUBTYPE_4CH_NO_ANA_OUT ||
+ subtype == Q_MPP_SUBTYPE_4CH_NO_SINK ||
+ subtype == Q_MPP_SUBTYPE_4CH_FULL_FUNC ||
+ subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT ||
+ subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_SINK))
return -EINVAL;
}
break;
@@ -304,7 +319,8 @@
case Q_PIN_CFG_AOUT_REF:
if (q_spec->type != Q_MPP_TYPE)
return -ENXIO;
- if (q_spec->subtype == Q_MPP_SUBTYPE_4CH_NO_ANA_OUT)
+ if (subtype == Q_MPP_SUBTYPE_4CH_NO_ANA_OUT ||
+ subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT)
return -ENXIO;
if (val >= QPNP_PIN_AOUT_REF_INVALID)
return -EINVAL;
@@ -318,7 +334,8 @@
case Q_PIN_CFG_CS_OUT:
if (q_spec->type != Q_MPP_TYPE)
return -ENXIO;
- if (q_spec->subtype == Q_MPP_SUBTYPE_4CH_NO_SINK)
+ if (subtype == Q_MPP_SUBTYPE_4CH_NO_SINK ||
+ subtype == Q_MPP_SUBTYPE_ULT_4CH_NO_SINK)
return -ENXIO;
if (val >= QPNP_PIN_CS_OUT_INVALID)
return -EINVAL;
@@ -410,9 +427,11 @@
else if (q_spec->type == Q_MPP_TYPE)
switch (q_spec->subtype) {
case Q_MPP_SUBTYPE_4CH_NO_SINK:
+ case Q_MPP_SUBTYPE_ULT_4CH_NO_SINK:
q_spec->num_ctl_regs = 12;
break;
case Q_MPP_SUBTYPE_4CH_NO_ANA_OUT:
+ case Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT:
case Q_MPP_SUBTYPE_4CH_FULL_FUNC:
case Q_MPP_SUBTYPE_8CH_FULL_FUNC:
q_spec->num_ctl_regs = 13;
@@ -1144,7 +1163,9 @@
else if (q_spec->type == Q_MPP_TYPE)
switch (q_spec->subtype) {
case Q_MPP_SUBTYPE_4CH_NO_ANA_OUT:
+ case Q_MPP_SUBTYPE_ULT_4CH_NO_ANA_OUT:
case Q_MPP_SUBTYPE_4CH_NO_SINK:
+ case Q_MPP_SUBTYPE_ULT_4CH_NO_SINK:
case Q_MPP_SUBTYPE_4CH_FULL_FUNC:
case Q_MPP_SUBTYPE_8CH_FULL_FUNC:
return 1;
diff --git a/drivers/gpu/ion/ion_heap.c b/drivers/gpu/ion/ion_heap.c
index 73dd868..6261d89 100644
--- a/drivers/gpu/ion/ion_heap.c
+++ b/drivers/gpu/ion/ion_heap.c
@@ -240,43 +240,6 @@
return ret;
}
-int ion_heap_buffer_zero_old(struct ion_buffer *buffer)
-{
- struct sg_table *table = buffer->sg_table;
- pgprot_t pgprot;
- struct scatterlist *sg;
- struct vm_struct *vm_struct;
- int i, j, ret = 0;
-
- if (buffer->flags & ION_FLAG_CACHED)
- pgprot = PAGE_KERNEL;
- else
- pgprot = pgprot_writecombine(PAGE_KERNEL);
-
- vm_struct = get_vm_area(PAGE_SIZE, VM_ALLOC);
- if (!vm_struct)
- return -ENOMEM;
-
- for_each_sg(table->sgl, sg, table->nents, i) {
- struct page *page = sg_page(sg);
- unsigned long len = sg_dma_len(sg);
-
- for (j = 0; j < len / PAGE_SIZE; j++) {
- struct page *sub_page = page + j;
- struct page **pages = &sub_page;
- ret = map_vm_area(vm_struct, pgprot, &pages);
- if (ret)
- goto end;
- memset(vm_struct->addr, 0, PAGE_SIZE);
- unmap_kernel_range((unsigned long)vm_struct->addr,
- PAGE_SIZE);
- }
- }
-end:
- free_vm_area(vm_struct);
- return ret;
-}
-
void ion_heap_free_page(struct ion_buffer *buffer, struct page *page,
unsigned int order)
{
@@ -327,11 +290,11 @@
if (total_drained >= size)
break;
list_del(&buffer->list);
- ion_buffer_destroy(buffer);
heap->free_list_size -= buffer->size;
if (skip_pools)
buffer->flags |= ION_FLAG_FREED_FROM_SHRINKER;
total_drained += buffer->size;
+ ion_buffer_destroy(buffer);
}
rt_mutex_unlock(&heap->lock);
diff --git a/drivers/gpu/ion/ion_system_heap.c b/drivers/gpu/ion/ion_system_heap.c
index be1a89c..cfdd5f4 100644
--- a/drivers/gpu/ion/ion_system_heap.c
+++ b/drivers/gpu/ion/ion_system_heap.c
@@ -2,7 +2,7 @@
* drivers/gpu/ion/ion_system_heap.c
*
* Copyright (C) 2011 Google, Inc.
- * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -34,7 +34,7 @@
__GFP_NO_KSWAPD) & ~__GFP_WAIT;
static unsigned int low_order_gfp_flags = (GFP_HIGHUSER | __GFP_ZERO |
__GFP_NOWARN);
-static const unsigned int orders[] = {8, 4, 0};
+static const unsigned int orders[] = {9, 8, 4, 0};
static const int num_orders = ARRAY_SIZE(orders);
static int order_to_index(unsigned int order)
{
@@ -362,7 +362,7 @@
struct ion_page_pool *pool;
gfp_t gfp_flags = low_order_gfp_flags;
- if (orders[i] > 4)
+ if (orders[i])
gfp_flags = high_order_gfp_flags;
pool = ion_page_pool_create(gfp_flags, orders[i]);
if (!pool)
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index eba60ea..7717829 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -1205,9 +1205,11 @@
* after the command has been retired
*/
if (result)
- kgsl_mmu_disable_clk_on_ts(&device->mmu, 0, false);
+ kgsl_mmu_disable_clk(&device->mmu,
+ KGSL_IOMMU_CONTEXT_USER);
else
- kgsl_mmu_disable_clk_on_ts(&device->mmu, rb->global_ts, true);
+ kgsl_mmu_disable_clk_on_ts(&device->mmu, rb->global_ts,
+ KGSL_IOMMU_CONTEXT_USER);
done:
kgsl_context_put(context);
@@ -2336,15 +2338,33 @@
const char *buf, size_t count)
{
struct adreno_device *adreno_dev = _get_adreno_dev(dev);
- int ret;
+ int ret = 0;
+ unsigned int policy = 0;
if (adreno_dev == NULL)
return 0;
mutex_lock(&adreno_dev->dev.mutex);
- ret = _ft_sysfs_store(buf, count, &adreno_dev->ft_pf_policy);
+
+ /* MMU option changed call function to reset MMU options */
+ if (count != _ft_sysfs_store(buf, count, &policy))
+ ret = -EINVAL;
+
+ if (!ret) {
+ policy &= (KGSL_FT_PAGEFAULT_INT_ENABLE |
+ KGSL_FT_PAGEFAULT_GPUHALT_ENABLE |
+ KGSL_FT_PAGEFAULT_LOG_ONE_PER_PAGE |
+ KGSL_FT_PAGEFAULT_LOG_ONE_PER_INT);
+ ret = kgsl_mmu_set_pagefault_policy(&(adreno_dev->dev.mmu),
+ adreno_dev->ft_pf_policy);
+ if (!ret)
+ adreno_dev->ft_pf_policy = policy;
+ }
mutex_unlock(&adreno_dev->dev.mutex);
- return ret;
+ if (!ret)
+ return count;
+ else
+ return 0;
}
/**
@@ -2635,12 +2655,56 @@
return status;
}
-static int adreno_setproperty(struct kgsl_device *device,
+static int adreno_set_constraint(struct kgsl_device *device,
+ struct kgsl_context *context,
+ struct kgsl_device_constraint *constraint)
+{
+ int status = 0;
+
+ switch (constraint->type) {
+ case KGSL_CONSTRAINT_PWRLEVEL: {
+ struct kgsl_device_constraint_pwrlevel pwr;
+
+ if (constraint->size != sizeof(pwr)) {
+ status = -EINVAL;
+ break;
+ }
+
+ if (copy_from_user(&pwr,
+ (void __user *)constraint->data,
+ sizeof(pwr))) {
+ status = -EFAULT;
+ break;
+ }
+ if (pwr.level >= KGSL_CONSTRAINT_PWR_MAXLEVELS) {
+ status = -EINVAL;
+ break;
+ }
+
+ context->pwr_constraint.type =
+ KGSL_CONSTRAINT_PWRLEVEL;
+ context->pwr_constraint.sub_type = pwr.level;
+ }
+ break;
+ case KGSL_CONSTRAINT_NONE:
+ context->pwr_constraint.type = KGSL_CONSTRAINT_NONE;
+ break;
+
+ default:
+ status = -EINVAL;
+ break;
+ }
+
+ return status;
+}
+
+static int adreno_setproperty(struct kgsl_device_private *dev_priv,
enum kgsl_property_type type,
void *value,
unsigned int sizebytes)
{
int status = -EINVAL;
+ struct kgsl_device *device = dev_priv->device;
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
switch (type) {
@@ -2678,6 +2742,28 @@
status = 0;
}
break;
+ case KGSL_PROP_PWR_CONSTRAINT: {
+ struct kgsl_device_constraint constraint;
+ struct kgsl_context *context;
+
+ if (sizebytes != sizeof(constraint))
+ break;
+
+ if (copy_from_user(&constraint, value,
+ sizeof(constraint))) {
+ status = -EFAULT;
+ break;
+ }
+
+ context = kgsl_context_get_owner(dev_priv,
+ constraint.context_id);
+ if (context == NULL)
+ break;
+ status = adreno_set_constraint(device, context,
+ &constraint);
+ kgsl_context_put(context);
+ }
+ break;
default:
break;
}
@@ -3069,7 +3155,7 @@
return -EINVAL;
ret = adreno_drawctxt_wait(ADRENO_DEVICE(device), context,
- timestamp, msecs_to_jiffies(msecs));
+ timestamp, msecs);
/* If the context got invalidated then return a specific error */
drawctxt = ADRENO_CONTEXT(context);
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 800caf1..0f1e01d 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -20,6 +20,8 @@
#include "kgsl_iommu.h"
#include <mach/ocmem.h>
+#include "a3xx_reg.h"
+
#define DEVICE_3D_NAME "kgsl-3d"
#define DEVICE_3D0_NAME "kgsl-3d0"
@@ -895,4 +897,48 @@
return result;
}
+/*
+ * adreno_set_protected_registers() - Protect the specified range of registers
+ * from being accessed by the GPU
+ * @device: pointer to the KGSL device
+ * @index: Pointer to the index of the protect mode register to write to
+ * @reg: Starting dword register to write
+ * @mask_len: Size of the mask to protect (# of registers = 2 ** mask_len)
+ *
+ * Add the range of registers to the list of protected mode registers that will
+ * cause an exception if the GPU accesses them. There are 16 available
+ * protected mode registers. Index is used to specify which register to write
+ * to - the intent is to call this function multiple times with the same index
+ * pointer for each range and the registers will be magically programmed in
+ * incremental fashion
+ */
+static inline void adreno_set_protected_registers(struct kgsl_device *device,
+ unsigned int *index, unsigned int reg, int mask_len)
+{
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
+ unsigned int val;
+
+ /* This function is only for adreno A3XX and beyond */
+ BUG_ON(adreno_is_a2xx(adreno_dev));
+
+ /* There are only 16 registers available */
+ BUG_ON(*index >= 16);
+
+ val = 0x60000000 | ((mask_len & 0x1F) << 24) | ((reg << 2) & 0x1FFFF);
+
+ /*
+ * Write the protection range to the next available protection
+ * register
+ */
+
+ kgsl_regwrite(device, A3XX_CP_PROTECT_REG_0 + *index, val);
+ *index = *index + 1;
+}
+
+#ifdef CONFIG_DEBUG_FS
+void adreno_debugfs_init(struct kgsl_device *device);
+#else
+static inline void adreno_debugfs_init(struct kgsl_device *device) { }
+#endif
+
#endif /*__ADRENO_H */
diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c
index 3d4c66a..eed11c3 100644
--- a/drivers/gpu/msm/adreno_a3xx.c
+++ b/drivers/gpu/msm/adreno_a3xx.c
@@ -3029,8 +3029,8 @@
GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x00000001);
GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x00000000);
GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x00000000);
- /* Protected mode control - turned off for A3XX */
- GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x00000000);
+ /* Enable protected mode */
+ GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x20000000);
GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x00000000);
GSL_RB_WRITE(rb->device, cmds, cmds_gpu, 0x00000000);
@@ -3092,9 +3092,16 @@
case A3XX_INT_CP_HW_FAULT:
err = "ringbuffer hardware fault";
break;
- case A3XX_INT_CP_REG_PROTECT_FAULT:
- err = "ringbuffer protected mode error interrupt";
- break;
+ case A3XX_INT_CP_REG_PROTECT_FAULT: {
+ unsigned int reg;
+ kgsl_regread(device, A3XX_CP_PROTECT_STATUS, ®);
+
+ KGSL_DRV_CRIT(device,
+ "CP | Protected mode error| %s | addr=%x\n",
+ reg & (1 << 24) ? "WRITE" : "READ",
+ (reg & 0x1FFFF) >> 2);
+ goto done;
+ }
case A3XX_INT_CP_AHB_ERROR_HALT:
err = "ringbuffer AHB error interrupt";
break;
@@ -4115,29 +4122,35 @@
*/
static void a3xx_protect_init(struct kgsl_device *device)
{
+ int index = 0;
+
/* enable access protection to privileged registers */
kgsl_regwrite(device, A3XX_CP_PROTECT_CTRL, 0x00000007);
/* RBBM registers */
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_0, 0x63000040);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_1, 0x62000080);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_2, 0x600000CC);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_3, 0x60000108);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_4, 0x64000140);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_5, 0x66000400);
+ adreno_set_protected_registers(device, &index, 0x18, 0);
+ adreno_set_protected_registers(device, &index, 0x20, 2);
+ adreno_set_protected_registers(device, &index, 0x33, 0);
+ adreno_set_protected_registers(device, &index, 0x42, 0);
+ adreno_set_protected_registers(device, &index, 0x50, 4);
+ adreno_set_protected_registers(device, &index, 0x63, 0);
+ adreno_set_protected_registers(device, &index, 0x100, 4);
/* CP registers */
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_6, 0x65000700);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_7, 0x610007D8);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_8, 0x620007E0);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_9, 0x61001178);
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_A, 0x64001180);
+ adreno_set_protected_registers(device, &index, 0x1C0, 5);
+ adreno_set_protected_registers(device, &index, 0x1F6, 1);
+ adreno_set_protected_registers(device, &index, 0x1F8, 2);
+ adreno_set_protected_registers(device, &index, 0x45E, 2);
+ adreno_set_protected_registers(device, &index, 0x460, 4);
/* RB registers */
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_B, 0x60003300);
+ adreno_set_protected_registers(device, &index, 0xCC0, 0);
/* VBIF registers */
- kgsl_regwrite(device, A3XX_CP_PROTECT_REG_C, 0x6B00C000);
+ adreno_set_protected_registers(device, &index, 0x3000, 6);
+
+ /* SMMU registers */
+ adreno_set_protected_registers(device, &index, 0x4000, 14);
}
static void a3xx_start(struct adreno_device *adreno_dev)
diff --git a/drivers/gpu/msm/adreno_a3xx_snapshot.c b/drivers/gpu/msm/adreno_a3xx_snapshot.c
index 56c4305..9f5765d 100644
--- a/drivers/gpu/msm/adreno_a3xx_snapshot.c
+++ b/drivers/gpu/msm/adreno_a3xx_snapshot.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -492,6 +492,22 @@
/* Reading these will hang the GPU if it isn't already hung */
if (hang) {
+ unsigned int reg;
+
+ /*
+ * Reading the microcode while the CP will is running will
+ * basically basically move the CP instruction pointer to
+ * whatever address we read. Big badaboom ensues. Stop the CP
+ * (if it isn't already stopped) to ensure that we are safe.
+ * We do this here and not earlier to avoid corrupting the RBBM
+ * status and CP registers - by the time we get here we don't
+ * care about the contents of the CP anymore.
+ */
+
+ adreno_readreg(adreno_dev, ADRENO_REG_CP_ME_CNTL, ®);
+ reg |= (1 << 27) | (1 << 28);
+ adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_CNTL, reg);
+
snapshot = kgsl_snapshot_add_section(device,
KGSL_SNAPSHOT_SECTION_DEBUG, snapshot, remain,
a3xx_snapshot_cp_pfp_ram, NULL);
diff --git a/drivers/gpu/msm/adreno_dispatch.c b/drivers/gpu/msm/adreno_dispatch.c
index a39ceef..95e4017 100644
--- a/drivers/gpu/msm/adreno_dispatch.c
+++ b/drivers/gpu/msm/adreno_dispatch.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -397,7 +397,7 @@
*/
if (count)
- wake_up_interruptible_all(&drawctxt->wq);
+ wake_up_all(&drawctxt->wq);
/*
* Return positive if the context submitted commands or if we figured
diff --git a/drivers/gpu/msm/adreno_drawctxt.c b/drivers/gpu/msm/adreno_drawctxt.c
index 6007a3f..4db045a 100644
--- a/drivers/gpu/msm/adreno_drawctxt.c
+++ b/drivers/gpu/msm/adreno_drawctxt.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2002,2007-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -138,7 +138,7 @@
u32 timestamp, u32 type)
{
struct adreno_context *drawctxt = priv;
- wake_up_interruptible_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->waiting);
}
#define adreno_wait_event_interruptible_timeout(wq, condition, timeout, io) \
@@ -266,20 +266,18 @@
{
struct adreno_context *drawctxt = priv;
- wake_up_interruptible_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->waiting);
kgsl_context_put(&drawctxt->base);
}
static int _check_global_timestamp(struct kgsl_device *device,
- unsigned int timestamp)
+ struct adreno_context *drawctxt, unsigned int timestamp)
{
- int ret;
+ /* Stop waiting if the context is invalidated */
+ if (drawctxt->state == ADRENO_CONTEXT_STATE_INVALID)
+ return 1;
- mutex_lock(&device->mutex);
- ret = kgsl_check_timestamp(device, NULL, timestamp);
- mutex_unlock(&device->mutex);
-
- return ret;
+ return kgsl_check_timestamp(device, NULL, timestamp);
}
int adreno_drawctxt_wait_global(struct adreno_device *adreno_dev,
@@ -288,7 +286,7 @@
{
struct kgsl_device *device = &adreno_dev->dev;
struct adreno_context *drawctxt = ADRENO_CONTEXT(context);
- int ret;
+ int ret = 0;
/* Needs to hold the device mutex */
BUG_ON(!mutex_is_locked(&device->mutex));
@@ -298,6 +296,15 @@
goto done;
}
+ /*
+ * If the context is invalid then return immediately - we may end up
+ * waiting for a timestamp that will never come
+ */
+ if (drawctxt->state == ADRENO_CONTEXT_STATE_INVALID) {
+ kgsl_context_put(context);
+ goto done;
+ }
+
trace_adreno_drawctxt_wait_start(KGSL_MEMSTORE_GLOBAL, timestamp);
ret = kgsl_add_event(device, KGSL_MEMSTORE_GLOBAL, timestamp,
@@ -310,8 +317,8 @@
mutex_unlock(&device->mutex);
if (timeout) {
- ret = (int) wait_event_interruptible_timeout(drawctxt->waiting,
- _check_global_timestamp(device, timestamp),
+ ret = (int) wait_event_timeout(drawctxt->waiting,
+ _check_global_timestamp(device, drawctxt, timestamp),
msecs_to_jiffies(timeout));
if (ret == 0)
@@ -319,8 +326,8 @@
else if (ret > 0)
ret = 0;
} else {
- ret = (int) wait_event_interruptible(drawctxt->waiting,
- _check_global_timestamp(device, timestamp));
+ wait_event(drawctxt->waiting,
+ _check_global_timestamp(device, drawctxt, timestamp));
}
mutex_lock(&device->mutex);
@@ -386,8 +393,8 @@
mutex_unlock(&drawctxt->mutex);
/* Give the bad news to everybody waiting around */
- wake_up_interruptible_all(&drawctxt->waiting);
- wake_up_interruptible_all(&drawctxt->wq);
+ wake_up_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->wq);
}
/**
@@ -425,11 +432,13 @@
KGSL_CONTEXT_PER_CONTEXT_TS |
KGSL_CONTEXT_USER_GENERATED_TS |
KGSL_CONTEXT_NO_FAULT_TOLERANCE |
- KGSL_CONTEXT_TYPE_MASK);
+ KGSL_CONTEXT_TYPE_MASK |
+ KGSL_CONTEXT_PWR_CONSTRAINT);
/* Always enable per-context timestamps */
drawctxt->base.flags |= KGSL_CONTEXT_PER_CONTEXT_TS;
-
+ drawctxt->type = (drawctxt->base.flags & KGSL_CONTEXT_TYPE_MASK)
+ >> KGSL_CONTEXT_TYPE_SHIFT;
mutex_init(&drawctxt->mutex);
init_waitqueue_head(&drawctxt->wq);
init_waitqueue_head(&drawctxt->waiting);
@@ -543,6 +552,14 @@
ret = adreno_drawctxt_wait_global(adreno_dev, context,
drawctxt->internal_timestamp, 10 * 1000);
+ /*
+ * If the wait for global fails then nothing after this point is likely
+ * to work very well - BUG_ON() so we can take advantage of the debug
+ * tools to figure out what the h - e - double hockey sticks happened
+ */
+
+ BUG_ON(ret);
+
kgsl_sharedmem_writel(device, &device->memstore,
KGSL_MEMSTORE_OFFSET(context->id, soptimestamp),
drawctxt->timestamp);
@@ -557,8 +574,8 @@
drawctxt->ops->detach(drawctxt);
/* wake threads waiting to submit commands from this context */
- wake_up_interruptible_all(&drawctxt->waiting);
- wake_up_interruptible_all(&drawctxt->wq);
+ wake_up_all(&drawctxt->waiting);
+ wake_up_all(&drawctxt->wq);
return ret;
}
diff --git a/drivers/gpu/msm/adreno_profile.c b/drivers/gpu/msm/adreno_profile.c
index 079e120..26c8b69 100644
--- a/drivers/gpu/msm/adreno_profile.c
+++ b/drivers/gpu/msm/adreno_profile.c
@@ -1074,9 +1074,6 @@
*/
transfer_results(device, shared_buf_tail);
- /* check for any cleanup */
- check_close_profile(profile);
-
return 1;
}
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index 1383a20..7bbbc35 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2002,2007-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -665,7 +665,8 @@
total_sizedwords += (flags & KGSL_CMD_FLAGS_INTERNAL_ISSUE) ? 2 : 0;
/* Add two dwords for the CP_INTERRUPT */
- total_sizedwords += drawctxt ? 2 : 0;
+ total_sizedwords +=
+ (drawctxt || (flags & KGSL_CMD_FLAGS_INTERNAL_ISSUE)) ? 2 : 0;
if (adreno_is_a3xx(adreno_dev))
total_sizedwords += 7;
@@ -695,7 +696,7 @@
/* Add space for the power on shader fixup if we need it */
if (flags & KGSL_CMD_FLAGS_PWRON_FIXUP)
- total_sizedwords += 5;
+ total_sizedwords += 9;
ringcmds = adreno_ringbuffer_allocspace(rb, drawctxt, total_sizedwords);
@@ -717,6 +718,11 @@
}
if (flags & KGSL_CMD_FLAGS_PWRON_FIXUP) {
+ /* Disable protected mode for the fixup */
+ GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu,
+ cp_type3_packet(CP_SET_PROTECTED_MODE, 1));
+ GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu, 0);
+
GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu, cp_nop_packet(1));
GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu,
KGSL_PWRON_FIXUP_IDENTIFIER);
@@ -726,6 +732,11 @@
adreno_dev->pwron_fixup.gpuaddr);
GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu,
adreno_dev->pwron_fixup_dwords);
+
+ /* Re-enable protected mode */
+ GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu,
+ cp_type3_packet(CP_SET_PROTECTED_MODE, 1));
+ GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu, 1);
}
/* Add any IB required for profiling if it is enabled */
@@ -1131,6 +1142,67 @@
return ret;
}
+unsigned int adreno_ringbuffer_get_constraint(struct kgsl_device *device,
+ struct kgsl_context *context)
+{
+ unsigned int pwrlevel = device->pwrctrl.active_pwrlevel;
+
+ switch (context->pwr_constraint.type) {
+ case KGSL_CONSTRAINT_PWRLEVEL: {
+ switch (context->pwr_constraint.sub_type) {
+ case KGSL_CONSTRAINT_PWR_MAX:
+ pwrlevel = device->pwrctrl.max_pwrlevel;
+ break;
+ case KGSL_CONSTRAINT_PWR_MIN:
+ pwrlevel = device->pwrctrl.min_pwrlevel;
+ break;
+ default:
+ break;
+ }
+ }
+ break;
+
+ }
+
+ return pwrlevel;
+}
+
+void adreno_ringbuffer_set_constraint(struct kgsl_device *device,
+ struct kgsl_cmdbatch *cmdbatch)
+{
+ unsigned int constraint;
+ struct kgsl_context *context = cmdbatch->context;
+ /*
+ * Check if the context has a constraint and constraint flags are
+ * set.
+ */
+ if (context->pwr_constraint.type &&
+ ((context->flags & KGSL_CONTEXT_PWR_CONSTRAINT) ||
+ (cmdbatch->flags & KGSL_CONTEXT_PWR_CONSTRAINT))) {
+
+ constraint = adreno_ringbuffer_get_constraint(device, context);
+
+ /*
+ * If a constraint is already set, set a new
+ * constraint only if it is faster
+ */
+ if ((device->pwrctrl.constraint.type ==
+ KGSL_CONSTRAINT_NONE) || (constraint <
+ device->pwrctrl.constraint.hint.pwrlevel.level)) {
+
+ kgsl_pwrctrl_pwrlevel_change(device, constraint);
+ device->pwrctrl.constraint.type =
+ context->pwr_constraint.type;
+ device->pwrctrl.constraint.hint.
+ pwrlevel.level = constraint;
+ }
+
+ device->pwrctrl.constraint.expires = jiffies +
+ device->pwrctrl.interval_timeout;
+ }
+
+}
+
/* adreno_rindbuffer_submitcmd - submit userspace IBs to the GPU */
int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,
struct kgsl_cmdbatch *cmdbatch)
@@ -1241,6 +1313,9 @@
test_bit(ADRENO_DEVICE_PWRON_FIXUP, &adreno_dev->priv))
flags |= KGSL_CMD_FLAGS_PWRON_FIXUP;
+ /* Set the constraints before adding to ringbuffer */
+ adreno_ringbuffer_set_constraint(device, cmdbatch);
+
ret = adreno_ringbuffer_addcmds(&adreno_dev->ringbuffer,
drawctxt,
flags,
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 770335d..11b7429 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -45,6 +45,10 @@
#undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX "kgsl."
+#ifndef arch_mmap_check
+#define arch_mmap_check(addr, len, flags) (0)
+#endif
+
static int kgsl_pagetable_count = KGSL_PAGETABLE_COUNT;
static char *ksgl_mmu_type;
module_param_named(ptcount, kgsl_pagetable_count, int, 0);
@@ -1375,8 +1379,8 @@
if (dev_priv->device->ftbl->setproperty)
result = dev_priv->device->ftbl->setproperty(
- dev_priv->device, param->type,
- param->value, param->sizebytes);
+ dev_priv, param->type, param->value,
+ param->sizebytes);
return result;
}
@@ -1458,7 +1462,7 @@
* @timestamp: Pending timestamp for the event
* @handle: Pointer to a sync fence handle
* @device: Pointer to the KGSL device
- * @lock: Spin lock to protect the sync event list
+ * @refcount: Allow event to be destroyed asynchronously
*/
struct kgsl_cmdbatch_sync_event {
int type;
@@ -1468,10 +1472,37 @@
unsigned int timestamp;
struct kgsl_sync_fence_waiter *handle;
struct kgsl_device *device;
- spinlock_t lock;
+ struct kref refcount;
};
/**
+ * kgsl_cmdbatch_sync_event_destroy() - Destroy a sync event object
+ * @kref: Pointer to the kref structure for this object
+ *
+ * Actually destroy a sync event object. Called from
+ * kgsl_cmdbatch_sync_event_put.
+ */
+static void kgsl_cmdbatch_sync_event_destroy(struct kref *kref)
+{
+ struct kgsl_cmdbatch_sync_event *event = container_of(kref,
+ struct kgsl_cmdbatch_sync_event, refcount);
+
+ kgsl_cmdbatch_put(event->cmdbatch);
+ kfree(event);
+}
+
+/**
+ * kgsl_cmdbatch_sync_event_put() - Decrement the refcount for a
+ * sync event object
+ * @event: Pointer to the sync event object
+ */
+static inline void kgsl_cmdbatch_sync_event_put(
+ struct kgsl_cmdbatch_sync_event *event)
+{
+ kref_put(&event->refcount, kgsl_cmdbatch_sync_event_destroy);
+}
+
+/**
* kgsl_cmdbatch_destroy_object() - Destroy a cmdbatch object
* @kref: Pointer to the kref structure for this object
*
@@ -1496,10 +1527,25 @@
static void kgsl_cmdbatch_sync_expire(struct kgsl_device *device,
struct kgsl_cmdbatch_sync_event *event)
{
+ struct kgsl_cmdbatch_sync_event *e, *tmp;
int sched = 0;
+ int removed = 0;
spin_lock(&event->cmdbatch->lock);
- list_del(&event->node);
+
+ /*
+ * sync events that are contained by a cmdbatch which has been
+ * destroyed may have already been removed from the synclist
+ */
+
+ list_for_each_entry_safe(e, tmp, &event->cmdbatch->synclist, node) {
+ if (e == event) {
+ list_del_init(&event->node);
+ removed = 1;
+ break;
+ }
+ }
+
sched = list_empty(&event->cmdbatch->synclist) ? 1 : 0;
spin_unlock(&event->cmdbatch->lock);
@@ -1510,6 +1556,10 @@
if (sched && device->ftbl->drawctxt_sched)
device->ftbl->drawctxt_sched(device, event->cmdbatch->context);
+
+ /* Put events that have been removed from the synclist */
+ if (removed)
+ kgsl_cmdbatch_sync_event_put(event);
}
@@ -1523,11 +1573,9 @@
struct kgsl_cmdbatch_sync_event *event = priv;
kgsl_cmdbatch_sync_expire(device, event);
-
kgsl_context_put(event->context);
- kgsl_cmdbatch_put(event->cmdbatch);
-
- kfree(event);
+ /* Put events that have signaled */
+ kgsl_cmdbatch_sync_event_put(event);
}
/**
@@ -1535,32 +1583,48 @@
* @cmdbatch: Pointer to the command batch object to destroy
*
* Start the process of destroying a command batch. Cancel any pending events
- * and decrement the refcount.
+ * and decrement the refcount. Asynchronous events can still signal after
+ * kgsl_cmdbatch_destroy has returned.
*/
void kgsl_cmdbatch_destroy(struct kgsl_cmdbatch *cmdbatch)
{
struct kgsl_cmdbatch_sync_event *event, *tmp;
+ LIST_HEAD(cancel_synclist);
+ /*
+ * Empty the synclist before canceling events
+ */
spin_lock(&cmdbatch->lock);
+ list_splice_init(&cmdbatch->synclist, &cancel_synclist);
+ spin_unlock(&cmdbatch->lock);
- /* Delete any pending sync points for this command batch */
- list_for_each_entry_safe(event, tmp, &cmdbatch->synclist, node) {
+ /*
+ * Finish canceling events outside the cmdbatch spinlock and
+ * require the cancel function to return if the event was
+ * successfully canceled meaning that the event is guaranteed
+ * not to signal the callback. This guarantee ensures that
+ * the reference count for the event and cmdbatch is correct.
+ */
+ list_for_each_entry_safe(event, tmp, &cancel_synclist, node) {
if (event->type == KGSL_CMD_SYNCPOINT_TYPE_TIMESTAMP) {
- /* Cancel the event if it still exists */
+ /*
+ * Timestamp events are guaranteed to signal
+ * when canceled
+ */
kgsl_cancel_event(cmdbatch->device, event->context,
event->timestamp, kgsl_cmdbatch_sync_func,
event);
} else if (event->type == KGSL_CMD_SYNCPOINT_TYPE_FENCE) {
- if (kgsl_sync_fence_async_cancel(event->handle)) {
- list_del(&event->node);
- kfree(event);
- kgsl_cmdbatch_put(cmdbatch);
- }
+ /* Put events that are successfully canceled */
+ if (kgsl_sync_fence_async_cancel(event->handle))
+ kgsl_cmdbatch_sync_event_put(event);
}
- }
- spin_unlock(&cmdbatch->lock);
+ /* Put events that have been removed from the synclist */
+ list_del_init(&event->node);
+ kgsl_cmdbatch_sync_event_put(event);
+ }
kgsl_cmdbatch_put(cmdbatch);
}
EXPORT_SYMBOL(kgsl_cmdbatch_destroy);
@@ -1573,11 +1637,9 @@
{
struct kgsl_cmdbatch_sync_event *event = priv;
- spin_lock(&event->lock);
kgsl_cmdbatch_sync_expire(event->device, event);
- kgsl_cmdbatch_put(event->cmdbatch);
- spin_unlock(&event->lock);
- kfree(event);
+ /* Put events that have signaled */
+ kgsl_cmdbatch_sync_event_put(event);
}
/* kgsl_cmdbatch_add_sync_fence() - Add a new sync fence syncpoint
@@ -1603,28 +1665,33 @@
event->type = KGSL_CMD_SYNCPOINT_TYPE_FENCE;
event->cmdbatch = cmdbatch;
event->device = device;
- spin_lock_init(&event->lock);
+ event->context = NULL;
+
+ /*
+ * Initial kref is to ensure async callback does not free the
+ * event before this function sets the event handle
+ */
+ kref_init(&event->refcount);
/*
* Add it to the list first to account for the possiblity that the
* callback will happen immediately after the call to
- * kgsl_sync_fence_async_wait
+ * kgsl_sync_fence_async_wait. Decrement the event refcount when
+ * removing from the synclist.
*/
spin_lock(&cmdbatch->lock);
+ kref_get(&event->refcount);
list_add(&event->node, &cmdbatch->synclist);
spin_unlock(&cmdbatch->lock);
/*
- * There is a distinct race condition that can occur if the fence
- * callback is fired before the function has a chance to return. The
- * event struct would be freed before we could write event->handle and
- * hilarity ensued. Protect against this by protecting the call to
- * kgsl_sync_fence_async_wait and the kfree in the callback with a lock.
+ * Increment the reference count for the async callback.
+ * Decrement when the callback is successfully canceled, when
+ * the callback is signaled or if the async wait fails.
*/
- spin_lock(&event->lock);
-
+ kref_get(&event->refcount);
event->handle = kgsl_sync_fence_async_wait(sync->fd,
kgsl_cmdbatch_sync_fence_func, event);
@@ -1632,18 +1699,27 @@
if (IS_ERR_OR_NULL(event->handle)) {
int ret = PTR_ERR(event->handle);
+ /* Failed to add the event to the async callback */
+ kgsl_cmdbatch_sync_event_put(event);
+
+ /* Remove event from the synclist */
spin_lock(&cmdbatch->lock);
list_del(&event->node);
+ kgsl_cmdbatch_sync_event_put(event);
spin_unlock(&cmdbatch->lock);
- kgsl_cmdbatch_put(cmdbatch);
- spin_unlock(&event->lock);
- kfree(event);
+ /* Event no longer needed by this function */
+ kgsl_cmdbatch_sync_event_put(event);
return ret;
}
- spin_unlock(&event->lock);
+ /*
+ * Event was successfully added to the synclist, the async
+ * callback and handle to cancel event has been set.
+ */
+ kgsl_cmdbatch_sync_event_put(event);
+
return 0;
}
@@ -1698,6 +1774,17 @@
event->context = context;
event->timestamp = sync->timestamp;
+ /*
+ * Two krefs are required to support events. The first kref is for
+ * the synclist which holds the event in the cmdbatch. The second
+ * kref is for the callback which can be asynchronous and be called
+ * after kgsl_cmdbatch_destroy. The kref should be put when the event
+ * is removed from the synclist, if the callback is successfully
+ * canceled or when the callback is signaled.
+ */
+ kref_init(&event->refcount);
+ kref_get(&event->refcount);
+
spin_lock(&cmdbatch->lock);
list_add(&event->node, &cmdbatch->synclist);
spin_unlock(&cmdbatch->lock);
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index 7fc6fae..7d009ce 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2002,2007-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -129,7 +129,7 @@
void (*drawctxt_destroy) (struct kgsl_context *context);
long (*ioctl) (struct kgsl_device_private *dev_priv,
unsigned int cmd, void *data);
- int (*setproperty) (struct kgsl_device *device,
+ int (*setproperty) (struct kgsl_device_private *dev_priv,
enum kgsl_property_type type, void *value,
unsigned int sizebytes);
int (*postmortem_dump) (struct kgsl_device *device, int manual);
@@ -349,6 +349,7 @@
* @pagefault_ts: global timestamp of the pagefault, if KGSL_CONTEXT_PAGEFAULT
* is set.
* @flags: flags from userspace controlling the behavior of this context
+ * @pwr_constraint: power constraint from userspace for this context
*/
struct kgsl_context {
struct kref refcount;
@@ -366,6 +367,7 @@
struct list_head events_list;
unsigned int pagefault_ts;
unsigned int flags;
+ struct kgsl_pwr_constraint pwr_constraint;
};
/**
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index 8453b9d..2af8d27 100755
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -461,7 +461,7 @@
* Disables iommu clocks
* Return - void
*/
-static void kgsl_iommu_disable_clk(struct kgsl_mmu *mmu)
+static void kgsl_iommu_disable_clk(struct kgsl_mmu *mmu, int ctx_id)
{
struct kgsl_iommu *iommu = mmu->priv;
struct msm_iommu_drvdata *iommu_drvdata;
@@ -470,8 +470,15 @@
for (i = 0; i < iommu->unit_count; i++) {
struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
for (j = 0; j < iommu_unit->dev_count; j++) {
- if (!iommu_unit->dev[j].clk_enabled)
+ if (ctx_id != iommu_unit->dev[j].ctx_id)
continue;
+ atomic_dec(&iommu_unit->dev[j].clk_enable_count);
+ BUG_ON(
+ atomic_read(&iommu_unit->dev[j].clk_enable_count) < 0);
+ /*
+ * the clock calls have a refcount so call them on every
+ * enable/disable call
+ */
iommu_drvdata = dev_get_drvdata(
iommu_unit->dev[j].dev->parent);
if (iommu_drvdata->aclk)
@@ -479,7 +486,6 @@
if (iommu_drvdata->clk)
clk_disable_unprepare(iommu_drvdata->clk);
clk_disable_unprepare(iommu_drvdata->pclk);
- iommu_unit->dev[j].clk_enabled = false;
}
}
}
@@ -500,32 +506,14 @@
unsigned int id, unsigned int ts,
u32 type)
{
- struct kgsl_mmu *mmu = data;
- struct kgsl_iommu *iommu = mmu->priv;
+ struct kgsl_iommu_disable_clk_param *param = data;
- if (!iommu->clk_event_queued) {
- if (0 > timestamp_cmp(ts, iommu->iommu_last_cmd_ts))
- KGSL_DRV_ERR(device,
- "IOMMU disable clock event being cancelled, "
- "iommu_last_cmd_ts: %x, retired ts: %x\n",
- iommu->iommu_last_cmd_ts, ts);
- return;
- }
-
- if (0 <= timestamp_cmp(ts, iommu->iommu_last_cmd_ts)) {
- kgsl_iommu_disable_clk(mmu);
- iommu->clk_event_queued = false;
- } else {
- /* add new event to fire when ts is reached, this can happen
- * if we queued an event and someone requested the clocks to
- * be disbaled on a later timestamp */
- if (kgsl_add_event(device, id, iommu->iommu_last_cmd_ts,
- kgsl_iommu_clk_disable_event, mmu, mmu)) {
- KGSL_DRV_ERR(device,
- "Failed to add IOMMU disable clk event\n");
- iommu->clk_event_queued = false;
- }
- }
+ if ((0 <= timestamp_cmp(ts, param->ts)) ||
+ (KGSL_EVENT_CANCELLED == type))
+ kgsl_iommu_disable_clk(param->mmu, param->ctx_id);
+ else
+ /* something went wrong with the event handling mechanism */
+ BUG_ON(1);
}
/*
@@ -535,6 +523,8 @@
* @ts_valid - Indicates whether ts parameter is valid, if this parameter
* is false then it means that the calling function wants to disable the
* IOMMU clocks immediately without waiting for any timestamp
+ * @ctx_id: Context id of the IOMMU context for which clocks are to be
+ * turned off
*
* Creates an event to disable the IOMMU clocks on timestamp and if event
* already exists then updates the timestamp of disabling the IOMMU clocks
@@ -543,28 +533,25 @@
* Return - void
*/
static void
-kgsl_iommu_disable_clk_on_ts(struct kgsl_mmu *mmu, unsigned int ts,
- bool ts_valid)
+kgsl_iommu_disable_clk_on_ts(struct kgsl_mmu *mmu,
+ unsigned int ts, int ctx_id)
{
- struct kgsl_iommu *iommu = mmu->priv;
+ struct kgsl_iommu_disable_clk_param *param;
- if (iommu->clk_event_queued) {
- if (ts_valid && (0 <
- timestamp_cmp(ts, iommu->iommu_last_cmd_ts)))
- iommu->iommu_last_cmd_ts = ts;
- } else {
- if (ts_valid) {
- iommu->iommu_last_cmd_ts = ts;
- iommu->clk_event_queued = true;
- if (kgsl_add_event(mmu->device, KGSL_MEMSTORE_GLOBAL,
- ts, kgsl_iommu_clk_disable_event, mmu, mmu)) {
- KGSL_DRV_ERR(mmu->device,
- "Failed to add IOMMU disable clk event\n");
- iommu->clk_event_queued = false;
- }
- } else {
- kgsl_iommu_disable_clk(mmu);
- }
+ param = kzalloc(sizeof(*param), GFP_KERNEL);
+ if (!param) {
+ KGSL_CORE_ERR("kzalloc(%d) failed\n", sizeof(*param));
+ return;
+ }
+ param->mmu = mmu;
+ param->ctx_id = ctx_id;
+ param->ts = ts;
+
+ if (kgsl_add_event(mmu->device, KGSL_MEMSTORE_GLOBAL,
+ ts, kgsl_iommu_clk_disable_event, param, mmu)) {
+ KGSL_DRV_ERR(mmu->device,
+ "Failed to add IOMMU disable clk event\n");
+ kfree(param);
}
}
@@ -587,8 +574,7 @@
for (i = 0; i < iommu->unit_count; i++) {
struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
for (j = 0; j < iommu_unit->dev_count; j++) {
- if (iommu_unit->dev[j].clk_enabled ||
- ctx_id != iommu_unit->dev[j].ctx_id)
+ if (ctx_id != iommu_unit->dev[j].ctx_id)
continue;
iommu_drvdata =
dev_get_drvdata(iommu_unit->dev[j].dev->parent);
@@ -614,12 +600,25 @@
goto done;
}
}
- iommu_unit->dev[j].clk_enabled = true;
+ atomic_inc(&iommu_unit->dev[j].clk_enable_count);
}
}
done:
- if (ret)
- kgsl_iommu_disable_clk(mmu);
+ if (ret) {
+ struct kgsl_iommu_unit *iommu_unit;
+ if (iommu->unit_count == i)
+ i--;
+ iommu_unit = &iommu->iommu_units[i];
+ do {
+ for (j--; j >= 0; j--)
+ kgsl_iommu_disable_clk(mmu, ctx_id);
+ i--;
+ if (i >= 0) {
+ iommu_unit = &iommu->iommu_units[i];
+ j = iommu_unit->dev_count;
+ }
+ } while (i >= 0);
+ }
return ret;
}
@@ -848,6 +847,9 @@
ret = -EINVAL;
goto done;
}
+ atomic_set(
+ &(iommu_unit->dev[iommu_unit->dev_count].clk_enable_count),
+ 0);
iommu_unit->dev[iommu_unit->dev_count].dev =
msm_iommu_get_ctx(data->iommu_ctxs[i].iommu_ctx_name);
@@ -1490,7 +1492,7 @@
/* If chip is not 8960 then we use the 2nd context bank for pagetable
* switching on the 3D side for which a separate table is allocated */
- if (!cpu_is_msm8960() && msm_soc_version_supports_iommu_v0()) {
+ if (msm_soc_version_supports_iommu_v0()) {
mmu->priv_bank_table =
kgsl_mmu_getpagetable(mmu,
KGSL_MMU_PRIV_BANK_TABLE_NAME);
@@ -1674,6 +1676,7 @@
}
status = kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_PRIV);
if (status) {
+ kgsl_iommu_disable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
KGSL_CORE_ERR("clk enable failed\n");
goto done;
}
@@ -1728,14 +1731,11 @@
KGSL_IOMMU_SETSTATE_NOP_OFFSET,
cp_nop_packet(1), sizeof(unsigned int));
- kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
+ kgsl_iommu_disable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
+ kgsl_iommu_disable_clk(mmu, KGSL_IOMMU_CONTEXT_PRIV);
mmu->flags |= KGSL_FLAGS_STARTED;
done:
- if (status) {
- kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
- kgsl_detach_pagetable_iommu_domain(mmu);
- }
return status;
}
@@ -1858,6 +1858,7 @@
iommu_unit,
iommu_unit->dev[j].ctx_id,
FSR, 0);
+ kgsl_iommu_disable_clk(mmu, j);
_iommu_unlock(iommu);
iommu_unit->dev[j].fault = 0;
}
@@ -1870,7 +1871,6 @@
static void kgsl_iommu_stop(struct kgsl_mmu *mmu)
{
- struct kgsl_iommu *iommu = mmu->priv;
/*
* stop device mmu
*
@@ -1886,9 +1886,7 @@
kgsl_iommu_pagefault_resume(mmu);
}
/* switch off MMU clocks and cancel any events it has queued */
- iommu->clk_event_queued = false;
kgsl_cancel_events(mmu->device, mmu);
- kgsl_iommu_disable_clk(mmu);
}
static int kgsl_iommu_close(struct kgsl_mmu *mmu)
@@ -1938,10 +1936,10 @@
return 0;
/* Return the current pt base by reading IOMMU pt_base register */
kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
- pt_base = KGSL_IOMMU_GET_CTX_REG(iommu, (&iommu->iommu_units[0]),
- KGSL_IOMMU_CONTEXT_USER,
- TTBR0);
- kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
+ pt_base = KGSL_IOMMU_GET_CTX_REG(iommu,
+ (&iommu->iommu_units[0]),
+ KGSL_IOMMU_CONTEXT_USER, TTBR0);
+ kgsl_iommu_disable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
return pt_base & KGSL_IOMMU_CTX_TTBR0_ADDR_MASK;
}
@@ -1969,7 +1967,6 @@
phys_addr_t pt_val;
ret = kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
-
if (ret) {
KGSL_DRV_ERR(mmu->device, "Failed to enable iommu clocks\n");
return ret;
@@ -2056,7 +2053,7 @@
_iommu_unlock(iommu);
/* Disable smmu clock */
- kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
+ kgsl_iommu_disable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
return ret;
}
@@ -2103,6 +2100,72 @@
return iommu->unit_count;
}
+/*
+ * kgsl_iommu_set_pf_policy() - Set the pagefault policy for IOMMU
+ * @mmu: Pointer to mmu structure
+ * @pf_policy: The pagefault polict to set
+ *
+ * Check if the new policy indicated by pf_policy is same as current
+ * policy, if same then return else set the policy
+ */
+static int kgsl_iommu_set_pf_policy(struct kgsl_mmu *mmu,
+ unsigned int pf_policy)
+{
+ int i, j;
+ struct kgsl_iommu *iommu = mmu->priv;
+ struct adreno_device *adreno_dev = ADRENO_DEVICE(mmu->device);
+ int ret = 0;
+ unsigned int sctlr_val;
+
+ if ((adreno_dev->ft_pf_policy & KGSL_FT_PAGEFAULT_GPUHALT_ENABLE) ==
+ (pf_policy & KGSL_FT_PAGEFAULT_GPUHALT_ENABLE))
+ return ret;
+ if (msm_soc_version_supports_iommu_v0())
+ return ret;
+
+ ret = kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_USER);
+
+ if (ret) {
+ KGSL_DRV_ERR(mmu->device, "Failed to enable iommu clocks\n");
+ return ret;
+ }
+ ret = kgsl_iommu_enable_clk(mmu, KGSL_IOMMU_CONTEXT_PRIV);
+
+ if (ret) {
+ KGSL_DRV_ERR(mmu->device, "Failed to enable iommu clocks\n");
+ kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
+ return ret;
+ }
+ /* Need to idle device before changing options */
+ ret = mmu->device->ftbl->idle(mmu->device);
+ if (ret) {
+ kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
+ return ret;
+ }
+
+ for (i = 0; i < iommu->unit_count; i++) {
+ struct kgsl_iommu_unit *iommu_unit = &iommu->iommu_units[i];
+ for (j = 0; j < iommu_unit->dev_count; j++) {
+ sctlr_val = KGSL_IOMMU_GET_CTX_REG(iommu,
+ iommu_unit,
+ iommu_unit->dev[j].ctx_id,
+ SCTLR);
+ if (pf_policy & KGSL_FT_PAGEFAULT_GPUHALT_ENABLE)
+ sctlr_val &= ~(0x1 <<
+ KGSL_IOMMU_SCTLR_HUPCF_SHIFT);
+ else
+ sctlr_val |= (0x1 <<
+ KGSL_IOMMU_SCTLR_HUPCF_SHIFT);
+ KGSL_IOMMU_SET_CTX_REG(iommu,
+ iommu_unit,
+ iommu_unit->dev[j].ctx_id,
+ SCTLR, sctlr_val);
+ }
+ }
+ kgsl_iommu_disable_clk_on_ts(mmu, 0, false);
+ return ret;
+}
+
struct kgsl_mmu_ops iommu_ops = {
.mmu_init = kgsl_iommu_init,
.mmu_close = kgsl_iommu_close,
@@ -2128,6 +2191,7 @@
.mmu_cleanup_pt = NULL,
.mmu_sync_lock = kgsl_iommu_sync_lock,
.mmu_sync_unlock = kgsl_iommu_sync_unlock,
+ .mmu_set_pf_policy = kgsl_iommu_set_pf_policy,
};
struct kgsl_mmu_pt_ops iommu_pt_ops = {
diff --git a/drivers/gpu/msm/kgsl_iommu.h b/drivers/gpu/msm/kgsl_iommu.h
index 7dca40e..3878107 100644
--- a/drivers/gpu/msm/kgsl_iommu.h
+++ b/drivers/gpu/msm/kgsl_iommu.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -143,6 +143,7 @@
* are on, else the clocks are off
* fault: Flag when set indicates that this iommu device has caused a page
* fault
+ * @clk_enable_count: The ref count of clock enable calls
*/
struct kgsl_iommu_device {
struct device *dev;
@@ -152,6 +153,7 @@
bool clk_enabled;
struct kgsl_device *kgsldev;
int fault;
+ atomic_t clk_enable_count;
};
/*
@@ -182,10 +184,6 @@
* iommu contexts owned by graphics cores
* @unit_count: Number of IOMMU units that are available for this
* instance of the IOMMU driver
- * @iommu_last_cmd_ts: The timestamp of last command submitted that
- * aceeses iommu registers
- * @clk_event_queued: Indicates whether an event to disable clocks
- * is already queued or not
* @device: Pointer to kgsl device
* @ctx_offset: The context offset to be added to base address when
* accessing IOMMU registers
@@ -201,8 +199,6 @@
struct kgsl_iommu {
struct kgsl_iommu_unit iommu_units[KGSL_IOMMU_MAX_UNITS];
unsigned int unit_count;
- unsigned int iommu_last_cmd_ts;
- bool clk_event_queued;
struct kgsl_device *device;
unsigned int ctx_offset;
struct kgsl_iommu_register_list *iommu_reg_list;
@@ -222,4 +218,18 @@
struct kgsl_iommu *iommu;
};
+/*
+ * struct kgsl_iommu_disable_clk_param - Parameter struct for disble clk event
+ * @mmu: The mmu pointer
+ * @rb_level: the rb level in which the timestamp of the event belongs to
+ * @ctx_id: The IOMMU context whose clock is to be turned off
+ * @ts: Timestamp on which clock is to be disabled
+ */
+struct kgsl_iommu_disable_clk_param {
+ struct kgsl_mmu *mmu;
+ int rb_level;
+ int ctx_id;
+ unsigned int ts;
+};
+
#endif
diff --git a/drivers/gpu/msm/kgsl_mmu.h b/drivers/gpu/msm/kgsl_mmu.h
index 8bc9962..5e3386a 100644
--- a/drivers/gpu/msm/kgsl_mmu.h
+++ b/drivers/gpu/msm/kgsl_mmu.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2002,2007-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -144,11 +144,12 @@
void (*mmu_pagefault_resume)
(struct kgsl_mmu *mmu);
void (*mmu_disable_clk_on_ts)
- (struct kgsl_mmu *mmu, uint32_t ts, bool ts_valid);
+ (struct kgsl_mmu *mmu,
+ uint32_t ts, int ctx_id);
int (*mmu_enable_clk)
(struct kgsl_mmu *mmu, int ctx_id);
void (*mmu_disable_clk)
- (struct kgsl_mmu *mmu);
+ (struct kgsl_mmu *mmu, int ctx_id);
phys_addr_t (*mmu_get_default_ttbr0)(struct kgsl_mmu *mmu,
unsigned int unit_id,
enum kgsl_iommu_context_id ctx_id);
@@ -173,6 +174,7 @@
unsigned int (*mmu_sync_unlock)
(struct kgsl_mmu *mmu, unsigned int *cmds);
int (*mmu_hw_halt_supported)(struct kgsl_mmu *mmu, int iommu_unit_num);
+ int (*mmu_set_pf_policy)(struct kgsl_mmu *mmu, unsigned int pf_policy);
};
struct kgsl_mmu_pt_ops {
@@ -326,17 +328,18 @@
return 0;
}
-static inline void kgsl_mmu_disable_clk(struct kgsl_mmu *mmu)
+static inline void kgsl_mmu_disable_clk(struct kgsl_mmu *mmu, int ctx_id)
{
if (mmu->mmu_ops && mmu->mmu_ops->mmu_disable_clk)
- mmu->mmu_ops->mmu_disable_clk(mmu);
+ mmu->mmu_ops->mmu_disable_clk(mmu, ctx_id);
}
static inline void kgsl_mmu_disable_clk_on_ts(struct kgsl_mmu *mmu,
- unsigned int ts, bool ts_valid)
+ unsigned int ts,
+ int ctx_id)
{
if (mmu->mmu_ops && mmu->mmu_ops->mmu_disable_clk_on_ts)
- mmu->mmu_ops->mmu_disable_clk_on_ts(mmu, ts, ts_valid);
+ mmu->mmu_ops->mmu_disable_clk_on_ts(mmu, ts, ctx_id);
}
static inline unsigned int kgsl_mmu_get_int_mask(void)
@@ -477,4 +480,13 @@
return 0;
}
+static inline int kgsl_mmu_set_pagefault_policy(struct kgsl_mmu *mmu,
+ unsigned int pf_policy)
+{
+ if (mmu->mmu_ops && mmu->mmu_ops->mmu_set_pf_policy)
+ return mmu->mmu_ops->mmu_set_pf_policy(mmu, pf_policy);
+ else
+ return 0;
+}
+
#endif /* __KGSL_MMU_H */
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 96ff1b8..5c7e7b8 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -1430,8 +1430,6 @@
break;
}
- kgsl_mmu_disable_clk_on_ts(&device->mmu, 0, false);
-
return 0;
}
@@ -1571,7 +1569,10 @@
struct kgsl_pwrctrl *pwr = &device->pwrctrl;
/* Order pwrrail/clk sequence based upon platform */
kgsl_pwrctrl_pwrrail(device, KGSL_PWRFLAGS_ON);
- kgsl_pwrctrl_pwrlevel_change(device, pwr->active_pwrlevel);
+
+ if (pwr->constraint.type == KGSL_CONSTRAINT_NONE)
+ kgsl_pwrctrl_pwrlevel_change(device, pwr->active_pwrlevel);
+
kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_ON, KGSL_STATE_ACTIVE);
kgsl_pwrctrl_axi(device, KGSL_PWRFLAGS_ON);
}
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.h b/drivers/gpu/msm/kgsl_pwrctrl.h
index 6ec809d..31c5229 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.h
+++ b/drivers/gpu/msm/kgsl_pwrctrl.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,9 @@
#define KGSL_MAX_CLKS 6
+/* Only two supported levels, min & max */
+#define KGSL_CONSTRAINT_PWR_MAXLEVELS 2
+
struct platform_device;
struct kgsl_clk_stats {
@@ -40,6 +43,17 @@
unsigned int elapsed_old;
};
+struct kgsl_pwr_constraint {
+ unsigned int type;
+ unsigned int sub_type;
+ union {
+ struct {
+ unsigned int level;
+ } pwrlevel;
+ } hint;
+ unsigned long expires;
+};
+
/**
* struct kgsl_pwrctrl - Power control settings for a KGSL device
* @interrupt_num - The interrupt number for the device
@@ -67,6 +81,7 @@
* @bus_control - true if the bus calculation is independent
* @bus_index - default bus index into the bus_ib table
* @bus_ib - the set of unique ib requests needed for the bus calculation
+ * @constraint - currently active power constraint
*/
struct kgsl_pwrctrl {
@@ -98,6 +113,7 @@
int bus_mod;
unsigned int bus_index[KGSL_MAX_PWRLEVELS];
uint64_t bus_ib[KGSL_MAX_PWRLEVELS];
+ struct kgsl_pwr_constraint constraint;
};
void kgsl_pwrctrl_irq(struct kgsl_device *device, int state);
diff --git a/drivers/gpu/msm/kgsl_pwrscale.c b/drivers/gpu/msm/kgsl_pwrscale.c
index 52732cf..0bb13a4 100644
--- a/drivers/gpu/msm/kgsl_pwrscale.c
+++ b/drivers/gpu/msm/kgsl_pwrscale.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -227,8 +227,25 @@
kgsl_pwrctrl_buslevel_update(device, true);
}
- kgsl_pwrctrl_pwrlevel_change(device, level);
- *freq = kgsl_pwrctrl_active_freq(pwr);
+ /*
+ * The power constraints need an entire interval to do their magic, so
+ * skip changing the powerlevel if the time hasn't expired yet and the
+ * new level is less than the constraint
+ */
+ if ((pwr->constraint.type != KGSL_CONSTRAINT_NONE) &&
+ (!time_after(jiffies, pwr->constraint.expires)) &&
+ (level >= pwr->constraint.hint.pwrlevel.level))
+ *freq = cur_freq;
+ else {
+ /* Change the power level */
+ kgsl_pwrctrl_pwrlevel_change(device, level);
+
+ /*Invalidate the constraint set */
+ pwr->constraint.type = KGSL_CONSTRAINT_NONE;
+ pwr->constraint.expires = 0;
+
+ *freq = kgsl_pwrctrl_active_freq(pwr);
+ }
mutex_unlock(&device->mutex);
return 0;
diff --git a/drivers/hwmon/qpnp-adc-current.c b/drivers/hwmon/qpnp-adc-current.c
index 32c94dc..067a887 100644
--- a/drivers/hwmon/qpnp-adc-current.c
+++ b/drivers/hwmon/qpnp-adc-current.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -129,6 +129,12 @@
#define QPNP_BIT_SHIFT_8 8
#define QPNP_RSENSE_MSB_SIGN_CHECK 0x80
#define QPNP_ADC_COMPLETION_TIMEOUT HZ
+#define SMBB_BAT_IF_TRIM_CNST_RDS_MASK 0x7
+#define SMBB_BAT_IF_TRIM_CNST_RDS_MASK_CONST 2
+#define QPNP_IADC1_USR_TRIM2_ADC_FULLSCALE1_CONST 127
+#define QPNP_IADC_RSENSE_DEFAULT_VALUE 7800000
+#define QPNP_IADC_RSENSE_DEFAULT_TYPEB_GF 9000000
+#define QPNP_IADC_RSENSE_DEFAULT_TYPEB_SMIC 9700000
struct qpnp_iadc_comp {
bool ext_rsense;
@@ -143,6 +149,7 @@
struct qpnp_adc_drv *adc;
int32_t rsense;
bool external_rsense;
+ bool default_internal_rsense;
struct device *iadc_hwmon;
struct list_head list;
int64_t die_temp;
@@ -153,11 +160,20 @@
struct work_struct trigger_completion_work;
bool skip_auto_calibrations;
bool iadc_poll_eoc;
+ u16 batt_id_trim_cnst_rds;
+ int rds_trim_default_type;
+ bool rds_trim_default_check;
+ int32_t rsense_workaround_value;
struct sensor_device_attribute sens_attr[0];
};
LIST_HEAD(qpnp_iadc_device_list);
+enum qpnp_iadc_rsense_rds_workaround {
+ QPNP_IADC_RDS_DEFAULT_TYPEA,
+ QPNP_IADC_RDS_DEFAULT_TYPEB,
+};
+
static int32_t qpnp_iadc_read_reg(struct qpnp_iadc_chip *iadc,
uint32_t reg, u8 *data)
{
@@ -573,6 +589,67 @@
}
EXPORT_SYMBOL(qpnp_iadc_comp_result);
+static int qpnp_iadc_rds_trim_update_check(struct qpnp_iadc_chip *iadc)
+{
+ int rc = 0;
+ u8 trim2_val = 0, smbb_batt_trm_data = 0;
+
+ if (!iadc->rds_trim_default_check) {
+ pr_debug("No internal rds trim check needed\n");
+ return 0;
+ }
+
+ rc = qpnp_iadc_read_reg(iadc, QPNP_IADC_NOMINAL_RSENSE, &trim2_val);
+ if (rc < 0) {
+ pr_err("qpnp adc trim2_fullscale1 reg read failed %d\n", rc);
+ return rc;
+ }
+
+ rc = spmi_ext_register_readl(iadc->adc->spmi->ctrl, iadc->adc->slave,
+ iadc->batt_id_trim_cnst_rds, &smbb_batt_trm_data, 1);
+ if (rc < 0) {
+ pr_err("batt_id trim_cnst rds reg read failed %d\n", rc);
+ return rc;
+ }
+
+ pr_debug("n_trim:0x%x smb_trm:0x%x\n", trim2_val, smbb_batt_trm_data);
+
+ if (iadc->rds_trim_default_type == QPNP_IADC_RDS_DEFAULT_TYPEA) {
+ if (((smbb_batt_trm_data & SMBB_BAT_IF_TRIM_CNST_RDS_MASK) ==
+ SMBB_BAT_IF_TRIM_CNST_RDS_MASK_CONST) &&
+ (trim2_val == QPNP_IADC1_USR_TRIM2_ADC_FULLSCALE1_CONST)) {
+ iadc->rsense_workaround_value =
+ QPNP_IADC_RSENSE_DEFAULT_VALUE;
+ iadc->default_internal_rsense = true;
+ }
+ } else if (iadc->rds_trim_default_type ==
+ QPNP_IADC_RDS_DEFAULT_TYPEB) {
+ if (((smbb_batt_trm_data & SMBB_BAT_IF_TRIM_CNST_RDS_MASK) >=
+ SMBB_BAT_IF_TRIM_CNST_RDS_MASK_CONST) &&
+ (trim2_val == QPNP_IADC1_USR_TRIM2_ADC_FULLSCALE1_CONST)) {
+ iadc->rsense_workaround_value =
+ QPNP_IADC_RSENSE_DEFAULT_VALUE;
+ iadc->default_internal_rsense = true;
+ } else if (((smbb_batt_trm_data &
+ SMBB_BAT_IF_TRIM_CNST_RDS_MASK)
+ < SMBB_BAT_IF_TRIM_CNST_RDS_MASK_CONST) &&
+ (trim2_val ==
+ QPNP_IADC1_USR_TRIM2_ADC_FULLSCALE1_CONST)) {
+ if (iadc->iadc_comp.id == COMP_ID_GF) {
+ iadc->rsense_workaround_value =
+ QPNP_IADC_RSENSE_DEFAULT_TYPEB_GF;
+ iadc->default_internal_rsense = true;
+ } else if (iadc->iadc_comp.id == COMP_ID_SMIC) {
+ iadc->rsense_workaround_value =
+ QPNP_IADC_RSENSE_DEFAULT_TYPEB_SMIC;
+ iadc->default_internal_rsense = true;
+ }
+ }
+ }
+
+ return 0;
+}
+
static int32_t qpnp_iadc_comp_info(struct qpnp_iadc_chip *iadc)
{
int rc = 0;
@@ -948,6 +1025,11 @@
return rc;
}
+ if (iadc->default_internal_rsense) {
+ *rsense = iadc->rsense_workaround_value;
+ return rc;
+ }
+
rc = qpnp_iadc_read_reg(iadc, QPNP_IADC_NOMINAL_RSENSE, &rslt_rsense);
if (rc < 0) {
pr_err("qpnp adc rsense read failed with %d\n", rc);
@@ -968,6 +1050,8 @@
*rsense = QPNP_IADC_INTERNAL_RSENSE_N_OHMS_FACTOR +
(rslt_rsense * QPNP_IADC_RSENSE_LSB_N_OHMS_PER_BIT);
+ pr_debug("rsense value is %d\n", *rsense);
+
return rc;
}
EXPORT_SYMBOL(qpnp_iadc_get_rsense);
@@ -1258,6 +1342,7 @@
struct qpnp_adc_drv *adc_qpnp;
struct device_node *node = spmi->dev.of_node;
struct device_node *child;
+ struct resource *res;
int rc, count_adc_channel_list = 0, i = 0;
for_each_child_of_node(node, child)
@@ -1292,6 +1377,22 @@
return rc;
}
+ res = spmi_get_resource_byname(spmi, NULL, IORESOURCE_MEM,
+ "batt-id-trim-cnst-rds");
+ if (!res) {
+ dev_err(&spmi->dev, "failed to read batt_id trim register\n");
+ return -EINVAL;
+ }
+ iadc->batt_id_trim_cnst_rds = res->start;
+ rc = of_property_read_u32(node, "qcom,use-default-rds-trim",
+ &iadc->rds_trim_default_type);
+ if (rc)
+ pr_debug("No trim workaround needed\n");
+ else {
+ pr_debug("Use internal RDS trim workaround\n");
+ iadc->rds_trim_default_check = true;
+ }
+
iadc->vadc_dev = qpnp_get_vadc(&spmi->dev, "iadc");
if (IS_ERR(iadc->vadc_dev)) {
rc = PTR_ERR(iadc->vadc_dev);
@@ -1345,6 +1446,12 @@
goto fail;
}
+ rc = qpnp_iadc_rds_trim_update_check(iadc);
+ if (rc) {
+ dev_err(&spmi->dev, "Rds trim update failed!\n");
+ goto fail;
+ }
+
dev_set_drvdata(&spmi->dev, iadc);
list_add(&iadc->list, &qpnp_iadc_device_list);
rc = qpnp_iadc_calibrate_for_trim(iadc, true);
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 57aa835..1704105 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2009-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -22,6 +22,7 @@
#include <linux/err.h>
#include <linux/init.h>
#include <linux/i2c.h>
+#include <linux/i2c/i2c-qup.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
@@ -85,10 +86,11 @@
QUP_MX_INPUT_DONE = 1U << 11,
};
-/* I2C mini core related values */
+/* QUP_CONFIG values and flags */
enum {
I2C_MINI_CORE = 2U << 8,
I2C_N_VAL = 0xF,
+ I2C_CORE_CLK_ON_EN = BIT(13),
};
@@ -129,6 +131,12 @@
I2C_CLK_FORCED_LOW_STATE = 5,
};
+enum msm_i2c_state {
+ MSM_I2C_PM_ACTIVE,
+ MSM_I2C_PM_SUSPENDED,
+ MSM_I2C_SYS_SUSPENDING,
+ MSM_I2C_SYS_SUSPENDED,
+};
#define QUP_MAX_CLK_STATE_RETRIES 300
#define DEFAULT_CLK_RATE (19200000)
#define I2C_STATUS_CLK_STATE 13
@@ -184,8 +192,7 @@
int in_blk_sz;
int wr_sz;
struct msm_i2c_platform_data *pdata;
- int suspended;
- int pwr_state;
+ enum msm_i2c_state pwr_state;
struct mutex mlock;
void *complete;
int i2c_gpios[ARRAY_SIZE(i2c_rsrcs)];
@@ -339,22 +346,6 @@
return 0;
}
-/*
- * Before calling qup_config_core_on_en(), please make
- * sure that QuPE core is in RESET state.
- */
-static void
-qup_config_core_on_en(struct qup_i2c_dev *dev)
-{
- uint32_t status;
-
- status = readl_relaxed(dev->base + QUP_CONFIG);
- status |= BIT(13);
- writel_relaxed(status, dev->base + QUP_CONFIG);
- /* making sure that write has really gone through */
- mb();
-}
-
#define MSM_I2C_CLK_PATH_SUSPEND (0)
#define MSM_I2C_CLK_PATH_RESUME (1)
#define MSM_I2C_CLK_PATH_MAX_BW(dev) ((dev->pdata->src_clk_rate * 8) / 1000)
@@ -500,27 +491,97 @@
}
}
-static void
-qup_i2c_pwr_mgmt(struct qup_i2c_dev *dev, unsigned int state)
+static int i2c_qup_gpio_request(struct qup_i2c_dev *dev)
{
- dev->pwr_state = state;
- if (state != 0) {
- i2c_qup_clk_path_postponed_register(dev);
- if (!dev->pdata->active_only)
- i2c_qup_clk_path_vote(dev);
+ int i;
+ int result = 0;
- clk_prepare_enable(dev->clk);
- if (!dev->pdata->keep_ahb_clk_on)
- clk_prepare_enable(dev->pclk);
- } else {
- qup_update_state(dev, QUP_RESET_STATE);
- clk_disable_unprepare(dev->clk);
- qup_config_core_on_en(dev);
- if (!dev->pdata->keep_ahb_clk_on)
- clk_disable_unprepare(dev->pclk);
- if (!dev->pdata->active_only)
- i2c_qup_clk_path_unvote(dev);
+ for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
+ if (dev->i2c_gpios[i] >= 0) {
+ result = gpio_request(dev->i2c_gpios[i], i2c_rsrcs[i]);
+ if (result) {
+ dev_err(dev->dev,
+ "gpio_request for pin %d failed with error %d\n",
+ dev->i2c_gpios[i], result);
+ goto error;
+ }
+ }
}
+ return 0;
+
+error:
+ for (; --i >= 0;) {
+ if (dev->i2c_gpios[i] >= 0)
+ gpio_free(dev->i2c_gpios[i]);
+ }
+ return result;
+}
+
+static void i2c_qup_gpio_free(struct qup_i2c_dev *dev)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
+ if (dev->i2c_gpios[i] >= 0)
+ gpio_free(dev->i2c_gpios[i]);
+ }
+}
+
+static void i2c_qup_pm_suspend_clk(struct qup_i2c_dev *dev)
+{
+ uint32_t status;
+
+ /* reset core and enable conditional dynamic clock gating */
+ qup_update_state(dev, QUP_RESET_STATE);
+ status = readl_relaxed(dev->base + QUP_CONFIG);
+ status |= I2C_CORE_CLK_ON_EN;
+ writel_relaxed(status, dev->base + QUP_CONFIG);
+ /* ensure that write has really gone through */
+ mb();
+
+ clk_disable_unprepare(dev->clk);
+ if (!dev->pdata->keep_ahb_clk_on)
+ clk_disable_unprepare(dev->pclk);
+}
+
+static void i2c_qup_pm_resume_clk(struct qup_i2c_dev *dev)
+{
+ clk_prepare_enable(dev->clk);
+ if (!dev->pdata->keep_ahb_clk_on)
+ clk_prepare_enable(dev->pclk);
+}
+
+static void i2c_qup_pm_suspend(struct qup_i2c_dev *dev)
+{
+ if (dev->pwr_state == MSM_I2C_PM_SUSPENDED) {
+ dev_err(dev->dev, "attempt to suspend when suspended\n");
+ return;
+ }
+
+ if (!dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_suspend_clk(dev);
+
+ if (!dev->pdata->active_only)
+ i2c_qup_clk_path_unvote(dev);
+
+ i2c_qup_gpio_free(dev);
+ dev->pwr_state = MSM_I2C_PM_SUSPENDED;
+}
+
+static void i2c_qup_pm_resume(struct qup_i2c_dev *dev)
+{
+ if (dev->pwr_state == MSM_I2C_PM_ACTIVE)
+ return;
+
+ i2c_qup_gpio_request(dev);
+
+ i2c_qup_clk_path_postponed_register(dev);
+ if (!dev->pdata->active_only)
+ i2c_qup_clk_path_vote(dev);
+
+ if (!dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_resume_clk(dev);
+ dev->pwr_state = MSM_I2C_PM_ACTIVE;
}
static int
@@ -595,43 +656,6 @@
return -ETIMEDOUT;
}
-static inline int qup_i2c_request_gpios(struct qup_i2c_dev *dev)
-{
- int i;
- int result = 0;
-
- for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
- if (dev->i2c_gpios[i] >= 0) {
- result = gpio_request(dev->i2c_gpios[i], i2c_rsrcs[i]);
- if (result) {
- dev_err(dev->dev,
- "gpio_request for pin %d failed\
- with error %d\n", dev->i2c_gpios[i],
- result);
- goto error;
- }
- }
- }
- return 0;
-
-error:
- for (; --i >= 0;) {
- if (dev->i2c_gpios[i] >= 0)
- gpio_free(dev->i2c_gpios[i]);
- }
- return result;
-}
-
-static inline void qup_i2c_free_gpios(struct qup_i2c_dev *dev)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(i2c_rsrcs); ++i) {
- if (dev->i2c_gpios[i] >= 0)
- gpio_free(dev->i2c_gpios[i]);
- }
-}
-
#ifdef DEBUG
static void qup_verify_fifo(struct qup_i2c_dev *dev, uint32_t val,
uint32_t addr, int rdwr)
@@ -948,19 +972,35 @@
long timeout;
int err;
- /* Alternate if runtime power management is disabled */
- if (!pm_runtime_enabled(dev->dev)) {
- dev_dbg(dev->dev, "Runtime PM is disabled\n");
- i2c_qup_pm_resume_runtime(dev->dev);
- } else {
- pm_runtime_get_sync(dev->dev);
- }
+ /*
+ * If all slaves of this controller behave as expected, they will
+ * implement suspend and won't call any transaction if they are
+ * suspended. Since controller is its parent, controller's suspend
+ * will be called only AFTER alls slaves are suspended.
+ * However reality is differe and some slave don't implement suspend
+ * If a slave tries to initiate transfer when we are suspended,
+ * pm_runtime_enabled is set to false by system-pm.
+ * Make sure we return error when transaction is initiated while
+ * we are in suspended state
+ */
mutex_lock(&dev->mlock);
-
- if (dev->suspended) {
+ if (dev->pwr_state >= MSM_I2C_SYS_SUSPENDING) {
+ dev_err(dev->dev,
+ "xfer not allowed when ctrl is suspended addr:0x%x\n",
+ msgs->addr);
mutex_unlock(&dev->mlock);
return -EIO;
}
+ if (!pm_runtime_enabled(dev->dev)) {
+ dev_dbg(dev->dev, "Runtime PM FEATURE is disabled\n");
+ i2c_qup_pm_resume(dev);
+ } else {
+ pm_runtime_get_sync(dev->dev);
+ }
+
+
+ if (dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_resume_clk(dev);
/* Initialize QUP registers during first transfer */
if (dev->clk_ctl == 0) {
@@ -1263,6 +1303,8 @@
dev->pos = 0;
dev->err = 0;
dev->cnt = 0;
+ if (dev->pdata->clk_ctl_xfer)
+ i2c_qup_pm_suspend_clk(dev);
mutex_unlock(&dev->mlock);
pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev);
@@ -1296,14 +1338,15 @@
struct device_node *node = pdev->dev.of_node;
struct msm_i2c_dt_to_pdata_map *itr;
struct msm_i2c_dt_to_pdata_map map[] = {
- {"qcom,i2c-bus-freq", &pdata->clk_freq , DT_REQUIRED , DT_U32 , 0},
- {"cell-index" , &pdev->id , DT_REQUIRED , DT_U32 , -1},
+ {"qcom,i2c-bus-freq", &pdata->clk_freq, DT_REQUIRED, DT_U32, 0},
+ {"cell-index", &pdev->id, DT_REQUIRED, DT_U32, -1},
{"qcom,i2c-src-freq", &pdata->src_clk_rate, DT_SUGGESTED, DT_U32, 0},
- {"qcom,master-id" , &pdata->master_id , DT_SUGGESTED, DT_U32, 0},
- {"qcom,scl-gpio" , gpios , DT_OPTIONAL , DT_GPIO, -1},
- {"qcom,sda-gpio" , gpios + 1 , DT_OPTIONAL , DT_GPIO, -1},
- {"qcom,active-only" , &pdata->active_only , DT_OPTIONAL , DT_BOOL, 0},
- {NULL , NULL , 0 , 0 , 0},
+ {"qcom,master-id", &pdata->master_id, DT_SUGGESTED, DT_U32, 0},
+ {"qcom,scl-gpio", gpios, DT_OPTIONAL, DT_GPIO, -1},
+ {"qcom,sda-gpio", gpios + 1, DT_OPTIONAL, DT_GPIO, -1},
+ {"qcom,clk-ctl-xfer", &pdata->clk_ctl_xfer, DT_OPTIONAL, DT_BOOL, -1},
+ {"qcom,active-only", &pdata->active_only, DT_OPTIONAL, DT_BOOL, 0},
+ {NULL, NULL, 0, 0, 0},
};
for (itr = map; itr->dt_name ; ++itr) {
@@ -1611,7 +1654,7 @@
pdata->msm_i2c_config_gpio(dev->adapter.nr, 1);
mutex_init(&dev->mlock);
- dev->pwr_state = 0;
+ dev->pwr_state = MSM_I2C_PM_SUSPENDED;
/* If the same AHB clock is used on Modem side
* switch it on here itself and don't switch it
* on and off during suspend and resume.
@@ -1685,13 +1728,11 @@
/* Grab mutex to ensure ongoing transaction is over */
mutex_lock(&dev->mlock);
- dev->suspended = 1;
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDING;
mutex_unlock(&dev->mlock);
+ i2c_qup_pm_suspend(dev);
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDED;
mutex_destroy(&dev->mlock);
- if (dev->pwr_state != 0) {
- qup_i2c_pwr_mgmt(dev, 0);
- qup_i2c_free_gpios(dev);
- }
platform_set_drvdata(pdev, NULL);
if (dev->num_irqs == 3) {
free_irq(dev->out_irq, dev);
@@ -1732,14 +1773,7 @@
struct platform_device *pdev = to_platform_device(device);
struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
dev_dbg(device, "pm_runtime: suspending...\n");
- /* Grab mutex to ensure ongoing transaction is over */
- mutex_lock(&dev->mlock);
- dev->suspended = 1;
- mutex_unlock(&dev->mlock);
- if (dev->pwr_state != 0) {
- qup_i2c_pwr_mgmt(dev, 0);
- qup_i2c_free_gpios(dev);
- }
+ i2c_qup_pm_suspend(dev);
return 0;
}
@@ -1747,23 +1781,22 @@
{
struct platform_device *pdev = to_platform_device(device);
struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
- int ret = 0;
dev_dbg(device, "pm_runtime: resuming...\n");
- if (dev->pwr_state == 0) {
- ret = qup_i2c_request_gpios(dev);
- if (ret != 0)
- return ret;
- qup_i2c_pwr_mgmt(dev, 1);
- }
- dev->suspended = 0;
+ i2c_qup_pm_resume(dev);
return 0;
}
-static int qup_i2c_suspend(struct device *device)
+static int i2c_qup_pm_suspend_sys(struct device *device)
{
+ struct platform_device *pdev = to_platform_device(device);
+ struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
+ /* Acquire mutex to ensure current transaction is over */
+ mutex_lock(&dev->mlock);
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDING;
+ mutex_unlock(&dev->mlock);
if (!pm_runtime_enabled(device) || !pm_runtime_suspended(device)) {
- dev_dbg(device, "system suspend");
- i2c_qup_pm_suspend_runtime(device);
+ dev_dbg(device, "system suspend\n");
+ i2c_qup_pm_suspend(dev);
/*
* set the device's runtime PM status to 'suspended'
*/
@@ -1771,25 +1804,29 @@
pm_runtime_set_suspended(device);
pm_runtime_enable(device);
}
+ dev->pwr_state = MSM_I2C_SYS_SUSPENDED;
return 0;
}
-static int qup_i2c_resume(struct device *device)
+static int i2c_qup_pm_resume_sys(struct device *device)
{
+ struct platform_device *pdev = to_platform_device(device);
+ struct qup_i2c_dev *dev = platform_get_drvdata(pdev);
/*
* Rely on runtime-PM to call resume in case it is enabled
* Even if it's not enabled, rely on 1st client transaction to do
* clock ON and gpio configuration
*/
- dev_dbg(device, "system resume");
+ dev_dbg(device, "system resume\n");
+ dev->pwr_state = MSM_I2C_PM_SUSPENDED;
return 0;
}
#endif /* CONFIG_PM */
static const struct dev_pm_ops i2c_qup_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(
- qup_i2c_suspend,
- qup_i2c_resume
+ i2c_qup_pm_suspend_sys,
+ i2c_qup_pm_resume_sys
)
SET_RUNTIME_PM_OPS(
i2c_qup_pm_suspend_runtime,
@@ -1817,11 +1854,18 @@
};
/* QUP may be needed to bring up other drivers */
-static int __init
-qup_i2c_init_driver(void)
+int __init qup_i2c_init_driver(void)
{
+ static bool initialized;
+
+ if (initialized)
+ return 0;
+ else
+ initialized = true;
+
return platform_driver_register(&qup_i2c_driver);
}
+EXPORT_SYMBOL(qup_i2c_init_driver);
arch_initcall(qup_i2c_init_driver);
static void __exit qup_i2c_exit_driver(void)
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 716ea0d..0c22694 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -73,6 +73,16 @@
To compile this driver as a module, choose M here: the
module will be called bma150.
+config INPUT_HBTP_INPUT
+ tristate "HBTP input driver support"
+ help
+ Say Y to enable HBTP input driver.
+
+ To compile this driver as a module, choose M here: the
+ module will be called hbtp_input.
+
+endif
+
config INPUT_PCSPKR
tristate "PC Speaker support"
depends on PCSPKR_PLATFORM
@@ -714,4 +724,3 @@
To compile this driver as a module, choose M here: the
module will be called CM36283.
-endif
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index c927e0e..c9a65fc 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -26,6 +26,7 @@
obj-$(CONFIG_INPUT_GP2A) += gp2ap002a00f.o
obj-$(CONFIG_INPUT_GPIO_TILT_POLLED) += gpio_tilt_polled.o
obj-$(CONFIG_INPUT_GPIO) += gpio_event.o gpio_matrix.o gpio_input.o gpio_output.o gpio_axis.o
+obj-$(CONFIG_INPUT_HBTP_INPUT) += hbtp_input.o
obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o
obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o
obj-$(CONFIG_INPUT_KEYCHORD) += keychord.o
diff --git a/drivers/input/misc/hbtp_input.c b/drivers/input/misc/hbtp_input.c
new file mode 100644
index 0000000..83ba652
--- /dev/null
+++ b/drivers/input/misc/hbtp_input.c
@@ -0,0 +1,477 @@
+
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/poll.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/miscdevice.h>
+#include <linux/hbtp_input.h>
+#include <linux/input/mt.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include "../input-compat.h"
+
+#if defined(CONFIG_FB)
+#include <linux/notifier.h>
+#include <linux/fb.h>
+#endif
+
+#define HBTP_INPUT_NAME "hbtp_input"
+#define HBTP_AFE_LOAD_UA 150000
+#define HBTP_AFE_VTG_MIN_UV 2700000
+#define HBTP_AFE_VTG_MAX_UV 3300000
+
+struct hbtp_data {
+ struct platform_device *pdev;
+ struct input_dev *input_dev;
+ s32 count;
+ bool touch_status[HBTP_MAX_FINGER];
+#if defined(CONFIG_FB)
+ struct notifier_block fb_notif;
+#endif
+ struct regulator *vcc_ana;
+};
+
+static struct hbtp_data *hbtp;
+
+#if defined(CONFIG_FB)
+static int fb_notifier_callback(struct notifier_block *self,
+ unsigned long event, void *data)
+{
+ int blank;
+ struct fb_event *evdata = data;
+ struct hbtp_data *hbtp_data =
+ container_of(self, struct hbtp_data, fb_notif);
+
+ if (evdata && evdata->data && event == FB_EVENT_BLANK &&
+ hbtp_data && hbtp_data->input_dev) {
+ blank = *(int *)(evdata->data);
+ if (blank == FB_BLANK_UNBLANK)
+ kobject_uevent(&hbtp_data->input_dev->dev.kobj,
+ KOBJ_ONLINE);
+ else if (blank == FB_BLANK_POWERDOWN)
+ kobject_uevent(&hbtp_data->input_dev->dev.kobj,
+ KOBJ_OFFLINE);
+ }
+
+ return 0;
+}
+#endif
+
+static int hbtp_input_open(struct inode *inode, struct file *file)
+{
+ if (hbtp->count) {
+ pr_err("%s is busy\n", HBTP_INPUT_NAME);
+ return -EBUSY;
+ }
+ hbtp->count++;
+
+ return 0;
+}
+
+static int hbtp_input_release(struct inode *inode, struct file *file)
+{
+ if (!hbtp->count) {
+ pr_err("%s wasn't opened\n", HBTP_INPUT_NAME);
+ return -ENOTTY;
+ }
+ hbtp->count--;
+
+ return 0;
+}
+
+static int hbtp_input_create_input_dev(struct hbtp_input_absinfo *absinfo)
+{
+ struct input_dev *input_dev;
+ struct hbtp_input_absinfo *abs;
+ int error;
+ int i;
+
+ input_dev = input_allocate_device();
+ if (!input_dev) {
+ pr_err("%s: input_allocate_device failed\n", __func__);
+ return -ENOMEM;
+ }
+
+ kfree(input_dev->name);
+ input_dev->name = kstrndup(HBTP_INPUT_NAME, sizeof(HBTP_INPUT_NAME),
+ GFP_KERNEL);
+ __set_bit(EV_ABS, input_dev->evbit);
+ __set_bit(EV_KEY, input_dev->evbit);
+ __set_bit(BTN_TOUCH, input_dev->keybit);
+ __set_bit(INPUT_PROP_DIRECT, input_dev->propbit);
+
+ /* For multi touch */
+ input_mt_init_slots(input_dev, HBTP_MAX_FINGER);
+ for (i = 0; i <= ABS_MT_LAST - ABS_MT_FIRST; i++) {
+ abs = absinfo + i;
+ if (abs->active)
+ input_set_abs_params(input_dev, abs->code,
+ abs->minimum, abs->maximum, 0, 0);
+ }
+
+ error = input_register_device(input_dev);
+ if (error) {
+ pr_err("%s: input_register_device failed\n", __func__);
+ goto err_input_reg_dev;
+ }
+
+ hbtp->input_dev = input_dev;
+ return 0;
+
+err_input_reg_dev:
+ input_free_device(input_dev);
+
+ return error;
+}
+
+static int hbtp_input_report_events(struct hbtp_data *hbtp_data,
+ struct hbtp_input_mt *mt_data)
+{
+ int i;
+ struct hbtp_input_touch *tch;
+
+ for (i = 0; i < HBTP_MAX_FINGER; i++) {
+ tch = &(mt_data->touches[i]);
+ if (tch->active || hbtp_data->touch_status[i]) {
+ input_mt_slot(hbtp_data->input_dev, i);
+ input_mt_report_slot_state(hbtp_data->input_dev,
+ MT_TOOL_FINGER, tch->active);
+
+ if (tch->active) {
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_TOOL_TYPE,
+ tch->tool);
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_TOUCH_MAJOR,
+ tch->major);
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_TOUCH_MINOR,
+ tch->minor);
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_ORIENTATION,
+ tch->orientation);
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_PRESSURE,
+ tch->pressure);
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_POSITION_X,
+ tch->x);
+ input_report_abs(hbtp_data->input_dev,
+ ABS_MT_POSITION_Y,
+ tch->y);
+ }
+ hbtp_data->touch_status[i] = tch->active;
+ }
+ }
+
+ input_report_key(hbtp->input_dev, BTN_TOUCH, mt_data->num_touches > 0);
+ input_sync(hbtp->input_dev);
+
+ return 0;
+}
+
+static int reg_set_optimum_mode_check(struct regulator *reg, int load_uA)
+{
+ return (regulator_count_voltages(reg) > 0) ?
+ regulator_set_optimum_mode(reg, load_uA) : 0;
+}
+
+static int hbtp_pdev_power_on(struct hbtp_data *hbtp, bool on)
+{
+ int ret, error;
+
+ if (!hbtp->vcc_ana) {
+ pr_err("%s: regulator is not available\n", __func__);
+ return -EINVAL;
+ }
+
+ if (!on)
+ goto reg_off;
+
+ ret = reg_set_optimum_mode_check(hbtp->vcc_ana, HBTP_AFE_LOAD_UA);
+ if (ret < 0) {
+ pr_err("%s: Regulator vcc_ana set_opt failed rc=%d\n",
+ __func__, ret);
+ return -EINVAL;
+ }
+
+ ret = regulator_enable(hbtp->vcc_ana);
+ if (ret) {
+ pr_err("%s: Regulator vcc_ana enable failed rc=%d\n",
+ __func__, ret);
+ error = -EINVAL;
+ goto error_reg_en_vcc_ana;
+ }
+
+ return 0;
+
+error_reg_en_vcc_ana:
+ reg_set_optimum_mode_check(hbtp->vcc_ana, 0);
+ return error;
+
+reg_off:
+ reg_set_optimum_mode_check(hbtp->vcc_ana, 0);
+ regulator_disable(hbtp->vcc_ana);
+ return 0;
+}
+
+static long hbtp_input_ioctl_handler(struct file *file, unsigned int cmd,
+ unsigned long arg, void __user *p)
+{
+ int error;
+ struct hbtp_input_mt mt_data;
+ struct hbtp_input_absinfo absinfo[ABS_MT_LAST - ABS_MT_FIRST + 1];
+ enum hbtp_afe_power_cmd power_cmd;
+
+ switch (cmd) {
+ case HBTP_SET_ABSPARAM:
+ if (hbtp && hbtp->input_dev) {
+ pr_err("%s: The input device is already created\n",
+ __func__);
+ return 0;
+ }
+
+ if (copy_from_user(absinfo, (void *)arg,
+ sizeof(struct hbtp_input_absinfo) *
+ (ABS_MT_LAST - ABS_MT_FIRST + 1))) {
+ pr_err("%s: Error copying data for ABS param\n",
+ __func__);
+ return -EFAULT;
+ }
+
+ error = hbtp_input_create_input_dev(absinfo);
+ if (error)
+ pr_err("%s, hbtp_input_create_input_dev failed (%d)\n",
+ __func__, error);
+ break;
+
+ case HBTP_SET_TOUCHDATA:
+ if (!hbtp || !hbtp->input_dev) {
+ pr_err("%s: The input device hasn't been created\n",
+ __func__);
+ return -EFAULT;
+ }
+
+ if (copy_from_user(&mt_data, (void *)arg,
+ sizeof(struct hbtp_input_mt))) {
+ pr_err("%s: Error copying data\n", __func__);
+ return -EFAULT;
+ }
+
+ hbtp_input_report_events(hbtp, &mt_data);
+ error = 0;
+ break;
+
+ case HBTP_SET_POWERSTATE:
+ if (!hbtp || !hbtp->input_dev) {
+ pr_err("%s: The input device hasn't been created\n",
+ __func__);
+ return -EFAULT;
+ }
+
+ if (copy_from_user(&power_cmd, (void *)arg,
+ sizeof(enum hbtp_afe_power_cmd))) {
+ pr_err("%s: Error copying data\n", __func__);
+ return -EFAULT;
+ }
+
+ switch (power_cmd) {
+ case HBTP_AFE_POWER_ON:
+ error = hbtp_pdev_power_on(hbtp, true);
+ if (error)
+ pr_err("%s: failed to power on\n", __func__);
+ break;
+ case HBTP_AFE_POWER_OFF:
+ error = hbtp_pdev_power_on(hbtp, false);
+ if (error)
+ pr_err("%s: failed to power off\n", __func__);
+ break;
+ default:
+ pr_err("%s: Unsupported command for power state, %d\n",
+ __func__, power_cmd);
+ return -EINVAL;
+ }
+ break;
+
+ default:
+ pr_err("%s: Unsupported ioctl command %u\n", __func__, cmd);
+ error = -EINVAL;
+ break;
+ }
+
+ return error;
+}
+
+static long hbtp_input_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ return hbtp_input_ioctl_handler(file, cmd, arg, (void __user *)arg);
+}
+
+#ifdef CONFIG_COMPAT
+static long hbtp_input_compat_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ return hbtp_input_ioctl_handler(file, cmd, arg, compat_ptr(arg));
+}
+#endif
+
+static const struct file_operations hbtp_input_fops = {
+ .owner = THIS_MODULE,
+ .open = hbtp_input_open,
+ .release = hbtp_input_release,
+ .unlocked_ioctl = hbtp_input_ioctl,
+#ifdef CONFIG_COMPAT
+ .compat_ioctl = hbtp_input_compat_ioctl,
+#endif
+};
+
+static struct miscdevice hbtp_input_misc = {
+ .fops = &hbtp_input_fops,
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = HBTP_INPUT_NAME,
+};
+MODULE_ALIAS_MISCDEV(MISC_DYNAMIC_MINOR);
+MODULE_ALIAS("devname:" HBTP_INPUT_NAME);
+
+static int __devinit hbtp_pdev_probe(struct platform_device *pdev)
+{
+ int ret, error;
+ struct regulator *vcc_ana;
+
+ vcc_ana = regulator_get(&pdev->dev, "vcc_ana");
+ if (IS_ERR(vcc_ana)) {
+ ret = PTR_ERR(vcc_ana);
+ pr_err("%s: Regulator get failed vcc_ana rc=%d\n",
+ __func__, ret);
+ return -EINVAL;
+ }
+
+ if (regulator_count_voltages(vcc_ana) > 0) {
+ ret = regulator_set_voltage(vcc_ana,
+ HBTP_AFE_VTG_MIN_UV, HBTP_AFE_VTG_MAX_UV);
+ if (ret) {
+ pr_err("%s: regulator set_vtg failed rc=%d\n",
+ __func__, ret);
+ error = -EINVAL;
+ goto error_set_vtg_vcc_ana;
+ }
+ }
+
+ hbtp->vcc_ana = vcc_ana;
+ hbtp->pdev = pdev;
+ return 0;
+
+error_set_vtg_vcc_ana:
+ regulator_put(vcc_ana);
+
+ return error;
+};
+
+static int __devexit hbtp_pdev_remove(struct platform_device *pdev)
+{
+ if (hbtp->vcc_ana) {
+ hbtp_pdev_power_on(hbtp, false);
+ regulator_put(hbtp->vcc_ana);
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static struct of_device_id hbtp_match_table[] = {
+ { .compatible = "qcom,hbtp",},
+ { },
+};
+#else
+#define hbtp_match_table NULL
+#endif
+
+static struct platform_driver hbtp_pdev_driver = {
+ .probe = hbtp_pdev_probe,
+ .remove = __devexit_p(hbtp_pdev_remove),
+ .driver = {
+ .name = "hbtp",
+ .owner = THIS_MODULE,
+ .of_match_table = hbtp_match_table,
+ },
+};
+
+static int __init hbtp_init(void)
+{
+ int error;
+
+ hbtp = kzalloc(sizeof(struct hbtp_data), GFP_KERNEL);
+ if (!hbtp)
+ return -ENOMEM;
+
+ error = misc_register(&hbtp_input_misc);
+ if (error) {
+ pr_err("%s: misc_register failed\n", HBTP_INPUT_NAME);
+ goto err_misc_reg;
+ }
+
+#if defined(CONFIG_FB)
+ hbtp->fb_notif.notifier_call = fb_notifier_callback;
+ error = fb_register_client(&hbtp->fb_notif);
+ if (error) {
+ pr_err("%s: Unable to register fb_notifier: %d\n",
+ HBTP_INPUT_NAME, error);
+ goto err_fb_reg;
+ }
+#endif
+
+ error = platform_driver_register(&hbtp_pdev_driver);
+ if (error) {
+ pr_err("Failed to register platform driver: %d\n", error);
+ goto err_platform_drv_reg;
+ }
+
+ return 0;
+
+err_platform_drv_reg:
+#if defined(CONFIG_FB)
+ fb_unregister_client(&hbtp->fb_notif);
+err_fb_reg:
+#endif
+ misc_deregister(&hbtp_input_misc);
+err_misc_reg:
+ kfree(hbtp);
+
+ return error;
+}
+
+static void __exit hbtp_exit(void)
+{
+ misc_deregister(&hbtp_input_misc);
+ if (hbtp->input_dev)
+ input_unregister_device(hbtp->input_dev);
+
+#if defined(CONFIG_FB)
+ fb_unregister_client(&hbtp->fb_notif);
+#endif
+
+ platform_driver_unregister(&hbtp_pdev_driver);
+
+ kfree(hbtp);
+}
+
+MODULE_DESCRIPTION("Kernel driver to support host based touch processing");
+MODULE_LICENSE("GPLv2");
+
+module_init(hbtp_init);
+module_exit(hbtp_exit);
diff --git a/drivers/input/misc/mma8x5x.c b/drivers/input/misc/mma8x5x.c
index 0fc5693..d708d94 100644
--- a/drivers/input/misc/mma8x5x.c
+++ b/drivers/input/misc/mma8x5x.c
@@ -30,6 +30,7 @@
#include <linux/sensors.h>
#include <linux/regulator/consumer.h>
#include <linux/of_gpio.h>
+#include <linux/irq.h>
#define ACCEL_INPUT_DEV_NAME "accelerometer"
#define MMA8451_ID 0x1A
@@ -41,7 +42,7 @@
/* Polling delay in msecs */
#define POLL_INTERVAL_MIN 1
#define POLL_INTERVAL_MAX 10000
-#define POLL_INTERVAL 100
+#define POLL_INTERVAL 100 /* msecs */
/* if sensor is standby ,set POLL_STOP_TIME to slow down the poll */
#define POLL_STOP_TIME 10000
@@ -74,6 +75,13 @@
.sensors_poll_delay = NULL,
};
+#define MMA_WAKE_CFG 0x02
+#define MMA_INT_EN_DRDY 0x01
+#define MMA_INT_EN_FF_MT 0x04
+#define MMA_INT_ROUTING_CFG 0x01
+
+#define MMA_POWER_CFG_MASK 0xFE
+
struct sensor_regulator {
struct regulator *vreg;
const char *name;
@@ -86,6 +94,23 @@
{NULL, "vio", 1800000, 1800000},
};
+struct mma_odr_selection_table {
+ u32 odr_cfg;
+ u32 delay_bottom;
+ u32 delay_top;
+};
+
+static struct mma_odr_selection_table mma_odr_table[] = {
+ {0x00, 0, 1500},
+ {0x08, 1501, 3500},
+ {0x10, 3501, 7500},
+ {0x18, 7501, 15000},
+ {0x20, 15001, 50000},
+ {0x28, 50001, 120000},
+ {0x30, 120001, 400000},
+ {0x38, 400001, 10000000},
+};
+
/* register enum for mma8x5x registers */
enum {
MMA8X5X_STATUS = 0x00,
@@ -165,6 +190,7 @@
struct mma8x5x_data {
struct i2c_client *client;
struct input_polled_dev *poll_dev;
+ struct input_dev *idev;
struct mutex data_lock;
struct sensors_classdev cdev;
int active;
@@ -174,6 +200,7 @@
int int_pin;
u32 int_flags;
int poll_delay;
+ bool use_int;
};
/* Addresses scanned */
static const unsigned short normal_i2c[] = {0x1c, 0x1d, I2C_CLIENT_END};
@@ -202,7 +229,7 @@
{{ 0, 1, 0}, { 1, 0, 0}, {0, 0, -1} },
{{ 1, 0, 0}, { 0, -1, 0}, {0, 0, -1} },
};
-
+static struct mma8x5x_data *drv_data;
static int mma8x5x_config_regulator(struct i2c_client *client, bool on)
{
int rc = 0, i;
@@ -348,6 +375,98 @@
return -EIO;
}
+static int mma8x5x_delay2odr(u32 delay_ms)
+{
+ int i;
+ u32 delay_us;
+
+ delay_us = delay_ms * 1000;
+ for (i = 0; i < sizeof(mma_odr_table) /
+ sizeof(struct mma_odr_selection_table); i++) {
+ if ((delay_us <= mma_odr_table[i].delay_top) &&
+ (delay_us > mma_odr_table[i].delay_bottom))
+ break;
+ }
+ if (i < sizeof(mma_odr_table) /
+ sizeof(struct mma_odr_selection_table))
+ return mma_odr_table[i].odr_cfg;
+ else
+ return -EINVAL;
+}
+
+static int mma8x5x_device_set_odr(struct i2c_client *client, u32 delay_ms)
+{
+ int result;
+ u8 val;
+
+ result = mma8x5x_delay2odr(delay_ms);
+ if (result < 0)
+ goto out;
+ val = (u8)result;
+
+ result = i2c_smbus_read_byte_data(client, MMA8X5X_CTRL_REG1);
+ if (result < 0)
+ goto out;
+
+ val = (u8)result | val;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG1,
+ (val & MMA_POWER_CFG_MASK));
+ if (result < 0)
+ goto out;
+
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG4,
+ MMA_INT_EN_DRDY);
+ if (result < 0)
+ goto out;
+
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG5,
+ MMA_INT_ROUTING_CFG);
+ if (result < 0)
+ goto out;
+
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG1,
+ val);
+ if (result < 0)
+ goto out;
+
+ return 0;
+out:
+ dev_err(&client->dev, "error when set ODR mma8x5x:(%d)", result);
+ return result;
+}
+static int mma8x5x_device_int_init(struct i2c_client *client)
+{
+ struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+ int result;
+ int val;
+
+ result = mma8x5x_device_set_odr(client, pdata->poll_delay);
+ if (result < 0)
+ goto out;
+
+ val = MMA_WAKE_CFG;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG3,
+ val);
+ if (result < 0)
+ goto out;
+
+ val = MMA_INT_EN_DRDY;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG4,
+ val);
+ if (result < 0)
+ goto out;
+
+ val = MMA_INT_ROUTING_CFG;
+ result = i2c_smbus_write_byte_data(client, MMA8X5X_CTRL_REG5,
+ val);
+ if (result < 0)
+ goto out;
+
+ return 0;
+out:
+ dev_err(&client->dev, "error when int init mma8x5x:(%d)", result);
+ return result;
+}
static int mma8x5x_read_data(struct i2c_client *client,
struct mma8x5x_data_axis *data)
{
@@ -355,7 +474,7 @@
int ret;
ret = i2c_smbus_read_i2c_block_data(client,
- MMA8X5X_OUT_X_MSB, 7, tmp_data);
+ MMA8X5X_OUT_X_MSB, 7, tmp_data);
if (ret < MMA8X5X_BUF_SIZE) {
dev_err(&client->dev, "i2c block read failed\n");
return -EIO;
@@ -396,6 +515,28 @@
mma8x5x_report_data(pdata);
}
+static irqreturn_t mma8x5x_interrupt(int vec, void *data)
+{
+ struct i2c_client *client = (struct i2c_client *)data;
+ struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+ struct input_dev *idev = pdata->idev;
+ struct mma8x5x_data_axis data_axis;
+
+ mutex_lock(&pdata->data_lock);
+
+ if (mma8x5x_read_data(pdata->client, &data_axis) != 0)
+ goto out;
+ mma8x5x_data_convert(pdata, &data_axis);
+ input_report_abs(idev, ABS_X, data_axis.x);
+ input_report_abs(idev, ABS_Y, data_axis.y);
+ input_report_abs(idev, ABS_Z, data_axis.z);
+ input_sync(idev);
+out:
+ mutex_unlock(&pdata->data_lock);
+
+ return IRQ_HANDLED;
+}
+
static int mma8x5x_enable_set(struct sensors_classdev *sensors_cdev,
unsigned int enable)
{
@@ -416,6 +557,9 @@
if (ret)
goto err_failed;
+ ret = mma8x5x_device_set_odr(client, pdata->poll_delay);
+ if (ret)
+ goto err_failed;
pdata->active &= ~MMA_SHUTTEDDOWN;
}
if (pdata->active == MMA_STANDBY) {
@@ -472,12 +616,17 @@
static ssize_t mma8x5x_enable_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
- struct i2c_client *client = pdata->client;
+ struct mma8x5x_data *pdata = drv_data;
+ struct i2c_client *client;
u8 val;
int enable;
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+ client = pdata->client;
+
mutex_lock(&pdata->data_lock);
val = i2c_smbus_read_byte_data(client, MMA8X5X_CTRL_REG1);
if ((val & 0x01) && pdata->active == MMA_ACTIVED)
@@ -492,11 +641,16 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
+ struct i2c_client *client;
int ret;
unsigned long enable;
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+ client = pdata->client;
ret = kstrtoul(buf, 10, &enable);
if (ret)
return ret;
@@ -509,9 +663,13 @@
static ssize_t mma8x5x_position_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
int position = 0;
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
mutex_lock(&pdata->data_lock);
position = pdata->position ;
mutex_unlock(&pdata->data_lock);
@@ -522,10 +680,14 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
int position;
int ret;
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
ret = kstrtoint(buf, 10, &position);
if (ret)
return ret;
@@ -540,11 +702,21 @@
{
struct mma8x5x_data *pdata = container_of(sensors_cdev,
struct mma8x5x_data, cdev);
+ int ret;
- mutex_lock(&pdata->data_lock);
- pdata->poll_delay = delay_ms;
- pdata->poll_dev->poll_interval = pdata->poll_delay;
- mutex_unlock(&pdata->data_lock);
+ if (pdata->use_int) {
+ mutex_lock(&pdata->data_lock);
+ pdata->poll_delay = delay_ms;
+ ret = mma8x5x_device_set_odr(pdata->client, delay_ms);
+ mutex_unlock(&pdata->data_lock);
+ if (ret < 0)
+ return ret;
+ } else {
+ mutex_lock(&pdata->data_lock);
+ pdata->poll_delay = delay_ms;
+ pdata->poll_dev->poll_interval = pdata->poll_delay;
+ mutex_unlock(&pdata->data_lock);
+ }
return 0;
}
@@ -552,8 +724,13 @@
static ssize_t mma8x5x_poll_delay_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
+ struct mma8x5x_data *pdata = drv_data;
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+
return snprintf(buf, PAGE_SIZE, "%d\n", pdata->poll_delay);
}
@@ -561,19 +738,23 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct input_polled_dev *poll_dev = dev_get_drvdata(dev);
- struct mma8x5x_data *pdata = (struct mma8x5x_data *)(poll_dev->private);
- int interval;
+ struct mma8x5x_data *pdata = drv_data;
+ int delay;
int ret;
- ret = kstrtoint(buf, 10, &interval);
+
+ if (!pdata) {
+ dev_err(dev, "Invalid driver private data!");
+ return -EINVAL;
+ }
+ ret = kstrtoint(buf, 10, &delay);
if (ret)
return ret;
- if (interval <= POLL_INTERVAL_MIN)
- interval = POLL_INTERVAL_MIN;
- if (interval > POLL_INTERVAL_MAX)
- interval = POLL_INTERVAL_MAX;
+ if (delay <= POLL_INTERVAL_MIN)
+ delay = POLL_INTERVAL_MIN;
+ if (delay > POLL_INTERVAL_MAX)
+ delay = POLL_INTERVAL_MAX;
- mma8x5x_poll_delay_set(&pdata->cdev, interval);
+ mma8x5x_poll_delay_set(&pdata->cdev, delay);
return count;
}
@@ -632,6 +813,8 @@
return rc;
}
+ data->use_int = of_property_read_bool(np, "fsl,use-interrupt");
+
return 0;
}
@@ -676,7 +859,7 @@
if (client->dev.of_node) {
result = mma8x5x_parse_dt(&client->dev, pdata);
if (result)
- return result;
+ goto err_parse_dt;
} else {
pdata->position = CONFIG_SENSORS_MMA_POSITION;
pdata->int_pin = -1;
@@ -684,40 +867,96 @@
}
/* Initialize the MMA8X5X chip */
+ drv_data = pdata;
pdata->client = client;
pdata->chip_id = chip_id;
pdata->mode = MODE_2G;
- pdata->poll_delay = POLL_INTERVAL;
+ pdata->poll_delay = POLL_STOP_TIME;
+ pdata->poll_dev = NULL;
mutex_init(&pdata->data_lock);
i2c_set_clientdata(client, pdata);
/* Initialize the MMA8X5X chip */
mma8x5x_device_init(client);
- /* create the input poll device */
- poll_dev = input_allocate_polled_device();
- if (!poll_dev) {
- result = -ENOMEM;
- dev_err(&client->dev, "alloc poll device failed!\n");
- goto err_alloc_poll_device;
- }
- poll_dev->poll = mma8x5x_dev_poll;
- poll_dev->poll_interval = POLL_STOP_TIME;
- poll_dev->poll_interval_min = POLL_INTERVAL_MIN;
- poll_dev->poll_interval_max = POLL_INTERVAL_MAX;
- poll_dev->private = pdata;
- idev = poll_dev->input;
- idev->name = ACCEL_INPUT_DEV_NAME;
- idev->uniq = mma8x5x_id2name(pdata->chip_id);
- idev->id.bustype = BUS_I2C;
- idev->evbit[0] = BIT_MASK(EV_ABS);
- input_set_abs_params(idev, ABS_X, -0x7fff, 0x7fff, 0, 0);
- input_set_abs_params(idev, ABS_Y, -0x7fff, 0x7fff, 0, 0);
- input_set_abs_params(idev, ABS_Z, -0x7fff, 0x7fff, 0, 0);
- pdata->poll_dev = poll_dev;
- result = input_register_polled_device(pdata->poll_dev);
- if (result) {
- dev_err(&client->dev, "register poll device failed!\n");
- goto err_register_polled_device;
+ if (pdata->use_int) {
+ if (pdata->int_pin >= 0)
+ client->irq = gpio_to_irq(pdata->int_pin);
+
+ if (gpio_is_valid(pdata->int_pin)) {
+ result = gpio_request(pdata->int_pin,
+ "mma8x5x_irq_gpio");
+ if (result) {
+ dev_err(&client->dev, "irq gpio(%d) request failed",
+ pdata->int_pin);
+ goto err_request_gpio;
+ }
+ result = gpio_direction_input(pdata->int_pin);
+ if (result) {
+ dev_err(&client->dev,
+ "set_direction for irq gpio failed\n");
+ goto err_set_direction;
+ }
+ }
+ idev = input_allocate_device();
+ if (!idev) {
+ result = -ENOMEM;
+ dev_err(&client->dev, "alloc input device failed!\n");
+ goto err_alloc_poll_device;
+ }
+ input_set_drvdata(idev, pdata);
+ idev->name = ACCEL_INPUT_DEV_NAME;
+ idev->uniq = mma8x5x_id2name(pdata->chip_id);
+ idev->id.bustype = BUS_I2C;
+ idev->evbit[0] = BIT_MASK(EV_ABS);
+ input_set_abs_params(idev, ABS_X, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Y, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Z, -0x7fff, 0x7fff, 0, 0);
+ result = input_register_device(idev);
+ if (result) {
+ dev_err(&client->dev, "register input device failed!\n");
+ goto err_register_device;
+ }
+ pdata->idev = idev;
+ device_init_wakeup(&client->dev, true);
+ enable_irq_wake(client->irq);
+ result = request_threaded_irq(client->irq, NULL,
+ mma8x5x_interrupt,
+ IRQ_TYPE_EDGE_RISING | IRQF_ONESHOT | IRQF_NO_SUSPEND,
+ ACCEL_INPUT_DEV_NAME, (void *)client);
+ if (result) {
+ dev_err(&client->dev, "Could not allocate irq(%d) !\n",
+ client->irq);
+ goto err_register_irq;
+ }
+ mma8x5x_device_int_init(client);
+ } else {
+ /* create the input poll device */
+ poll_dev = input_allocate_polled_device();
+ if (!poll_dev) {
+ result = -ENOMEM;
+ dev_err(&client->dev, "alloc poll device failed!\n");
+ goto err_alloc_poll_device;
+ }
+ pdata->poll_dev = poll_dev;
+ pdata->idev = NULL;
+ poll_dev->poll = mma8x5x_dev_poll;
+ poll_dev->poll_interval = POLL_STOP_TIME;
+ poll_dev->poll_interval_min = POLL_INTERVAL_MIN;
+ poll_dev->poll_interval_max = POLL_INTERVAL_MAX;
+ poll_dev->private = pdata;
+ idev = poll_dev->input;
+ idev->name = ACCEL_INPUT_DEV_NAME;
+ idev->uniq = mma8x5x_id2name(pdata->chip_id);
+ idev->id.bustype = BUS_I2C;
+ idev->evbit[0] = BIT_MASK(EV_ABS);
+ input_set_abs_params(idev, ABS_X, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Y, -0x7fff, 0x7fff, 0, 0);
+ input_set_abs_params(idev, ABS_Z, -0x7fff, 0x7fff, 0, 0);
+ result = input_register_polled_device(pdata->poll_dev);
+ if (result) {
+ dev_err(&client->dev, "register poll device failed!\n");
+ goto err_register_device;
+ }
}
result = sysfs_create_group(&idev->dev.kobj, &mma8x5x_attr_group);
if (result) {
@@ -727,7 +966,7 @@
}
pdata->cdev = sensors_cdev;
pdata->cdev.min_delay = POLL_INTERVAL_MIN * 1000;
- pdata->cdev.delay_msec = poll_dev->poll_interval;
+ pdata->cdev.delay_msec = pdata->poll_delay;
pdata->cdev.sensors_enable = mma8x5x_enable_set;
pdata->cdev.sensors_poll_delay = mma8x5x_poll_delay_set;
result = sensors_classdev_register(&client->dev, &pdata->cdev);
@@ -745,9 +984,20 @@
sysfs_remove_group(&idev->dev.kobj, &mma8x5x_attr_group);
err_create_sysfs:
input_unregister_polled_device(pdata->poll_dev);
-err_register_polled_device:
- input_free_polled_device(poll_dev);
+err_register_irq:
+ if (pdata->use_int)
+ device_init_wakeup(&client->dev, false);
+err_register_device:
+ if (pdata->use_int)
+ input_free_device(idev);
+ else
+ input_free_polled_device(pdata->poll_dev);
err_alloc_poll_device:
+err_set_direction:
+ if (gpio_is_valid(pdata->int_pin) && pdata->use_int)
+ gpio_free(pdata->int_pin);
+err_request_gpio:
+err_parse_dt:
kfree(pdata);
err_out:
mma8x5x_config_regulator(client, 0);
@@ -773,6 +1023,9 @@
{
struct i2c_client *client = to_i2c_client(dev);
struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+
+ if (pdata->use_int && pdata->active == MMA_ACTIVED)
+ return 0;
if (pdata->active == MMA_ACTIVED)
mma8x5x_device_stop(client);
if (pdata->active & MMA_SHUTTEDDOWN)
@@ -789,6 +1042,8 @@
struct i2c_client *client = to_i2c_client(dev);
struct mma8x5x_data *pdata = i2c_get_clientdata(client);
+ if (pdata->use_int && pdata->active == MMA_ACTIVED)
+ return 0;
/* No need to power on while device is shutdowned from standby state */
if (pdata->active == (MMA_SHUTTEDDOWN | MMA_STANDBY))
return 0;
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index c6996a4..cd6989c 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -2550,6 +2550,15 @@
.resume = mxt_resume,
#endif
};
+#else
+static int mxt_suspend(struct device *dev)
+{
+ return 0;
+};
+static int mxt_resume(struct device *dev)
+{
+ return 0;
+};
#endif
static int mxt_debugfs_object_show(struct seq_file *m, void *v)
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.c b/drivers/input/touchscreen/gt9xx/gt9xx.c
index a71526a..0d75869 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx.c
+++ b/drivers/input/touchscreen/gt9xx/gt9xx.c
@@ -1,6 +1,6 @@
/* drivers/input/touchscreen/gt9xx.c
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* Linux Foundation chooses to take subject only to the GPLv2 license
* terms, and distributes only under these terms.
@@ -77,12 +77,6 @@
#define GTP_MAX_TOUCH 5
#define GTP_ESD_CHECK_CIRCLE_MS 2000
-#if GTP_HAVE_TOUCH_KEY
-static const u16 touch_key_array[] = {KEY_MENU, KEY_HOMEPAGE, KEY_BACK};
-#define GTP_MAX_KEY_NUM (sizeof(touch_key_array)/sizeof(touch_key_array[0]))
-
-#endif
-
static void gtp_int_sync(struct goodix_ts_data *ts, int ms);
static int gtp_i2c_test(struct i2c_client *client);
static int goodix_power_off(struct goodix_ts_data *ts);
@@ -105,15 +99,14 @@
static int gtp_init_ext_watchdog(struct i2c_client *client);
#endif
-#if GTP_SLIDE_WAKEUP
-enum doze_status {
+enum doze {
DOZE_DISABLED = 0,
DOZE_ENABLED = 1,
DOZE_WAKEUP = 2,
};
-static enum doze_status = DOZE_DISABLED;
+static enum doze doze_status = DOZE_DISABLED;
static s8 gtp_enter_doze(struct goodix_ts_data *ts);
-#endif
+
bool init_done;
static u8 chip_gt9xxs; /* true if ic is gt9xxs, like gt915s */
u8 grp_cfg_version;
@@ -121,6 +114,8 @@
#define GTP_DEBUGFS_DIR "ts_debug"
#define GTP_DEBUGFS_FILE_SUSPEND "suspend"
+#define GTP_DEBUGFS_FILE_DATA "data"
+#define GTP_DEBUGFS_FILE_ADDR "addr"
/*******************************************************
Function:
@@ -161,11 +156,11 @@
dev_err(&client->dev, "I2C retry: %d\n", retries + 1);
}
if (retries == GTP_I2C_RETRY_5) {
-#if GTP_SLIDE_WAKEUP
- /* reset chip would quit doze mode */
- if (DOZE_ENABLED == doze_status)
- return ret;
-#endif
+ if (ts->pdata->slide_wakeup)
+ /* reset chip would quit doze mode */
+ if (DOZE_ENABLED == doze_status)
+ return ret;
+
if (init_done)
gtp_reset_guitar(ts, 10);
else
@@ -207,10 +202,10 @@
dev_err(&client->dev, "I2C retry: %d\n", retries + 1);
}
if ((retries == GTP_I2C_RETRY_5)) {
-#if GTP_SLIDE_WAKEUP
- if (DOZE_ENABLED == doze_status)
- return ret;
-#endif
+ if (ts->pdata->slide_wakeup)
+ if (DOZE_ENABLED == doze_status)
+ return ret;
+
if (init_done)
gtp_reset_guitar(ts, 10);
else
@@ -276,24 +271,25 @@
*********************************************************/
int gtp_send_cfg(struct goodix_ts_data *ts)
{
- int ret;
-#if GTP_DRIVER_SEND_CFG
- int retry = 0;
+ int ret = 0;
+ int retry;
- if (ts->fixed_cfg) {
- dev_dbg(&ts->client->dev,
- "Ic fixed config, no config sent!");
- ret = 2;
- } else {
- for (retry = 0; retry < GTP_I2C_RETRY_5; retry++) {
- ret = gtp_i2c_write(ts->client,
- ts->config_data,
- GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH);
- if (ret > 0)
- break;
+ if (ts->pdata->driver_send_cfg) {
+ if (ts->fixed_cfg) {
+ dev_dbg(&ts->client->dev,
+ "Ic fixed config, no config sent!");
+ ret = 2;
+ } else {
+ for (retry = 0; retry < GTP_I2C_RETRY_5; retry++) {
+ ret = gtp_i2c_write(ts->client,
+ ts->config_data,
+ GTP_CONFIG_MAX_LENGTH +
+ GTP_ADDR_LENGTH);
+ if (ret > 0)
+ break;
+ }
}
}
-#endif
return ret;
}
@@ -353,9 +349,8 @@
static void gtp_touch_down(struct goodix_ts_data *ts, int id, int x, int y,
int w)
{
-#if GTP_CHANGE_X2Y
- swap(x, y);
-#endif
+ if (ts->pdata->change_x2y)
+ swap(x, y);
input_mt_slot(ts->input_dev, id);
input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, true);
@@ -400,9 +395,7 @@
u8 finger = 0;
static u16 pre_touch;
static u8 pre_key;
-#if GTP_WITH_PEN
static u8 pre_pen;
-#endif
u8 key_value = 0;
u8 *coor_data = NULL;
s32 input_x = 0;
@@ -412,10 +405,7 @@
s32 i = 0;
int ret = -1;
struct goodix_ts_data *ts = NULL;
-
-#if GTP_SLIDE_WAKEUP
u8 doze_buf[3] = {0x81, 0x4B};
-#endif
ts = container_of(work, struct goodix_ts_data, work);
#ifdef CONFIG_GT9XX_TOUCHPANEL_UPDATE
@@ -423,55 +413,59 @@
return;
#endif
-#if GTP_SLIDE_WAKEUP
- if (DOZE_ENABLED == doze_status) {
- ret = gtp_i2c_read(ts->client, doze_buf, 3);
- if (ret > 0) {
- if (doze_buf[2] == 0xAA) {
- dev_dbg(&ts->client->dev,
- "Slide(0xAA) To Light up the screen!");
- doze_status = DOZE_WAKEUP;
- input_report_key(
- ts->input_dev, KEY_POWER, 1);
- input_sync(ts->input_dev);
- input_report_key(
- ts->input_dev, KEY_POWER, 0);
- input_sync(ts->input_dev);
- /* clear 0x814B */
- doze_buf[2] = 0x00;
- gtp_i2c_write(ts->client, doze_buf, 3);
- } else if (doze_buf[2] == 0xBB) {
- dev_dbg(&ts->client->dev,
- "Slide(0xBB) To Light up the screen!");
- doze_status = DOZE_WAKEUP;
- input_report_key(ts->input_dev, KEY_POWER, 1);
- input_sync(ts->input_dev);
- input_report_key(ts->input_dev, KEY_POWER, 0);
- input_sync(ts->input_dev);
- /* clear 0x814B*/
- doze_buf[2] = 0x00;
- gtp_i2c_write(ts->client, doze_buf, 3);
- } else if (0xC0 == (doze_buf[2] & 0xC0)) {
- dev_dbg(&ts->client->dev,
- "double click to light up the screen!");
- doze_status = DOZE_WAKEUP;
- input_report_key(ts->input_dev, KEY_POWER, 1);
- input_sync(ts->input_dev);
- input_report_key(ts->input_dev, KEY_POWER, 0);
- input_sync(ts->input_dev);
- /* clear 0x814B */
- doze_buf[2] = 0x00;
- gtp_i2c_write(ts->client, doze_buf, 3);
- } else {
- gtp_enter_doze(ts);
+ if (ts->pdata->slide_wakeup) {
+ if (DOZE_ENABLED == doze_status) {
+ ret = gtp_i2c_read(ts->client, doze_buf, 3);
+ if (ret > 0) {
+ if (doze_buf[2] == 0xAA) {
+ dev_dbg(&ts->client->dev,
+ "Slide(0xAA) To Light up the screen!");
+ doze_status = DOZE_WAKEUP;
+ input_report_key(
+ ts->input_dev, KEY_POWER, 1);
+ input_sync(ts->input_dev);
+ input_report_key(
+ ts->input_dev, KEY_POWER, 0);
+ input_sync(ts->input_dev);
+ /* clear 0x814B */
+ doze_buf[2] = 0x00;
+ gtp_i2c_write(ts->client, doze_buf, 3);
+ } else if (doze_buf[2] == 0xBB) {
+ dev_dbg(&ts->client->dev,
+ "Slide(0xBB) To Light up the screen!");
+ doze_status = DOZE_WAKEUP;
+ input_report_key(ts->input_dev,
+ KEY_POWER, 1);
+ input_sync(ts->input_dev);
+ input_report_key(ts->input_dev,
+ KEY_POWER, 0);
+ input_sync(ts->input_dev);
+ /* clear 0x814B*/
+ doze_buf[2] = 0x00;
+ gtp_i2c_write(ts->client, doze_buf, 3);
+ } else if (0xC0 == (doze_buf[2] & 0xC0)) {
+ dev_dbg(&ts->client->dev,
+ "double click to light up the screen!");
+ doze_status = DOZE_WAKEUP;
+ input_report_key(ts->input_dev,
+ KEY_POWER, 1);
+ input_sync(ts->input_dev);
+ input_report_key(ts->input_dev,
+ KEY_POWER, 0);
+ input_sync(ts->input_dev);
+ /* clear 0x814B */
+ doze_buf[2] = 0x00;
+ gtp_i2c_write(ts->client, doze_buf, 3);
+ } else {
+ gtp_enter_doze(ts);
+ }
}
- }
- if (ts->use_irq)
- gtp_irq_enable(ts);
+ if (ts->use_irq)
+ gtp_irq_enable(ts);
- return;
+ return;
+ }
}
-#endif
ret = gtp_i2c_read(ts->client, point_data, 12);
if (ret < 0) {
@@ -512,15 +506,16 @@
pre_key = key_value;
-#if GTP_WITH_PEN
- if (pre_pen && (touch_num == 0)) {
- dev_dbg(&ts->client->dev, "Pen touch UP(Slot)!");
- input_report_key(ts->input_dev, BTN_TOOL_PEN, 0);
- input_mt_slot(ts->input_dev, 5);
- input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, -1);
- pre_pen = 0;
+ if (ts->pdata->with_pen) {
+ if (pre_pen && (touch_num == 0)) {
+ dev_dbg(&ts->client->dev, "Pen touch UP(Slot)!");
+ input_report_key(ts->input_dev, BTN_TOOL_PEN, 0);
+ input_mt_slot(ts->input_dev, 5);
+ input_report_abs(ts->input_dev, ABS_MT_TRACKING_ID, -1);
+ pre_pen = 0;
+ }
}
-#endif
+
if (pre_touch || touch_num) {
s32 pos = 0;
u16 touch_index = 0;
@@ -528,45 +523,45 @@
coor_data = &point_data[3];
if (touch_num) {
id = coor_data[pos] & 0x0F;
-#if GTP_WITH_PEN
- id = coor_data[pos];
- if (id == 128) {
- dev_dbg(&ts->client->dev,
- "Pen touch DOWN(Slot)!");
- input_x = coor_data[pos + 1]
- | (coor_data[pos + 2] << 8);
- input_y = coor_data[pos + 3]
- | (coor_data[pos + 4] << 8);
- input_w = coor_data[pos + 5]
- | (coor_data[pos + 6] << 8);
+ if (ts->pdata->with_pen) {
+ id = coor_data[pos];
+ if (id == 128) {
+ dev_dbg(&ts->client->dev,
+ "Pen touch DOWN(Slot)!");
+ input_x = coor_data[pos + 1]
+ | (coor_data[pos + 2] << 8);
+ input_y = coor_data[pos + 3]
+ | (coor_data[pos + 4] << 8);
+ input_w = coor_data[pos + 5]
+ | (coor_data[pos + 6] << 8);
- input_report_key(ts->input_dev,
- BTN_TOOL_PEN, 1);
- input_mt_slot(ts->input_dev, 5);
- input_report_abs(ts->input_dev,
- ABS_MT_TRACKING_ID, 5);
- input_report_abs(ts->input_dev,
- ABS_MT_POSITION_X, input_x);
- input_report_abs(ts->input_dev,
- ABS_MT_POSITION_Y, input_y);
- input_report_abs(ts->input_dev,
- ABS_MT_TOUCH_MAJOR, input_w);
- dev_dbg(&ts->client->dev,
- "Pen/Stylus: (%d, %d)[%d]",
- input_x, input_y, input_w);
- pre_pen = 1;
- pre_touch = 0;
+ input_report_key(ts->input_dev,
+ BTN_TOOL_PEN, 1);
+ input_mt_slot(ts->input_dev, 5);
+ input_report_abs(ts->input_dev,
+ ABS_MT_TRACKING_ID, 5);
+ input_report_abs(ts->input_dev,
+ ABS_MT_POSITION_X, input_x);
+ input_report_abs(ts->input_dev,
+ ABS_MT_POSITION_Y, input_y);
+ input_report_abs(ts->input_dev,
+ ABS_MT_TOUCH_MAJOR, input_w);
+ dev_dbg(&ts->client->dev,
+ "Pen/Stylus: (%d, %d)[%d]",
+ input_x, input_y, input_w);
+ pre_pen = 1;
+ pre_touch = 0;
+ }
}
-#endif
touch_index |= (0x01<<id);
}
for (i = 0; i < GTP_MAX_TOUCH; i++) {
-#if GTP_WITH_PEN
- if (pre_pen == 1)
- break;
-#endif
+ if (ts->pdata->with_pen)
+ if (pre_pen == 1)
+ break;
+
if (touch_index & (0x01<<i)) {
input_x = coor_data[pos + 1] |
coor_data[pos + 2] << 8;
@@ -671,7 +666,6 @@
}
#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_FB)
-#if GTP_SLIDE_WAKEUP
/*******************************************************
Function:
Enter doze mode for sliding wakeup.
@@ -688,9 +682,9 @@
(u8)(GTP_REG_SLEEP >> 8),
(u8)GTP_REG_SLEEP, 8};
-#if GTP_DBL_CLK_WAKEUP
- i2c_control_buf[2] = 0x09;
-#endif
+ if (ts->pdata->dbl_clk_wakeup)
+ i2c_control_buf[2] = 0x09;
+
gtp_irq_disable(ts);
while (retry++ < GTP_I2C_RETRY_3) {
@@ -719,7 +713,6 @@
gtp_irq_enable(ts);
return ret;
}
-#else
/**
* gtp_enter_sleep - Enter sleep mode
* @ts: driver private data
@@ -765,7 +758,6 @@
return ret;
}
}
-#endif /* !GTP_SLIDE_WAKEUP */
/*******************************************************
Function:
@@ -811,33 +803,33 @@
"Wakeup sleep send config success.");
} else {
err_retry:
-#if GTP_SLIDE_WAKEUP
- /* wakeup not by slide */
- if (DOZE_WAKEUP != doze_status)
- gtp_reset_guitar(ts, 10);
- else
- /* wakeup by slide */
- doze_status = DOZE_DISABLED;
-#else
- if (chip_gt9xxs == 1) {
- gtp_reset_guitar(ts, 10);
+ if (ts->pdata->slide_wakeup) { /* wakeup not by slide */
+ if (DOZE_WAKEUP != doze_status)
+ gtp_reset_guitar(ts, 10);
+ else
+ /* wakeup by slide */
+ doze_status = DOZE_DISABLED;
} else {
- ret = gpio_direction_output(ts->pdata->irq_gpio, 1);
- usleep(5000);
+ if (chip_gt9xxs == 1) {
+ gtp_reset_guitar(ts, 10);
+ } else {
+ ret = gpio_direction_output(
+ ts->pdata->irq_gpio, 1);
+ usleep(5000);
+ }
}
-#endif
ret = gtp_i2c_test(ts->client);
if (ret == 2) {
dev_dbg(&ts->client->dev, "GTP wakeup sleep.");
-#if (!GTP_SLIDE_WAKEUP)
- if (chip_gt9xxs == 0) {
- gtp_int_sync(ts, 25);
- msleep(20);
+ if (!ts->pdata->slide_wakeup) {
+ if (chip_gt9xxs == 0) {
+ gtp_int_sync(ts, 25);
+ msleep(20);
#if GTP_ESD_PROTECT
- gtp_init_ext_watchdog(ts->client);
+ gtp_init_ext_watchdog(ts->client);
#endif
+ }
}
-#endif
return ret;
}
gtp_reset_guitar(ts, 20);
@@ -861,123 +853,126 @@
static int gtp_init_panel(struct goodix_ts_data *ts)
{
struct i2c_client *client = ts->client;
- unsigned char *config_data;
+ unsigned char *config_data = NULL;
int ret = -EIO;
-
-#if GTP_DRIVER_SEND_CFG
int i;
u8 check_sum = 0;
u8 opr_buf[16];
u8 sensor_id = 0;
- for (i = 0; i < GOODIX_MAX_CFG_GROUP; i++)
- dev_dbg(&client->dev, "Config Groups(%d) Lengths: %d",
- i, ts->pdata->config_data_len[i]);
+ if (ts->pdata->driver_send_cfg) {
+ for (i = 0; i < GOODIX_MAX_CFG_GROUP; i++)
+ dev_dbg(&client->dev, "Config Groups(%d) Lengths: %d",
+ i, ts->pdata->config_data_len[i]);
- ret = gtp_i2c_read_dbl_check(ts->client, 0x41E4, opr_buf, 1);
- if (SUCCESS == ret) {
- if (opr_buf[0] != 0xBE) {
- ts->fw_error = 1;
+ ret = gtp_i2c_read_dbl_check(ts->client, 0x41E4, opr_buf, 1);
+ if (SUCCESS == ret) {
+ if (opr_buf[0] != 0xBE) {
+ ts->fw_error = 1;
+ dev_err(&client->dev,
+ "Firmware error, no config sent!");
+ return -EINVAL;
+ }
+ }
+
+ for (i = 1; i < GOODIX_MAX_CFG_GROUP; i++) {
+ if (ts->pdata->config_data_len[i])
+ break;
+ }
+
+ if (i == GOODIX_MAX_CFG_GROUP) {
+ sensor_id = 0;
+ } else {
+ ret = gtp_i2c_read_dbl_check(ts->client,
+ GTP_REG_SENSOR_ID, &sensor_id, 1);
+ if (SUCCESS == ret) {
+ if (sensor_id >= GOODIX_MAX_CFG_GROUP) {
+ dev_err(&client->dev,
+ "Invalid sensor_id(0x%02X), No Config Sent!",
+ sensor_id);
+ return -EINVAL;
+ }
+ } else {
+ dev_err(&client->dev,
+ "Failed to get sensor_id, No config sent!");
+ return -EINVAL;
+ }
+ }
+
+ dev_info(&client->dev, "Sensor ID selected: %d", sensor_id);
+
+ if (ts->pdata->config_data_len[sensor_id] <
+ GTP_CONFIG_MIN_LENGTH ||
+ !ts->pdata->config_data[sensor_id]) {
dev_err(&client->dev,
- "Firmware error, no config sent!");
+ "Sensor_ID(%d) matches with NULL or invalid config group!\n",
+ sensor_id);
return -EINVAL;
}
- }
- for (i = 1; i < GOODIX_MAX_CFG_GROUP; i++) {
- if (ts->pdata->config_data_len[i])
- break;
- }
- if (i == GOODIX_MAX_CFG_GROUP) {
- sensor_id = 0;
- } else {
- ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_SENSOR_ID,
- &sensor_id, 1);
- if (SUCCESS == ret) {
- if (sensor_id >= GOODIX_MAX_CFG_GROUP) {
- dev_err(&client->dev,
- "Invalid sensor_id(0x%02X), No Config Sent!",
- sensor_id);
- return -EINVAL;
+ ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CONFIG_DATA,
+ &opr_buf[0], 1);
+ if (ret == SUCCESS) {
+ if (opr_buf[0] < 90) {
+ /* backup group config version */
+ grp_cfg_version =
+ ts->pdata->
+ config_data[sensor_id][GTP_ADDR_LENGTH];
+ ts->pdata->
+ config_data[sensor_id][GTP_ADDR_LENGTH]
+ = 0x00;
+ ts->fixed_cfg = 0;
+ } else {
+ /* treated as fixed config, not send config */
+ dev_warn(&client->dev,
+ "Ic fixed config with config version(%d, 0x%02X)",
+ opr_buf[0], opr_buf[0]);
+ ts->fixed_cfg = 1;
}
} else {
dev_err(&client->dev,
- "Failed to get sensor_id, No config sent!");
+ "Failed to get ic config version!No config sent!");
return -EINVAL;
}
- }
- dev_info(&client->dev, "Sensor ID selected: %d", sensor_id);
-
- if (ts->pdata->config_data_len[sensor_id] < GTP_CONFIG_MIN_LENGTH ||
- !ts->pdata->config_data[sensor_id]) {
- dev_err(&client->dev,
- "Sensor_ID(%d) matches with NULL or invalid config group!\n",
- sensor_id);
- return -EINVAL;
- }
-
- ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CONFIG_DATA,
- &opr_buf[0], 1);
- if (ret == SUCCESS) {
- if (opr_buf[0] < 90) {
- /* backup group config version */
- grp_cfg_version =
- ts->pdata->config_data[sensor_id][GTP_ADDR_LENGTH];
- ts->pdata->config_data[sensor_id][GTP_ADDR_LENGTH] =
- 0x00;
- ts->fixed_cfg = 0;
- } else {
- /* treated as fixed config, not send config */
- dev_warn(&client->dev,
- "Ic fixed config with config version(%d, 0x%02X)",
- opr_buf[0], opr_buf[0]);
- ts->fixed_cfg = 1;
- }
- } else {
- dev_err(&client->dev,
- "Failed to get ic config version!No config sent!");
- return -EINVAL;
- }
-
- config_data = ts->pdata->config_data[sensor_id];
- ts->config_data = ts->pdata->config_data[sensor_id];
- ts->gtp_cfg_len = ts->pdata->config_data_len[sensor_id];
+ config_data = ts->pdata->config_data[sensor_id];
+ ts->config_data = ts->pdata->config_data[sensor_id];
+ ts->gtp_cfg_len = ts->pdata->config_data_len[sensor_id];
#if GTP_CUSTOM_CFG
- config_data[RESOLUTION_LOC] =
- (unsigned char)(GTP_MAX_WIDTH && 0xFF);
- config_data[RESOLUTION_LOC + 1] =
- (unsigned char)(GTP_MAX_WIDTH >> 8);
- config_data[RESOLUTION_LOC + 2] =
- (unsigned char)(GTP_MAX_HEIGHT && 0xFF);
- config_data[RESOLUTION_LOC + 3] =
- (unsigned char)(GTP_MAX_HEIGHT >> 8);
+ config_data[RESOLUTION_LOC] =
+ (unsigned char)(GTP_MAX_WIDTH && 0xFF);
+ config_data[RESOLUTION_LOC + 1] =
+ (unsigned char)(GTP_MAX_WIDTH >> 8);
+ config_data[RESOLUTION_LOC + 2] =
+ (unsigned char)(GTP_MAX_HEIGHT && 0xFF);
+ config_data[RESOLUTION_LOC + 3] =
+ (unsigned char)(GTP_MAX_HEIGHT >> 8);
- if (GTP_INT_TRIGGER == 0)
- config_data[TRIGGER_LOC] &= 0xfe;
- else if (GTP_INT_TRIGGER == 1)
- config_data[TRIGGER_LOC] |= 0x01;
+ if (GTP_INT_TRIGGER == 0)
+ config_data[TRIGGER_LOC] &= 0xfe;
+ else if (GTP_INT_TRIGGER == 1)
+ config_data[TRIGGER_LOC] |= 0x01;
#endif /* !GTP_CUSTOM_CFG */
- check_sum = 0;
- for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++)
- check_sum += config_data[i];
+ check_sum = 0;
+ for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++)
+ check_sum += config_data[i];
- config_data[ts->gtp_cfg_len] = (~check_sum) + 1;
+ config_data[ts->gtp_cfg_len] = (~check_sum) + 1;
-#else /* DRIVER NOT SEND CONFIG */
- ts->gtp_cfg_len = GTP_CONFIG_MAX_LENGTH;
- ret = gtp_i2c_read(ts->client, config_data,
+ } else { /* DRIVER NOT SEND CONFIG */
+ ts->gtp_cfg_len = GTP_CONFIG_MAX_LENGTH;
+ ret = gtp_i2c_read(ts->client, config_data,
ts->gtp_cfg_len + GTP_ADDR_LENGTH);
- if (ret < 0) {
- dev_err(&client->dev,
+ if (ret < 0) {
+ dev_err(&client->dev,
"Read Config Failed, Using DEFAULT Resolution & INT Trigger!\n");
- ts->abs_x_max = GTP_MAX_WIDTH;
- ts->abs_y_max = GTP_MAX_HEIGHT;
- ts->int_trigger_type = GTP_INT_TRIGGER;
- }
-#endif /* !DRIVER NOT SEND CONFIG */
+ ts->abs_x_max = GTP_MAX_WIDTH;
+ ts->abs_y_max = GTP_MAX_HEIGHT;
+ ts->int_trigger_type = GTP_INT_TRIGGER;
+ }
+ } /* !DRIVER NOT SEND CONFIG */
if ((ts->abs_x_max == 0) && (ts->abs_y_max == 0)) {
ts->abs_x_max = (config_data[RESOLUTION_LOC + 1] << 8)
@@ -1211,9 +1206,7 @@
{
int ret;
char phys[PHY_BUF_SIZE];
-#if GTP_HAVE_TOUCH_KEY
int index = 0;
-#endif
ts->input_dev = input_allocate_device();
if (ts->input_dev == NULL) {
@@ -1228,27 +1221,24 @@
__set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit);
input_mt_init_slots(ts->input_dev, 10);/* in case of "out of memory" */
-
- for (index = 0; index < ts->pdata->num_button; index++) {
- input_set_capability(ts->input_dev,
+ if (ts->pdata->have_touch_key) {
+ for (index = 0; index < ts->pdata->num_button; index++) {
+ input_set_capability(ts->input_dev,
EV_KEY, ts->pdata->button_map[index]);
+ }
}
+ if (ts->pdata->slide_wakeup)
+ input_set_capability(ts->input_dev, EV_KEY, KEY_POWER);
-#if GTP_SLIDE_WAKEUP
- input_set_capability(ts->input_dev, EV_KEY, KEY_POWER);
-#endif
+ if (ts->pdata->with_pen) { /* pen support */
+ __set_bit(BTN_TOOL_PEN, ts->input_dev->keybit);
+ __set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit);
+ __set_bit(INPUT_PROP_POINTER, ts->input_dev->propbit);
+ }
-#if GTP_WITH_PEN
- /* pen support */
- __set_bit(BTN_TOOL_PEN, ts->input_dev->keybit);
- __set_bit(INPUT_PROP_DIRECT, ts->input_dev->propbit);
- __set_bit(INPUT_PROP_POINTER, ts->input_dev->propbit);
-#endif
-
-#if GTP_CHANGE_X2Y
- swap(ts->abs_x_max, ts->abs_y_max);
-#endif
+ if (ts->pdata->change_x2y)
+ swap(ts->abs_x_max, ts->abs_y_max);
input_set_abs_params(ts->input_dev, ABS_MT_POSITION_X,
0, ts->abs_x_max, 0, 0);
@@ -1528,12 +1518,105 @@
return size;
}
+static ssize_t gtp_fw_upgrade_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct goodix_ts_data *ts = dev_get_drvdata(dev);
+ return snprintf(buf, 2, "%d\n", ts->fw_loading);
+}
+
+static ssize_t gtp_fw_upgrade_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct goodix_ts_data *ts = dev_get_drvdata(dev);
+ unsigned int val;
+ int ret;
+
+ if (size > 2)
+ return -EINVAL;
+
+ if (sscanf(buf, "%u", &val) != 1);
+ return -EINVAL;
+
+ if (ts->gtp_is_suspend) {
+ dev_err(&ts->client->dev,
+ "Can't start fw upgrade. Device is in suspend state.");
+ return -EBUSY;
+ }
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (!ts->fw_loading && val) {
+ disable_irq(ts->client->irq);
+ ts->fw_loading = true;
+ if (config_enabled(CONFIG_GT9XX_TOUCHPANEL_UPDATE)) {
+ ret = gup_update_proc(NULL);
+ if (ret == FAIL)
+ dev_err(&ts->client->dev,
+ "Fail to update GTP firmware.\n");
+ }
+ ts->fw_loading = false;
+ enable_irq(ts->client->irq);
+ }
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return size;
+}
+
+static ssize_t gtp_force_fw_upgrade_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct goodix_ts_data *ts = dev_get_drvdata(dev);
+ unsigned int val;
+ int ret;
+
+ if (size > 2)
+ return -EINVAL;
+
+ if (sscanf(buf, "%u", &val) != 1);
+ return -EINVAL;
+
+ if (ts->gtp_is_suspend) {
+ dev_err(&ts->client->dev,
+ "Can't start fw upgrade. Device is in suspend state.");
+ return -EBUSY;
+ }
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (!ts->fw_loading && val) {
+ disable_irq(ts->client->irq);
+ ts->fw_loading = true;
+ ts->force_update = true;
+ if (config_enabled(CONFIG_GT9XX_TOUCHPANEL_UPDATE)) {
+ ret = gup_update_proc(NULL);
+ if (ret == FAIL)
+ dev_err(&ts->client->dev,
+ "Fail to force update GTP firmware.\n");
+ }
+ ts->force_update = false;
+ ts->fw_loading = false;
+ enable_irq(ts->client->irq);
+ }
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return size;
+}
+
static DEVICE_ATTR(fw_name, (S_IRUGO | S_IWUSR | S_IWGRP),
gtp_fw_name_show,
gtp_fw_name_store);
+static DEVICE_ATTR(fw_upgrade, (S_IRUGO | S_IWUSR | S_IWGRP),
+ gtp_fw_upgrade_show,
+ gtp_fw_upgrade_store);
+static DEVICE_ATTR(force_fw_upgrade, (S_IRUGO | S_IWUSR | S_IWGRP),
+ gtp_fw_upgrade_show,
+ gtp_force_fw_upgrade_store);
static struct attribute *gtp_attrs[] = {
&dev_attr_fw_name.attr,
+ &dev_attr_fw_upgrade.attr,
+ &dev_attr_force_fw_upgrade.attr,
NULL
};
@@ -1541,6 +1624,84 @@
.attrs = gtp_attrs,
};
+static int gtp_debug_addr_is_valid(u16 addr)
+{
+ if (addr < GTP_VALID_ADDR_START || addr > GTP_VALID_ADDR_END) {
+ pr_err("GTP reg address is invalid: 0x%x\n", addr);
+ return false;
+ }
+
+ return true;
+}
+
+static int gtp_debug_data_set(void *_data, u64 val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (gtp_debug_addr_is_valid(ts->addr))
+ dev_err(&ts->client->dev,
+ "Writing to GTP registers not supported.\n");
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+static int gtp_debug_data_get(void *_data, u64 *val)
+{
+ struct goodix_ts_data *ts = _data;
+ int ret;
+ u8 buf[3] = {0};
+
+ mutex_lock(&ts->input_dev->mutex);
+ buf[0] = ts->addr >> 8;
+ buf[1] = ts->addr & 0x00ff;
+
+ if (gtp_debug_addr_is_valid(ts->addr)) {
+ ret = gtp_i2c_read(ts->client, buf, 3);
+ if (ret < 0)
+ dev_err(&ts->client->dev,
+ "GTP read register 0x%x failed (%d)\n",
+ ts->addr, ret);
+ else
+ *val = buf[2];
+ }
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_data_fops, gtp_debug_data_get,
+ gtp_debug_data_set, "%llx\n");
+
+static int gtp_debug_addr_set(void *_data, u64 val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ if (gtp_debug_addr_is_valid(val)) {
+ mutex_lock(&ts->input_dev->mutex);
+ ts->addr = val;
+ mutex_unlock(&ts->input_dev->mutex);
+ }
+
+ return 0;
+}
+
+static int gtp_debug_addr_get(void *_data, u64 *val)
+{
+ struct goodix_ts_data *ts = _data;
+
+ mutex_lock(&ts->input_dev->mutex);
+ if (gtp_debug_addr_is_valid(ts->addr))
+ *val = ts->addr;
+ mutex_unlock(&ts->input_dev->mutex);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_addr_fops, gtp_debug_addr_get,
+ gtp_debug_addr_set, "%llx\n");
+
static int gtp_debug_suspend_set(void *_data, u64 val)
{
struct goodix_ts_data *ts = _data;
@@ -1574,7 +1735,7 @@
data->debug_base = debugfs_create_dir(GTP_DEBUGFS_DIR, NULL);
if (IS_ERR_OR_NULL(data->debug_base)) {
- pr_err("Failed to create debugfs dir.\n");
+ dev_err(&data->client->dev, "Failed to create debugfs dir.\n");
return -EINVAL;
}
@@ -1583,7 +1744,27 @@
data->debug_base,
data,
&debug_suspend_fops)))) {
- pr_err("Failed to create suspend file.\n");
+ dev_err(&data->client->dev, "Failed to create suspend file.\n");
+ debugfs_remove_recursive(data->debug_base);
+ return -EINVAL;
+ }
+
+ if ((IS_ERR_OR_NULL(debugfs_create_file(GTP_DEBUGFS_FILE_DATA,
+ S_IWUSR | S_IWGRP | S_IRUSR | S_IRGRP,
+ data->debug_base,
+ data,
+ &debug_data_fops)))) {
+ dev_err(&data->client->dev, "Failed to create data file.\n");
+ debugfs_remove_recursive(data->debug_base);
+ return -EINVAL;
+ }
+
+ if ((IS_ERR_OR_NULL(debugfs_create_file(GTP_DEBUGFS_FILE_ADDR,
+ S_IWUSR | S_IWGRP | S_IRUSR | S_IRGRP,
+ data->debug_base,
+ data,
+ &debug_addr_fops)))) {
+ dev_err(&data->client->dev, "Failed to create addr file.\n");
debugfs_remove_recursive(data->debug_base);
return -EINVAL;
}
@@ -1652,11 +1833,30 @@
pdata->i2c_pull_up = of_property_read_bool(np,
"goodix,i2c-pull-up");
- pdata->no_force_update = of_property_read_bool(np,
- "goodix,no-force-update");
+ pdata->force_update = of_property_read_bool(np,
+ "goodix,force-update");
pdata->enable_power_off = of_property_read_bool(np,
"goodix,enable-power-off");
+
+ pdata->have_touch_key = of_property_read_bool(np,
+ "goodix,have-touch-key");
+
+ pdata->driver_send_cfg = of_property_read_bool(np,
+ "goodix,driver-send-cfg");
+
+ pdata->change_x2y = of_property_read_bool(np,
+ "goodix,change-x2y");
+
+ pdata->with_pen = of_property_read_bool(np,
+ "goodix,with-pen");
+
+ pdata->slide_wakeup = of_property_read_bool(np,
+ "goodix,slide-wakeup");
+
+ pdata->dbl_clk_wakeup = of_property_read_bool(np,
+ "goodix,dbl_clk_wakeup");
+
/* reset, irq gpio info */
pdata->reset_gpio = of_get_named_gpio_flags(np, "reset-gpios",
0, &pdata->reset_gpio_flags);
@@ -1771,9 +1971,7 @@
return -EINVAL;
}
-#if GTP_ESD_PROTECT
i2c_connect_client = client;
-#endif
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "GTP I2C not supported\n");
@@ -1823,19 +2021,21 @@
goto exit_power_off;
}
+ if (pdata->force_update)
+ ts->force_update = true;
+
if (pdata->fw_name)
strlcpy(ts->fw_name, pdata->fw_name,
strlen(pdata->fw_name) + 1);
-#ifdef CONFIG_GT9XX_TOUCHPANEL_UPDATE
- ret = gup_init_update_proc(ts);
- if (ret < 0) {
- dev_err(&client->dev,
- "GTP Create firmware update thread error.\n");
- goto exit_power_off;
+ if (config_enabled(CONFIG_GT9XX_TOUCHPANEL_UPDATE)) {
+ ret = gup_init_update_proc(ts);
+ if (ret < 0) {
+ dev_err(&client->dev,
+ "GTP Create firmware update thread error.\n");
+ goto exit_power_off;
+ }
}
-#endif
-
ret = gtp_init_panel(ts);
if (ret < 0) {
dev_err(&client->dev, "GTP init panel failed.\n");
@@ -1920,8 +2120,6 @@
#endif
if (ts->use_irq)
free_irq(client->irq, ts);
- else
- hrtimer_cancel(&ts->timer);
cancel_work_sync(&ts->work);
flush_workqueue(ts->goodix_wq);
destroy_workqueue(ts->goodix_wq);
@@ -1985,8 +2183,6 @@
if (ts) {
if (ts->use_irq)
free_irq(client->irq, ts);
- else
- hrtimer_cancel(&ts->timer);
cancel_work_sync(&ts->work);
flush_workqueue(ts->goodix_wq);
@@ -2032,27 +2228,33 @@
}
mutex_lock(&ts->lock);
+
+ if (ts->fw_loading) {
+ dev_info(&ts->client->dev,
+ "Fw upgrade in progress, can't go to suspend.");
+ mutex_unlock(&ts->lock);
+ return 0;
+ }
+
#if GTP_ESD_PROTECT
gtp_esd_switch(ts->client, SWITCH_OFF);
#endif
-#if GTP_SLIDE_WAKEUP
- ret = gtp_enter_doze(ts);
-#else
- if (ts->use_irq)
- gtp_irq_disable(ts);
- else
- hrtimer_cancel(&ts->timer);
+ if (ts->pdata->slide_wakeup) {
+ ret = gtp_enter_doze(ts);
+ } else {
+ if (ts->use_irq)
+ gtp_irq_disable(ts);
- for (i = 0; i < GTP_MAX_TOUCH; i++)
- gtp_touch_up(ts, i);
+ for (i = 0; i < GTP_MAX_TOUCH; i++)
+ gtp_touch_up(ts, i);
- input_sync(ts->input_dev);
+ input_sync(ts->input_dev);
- ret = gtp_enter_sleep(ts);
-#endif
- if (ret < 0)
- dev_err(&ts->client->dev, "GTP early suspend failed.\n");
+ ret = gtp_enter_sleep(ts);
+ if (ret < 0)
+ dev_err(&ts->client->dev, "GTP early suspend failed.\n");
+ }
/* to avoid waking up while not sleeping,
* delay 48 + 10ms to ensure reliability
*/
@@ -2084,18 +2286,14 @@
mutex_lock(&ts->lock);
ret = gtp_wakeup_sleep(ts);
-#if GTP_SLIDE_WAKEUP
- doze_status = DOZE_DISABLED;
-#endif
+ if (ts->pdata->slide_wakeup)
+ doze_status = DOZE_DISABLED;
if (ret <= 0)
dev_err(&ts->client->dev, "GTP resume failed.\n");
if (ts->use_irq)
gtp_irq_enable(ts);
- else
- hrtimer_start(&ts->timer,
- ktime_set(1, 0), HRTIMER_MODE_REL);
#if GTP_ESD_PROTECT
gtp_esd_switch(ts->client, SWITCH_ON);
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.h b/drivers/input/touchscreen/gt9xx/gt9xx.h
index 6e59b29..3cedf26 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx.h
+++ b/drivers/input/touchscreen/gt9xx/gt9xx.h
@@ -1,6 +1,6 @@
/* drivers/input/touchscreen/gt9xx.h
*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* Linux Foundation chooses to take subject only to the GPLv2 license
* terms, and distributes only under these terms.
@@ -56,13 +56,19 @@
u32 panel_miny;
u32 panel_maxx;
u32 panel_maxy;
- bool no_force_update;
+ bool force_update;
bool i2c_pull_up;
bool enable_power_off;
size_t config_data_len[GOODIX_MAX_CFG_GROUP];
u8 *config_data[GOODIX_MAX_CFG_GROUP];
u32 button_map[MAX_BUTTONS];
u8 num_button;
+ bool have_touch_key;
+ bool driver_send_cfg;
+ bool change_x2y;
+ bool with_pen;
+ bool slide_wakeup;
+ bool dbl_clk_wakeup;
};
struct goodix_ts_data {
spinlock_t irq_lock;
@@ -78,6 +84,7 @@
s32 use_irq;
u16 abs_x_max;
u16 abs_y_max;
+ u16 addr;
u8 max_touch_num;
u8 int_trigger_type;
u8 green_wake_mode;
@@ -92,6 +99,8 @@
u8 fw_error;
bool power_on;
struct mutex lock;
+ bool fw_loading;
+ bool force_update;
struct regulator *avdd;
struct regulator *vdd;
struct regulator *vcc_i2c;
@@ -108,21 +117,7 @@
/***************************PART1:ON/OFF define*******************************/
#define GTP_CUSTOM_CFG 0
-#define GTP_CHANGE_X2Y 0
-#define GTP_DRIVER_SEND_CFG 1
-#define GTP_HAVE_TOUCH_KEY 1
-
-/* auto updated by head_fw_array in gt9xx_firmware.h,
- * function together with CONFIG_GT9XX_TOUCHPANEL_UPDATE */
-#define GTP_HEADER_FW_UPDATE 0
-
#define GTP_ESD_PROTECT 0
-#define GTP_WITH_PEN 0
-
-/* This cannot work when enable-power-off is on */
-#define GTP_SLIDE_WAKEUP 0
-/* double-click wakeup, function together with GTP_SLIDE_WAKEUP */
-#define GTP_DBL_CLK_WAKEUP 0
#define GTP_IRQ_TAB {\
IRQ_TYPE_EDGE_RISING,\
@@ -180,6 +175,8 @@
/* HIGH: 0x28/0x29, LOW: 0xBA/0xBB */
#define GTP_I2C_ADDRESS_HIGH 0x14
#define GTP_I2C_ADDRESS_LOW 0x5D
+#define GTP_VALID_ADDR_START 0x8040
+#define GTP_VALID_ADDR_END 0x8177
#define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0]))
@@ -220,11 +217,9 @@
void uninit_wr_node(void);
#endif
-#ifdef CONFIG_GT9XX_TOUCHPANEL_UPDATE
-extern u8 gup_init_update_proc(struct goodix_ts_data *ts);
+u8 gup_init_update_proc(struct goodix_ts_data *ts);
s32 gup_enter_update_mode(struct i2c_client *client);
void gup_leave_update_mode(struct i2c_client *client);
s32 gup_update_proc(void *dir);
extern struct i2c_client *i2c_connect_client;
-#endif
#endif /* _GOODIX_GT9XX_H_ */
diff --git a/drivers/input/touchscreen/gt9xx/gt9xx_update.c b/drivers/input/touchscreen/gt9xx/gt9xx_update.c
index 6d30f0c..af80eef 100644
--- a/drivers/input/touchscreen/gt9xx/gt9xx_update.c
+++ b/drivers/input/touchscreen/gt9xx/gt9xx_update.c
@@ -1,7 +1,7 @@
/* drivers/input/touchscreen/gt9xx_update.c
*
* 2010 - 2012 Goodix Technology.
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -36,12 +36,6 @@
#include <linux/workqueue.h>
#include <linux/kernel.h>
-#if GTP_HEADER_FW_UPDATE
-#include <linux/namei.h>
-#include <linux/mount.h>
-#include "gt9xx_firmware.h"
-#endif
-
#define FIRMWARE_NAME_LEN_MAX 256
#define GUP_REG_HW_INFO 0x4220
@@ -642,26 +636,6 @@
return ret;
}
-#if GTP_HEADER_FW_UPDATE
-static u32 gup_get firmware_file(struct i2c_client,
- struct st_update_msg *msg, u8 *path)
-{
- if (sizeiof(header_fw_array) < (FW_HEAD_LENGTH +
- FW_SECTION_LENGTH * 4 +
- FW_DSP_ISP_LENGTH +
- FW_DSP_LENGTH +
- FW_BOOT_LENGTH)) {
- dev_err(&client->dev,
- "INVALID header_fw_array!");
- return -EINVAL;
- }
- msg->fw_data = (u8 *)header_fw_array;
- msg->fw_len = sizeof(header_fw_array);
- dev_dbg(&client->dev, "Found firmware from header file, len=%d",
- msg->fw_len);
- return 0;
-}
-#else
static s32 gup_get_firmware_file(struct i2c_client *client,
struct st_update_msg *msg, u8 *path)
{
@@ -691,7 +665,6 @@
release_firmware(fw);
return 0;
}
-#endif
static u8 gup_check_firmware_name(struct i2c_client *client,
u8 **path_p)
@@ -1459,10 +1432,15 @@
goto file_fail;
}
- ret = gup_enter_update_judge(ts->client, &fw_head);
- if (ret == FAIL) {
- pr_err("Check *.bin file fail.");
- goto file_fail;
+ if (ts->force_update) {
+ dev_dbg(&ts->client->dev, "Enter force update.");
+ } else {
+ ret = gup_enter_update_judge(ts->client, &fw_head);
+ if (ret == FAIL) {
+ dev_err(&ts->client->dev,
+ "Check *.bin file fail.");
+ goto file_fail;
+ }
}
ts->enter_update = 1;
diff --git a/drivers/input/touchscreen/synaptics_fw_update.c b/drivers/input/touchscreen/synaptics_fw_update.c
index 7da0376..dce9dee 100644
--- a/drivers/input/touchscreen/synaptics_fw_update.c
+++ b/drivers/input/touchscreen/synaptics_fw_update.c
@@ -1559,7 +1559,7 @@
}
dev_dbg(&fwu->rmi4_data->i2c_client->dev,
- "%s: Firmware image size = %d\n",
+ "%s: Firmware image size = %zu\n",
__func__, fw_entry->size);
fwu->data_buffer = fw_entry->data;
@@ -1670,7 +1670,7 @@
if (count < fwu->config_size) {
dev_err(&rmi4_data->i2c_client->dev,
- "%s: Not enough space (%d bytes) in buffer\n",
+ "%s: Not enough space (%zu bytes) in buffer\n",
__func__, count);
return -EINVAL;
}
@@ -1905,12 +1905,20 @@
struct device_attribute *attr, const char *buf, size_t count)
{
int retval;
- unsigned long config_area;
+ unsigned short config_area;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
- retval = kstrtoul(buf, 10, &config_area);
+ retval = kstrtou16(buf, 10, &config_area);
if (retval)
return retval;
+ if (config_area < 0x00 || config_area > 0x03) {
+ dev_err(&rmi4_data->i2c_client->dev,
+ "%s: Incorrect value of config_area\n",
+ __func__);
+ return -EINVAL;
+ }
+
fwu->config_area = config_area;
return count;
diff --git a/drivers/input/touchscreen/synaptics_i2c_rmi4.c b/drivers/input/touchscreen/synaptics_i2c_rmi4.c
index 7152ec8..ca47547 100644
--- a/drivers/input/touchscreen/synaptics_i2c_rmi4.c
+++ b/drivers/input/touchscreen/synaptics_i2c_rmi4.c
@@ -113,16 +113,15 @@
static void synaptics_rmi4_sensor_wake(struct synaptics_rmi4_data *rmi4_data);
-static void synaptics_rmi4_sensor_sleep(struct synaptics_rmi4_data *rmi4_data);
-
static int synaptics_rmi4_check_configuration(struct synaptics_rmi4_data
*rmi4_data);
-#ifdef CONFIG_PM
+
static int synaptics_rmi4_suspend(struct device *dev);
static int synaptics_rmi4_resume(struct device *dev);
+#ifdef CONFIG_PM
static ssize_t synaptics_rmi4_full_pm_cycle_show(struct device *dev,
struct device_attribute *attr, char *buf);
@@ -425,6 +424,31 @@
static bool exp_fn_inited;
static struct mutex exp_fn_list_mutex;
static struct list_head exp_fn_list;
+
+static int synaptics_rmi4_debug_suspend_set(void *_data, u64 val)
+{
+ struct synaptics_rmi4_data *rmi4_data = _data;
+
+ if (val)
+ synaptics_rmi4_suspend(&rmi4_data->input_dev->dev);
+ else
+ synaptics_rmi4_resume(&rmi4_data->input_dev->dev);
+
+ return 0;
+}
+
+static int synaptics_rmi4_debug_suspend_get(void *_data, u64 *val)
+{
+ struct synaptics_rmi4_data *rmi4_data = _data;
+
+ *val = rmi4_data->suspended;
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(debug_suspend_fops, synaptics_rmi4_debug_suspend_get,
+ synaptics_rmi4_debug_suspend_set, "%lld\n");
+
#ifdef CONFIG_PM
static ssize_t synaptics_rmi4_full_pm_cycle_show(struct device *dev,
struct device_attribute *attr, char *buf)
@@ -449,30 +473,6 @@
return count;
}
-static int synaptics_rmi4_debug_suspend_set(void *_data, u64 val)
-{
- struct synaptics_rmi4_data *rmi4_data = _data;
-
- if (val)
- synaptics_rmi4_suspend(&rmi4_data->input_dev->dev);
- else
- synaptics_rmi4_resume(&rmi4_data->input_dev->dev);
-
- return 0;
-}
-
-static ssize_t synaptics_rmi4_debug_suspend_get(void *_data, u64 *val)
-{
- struct synaptics_rmi4_data *rmi4_data = _data;
-
- *val = rmi4_data->suspended;
-
- return 0;
-}
-
-DEFINE_SIMPLE_ATTRIBUTE(debug_suspend_fops, synaptics_rmi4_debug_suspend_get,
- synaptics_rmi4_debug_suspend_set, "%lld\n");
-
#ifdef CONFIG_FB
static void configure_sleep(struct synaptics_rmi4_data *rmi4_data)
{
@@ -502,6 +502,11 @@
return;
}
#endif
+#else
+static void configure_sleep(struct synaptics_rmi4_data *rmi4_data)
+{
+ return;
+}
#endif
static ssize_t synaptics_rmi4_f01_reset_store(struct device *dev,
@@ -3665,6 +3670,14 @@
{
return 0;
};
+static int synaptics_rmi4_suspend(struct device *dev);
+{
+ return 0;
+}
+static int synaptics_rmi4_resume(struct device *dev);
+{
+ return 0;
+}
#endif
static const struct i2c_device_id synaptics_rmi4_id_table[] = {
diff --git a/drivers/input/touchscreen/synaptics_rmi_dev.c b/drivers/input/touchscreen/synaptics_rmi_dev.c
index 7abd909..8478b24 100644
--- a/drivers/input/touchscreen/synaptics_rmi_dev.c
+++ b/drivers/input/touchscreen/synaptics_rmi_dev.c
@@ -461,7 +461,7 @@
return;
}
-static char *rmi_char_devnode(struct device *dev, mode_t *mode)
+static char *rmi_char_devnode(struct device *dev, umode_t *mode)
{
if (!mode)
return NULL;
diff --git a/drivers/iommu/msm_iommu_dev-v1.c b/drivers/iommu/msm_iommu_dev-v1.c
index bbbe77b..a9d164e 100644
--- a/drivers/iommu/msm_iommu_dev-v1.c
+++ b/drivers/iommu/msm_iommu_dev-v1.c
@@ -208,10 +208,14 @@
ret = of_platform_populate(pdev->dev.of_node,
msm_iommu_v1_ctx_match_table,
NULL, &pdev->dev);
- if (ret)
+ if (ret) {
pr_err("Failed to create iommu context device\n");
+ goto fail;
+ }
msm_iommu_add_drv(drvdata);
+ return 0;
+
fail:
__put_bus_vote_client(drvdata);
return ret;
diff --git a/drivers/iommu/msm_iommu_sec.c b/drivers/iommu/msm_iommu_sec.c
index e293279..38dd41b 100644
--- a/drivers/iommu/msm_iommu_sec.c
+++ b/drivers/iommu/msm_iommu_sec.c
@@ -61,6 +61,12 @@
static struct iommu_access_ops *iommu_access_ops;
+static const struct of_device_id msm_smmu_list[] = {
+ { .compatible = "qcom,msm-smmu-v1", },
+ { .compatible = "qcom,msm-smmu-v2", },
+ { }
+};
+
struct msm_scm_paddr_list {
unsigned int list;
unsigned int list_size;
@@ -296,8 +302,9 @@
int ret, ptbl_ret = 0;
int version;
- for_each_compatible_node(np, NULL, "qcom,msm-smmu-v1")
- if (of_find_property(np, "qcom,iommu-secure-id", NULL))
+ for_each_matching_node(np, msm_smmu_list)
+ if (of_find_property(np, "qcom,iommu-secure-id", NULL) &&
+ of_device_is_available(np))
break;
if (!np)
diff --git a/drivers/leds/leds-qpnp.c b/drivers/leds/leds-qpnp.c
index da90440..9208599 100644
--- a/drivers/leds/leds-qpnp.c
+++ b/drivers/leds/leds-qpnp.c
@@ -136,11 +136,11 @@
#define FLASH_SELFCHECK_ENABLE 0x80
#define FLASH_RAMP_STEP_27US 0xBF
-#define FLASH_STROBE_SW 0xC0
-#define FLASH_STROBE_HW 0x04
+#define FLASH_HW_SW_STROBE_SEL_MASK 0x04
#define FLASH_STROBE_MASK 0xC7
#define FLASH_LED_0_OUTPUT 0x80
#define FLASH_LED_1_OUTPUT 0x40
+#define FLASH_TORCH_OUTPUT 0xC0
#define FLASH_CURRENT_PRGM_MIN 1
#define FLASH_CURRENT_PRGM_SHIFT 1
@@ -1001,6 +1001,13 @@
goto error_reg_write;
}
+ if (!led->flash_cfg->strobe_type)
+ led->flash_cfg->trigger_flash &=
+ ~FLASH_HW_SW_STROBE_SEL_MASK;
+ else
+ led->flash_cfg->trigger_flash |=
+ FLASH_HW_SW_STROBE_SEL_MASK;
+
rc = qpnp_led_masked_write(led,
FLASH_LED_STROBE_CTRL(led->base),
led->flash_cfg->trigger_flash,
@@ -1080,30 +1087,22 @@
*/
usleep(FLASH_RAMP_UP_DELAY_US);
- if (!led->flash_cfg->strobe_type) {
- rc = qpnp_led_masked_write(led,
- FLASH_LED_STROBE_CTRL(led->base),
- led->flash_cfg->trigger_flash,
- led->flash_cfg->trigger_flash);
- if (rc) {
- dev_err(&led->spmi_dev->dev,
- "LED %d strobe reg write failed(%d)\n",
- led->id, rc);
- goto error_flash_set;
- }
- } else {
- rc = qpnp_led_masked_write(led,
- FLASH_LED_STROBE_CTRL(led->base),
- (led->flash_cfg->trigger_flash |
- FLASH_STROBE_HW),
- (led->flash_cfg->trigger_flash |
- FLASH_STROBE_HW));
- if (rc) {
- dev_err(&led->spmi_dev->dev,
- "LED %d strobe reg write failed(%d)\n",
- led->id, rc);
- goto error_flash_set;
- }
+ if (!led->flash_cfg->strobe_type)
+ led->flash_cfg->trigger_flash &=
+ ~FLASH_HW_SW_STROBE_SEL_MASK;
+ else
+ led->flash_cfg->trigger_flash |=
+ FLASH_HW_SW_STROBE_SEL_MASK;
+
+ rc = qpnp_led_masked_write(led,
+ FLASH_LED_STROBE_CTRL(led->base),
+ led->flash_cfg->trigger_flash,
+ led->flash_cfg->trigger_flash);
+ if (rc) {
+ dev_err(&led->spmi_dev->dev,
+ "LED %d strobe reg write failed(%d)\n",
+ led->id, rc);
+ goto error_flash_set;
}
}
} else {
@@ -1614,6 +1613,15 @@
}
+ /* Reset WLED enable register */
+ rc = qpnp_led_masked_write(led, WLED_MOD_CTRL_REG(led->base),
+ WLED_8_BIT_MASK, WLED_BOOST_OFF);
+ if (rc) {
+ dev_err(&led->spmi_dev->dev,
+ "WLED write ctrl reg failed(%d)\n", rc);
+ return rc;
+ }
+
/* dump wled registers */
qpnp_dump_regs(led, wled_debug_regs, ARRAY_SIZE(wled_debug_regs));
@@ -2733,7 +2741,7 @@
led->flash_cfg->enable_module = FLASH_ENABLE_MODULE;
} else
led->flash_cfg->enable_module = FLASH_ENABLE_ALL;
- led->flash_cfg->trigger_flash = FLASH_STROBE_SW;
+ led->flash_cfg->trigger_flash = FLASH_TORCH_OUTPUT;
}
rc = of_property_read_u32(node, "qcom,current", &val);
diff --git a/drivers/media/media-device.c b/drivers/media/media-device.c
index 6f9eb94..4f39838 100644
--- a/drivers/media/media-device.c
+++ b/drivers/media/media-device.c
@@ -139,7 +139,7 @@
unsigned int p;
for (p = 0; p < entity->num_pads; p++) {
- struct media_pad_desc pad;
+ struct media_pad_desc pad = {0};
media_device_kpad_to_upad(&entity->pads[p], &pad);
if (copy_to_user(&links.pads[p], &pad, sizeof(pad)))
return -EFAULT;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c b/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
index a85f853..f9855c0 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_buf_mgr.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -188,7 +188,6 @@
mapped_info->handle,
buf_mgr->iommu_domain_num, 0);
ion_free(buf_mgr->client, mapped_info->handle);
-
list_del_init(&buf_pending->list);
kfree(buf_pending);
break;
@@ -309,6 +308,9 @@
struct msm_isp_buffer *temp_buf_info;
struct msm_isp_bufq *bufq = NULL;
struct vb2_buffer *vb2_buf = NULL;
+ struct buffer_cmd *buf_pending = NULL;
+ struct msm_isp_buffer_mapped_info *mped_info_tmp1;
+ struct msm_isp_buffer_mapped_info *mped_info_tmp2;
bufq = msm_isp_get_bufq(buf_mgr, bufq_handle);
if (!bufq) {
pr_err("%s: Invalid bufq\n", __func__);
@@ -348,9 +350,22 @@
list_for_each_entry(temp_buf_info, &bufq->head, list) {
if (temp_buf_info->state ==
MSM_ISP_BUFFER_STATE_QUEUED) {
- /* found one buf */
- list_del_init(&temp_buf_info->list);
- *buf_info = temp_buf_info;
+
+ list_for_each_entry(buf_pending, &buf_mgr->buffer_q, list) {
+ if (!buf_pending)
+ break;
+ mped_info_tmp1 = buf_pending->mapped_info;
+ mped_info_tmp2 = &temp_buf_info->mapped_info[0];
+
+ if (mped_info_tmp1 == mped_info_tmp2
+ && (mped_info_tmp1->len == mped_info_tmp2->len)
+ && (mped_info_tmp1->paddr == mped_info_tmp2->paddr)) {
+ /* found one buf */
+ list_del_init(&temp_buf_info->list);
+ *buf_info = temp_buf_info;
+ break;
+ }
+ }
break;
}
}
@@ -359,9 +374,22 @@
bufq->session_id, bufq->stream_id);
if (vb2_buf) {
if (vb2_buf->v4l2_buf.index < bufq->num_bufs) {
- *buf_info =
- &bufq->bufs[vb2_buf->v4l2_buf.index];
- (*buf_info)->vb2_buf = vb2_buf;
+
+ list_for_each_entry(buf_pending, &buf_mgr->buffer_q, list) {
+ if (!buf_pending)
+ break;
+ mped_info_tmp1 = buf_pending->mapped_info;
+ mped_info_tmp2 =
+ &bufq->bufs[vb2_buf->v4l2_buf.index].mapped_info[0];
+
+ if (mped_info_tmp1 == mped_info_tmp2
+ && (mped_info_tmp1->len == mped_info_tmp2->len)
+ && (mped_info_tmp1->paddr == mped_info_tmp2->paddr)) {
+ *buf_info = &bufq->bufs[vb2_buf->v4l2_buf.index];
+ (*buf_info)->vb2_buf = vb2_buf;
+ break;
+ }
+ }
} else {
pr_err("%s: Incorrect buf index %d\n",
__func__, vb2_buf->v4l2_buf.index);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
index 95673d5..d33d34b 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -404,6 +404,11 @@
uint32_t error_count;
};
+struct msm_vfe_frame_ts {
+ struct timeval buf_time;
+ uint32_t frame_id;
+};
+
struct vfe_device {
struct platform_device *pdev;
struct msm_sd_subdev subdev;
@@ -446,6 +451,7 @@
struct msm_vfe_axi_shared_data axi_data;
struct msm_vfe_stats_shared_data stats_data;
struct msm_vfe_error_info error_info;
+ struct msm_vfe_frame_ts frame_ts;
struct msm_isp_buf_mgr *buf_mgr;
int dump_reg;
int vfe_clk_idx;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
index c0e5a47..0264d6d 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c
@@ -235,6 +235,21 @@
return size;
}
+static void msm_isp_get_buffer_ts(struct vfe_device *vfe_dev,
+ struct msm_isp_timestamp *irq_ts, struct msm_isp_timestamp *ts)
+{
+ struct msm_vfe_frame_ts *frame_ts = &vfe_dev->frame_ts;
+ uint32_t frame_count = vfe_dev->error_info.info_dump_frame_count;
+
+ *ts = *irq_ts;
+ if (frame_count == frame_ts->frame_id) {
+ ts->buf_time = frame_ts->buf_time;
+ } else {
+ frame_ts->buf_time = irq_ts->buf_time;
+ frame_ts->frame_id = frame_count;
+ }
+}
+
void msm_isp_axi_reserve_wm(struct msm_vfe_axi_shared_data *axi_data,
struct msm_vfe_axi_stream *stream_info)
{
@@ -1448,6 +1463,7 @@
struct msm_vfe_axi_stream *stream_info;
struct msm_vfe_axi_composite_info *comp_info;
struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;
+ struct msm_isp_timestamp buf_ts;
comp_mask = vfe_dev->hw_info->vfe_ops.axi_ops.
get_comp_mask(irq_status0, irq_status1);
@@ -1460,6 +1476,8 @@
pingpong_status =
vfe_dev->hw_info->vfe_ops.axi_ops.get_pingpong_status(vfe_dev);
+ msm_isp_get_buffer_ts(vfe_dev, ts, &buf_ts);
+
for (i = 0; i < axi_data->hw_info->num_comp_mask; i++) {
comp_info = &axi_data->composite_info[i];
if (comp_mask & (1 << i)) {
@@ -1492,7 +1510,7 @@
}
if (done_buf && !rc)
msm_isp_process_done_buf(vfe_dev,
- stream_info, done_buf, ts);
+ stream_info, done_buf, &buf_ts);
}
}
wm_mask &= ~(comp_info->stream_composite_mask);
@@ -1524,7 +1542,7 @@
}
if (done_buf && !rc)
msm_isp_process_done_buf(vfe_dev,
- stream_info, done_buf, ts);
+ stream_info, done_buf, &buf_ts);
}
}
return;
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
index 7347251..057e87f 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_util.c
@@ -482,7 +482,7 @@
break;
default:
- pr_err("%s: Invalid ISP command\n", __func__);
+ pr_err_ratelimited("%s: Invalid ISP command\n", __func__);
rc = -EINVAL;
}
return rc;
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
index 9a8963d..70042f2 100755
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c
@@ -19,6 +19,7 @@
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/iopoll.h>
+#include <linux/ratelimit.h>
#include <media/msmb_isp.h>
#include "msm_ispif.h"
@@ -1050,7 +1051,8 @@
return 0;
}
default:
- pr_err("%s: invalid cmd 0x%x received\n", __func__, cmd);
+ pr_err_ratelimited("%s: invalid cmd 0x%x received\n",
+ __func__, cmd);
return -ENOIOCTLCMD;
}
}
@@ -1198,6 +1200,7 @@
static const struct of_device_id msm_ispif_dt_match[] = {
{.compatible = "qcom,ispif"},
+ {}
};
MODULE_DEVICE_TABLE(of, msm_ispif_dt_match);
diff --git a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
index c8a4366..567a263 100644
--- a/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
+++ b/drivers/media/platform/msm/camera_v2/ispif/msm_ispif_hwreg_v1.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -34,12 +34,20 @@
#define ISPIF_VFE_m_INTF_CMD_0(m) (0x0004 + ISPIF_VFE(m))
#define ISPIF_VFE_m_INTF_CMD_1(m) (0x0030 + ISPIF_VFE(m))
#define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n) (0x0010 + ISPIF_VFE(m) + 4*(n))
-#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n) (0x0014 + ISPIF_VFE(m) + 4*(n))
+#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n) (0x0014 + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x20) : 0) \
+ + 8*(n))
#define ISPIF_VFE_m_PIX_OUTPUT_n_MISR(m, n) (0x0290 + ISPIF_VFE(m) + 4*(n))
-#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_0(m, n) (0x0298 + ISPIF_VFE(m) + 8*(n))
-#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_1(m, n) (0x029C + ISPIF_VFE(m) + 8*(n))
+#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_0(m, n) (0x001C + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x24) : 0) \
+ + 0xc*(n))
+#define ISPIF_VFE_m_RDI_OUTPUT_n_MISR_1(m, n) (0x0020 + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x24) : 0) \
+ + 0xc*(n))
#define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n) (0x0024 + ISPIF_VFE(m) + 4*(n))
-#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n) (0x0028 + ISPIF_VFE(m) + 4*(n))
+#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n) (0x0028 + ISPIF_VFE(m) + \
+ ((n > 0) ? (0x34) : 0) \
+ + 8*(n))
/* Defines for compatibility with newer ISPIF versions */
#define ISPIF_RST_CMD_1_ADDR (0x0000)
diff --git a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw.c b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw.c
index 44a4014..cd35eb6 100644
--- a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw.c
+++ b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_hw.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -328,7 +328,7 @@
int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *hw_cmd_p, uint32_t m_cmds,
uint32_t max_size, void *base)
{
- int is_copy_to_user = -1;
+ int is_copy_to_user = 0;
uint32_t data;
while (m_cmds--) {
diff --git a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c
index 4331f95..5c0dc22 100644
--- a/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c
+++ b/drivers/media/platform/msm/camera_v2/jpeg_10/msm_jpeg_sync.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -722,6 +722,9 @@
kfree(hw_cmds_p);
return -EFAULT;
}
+ } else {
+ kfree(hw_cmds_p);
+ return is_copy_to_user;
}
kfree(hw_cmds_p);
return 0;
@@ -765,11 +768,12 @@
for (i = 0; i < 2; i++)
kfree(buf_out_free[i]);
+ pgmn_dev->state = MSM_JPEG_EXECUTING;
JPEG_DBG_HIGH("%s:%d] START\n", __func__, __LINE__);
wmb();
rc = msm_jpeg_ioctl_hw_cmds(pgmn_dev, arg);
wmb();
- pgmn_dev->state = MSM_JPEG_EXECUTING;
+
JPEG_DBG("%s:%d]", __func__, __LINE__);
return rc;
}
diff --git a/drivers/media/platform/msm/camera_v2/msm.c b/drivers/media/platform/msm/camera_v2/msm.c
index b1a23b4..f8f5110 100644
--- a/drivers/media/platform/msm/camera_v2/msm.c
+++ b/drivers/media/platform/msm/camera_v2/msm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -29,6 +29,8 @@
#include "msm.h"
#include "msm_vb2.h"
#include "msm_sd.h"
+#include <media/msmb_generic_buf_mgr.h>
+
static struct v4l2_device *msm_v4l2_dev;
static struct list_head ordered_sd_list;
@@ -504,6 +506,7 @@
int msm_destroy_session(unsigned int session_id)
{
struct msm_session *session;
+ struct v4l2_subdev *buf_mgr_subdev;
session = msm_queue_find(msm_session_q, struct msm_session,
list, __msm_queue_find_session, &session_id);
@@ -515,6 +518,12 @@
mutex_destroy(&session->lock);
msm_delete_entry(msm_session_q, struct msm_session,
list, session);
+ buf_mgr_subdev = msm_buf_mngr_get_subdev();
+ if (buf_mgr_subdev) {
+ v4l2_subdev_call(buf_mgr_subdev, core, ioctl,
+ MSM_SD_SHUTDOWN, NULL);
+ } else
+ pr_err("%s: Buff manger device node is NULL\n", __func__);
return 0;
}
@@ -1070,6 +1079,7 @@
static const struct of_device_id msm_dt_match[] = {
{.compatible = "qcom,msm-cam"},
+ {}
}
MODULE_DEVICE_TABLE(of, msm_dt_match);
diff --git a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c
index cb8fcdd..81d4eff 100644
--- a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c
+++ b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -129,7 +129,6 @@
rc = -ENODEV;
return rc;
}
- buf_mngr_dev->msm_buf_mngr_open_cnt++;
return rc;
}
@@ -143,9 +142,6 @@
rc = -ENODEV;
return rc;
}
- buf_mngr_dev->msm_buf_mngr_open_cnt--;
- if (buf_mngr_dev->msm_buf_mngr_open_cnt == 0)
- msm_buf_mngr_sd_shutdown(buf_mngr_dev);
return rc;
}
@@ -203,6 +199,7 @@
static const struct of_device_id msm_buf_mngr_dt_match[] = {
{.compatible = "qcom,msm_buf_mngr"},
+ {}
};
static int __init msm_buf_mngr_init(void)
diff --git a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h
index 49fad22..82ea21f 100644
--- a/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h
+++ b/drivers/media/platform/msm/camera_v2/msm_buf_mgr/msm_generic_buf_mgr.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -36,6 +36,5 @@
spinlock_t buf_q_spinlock;
struct msm_sd_subdev subdev;
struct msm_sd_req_vb2_q vb2_ops;
- uint32_t msm_buf_mngr_open_cnt;
};
#endif
diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
old mode 100644
new mode 100755
index 10a0085..bba774d
--- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
+++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -823,7 +823,10 @@
/*Start firmware loading*/
msm_cpp_write(MSM_CPP_CMD_FW_LOAD, cpp_dev->base);
- msm_cpp_write(fw->size, cpp_dev->base);
+ if (fw)
+ msm_cpp_write(fw->size, cpp_dev->base);
+ else
+ msm_cpp_write(MSM_CPP_END_ADDRESS, cpp_dev->base);
msm_cpp_write(MSM_CPP_START_ADDRESS, cpp_dev->base);
if (ptr_bin) {
@@ -997,15 +1000,15 @@
static int msm_cpp_notify_frame_done(struct cpp_device *cpp_dev)
{
struct v4l2_event v4l2_evt;
- struct msm_queue_cmd *frame_qcmd;
- struct msm_queue_cmd *event_qcmd;
+ struct msm_queue_cmd *frame_qcmd = NULL;
+ struct msm_queue_cmd *event_qcmd = NULL;
struct msm_cpp_frame_info_t *processed_frame;
struct msm_device_queue *queue = &cpp_dev->processing_q;
struct msm_buf_mngr_info buff_mgr_info;
int rc = 0;
- if (queue->len > 0) {
- frame_qcmd = msm_dequeue(queue, list_frame);
+ frame_qcmd = msm_dequeue(queue, list_frame);
+ if (frame_qcmd) {
processed_frame = frame_qcmd->command;
do_gettimeofday(&(processed_frame->out_time));
kfree(frame_qcmd);
@@ -1468,6 +1471,7 @@
case VIDIOC_MSM_CPP_FLUSH_QUEUE:
rc = msm_cpp_flush_frames(cpp_dev);
break;
+ case VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO:
case VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO: {
struct msm_cpp_stream_buff_info_t *u_stream_buff_info;
struct msm_cpp_stream_buff_info_t k_stream_buff_info;
@@ -1535,9 +1539,12 @@
return -EINVAL;
}
- rc = msm_cpp_add_buff_queue_entry(cpp_dev,
- ((k_stream_buff_info.identity >> 16) & 0xFFFF),
- (k_stream_buff_info.identity & 0xFFFF));
+ if (cmd != VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO) {
+ rc = msm_cpp_add_buff_queue_entry(cpp_dev,
+ ((k_stream_buff_info.identity >> 16) & 0xFFFF),
+ (k_stream_buff_info.identity & 0xFFFF));
+ }
+
if (!rc)
rc = msm_cpp_enqueue_buff_info_list(cpp_dev,
&k_stream_buff_info);
@@ -1583,18 +1590,23 @@
struct msm_queue_cmd *event_qcmd;
struct msm_cpp_frame_info_t *process_frame;
event_qcmd = msm_dequeue(queue, list_eventdata);
- process_frame = event_qcmd->command;
- CPP_DBG("fid %d\n", process_frame->frame_id);
- if (copy_to_user((void __user *)ioctl_ptr->ioctl_ptr,
- process_frame,
- sizeof(struct msm_cpp_frame_info_t))) {
- mutex_unlock(&cpp_dev->mutex);
- return -EINVAL;
- }
+ if(event_qcmd) {
+ process_frame = event_qcmd->command;
+ CPP_DBG("fid %d\n", process_frame->frame_id);
+ if (copy_to_user((void __user *)ioctl_ptr->ioctl_ptr,
+ process_frame,
+ sizeof(struct msm_cpp_frame_info_t))) {
+ mutex_unlock(&cpp_dev->mutex);
+ return -EINVAL;
+ }
- kfree(process_frame->cpp_cmd_msg);
- kfree(process_frame);
- kfree(event_qcmd);
+ kfree(process_frame->cpp_cmd_msg);
+ kfree(process_frame);
+ kfree(event_qcmd);
+ } else {
+ pr_err("Empty command list\n");
+ return -EFAULT;
+ }
break;
}
case MSM_SD_SHUTDOWN: {
@@ -1869,6 +1881,7 @@
rc = -ENOMEM;
goto ERROR3;
}
+
INIT_WORK((struct work_struct *)cpp_dev->work, msm_cpp_do_timeout_work);
cpp_dev->cpp_open_cnt = 0;
cpp_dev->is_firmware_loaded = 0;
diff --git a/drivers/media/platform/msm/camera_v2/sensor/Makefile b/drivers/media/platform/msm/camera_v2/sensor/Makefile
index 280a9a0..d1ec5d8e 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/Makefile
+++ b/drivers/media/platform/msm/camera_v2/sensor/Makefile
@@ -4,7 +4,7 @@
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/io
ccflags-y += -Idrivers/media/platform/msm/camera_v2/sensor/cci
obj-$(CONFIG_MSMB_CAMERA) += cci/ io/ csiphy/ csid/ actuator/ flash/ eeprom/
-obj-$(CONFIG_MSM_CAMERA_SENSOR) += msm_sensor.o
+obj-$(CONFIG_MSM_CAMERA_SENSOR) += msm_sensor_init.o msm_sensor_driver.o msm_sensor.o
obj-$(CONFIG_S5K3L1YX) += s5k3l1yx.o
obj-$(CONFIG_IMX135) += imx135.o
obj-$(CONFIG_IMX134) += imx134.o
diff --git a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
index ea16ebd..ef8b996 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.c
@@ -411,6 +411,43 @@
return rc;
}
+static int32_t msm_actuator_set_position(
+ struct msm_actuator_ctrl_t *a_ctrl,
+ struct msm_actuator_set_position_t *set_pos)
+{
+ int32_t rc = 0;
+ int32_t index;
+ uint16_t next_lens_position;
+ uint16_t delay;
+ uint32_t hw_params = 0;
+ struct msm_camera_i2c_reg_setting reg_setting;
+ CDBG("%s Enter %d\n", __func__, __LINE__);
+ if (set_pos->number_of_steps == 0)
+ return rc;
+
+ a_ctrl->i2c_tbl_index = 0;
+ for (index = 0; index < set_pos->number_of_steps; index++) {
+ next_lens_position = set_pos->pos[index];
+ delay = set_pos->delay[index];
+ a_ctrl->func_tbl->actuator_parse_i2c_params(a_ctrl,
+ next_lens_position, hw_params, delay);
+
+ reg_setting.reg_setting = a_ctrl->i2c_reg_tbl;
+ reg_setting.size = a_ctrl->i2c_tbl_index;
+ reg_setting.data_type = a_ctrl->i2c_data_type;
+
+ rc = a_ctrl->i2c_client.i2c_func_tbl->i2c_write_table_w_microdelay(
+ &a_ctrl->i2c_client, ®_setting);
+ if (rc < 0) {
+ pr_err("%s Failed I2C write Line %d\n", __func__, __LINE__);
+ return rc;
+ }
+ a_ctrl->i2c_tbl_index = 0;
+ }
+ CDBG("%s exit %d\n", __func__, __LINE__);
+ return rc;
+}
+
static int32_t msm_actuator_init(struct msm_actuator_ctrl_t *a_ctrl,
struct msm_actuator_set_info_t *set_info) {
struct reg_settings_t *init_settings = NULL;
@@ -565,6 +602,12 @@
pr_err("move focus failed %d\n", rc);
break;
+ case CFG_SET_POSITION:
+ rc = a_ctrl->func_tbl->actuator_set_position(a_ctrl,
+ &cdata->cfg.setpos);
+ if (rc < 0)
+ pr_err("actuator_set_position failed %d\n", rc);
+ break;
default:
break;
}
@@ -919,6 +962,7 @@
.actuator_set_default_focus = msm_actuator_set_default_focus,
.actuator_init_focus = msm_actuator_init_focus,
.actuator_parse_i2c_params = msm_actuator_parse_i2c_params,
+ .actuator_set_position = msm_actuator_set_position,
},
};
diff --git a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
index 809c9cf..7ec9a49 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/actuator/msm_actuator.h
@@ -43,6 +43,8 @@
struct damping_params_t *,
int8_t,
int16_t);
+ int32_t (*actuator_set_position)(struct msm_actuator_ctrl_t *,
+ struct msm_actuator_set_position_t *);
};
struct msm_actuator {
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
index 229fdb2..981c210 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c
@@ -13,6 +13,7 @@
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/ratelimit.h>
#include <linux/irqreturn.h>
#include "msm_csid.h"
#include "msm_csid_hwreg.h"
@@ -488,7 +489,7 @@
rc = msm_csid_release(csid_dev);
break;
default:
- pr_err("%s: %d failed\n", __func__, __LINE__);
+ pr_err_ratelimited("%s: %d failed\n", __func__, __LINE__);
rc = -ENOIOCTLCMD;
break;
}
diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
index d8608ae..9a7c057 100755
--- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
@@ -15,6 +15,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <linux/module.h>
+#include <linux/ratelimit.h>
#include <linux/irqreturn.h>
#include <mach/vreg.h>
#include "msm_csiphy.h"
@@ -599,7 +600,7 @@
rc = msm_csiphy_release(csiphy_dev, &csi_lane_params);
break;
default:
- pr_err("%s: %d failed\n", __func__, __LINE__);
+ pr_err_ratelimited("%s: %d failed\n", __func__, __LINE__);
rc = -ENOIOCTLCMD;
break;
}
diff --git a/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c b/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c
index 69c1faa..7649a40 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -13,6 +13,7 @@
#include <linux/module.h>
#include <linux/of_gpio.h>
#include <linux/delay.h>
+#include <linux/crc32.h>
#include "msm_sd.h"
#include "msm_cci.h"
#include "msm_eeprom.h"
@@ -26,17 +27,130 @@
DEFINE_MSM_MUTEX(msm_eeprom_mutex);
-int32_t msm_eeprom_config(struct msm_eeprom_ctrl_t *e_ctrl,
- void __user *argp)
+
+
+/**
+ * msm_eeprom_verify_sum - verify crc32 checksum
+ * @mem: data buffer
+ * @size: size of data buffer
+ * @sum: expected checksum
+ *
+ * Returns 0 if checksum match, -EINVAL otherwise.
+ */
+static int msm_eeprom_verify_sum(const char *mem, uint32_t size, uint32_t sum)
+{
+ uint32_t crc = ~0UL;
+
+ /* check overflow */
+ if (size > crc - sizeof(uint32_t))
+ return -EINVAL;
+
+ crc = crc32_le(crc, mem, size);
+ if (~crc != sum) {
+ CDBG("%s: expect 0x%x, result 0x%x\n", __func__, sum, ~crc);
+ return -EINVAL;
+ }
+ CDBG("%s: checksum pass 0x%x\n", __func__, sum);
+ return 0;
+}
+
+/**
+ * msm_eeprom_match_crc - verify multiple regions using crc
+ * @data: data block to be verified
+ *
+ * Iterates through all regions stored in @data. Regions with odd index
+ * are treated as data, and its next region is treated as checksum. Thus
+ * regions of even index must have valid_size of 4 or 0 (skip verification).
+ * Returns a bitmask of verified regions, starting from LSB. 1 indicates
+ * a checksum match, while 0 indicates checksum mismatch or not verified.
+ */
+static uint32_t msm_eeprom_match_crc(struct msm_eeprom_memory_block_t *data)
+{
+ int j, rc;
+ uint32_t *sum;
+ uint32_t ret = 0;
+ uint8_t *memptr;
+ struct msm_eeprom_memory_map_t *map;
+
+ if (!data) {
+ pr_err("%s data is NULL", __func__);
+ return -EINVAL;
+ }
+ map = data->map;
+ memptr = data->mapdata;
+
+ for (j = 0; j + 1 < data->num_map; j += 2) {
+ /* empty table or no checksum */
+ if (!map[j].mem.valid_size || !map[j+1].mem.valid_size) {
+ memptr += map[j].mem.valid_size
+ + map[j+1].mem.valid_size;
+ continue;
+ }
+ if (map[j+1].mem.valid_size != sizeof(uint32_t)) {
+ CDBG("%s: malformatted data mapping\n", __func__);
+ return -EINVAL;
+ }
+ sum = (uint32_t *) (memptr + map[j].mem.valid_size);
+ rc = msm_eeprom_verify_sum(memptr, map[j].mem.valid_size,
+ *sum);
+ if (!rc)
+ ret |= 1 << (j/2);
+ memptr += map[j].mem.valid_size + map[j+1].mem.valid_size;
+ }
+ return ret;
+}
+
+static int msm_eeprom_get_mm_data(struct msm_eeprom_ctrl_t *e_ctrl,
+ struct msm_eeprom_cfg_data *cdata)
+{
+ int rc = 0;
+ struct msm_eeprom_mm_t *mm_data = &e_ctrl->eboard_info->mm_data;
+ cdata->cfg.get_mm_data.mm_support = mm_data->mm_support;
+ cdata->cfg.get_mm_data.mm_compression = mm_data->mm_compression;
+ cdata->cfg.get_mm_data.mm_size = mm_data->mm_size;
+ return rc;
+}
+
+static int eeprom_config_read_cal_data(struct msm_eeprom_ctrl_t *e_ctrl,
+ struct msm_eeprom_cfg_data *cdata)
+{
+ int rc;
+
+ /* check range */
+ if (cdata->cfg.read_data.num_bytes >
+ e_ctrl->cal_data.num_data) {
+ CDBG("%s: Invalid size. exp %u, req %u\n", __func__,
+ e_ctrl->cal_data.num_data,
+ cdata->cfg.read_data.num_bytes);
+ return -EINVAL;
+ }
+ if (!e_ctrl->cal_data.mapdata)
+ return -EFAULT;
+
+ rc = copy_to_user(cdata->cfg.read_data.dbuffer,
+ e_ctrl->cal_data.mapdata,
+ cdata->cfg.read_data.num_bytes);
+
+ /* should only be called once. free kernel resource */
+ if (!rc) {
+ kfree(e_ctrl->cal_data.mapdata);
+ kfree(e_ctrl->cal_data.map);
+ memset(&e_ctrl->cal_data, 0, sizeof(e_ctrl->cal_data));
+ }
+ return rc;
+}
+
+static int msm_eeprom_config(struct msm_eeprom_ctrl_t *e_ctrl,
+ void __user *argp)
{
struct msm_eeprom_cfg_data *cdata =
(struct msm_eeprom_cfg_data *)argp;
- int32_t rc = 0;
+ int rc = 0;
CDBG("%s E\n", __func__);
switch (cdata->cfgtype) {
case CFG_EEPROM_GET_INFO:
- CDBG("%s E CFG_EEPROM_GET_INFO\n", __func__);
+ CDBG("%s E CFG_EEPROM_GET_INFO\n", __func__);
cdata->is_supported = e_ctrl->is_supported;
memcpy(cdata->cfg.eeprom_name,
e_ctrl->eboard_info->eeprom_name,
@@ -45,25 +159,26 @@
case CFG_EEPROM_GET_CAL_DATA:
CDBG("%s E CFG_EEPROM_GET_CAL_DATA\n", __func__);
cdata->cfg.get_data.num_bytes =
- e_ctrl->num_bytes;
+ e_ctrl->cal_data.num_data;
break;
case CFG_EEPROM_READ_CAL_DATA:
- if (cdata->cfg.read_data.num_bytes <= e_ctrl->num_bytes) {
- CDBG("%s E CFG_EEPROM_READ_CAL_DATA\n", __func__);
- rc = copy_to_user(cdata->cfg.read_data.dbuffer,
- e_ctrl->memory_data,
- cdata->cfg.read_data.num_bytes);
- }
+ CDBG("%s E CFG_EEPROM_READ_CAL_DATA\n", __func__);
+ rc = eeprom_config_read_cal_data(e_ctrl, cdata);
+ break;
+ case CFG_EEPROM_GET_MM_INFO:
+ CDBG("%s E CFG_EEPROM_GET_MM_INFO\n", __func__);
+ rc = msm_eeprom_get_mm_data(e_ctrl, cdata);
break;
default:
break;
}
- CDBG("%s X\n", __func__);
+ CDBG("%s X rc: %d\n", __func__, rc);
return rc;
}
-static int32_t msm_eeprom_get_subdev_id(
- struct msm_eeprom_ctrl_t *e_ctrl, void *arg)
+
+static int msm_eeprom_get_subdev_id(struct msm_eeprom_ctrl_t *e_ctrl,
+ void *arg)
{
uint32_t *subdev_id = (uint32_t *)arg;
CDBG("%s E\n", __func__);
@@ -154,24 +269,38 @@
.open = msm_eeprom_open,
.close = msm_eeprom_close,
};
-
-int32_t read_eeprom_memory(struct msm_eeprom_ctrl_t *e_ctrl)
+/**
+ * read_eeprom_memory() - read map data into buffer
+ * @e_ctrl: eeprom control struct
+ * @block: block to be read
+ *
+ * This function iterates through blocks stored in block->map, reads each
+ * region and concatenate them into the pre-allocated block->mapdata
+ */
+static int read_eeprom_memory(struct msm_eeprom_ctrl_t *e_ctrl,
+ struct msm_eeprom_memory_block_t *block)
{
int rc = 0;
int j;
- uint8_t *memptr = NULL;
+ struct msm_eeprom_memory_map_t *emap = block->map;
+ uint8_t *memptr = block->mapdata;
struct msm_eeprom_board_info *eb_info = NULL;
- struct eeprom_memory_map_t *emap = NULL;
+
if (!e_ctrl) {
pr_err("%s e_ctrl is NULL", __func__);
- rc = -1;
- return rc;
+ return -EINVAL;
}
- memptr = e_ctrl->memory_data;
- eb_info = e_ctrl->eboard_info;
- emap = eb_info->eeprom_map;
- for (j = 0; j < eb_info->num_blocks; j++) {
+ eb_info = e_ctrl->eboard_info;
+ for (j = 0; j < block->num_map; j++) {
+ if (emap[j].saddr.addr) {
+ eb_info->i2c_slaveaddr = emap[j].saddr.addr;
+ e_ctrl->i2c_client.cci_client->sid =
+ eb_info->i2c_slaveaddr >> 1;
+ pr_err("qcom,slave-addr = 0x%X\n",
+ eb_info->i2c_slaveaddr);
+ }
+
if (emap[j].page.valid_size) {
e_ctrl->i2c_client.addr_type = emap[j].page.addr_t;
rc = e_ctrl->i2c_client.i2c_func_tbl->i2c_write(
@@ -230,157 +359,91 @@
}
return rc;
}
-
-static int msm_eeprom_get_dt_data(struct msm_eeprom_ctrl_t *e_ctrl)
-{
- int rc = 0, i = 0;
- struct msm_eeprom_board_info *eb_info;
- struct msm_camera_power_ctrl_t *power_info =
- &e_ctrl->eboard_info->power_info;
- struct device_node *of_node = NULL;
- struct msm_camera_gpio_conf *gconf = NULL;
- uint16_t gpio_array_size = 0;
- uint16_t *gpio_array = NULL;
-
- eb_info = e_ctrl->eboard_info;
- if (e_ctrl->eeprom_device_type == MSM_CAMERA_SPI_DEVICE)
- of_node = e_ctrl->i2c_client.
- spi_client->spi_master->dev.of_node;
- else if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE)
- of_node = e_ctrl->pdev->dev.of_node;
- else if (e_ctrl->eeprom_device_type == MSM_CAMERA_I2C_DEVICE)
- of_node = e_ctrl->i2c_client.client->dev.of_node;
-
- rc = msm_camera_get_dt_vreg_data(of_node, &power_info->cam_vreg,
- &power_info->num_vreg);
- if (rc < 0)
- return rc;
-
- rc = msm_camera_get_dt_power_setting_data(of_node,
- power_info->cam_vreg, power_info->num_vreg,
- &power_info->power_setting, &power_info->power_setting_size);
- if (rc < 0)
- goto error1;
-
- power_info->gpio_conf = kzalloc(sizeof(struct msm_camera_gpio_conf),
- GFP_KERNEL);
- if (!power_info->gpio_conf) {
- rc = -ENOMEM;
- goto error2;
- }
- gconf = power_info->gpio_conf;
- gpio_array_size = of_gpio_count(of_node);
- CDBG("%s gpio count %d\n", __func__, gpio_array_size);
-
- if (gpio_array_size) {
- gpio_array = kzalloc(sizeof(uint16_t) * gpio_array_size,
- GFP_KERNEL);
- if (!gpio_array) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto error3;
- }
- for (i = 0; i < gpio_array_size; i++) {
- gpio_array[i] = of_get_gpio(of_node, i);
- CDBG("%s gpio_array[%d] = %d\n", __func__, i,
- gpio_array[i]);
- }
-
- rc = msm_camera_get_dt_gpio_req_tbl(of_node, gconf,
- gpio_array, gpio_array_size);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto error4;
- }
-
- rc = msm_camera_init_gpio_pin_tbl(of_node, gconf,
- gpio_array, gpio_array_size);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto error4;
- }
- kfree(gpio_array);
- }
-
- return rc;
-error4:
- kfree(gpio_array);
-error3:
- kfree(power_info->gpio_conf);
-error2:
- kfree(power_info->cam_vreg);
-error1:
- kfree(power_info->power_setting);
- return rc;
-}
-
-static int msm_eeprom_alloc_memory_map(struct msm_eeprom_ctrl_t *e_ctrl,
- struct device_node *of)
+/**
+ * msm_eeprom_parse_memory_map() - parse memory map in device node
+ * @of: device node
+ * @data: memory block for output
+ *
+ * This functions parses @of to fill @data. It allocates map itself, parses
+ * the @of node, calculate total data length, and allocates required buffer.
+ * It only fills the map, but does not perform actual reading.
+ */
+static int msm_eeprom_parse_memory_map(struct device_node *of,
+ struct msm_eeprom_memory_block_t *data)
{
int i, rc = 0;
- char property[14];
+ char property[PROPERTY_MAXSIZE];
uint32_t count = 6;
- struct msm_eeprom_board_info *eb = e_ctrl->eboard_info;
+ struct msm_eeprom_memory_map_t *map;
- rc = of_property_read_u32(of, "qcom,num-blocks", &eb->num_blocks);
- CDBG("%s: qcom,num_blocks %d\n", __func__, eb->num_blocks);
+ snprintf(property, PROPERTY_MAXSIZE, "qcom,num-blocks");
+ rc = of_property_read_u32(of, property, &data->num_map);
+ CDBG("%s: %s %d\n", __func__, property, data->num_map);
if (rc < 0) {
pr_err("%s failed rc %d\n", __func__, rc);
return rc;
}
- eb->eeprom_map = kzalloc((sizeof(struct eeprom_memory_map_t)
- * eb->num_blocks), GFP_KERNEL);
-
- if (!eb->eeprom_map) {
+ map = kzalloc((sizeof(*map) * data->num_map), GFP_KERNEL);
+ if (!map) {
pr_err("%s failed line %d\n", __func__, __LINE__);
return -ENOMEM;
}
+ data->map = map;
- for (i = 0; i < eb->num_blocks; i++) {
- snprintf(property, 12, "qcom,page%d", i);
+ for (i = 0; i < data->num_map; i++) {
+ snprintf(property, PROPERTY_MAXSIZE, "qcom,page%d", i);
rc = of_property_read_u32_array(of, property,
- (uint32_t *) &eb->eeprom_map[i].page, count);
+ (uint32_t *) &map[i].page, count);
if (rc < 0) {
pr_err("%s: failed %d\n", __func__, __LINE__);
- goto out;
+ goto ERROR;
}
- snprintf(property, 14, "qcom,pageen%d", i);
+ snprintf(property, PROPERTY_MAXSIZE,
+ "qcom,pageen%d", i);
rc = of_property_read_u32_array(of, property,
- (uint32_t *) &eb->eeprom_map[i].pageen, count);
+ (uint32_t *) &map[i].pageen, count);
if (rc < 0)
pr_err("%s: pageen not needed\n", __func__);
- snprintf(property, 12, "qcom,poll%d", i);
+ snprintf(property, PROPERTY_MAXSIZE, "qcom,poll%d", i);
rc = of_property_read_u32_array(of, property,
- (uint32_t *) &eb->eeprom_map[i].poll, count);
+ (uint32_t *) &map[i].poll, count);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto out;
+ goto ERROR;
}
- snprintf(property, 12, "qcom,mem%d", i);
+ snprintf(property, PROPERTY_MAXSIZE, "qcom,saddr%d", i);
rc = of_property_read_u32_array(of, property,
- (uint32_t *) &eb->eeprom_map[i].mem, count);
+ (uint32_t *) &map[i].saddr.addr, 1);
+ if (rc < 0)
+ CDBG("%s: saddr not needed - block %d\n", __func__, i);
+
+ snprintf(property, PROPERTY_MAXSIZE, "qcom,mem%d", i);
+ rc = of_property_read_u32_array(of, property,
+ (uint32_t *) &map[i].mem, count);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto out;
+ goto ERROR;
}
- e_ctrl->num_bytes += eb->eeprom_map[i].mem.valid_size;
+ data->num_data += map[i].mem.valid_size;
}
- CDBG("%s num_bytes %d\n", __func__, e_ctrl->num_bytes);
+ CDBG("%s num_bytes %d\n", __func__, data->num_data);
- e_ctrl->memory_data = kzalloc(e_ctrl->num_bytes, GFP_KERNEL);
- if (!e_ctrl->memory_data) {
+ data->mapdata = kzalloc(data->num_data, GFP_KERNEL);
+ if (!data->mapdata) {
pr_err("%s failed line %d\n", __func__, __LINE__);
rc = -ENOMEM;
- goto out;
+ goto ERROR;
}
return rc;
-out:
- kfree(eb->eeprom_map);
+ERROR:
+ kfree(data->map);
+ memset(data, 0, sizeof(*data));
return rc;
}
@@ -401,28 +464,20 @@
.core = &msm_eeprom_subdev_core_ops,
};
-int32_t msm_eeprom_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id) {
+static int msm_eeprom_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
int rc = 0;
- int32_t j = 0;
- uint32_t temp = 0;
struct msm_eeprom_ctrl_t *e_ctrl = NULL;
struct msm_camera_power_ctrl_t *power_info = NULL;
- struct device_node *of_node = client->dev.of_node;
CDBG("%s E\n", __func__);
-
- if (!of_node) {
- pr_err("%s of_node NULL\n", __func__);
- return -EINVAL;
- }
-
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
pr_err("%s i2c_check_functionality failed\n", __func__);
goto probe_failure;
}
- e_ctrl = kzalloc(sizeof(struct msm_eeprom_ctrl_t), GFP_KERNEL);
+ e_ctrl = kzalloc(sizeof(*e_ctrl), GFP_KERNEL);
if (!e_ctrl) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
@@ -430,23 +485,14 @@
e_ctrl->eeprom_v4l2_subdev_ops = &msm_eeprom_subdev_ops;
e_ctrl->eeprom_mutex = &msm_eeprom_mutex;
CDBG("%s client = %x\n", __func__, (unsigned int)client);
- e_ctrl->eboard_info = kzalloc(sizeof(
- struct msm_eeprom_board_info), GFP_KERNEL);
+ e_ctrl->eboard_info = (struct msm_eeprom_board_info *)(id->driver_data);
if (!e_ctrl->eboard_info) {
pr_err("%s:%d board info NULL\n", __func__, __LINE__);
- return -EINVAL;
+ rc = -EINVAL;
+ goto ectrl_free;
}
-
- rc = of_property_read_u32(of_node, "qcom,slave-addr", &temp);
- if (rc < 0) {
- pr_err("%s failed rc %d\n", __func__, rc);
- return rc;
- }
-
power_info = &e_ctrl->eboard_info->power_info;
- e_ctrl->eboard_info->i2c_slaveaddr = temp;
e_ctrl->i2c_client.client = client;
- e_ctrl->is_supported = 0;
/* Set device type as I2C */
e_ctrl->eeprom_device_type = MSM_CAMERA_I2C_DEVICE;
@@ -459,45 +505,6 @@
power_info->clk_info_size = ARRAY_SIZE(cam_8960_clk_info);
power_info->dev = &client->dev;
- rc = of_property_read_string(of_node, "qcom,eeprom-name",
- &e_ctrl->eboard_info->eeprom_name);
- CDBG("%s qcom,eeprom-name %s, rc %d\n", __func__,
- e_ctrl->eboard_info->eeprom_name, rc);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto board_free;
- }
-
- rc = msm_eeprom_get_dt_data(e_ctrl);
- if (rc)
- goto board_free;
-
- rc = msm_eeprom_alloc_memory_map(e_ctrl, of_node);
- if (rc)
- goto board_free;
-
- rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
- &e_ctrl->i2c_client);
- if (rc) {
- pr_err("%s failed power up %d\n", __func__, __LINE__);
- goto memdata_free;
- }
- rc = read_eeprom_memory(e_ctrl);
- if (rc < 0) {
- pr_err("%s read_eeprom_memory failed\n", __func__);
- goto power_down;
- }
-
- for (j = 0; j < e_ctrl->num_bytes; j++)
- CDBG("memory_data[%d] = 0x%X\n", j, e_ctrl->memory_data[j]);
-
- rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
- &e_ctrl->i2c_client);
- if (rc) {
- pr_err("failed rc %d\n", rc);
- goto power_down;
- }
-
/*IMPLEMENT READING PART*/
/* Initialize sub device */
v4l2_i2c_subdev_init(&e_ctrl->msm_sd.sd,
@@ -510,24 +517,17 @@
e_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
e_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_EEPROM;
msm_sd_register(&e_ctrl->msm_sd);
- e_ctrl->is_supported = 1;
CDBG("%s success result=%d X\n", __func__, rc);
return rc;
-power_down:
- msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
- &e_ctrl->i2c_client);
-memdata_free:
- kfree(e_ctrl->memory_data);
- kfree(e_ctrl->eboard_info->eeprom_map);
-board_free:
- kfree(e_ctrl->eboard_info);
+ectrl_free:
+ kfree(e_ctrl);
probe_failure:
pr_err("%s failed! rc = %d\n", __func__, rc);
return rc;
}
-static int32_t msm_eeprom_i2c_remove(struct i2c_client *client)
+static int msm_eeprom_i2c_remove(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct msm_eeprom_ctrl_t *e_ctrl;
@@ -542,12 +542,12 @@
return 0;
}
- kfree(e_ctrl->memory_data);
+ kfree(e_ctrl->cal_data.mapdata);
+ kfree(e_ctrl->cal_data.map);
if (e_ctrl->eboard_info) {
kfree(e_ctrl->eboard_info->power_info.gpio_conf);
- kfree(e_ctrl->eboard_info->eeprom_map);
+ kfree(e_ctrl->eboard_info);
}
- kfree(e_ctrl->eboard_info);
kfree(e_ctrl);
return 0;
}
@@ -585,23 +585,133 @@
return 0;
}
-static int msm_eeprom_check_id(struct msm_eeprom_ctrl_t *e_ctrl)
+static int msm_eeprom_match_id(struct msm_eeprom_ctrl_t *e_ctrl)
{
int rc;
struct msm_camera_i2c_client *client = &e_ctrl->i2c_client;
uint8_t id[2];
rc = msm_camera_spi_query_id(client, 0, &id[0], 2);
- if (rc)
+ if (rc < 0)
return rc;
+ CDBG("%s: read 0x%x 0x%x, check 0x%x 0x%x\n", __func__, id[0],
+ id[1], client->spi_client->mfr_id, client->spi_client->device_id);
if (id[0] != client->spi_client->mfr_id
- || id[1] != client->spi_client->device_id) {
- CDBG("%s: read 0x%x 0x%x, check 0x%x 0x%x\n", __func__, id[0],
- id[1], client->spi_client->mfr_id,
- client->spi_client->device_id);
+ || id[1] != client->spi_client->device_id)
return -ENODEV;
+
+ return 0;
+}
+
+static int msm_eeprom_get_dt_data(struct msm_eeprom_ctrl_t *e_ctrl)
+{
+ int rc = 0, i = 0;
+ struct msm_eeprom_board_info *eb_info;
+ struct msm_camera_power_ctrl_t *power_info =
+ &e_ctrl->eboard_info->power_info;
+ struct device_node *of_node = NULL;
+ struct msm_camera_gpio_conf *gconf = NULL;
+ uint16_t gpio_array_size = 0;
+ uint16_t *gpio_array = NULL;
+
+ eb_info = e_ctrl->eboard_info;
+ if (e_ctrl->eeprom_device_type == MSM_CAMERA_SPI_DEVICE)
+ of_node = e_ctrl->i2c_client.
+ spi_client->spi_master->dev.of_node;
+ else if (e_ctrl->eeprom_device_type == MSM_CAMERA_PLATFORM_DEVICE)
+ of_node = e_ctrl->pdev->dev.of_node;
+
+ rc = msm_camera_get_dt_vreg_data(of_node, &power_info->cam_vreg,
+ &power_info->num_vreg);
+ if (rc < 0)
+ return rc;
+
+ rc = msm_camera_get_dt_power_setting_data(of_node,
+ power_info->cam_vreg, power_info->num_vreg,
+ power_info);
+ if (rc < 0)
+ goto ERROR1;
+
+ power_info->gpio_conf = kzalloc(sizeof(struct msm_camera_gpio_conf),
+ GFP_KERNEL);
+ if (!power_info->gpio_conf) {
+ rc = -ENOMEM;
+ goto ERROR2;
+ }
+ gconf = power_info->gpio_conf;
+ gpio_array_size = of_gpio_count(of_node);
+ CDBG("%s gpio count %d\n", __func__, gpio_array_size);
+
+ if (gpio_array_size) {
+ gpio_array = kzalloc(sizeof(uint16_t) * gpio_array_size,
+ GFP_KERNEL);
+ if (!gpio_array) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR3;
+ }
+ for (i = 0; i < gpio_array_size; i++) {
+ gpio_array[i] = of_get_gpio(of_node, i);
+ CDBG("%s gpio_array[%d] = %d\n", __func__, i,
+ gpio_array[i]);
+ }
+
+ rc = msm_camera_get_dt_gpio_req_tbl(of_node, gconf,
+ gpio_array, gpio_array_size);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR4;
+ }
+
+ rc = msm_camera_init_gpio_pin_tbl(of_node, gconf,
+ gpio_array, gpio_array_size);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR4;
+ }
+ kfree(gpio_array);
}
+ return rc;
+ERROR4:
+ kfree(gpio_array);
+ERROR3:
+ kfree(power_info->gpio_conf);
+ERROR2:
+ kfree(power_info->cam_vreg);
+ERROR1:
+ kfree(power_info->power_setting);
+ return rc;
+}
+
+static int msm_eeprom_mm_dts(struct msm_eeprom_board_info *eb_info,
+ struct device_node *of_node)
+{
+ int rc = 0;
+ struct msm_eeprom_mm_t *mm_data = &eb_info->mm_data;
+
+ mm_data->mm_support =
+ of_property_read_bool(of_node,"qcom,mm-data-support");
+ if (!mm_data->mm_support)
+ return -EINVAL;
+ mm_data->mm_compression =
+ of_property_read_bool(of_node,"qcom,mm-data-compressed");
+ if (!mm_data->mm_compression)
+ pr_err("No MM compression data\n");
+
+ rc = of_property_read_u32(of_node, "qcom,mm-data-offset",
+ &mm_data->mm_offset);
+ if (rc < 0)
+ pr_err("No MM offset data\n");
+
+ rc = of_property_read_u32(of_node, "qcom,mm-data-size",
+ &mm_data->mm_size);
+ if (rc < 0)
+ pr_err("No MM size data\n");
+
+ CDBG("mm_support: mm_compr %d, mm_offset %d, mm_size %d\n",
+ mm_data->mm_compression,
+ mm_data->mm_offset,
+ mm_data->mm_size);
return 0;
}
@@ -614,7 +724,7 @@
struct msm_camera_power_ctrl_t *power_info = NULL;
int rc = 0;
- e_ctrl = kzalloc(sizeof(struct msm_eeprom_ctrl_t), GFP_KERNEL);
+ e_ctrl = kzalloc(sizeof(*e_ctrl), GFP_KERNEL);
if (!e_ctrl) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
@@ -624,7 +734,7 @@
client = &e_ctrl->i2c_client;
e_ctrl->is_supported = 0;
- spi_client = kzalloc(sizeof(spi_client), GFP_KERNEL);
+ spi_client = kzalloc(sizeof(*spi_client), GFP_KERNEL);
if (!spi_client) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
kfree(e_ctrl);
@@ -634,7 +744,7 @@
rc = of_property_read_u32(spi->dev.of_node, "cell-index",
&e_ctrl->subdev_id);
CDBG("cell-index %d, rc %d\n", e_ctrl->subdev_id, rc);
- if (rc) {
+ if (rc < 0) {
pr_err("failed rc %d\n", rc);
return rc;
}
@@ -645,7 +755,7 @@
client->i2c_func_tbl = &msm_eeprom_spi_func_tbl;
client->addr_type = MSM_CAMERA_I2C_3B_ADDR;
- eb_info = kzalloc(sizeof(eb_info), GFP_KERNEL);
+ eb_info = kzalloc(sizeof(*eb_info), GFP_KERNEL);
if (!eb_info)
goto spi_free;
e_ctrl->eboard_info = eb_info;
@@ -657,6 +767,12 @@
pr_err("%s failed %d\n", __func__, __LINE__);
goto board_free;
}
+
+ rc = msm_eeprom_mm_dts(e_ctrl->eboard_info, spi->dev.of_node);
+ if (rc < 0) {
+ pr_err("%s MM data miss:%d\n", __func__, __LINE__);
+ }
+
power_info = &eb_info->power_info;
power_info->clk_info = cam_8974_clk_info;
@@ -664,48 +780,56 @@
power_info->dev = &spi->dev;
rc = msm_eeprom_get_dt_data(e_ctrl);
- if (rc)
+ if (rc < 0)
goto board_free;
/* set spi instruction info */
spi_client->retry_delay = 1;
spi_client->retries = 0;
- if (msm_eeprom_spi_parse_of(spi_client)) {
+ rc = msm_eeprom_spi_parse_of(spi_client);
+ if (rc < 0) {
dev_err(&spi->dev,
"%s: Error parsing device properties\n", __func__);
goto board_free;
}
- rc = msm_eeprom_alloc_memory_map(e_ctrl, spi->dev.of_node);
- if (rc)
- goto board_free;
+ /* prepare memory buffer */
+ rc = msm_eeprom_parse_memory_map(spi->dev.of_node,
+ &e_ctrl->cal_data);
+ if (rc < 0)
+ CDBG("%s: no cal memory map\n", __func__);
+ /* power up eeprom for reading */
rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
- if (rc) {
+ if (rc < 0) {
pr_err("failed rc %d\n", rc);
- goto memmap_free;
+ goto caldata_free;
}
/* check eeprom id */
- rc = msm_eeprom_check_id(e_ctrl);
- if (rc) {
+ rc = msm_eeprom_match_id(e_ctrl);
+ if (rc < 0) {
CDBG("%s: eeprom not matching %d\n", __func__, rc);
goto power_down;
}
/* read eeprom */
- rc = read_eeprom_memory(e_ctrl);
- if (rc) {
- dev_err(&spi->dev, "%s: read eeprom memory failed\n", __func__);
- goto power_down;
+ if (e_ctrl->cal_data.map) {
+ rc = read_eeprom_memory(e_ctrl, &e_ctrl->cal_data);
+ if (rc < 0) {
+ pr_err("%s: read cal data failed\n", __func__);
+ goto power_down;
+ }
+ e_ctrl->is_supported |= msm_eeprom_match_crc(
+ &e_ctrl->cal_data);
}
rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
- if (rc) {
+ if (rc < 0) {
pr_err("failed rc %d\n", rc);
- goto memmap_free;
+ goto caldata_free;
}
/* initiazlie subdev */
@@ -719,21 +843,23 @@
e_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
e_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_EEPROM;
msm_sd_register(&e_ctrl->msm_sd);
- e_ctrl->is_supported = 1;
- CDBG("%s success result=%d X\n", __func__, rc);
+ e_ctrl->is_supported = (e_ctrl->is_supported << 1) | 1;
+ CDBG("%s success result=%d supported=%x X\n", __func__, rc,
+ e_ctrl->is_supported);
return 0;
power_down:
msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
-memmap_free:
- kfree(e_ctrl->eboard_info->eeprom_map);
- kfree(e_ctrl->memory_data);
+caldata_free:
+ kfree(e_ctrl->cal_data.mapdata);
+ kfree(e_ctrl->cal_data.map);
board_free:
kfree(e_ctrl->eboard_info);
spi_free:
kfree(spi_client);
+ kfree(e_ctrl);
return rc;
}
@@ -751,14 +877,14 @@
cpha = (spi->mode & SPI_CPHA) ? 1 : 0;
cpol = (spi->mode & SPI_CPOL) ? 1 : 0;
cs_high = (spi->mode & SPI_CS_HIGH) ? 1 : 0;
- dev_info(&spi->dev, "irq[%d] cs[%x] CPHA[%x] CPOL[%x] CS_HIGH[%x]\n",
- irq, cs, cpha, cpol, cs_high);
- dev_info(&spi->dev, "max_speed[%u]\n", spi->max_speed_hz);
+ CDBG("%s: irq[%d] cs[%x] CPHA[%x] CPOL[%x] CS_HIGH[%x]\n",
+ __func__, irq, cs, cpha, cpol, cs_high);
+ CDBG("%s: max_speed[%u]\n", __func__, spi->max_speed_hz);
return msm_eeprom_spi_setup(spi);
}
-static int32_t msm_eeprom_spi_remove(struct spi_device *sdev)
+static int msm_eeprom_spi_remove(struct spi_device *sdev)
{
struct v4l2_subdev *sd = spi_get_drvdata(sdev);
struct msm_eeprom_ctrl_t *e_ctrl;
@@ -774,20 +900,20 @@
}
kfree(e_ctrl->i2c_client.spi_client);
- kfree(e_ctrl->memory_data);
+ kfree(e_ctrl->cal_data.mapdata);
+ kfree(e_ctrl->cal_data.map);
if (e_ctrl->eboard_info) {
kfree(e_ctrl->eboard_info->power_info.gpio_conf);
- kfree(e_ctrl->eboard_info->eeprom_map);
+ kfree(e_ctrl->eboard_info);
}
- kfree(e_ctrl->eboard_info);
kfree(e_ctrl);
return 0;
}
-static int32_t msm_eeprom_platform_probe(struct platform_device *pdev)
+static int msm_eeprom_platform_probe(struct platform_device *pdev)
{
- int32_t rc = 0;
- int32_t j = 0;
+ int rc = 0;
+ int j = 0;
uint32_t temp;
struct msm_camera_cci_client *cci_client = NULL;
@@ -798,7 +924,7 @@
CDBG("%s E\n", __func__);
- e_ctrl = kzalloc(sizeof(struct msm_eeprom_ctrl_t), GFP_KERNEL);
+ e_ctrl = kzalloc(sizeof(*e_ctrl), GFP_KERNEL);
if (!e_ctrl) {
pr_err("%s:%d kzalloc failed\n", __func__, __LINE__);
return -ENOMEM;
@@ -884,12 +1010,16 @@
goto board_free;
}
+ rc = msm_eeprom_mm_dts(e_ctrl->eboard_info, of_node);
+ if (rc < 0) {
+ pr_err("%s MM data miss:%d\n", __func__, __LINE__);
+ }
rc = msm_eeprom_get_dt_data(e_ctrl);
if (rc)
goto board_free;
- rc = msm_eeprom_alloc_memory_map(e_ctrl, of_node);
- if (rc)
+ rc = msm_eeprom_parse_memory_map(of_node, &e_ctrl->cal_data);
+ if (rc < 0)
goto board_free;
rc = msm_camera_power_up(power_info, e_ctrl->eeprom_device_type,
@@ -898,14 +1028,16 @@
pr_err("failed rc %d\n", rc);
goto memdata_free;
}
- rc = read_eeprom_memory(e_ctrl);
+ rc = read_eeprom_memory(e_ctrl, &e_ctrl->cal_data);
if (rc < 0) {
pr_err("%s read_eeprom_memory failed\n", __func__);
goto power_down;
}
- pr_err("%s line %d\n", __func__, __LINE__);
- for (j = 0; j < e_ctrl->num_bytes; j++)
- CDBG("memory_data[%d] = 0x%X\n", j, e_ctrl->memory_data[j]);
+ for (j = 0; j < e_ctrl->cal_data.num_data; j++)
+ CDBG("memory_data[%d] = 0x%X\n", j,
+ e_ctrl->cal_data.mapdata[j]);
+
+ e_ctrl->is_supported |= msm_eeprom_match_crc(&e_ctrl->cal_data);
rc = msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
@@ -926,8 +1058,7 @@
e_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_EEPROM;
msm_sd_register(&e_ctrl->msm_sd);
-
- e_ctrl->is_supported = 1;
+ e_ctrl->is_supported = (e_ctrl->is_supported << 1) | 1;
CDBG("%s X\n", __func__);
return rc;
@@ -935,8 +1066,8 @@
msm_camera_power_down(power_info, e_ctrl->eeprom_device_type,
&e_ctrl->i2c_client);
memdata_free:
- kfree(e_ctrl->memory_data);
- kfree(eb_info->eeprom_map);
+ kfree(e_ctrl->cal_data.mapdata);
+ kfree(e_ctrl->cal_data.map);
board_free:
kfree(e_ctrl->eboard_info);
cciclient_free:
@@ -945,7 +1076,7 @@
return rc;
}
-static int32_t msm_eeprom_platform_remove(struct platform_device *pdev)
+static int msm_eeprom_platform_remove(struct platform_device *pdev)
{
struct v4l2_subdev *sd = platform_get_drvdata(pdev);
struct msm_eeprom_ctrl_t *e_ctrl;
@@ -961,12 +1092,12 @@
}
kfree(e_ctrl->i2c_client.cci_client);
- kfree(e_ctrl->memory_data);
+ kfree(e_ctrl->cal_data.mapdata);
+ kfree(e_ctrl->cal_data.map);
if (e_ctrl->eboard_info) {
kfree(e_ctrl->eboard_info->power_info.gpio_conf);
- kfree(e_ctrl->eboard_info->eeprom_map);
+ kfree(e_ctrl->eboard_info);
}
- kfree(e_ctrl->eboard_info);
kfree(e_ctrl);
return 0;
}
@@ -1013,7 +1144,7 @@
static int __init msm_eeprom_init_module(void)
{
- int32_t rc = 0;
+ int rc = 0;
CDBG("%s E\n", __func__);
rc = platform_driver_probe(&msm_eeprom_platform_driver,
msm_eeprom_platform_probe);
diff --git a/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.h b/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.h
index cebe585..e978824 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/eeprom/msm_eeprom.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,8 @@
#define DEFINE_MSM_MUTEX(mutexname) \
static struct mutex mutexname = __MUTEX_INITIALIZER(mutexname)
+#define PROPERTY_MAXSIZE 32
+
struct msm_eeprom_ctrl_t {
struct platform_device *pdev;
struct mutex *eeprom_mutex;
@@ -38,8 +40,7 @@
enum cci_i2c_master_t cci_master;
struct msm_camera_i2c_client i2c_client;
- uint32_t num_bytes;
- uint8_t *memory_data;
+ struct msm_eeprom_memory_block_t cal_data;
uint8_t is_supported;
struct msm_eeprom_board_info *eboard_info;
uint32_t subdev_id;
diff --git a/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.c b/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.c
index 2de17c9..149d00c 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.c
@@ -46,7 +46,7 @@
*(int *)argp = MSM_CAMERA_LED_RELEASE;
return fctrl->func_tbl->flash_led_config(fctrl, argp);
default:
- pr_err("invalid cmd %d\n", cmd);
+ pr_err_ratelimited("invalid cmd %d\n", cmd);
return -ENOIOCTLCMD;
}
}
diff --git a/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.h b/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.h
index a4d7f15..87b65ca 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_flash.h
@@ -15,6 +15,7 @@
#include <linux/leds.h>
#include <linux/platform_device.h>
+#include <linux/ratelimit.h>
#include <media/v4l2-subdev.h>
#include <media/msm_cam_sensor.h>
#include <mach/camera2.h>
diff --git a/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_i2c_trigger.c b/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_i2c_trigger.c
index 9caa270..9cfab8f 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_i2c_trigger.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/flash/msm_led_i2c_trigger.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -95,27 +95,30 @@
{
int rc = 0;
struct msm_camera_sensor_board_info *flashdata = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
CDBG("%s:%d called\n", __func__, __LINE__);
flashdata = fctrl->flashdata;
- if (flashdata->gpio_conf->cam_gpiomux_conf_tbl != NULL) {
+ power_info = &flashdata->power_info;
+ if (power_info->gpio_conf->cam_gpiomux_conf_tbl != NULL) {
pr_err("%s:%d mux install\n", __func__, __LINE__);
msm_gpiomux_install(
(struct msm_gpiomux_config *)
- flashdata->gpio_conf->cam_gpiomux_conf_tbl,
- flashdata->gpio_conf->cam_gpiomux_conf_tbl_size);
+ power_info->gpio_conf->cam_gpiomux_conf_tbl,
+ power_info->gpio_conf->cam_gpiomux_conf_tbl_size);
}
rc = msm_camera_request_gpio_table(
- flashdata->gpio_conf->cam_gpio_req_tbl,
- flashdata->gpio_conf->cam_gpio_req_tbl_size, 1);
+ power_info->gpio_conf->cam_gpio_req_tbl,
+ power_info->gpio_conf->cam_gpio_req_tbl_size, 1);
if (rc < 0) {
pr_err("%s: request gpio failed\n", __func__);
return rc;
}
msleep(20);
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[0],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_EN],
GPIO_OUT_HIGH);
if (fctrl->flash_i2c_client && fctrl->reg_setting) {
@@ -133,22 +136,26 @@
{
int rc = 0;
struct msm_camera_sensor_board_info *flashdata = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
flashdata = fctrl->flashdata;
+ power_info = &flashdata->power_info;
CDBG("%s:%d called\n", __func__, __LINE__);
if (!fctrl) {
pr_err("%s:%d fctrl NULL\n", __func__, __LINE__);
return -EINVAL;
}
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[0],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_EN],
GPIO_OUT_LOW);
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[1],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_NOW],
GPIO_OUT_LOW);
rc = msm_camera_request_gpio_table(
- flashdata->gpio_conf->cam_gpio_req_tbl,
- flashdata->gpio_conf->cam_gpio_req_tbl_size, 0);
+ power_info->gpio_conf->cam_gpio_req_tbl,
+ power_info->gpio_conf->cam_gpio_req_tbl_size, 0);
if (rc < 0) {
pr_err("%s: request gpio failed\n", __func__);
return rc;
@@ -160,8 +167,10 @@
{
int rc = 0;
struct msm_camera_sensor_board_info *flashdata = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
flashdata = fctrl->flashdata;
+ power_info = &flashdata->power_info;
CDBG("%s:%d called\n", __func__, __LINE__);
if (!fctrl) {
pr_err("%s:%d fctrl NULL\n", __func__, __LINE__);
@@ -175,7 +184,8 @@
pr_err("%s:%d failed\n", __func__, __LINE__);
}
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[1],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_NOW],
GPIO_OUT_LOW);
return rc;
@@ -185,15 +195,19 @@
{
int rc = 0;
struct msm_camera_sensor_board_info *flashdata = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
CDBG("%s:%d called\n", __func__, __LINE__);
flashdata = fctrl->flashdata;
+ power_info = &flashdata->power_info;
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[0],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_EN],
GPIO_OUT_HIGH);
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[1],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_NOW],
GPIO_OUT_HIGH);
@@ -212,15 +226,19 @@
{
int rc = 0;
struct msm_camera_sensor_board_info *flashdata = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
CDBG("%s:%d called\n", __func__, __LINE__);
flashdata = fctrl->flashdata;
+ power_info = &flashdata->power_info;
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[0],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_EN],
GPIO_OUT_HIGH);
gpio_set_value_cansleep(
- flashdata->gpio_conf->gpio_num_info->gpio_num[1],
+ power_info->gpio_conf->gpio_num_info->
+ gpio_num[SENSOR_GPIO_FL_NOW],
GPIO_OUT_HIGH);
if (fctrl->flash_i2c_client && fctrl->reg_setting) {
@@ -234,61 +252,6 @@
return rc;
}
-static int32_t msm_flash_init_gpio_pin_tbl(struct device_node *of_node,
- struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
- uint16_t gpio_array_size)
-{
- int32_t rc = 0;
- int32_t val = 0;
-
- gconf->gpio_num_info = kzalloc(sizeof(struct msm_camera_gpio_num_info),
- GFP_KERNEL);
- if (!gconf->gpio_num_info) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- return rc;
- }
-
- rc = of_property_read_u32(of_node, "qcom,gpio-flash-en", &val);
- if (rc < 0) {
- pr_err("%s:%d read qcom,gpio-flash-en failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- } else if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-flash-en invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- /*index 0 is for qcom,gpio-flash-en */
- gconf->gpio_num_info->gpio_num[0] =
- gpio_array[val];
- CDBG("%s qcom,gpio-flash-en %d\n", __func__,
- gconf->gpio_num_info->gpio_num[0]);
-
- rc = of_property_read_u32(of_node, "qcom,gpio-flash-now", &val);
- if (rc < 0) {
- pr_err("%s:%d read qcom,gpio-flash-now failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- } else if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-flash-now invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- /*index 1 is for qcom,gpio-flash-now */
- gconf->gpio_num_info->gpio_num[1] =
- gpio_array[val];
- CDBG("%s qcom,gpio-flash-now %d\n", __func__,
- gconf->gpio_num_info->gpio_num[1]);
-
- return rc;
-
-ERROR:
- kfree(gconf->gpio_num_info);
- gconf->gpio_num_info = NULL;
- return rc;
-}
-
static int32_t msm_led_get_dt_data(struct device_node *of_node,
struct msm_led_flash_ctrl_t *fctrl)
{
@@ -296,6 +259,7 @@
struct msm_camera_gpio_conf *gconf = NULL;
struct device_node *flash_src_node = NULL;
struct msm_camera_sensor_board_info *flashdata = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
uint32_t count = 0;
uint16_t *gpio_array = NULL;
uint16_t gpio_array_size = 0;
@@ -317,13 +281,7 @@
}
flashdata = fctrl->flashdata;
-
- flashdata->sensor_init_params = kzalloc(sizeof(
- struct msm_sensor_init_params), GFP_KERNEL);
- if (!flashdata->sensor_init_params) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- return -ENOMEM;
- }
+ power_info = &flashdata->power_info;
rc = of_property_read_u32(of_node, "cell-index", &fctrl->subdev_id);
if (rc < 0) {
@@ -389,15 +347,15 @@
}
} else { /*Handle LED Flash Ctrl by GPIO*/
- flashdata->gpio_conf =
+ power_info->gpio_conf =
kzalloc(sizeof(struct msm_camera_gpio_conf),
GFP_KERNEL);
- if (!flashdata->gpio_conf) {
+ if (!power_info->gpio_conf) {
pr_err("%s failed %d\n", __func__, __LINE__);
rc = -ENOMEM;
return rc;
}
- gconf = flashdata->gpio_conf;
+ gconf = power_info->gpio_conf;
gpio_array_size = of_gpio_count(of_node);
CDBG("%s gpio count %d\n", __func__, gpio_array_size);
@@ -416,21 +374,21 @@
gpio_array[i]);
}
- rc = msm_sensor_get_dt_gpio_req_tbl(of_node, gconf,
+ rc = msm_camera_get_dt_gpio_req_tbl(of_node, gconf,
gpio_array, gpio_array_size);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto ERROR4;
}
- rc = msm_sensor_get_dt_gpio_set_tbl(of_node, gconf,
+ rc = msm_camera_get_dt_gpio_set_tbl(of_node, gconf,
gpio_array, gpio_array_size);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
goto ERROR5;
}
- rc = msm_flash_init_gpio_pin_tbl(of_node, gconf,
+ rc = msm_camera_init_gpio_pin_tbl(of_node, gconf,
gpio_array, gpio_array_size);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
@@ -462,7 +420,7 @@
ERROR9:
kfree(fctrl->flashdata->slave_info);
ERROR8:
- kfree(fctrl->flashdata->gpio_conf->gpio_num_info);
+ kfree(fctrl->flashdata->power_info.gpio_conf->gpio_num_info);
ERROR6:
kfree(gconf->cam_gpio_set_tbl);
ERROR5:
diff --git a/drivers/media/platform/msm/camera_v2/sensor/gc0339.c b/drivers/media/platform/msm/camera_v2/sensor/gc0339.c
index 8288ad0..e233b8d 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/gc0339.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/gc0339.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -120,21 +120,23 @@
struct msm_sensor_power_setting_array *power_setting_array = NULL;
struct msm_sensor_power_setting *power_setting = NULL;
struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
+ struct msm_camera_power_ctrl_t *power_info = &data->power_info;
+ struct msm_camera_gpio_conf *gpio_conf = power_info->gpio_conf;
CDBG("%s:%d\n", __func__, __LINE__);
power_setting_array = &s_ctrl->power_setting_array;
- if (data->gpio_conf->cam_gpiomux_conf_tbl != NULL) {
+ if (gpio_conf->cam_gpiomux_conf_tbl != NULL) {
pr_err("%s:%d mux install\n", __func__, __LINE__);
msm_gpiomux_install(
(struct msm_gpiomux_config *)
- data->gpio_conf->cam_gpiomux_conf_tbl,
- data->gpio_conf->cam_gpiomux_conf_tbl_size);
+ gpio_conf->cam_gpiomux_conf_tbl,
+ gpio_conf->cam_gpiomux_conf_tbl_size);
}
rc = msm_camera_request_gpio_table(
- data->gpio_conf->cam_gpio_req_tbl,
- data->gpio_conf->cam_gpio_req_tbl_size, 1);
+ gpio_conf->cam_gpio_req_tbl,
+ gpio_conf->cam_gpio_req_tbl_size, 1);
if (rc < 0) {
pr_err("%s: request gpio failed\n", __func__);
return rc;
@@ -145,20 +147,21 @@
CDBG("%s type %d\n", __func__, power_setting->seq_type);
switch (power_setting->seq_type) {
case SENSOR_CLK:
- if (power_setting->seq_val >= s_ctrl->clk_info_size) {
+ if (power_setting->seq_val >=
+ power_info->clk_info_size) {
pr_err("%s clk index %d >= max %d\n", __func__,
power_setting->seq_val,
- s_ctrl->clk_info_size);
+ power_info->clk_info_size);
goto power_up_failed;
}
if (power_setting->config_val)
- s_ctrl->clk_info[power_setting->seq_val].
+ power_info->clk_info[power_setting->seq_val].
clk_rate = power_setting->config_val;
- rc = msm_cam_clk_enable(s_ctrl->dev,
- &s_ctrl->clk_info[0],
+ rc = msm_cam_clk_enable(power_info->dev,
+ &power_info->clk_info[0],
(struct clk **)&power_setting->data[0],
- s_ctrl->clk_info_size,
+ power_info->clk_info_size,
1);
if (rc < 0) {
pr_err("%s: clk enable failed\n",
@@ -168,19 +171,19 @@
break;
case SENSOR_GPIO:
if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
- !data->gpio_conf->gpio_num_info) {
+ !gpio_conf->gpio_num_info) {
pr_err("%s gpio index %d >= max %d\n", __func__,
power_setting->seq_val,
SENSOR_GPIO_MAX);
goto power_up_failed;
}
pr_debug("%s:%d gpio set val %d\n", __func__, __LINE__,
- data->gpio_conf->gpio_num_info->gpio_num
+ gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val]);
- if (data->gpio_conf->gpio_num_info->gpio_num
+ if (gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val])
gpio_set_value_cansleep(
- data->gpio_conf->gpio_num_info->gpio_num
+ gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val],
power_setting->config_val);
break;
@@ -191,8 +194,8 @@
SENSOR_GPIO_MAX);
goto power_up_failed;
}
- msm_camera_config_single_vreg(s_ctrl->dev,
- &data->cam_vreg[power_setting->seq_val],
+ msm_camera_config_single_vreg(power_info->dev,
+ &power_info->cam_vreg[power_setting->seq_val],
(struct regulator **)&power_setting->data[0],
1);
break;
@@ -247,23 +250,23 @@
CDBG("%s type %d\n", __func__, power_setting->seq_type);
switch (power_setting->seq_type) {
case SENSOR_CLK:
- msm_cam_clk_enable(s_ctrl->dev,
- &s_ctrl->clk_info[0],
+ msm_cam_clk_enable(power_info->dev,
+ &power_info->clk_info[0],
(struct clk **)&power_setting->data[0],
- s_ctrl->clk_info_size,
+ power_info->clk_info_size,
0);
break;
case SENSOR_GPIO:
- if (data->gpio_conf->gpio_num_info->gpio_num
+ if (gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val])
gpio_set_value_cansleep(
- data->gpio_conf->gpio_num_info->gpio_num
+ gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val],
GPIOF_OUT_INIT_LOW);
break;
case SENSOR_VREG:
- msm_camera_config_single_vreg(s_ctrl->dev,
- &data->cam_vreg[power_setting->seq_val],
+ msm_camera_config_single_vreg(power_info->dev,
+ &power_info->cam_vreg[power_setting->seq_val],
(struct regulator **)&power_setting->data[0],
0);
break;
@@ -280,8 +283,8 @@
}
}
msm_camera_request_gpio_table(
- data->gpio_conf->cam_gpio_req_tbl,
- data->gpio_conf->cam_gpio_req_tbl_size, 0);
+ gpio_conf->cam_gpio_req_tbl,
+ gpio_conf->cam_gpio_req_tbl_size, 0);
return rc;
}
@@ -291,6 +294,8 @@
struct msm_sensor_power_setting_array *power_setting_array = NULL;
struct msm_sensor_power_setting *power_setting = NULL;
struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
+ struct msm_camera_power_ctrl_t *power_info = &data->power_info;
+ struct msm_camera_gpio_conf *gpio_conf = power_info->gpio_conf;
CDBG("%s:%d\n", __func__, __LINE__);
power_setting_array = &s_ctrl->power_setting_array;
@@ -311,24 +316,24 @@
CDBG("%s type %d\n", __func__, power_setting->seq_type);
switch (power_setting->seq_type) {
case SENSOR_CLK:
- msm_cam_clk_enable(s_ctrl->dev,
- &s_ctrl->clk_info[0],
+ msm_cam_clk_enable(power_info->dev,
+ &power_info->clk_info[0],
(struct clk **)&power_setting->data[0],
- s_ctrl->clk_info_size,
+ power_info->clk_info_size,
0);
break;
case SENSOR_GPIO:
if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
- !data->gpio_conf->gpio_num_info) {
+ !gpio_conf->gpio_num_info) {
pr_err("%s gpio index %d >= max %d\n", __func__,
power_setting->seq_val,
SENSOR_GPIO_MAX);
continue;
}
- if (data->gpio_conf->gpio_num_info->gpio_num
+ if (gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val])
gpio_set_value_cansleep(
- data->gpio_conf->gpio_num_info->gpio_num
+ gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val],
GPIOF_OUT_INIT_LOW);
break;
@@ -339,8 +344,8 @@
SENSOR_GPIO_MAX);
continue;
}
- msm_camera_config_single_vreg(s_ctrl->dev,
- &data->cam_vreg[power_setting->seq_val],
+ msm_camera_config_single_vreg(power_info->dev,
+ &power_info->cam_vreg[power_setting->seq_val],
(struct regulator **)&power_setting->data[0],
0);
break;
@@ -357,8 +362,8 @@
}
}
msm_camera_request_gpio_table(
- data->gpio_conf->cam_gpio_req_tbl,
- data->gpio_conf->cam_gpio_req_tbl_size, 0);
+ gpio_conf->cam_gpio_req_tbl,
+ gpio_conf->cam_gpio_req_tbl_size, 0);
CDBG("%s exit\n", __func__);
return 0;
}
@@ -409,11 +414,18 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
cdata->cfg.sensor_info.subdev_id[i]);
+ CDBG("%s:%d mount angle valid %d value %d\n", __func__,
+ __LINE__, cdata->cfg.sensor_info.is_mount_angle_valid,
+ cdata->cfg.sensor_info.sensor_mount_angle);
break;
case CFG_GET_SENSOR_INIT_PARAMS:
- cdata->cfg.sensor_init_params =
- *s_ctrl->sensordata->sensor_init_params;
+ cdata->cfg.sensor_init_params.modes_supported =
+ s_ctrl->sensordata->sensor_info->modes_supported;
+ cdata->cfg.sensor_init_params.position =
+ s_ctrl->sensordata->sensor_info->position;
+ cdata->cfg.sensor_init_params.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
__LINE__,
cdata->cfg.sensor_init_params.modes_supported,
@@ -462,7 +474,6 @@
rc = -EFAULT;
break;
}
- s_ctrl->free_power_setting = true;
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.slave_addr);
CDBG("%s sensor addr type %d\n", __func__,
diff --git a/drivers/media/platform/msm/camera_v2/sensor/hi256.c b/drivers/media/platform/msm/camera_v2/sensor/hi256.c
index a10d60e..2b1024e 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/hi256.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/hi256.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1788,6 +1788,10 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
cdata->cfg.sensor_info.subdev_id[i]);
+ CDBG("%s:%d mount angle valid %d value %d\n", __func__,
+ __LINE__, cdata->cfg.sensor_info.is_mount_angle_valid,
+ cdata->cfg.sensor_info.sensor_mount_angle);
+
break;
case CFG_SET_INIT_SETTING:
CDBG("init setting");
@@ -1823,8 +1827,12 @@
ARRAY_SIZE(hi256_start_settings));
break;
case CFG_GET_SENSOR_INIT_PARAMS:
- cdata->cfg.sensor_init_params =
- *s_ctrl->sensordata->sensor_init_params;
+ cdata->cfg.sensor_init_params.modes_supported =
+ s_ctrl->sensordata->sensor_info->modes_supported;
+ cdata->cfg.sensor_init_params.position =
+ s_ctrl->sensordata->sensor_info->position;
+ cdata->cfg.sensor_init_params.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
__LINE__,
cdata->cfg.sensor_init_params.modes_supported,
@@ -1874,7 +1882,6 @@
rc = -EFAULT;
break;
}
- s_ctrl->free_power_setting = true;
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.slave_addr);
CDBG("%s sensor addr type %d\n", __func__,
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c
index 336c922..cc301ae 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,6 +16,7 @@
#include "msm_camera_i2c_mux.h"
#include "msm_cci.h"
+/*#define CONFIG_MSM_CAMERA_DT_DEBUG*/
#undef CDBG
#ifdef CONFIG_MSM_CAMERA_DT_DEBUG
#define CDBG(fmt, args...) pr_err(fmt, ##args)
@@ -23,10 +24,330 @@
#define CDBG(fmt, args...) do { } while (0)
#endif
+int msm_camera_fill_vreg_params(struct camera_vreg_t *cam_vreg,
+ int num_vreg, struct msm_sensor_power_setting *power_setting,
+ uint16_t power_setting_size)
+{
+ uint16_t i = 0;
+ int j = 0;
+
+ /* Validate input parameters */
+ if (!cam_vreg || !power_setting) {
+ pr_err("%s:%d failed: cam_vreg %p power_setting %p", __func__,
+ __LINE__, cam_vreg, power_setting);
+ return -EINVAL;
+ }
+
+ /* Validate size of num_vreg */
+ if (num_vreg <= 0) {
+ pr_err("failed: num_vreg %d", num_vreg);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < power_setting_size; i++) {
+ if (power_setting[i].seq_type != SENSOR_VREG)
+ continue;
+
+ switch (power_setting[i].seq_val) {
+ case CAM_VDIG:
+ for (j = 0; j < num_vreg; j++) {
+ if (!strcmp(cam_vreg[j].reg_name, "cam_vdig")) {
+ pr_err("%s:%d i %d j %d cam_vdig\n",
+ __func__, __LINE__, i, j);
+ power_setting[i].seq_val = j;
+ break;
+ }
+ }
+ break;
+
+ case CAM_VIO:
+ for (j = 0; j < num_vreg; j++) {
+ if (!strcmp(cam_vreg[j].reg_name, "cam_vio")) {
+ pr_err("%s:%d i %d j %d cam_vio\n",
+ __func__, __LINE__, i, j);
+ power_setting[i].seq_val = j;
+ break;
+ }
+ }
+ break;
+
+ case CAM_VANA:
+ for (j = 0; j < num_vreg; j++) {
+ if (!strcmp(cam_vreg[j].reg_name, "cam_vana")) {
+ pr_err("%s:%d i %d j %d cam_vana\n",
+ __func__, __LINE__, i, j);
+ power_setting[i].seq_val = j;
+ break;
+ }
+ }
+ break;
+
+ case CAM_VAF:
+ for (j = 0; j < num_vreg; j++) {
+ if (!strcmp(cam_vreg[j].reg_name, "cam_vaf")) {
+ pr_err("%s:%d i %d j %d cam_vaf\n",
+ __func__, __LINE__, i, j);
+ power_setting[i].seq_val = j;
+ break;
+ }
+ }
+ break;
+
+ default:
+ pr_err("%s:%d invalid seq_val %d\n", __func__,
+ __LINE__, power_setting[i].seq_val);
+ break;
+ }
+ }
+
+ return 0;
+}
+
+int msm_sensor_get_sub_module_index(struct device_node *of_node,
+ struct msm_sensor_info_t **s_info)
+{
+ int rc = 0, i = 0;
+ uint32_t val = 0, count = 0;
+ uint32_t *val_array = NULL;
+ struct device_node *src_node = NULL;
+ struct msm_sensor_info_t *sensor_info;
+
+ sensor_info = kzalloc(sizeof(*sensor_info), GFP_KERNEL);
+ if (!sensor_info) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ return -ENOMEM;
+ }
+ for (i = 0; i < SUB_MODULE_MAX; i++)
+ sensor_info->subdev_id[i] = -1;
+
+ src_node = of_parse_phandle(of_node, "qcom,actuator-src", 0);
+ if (!src_node) {
+ CDBG("%s:%d src_node NULL\n", __func__, __LINE__);
+ } else {
+ rc = of_property_read_u32(src_node, "cell-index", &val);
+ CDBG("%s qcom,actuator cell index %d, rc %d\n", __func__,
+ val, rc);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR;
+ }
+ sensor_info->subdev_id[SUB_MODULE_ACTUATOR] = val;
+ of_node_put(src_node);
+ src_node = NULL;
+ }
+
+ src_node = of_parse_phandle(of_node, "qcom,eeprom-src", 0);
+ if (!src_node) {
+ CDBG("%s:%d eeprom src_node NULL\n", __func__, __LINE__);
+ } else {
+ rc = of_property_read_u32(src_node, "cell-index", &val);
+ CDBG("%s qcom,eeprom cell index %d, rc %d\n", __func__,
+ val, rc);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR;
+ }
+ sensor_info->subdev_id[SUB_MODULE_EEPROM] = val;
+ of_node_put(src_node);
+ src_node = NULL;
+ }
+
+ if (of_property_read_bool(of_node, "qcom,eeprom-sd-index") ==
+ true) {
+ rc = of_property_read_u32(of_node, "qcom,eeprom-sd-index",
+ &val);
+ CDBG("%s qcom,eeprom-sd-index %d, rc %d\n", __func__, val, rc);
+ if (rc < 0) {
+ pr_err("%s:%d failed rc %d\n", __func__, __LINE__, rc);
+ goto ERROR;
+ }
+ sensor_info->subdev_id[SUB_MODULE_EEPROM] = val;
+ }
+
+ src_node = of_parse_phandle(of_node, "qcom,led-flash-src", 0);
+ if (!src_node) {
+ CDBG("%s:%d src_node NULL\n", __func__, __LINE__);
+ } else {
+ rc = of_property_read_u32(src_node, "cell-index", &val);
+ CDBG("%s qcom,led flash cell index %d, rc %d\n", __func__,
+ val, rc);
+ if (rc < 0) {
+ pr_err("%s:%d failed %d\n", __func__, __LINE__, rc);
+ goto ERROR;
+ }
+ sensor_info->subdev_id[SUB_MODULE_LED_FLASH] = val;
+ of_node_put(src_node);
+ src_node = NULL;
+ }
+
+ if (of_property_read_bool(of_node, "qcom,strobe-flash-sd-index") ==
+ true) {
+ rc = of_property_read_u32(of_node, "qcom,strobe-flash-sd-index",
+ &val);
+ CDBG("%s qcom,strobe-flash-sd-index %d, rc %d\n", __func__,
+ val, rc);
+ if (rc < 0) {
+ pr_err("%s:%d failed rc %d\n", __func__, __LINE__, rc);
+ goto ERROR;
+ }
+ sensor_info->subdev_id[SUB_MODULE_STROBE_FLASH] = val;
+ }
+
+ if (of_get_property(of_node, "qcom,csiphy-sd-index", &count)) {
+ count /= sizeof(uint32_t);
+ if (count > 2) {
+ pr_err("%s qcom,csiphy-sd-index count %d > 2\n",
+ __func__, count);
+ goto ERROR;
+ }
+ val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
+ if (!val_array) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ goto ERROR;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,csiphy-sd-index",
+ val_array, count);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ kfree(val_array);
+ goto ERROR;
+ }
+ for (i = 0; i < count; i++) {
+ sensor_info->subdev_id[SUB_MODULE_CSIPHY + i] =
+ val_array[i];
+ CDBG("%s csiphy_core[%d] = %d\n",
+ __func__, i, val_array[i]);
+ }
+ kfree(val_array);
+ } else {
+ pr_err("%s:%d qcom,csiphy-sd-index not present\n", __func__,
+ __LINE__);
+ rc = -EINVAL;
+ goto ERROR;
+ }
+
+ if (of_get_property(of_node, "qcom,csid-sd-index", &count)) {
+ count /= sizeof(uint32_t);
+ if (count > 2) {
+ pr_err("%s qcom,csid-sd-index count %d > 2\n",
+ __func__, count);
+ rc = -EINVAL;
+ goto ERROR;
+ }
+ val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
+ if (!val_array) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ goto ERROR;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,csid-sd-index",
+ val_array, count);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ kfree(val_array);
+ goto ERROR;
+ }
+ for (i = 0; i < count; i++) {
+ sensor_info->subdev_id
+ [SUB_MODULE_CSID + i] = val_array[i];
+ CDBG("%s csid_core[%d] = %d\n",
+ __func__, i, val_array[i]);
+ }
+ kfree(val_array);
+ } else {
+ pr_err("%s:%d qcom,csid-sd-index not present\n", __func__,
+ __LINE__);
+ rc = -EINVAL;
+ goto ERROR;
+ }
+
+ *s_info = sensor_info;
+ return rc;
+ERROR:
+ kfree(sensor_info);
+ return rc;
+}
+
+int msm_sensor_get_dt_actuator_data(struct device_node *of_node,
+ struct msm_actuator_info **act_info)
+{
+ int rc = 0;
+ uint32_t val = 0;
+ struct msm_actuator_info *actuator_info;
+
+ rc = of_property_read_u32(of_node, "qcom,actuator-cam-name", &val);
+ CDBG("%s qcom,actuator-cam-name %d, rc %d\n", __func__, val, rc);
+ if (rc < 0)
+ return 0;
+
+ actuator_info = kzalloc(sizeof(*actuator_info), GFP_KERNEL);
+ if (!actuator_info) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ goto ERROR;
+ }
+
+ actuator_info->cam_name = val;
+
+ rc = of_property_read_u32(of_node, "qcom,actuator-vcm-pwd", &val);
+ CDBG("%s qcom,actuator-vcm-pwd %d, rc %d\n", __func__, val, rc);
+ if (!rc)
+ actuator_info->vcm_pwd = val;
+
+ rc = of_property_read_u32(of_node, "qcom,actuator-vcm-enable", &val);
+ CDBG("%s qcom,actuator-vcm-enable %d, rc %d\n", __func__, val, rc);
+ if (!rc)
+ actuator_info->vcm_enable = val;
+
+ *act_info = actuator_info;
+ return 0;
+ERROR:
+ kfree(actuator_info);
+ return rc;
+}
+
+int msm_sensor_get_dt_csi_data(struct device_node *of_node,
+ struct msm_camera_csi_lane_params **csi_lane_params)
+{
+ int rc = 0;
+ uint32_t val = 0;
+ struct msm_camera_csi_lane_params *clp;
+
+ clp = kzalloc(sizeof(*clp), GFP_KERNEL);
+ if (!clp) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ return -ENOMEM;
+ }
+ *csi_lane_params = clp;
+
+ rc = of_property_read_u32(of_node, "qcom,csi-lane-assign", &val);
+ CDBG("%s qcom,csi-lane-assign %x, rc %d\n", __func__, val, rc);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR;
+ }
+ clp->csi_lane_assign = val;
+
+ rc = of_property_read_u32(of_node, "qcom,csi-lane-mask", &val);
+ CDBG("%s qcom,csi-lane-mask %x, rc %d\n", __func__, val, rc);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR;
+ }
+ clp->csi_lane_mask = val;
+
+ return rc;
+ERROR:
+ kfree(clp);
+ return rc;
+}
+
int msm_camera_get_dt_power_setting_data(struct device_node *of_node,
struct camera_vreg_t *cam_vreg, int num_vreg,
- struct msm_sensor_power_setting **power_setting,
- uint16_t *power_setting_size)
+ struct msm_camera_power_ctrl_t *power_info)
{
int rc = 0, i, j;
int count = 0;
@@ -34,11 +355,19 @@
uint32_t *array = NULL;
struct msm_sensor_power_setting *ps;
- if (!power_setting || !power_setting_size)
+ struct msm_sensor_power_setting *power_setting;
+ uint16_t *power_setting_size, size = 0;
+ bool need_reverse = 0;
+
+ if (!power_info)
return -EINVAL;
+ power_setting = power_info->power_setting;
+ power_setting_size = &power_info->power_setting_size;
+
count = of_property_count_strings(of_node, "qcom,cam-power-seq-type");
*power_setting_size = count;
+
CDBG("%s qcom,cam-power-seq-type count %d\n", __func__, count);
if (count <= 0)
@@ -49,7 +378,8 @@
pr_err("%s failed %d\n", __func__, __LINE__);
return -ENOMEM;
}
- *power_setting = ps;
+ power_setting = ps;
+ power_info->power_setting = ps;
for (i = 0; i < count; i++) {
rc = of_property_read_string_index(of_node,
@@ -179,8 +509,40 @@
i, ps[i].delay);
}
kfree(array);
- return rc;
+ size = *power_setting_size;
+
+ if (NULL != ps && 0 != size)
+ need_reverse = 1;
+
+ power_info->power_down_setting =
+ kzalloc(sizeof(*ps) * size, GFP_KERNEL);
+
+ if (!power_info->power_down_setting) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ goto ERROR1;
+ }
+
+ memcpy(power_info->power_down_setting,
+ ps, sizeof(*ps) * size);
+
+ power_info->power_down_setting_size = size;
+
+ if (need_reverse) {
+ int c, end = size - 1;
+ struct msm_sensor_power_setting power_down_setting_t;
+ for (c = 0; c < size/2; c++) {
+ power_down_setting_t =
+ power_info->power_down_setting[c];
+ power_info->power_down_setting[c] =
+ power_info->power_down_setting[end];
+ power_info->power_down_setting[end] =
+ power_down_setting_t;
+ end--;
+ }
+ }
+ return rc;
ERROR2:
kfree(array);
ERROR1:
@@ -273,7 +635,91 @@
return rc;
}
-int32_t msm_camera_init_gpio_pin_tbl(struct device_node *of_node,
+int msm_camera_get_dt_gpio_set_tbl(struct device_node *of_node,
+ struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
+ uint16_t gpio_array_size)
+{
+ int rc = 0, i = 0;
+ uint32_t count = 0;
+ uint32_t *val_array = NULL;
+
+ if (!of_get_property(of_node, "qcom,gpio-set-tbl-num", &count))
+ return 0;
+
+ count /= sizeof(uint32_t);
+ if (!count) {
+ pr_err("%s qcom,gpio-set-tbl-num 0\n", __func__);
+ return 0;
+ }
+
+ val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
+ if (!val_array) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ return -ENOMEM;
+ }
+
+ gconf->cam_gpio_set_tbl = kzalloc(sizeof(struct msm_gpio_set_tbl) *
+ count, GFP_KERNEL);
+ if (!gconf->cam_gpio_set_tbl) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ rc = -ENOMEM;
+ goto ERROR1;
+ }
+ gconf->cam_gpio_set_tbl_size = count;
+
+ rc = of_property_read_u32_array(of_node, "qcom,gpio-set-tbl-num",
+ val_array, count);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR2;
+ }
+ for (i = 0; i < count; i++) {
+ if (val_array[i] >= gpio_array_size) {
+ pr_err("%s gpio set tbl index %d invalid\n",
+ __func__, val_array[i]);
+ return -EINVAL;
+ }
+ gconf->cam_gpio_set_tbl[i].gpio = gpio_array[val_array[i]];
+ CDBG("%s cam_gpio_set_tbl[%d].gpio = %d\n", __func__, i,
+ gconf->cam_gpio_set_tbl[i].gpio);
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,gpio-set-tbl-flags",
+ val_array, count);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR2;
+ }
+ for (i = 0; i < count; i++) {
+ gconf->cam_gpio_set_tbl[i].flags = val_array[i];
+ CDBG("%s cam_gpio_set_tbl[%d].flags = %ld\n", __func__, i,
+ gconf->cam_gpio_set_tbl[i].flags);
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,gpio-set-tbl-delay",
+ val_array, count);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto ERROR2;
+ }
+ for (i = 0; i < count; i++) {
+ gconf->cam_gpio_set_tbl[i].delay = val_array[i];
+ CDBG("%s cam_gpio_set_tbl[%d].delay = %d\n", __func__, i,
+ gconf->cam_gpio_set_tbl[i].delay);
+ }
+
+ kfree(val_array);
+ return rc;
+
+ERROR2:
+ kfree(gconf->cam_gpio_set_tbl);
+ERROR1:
+ kfree(val_array);
+ gconf->cam_gpio_set_tbl_size = 0;
+ return rc;
+}
+
+int msm_camera_init_gpio_pin_tbl(struct device_node *of_node,
struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
uint16_t gpio_array_size)
{
@@ -300,6 +746,7 @@
}
gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VDIG] =
gpio_array[val];
+ gconf->gpio_num_info->valid[SENSOR_GPIO_VDIG] = 1;
CDBG("%s qcom,gpio-reset %d\n", __func__,
gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VDIG]);
}
@@ -317,6 +764,7 @@
}
gconf->gpio_num_info->gpio_num[SENSOR_GPIO_RESET] =
gpio_array[val];
+ gconf->gpio_num_info->valid[SENSOR_GPIO_RESET] = 1;
CDBG("%s qcom,gpio-reset %d\n", __func__,
gconf->gpio_num_info->gpio_num[SENSOR_GPIO_RESET]);
}
@@ -334,9 +782,47 @@
}
gconf->gpio_num_info->gpio_num[SENSOR_GPIO_STANDBY] =
gpio_array[val];
+ gconf->gpio_num_info->valid[SENSOR_GPIO_STANDBY] = 1;
CDBG("%s qcom,gpio-reset %d\n", __func__,
gconf->gpio_num_info->gpio_num[SENSOR_GPIO_STANDBY]);
}
+
+ if (of_property_read_bool(of_node, "qcom,gpio-flash-en") == true) {
+ rc = of_property_read_u32(of_node, "qcom,gpio-flash-en", &val);
+ if (rc < 0) {
+ pr_err("%s:%d read qcom,gpio-flash-en failed rc %d\n",
+ __func__, __LINE__, rc);
+ goto ERROR;
+ } else if (val >= gpio_array_size) {
+ pr_err("%s:%d qcom,gpio-flash-en invalid %d\n",
+ __func__, __LINE__, val);
+ goto ERROR;
+ }
+ gconf->gpio_num_info->gpio_num[SENSOR_GPIO_FL_EN] =
+ gpio_array[val];
+ gconf->gpio_num_info->valid[SENSOR_GPIO_FL_EN] = 1;
+ CDBG("%s qcom,gpio-flash-en %d\n", __func__,
+ gconf->gpio_num_info->gpio_num[SENSOR_GPIO_FL_EN]);
+ }
+
+ if (of_property_read_bool(of_node, "qcom,gpio-flash-now") == true) {
+ rc = of_property_read_u32(of_node, "qcom,gpio-flash-now", &val);
+ if (rc < 0) {
+ pr_err("%s:%d read qcom,gpio-flash-now failed rc %d\n",
+ __func__, __LINE__, rc);
+ goto ERROR;
+ } else if (val >= gpio_array_size) {
+ pr_err("%s:%d qcom,gpio-flash-now invalid %d\n",
+ __func__, __LINE__, val);
+ goto ERROR;
+ }
+ gconf->gpio_num_info->gpio_num[SENSOR_GPIO_FL_NOW] =
+ gpio_array[val];
+ gconf->gpio_num_info->valid[SENSOR_GPIO_FL_NOW] = 1;
+ CDBG("%s qcom,gpio-flash-now %d\n", __func__,
+ gconf->gpio_num_info->gpio_num[SENSOR_GPIO_FL_NOW]);
+ }
+
return rc;
ERROR:
@@ -529,6 +1015,9 @@
SENSOR_GPIO_MAX);
goto power_up_failed;
}
+ if (!ctrl->gpio_conf->gpio_num_info->valid
+ [power_setting->seq_val])
+ continue;
CDBG("%s:%d gpio set val %d\n", __func__, __LINE__,
ctrl->gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val]);
@@ -589,6 +1078,7 @@
power_setting = &ctrl->power_setting[index];
CDBG("%s type %d\n", __func__, power_setting->seq_type);
switch (power_setting->seq_type) {
+
case SENSOR_CLK:
msm_cam_clk_enable(ctrl->dev,
&ctrl->clk_info[0],
@@ -597,6 +1087,9 @@
0);
break;
case SENSOR_GPIO:
+ if (!ctrl->gpio_conf->gpio_num_info->valid
+ [power_setting->seq_val])
+ continue;
gpio_set_value_cansleep(
ctrl->gpio_conf->gpio_num_info->gpio_num
[power_setting->seq_val], GPIOF_OUT_INIT_LOW);
@@ -629,12 +1122,34 @@
return rc;
}
+static struct msm_sensor_power_setting*
+msm_camera_get_power_settings(struct msm_camera_power_ctrl_t *ctrl,
+ enum msm_sensor_power_seq_type_t seq_type,
+ uint16_t seq_val)
+{
+ struct msm_sensor_power_setting *power_setting, *ps = NULL;
+ int idx;
+
+ for (idx = 0; idx < ctrl->power_setting_size; idx++) {
+ power_setting = &ctrl->power_setting[idx];
+ if (power_setting->seq_type == seq_type &&
+ power_setting->seq_val == seq_val) {
+ ps = power_setting;
+ return ps;
+ }
+
+ }
+ return ps;
+}
+
int msm_camera_power_down(struct msm_camera_power_ctrl_t *ctrl,
enum msm_camera_device_type_t device_type,
struct msm_camera_i2c_client *sensor_i2c_client)
{
int index = 0;
- struct msm_sensor_power_setting *power_setting = NULL;
+ struct msm_sensor_power_setting *pd = NULL;
+ struct msm_sensor_power_setting *ps;
+
CDBG("%s:%d\n", __func__, __LINE__);
if (!ctrl || !sensor_i2c_client) {
@@ -647,43 +1162,64 @@
sensor_i2c_client->i2c_func_tbl->i2c_util(
sensor_i2c_client, MSM_CCI_RELEASE);
- for (index = (ctrl->power_setting_size - 1); index >= 0; index--) {
+ for (index = 0; index < ctrl->power_down_setting_size; index++) {
CDBG("%s index %d\n", __func__, index);
- power_setting = &ctrl->power_setting[index];
- CDBG("%s type %d\n", __func__, power_setting->seq_type);
- switch (power_setting->seq_type) {
+ pd = &ctrl->power_down_setting[index];
+ ps = NULL;
+ CDBG("%s type %d\n", __func__, pd->seq_type);
+ switch (pd->seq_type) {
case SENSOR_CLK:
- msm_cam_clk_enable(ctrl->dev,
- &ctrl->clk_info[0],
- (struct clk **)&power_setting->data[0],
- ctrl->clk_info_size,
- 0);
- break;
+
+ ps = msm_camera_get_power_settings(ctrl,
+ pd->seq_type,
+ pd->seq_val);
+ if (ps)
+ msm_cam_clk_enable(ctrl->dev,
+ &ctrl->clk_info[0],
+ (struct clk **)&ps->data[0],
+ ctrl->clk_info_size,
+ 0);
+ else
+ pr_err("%s error in power up/down seq data\n",
+ __func__);
+ break;
case SENSOR_GPIO:
- if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
+ if (pd->seq_val >= SENSOR_GPIO_MAX ||
!ctrl->gpio_conf->gpio_num_info) {
pr_err("%s gpio index %d >= max %d\n", __func__,
- power_setting->seq_val,
+ pd->seq_val,
SENSOR_GPIO_MAX);
continue;
}
+ if (!ctrl->gpio_conf->gpio_num_info->valid
+ [pd->seq_val])
+ continue;
gpio_set_value_cansleep(
ctrl->gpio_conf->gpio_num_info->gpio_num
- [power_setting->seq_val],
+ [pd->seq_val],
ctrl->gpio_conf->gpio_num_info->gpio_num
- [power_setting->config_val]);
+ [pd->config_val]);
break;
case SENSOR_VREG:
- if (power_setting->seq_val >= CAM_VREG_MAX) {
+ if (pd->seq_val >= CAM_VREG_MAX) {
pr_err("%s vreg index %d >= max %d\n", __func__,
- power_setting->seq_val,
+ pd->seq_val,
SENSOR_GPIO_MAX);
continue;
}
- msm_camera_config_single_vreg(ctrl->dev,
- &ctrl->cam_vreg[power_setting->seq_val],
- (struct regulator **)&power_setting->data[0],
- 0);
+
+ ps = msm_camera_get_power_settings(ctrl,
+ pd->seq_type,
+ pd->seq_val);
+
+ if (ps)
+ msm_camera_config_single_vreg(ctrl->dev,
+ &ctrl->cam_vreg[pd->seq_val],
+ (struct regulator **)&ps->data[0],
+ 0);
+ else
+ pr_err("%s error in power up/down seq data\n",
+ __func__);
break;
case SENSOR_I2C_MUX:
if (ctrl->i2c_conf && ctrl->i2c_conf->use_i2c_mux)
@@ -691,14 +1227,14 @@
break;
default:
pr_err("%s error power seq type %d\n", __func__,
- power_setting->seq_type);
+ pd->seq_type);
break;
}
- if (power_setting->delay > 20) {
- msleep(power_setting->delay);
- } else if (power_setting->delay) {
- usleep_range(power_setting->delay * 1000,
- (power_setting->delay * 1000) + 1000);
+ if (pd->delay > 20) {
+ msleep(pd->delay);
+ } else if (pd->delay) {
+ usleep_range(pd->delay * 1000,
+ (pd->delay * 1000) + 1000);
}
}
msm_camera_request_gpio_table(
diff --git a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.h b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.h
index fee2a4c..d7f8507 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/io/msm_camera_dt_util.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,28 +18,44 @@
#include <linux/of.h>
#include "msm_camera_i2c.h"
-int32_t msm_camera_get_dt_power_setting_data(struct device_node *of_node,
+int msm_sensor_get_sub_module_index(struct device_node *of_node,
+ struct msm_sensor_info_t **s_info);
+
+int msm_sensor_get_dt_actuator_data(struct device_node *of_node,
+ struct msm_actuator_info **act_info);
+
+int msm_sensor_get_dt_csi_data(struct device_node *of_node,
+ struct msm_camera_csi_lane_params **csi_lane_params);
+
+int msm_camera_get_dt_power_setting_data(struct device_node *of_node,
struct camera_vreg_t *cam_vreg, int num_vreg,
- struct msm_sensor_power_setting **power_setting,
- uint16_t *power_setting_size);
+ struct msm_camera_power_ctrl_t *power_info);
-int32_t msm_camera_get_dt_gpio_req_tbl(struct device_node *of_node,
+int msm_camera_get_dt_gpio_req_tbl(struct device_node *of_node,
struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
uint16_t gpio_array_size);
-int32_t msm_camera_init_gpio_pin_tbl(struct device_node *of_node,
+int msm_camera_get_dt_gpio_set_tbl(struct device_node *of_node,
struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
uint16_t gpio_array_size);
-int32_t msm_camera_get_dt_vreg_data(struct device_node *of_node,
+int msm_camera_init_gpio_pin_tbl(struct device_node *of_node,
+ struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
+ uint16_t gpio_array_size);
+
+int msm_camera_get_dt_vreg_data(struct device_node *of_node,
struct camera_vreg_t **cam_vreg, int *num_vreg);
-int32_t msm_camera_power_up(struct msm_camera_power_ctrl_t *ctrl,
+int msm_camera_power_up(struct msm_camera_power_ctrl_t *ctrl,
enum msm_camera_device_type_t device_type,
struct msm_camera_i2c_client *sensor_i2c_client);
-int32_t msm_camera_power_down(struct msm_camera_power_ctrl_t *ctrl,
+int msm_camera_power_down(struct msm_camera_power_ctrl_t *ctrl,
enum msm_camera_device_type_t device_type,
struct msm_camera_i2c_client *sensor_i2c_client);
+int msm_camera_fill_vreg_params(struct camera_vreg_t *cam_vreg,
+ int num_vreg, struct msm_sensor_power_setting *power_setting,
+ uint16_t power_setting_size);
+
#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
old mode 100644
new mode 100755
index 03145c8..87ad994
--- a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,6 +20,7 @@
#include <mach/rpm-regulator-smd.h>
#include <linux/regulator/consumer.h>
+/*#define CONFIG_MSMB_CAMERA_DEBUG*/
#undef CDBG
#ifdef CONFIG_MSMB_CAMERA_DEBUG
#define CDBG(fmt, args...) pr_err(fmt, ##args)
@@ -27,674 +28,76 @@
#define CDBG(fmt, args...) do { } while (0)
#endif
-static int32_t msm_sensor_enable_i2c_mux(struct msm_camera_i2c_conf *i2c_conf)
+static int32_t msm_camera_get_power_settimgs_from_sensor_lib(
+ struct msm_camera_power_ctrl_t *power_info,
+ struct msm_sensor_power_setting_array *power_setting_array)
{
- struct v4l2_subdev *i2c_mux_sd =
- dev_get_drvdata(&i2c_conf->mux_dev->dev);
- v4l2_subdev_call(i2c_mux_sd, core, ioctl,
- VIDIOC_MSM_I2C_MUX_INIT, NULL);
- v4l2_subdev_call(i2c_mux_sd, core, ioctl,
- VIDIOC_MSM_I2C_MUX_CFG, (void *)&i2c_conf->i2c_mux_mode);
- return 0;
-}
+ int32_t rc = 0;
+ uint32_t size;
+ struct msm_sensor_power_setting *ps;
+ bool need_reverse = 0;
-static int32_t msm_sensor_disable_i2c_mux(struct msm_camera_i2c_conf *i2c_conf)
-{
- struct v4l2_subdev *i2c_mux_sd =
- dev_get_drvdata(&i2c_conf->mux_dev->dev);
- v4l2_subdev_call(i2c_mux_sd, core, ioctl,
- VIDIOC_MSM_I2C_MUX_RELEASE, NULL);
- return 0;
-}
+ if ((NULL == power_info->power_setting) ||
+ (0 == power_info->power_setting_size)) {
-static int32_t msm_sensor_get_sub_module_index(struct device_node *of_node,
- struct msm_camera_sensor_board_info *sensordata)
-{
- int32_t rc = 0, i = 0;
- uint32_t val = 0, count = 0;
- uint32_t *val_array = NULL;
- struct device_node *src_node = NULL;
-
- sensordata->sensor_info = kzalloc(sizeof(struct msm_sensor_info_t),
- GFP_KERNEL);
- if (!sensordata->sensor_info) {
- pr_err("%s:%d failed\n", __func__, __LINE__);
- return -ENOMEM;
- }
- for (i = 0; i < SUB_MODULE_MAX; i++)
- sensordata->sensor_info->subdev_id[i] = -1;
-
- src_node = of_parse_phandle(of_node, "qcom,actuator-src", 0);
- if (!src_node) {
- CDBG("%s:%d src_node NULL\n", __func__, __LINE__);
- } else {
- rc = of_property_read_u32(src_node, "cell-index", &val);
- CDBG("%s qcom,actuator cell index %d, rc %d\n", __func__,
- val, rc);
- if (rc < 0) {
+ ps = power_setting_array->power_setting;
+ size = power_setting_array->size;
+ if ((NULL == ps) || (0 == size)) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR;
- }
- sensordata->sensor_info->
- subdev_id[SUB_MODULE_ACTUATOR] = val;
- of_node_put(src_node);
- src_node = NULL;
- }
-
- src_node = of_parse_phandle(of_node, "qcom,eeprom-src", 0);
- if (!src_node) {
- CDBG("%s:%d eeprom src_node NULL\n", __func__, __LINE__);
- } else {
- rc = of_property_read_u32(src_node, "cell-index", &val);
- CDBG("%s qcom,eeprom cell index %d, rc %d\n", __func__,
- val, rc);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR;
- }
- sensordata->sensor_info->
- subdev_id[SUB_MODULE_EEPROM] = val;
- of_node_put(src_node);
- src_node = NULL;
- }
-
- if (of_property_read_bool(of_node, "qcom,eeprom-sd-index") ==
- true) {
- rc = of_property_read_u32(of_node, "qcom,eeprom-sd-index",
- &val);
- CDBG("%s qcom,eeprom-sd-index %d, rc %d\n", __func__, val, rc);
- if (rc < 0) {
- pr_err("%s:%d failed rc %d\n", __func__, __LINE__, rc);
- goto ERROR;
- }
- sensordata->sensor_info->subdev_id[SUB_MODULE_EEPROM] = val;
- }
-
- src_node = of_parse_phandle(of_node, "qcom,led-flash-src", 0);
- if (!src_node) {
- CDBG("%s:%d src_node NULL\n", __func__, __LINE__);
- } else {
- rc = of_property_read_u32(src_node, "cell-index", &val);
- CDBG("%s qcom,led flash cell index %d, rc %d\n", __func__,
- val, rc);
- if (rc < 0) {
- pr_err("%s:%d failed %d\n", __func__, __LINE__, rc);
- goto ERROR;
- }
- sensordata->sensor_info->
- subdev_id[SUB_MODULE_LED_FLASH] = val;
- of_node_put(src_node);
- src_node = NULL;
- }
-
- if (of_property_read_bool(of_node, "qcom,strobe-flash-sd-index") ==
- true) {
- rc = of_property_read_u32(of_node, "qcom,strobe-flash-sd-index",
- &val);
- CDBG("%s qcom,strobe-flash-sd-index %d, rc %d\n", __func__,
- val, rc);
- if (rc < 0) {
- pr_err("%s:%d failed rc %d\n", __func__, __LINE__, rc);
- goto ERROR;
- }
- sensordata->sensor_info->subdev_id[SUB_MODULE_STROBE_FLASH] =
- val;
- }
-
- if (of_get_property(of_node, "qcom,csiphy-sd-index", &count)) {
- count /= sizeof(uint32_t);
- if (count > 2) {
- pr_err("%s qcom,csiphy-sd-index count %d > 2\n",
- __func__, count);
- goto ERROR;
- }
- val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
- if (!val_array) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- goto ERROR;
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,csiphy-sd-index",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- kfree(val_array);
- goto ERROR;
- }
- for (i = 0; i < count; i++) {
- sensordata->sensor_info->subdev_id
- [SUB_MODULE_CSIPHY + i] = val_array[i];
- CDBG("%s csiphy_core[%d] = %d\n",
- __func__, i, val_array[i]);
- }
- kfree(val_array);
- } else {
- pr_err("%s:%d qcom,csiphy-sd-index not present\n", __func__,
- __LINE__);
- rc = -EINVAL;
- goto ERROR;
- }
-
- if (of_get_property(of_node, "qcom,csid-sd-index", &count)) {
- count /= sizeof(uint32_t);
- if (count > 2) {
- pr_err("%s qcom,csid-sd-index count %d > 2\n",
- __func__, count);
rc = -EINVAL;
- goto ERROR;
+ goto FAILED_1;
}
- val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
- if (!val_array) {
+
+ power_info->power_setting =
+ kzalloc(sizeof(*ps) * size, GFP_KERNEL);
+ if (!power_info->power_setting) {
pr_err("%s failed %d\n", __func__, __LINE__);
rc = -ENOMEM;
- goto ERROR;
+ goto FAILED_1;
}
-
- rc = of_property_read_u32_array(of_node, "qcom,csid-sd-index",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- kfree(val_array);
- goto ERROR;
- }
- for (i = 0; i < count; i++) {
- sensordata->sensor_info->subdev_id
- [SUB_MODULE_CSID + i] = val_array[i];
- CDBG("%s csid_core[%d] = %d\n",
- __func__, i, val_array[i]);
- }
- kfree(val_array);
- } else {
- pr_err("%s:%d qcom,csid-sd-index not present\n", __func__,
- __LINE__);
- rc = -EINVAL;
- goto ERROR;
+ memcpy(power_info->power_setting,
+ power_setting_array->power_setting,
+ sizeof(*ps) * size);
+ power_info->power_setting_size = size;
}
- return rc;
-ERROR:
- kfree(sensordata->sensor_info);
- sensordata->sensor_info = NULL;
- return rc;
-}
-static int32_t msm_sensor_get_dt_csi_data(struct device_node *of_node,
- struct msm_camera_sensor_board_info *sensordata)
-{
- int32_t rc = 0;
- uint32_t val = 0;
+ ps = power_setting_array->power_down_setting;
+ size = power_setting_array->size_down;
+ if (NULL == ps || 0 == size) {
+ ps = power_info->power_setting;
+ size = power_info->power_setting_size;
+ need_reverse = 1;
+ }
- sensordata->csi_lane_params = kzalloc(
- sizeof(struct msm_camera_csi_lane_params), GFP_KERNEL);
- if (!sensordata->csi_lane_params) {
+ power_info->power_down_setting =
+ kzalloc(sizeof(*ps) * size, GFP_KERNEL);
+ if (!power_info->power_down_setting) {
pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- goto ERROR1;
+ goto FREE_UP;
}
+ memcpy(power_info->power_down_setting,
+ ps,
+ sizeof(*ps) * size);
+ power_info->power_down_setting_size = size;
- rc = of_property_read_u32(of_node, "qcom,csi-lane-assign", &val);
- CDBG("%s qcom,csi-lane-assign %x, rc %d\n", __func__, val, rc);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- sensordata->csi_lane_params->csi_lane_assign = val;
-
- rc = of_property_read_u32(of_node, "qcom,csi-lane-mask", &val);
- CDBG("%s qcom,csi-lane-mask %x, rc %d\n", __func__, val, rc);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- sensordata->csi_lane_params->csi_lane_mask = val;
-
- return rc;
-ERROR2:
- kfree(sensordata->csi_lane_params);
-ERROR1:
- return rc;
-}
-
-static int32_t msm_sensor_get_dt_vreg_data(struct device_node *of_node,
- struct msm_camera_sensor_board_info *sensordata)
-{
- int32_t rc = 0, i = 0;
- uint32_t count = 0;
- uint32_t *vreg_array = NULL;
-
- count = of_property_count_strings(of_node, "qcom,cam-vreg-name");
- CDBG("%s qcom,cam-vreg-name count %d\n", __func__, count);
-
- if (!count)
- return 0;
-
- sensordata->cam_vreg = kzalloc(sizeof(struct camera_vreg_t) * count,
- GFP_KERNEL);
- if (!sensordata->cam_vreg) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- return -ENOMEM;
- }
-
- sensordata->num_vreg = count;
- for (i = 0; i < count; i++) {
- rc = of_property_read_string_index(of_node,
- "qcom,cam-vreg-name", i,
- &sensordata->cam_vreg[i].reg_name);
- CDBG("%s reg_name[%d] = %s\n", __func__, i,
- sensordata->cam_vreg[i].reg_name);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR1;
+ if (need_reverse) {
+ int c, end = size - 1;
+ struct msm_sensor_power_setting power_down_setting_t;
+ for (c = 0; c < size/2; c++) {
+ power_down_setting_t =
+ power_info->power_down_setting[c];
+ power_info->power_down_setting[c] =
+ power_info->power_down_setting[end];
+ power_info->power_down_setting[end] =
+ power_down_setting_t;
+ end--;
}
}
- vreg_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
- if (!vreg_array) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- goto ERROR1;
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,cam-vreg-type",
- vreg_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- sensordata->cam_vreg[i].type = vreg_array[i];
- CDBG("%s cam_vreg[%d].type = %d\n", __func__, i,
- sensordata->cam_vreg[i].type);
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,cam-vreg-min-voltage",
- vreg_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- sensordata->cam_vreg[i].min_voltage = vreg_array[i];
- CDBG("%s cam_vreg[%d].min_voltage = %d\n", __func__,
- i, sensordata->cam_vreg[i].min_voltage);
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,cam-vreg-max-voltage",
- vreg_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- sensordata->cam_vreg[i].max_voltage = vreg_array[i];
- CDBG("%s cam_vreg[%d].max_voltage = %d\n", __func__,
- i, sensordata->cam_vreg[i].max_voltage);
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,cam-vreg-op-mode",
- vreg_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- sensordata->cam_vreg[i].op_mode = vreg_array[i];
- CDBG("%s cam_vreg[%d].op_mode = %d\n", __func__, i,
- sensordata->cam_vreg[i].op_mode);
- }
-
- kfree(vreg_array);
- return rc;
-ERROR2:
- kfree(vreg_array);
-ERROR1:
- kfree(sensordata->cam_vreg);
- sensordata->num_vreg = 0;
- return rc;
-}
-
-int32_t msm_sensor_get_dt_gpio_req_tbl(struct device_node *of_node,
- struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
- uint16_t gpio_array_size)
-{
- int32_t rc = 0, i = 0;
- uint32_t count = 0;
- uint32_t *val_array = NULL;
-
- if (!of_get_property(of_node, "qcom,gpio-req-tbl-num", &count))
- return 0;
-
- count /= sizeof(uint32_t);
- if (!count) {
- pr_err("%s qcom,gpio-req-tbl-num 0\n", __func__);
- return 0;
- }
-
- val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
- if (!val_array) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- return -ENOMEM;
- }
-
- gconf->cam_gpio_req_tbl = kzalloc(sizeof(struct gpio) * count,
- GFP_KERNEL);
- if (!gconf->cam_gpio_req_tbl) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- goto ERROR1;
- }
- gconf->cam_gpio_req_tbl_size = count;
-
- rc = of_property_read_u32_array(of_node, "qcom,gpio-req-tbl-num",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- if (val_array[i] >= gpio_array_size) {
- pr_err("%s gpio req tbl index %d invalid\n",
- __func__, val_array[i]);
- return -EINVAL;
- }
- gconf->cam_gpio_req_tbl[i].gpio = gpio_array[val_array[i]];
- CDBG("%s cam_gpio_req_tbl[%d].gpio = %d\n", __func__, i,
- gconf->cam_gpio_req_tbl[i].gpio);
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,gpio-req-tbl-flags",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- gconf->cam_gpio_req_tbl[i].flags = val_array[i];
- CDBG("%s cam_gpio_req_tbl[%d].flags = %ld\n", __func__, i,
- gconf->cam_gpio_req_tbl[i].flags);
- }
-
- for (i = 0; i < count; i++) {
- rc = of_property_read_string_index(of_node,
- "qcom,gpio-req-tbl-label", i,
- &gconf->cam_gpio_req_tbl[i].label);
- CDBG("%s cam_gpio_req_tbl[%d].label = %s\n", __func__, i,
- gconf->cam_gpio_req_tbl[i].label);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- }
-
- kfree(val_array);
- return rc;
-
-ERROR2:
- kfree(gconf->cam_gpio_req_tbl);
-ERROR1:
- kfree(val_array);
- gconf->cam_gpio_req_tbl_size = 0;
- return rc;
-}
-
-int32_t msm_sensor_get_dt_gpio_set_tbl(struct device_node *of_node,
- struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
- uint16_t gpio_array_size)
-{
- int32_t rc = 0, i = 0;
- uint32_t count = 0;
- uint32_t *val_array = NULL;
-
- if (!of_get_property(of_node, "qcom,gpio-set-tbl-num", &count))
- return 0;
-
- count /= sizeof(uint32_t);
- if (!count) {
- pr_err("%s qcom,gpio-set-tbl-num 0\n", __func__);
- return 0;
- }
-
- val_array = kzalloc(sizeof(uint32_t) * count, GFP_KERNEL);
- if (!val_array) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- return -ENOMEM;
- }
-
- gconf->cam_gpio_set_tbl = kzalloc(sizeof(struct msm_gpio_set_tbl) *
- count, GFP_KERNEL);
- if (!gconf->cam_gpio_set_tbl) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- goto ERROR1;
- }
- gconf->cam_gpio_set_tbl_size = count;
-
- rc = of_property_read_u32_array(of_node, "qcom,gpio-set-tbl-num",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- if (val_array[i] >= gpio_array_size) {
- pr_err("%s gpio set tbl index %d invalid\n",
- __func__, val_array[i]);
- return -EINVAL;
- }
- gconf->cam_gpio_set_tbl[i].gpio = gpio_array[val_array[i]];
- CDBG("%s cam_gpio_set_tbl[%d].gpio = %d\n", __func__, i,
- gconf->cam_gpio_set_tbl[i].gpio);
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,gpio-set-tbl-flags",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- gconf->cam_gpio_set_tbl[i].flags = val_array[i];
- CDBG("%s cam_gpio_set_tbl[%d].flags = %ld\n", __func__, i,
- gconf->cam_gpio_set_tbl[i].flags);
- }
-
- rc = of_property_read_u32_array(of_node, "qcom,gpio-set-tbl-delay",
- val_array, count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- gconf->cam_gpio_set_tbl[i].delay = val_array[i];
- CDBG("%s cam_gpio_set_tbl[%d].delay = %d\n", __func__, i,
- gconf->cam_gpio_set_tbl[i].delay);
- }
-
- kfree(val_array);
- return rc;
-
-ERROR2:
- kfree(gconf->cam_gpio_set_tbl);
-ERROR1:
- kfree(val_array);
- gconf->cam_gpio_set_tbl_size = 0;
- return rc;
-}
-
-int32_t msm_sensor_init_gpio_pin_tbl(struct device_node *of_node,
- struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
- uint16_t gpio_array_size)
-{
- int32_t rc = 0;
- int32_t val = 0;
-
- gconf->gpio_num_info = kzalloc(sizeof(struct msm_camera_gpio_num_info),
- GFP_KERNEL);
- if (!gconf->gpio_num_info) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- return rc;
- }
-
- if (of_property_read_bool(of_node, "qcom,gpio-reset") == true) {
- rc = of_property_read_u32(of_node, "qcom,gpio-reset", &val);
- if (rc < 0) {
- pr_err("%s:%d read qcom,gpio-reset failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- } else if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-reset invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_RESET] =
- gpio_array[val];
- CDBG("%s qcom,gpio-reset %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_RESET]);
- }
-
- if (of_property_read_bool(of_node, "qcom,gpio-standby") == true) {
- rc = of_property_read_u32(of_node, "qcom,gpio-standby", &val);
- if (rc < 0) {
- pr_err("%s:%d read qcom,gpio-standby failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- } else if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-standby invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_STANDBY] =
- gpio_array[val];
- CDBG("%s qcom,gpio-reset %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_STANDBY]);
- }
-
- rc = of_property_read_u32(of_node, "qcom,gpio-vio", &val);
- if (!rc) {
- if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-vio invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VIO] =
- gpio_array[val];
- CDBG("%s qcom,gpio-vio %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VIO]);
- } else if (rc != -EINVAL) {
- pr_err("%s:%d read qcom,gpio-vio failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- }
-
- rc = of_property_read_u32(of_node, "qcom,gpio-vana", &val);
- if (!rc) {
- if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-vana invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VANA] =
- gpio_array[val];
- CDBG("%s qcom,gpio-vana %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VANA]);
- } else if (rc != -EINVAL) {
- pr_err("%s:%d read qcom,gpio-vana failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- }
-
- rc = of_property_read_u32(of_node, "qcom,gpio-vdig", &val);
- if (!rc) {
- if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-vdig invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VDIG] =
- gpio_array[val];
- CDBG("%s qcom,gpio-vdig %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VDIG]);
- } else if (rc != -EINVAL) {
- pr_err("%s:%d read qcom,gpio-vdig failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- }
-
- rc = of_property_read_u32(of_node, "qcom,gpio-vaf", &val);
- if (!rc) {
- if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-vaf invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VAF] =
- gpio_array[val];
- CDBG("%s qcom,gpio-vaf %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_VAF]);
- } else if (rc != -EINVAL) {
- pr_err("%s:%d read qcom,gpio-vaf failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- }
-
- rc = of_property_read_u32(of_node, "qcom,gpio-af-pwdm", &val);
- if (!rc) {
- if (val >= gpio_array_size) {
- pr_err("%s:%d qcom,gpio-af-pwdm invalid %d\n",
- __func__, __LINE__, val);
- goto ERROR;
- }
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_AF_PWDM] =
- gpio_array[val];
- CDBG("%s qcom,gpio-af-pwdm %d\n", __func__,
- gconf->gpio_num_info->gpio_num[SENSOR_GPIO_AF_PWDM]);
- } else if (rc != -EINVAL) {
- pr_err("%s:%d read qcom,gpio-af-pwdm failed rc %d\n",
- __func__, __LINE__, rc);
- goto ERROR;
- }
- return 0;
-
-ERROR:
- kfree(gconf->gpio_num_info);
- gconf->gpio_num_info = NULL;
- return rc;
-}
-
-static int32_t msm_sensor_get_dt_actuator_data(struct device_node *of_node,
- struct msm_camera_sensor_board_info *sensordata)
-{
- int32_t rc = 0;
- uint32_t val = 0;
-
- rc = of_property_read_u32(of_node, "qcom,actuator-cam-name", &val);
- CDBG("%s qcom,actuator-cam-name %d, rc %d\n", __func__, val, rc);
- if (rc < 0)
- return 0;
-
- sensordata->actuator_info = kzalloc(sizeof(struct msm_actuator_info),
- GFP_KERNEL);
- if (!sensordata->actuator_info) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- rc = -ENOMEM;
- goto ERROR;
- }
-
- sensordata->actuator_info->cam_name = val;
-
- rc = of_property_read_u32(of_node, "qcom,actuator-vcm-pwd", &val);
- CDBG("%s qcom,actuator-vcm-pwd %d, rc %d\n", __func__, val, rc);
- if (!rc)
- sensordata->actuator_info->vcm_pwd = val;
-
- rc = of_property_read_u32(of_node, "qcom,actuator-vcm-enable", &val);
- CDBG("%s qcom,actuator-vcm-enable %d, rc %d\n", __func__, val, rc);
- if (!rc)
- sensordata->actuator_info->vcm_enable = val;
-
return 0;
-ERROR:
+FREE_UP:
+ kfree(power_info->power_setting);
+FAILED_1:
return rc;
}
@@ -718,48 +121,13 @@
sensordata = s_ctrl->sensordata;
- sensordata->sensor_init_params = kzalloc(sizeof(
- struct msm_sensor_init_params), GFP_KERNEL);
- if (!sensordata->sensor_init_params) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- return -ENOMEM;
- }
-
rc = of_property_read_string(of_node, "qcom,sensor-name",
&sensordata->sensor_name);
CDBG("%s qcom,sensor-name %s, rc %d\n", __func__,
sensordata->sensor_name, rc);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR1;
- }
-
- rc = of_property_read_u32(of_node, "qcom,sensor-mode",
- &sensordata->sensor_init_params->modes_supported);
- CDBG("%s qcom,sensor-mode %d, rc %d\n", __func__,
- sensordata->sensor_init_params->modes_supported, rc);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR1;
- }
-
- rc = of_property_read_u32(of_node, "qcom,sensor-position",
- &sensordata->sensor_init_params->position);
- CDBG("%s qcom,sensor-position %d, rc %d\n", __func__,
- sensordata->sensor_init_params->position, rc);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR1;
- }
-
- rc = of_property_read_u32(of_node, "qcom,mount-angle",
- &sensordata->sensor_init_params->sensor_mount_angle);
- CDBG("%s qcom,mount-angle %d, rc %d\n", __func__,
- sensordata->sensor_init_params->sensor_mount_angle, rc);
- if (rc < 0) {
- /* Set default mount angle */
- sensordata->sensor_init_params->sensor_mount_angle = 0;
- rc = 0;
+ goto FREE_SENSORDATA;
}
rc = of_property_read_u32(of_node, "qcom,cci-master",
@@ -772,32 +140,86 @@
rc = 0;
}
- rc = msm_sensor_get_sub_module_index(of_node, sensordata);
+ rc = msm_sensor_get_sub_module_index(of_node, &sensordata->sensor_info);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR1;
+ goto FREE_SENSORDATA;
}
- rc = msm_sensor_get_dt_csi_data(of_node, sensordata);
+ /* Get sensor mount angle */
+ rc = of_property_read_u32(of_node, "qcom,mount-angle",
+ &sensordata->sensor_info->sensor_mount_angle);
+ CDBG("%s qcom,mount-angle %d, rc %d\n", __func__,
+ sensordata->sensor_info->sensor_mount_angle, rc);
+ if (rc < 0) {
+ /* Invalidate mount angle flag */
+ pr_err("%s Default sensor mount angle %d\n",
+ __func__, __LINE__);
+ sensordata->sensor_info->is_mount_angle_valid = 0;
+ sensordata->sensor_info->sensor_mount_angle = 0;
+ rc = 0;
+ } else {
+ sensordata->sensor_info->is_mount_angle_valid = 1;
+ }
+
+ rc = of_property_read_u32(of_node, "qcom,sensor-position",
+ &sensordata->sensor_info->position);
+ CDBG("%s qcom,sensor-position %d, rc %d\n", __func__,
+ sensordata->sensor_info->position, rc);
+ if (rc < 0) {
+ pr_err("%s Default sensor position %d\n", __func__, __LINE__);
+ sensordata->sensor_info->position = 0;
+ }
+
+ rc = of_property_read_u32(of_node, "qcom,sensor-mode",
+ &sensordata->sensor_info->modes_supported);
+ CDBG("%s qcom,sensor-mode %d, rc %d\n", __func__,
+ sensordata->sensor_info->modes_supported, rc);
+ if (rc < 0) {
+ pr_err("%s Default sensor mode %d\n", __func__, __LINE__);
+ sensordata->sensor_info->modes_supported = 0;
+ }
+
+ rc = msm_sensor_get_dt_csi_data(of_node, &sensordata->csi_lane_params);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR1;
+ goto FREE_SENSOR_INFO;
}
- rc = msm_sensor_get_dt_vreg_data(of_node, sensordata);
+ rc = msm_camera_get_dt_vreg_data(of_node,
+ &sensordata->power_info.cam_vreg,
+ &sensordata->power_info.num_vreg);
+ if (rc < 0)
+ goto FREE_CSI;
+
+ rc = msm_camera_get_dt_power_setting_data(of_node,
+ sensordata->power_info.cam_vreg,
+ sensordata->power_info.num_vreg,
+ &sensordata->power_info);
+
+
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
+ goto FREE_VREG;
}
- sensordata->gpio_conf = kzalloc(sizeof(struct msm_camera_gpio_conf),
- GFP_KERNEL);
- if (!sensordata->gpio_conf) {
+
+ rc = msm_camera_get_power_settimgs_from_sensor_lib(
+ &sensordata->power_info,
+ &s_ctrl->power_setting_array);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto FREE_VREG;
+ }
+
+ sensordata->power_info.gpio_conf = kzalloc(
+ sizeof(struct msm_camera_gpio_conf), GFP_KERNEL);
+ if (!sensordata->power_info.gpio_conf) {
pr_err("%s failed %d\n", __func__, __LINE__);
rc = -ENOMEM;
- goto ERROR3;
+ goto FREE_PS;
}
- gconf = sensordata->gpio_conf;
+ gconf = sensordata->power_info.gpio_conf;
gpio_array_size = of_gpio_count(of_node);
CDBG("%s gpio count %d\n", __func__, gpio_array_size);
@@ -807,7 +229,7 @@
GFP_KERNEL);
if (!gpio_array) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR4;
+ goto FREE_GPIO_CONF;
}
for (i = 0; i < gpio_array_size; i++) {
gpio_array[i] = of_get_gpio(of_node, i);
@@ -815,31 +237,32 @@
gpio_array[i]);
}
- rc = msm_sensor_get_dt_gpio_req_tbl(of_node, gconf,
+ rc = msm_camera_get_dt_gpio_req_tbl(of_node, gconf,
gpio_array, gpio_array_size);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR4;
+ goto FREE_GPIO_CONF;
}
- rc = msm_sensor_get_dt_gpio_set_tbl(of_node, gconf,
+ rc = msm_camera_get_dt_gpio_set_tbl(of_node, gconf,
gpio_array, gpio_array_size);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR5;
+ goto FREE_GPIO_REQ_TBL;
}
- rc = msm_sensor_init_gpio_pin_tbl(of_node, gconf,
+ rc = msm_camera_init_gpio_pin_tbl(of_node, gconf,
gpio_array, gpio_array_size);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR6;
+ goto FREE_GPIO_SET_TBL;
}
}
- rc = msm_sensor_get_dt_actuator_data(of_node, sensordata);
+ rc = msm_sensor_get_dt_actuator_data(of_node,
+ &sensordata->actuator_info);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR7;
+ goto FREE_GPIO_PIN_TBL;
}
sensordata->slave_info = kzalloc(sizeof(struct msm_camera_slave_info),
@@ -847,19 +270,23 @@
if (!sensordata->slave_info) {
pr_err("%s failed %d\n", __func__, __LINE__);
rc = -ENOMEM;
- goto ERROR8;
+ goto FREE_ACTUATOR_INFO;
}
rc = of_property_read_u32_array(of_node, "qcom,slave-id",
id_info, 3);
if (rc < 0) {
pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR9;
+ goto FREE_SLAVE_INFO;
}
sensordata->slave_info->sensor_slave_addr = id_info[0];
sensordata->slave_info->sensor_id_reg_addr = id_info[1];
sensordata->slave_info->sensor_id = id_info[2];
+ CDBG("%s:%d slave addr %x sensor reg %x id %x\n", __func__, __LINE__,
+ sensordata->slave_info->sensor_slave_addr,
+ sensordata->slave_info->sensor_id_reg_addr,
+ sensordata->slave_info->sensor_id);
/*Optional property, don't return error if absent */
ret = of_property_read_string(of_node, "qcom,vdd-cx-name",
@@ -871,23 +298,28 @@
return rc;
-ERROR9:
+FREE_SLAVE_INFO:
kfree(s_ctrl->sensordata->slave_info);
-ERROR8:
+FREE_ACTUATOR_INFO:
kfree(s_ctrl->sensordata->actuator_info);
-ERROR7:
- kfree(s_ctrl->sensordata->gpio_conf->gpio_num_info);
-ERROR6:
- kfree(s_ctrl->sensordata->gpio_conf->cam_gpio_set_tbl);
-ERROR5:
- kfree(s_ctrl->sensordata->gpio_conf->cam_gpio_req_tbl);
-ERROR4:
- kfree(s_ctrl->sensordata->gpio_conf);
-ERROR3:
- kfree(s_ctrl->sensordata->cam_vreg);
-ERROR2:
+FREE_GPIO_PIN_TBL:
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->gpio_num_info);
+FREE_GPIO_SET_TBL:
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->cam_gpio_set_tbl);
+FREE_GPIO_REQ_TBL:
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->cam_gpio_req_tbl);
+FREE_GPIO_CONF:
+ kfree(s_ctrl->sensordata->power_info.gpio_conf);
+FREE_PS:
+ kfree(s_ctrl->sensordata->power_info.power_setting);
+ kfree(s_ctrl->sensordata->power_info.power_down_setting);
+FREE_VREG:
+ kfree(s_ctrl->sensordata->power_info.cam_vreg);
+FREE_CSI:
kfree(s_ctrl->sensordata->csi_lane_params);
-ERROR1:
+FREE_SENSOR_INFO:
+ kfree(s_ctrl->sensordata->sensor_info);
+FREE_SENSORDATA:
kfree(s_ctrl->sensordata);
kfree(gpio_array);
return rc;
@@ -930,20 +362,21 @@
int32_t msm_sensor_free_sensor_data(struct msm_sensor_ctrl_t *s_ctrl)
{
- if (!s_ctrl->pdev)
+ if (!s_ctrl->pdev && !s_ctrl->sensor_i2c_client->client)
return 0;
kfree(s_ctrl->sensordata->slave_info);
+ kfree(s_ctrl->sensordata->cam_slave_info);
kfree(s_ctrl->sensordata->actuator_info);
- kfree(s_ctrl->sensordata->gpio_conf->gpio_num_info);
- kfree(s_ctrl->sensordata->gpio_conf->cam_gpio_set_tbl);
- kfree(s_ctrl->sensordata->gpio_conf->cam_gpio_req_tbl);
- kfree(s_ctrl->sensordata->gpio_conf);
- kfree(s_ctrl->sensordata->cam_vreg);
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->gpio_num_info);
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->cam_gpio_set_tbl);
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->cam_gpio_req_tbl);
+ kfree(s_ctrl->sensordata->power_info.gpio_conf);
+ kfree(s_ctrl->sensordata->power_info.cam_vreg);
+ kfree(s_ctrl->sensordata->power_info.power_setting);
kfree(s_ctrl->sensordata->csi_lane_params);
kfree(s_ctrl->sensordata->sensor_info);
- kfree(s_ctrl->sensordata->sensor_init_params);
+ kfree(s_ctrl->sensordata->power_info.clk_info);
kfree(s_ctrl->sensordata);
- kfree(s_ctrl->clk_info);
return 0;
}
@@ -961,268 +394,105 @@
[SENSOR_CAM_CLK] = {"cam_clk", 0},
};
-int32_t msm_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
+int msm_sensor_power_down(struct msm_sensor_ctrl_t *s_ctrl)
{
- int32_t rc = 0, index = 0;
- struct msm_sensor_power_setting_array *power_setting_array = NULL;
- struct msm_sensor_power_setting *power_setting = NULL;
- struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
- s_ctrl->stop_setting_valid = 0;
+ struct msm_camera_power_ctrl_t *power_info;
+ enum msm_camera_device_type_t sensor_device_type;
+ struct msm_camera_i2c_client *sensor_i2c_client;
- CDBG("%s:%d\n", __func__, __LINE__);
- power_setting_array = &s_ctrl->power_setting_array;
-
- if (data->gpio_conf->cam_gpiomux_conf_tbl != NULL) {
- pr_err("%s:%d mux install\n", __func__, __LINE__);
- msm_gpiomux_install(
- (struct msm_gpiomux_config *)
- data->gpio_conf->cam_gpiomux_conf_tbl,
- data->gpio_conf->cam_gpiomux_conf_tbl_size);
+ if (!s_ctrl) {
+ pr_err("%s:%d failed: s_ctrl %p\n",
+ __func__, __LINE__, s_ctrl);
+ return -EINVAL;
}
- rc = msm_camera_request_gpio_table(
- data->gpio_conf->cam_gpio_req_tbl,
- data->gpio_conf->cam_gpio_req_tbl_size, 1);
- if (rc < 0) {
- pr_err("%s: request gpio failed\n", __func__);
+ power_info = &s_ctrl->sensordata->power_info;
+ sensor_device_type = s_ctrl->sensor_device_type;
+ sensor_i2c_client = s_ctrl->sensor_i2c_client;
+
+ if (!power_info || !sensor_i2c_client) {
+ pr_err("%s:%d failed: power_info %p sensor_i2c_client %p\n",
+ __func__, __LINE__, power_info, sensor_i2c_client);
+ return -EINVAL;
+ }
+ return msm_camera_power_down(power_info, sensor_device_type,
+ sensor_i2c_client);
+}
+
+int msm_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int rc;
+ struct msm_camera_power_ctrl_t *power_info;
+ struct msm_camera_i2c_client *sensor_i2c_client;
+ struct msm_camera_slave_info *slave_info;
+ const char *sensor_name;
+
+ if (!s_ctrl) {
+ pr_err("%s:%d failed: %p\n",
+ __func__, __LINE__, s_ctrl);
+ return -EINVAL;
+ }
+
+ power_info = &s_ctrl->sensordata->power_info;
+ sensor_i2c_client = s_ctrl->sensor_i2c_client;
+ slave_info = s_ctrl->sensordata->slave_info;
+ sensor_name = s_ctrl->sensordata->sensor_name;
+
+ if (!power_info || !sensor_i2c_client || !slave_info ||
+ !sensor_name) {
+ pr_err("%s:%d failed: %p %p %p %p\n",
+ __func__, __LINE__, power_info,
+ sensor_i2c_client, slave_info, sensor_name);
+ return -EINVAL;
+ }
+
+ rc = msm_camera_power_up(power_info, s_ctrl->sensor_device_type,
+ sensor_i2c_client);
+ if (rc < 0)
return rc;
- }
- for (index = 0; index < power_setting_array->size; index++) {
- CDBG("%s index %d\n", __func__, index);
- power_setting = &power_setting_array->power_setting[index];
- CDBG("%s type %d\n", __func__, power_setting->seq_type);
- switch (power_setting->seq_type) {
- case SENSOR_CLK:
- if (power_setting->seq_val >= s_ctrl->clk_info_size) {
- pr_err("%s clk index %d >= max %d\n", __func__,
- power_setting->seq_val,
- s_ctrl->clk_info_size);
- goto power_up_failed;
- }
- if (power_setting->config_val)
- s_ctrl->clk_info[power_setting->seq_val].
- clk_rate = power_setting->config_val;
+ rc = msm_sensor_check_id(s_ctrl);
+ if (rc < 0)
+ msm_camera_power_down(power_info, s_ctrl->sensor_device_type,
+ sensor_i2c_client);
- rc = msm_cam_clk_enable(s_ctrl->dev,
- &s_ctrl->clk_info[0],
- (struct clk **)&power_setting->data[0],
- s_ctrl->clk_info_size,
- 1);
- if (rc < 0) {
- pr_err("%s: clk enable failed\n",
- __func__);
- goto power_up_failed;
- }
- break;
- case SENSOR_GPIO:
- if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
- !data->gpio_conf->gpio_num_info) {
- pr_err("%s gpio index %d >= max %d\n", __func__,
- power_setting->seq_val,
- SENSOR_GPIO_MAX);
- goto power_up_failed;
- }
- pr_debug("%s:%d gpio set val %d\n", __func__, __LINE__,
- data->gpio_conf->gpio_num_info->gpio_num
- [power_setting->seq_val]);
- gpio_set_value_cansleep(
- data->gpio_conf->gpio_num_info->gpio_num
- [power_setting->seq_val],
- power_setting->config_val);
- break;
- case SENSOR_VREG:
- if (power_setting->seq_val >= CAM_VREG_MAX) {
- pr_err("%s vreg index %d >= max %d\n", __func__,
- power_setting->seq_val,
- SENSOR_GPIO_MAX);
- goto power_up_failed;
- }
- msm_camera_config_single_vreg(s_ctrl->dev,
- &data->cam_vreg[power_setting->seq_val],
- (struct regulator **)&power_setting->data[0],
- 1);
- break;
- case SENSOR_I2C_MUX:
- if (data->i2c_conf && data->i2c_conf->use_i2c_mux)
- msm_sensor_enable_i2c_mux(data->i2c_conf);
- break;
- default:
- pr_err("%s error power seq type %d\n", __func__,
- power_setting->seq_type);
- break;
- }
- if (power_setting->delay > 20) {
- msleep(power_setting->delay);
- } else if (power_setting->delay) {
- usleep_range(power_setting->delay * 1000,
- (power_setting->delay * 1000) + 1000);
- }
- }
-
- if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_util(
- s_ctrl->sensor_i2c_client, MSM_CCI_INIT);
- if (rc < 0) {
- pr_err("%s cci_init failed\n", __func__);
- goto power_up_failed;
- }
- }
-
- if (s_ctrl->func_tbl->sensor_match_id)
- rc = s_ctrl->func_tbl->sensor_match_id(s_ctrl);
- else
- rc = msm_sensor_match_id(s_ctrl);
- if (rc < 0) {
- pr_err("%s:%d match id failed rc %d\n", __func__, __LINE__, rc);
- goto power_up_failed;
- }
-
- CDBG("%s exit\n", __func__);
- return 0;
-power_up_failed:
- pr_err("%s:%d failed\n", __func__, __LINE__);
- if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_util(
- s_ctrl->sensor_i2c_client, MSM_CCI_RELEASE);
- }
-
- for (index--; index >= 0; index--) {
- CDBG("%s index %d\n", __func__, index);
- power_setting = &power_setting_array->power_setting[index];
- CDBG("%s type %d\n", __func__, power_setting->seq_type);
- switch (power_setting->seq_type) {
- case SENSOR_CLK:
- msm_cam_clk_enable(s_ctrl->dev,
- &s_ctrl->clk_info[0],
- (struct clk **)&power_setting->data[0],
- s_ctrl->clk_info_size,
- 0);
- break;
- case SENSOR_GPIO:
- gpio_set_value_cansleep(
- data->gpio_conf->gpio_num_info->gpio_num
- [power_setting->seq_val], GPIOF_OUT_INIT_LOW);
- break;
- case SENSOR_VREG:
- msm_camera_config_single_vreg(s_ctrl->dev,
- &data->cam_vreg[power_setting->seq_val],
- (struct regulator **)&power_setting->data[0],
- 0);
- break;
- case SENSOR_I2C_MUX:
- if (data->i2c_conf && data->i2c_conf->use_i2c_mux)
- msm_sensor_disable_i2c_mux(data->i2c_conf);
- break;
- default:
- pr_err("%s error power seq type %d\n", __func__,
- power_setting->seq_type);
- break;
- }
- if (power_setting->delay > 20) {
- msleep(power_setting->delay);
- } else if (power_setting->delay) {
- usleep_range(power_setting->delay * 1000,
- (power_setting->delay * 1000) + 1000);
- }
- }
- msm_camera_request_gpio_table(
- data->gpio_conf->cam_gpio_req_tbl,
- data->gpio_conf->cam_gpio_req_tbl_size, 0);
return rc;
}
-int32_t msm_sensor_power_down(struct msm_sensor_ctrl_t *s_ctrl)
+int msm_sensor_match_id(struct msm_sensor_ctrl_t *s_ctrl)
{
- int32_t index = 0;
- struct msm_sensor_power_setting_array *power_setting_array = NULL;
- struct msm_sensor_power_setting *power_setting = NULL;
- struct msm_camera_sensor_board_info *data = s_ctrl->sensordata;
- s_ctrl->stop_setting_valid = 0;
-
- CDBG("%s:%d\n", __func__, __LINE__);
- power_setting_array = &s_ctrl->power_setting_array;
-
- if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
- s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_util(
- s_ctrl->sensor_i2c_client, MSM_CCI_RELEASE);
- }
-
- for (index = (power_setting_array->size - 1); index >= 0; index--) {
- CDBG("%s index %d\n", __func__, index);
- power_setting = &power_setting_array->power_setting[index];
- CDBG("%s type %d\n", __func__, power_setting->seq_type);
- switch (power_setting->seq_type) {
- case SENSOR_CLK:
- msm_cam_clk_enable(s_ctrl->dev,
- &s_ctrl->clk_info[0],
- (struct clk **)&power_setting->data[0],
- s_ctrl->clk_info_size,
- 0);
- break;
- case SENSOR_GPIO:
- if (power_setting->seq_val >= SENSOR_GPIO_MAX ||
- !data->gpio_conf->gpio_num_info) {
- pr_err("%s gpio index %d >= max %d\n", __func__,
- power_setting->seq_val,
- SENSOR_GPIO_MAX);
- continue;
- }
- gpio_set_value_cansleep(
- data->gpio_conf->gpio_num_info->gpio_num
- [power_setting->seq_val], GPIOF_OUT_INIT_LOW);
- break;
- case SENSOR_VREG:
- if (power_setting->seq_val >= CAM_VREG_MAX) {
- pr_err("%s vreg index %d >= max %d\n", __func__,
- power_setting->seq_val,
- SENSOR_GPIO_MAX);
- continue;
- }
- msm_camera_config_single_vreg(s_ctrl->dev,
- &data->cam_vreg[power_setting->seq_val],
- (struct regulator **)&power_setting->data[0],
- 0);
- break;
- case SENSOR_I2C_MUX:
- if (data->i2c_conf && data->i2c_conf->use_i2c_mux)
- msm_sensor_disable_i2c_mux(data->i2c_conf);
- break;
- default:
- pr_err("%s error power seq type %d\n", __func__,
- power_setting->seq_type);
- break;
- }
- if (power_setting->delay > 20) {
- msleep(power_setting->delay);
- } else if (power_setting->delay) {
- usleep_range(power_setting->delay * 1000,
- (power_setting->delay * 1000) + 1000);
- }
- }
- msm_camera_request_gpio_table(
- data->gpio_conf->cam_gpio_req_tbl,
- data->gpio_conf->cam_gpio_req_tbl_size, 0);
- CDBG("%s exit\n", __func__);
- return 0;
-}
-
-int32_t msm_sensor_match_id(struct msm_sensor_ctrl_t *s_ctrl)
-{
- int32_t rc = 0;
+ int rc = 0;
uint16_t chipid = 0;
- rc = s_ctrl->sensor_i2c_client->i2c_func_tbl->i2c_read(
- s_ctrl->sensor_i2c_client,
- s_ctrl->sensordata->slave_info->sensor_id_reg_addr,
- &chipid, MSM_CAMERA_I2C_WORD_DATA);
+ struct msm_camera_i2c_client *sensor_i2c_client;
+ struct msm_camera_slave_info *slave_info;
+ const char *sensor_name;
+
+ if (!s_ctrl) {
+ pr_err("%s:%d failed: %p\n",
+ __func__, __LINE__, s_ctrl);
+ return -EINVAL;
+ }
+ sensor_i2c_client = s_ctrl->sensor_i2c_client;
+ slave_info = s_ctrl->sensordata->slave_info;
+ sensor_name = s_ctrl->sensordata->sensor_name;
+
+ if (!sensor_i2c_client || !slave_info || !sensor_name) {
+ pr_err("%s:%d failed: %p %p %p\n",
+ __func__, __LINE__, sensor_i2c_client, slave_info,
+ sensor_name);
+ return -EINVAL;
+ }
+
+ rc = sensor_i2c_client->i2c_func_tbl->i2c_read(
+ sensor_i2c_client, slave_info->sensor_id_reg_addr,
+ &chipid, MSM_CAMERA_I2C_WORD_DATA);
if (rc < 0) {
- pr_err("%s: %s: read id failed\n", __func__,
- s_ctrl->sensordata->sensor_name);
+ pr_err("%s: %s: read id failed\n", __func__, sensor_name);
return rc;
}
CDBG("%s: read id: %x expected id %x:\n", __func__, chipid,
- s_ctrl->sensordata->slave_info->sensor_id);
- if (chipid != s_ctrl->sensordata->slave_info->sensor_id) {
+ slave_info->sensor_id);
+ if (chipid != slave_info->sensor_id) {
pr_err("msm_sensor_match_id chip id doesnot match\n");
return -ENODEV;
}
@@ -1281,12 +551,11 @@
}
}
-int32_t msm_sensor_config(struct msm_sensor_ctrl_t *s_ctrl,
- void __user *argp)
+int msm_sensor_config(struct msm_sensor_ctrl_t *s_ctrl, void __user *argp)
{
struct sensorb_cfg_data *cdata = (struct sensorb_cfg_data *)argp;
long rc = 0;
- int32_t i = 0;
+ int i = 0;
mutex_lock(s_ctrl->msm_sensor_mutex);
CDBG("%s:%d %s cfgtype = %d\n", __func__, __LINE__,
s_ctrl->sensordata->sensor_name, cdata->cfgtype);
@@ -1300,6 +569,10 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
cdata->cfg.sensor_info.subdev_id[i] =
s_ctrl->sensordata->sensor_info->subdev_id[i];
+ cdata->cfg.sensor_info.is_mount_angle_valid =
+ s_ctrl->sensordata->sensor_info->is_mount_angle_valid;
+ cdata->cfg.sensor_info.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d sensor name %s\n", __func__, __LINE__,
cdata->cfg.sensor_info.sensor_name);
CDBG("%s:%d session id %d\n", __func__, __LINE__,
@@ -1307,11 +580,18 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
cdata->cfg.sensor_info.subdev_id[i]);
+ CDBG("%s:%d mount angle valid %d value %d\n", __func__,
+ __LINE__, cdata->cfg.sensor_info.is_mount_angle_valid,
+ cdata->cfg.sensor_info.sensor_mount_angle);
break;
case CFG_GET_SENSOR_INIT_PARAMS:
- cdata->cfg.sensor_init_params =
- *s_ctrl->sensordata->sensor_init_params;
+ cdata->cfg.sensor_init_params.modes_supported =
+ s_ctrl->sensordata->sensor_info->modes_supported;
+ cdata->cfg.sensor_init_params.position =
+ s_ctrl->sensordata->sensor_info->position;
+ cdata->cfg.sensor_init_params.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
__LINE__,
cdata->cfg.sensor_init_params.modes_supported,
@@ -1320,11 +600,12 @@
break;
case CFG_SET_SLAVE_INFO: {
struct msm_camera_sensor_slave_info sensor_slave_info;
- struct msm_sensor_power_setting_array *power_setting_array;
- int slave_index = 0;
+ struct msm_camera_power_ctrl_t *p_ctrl;
+ uint16_t size;
+ int s_index = 0;
if (copy_from_user(&sensor_slave_info,
- (void *)cdata->cfg.setting,
- sizeof(struct msm_camera_sensor_slave_info))) {
+ (void *)cdata->cfg.setting,
+ sizeof(sensor_slave_info))) {
pr_err("%s:%d failed\n", __func__, __LINE__);
rc = -EFAULT;
break;
@@ -1338,37 +619,34 @@
/* Update sensor address type */
s_ctrl->sensor_i2c_client->addr_type =
sensor_slave_info.addr_type;
+ p_ctrl = &s_ctrl->sensordata->power_info;
- /* Update power up / down sequence */
- s_ctrl->power_setting_array =
- sensor_slave_info.power_setting_array;
- power_setting_array = &s_ctrl->power_setting_array;
-
- if (!power_setting_array->size) {
- pr_err("%s:%d failed\n", __func__, __LINE__);
- rc = -EFAULT;
- break;
+ /* Update power up sequence */
+ size = sensor_slave_info.power_setting_array.size;
+ if (p_ctrl->power_setting_size < size) {
+ struct msm_sensor_power_setting *tmp;
+ tmp = kmalloc(sizeof(*tmp) * size, GFP_KERNEL);
+ if (!tmp) {
+ pr_err("%s: failed to alloc mem\n", __func__);
+ rc = -ENOMEM;
+ break;
+ }
+ kfree(p_ctrl->power_setting);
+ p_ctrl->power_setting = tmp;
}
+ p_ctrl->power_setting_size = size;
- power_setting_array->power_setting = kzalloc(
- power_setting_array->size *
- sizeof(struct msm_sensor_power_setting), GFP_KERNEL);
- if (!power_setting_array->power_setting) {
- pr_err("%s:%d failed\n", __func__, __LINE__);
- rc = -ENOMEM;
- break;
- }
- if (copy_from_user(power_setting_array->power_setting,
- (void *)
+
+ rc = copy_from_user(p_ctrl->power_setting, (void *)
sensor_slave_info.power_setting_array.power_setting,
- power_setting_array->size *
- sizeof(struct msm_sensor_power_setting))) {
+ size * sizeof(struct msm_sensor_power_setting));
+ if (rc) {
pr_err("%s:%d failed\n", __func__, __LINE__);
- kfree(power_setting_array->power_setting);
+ kfree(sensor_slave_info.power_setting_array.
+ power_setting);
rc = -EFAULT;
break;
}
- s_ctrl->free_power_setting = true;
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.slave_addr);
CDBG("%s sensor addr type %d\n", __func__,
@@ -1377,19 +655,62 @@
sensor_slave_info.sensor_id_info.sensor_id_reg_addr);
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.sensor_id_info.sensor_id);
- for (slave_index = 0; slave_index <
- power_setting_array->size; slave_index++) {
- CDBG("%s i %d power setting %d %d %ld %d\n", __func__,
- slave_index,
- power_setting_array->power_setting[slave_index].
- seq_type,
- power_setting_array->power_setting[slave_index].
- seq_val,
- power_setting_array->power_setting[slave_index].
- config_val,
- power_setting_array->power_setting[slave_index].
- delay);
+ for (s_index = 0; s_index <
+ p_ctrl->power_setting_size; s_index++) {
+ CDBG("%s i %d power up setting %d %d %ld %d\n",
+ __func__,
+ s_index,
+ p_ctrl->power_setting[s_index].seq_type,
+ p_ctrl->power_setting[s_index].seq_val,
+ p_ctrl->power_setting[s_index].config_val,
+ p_ctrl->power_setting[s_index].delay);
}
+
+ /* Update power down sequence */
+ if (!sensor_slave_info.power_setting_array.power_down_setting ||
+ 0 == size) {
+ pr_err("%s: Missing dedicated power down sequence\n",
+ __func__);
+ break;
+ }
+ size = sensor_slave_info.power_setting_array.size_down;
+
+ if (p_ctrl->power_down_setting_size < size) {
+ struct msm_sensor_power_setting *tmp;
+ tmp = kmalloc(sizeof(*tmp) * size, GFP_KERNEL);
+ if (!tmp) {
+ pr_err("%s: failed to alloc mem\n", __func__);
+ rc = -ENOMEM;
+ break;
+ }
+ kfree(p_ctrl->power_down_setting);
+ p_ctrl->power_down_setting = tmp;
+ }
+ p_ctrl->power_down_setting_size = size;
+
+
+ rc = copy_from_user(p_ctrl->power_down_setting, (void *)
+ sensor_slave_info.power_setting_array.
+ power_down_setting,
+ size * sizeof(struct msm_sensor_power_setting));
+ if (rc) {
+ pr_err("%s:%d failed\n", __func__, __LINE__);
+ kfree(sensor_slave_info.power_setting_array.
+ power_down_setting);
+ rc = -EFAULT;
+ break;
+ }
+ for (s_index = 0; s_index <
+ p_ctrl->power_down_setting_size; s_index++) {
+ CDBG("%s i %d power DOWN setting %d %d %ld %d\n",
+ __func__,
+ s_index,
+ p_ctrl->power_down_setting[s_index].seq_type,
+ p_ctrl->power_down_setting[s_index].seq_val,
+ p_ctrl->power_down_setting[s_index].config_val,
+ p_ctrl->power_down_setting[s_index].delay);
+ }
+
break;
}
case CFG_WRITE_I2C_ARRAY: {
@@ -1653,8 +974,7 @@
if (s_ctrl->sensordata->misc_regulator)
msm_sensor_misc_regulator(s_ctrl, 0);
- rc = s_ctrl->func_tbl->sensor_power_down(
- s_ctrl);
+ rc = s_ctrl->func_tbl->sensor_power_down(s_ctrl);
if (rc < 0) {
pr_err("%s:%d failed rc %ld\n", __func__,
__LINE__, rc);
@@ -1679,7 +999,7 @@
rc = -EFAULT;
break;
}
- s_ctrl->stop_setting_valid = 1;
+
reg_setting = stop_setting->reg_setting;
if (!stop_setting->size) {
@@ -1717,7 +1037,20 @@
return rc;
}
-static int32_t msm_sensor_power(struct v4l2_subdev *sd, int on)
+int msm_sensor_check_id(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int rc;
+
+ if (s_ctrl->func_tbl->sensor_match_id)
+ rc = s_ctrl->func_tbl->sensor_match_id(s_ctrl);
+ else
+ rc = msm_sensor_match_id(s_ctrl);
+ if (rc < 0)
+ pr_err("%s:%d match id failed rc %d\n", __func__, __LINE__, rc);
+ return rc;
+}
+
+static int msm_sensor_power(struct v4l2_subdev *sd, int on)
{
int rc = 0;
struct msm_sensor_ctrl_t *s_ctrl = get_sctrl(sd);
@@ -1726,15 +1059,11 @@
s_ctrl->func_tbl->sensor_power_down(s_ctrl);
s_ctrl->sensor_state = MSM_SENSOR_POWER_DOWN;
}
- if (s_ctrl->free_power_setting == true) {
- kfree(s_ctrl->power_setting_array.power_setting);
- s_ctrl->free_power_setting = false;
- }
mutex_unlock(s_ctrl->msm_sensor_mutex);
return rc;
}
-static int32_t msm_sensor_v4l2_enum_fmt(struct v4l2_subdev *sd,
+static int msm_sensor_v4l2_enum_fmt(struct v4l2_subdev *sd,
unsigned int index, enum v4l2_mbus_pixelcode *code)
{
struct msm_sensor_ctrl_t *s_ctrl = get_sctrl(sd);
@@ -1792,7 +1121,7 @@
int32_t msm_sensor_platform_probe(struct platform_device *pdev, void *data)
{
- int32_t rc = 0;
+ int rc = 0;
struct msm_sensor_ctrl_t *s_ctrl =
(struct msm_sensor_ctrl_t *)data;
struct msm_camera_cci_client *cci_client = NULL;
@@ -1800,7 +1129,6 @@
unsigned long mount_pos;
s_ctrl->pdev = pdev;
- s_ctrl->dev = &pdev->dev;
CDBG("%s called data %p\n", __func__, data);
CDBG("%s pdev name %s\n", __func__, pdev->id_entry->name);
if (pdev->dev.of_node) {
@@ -1810,6 +1138,7 @@
return rc;
}
}
+ s_ctrl->sensordata->power_info.dev = &pdev->dev;
s_ctrl->sensor_device_type = MSM_CAMERA_PLATFORM_DEVICE;
s_ctrl->sensor_i2c_client->cci_client = kzalloc(sizeof(
struct msm_camera_cci_client), GFP_KERNEL);
@@ -1832,20 +1161,22 @@
&msm_sensor_cci_func_tbl;
if (!s_ctrl->sensor_v4l2_subdev_ops)
s_ctrl->sensor_v4l2_subdev_ops = &msm_sensor_subdev_ops;
- s_ctrl->clk_info = kzalloc(sizeof(cam_8974_clk_info),
- GFP_KERNEL);
- if (!s_ctrl->clk_info) {
+ s_ctrl->sensordata->power_info.clk_info =
+ kzalloc(sizeof(cam_8974_clk_info), GFP_KERNEL);
+ if (!s_ctrl->sensordata->power_info.clk_info) {
pr_err("%s:%d failed nomem\n", __func__, __LINE__);
kfree(cci_client);
return -ENOMEM;
}
- memcpy(s_ctrl->clk_info, cam_8974_clk_info, sizeof(cam_8974_clk_info));
- s_ctrl->clk_info_size = ARRAY_SIZE(cam_8974_clk_info);
+ memcpy(s_ctrl->sensordata->power_info.clk_info, cam_8974_clk_info,
+ sizeof(cam_8974_clk_info));
+ s_ctrl->sensordata->power_info.clk_info_size =
+ ARRAY_SIZE(cam_8974_clk_info);
rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
if (rc < 0) {
pr_err("%s %s power up failed\n", __func__,
s_ctrl->sensordata->sensor_name);
- kfree(s_ctrl->clk_info);
+ kfree(s_ctrl->sensordata->power_info.clk_info);
kfree(cci_client);
return rc;
}
@@ -1864,11 +1195,11 @@
s_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_SENSOR;
s_ctrl->msm_sd.sd.entity.name =
s_ctrl->msm_sd.sd.name;
- mount_pos = s_ctrl->sensordata->sensor_init_params->position;
- mount_pos = mount_pos << 8;
+
+ mount_pos = s_ctrl->sensordata->sensor_info->position << 16;
mount_pos = mount_pos |
- (s_ctrl->sensordata->sensor_init_params->sensor_mount_angle / 90);
- s_ctrl->msm_sd.sd.entity.flags = mount_pos;
+ ((s_ctrl->sensordata->sensor_info->sensor_mount_angle / 90) << 8);
+ s_ctrl->msm_sd.sd.entity.flags = mount_pos | MEDIA_ENT_FL_DEFAULT;
rc = camera_init_v4l2(&s_ctrl->pdev->dev, &session_id);
CDBG("%s rc %d session_id %d\n", __func__, rc, session_id);
@@ -1882,7 +1213,7 @@
return rc;
}
-int32_t msm_sensor_i2c_probe(struct i2c_client *client,
+int msm_sensor_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id, struct msm_sensor_ctrl_t *s_ctrl)
{
int rc = 0;
@@ -1923,7 +1254,7 @@
if (s_ctrl->sensor_i2c_client != NULL) {
s_ctrl->sensor_i2c_client->client = client;
- s_ctrl->dev = &client->dev;
+ s_ctrl->sensordata->power_info.dev = &client->dev;
if (s_ctrl->sensordata->slave_info->sensor_slave_addr)
s_ctrl->sensor_i2c_client->client->addr =
s_ctrl->sensordata->slave_info->
@@ -1944,31 +1275,33 @@
s_ctrl->sensor_v4l2_subdev_ops = &msm_sensor_subdev_ops;
if (!client->dev.of_node) {
- s_ctrl->clk_info = kzalloc(sizeof(cam_8960_clk_info),
- GFP_KERNEL);
- if (!s_ctrl->clk_info) {
+ s_ctrl->sensordata->power_info.clk_info =
+ kzalloc(sizeof(cam_8960_clk_info), GFP_KERNEL);
+ if (!s_ctrl->sensordata->power_info.clk_info) {
pr_err("%s:%d failed nomem\n", __func__, __LINE__);
return -ENOMEM;
}
- memcpy(s_ctrl->clk_info, cam_8960_clk_info,
- sizeof(cam_8960_clk_info));
- s_ctrl->clk_info_size = ARRAY_SIZE(cam_8960_clk_info);
+ memcpy(s_ctrl->sensordata->power_info.clk_info,
+ cam_8960_clk_info, sizeof(cam_8960_clk_info));
+ s_ctrl->sensordata->power_info.clk_info_size =
+ ARRAY_SIZE(cam_8960_clk_info);
} else {
- s_ctrl->clk_info = kzalloc(sizeof(cam_8610_clk_info),
- GFP_KERNEL);
- if (!s_ctrl->clk_info) {
+ s_ctrl->sensordata->power_info.clk_info =
+ kzalloc(sizeof(cam_8610_clk_info), GFP_KERNEL);
+ if (!s_ctrl->sensordata->power_info.clk_info) {
pr_err("%s:%d failed nomem\n", __func__, __LINE__);
return -ENOMEM;
}
- memcpy(s_ctrl->clk_info, cam_8610_clk_info,
- sizeof(cam_8610_clk_info));
- s_ctrl->clk_info_size = ARRAY_SIZE(cam_8610_clk_info);
+ memcpy(s_ctrl->sensordata->power_info.clk_info,
+ cam_8610_clk_info, sizeof(cam_8610_clk_info));
+ s_ctrl->sensordata->power_info.clk_info_size =
+ ARRAY_SIZE(cam_8610_clk_info);
}
rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
if (rc < 0) {
pr_err("%s %s power up failed\n", __func__, client->name);
- kfree(s_ctrl->clk_info);
+ kfree(s_ctrl->sensordata->power_info.clk_info);
return rc;
}
@@ -1985,11 +1318,10 @@
s_ctrl->msm_sd.sd.entity.name =
s_ctrl->msm_sd.sd.name;
- mount_pos = s_ctrl->sensordata->sensor_init_params->position;
- mount_pos = mount_pos << 8;
+ mount_pos = s_ctrl->sensordata->sensor_info->position << 16;
mount_pos = mount_pos |
- (s_ctrl->sensordata->sensor_init_params->sensor_mount_angle / 90);
- s_ctrl->msm_sd.sd.entity.flags = mount_pos;
+ ((s_ctrl->sensordata->sensor_info->sensor_mount_angle / 90) << 8);
+ s_ctrl->msm_sd.sd.entity.flags = mount_pos | MEDIA_ENT_FL_DEFAULT;
rc = camera_init_v4l2(&s_ctrl->sensor_i2c_client->client->dev,
&session_id);
@@ -2002,3 +1334,77 @@
s_ctrl->func_tbl->sensor_power_down(s_ctrl);
return rc;
}
+
+int32_t msm_sensor_init_default_params(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = -ENOMEM;
+ struct msm_camera_cci_client *cci_client = NULL;
+ struct msm_cam_clk_info *clk_info = NULL;
+
+ /* Validate input parameters */
+ if (!s_ctrl) {
+ pr_err("%s:%d failed: invalid params s_ctrl %p\n", __func__,
+ __LINE__, s_ctrl);
+ return -EINVAL;
+ }
+
+ if (!s_ctrl->sensor_i2c_client) {
+ pr_err("%s:%d failed: invalid params sensor_i2c_client %p\n",
+ __func__, __LINE__, s_ctrl->sensor_i2c_client);
+ return -EINVAL;
+ }
+
+ /* Initialize cci_client */
+ s_ctrl->sensor_i2c_client->cci_client = kzalloc(sizeof(
+ struct msm_camera_cci_client), GFP_KERNEL);
+ if (!s_ctrl->sensor_i2c_client->cci_client) {
+ pr_err("%s:%d failed: no memory cci_client %p\n", __func__,
+ __LINE__, s_ctrl->sensor_i2c_client->cci_client);
+ return -ENOMEM;
+ }
+
+ if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE) {
+ cci_client = s_ctrl->sensor_i2c_client->cci_client;
+
+ /* Get CCI subdev */
+ cci_client->cci_subdev = msm_cci_get_subdev();
+
+ /* Update CCI / I2C function table */
+ if (!s_ctrl->sensor_i2c_client->i2c_func_tbl)
+ s_ctrl->sensor_i2c_client->i2c_func_tbl =
+ &msm_sensor_cci_func_tbl;
+ } else {
+ if (!s_ctrl->sensor_i2c_client->i2c_func_tbl) {
+ CDBG("%s:%d\n", __func__, __LINE__);
+ s_ctrl->sensor_i2c_client->i2c_func_tbl =
+ &msm_sensor_qup_func_tbl;
+ }
+ }
+
+ /* Update function table driven by ioctl */
+ if (!s_ctrl->func_tbl)
+ s_ctrl->func_tbl = &msm_sensor_func_tbl;
+
+ /* Update v4l2 subdev ops table */
+ if (!s_ctrl->sensor_v4l2_subdev_ops)
+ s_ctrl->sensor_v4l2_subdev_ops = &msm_sensor_subdev_ops;
+
+ /* Initialize clock info */
+ clk_info = kzalloc(sizeof(cam_8974_clk_info), GFP_KERNEL);
+ if (!clk_info) {
+ pr_err("%s:%d failed no memory clk_info %p\n", __func__,
+ __LINE__, clk_info);
+ rc = -ENOMEM;
+ goto FREE_CCI_CLIENT;
+ }
+ memcpy(clk_info, cam_8974_clk_info, sizeof(cam_8974_clk_info));
+ s_ctrl->sensordata->power_info.clk_info = clk_info;
+ s_ctrl->sensordata->power_info.clk_info_size =
+ ARRAY_SIZE(cam_8974_clk_info);
+
+ return 0;
+
+FREE_CCI_CLIENT:
+ kfree(cci_client);
+ return rc;
+}
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h
index a53d448..0f77567 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -30,6 +30,7 @@
#include <media/msm_cam_sensor.h>
#include <media/v4l2-subdev.h>
#include "msm_camera_i2c.h"
+#include "msm_camera_dt_util.h"
#include "msm_sd.h"
#define DEFINE_MSM_MUTEX(mutexname) \
@@ -44,53 +45,57 @@
struct msm_sensor_fn_t {
int (*sensor_config) (struct msm_sensor_ctrl_t *, void __user *);
- int (*sensor_power_down)
- (struct msm_sensor_ctrl_t *);
+ int (*sensor_power_down) (struct msm_sensor_ctrl_t *);
int (*sensor_power_up) (struct msm_sensor_ctrl_t *);
- int32_t (*sensor_match_id)(struct msm_sensor_ctrl_t *s_ctrl);
+ int (*sensor_match_id) (struct msm_sensor_ctrl_t *);
};
+
struct msm_sensor_ctrl_t {
struct platform_device *pdev;
- enum msm_camera_device_type_t sensor_device_type;
- enum cci_i2c_master_t cci_i2c_master;
- struct msm_camera_sensor_board_info *sensordata;
- struct msm_sensor_power_setting_array power_setting_array;
struct mutex *msm_sensor_mutex;
- struct msm_camera_i2c_client *sensor_i2c_client;
- struct device *dev;
-
+ enum msm_camera_device_type_t sensor_device_type;
+ struct msm_camera_sensor_board_info *sensordata;
+ struct msm_sensor_power_setting_array power_setting_array;
+ struct msm_sensor_packed_cfg_t *cfg_override;
struct msm_sd_subdev msm_sd;
+ enum cci_i2c_master_t cci_i2c_master;
+
+ struct msm_camera_i2c_client *sensor_i2c_client;
struct v4l2_subdev_info *sensor_v4l2_subdev_info;
uint8_t sensor_v4l2_subdev_info_size;
struct v4l2_subdev_ops *sensor_v4l2_subdev_ops;
struct msm_sensor_fn_t *func_tbl;
struct msm_camera_i2c_reg_setting stop_setting;
- bool stop_setting_valid;
- bool free_power_setting;
- struct msm_cam_clk_info *clk_info;
- uint16_t clk_info_size;
void *misc_regulator;
enum msm_sensor_state_t sensor_state;
+ uint8_t is_probe_succeed;
+ uint32_t id;
+ struct device_node *of_node;
};
-int32_t msm_sensor_config(struct msm_sensor_ctrl_t *s_ctrl,
- void __user *argp);
+int msm_sensor_config(struct msm_sensor_ctrl_t *s_ctrl, void __user *argp);
-int32_t msm_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl);
+int msm_sensor_power_up(struct msm_sensor_ctrl_t *s_ctrl);
-int32_t msm_sensor_power_down(struct msm_sensor_ctrl_t *s_ctrl);
+int msm_sensor_power_down(struct msm_sensor_ctrl_t *s_ctrl);
-int32_t msm_sensor_match_id(struct msm_sensor_ctrl_t *s_ctrl);
+int msm_sensor_check_id(struct msm_sensor_ctrl_t *s_ctrl);
+
+int msm_sensor_match_id(struct msm_sensor_ctrl_t *s_ctrl);
int32_t msm_sensor_platform_probe(struct platform_device *pdev,
void *data);
-int32_t msm_sensor_i2c_probe(struct i2c_client *client,
+int msm_sensor_update_cfg(struct msm_sensor_ctrl_t *s_ctrl);
+
+int msm_sensor_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id, struct msm_sensor_ctrl_t *s_ctrl);
-int32_t msm_sensor_free_sensor_data(struct msm_sensor_ctrl_t *s_ctrl);
+int msm_sensor_free_sensor_data(struct msm_sensor_ctrl_t *s_ctrl);
+
+int32_t msm_sensor_init_default_params(struct msm_sensor_ctrl_t *s_ctrl);
int32_t msm_sensor_get_dt_gpio_req_tbl(struct device_node *of_node,
struct msm_camera_gpio_conf *gconf, uint16_t *gpio_array,
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_driver.c b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_driver.c
new file mode 100644
index 0000000..f5be347
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_driver.c
@@ -0,0 +1,941 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define SENSOR_DRIVER_I2C "camera"
+/* Header file declaration */
+#include "msm_sensor.h"
+#include "msm_sd.h"
+#include "camera.h"
+#include "msm_cci.h"
+#include "msm_camera_dt_util.h"
+
+/* Logging macro */
+/*#define MSM_SENSOR_DRIVER_DEBUG*/
+#undef CDBG
+#ifdef MSM_SENSOR_DRIVER_DEBUG
+#define CDBG(fmt, args...) pr_err(fmt, ##args)
+#else
+#define CDBG(fmt, args...) pr_debug(fmt, ##args)
+#endif
+
+/* Static declaration */
+static struct msm_sensor_ctrl_t *g_sctrl[MAX_CAMERAS];
+
+static int msm_sensor_platform_remove(struct platform_device *pdev)
+{
+ struct msm_sensor_ctrl_t *s_ctrl;
+
+ pr_err("%s: sensor FREE\n", __func__);
+
+ s_ctrl = g_sctrl[pdev->id];
+ if (!s_ctrl) {
+ pr_err("%s: sensor device is NULL\n", __func__);
+ return 0;
+ }
+
+ msm_sensor_free_sensor_data(s_ctrl);
+ kfree(s_ctrl->msm_sensor_mutex);
+ kfree(s_ctrl->sensor_i2c_client);
+ kfree(s_ctrl);
+ g_sctrl[pdev->id] = NULL;
+
+ return 0;
+}
+
+
+static const struct of_device_id msm_sensor_driver_dt_match[] = {
+ {.compatible = "qcom,camera"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, msm_sensor_driver_dt_match);
+
+static struct platform_driver msm_sensor_platform_driver = {
+ .driver = {
+ .name = "qcom,camera",
+ .owner = THIS_MODULE,
+ .of_match_table = msm_sensor_driver_dt_match,
+ },
+ .remove = msm_sensor_platform_remove,
+};
+
+static struct v4l2_subdev_info msm_sensor_driver_subdev_info[] = {
+ {
+ .code = V4L2_MBUS_FMT_SBGGR10_1X10,
+ .colorspace = V4L2_COLORSPACE_JPEG,
+ .fmt = 1,
+ .order = 0,
+ },
+};
+
+static int32_t msm_sensor_driver_create_i2c_v4l_subdev
+ (struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ uint32_t session_id = 0;
+ struct i2c_client *client = s_ctrl->sensor_i2c_client->client;
+
+ CDBG("%s %s I2c probe succeeded\n", __func__, client->name);
+ rc = camera_init_v4l2(&client->dev, &session_id);
+ if (rc < 0) {
+ pr_err("failed: camera_init_i2c_v4l2 rc %d", rc);
+ return rc;
+ }
+ CDBG("%s rc %d session_id %d\n", __func__, rc, session_id);
+ snprintf(s_ctrl->msm_sd.sd.name,
+ sizeof(s_ctrl->msm_sd.sd.name), "%s",
+ s_ctrl->sensordata->sensor_name);
+ v4l2_i2c_subdev_init(&s_ctrl->msm_sd.sd, client,
+ s_ctrl->sensor_v4l2_subdev_ops);
+ v4l2_set_subdevdata(&s_ctrl->msm_sd.sd, client);
+ s_ctrl->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ media_entity_init(&s_ctrl->msm_sd.sd.entity, 0, NULL, 0);
+ s_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
+ s_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_SENSOR;
+ s_ctrl->msm_sd.sd.entity.name = s_ctrl->msm_sd.sd.name;
+ s_ctrl->sensordata->sensor_info->session_id = session_id;
+ s_ctrl->msm_sd.close_seq = MSM_SD_CLOSE_2ND_CATEGORY | 0x3;
+ msm_sd_register(&s_ctrl->msm_sd);
+ CDBG("%s:%d\n", __func__, __LINE__);
+ return rc;
+}
+
+static int32_t msm_sensor_driver_create_v4l_subdev
+ (struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ uint32_t session_id = 0;
+
+ rc = camera_init_v4l2(&s_ctrl->pdev->dev, &session_id);
+ if (rc < 0) {
+ pr_err("failed: camera_init_v4l2 rc %d", rc);
+ return rc;
+ }
+ CDBG("rc %d session_id %d", rc, session_id);
+ s_ctrl->sensordata->sensor_info->session_id = session_id;
+
+ /* Create /dev/v4l-subdevX device */
+ v4l2_subdev_init(&s_ctrl->msm_sd.sd, s_ctrl->sensor_v4l2_subdev_ops);
+ snprintf(s_ctrl->msm_sd.sd.name, sizeof(s_ctrl->msm_sd.sd.name), "%s",
+ s_ctrl->sensordata->sensor_name);
+ v4l2_set_subdevdata(&s_ctrl->msm_sd.sd, s_ctrl->pdev);
+ s_ctrl->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ media_entity_init(&s_ctrl->msm_sd.sd.entity, 0, NULL, 0);
+ s_ctrl->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
+ s_ctrl->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_SENSOR;
+ s_ctrl->msm_sd.sd.entity.name = s_ctrl->msm_sd.sd.name;
+ s_ctrl->msm_sd.close_seq = MSM_SD_CLOSE_2ND_CATEGORY | 0x3;
+ msm_sd_register(&s_ctrl->msm_sd);
+ return rc;
+}
+
+static int32_t msm_sensor_fill_eeprom_subdevid_by_name(
+ struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ const char *eeprom_name;
+ struct device_node *src_node = NULL;
+ uint32_t val = 0, count = 0, eeprom_name_len;
+ int i;
+ int32_t *eeprom_subdev_id;
+ struct msm_sensor_info_t *sensor_info;
+ struct device_node *of_node = s_ctrl->of_node;
+ const void *p;
+
+ if (!s_ctrl->sensordata->eeprom_name || !of_node)
+ return -EINVAL;
+
+ eeprom_name_len = strlen(s_ctrl->sensordata->eeprom_name);
+ if (eeprom_name_len >= MAX_SENSOR_NAME)
+ return -EINVAL;
+
+ sensor_info = s_ctrl->sensordata->sensor_info;
+ eeprom_subdev_id = &sensor_info->subdev_id[SUB_MODULE_EEPROM];
+ /*
+ * string for eeprom name is valid, set sudev id to -1
+ * and try to found new id
+ */
+ *eeprom_subdev_id = -1;
+
+ if (0 == eeprom_name_len)
+ return 0;
+
+ CDBG("Try to find eeprom subdev for %s\n",
+ s_ctrl->sensordata->eeprom_name);
+ p = of_get_property(of_node, "qcom,eeprom-src", &count);
+ if (!p || !count)
+ return 0;
+
+ count /= sizeof(uint32_t);
+ for (i = 0; i < count; i++) {
+ eeprom_name = NULL;
+ src_node = of_parse_phandle(of_node, "qcom,eeprom-src", i);
+ if (!src_node) {
+ pr_err("eeprom src node NULL\n");
+ continue;
+ }
+ rc = of_property_read_string(src_node, "qcom,eeprom-name",
+ &eeprom_name);
+ if (rc < 0) {
+ pr_err("failed\n");
+ of_node_put(src_node);
+ continue;
+ }
+ if (strcmp(eeprom_name, s_ctrl->sensordata->eeprom_name))
+ continue;
+
+ rc = of_property_read_u32(src_node, "cell-index", &val);
+
+ CDBG("%s qcom,eeprom cell index %d, rc %d\n", __func__,
+ val, rc);
+ if (rc < 0) {
+ pr_err("failed\n");
+ of_node_put(src_node);
+ continue;
+ }
+
+ *eeprom_subdev_id = val;
+ CDBG("Done. Eeprom subdevice id is %d\n", val);
+ of_node_put(src_node);
+ src_node = NULL;
+ break;
+ }
+
+ return rc;
+}
+
+static int32_t msm_sensor_fill_actuator_subdevid_by_name(
+ struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ struct device_node *src_node = NULL;
+ uint32_t val = 0, actuator_name_len;
+ int32_t *actuator_subdev_id;
+ struct msm_sensor_info_t *sensor_info;
+ struct device_node *of_node = s_ctrl->of_node;
+
+ if (!s_ctrl->sensordata->actuator_name || !of_node)
+ return -EINVAL;
+
+ actuator_name_len = strlen(s_ctrl->sensordata->actuator_name);
+ if (actuator_name_len >= MAX_SENSOR_NAME)
+ return -EINVAL;
+
+ sensor_info = s_ctrl->sensordata->sensor_info;
+ actuator_subdev_id = &sensor_info->subdev_id[SUB_MODULE_ACTUATOR];
+ /*
+ * string for actuator name is valid, set sudev id to -1
+ * and try to found new id
+ */
+ *actuator_subdev_id = -1;
+
+ if (0 == actuator_name_len)
+ return 0;
+
+ src_node = of_parse_phandle(of_node, "qcom,actuator-src", 0);
+ if (!src_node) {
+ CDBG("%s:%d src_node NULL\n", __func__, __LINE__);
+ } else {
+ rc = of_property_read_u32(src_node, "cell-index", &val);
+ CDBG("%s qcom,actuator cell index %d, rc %d\n", __func__,
+ val, rc);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ return -EINVAL;
+ }
+ *actuator_subdev_id = val;
+ of_node_put(src_node);
+ src_node = NULL;
+ }
+
+ return rc;
+}
+
+/* static function definition */
+int32_t msm_sensor_driver_probe(void *setting)
+{
+ int32_t rc = 0;
+ uint16_t i = 0, size = 0, size_down = 0;
+ struct msm_sensor_ctrl_t *s_ctrl = NULL;
+ struct msm_camera_cci_client *cci_client = NULL;
+ struct msm_camera_sensor_slave_info *slave_info = NULL;
+ struct msm_sensor_power_setting *power_setting = NULL;
+ struct msm_sensor_power_setting *power_down_setting = NULL;
+ struct msm_camera_slave_info *camera_info = NULL;
+ struct msm_camera_power_ctrl_t *power_info = NULL;
+ int c, end;
+ struct msm_sensor_power_setting power_down_setting_t;
+
+ /* Validate input parameters */
+ if (!setting) {
+ pr_err("failed: slave_info %p", setting);
+ return -EINVAL;
+ }
+
+ /* Allocate memory for slave info */
+ slave_info = kzalloc(sizeof(*slave_info), GFP_KERNEL);
+ if (!slave_info) {
+ pr_err("failed: no memory slave_info %p", slave_info);
+ return -ENOMEM;
+ }
+
+ if (copy_from_user(slave_info, (void *)setting, sizeof(*slave_info))) {
+ pr_err("failed: copy_from_user");
+ rc = -EFAULT;
+ goto FREE_SLAVE_INFO;
+ }
+
+ /* Print slave info */
+ CDBG("camera id %d", slave_info->camera_id);
+ CDBG("slave_addr %x", slave_info->slave_addr);
+ CDBG("addr_type %d", slave_info->addr_type);
+ CDBG("sensor_id_reg_addr %x",
+ slave_info->sensor_id_info.sensor_id_reg_addr);
+ CDBG("sensor_id %x", slave_info->sensor_id_info.sensor_id);
+ CDBG("size %d", slave_info->power_setting_array.size);
+ CDBG("size down %d", slave_info->power_setting_array.size_down);
+
+ /* Validate camera id */
+ if (slave_info->camera_id >= MAX_CAMERAS) {
+ pr_err("failed: invalid camera id %d max %d",
+ slave_info->camera_id, MAX_CAMERAS);
+ rc = -EINVAL;
+ goto FREE_POWER_SETTING;
+ }
+
+ /* Extract s_ctrl from camera id */
+ s_ctrl = g_sctrl[slave_info->camera_id];
+ if (!s_ctrl) {
+ pr_err("failed: s_ctrl %p for camera_id %d", s_ctrl,
+ slave_info->camera_id);
+ rc = -EINVAL;
+ goto FREE_POWER_SETTING;
+ }
+
+ CDBG("s_ctrl[%d] %p", slave_info->camera_id, s_ctrl);
+
+ if (s_ctrl->is_probe_succeed == 1) {
+ /*
+ * Different sensor on this camera slot has been connected
+ * and probe already succeeded for that sensor. Ignore this
+ * probe
+ */
+ pr_err("slot %d has some other sensor", slave_info->camera_id);
+ kfree(slave_info);
+ return 0;
+ }
+
+ size = slave_info->power_setting_array.size;
+ /* Allocate memory for power up setting */
+ power_setting = kzalloc(sizeof(*power_setting) * size, GFP_KERNEL);
+ if (!power_setting) {
+ pr_err("failed: no memory power_setting %p", power_setting);
+ rc = -ENOMEM;
+ goto FREE_SLAVE_INFO;
+ }
+
+ if (copy_from_user(power_setting,
+ (void *)slave_info->power_setting_array.power_setting,
+ sizeof(*power_setting) * size)) {
+ pr_err("failed: copy_from_user");
+ rc = -EFAULT;
+ goto FREE_POWER_SETTING;
+ }
+
+ /* Print power setting */
+ for (i = 0; i < size; i++) {
+ CDBG("UP seq_type %d seq_val %d config_val %ld delay %d",
+ power_setting[i].seq_type, power_setting[i].seq_val,
+ power_setting[i].config_val, power_setting[i].delay);
+ }
+ /*DOWN*/
+ size_down = slave_info->power_setting_array.size_down;
+ if (!size_down)
+ size_down = size;
+ /* Allocate memory for power down setting */
+ power_down_setting =
+ kzalloc(sizeof(*power_setting) * size_down, GFP_KERNEL);
+ if (!power_down_setting) {
+ pr_err("failed: no memory power_setting %p",
+ power_down_setting);
+ rc = -ENOMEM;
+ goto FREE_POWER_SETTING;
+ }
+
+ if (slave_info->power_setting_array.power_down_setting) {
+ if (copy_from_user(power_down_setting,
+ (void *)slave_info->power_setting_array.
+ power_down_setting,
+ sizeof(*power_down_setting) * size_down)) {
+ pr_err("failed: copy_from_user");
+ rc = -EFAULT;
+ goto FREE_POWER_DOWN_SETTING;
+ }
+ } else {
+ pr_err("failed: no power_down_setting");
+ if (copy_from_user(power_down_setting,
+ (void *)slave_info->power_setting_array.
+ power_setting,
+ sizeof(*power_down_setting) * size_down)) {
+ pr_err("failed: copy_from_user");
+ rc = -EFAULT;
+ goto FREE_POWER_DOWN_SETTING;
+ }
+
+ /*reverce*/
+ end = size_down - 1;
+ for (c = 0; c < size_down/2; c++) {
+ power_down_setting_t = power_down_setting[c];
+ power_down_setting[c] = power_down_setting[end];
+ power_down_setting[end] = power_down_setting_t;
+ end--;
+ }
+
+ }
+
+ /* Print power setting */
+ for (i = 0; i < size_down; i++) {
+ CDBG("DOWN seq_type %d seq_val %d config_val %ld delay %d",
+ power_down_setting[i].seq_type,
+ power_down_setting[i].seq_val,
+ power_down_setting[i].config_val,
+ power_down_setting[i].delay);
+ }
+
+ camera_info = kzalloc(sizeof(struct msm_camera_slave_info), GFP_KERNEL);
+ if (!camera_info) {
+ pr_err("failed: no memory slave_info %p", camera_info);
+ goto FREE_POWER_DOWN_SETTING;
+
+ }
+
+ /* Fill power up setting and power up setting size */
+ power_info = &s_ctrl->sensordata->power_info;
+ power_info->power_setting = power_setting;
+ power_info->power_setting_size = size;
+ power_info->power_down_setting = power_down_setting;
+ power_info->power_down_setting_size = size_down;
+
+ s_ctrl->sensordata->slave_info = camera_info;
+
+ /* Fill sensor slave info */
+ camera_info->sensor_slave_addr = slave_info->slave_addr;
+ camera_info->sensor_id_reg_addr =
+ slave_info->sensor_id_info.sensor_id_reg_addr;
+ camera_info->sensor_id = slave_info->sensor_id_info.sensor_id;
+
+ /* Fill CCI master, slave address and CCI default params */
+ if (!s_ctrl->sensor_i2c_client) {
+ pr_err("failed: sensor_i2c_client %p",
+ s_ctrl->sensor_i2c_client);
+ rc = -EINVAL;
+ goto FREE_CAMERA_INFO;
+ }
+ /* Fill sensor address type */
+ s_ctrl->sensor_i2c_client->addr_type = slave_info->addr_type;
+ if (s_ctrl->sensor_i2c_client->client)
+ s_ctrl->sensor_i2c_client->client->addr =
+ camera_info->sensor_slave_addr;
+
+ cci_client = s_ctrl->sensor_i2c_client->cci_client;
+ if (!cci_client) {
+ pr_err("failed: cci_client %p", cci_client);
+ goto FREE_CAMERA_INFO;
+ }
+ cci_client->cci_i2c_master = s_ctrl->cci_i2c_master;
+ cci_client->sid = slave_info->slave_addr >> 1;
+ cci_client->retries = 3;
+ cci_client->id_map = 0;
+
+ /* Parse and fill vreg params for powerup settings */
+ rc = msm_camera_fill_vreg_params(
+ power_info->cam_vreg,
+ power_info->num_vreg,
+ power_info->power_setting,
+ power_info->power_setting_size);
+ if (rc < 0) {
+ pr_err("failed: msm_camera_get_dt_power_setting_data rc %d",
+ rc);
+ goto FREE_CAMERA_INFO;
+ }
+
+ /* Parse and fill vreg params for powerdown settings*/
+ rc = msm_camera_fill_vreg_params(
+ power_info->cam_vreg,
+ power_info->num_vreg,
+ power_info->power_down_setting,
+ power_info->power_down_setting_size);
+ if (rc < 0) {
+ pr_err("failed: msm_camera_fill_vreg_params for PDOWN rc %d",
+ rc);
+ goto FREE_CAMERA_INFO;
+ }
+
+ /*
+ * Update sensor, actuator and eeprom name in
+ * sensor control structure.
+ */
+ s_ctrl->sensordata->sensor_name = slave_info->sensor_name;
+ s_ctrl->sensordata->eeprom_name = slave_info->eeprom_name;
+ s_ctrl->sensordata->actuator_name = slave_info->actuator_name;
+
+ /*
+ * Update eeporm subdevice Id by input eeprom name
+ */
+ rc = msm_sensor_fill_eeprom_subdevid_by_name(s_ctrl);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto FREE_POWER_SETTING;
+ }
+ /*
+ * Update actuator subdevice Id by input actuator name
+ */
+ rc = msm_sensor_fill_actuator_subdevid_by_name(s_ctrl);
+ if (rc < 0) {
+ pr_err("%s failed %d\n", __func__, __LINE__);
+ goto FREE_POWER_SETTING;
+ }
+
+ /* Power up and probe sensor */
+ rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
+ if (rc < 0) {
+ pr_err("%s power up failed", slave_info->sensor_name);
+ goto FREE_CAMERA_INFO;
+ }
+
+ pr_err("%s probe succeeded", slave_info->sensor_name);
+
+ /*
+ Set probe succeeded flag to 1 so that no other camera shall
+ * probed on this slot
+ */
+ s_ctrl->is_probe_succeed = 1;
+
+ /*
+ * Create /dev/videoX node, comment for now until dummy /dev/videoX
+ * node is created and used by HAL
+ */
+
+ if (s_ctrl->sensor_device_type == MSM_CAMERA_PLATFORM_DEVICE)
+ rc = msm_sensor_driver_create_v4l_subdev(s_ctrl);
+ else
+ rc = msm_sensor_driver_create_i2c_v4l_subdev(s_ctrl);
+ if (rc < 0) {
+ pr_err("failed: camera creat v4l2 rc %d", rc);
+ goto CAMERA_POWER_DOWN;
+ }
+
+ /* Power down */
+ s_ctrl->func_tbl->sensor_power_down(s_ctrl);
+
+ /*Save sensor info*/
+ s_ctrl->sensordata->cam_slave_info = slave_info;
+
+ return rc;
+
+CAMERA_POWER_DOWN:
+ s_ctrl->func_tbl->sensor_power_down(s_ctrl);
+FREE_CAMERA_INFO:
+ kfree(camera_info);
+FREE_POWER_DOWN_SETTING:
+ kfree(power_down_setting);
+FREE_POWER_SETTING:
+ kfree(power_setting);
+FREE_SLAVE_INFO:
+ kfree(slave_info);
+ return rc;
+}
+
+static int32_t msm_sensor_driver_get_gpio_data(
+ struct msm_camera_sensor_board_info *sensordata,
+ struct device_node *of_node)
+{
+ int32_t rc = 0, i = 0;
+ struct msm_camera_gpio_conf *gconf = NULL;
+ uint16_t *gpio_array = NULL;
+ uint16_t gpio_array_size = 0;
+
+ /* Validate input paramters */
+ if (!sensordata || !of_node) {
+ pr_err("failed: invalid params sensordata %p of_node %p",
+ sensordata, of_node);
+ return -EINVAL;
+ }
+
+ sensordata->power_info.gpio_conf = kzalloc(
+ sizeof(struct msm_camera_gpio_conf), GFP_KERNEL);
+ if (!sensordata->power_info.gpio_conf) {
+ pr_err("failed");
+ return -ENOMEM;
+ }
+ gconf = sensordata->power_info.gpio_conf;
+
+ gpio_array_size = of_gpio_count(of_node);
+ CDBG("gpio count %d", gpio_array_size);
+ if (!gpio_array_size)
+ return 0;
+
+ gpio_array = kzalloc(sizeof(uint16_t) * gpio_array_size, GFP_KERNEL);
+ if (!gpio_array) {
+ pr_err("failed");
+ goto FREE_GPIO_CONF;
+ }
+ for (i = 0; i < gpio_array_size; i++) {
+ gpio_array[i] = of_get_gpio(of_node, i);
+ CDBG("gpio_array[%d] = %d", i, gpio_array[i]);
+ }
+
+ rc = msm_camera_get_dt_gpio_req_tbl(of_node, gconf, gpio_array,
+ gpio_array_size);
+ if (rc < 0) {
+ pr_err("failed");
+ goto FREE_GPIO_CONF;
+ }
+
+ rc = msm_camera_init_gpio_pin_tbl(of_node, gconf, gpio_array,
+ gpio_array_size);
+ if (rc < 0) {
+ pr_err("failed");
+ goto FREE_GPIO_REQ_TBL;
+ }
+
+ kfree(gpio_array);
+ return rc;
+
+FREE_GPIO_REQ_TBL:
+ kfree(sensordata->power_info.gpio_conf->cam_gpio_req_tbl);
+FREE_GPIO_CONF:
+ kfree(sensordata->power_info.gpio_conf);
+ kfree(gpio_array);
+ return rc;
+}
+
+static int32_t msm_sensor_driver_get_dt_data(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+ struct msm_camera_sensor_board_info *sensordata = NULL;
+ struct device_node *of_node = s_ctrl->of_node;
+ uint32_t cell_id;
+
+ s_ctrl->sensordata = kzalloc(sizeof(*sensordata), GFP_KERNEL);
+ if (!s_ctrl->sensordata) {
+ pr_err("failed: no memory");
+ return -ENOMEM;
+ }
+
+ sensordata = s_ctrl->sensordata;
+
+ /*
+ * Read cell index - this cell index will be the camera slot where
+ * this camera will be mounted
+ */
+ rc = of_property_read_u32(of_node, "cell-index", &cell_id);
+ if (rc < 0) {
+ pr_err("failed: cell-index rc %d", rc);
+ goto FREE_SENSOR_DATA;
+ }
+ s_ctrl->id = cell_id;
+
+ /* Validate cell_id */
+ if (cell_id >= MAX_CAMERAS) {
+ pr_err("failed: invalid cell_id %d", cell_id);
+ rc = -EINVAL;
+ goto FREE_SENSOR_DATA;
+ }
+
+ /* Check whether g_sctrl is already filled for this cell_id */
+ if (g_sctrl[cell_id]) {
+ pr_err("failed: sctrl already filled for cell_id %d", cell_id);
+ rc = -EINVAL;
+ goto FREE_SENSOR_DATA;
+ }
+
+ /* Read subdev info */
+ rc = msm_sensor_get_sub_module_index(of_node, &sensordata->sensor_info);
+ if (rc < 0) {
+ pr_err("failed");
+ goto FREE_SENSOR_DATA;
+ }
+
+ /* Read vreg information */
+ rc = msm_camera_get_dt_vreg_data(of_node,
+ &sensordata->power_info.cam_vreg,
+ &sensordata->power_info.num_vreg);
+ if (rc < 0) {
+ pr_err("failed: msm_camera_get_dt_vreg_data rc %d", rc);
+ goto FREE_SUB_MODULE_DATA;
+ }
+
+ /* Read gpio information */
+ rc = msm_sensor_driver_get_gpio_data(sensordata, of_node);
+ if (rc < 0) {
+ pr_err("failed: msm_sensor_driver_get_gpio_data rc %d", rc);
+ goto FREE_VREG_DATA;
+ }
+
+ /* Get CCI master */
+ rc = of_property_read_u32(of_node, "qcom,cci-master",
+ &s_ctrl->cci_i2c_master);
+ CDBG("qcom,cci-master %d, rc %d", s_ctrl->cci_i2c_master, rc);
+ if (rc < 0) {
+ /* Set default master 0 */
+ s_ctrl->cci_i2c_master = MASTER_0;
+ rc = 0;
+ }
+
+ /* Get mount angle */
+
+ rc = of_property_read_u32(of_node, "qcom,mount-angle",
+ &sensordata->sensor_info->sensor_mount_angle);
+ CDBG("%s qcom,mount-angle %d, rc %d\n", __func__,
+ sensordata->sensor_info->sensor_mount_angle, rc);
+ if (rc < 0) {
+ /* Invalidate mount angle flag */
+ sensordata->sensor_info->is_mount_angle_valid = 0;
+ sensordata->sensor_info->sensor_mount_angle = 0;
+ rc = 0;
+ } else {
+ sensordata->sensor_info->is_mount_angle_valid = 1;
+ }
+
+ /* Get vdd-cx regulator */
+ /*Optional property, don't return error if absent */
+ of_property_read_string(of_node, "qcom,vdd-cx-name",
+ &sensordata->misc_regulator);
+ CDBG("qcom,misc_regulator %s", sensordata->misc_regulator);
+
+ return rc;
+
+FREE_VREG_DATA:
+ kfree(sensordata->power_info.cam_vreg);
+FREE_SUB_MODULE_DATA:
+ kfree(sensordata->sensor_info);
+FREE_SENSOR_DATA:
+ kfree(sensordata);
+ return rc;
+}
+
+static int32_t msm_sensor_driver_parse(struct msm_sensor_ctrl_t *s_ctrl)
+{
+ int32_t rc = 0;
+
+ CDBG("Enter");
+ /* Validate input parameters */
+
+
+ /* Allocate memory for sensor_i2c_client */
+ s_ctrl->sensor_i2c_client = kzalloc(sizeof(*s_ctrl->sensor_i2c_client),
+ GFP_KERNEL);
+ if (!s_ctrl->sensor_i2c_client) {
+ pr_err("failed: no memory sensor_i2c_client %p",
+ s_ctrl->sensor_i2c_client);
+ return -ENOMEM;
+ }
+
+ /* Allocate memory for mutex */
+ s_ctrl->msm_sensor_mutex = kzalloc(sizeof(*s_ctrl->msm_sensor_mutex),
+ GFP_KERNEL);
+ if (!s_ctrl->msm_sensor_mutex) {
+ pr_err("failed: no memory msm_sensor_mutex %p",
+ s_ctrl->msm_sensor_mutex);
+ goto FREE_SENSOR_I2C_CLIENT;
+ }
+
+ /* Parse dt information and store in sensor control structure */
+ rc = msm_sensor_driver_get_dt_data(s_ctrl);
+ if (rc < 0) {
+ pr_err("failed: rc %d", rc);
+ goto FREE_MUTEX;
+ }
+
+ /* Initialize mutex */
+ mutex_init(s_ctrl->msm_sensor_mutex);
+
+ /* Initilize v4l2 subdev info */
+ s_ctrl->sensor_v4l2_subdev_info = msm_sensor_driver_subdev_info;
+ s_ctrl->sensor_v4l2_subdev_info_size =
+ ARRAY_SIZE(msm_sensor_driver_subdev_info);
+
+ /* Initialize default parameters */
+ rc = msm_sensor_init_default_params(s_ctrl);
+ if (rc < 0) {
+ pr_err("failed: msm_sensor_init_default_params rc %d", rc);
+ goto FREE_DT_DATA;
+ }
+
+ /* Store sensor control structure in static database */
+ g_sctrl[s_ctrl->id] = s_ctrl;
+ pr_err("g_sctrl[%d] %p", s_ctrl->id, g_sctrl[s_ctrl->id]);
+
+ return rc;
+
+FREE_DT_DATA:
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->gpio_num_info);
+ kfree(s_ctrl->sensordata->power_info.gpio_conf->cam_gpio_req_tbl);
+ kfree(s_ctrl->sensordata->power_info.gpio_conf);
+ kfree(s_ctrl->sensordata->power_info.cam_vreg);
+ kfree(s_ctrl->sensordata);
+FREE_MUTEX:
+ kfree(s_ctrl->msm_sensor_mutex);
+FREE_SENSOR_I2C_CLIENT:
+ kfree(s_ctrl->sensor_i2c_client);
+ return rc;
+}
+
+static int32_t msm_sensor_driver_platform_probe(struct platform_device *pdev)
+{
+ int32_t rc = 0;
+ struct msm_sensor_ctrl_t *s_ctrl = NULL;
+
+
+ /* Create sensor control structure */
+ s_ctrl = kzalloc(sizeof(*s_ctrl), GFP_KERNEL);
+ if (!s_ctrl) {
+ pr_err("failed: no memory s_ctrl %p", s_ctrl);
+ return -ENOMEM;
+ }
+
+ platform_set_drvdata(pdev, s_ctrl);
+
+ /* Initialize sensor device type */
+ s_ctrl->sensor_device_type = MSM_CAMERA_PLATFORM_DEVICE;
+ s_ctrl->of_node = pdev->dev.of_node;
+
+ rc = msm_sensor_driver_parse(s_ctrl);
+ if (rc < 0) {
+ pr_err("failed: msm_sensor_driver_parse rc %d", rc);
+ goto FREE_S_CTRL;
+ }
+
+ /* Fill platform device */
+ pdev->id = s_ctrl->id;
+ s_ctrl->pdev = pdev;
+
+ /* Fill device in power info */
+ s_ctrl->sensordata->power_info.dev = &pdev->dev;
+
+ return rc;
+FREE_S_CTRL:
+ kfree(s_ctrl);
+ return rc;
+}
+
+static int32_t msm_sensor_driver_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int32_t rc = 0;
+ struct msm_sensor_ctrl_t *s_ctrl;
+
+ CDBG("\n\nEnter: msm_sensor_driver_i2c_probe");
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ pr_err("%s %s i2c_check_functionality failed\n",
+ __func__, client->name);
+ rc = -EFAULT;
+ return rc;
+ }
+
+ /* Create sensor control structure */
+ s_ctrl = kzalloc(sizeof(*s_ctrl), GFP_KERNEL);
+ if (!s_ctrl) {
+ pr_err("failed: no memory s_ctrl %p", s_ctrl);
+ return -ENOMEM;
+ }
+
+ i2c_set_clientdata(client, s_ctrl);
+
+ /* Initialize sensor device type */
+ s_ctrl->sensor_device_type = MSM_CAMERA_I2C_DEVICE;
+ s_ctrl->of_node = client->dev.of_node;
+
+ rc = msm_sensor_driver_parse(s_ctrl);
+ if (rc < 0) {
+ pr_err("failed: msm_sensor_driver_parse rc %d", rc);
+ goto FREE_S_CTRL;
+ }
+
+ if (s_ctrl->sensor_i2c_client != NULL) {
+ s_ctrl->sensor_i2c_client->client = client;
+ s_ctrl->sensordata->power_info.dev = &client->dev;
+
+ }
+
+ return rc;
+FREE_S_CTRL:
+ kfree(s_ctrl);
+ return rc;
+}
+
+static int msm_sensor_driver_i2c_remove(struct i2c_client *client)
+{
+ struct msm_sensor_ctrl_t *s_ctrl = i2c_get_clientdata(client);
+
+ pr_err("%s: sensor FREE\n", __func__);
+
+ if (!s_ctrl) {
+ pr_err("%s: sensor device is NULL\n", __func__);
+ return 0;
+ }
+
+ g_sctrl[s_ctrl->id] = NULL;
+ msm_sensor_free_sensor_data(s_ctrl);
+ kfree(s_ctrl->msm_sensor_mutex);
+ kfree(s_ctrl->sensor_i2c_client);
+ kfree(s_ctrl);
+
+ return 0;
+}
+
+static const struct i2c_device_id i2c_id[] = {
+ {SENSOR_DRIVER_I2C, (kernel_ulong_t)NULL},
+ { }
+};
+
+static struct i2c_driver msm_sensor_driver_i2c = {
+ .id_table = i2c_id,
+ .probe = msm_sensor_driver_i2c_probe,
+ .remove = msm_sensor_driver_i2c_remove,
+ .driver = {
+ .name = SENSOR_DRIVER_I2C,
+ },
+};
+
+static int __init msm_sensor_driver_init(void)
+{
+ int32_t rc = 0;
+
+ CDBG("Enter");
+ rc = platform_driver_probe(&msm_sensor_platform_driver,
+ msm_sensor_driver_platform_probe);
+ if (!rc) {
+ CDBG("probe success");
+ return rc;
+ } else {
+ CDBG("probe i2c");
+ rc = i2c_add_driver(&msm_sensor_driver_i2c);
+ }
+
+ return rc;
+}
+
+
+static void __exit msm_sensor_driver_exit(void)
+{
+ CDBG("Enter");
+ platform_driver_unregister(&msm_sensor_platform_driver);
+ i2c_del_driver(&msm_sensor_driver_i2c);
+ return;
+}
+
+module_init(msm_sensor_driver_init);
+module_exit(msm_sensor_driver_exit);
+MODULE_DESCRIPTION("msm_sensor_driver");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug.dts b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_driver.h
similarity index 65%
copy from arch/arm/boot/dts/msm8926-qrd-skug.dts
copy to drivers/media/platform/msm/camera_v2/sensor/msm_sensor_driver.h
index 4aab4f9..0394387 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug.dts
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_driver.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,12 +10,11 @@
* GNU General Public License for more details.
*/
-/dts-v1/;
-/include/ "msm8926-qrd-skug.dtsi"
+#ifndef MSM_SENSOR_DRIVER_H
+#define MSM_SENSOR_DRIVER_H
-/ {
- model = "Qualcomm MSM 8926 QRD SKUG";
- compatible = "qcom,msm8926-qrd", "qcom,msm8926", "qcom,qrd";
- qcom,board-id = <11 5>;
-};
+#include "msm_sensor.h"
+int32_t msm_sensor_driver_probe(void *setting);
+
+#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_init.c b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_init.c
new file mode 100644
index 0000000..bc96eb8
--- /dev/null
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_init.c
@@ -0,0 +1,177 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "MSM-SENSOR-INIT %s:%d " fmt "\n", __func__, __LINE__
+
+/* Header files */
+#include <mach/gpiomux.h>
+#include "msm_sensor_init.h"
+#include "msm_sensor_driver.h"
+#include "msm_sensor.h"
+#include "msm_sd.h"
+
+/* Logging macro */
+/*#define CONFIG_MSMB_CAMERA_DEBUG*/
+#undef CDBG
+#ifdef CONFIG_MSMB_CAMERA_DEBUG
+#define CDBG(fmt, args...) pr_err(fmt, ##args)
+#else
+#define CDBG(fmt, args...) do { } while (0)
+#endif
+
+static struct msm_sensor_init_t *s_init;
+
+/* Static function declaration */
+static long msm_sensor_init_subdev_ioctl(struct v4l2_subdev *sd,
+ unsigned int cmd, void *arg);
+
+/* Static structure declaration */
+static struct v4l2_subdev_core_ops msm_sensor_init_subdev_core_ops = {
+ .ioctl = msm_sensor_init_subdev_ioctl,
+};
+
+static struct v4l2_subdev_ops msm_sensor_init_subdev_ops = {
+ .core = &msm_sensor_init_subdev_core_ops,
+};
+
+static const struct v4l2_subdev_internal_ops msm_sensor_init_internal_ops;
+
+static int msm_sensor_wait_for_probe_done(struct msm_sensor_init_t *s_init)
+{
+ int rc;
+
+ if (s_init->module_init_status == 1) {
+ pr_err("msm_cam_get_module_init_status -2\n");
+ return 0;
+ }
+
+ while (1) {
+ rc = wait_event_interruptible(s_init->state_wait,
+ (s_init->module_init_status == 1));
+ if (rc == -ETIMEDOUT)
+ continue;
+ else if (rc == 0)
+ break;
+ }
+ return 0;
+}
+
+/* Static function definition */
+static long msm_sensor_driver_cmd(struct msm_sensor_init_t *s_init, void *arg)
+{
+ int32_t rc = 0;
+ struct sensor_init_cfg_data *cfg = (struct sensor_init_cfg_data *)arg;
+
+ /* Validate input parameters */
+ if (!s_init || !cfg) {
+ pr_err("failed: s_init %p cfg %p", s_init, cfg);
+ return -EINVAL;
+ }
+
+ switch (cfg->cfgtype) {
+ case CFG_SINIT_PROBE:
+ mutex_lock(&s_init->imutex);
+ s_init->module_init_status = 0;
+ rc = msm_sensor_driver_probe(cfg->cfg.setting);
+ mutex_unlock(&s_init->imutex);
+ if (rc < 0)
+ pr_err("failed: msm_sensor_driver_probe rc %d", rc);
+ break;
+
+ case CFG_SINIT_PROBE_DONE:
+ s_init->module_init_status = 1;
+ wake_up(&s_init->state_wait);
+ break;
+
+ case CFG_SINIT_PROBE_WAIT_DONE:
+ msm_sensor_wait_for_probe_done(s_init);
+ break;
+
+ default:
+ pr_err("default");
+ break;
+ }
+
+ return rc;
+}
+
+static long msm_sensor_init_subdev_ioctl(struct v4l2_subdev *sd,
+ unsigned int cmd, void *arg)
+{
+ int32_t rc = 0;
+ struct msm_sensor_init_t *s_init = v4l2_get_subdevdata(sd);
+ CDBG("Enter");
+
+ /* Validate input parameters */
+ if (!s_init) {
+ pr_err("failed: s_init %p", s_init);
+ return -EINVAL;
+ }
+
+ switch (cmd) {
+ case VIDIOC_MSM_SENSOR_INIT_CFG:
+ rc = msm_sensor_driver_cmd(s_init, arg);
+ break;
+
+ default:
+ pr_err("default");
+ break;
+ }
+
+ return 0;
+}
+
+static int __init msm_sensor_init_module(void)
+{
+ /* Allocate memory for msm_sensor_init control structure */
+ s_init = kzalloc(sizeof(struct msm_sensor_init_t), GFP_KERNEL);
+ if (!s_init) {
+ pr_err("failed: no memory s_init %p", NULL);
+ return -ENOMEM;
+ }
+
+ pr_err("MSM_SENSOR_INIT_MODULE %p", NULL);
+
+ /* Initialize mutex */
+ mutex_init(&s_init->imutex);
+
+ /* Create /dev/v4l-subdevX for msm_sensor_init */
+ v4l2_subdev_init(&s_init->msm_sd.sd, &msm_sensor_init_subdev_ops);
+ snprintf(s_init->msm_sd.sd.name, sizeof(s_init->msm_sd.sd.name), "%s",
+ "msm_sensor_init");
+ v4l2_set_subdevdata(&s_init->msm_sd.sd, s_init);
+ s_init->msm_sd.sd.internal_ops = &msm_sensor_init_internal_ops;
+ s_init->msm_sd.sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ media_entity_init(&s_init->msm_sd.sd.entity, 0, NULL, 0);
+ s_init->msm_sd.sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV;
+ s_init->msm_sd.sd.entity.group_id = MSM_CAMERA_SUBDEV_SENSOR_INIT;
+ s_init->msm_sd.sd.entity.name = s_init->msm_sd.sd.name;
+ s_init->msm_sd.close_seq = MSM_SD_CLOSE_2ND_CATEGORY | 0x6;
+ msm_sd_register(&s_init->msm_sd);
+
+ init_waitqueue_head(&s_init->state_wait);
+
+ return 0;
+}
+
+static void __exit msm_sensor_exit_module(void)
+{
+ msm_sd_unregister(&s_init->msm_sd);
+ mutex_destroy(&s_init->imutex);
+ kfree(s_init);
+ return;
+}
+
+module_init(msm_sensor_init_module);
+module_exit(msm_sensor_exit_module);
+MODULE_DESCRIPTION("msm_sensor_init");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug.dts b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_init.h
similarity index 61%
copy from arch/arm/boot/dts/msm8926-qrd-skug.dts
copy to drivers/media/platform/msm/camera_v2/sensor/msm_sensor_init.h
index 4aab4f9..256b0a1 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug.dts
+++ b/drivers/media/platform/msm/camera_v2/sensor/msm_sensor_init.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,12 +10,16 @@
* GNU General Public License for more details.
*/
-/dts-v1/;
-/include/ "msm8926-qrd-skug.dtsi"
+#ifndef MSM_SENSOR_INIT_H
+#define MSM_SENSOR_INIT_H
-/ {
- model = "Qualcomm MSM 8926 QRD SKUG";
- compatible = "qcom,msm8926-qrd", "qcom,msm8926", "qcom,qrd";
- qcom,board-id = <11 5>;
+#include "msm_sensor.h"
+
+struct msm_sensor_init_t {
+ struct mutex imutex;
+ struct msm_sd_subdev msm_sd;
+ int module_init_status;
+ wait_queue_head_t state_wait;
};
+#endif
diff --git a/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c b/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c
index de4fcd0..1d58490 100644
--- a/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/mt9m114.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1191,6 +1191,10 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
cdata->cfg.sensor_info.subdev_id[i] =
s_ctrl->sensordata->sensor_info->subdev_id[i];
+ cdata->cfg.sensor_info.is_mount_angle_valid =
+ s_ctrl->sensordata->sensor_info->is_mount_angle_valid;
+ cdata->cfg.sensor_info.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d sensor name %s\n", __func__, __LINE__,
cdata->cfg.sensor_info.sensor_name);
CDBG("%s:%d session id %d\n", __func__, __LINE__,
@@ -1198,6 +1202,9 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
cdata->cfg.sensor_info.subdev_id[i]);
+ CDBG("%s:%d mount angle valid %d value %d\n", __func__,
+ __LINE__, cdata->cfg.sensor_info.is_mount_angle_valid,
+ cdata->cfg.sensor_info.sensor_mount_angle);
break;
case CFG_SET_INIT_SETTING:
@@ -1233,8 +1240,12 @@
MSM_CAMERA_I2C_WORD_DATA);
break;
case CFG_GET_SENSOR_INIT_PARAMS:
- cdata->cfg.sensor_init_params =
- *s_ctrl->sensordata->sensor_init_params;
+ cdata->cfg.sensor_init_params.modes_supported =
+ s_ctrl->sensordata->sensor_info->modes_supported;
+ cdata->cfg.sensor_init_params.position =
+ s_ctrl->sensordata->sensor_info->position;
+ cdata->cfg.sensor_init_params.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
__LINE__,
cdata->cfg.sensor_init_params.modes_supported,
@@ -1243,11 +1254,12 @@
break;
case CFG_SET_SLAVE_INFO: {
struct msm_camera_sensor_slave_info sensor_slave_info;
- struct msm_sensor_power_setting_array *power_setting_array;
+ struct msm_camera_power_ctrl_t *p_ctrl;
+ uint16_t size;
int slave_index = 0;
if (copy_from_user(&sensor_slave_info,
- (void *)cdata->cfg.setting,
- sizeof(struct msm_camera_sensor_slave_info))) {
+ (void *)cdata->cfg.setting,
+ sizeof(struct msm_camera_sensor_slave_info))) {
pr_err("%s:%d failed\n", __func__, __LINE__);
rc = -EFAULT;
break;
@@ -1263,27 +1275,30 @@
sensor_slave_info.addr_type;
/* Update power up / down sequence */
- s_ctrl->power_setting_array =
- sensor_slave_info.power_setting_array;
- power_setting_array = &s_ctrl->power_setting_array;
- power_setting_array->power_setting = kzalloc(
- power_setting_array->size *
- sizeof(struct msm_sensor_power_setting), GFP_KERNEL);
- if (!power_setting_array->power_setting) {
- pr_err("%s:%d failed\n", __func__, __LINE__);
- rc = -ENOMEM;
- break;
+ p_ctrl = &s_ctrl->sensordata->power_info;
+ size = sensor_slave_info.power_setting_array.size;
+ if (p_ctrl->power_setting_size < size) {
+ struct msm_sensor_power_setting *tmp;
+ tmp = kmalloc(sizeof(struct msm_sensor_power_setting)
+ * size, GFP_KERNEL);
+ if (!tmp) {
+ pr_err("%s: failed to alloc mem\n", __func__);
+ rc = -ENOMEM;
+ break;
+ }
+ kfree(p_ctrl->power_setting);
+ p_ctrl->power_setting = tmp;
}
- if (copy_from_user(power_setting_array->power_setting,
- (void *)sensor_slave_info.power_setting_array.power_setting,
- power_setting_array->size *
- sizeof(struct msm_sensor_power_setting))) {
- kfree(power_setting_array->power_setting);
+ p_ctrl->power_setting_size = size;
+
+ rc = copy_from_user(p_ctrl->power_setting, (void *)
+ sensor_slave_info.power_setting_array.power_setting,
+ size * sizeof(struct msm_sensor_power_setting));
+ if (rc) {
pr_err("%s:%d failed\n", __func__, __LINE__);
rc = -EFAULT;
break;
}
- s_ctrl->free_power_setting = true;
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.slave_addr);
CDBG("%s sensor addr type %d\n", __func__,
@@ -1293,19 +1308,14 @@
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.sensor_id_info.sensor_id);
for (slave_index = 0; slave_index <
- power_setting_array->size; slave_index++) {
+ p_ctrl->power_setting_size; slave_index++) {
CDBG("%s i %d power setting %d %d %ld %d\n", __func__,
slave_index,
- power_setting_array->power_setting[slave_index].
- seq_type,
- power_setting_array->power_setting[slave_index].
- seq_val,
- power_setting_array->power_setting[slave_index].
- config_val,
- power_setting_array->power_setting[slave_index].
- delay);
+ p_ctrl->power_setting[slave_index].seq_type,
+ p_ctrl->power_setting[slave_index].seq_val,
+ p_ctrl->power_setting[slave_index].config_val,
+ p_ctrl->power_setting[slave_index].delay);
}
- kfree(power_setting_array->power_setting);
break;
}
case CFG_WRITE_I2C_ARRAY: {
@@ -1388,8 +1398,7 @@
case CFG_POWER_DOWN:
if (s_ctrl->func_tbl->sensor_power_down)
- rc = s_ctrl->func_tbl->sensor_power_down(
- s_ctrl);
+ rc = s_ctrl->func_tbl->sensor_power_down(s_ctrl);
else
rc = -EFAULT;
break;
diff --git a/drivers/media/platform/msm/camera_v2/sensor/sp1628.c b/drivers/media/platform/msm/camera_v2/sensor/sp1628.c
index 9a422c0..d4e4cdf 100755
--- a/drivers/media/platform/msm/camera_v2/sensor/sp1628.c
+++ b/drivers/media/platform/msm/camera_v2/sensor/sp1628.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -637,6 +637,10 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
cdata->cfg.sensor_info.subdev_id[i] =
s_ctrl->sensordata->sensor_info->subdev_id[i];
+ cdata->cfg.sensor_info.is_mount_angle_valid =
+ s_ctrl->sensordata->sensor_info->is_mount_angle_valid;
+ cdata->cfg.sensor_info.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d sensor name %s\n", __func__, __LINE__,
cdata->cfg.sensor_info.sensor_name);
CDBG("%s:%d session id %d\n", __func__, __LINE__,
@@ -644,6 +648,9 @@
for (i = 0; i < SUB_MODULE_MAX; i++)
CDBG("%s:%d subdev_id[%d] %d\n", __func__, __LINE__, i,
cdata->cfg.sensor_info.subdev_id[i]);
+ CDBG("%s:%d mount angle valid %d value %d\n", __func__,
+ __LINE__, cdata->cfg.sensor_info.is_mount_angle_valid,
+ cdata->cfg.sensor_info.sensor_mount_angle);
break;
case CFG_SET_INIT_SETTING:
@@ -674,8 +681,12 @@
MSM_CAMERA_I2C_BYTE_DATA);
break;
case CFG_GET_SENSOR_INIT_PARAMS:
- cdata->cfg.sensor_init_params =
- *s_ctrl->sensordata->sensor_init_params;
+ cdata->cfg.sensor_init_params.modes_supported =
+ s_ctrl->sensordata->sensor_info->modes_supported;
+ cdata->cfg.sensor_init_params.position =
+ s_ctrl->sensordata->sensor_info->position;
+ cdata->cfg.sensor_init_params.sensor_mount_angle =
+ s_ctrl->sensordata->sensor_info->sensor_mount_angle;
CDBG("%s:%d init params mode %d pos %d mount %d\n", __func__,
__LINE__,
cdata->cfg.sensor_init_params.modes_supported,
@@ -724,7 +735,6 @@
rc = -EFAULT;
break;
}
- s_ctrl->free_power_setting = true;
CDBG("%s sensor id %x\n", __func__,
sensor_slave_info.slave_addr);
CDBG("%s sensor addr type %d\n", __func__,
diff --git a/drivers/media/platform/msm/vidc/hfi_packetization.c b/drivers/media/platform/msm/vidc/hfi_packetization.c
index 4da0f6f..4b7a3be 100644
--- a/drivers/media/platform/msm/vidc/hfi_packetization.c
+++ b/drivers/media/platform/msm/vidc/hfi_packetization.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -360,6 +360,18 @@
case HAL_EXTRADATA_MPEG2_SEQDISP:
ret = HFI_PROPERTY_PARAM_VDEC_MPEG2_SEQDISP_EXTRADATA;
break;
+ case HAL_EXTRADATA_FRAME_QP:
+ ret = HFI_PROPERTY_PARAM_VDEC_FRAME_QP_EXTRADATA;
+ break;
+ case HAL_EXTRADATA_FRAME_BITS_INFO:
+ ret = HFI_PROPERTY_PARAM_VDEC_FRAME_BITS_INFO_EXTRADATA;
+ break;
+ case HAL_EXTRADATA_LTR_INFO:
+ ret = HFI_PROPERTY_PARAM_VENC_LTR_INFO;
+ break;
+ case HAL_EXTRADATA_METADATA_MBI:
+ ret = HFI_PROPERTY_PARAM_VENC_MBI_DUMPING;
+ break;
default:
dprintk(VIDC_WARN, "Extradata index not found: %d\n", index);
break;
@@ -389,6 +401,28 @@
return buf_mode;
}
+static u32 get_hfi_ltr_mode(enum ltr_mode ltr_mode_type)
+{
+ u32 ltrmode;
+ switch (ltr_mode_type) {
+ case HAL_LTR_MODE_DISABLE:
+ ltrmode = HFI_LTR_MODE_DISABLE;
+ break;
+ case HAL_LTR_MODE_MANUAL:
+ ltrmode = HFI_LTR_MODE_MANUAL;
+ break;
+ case HAL_LTR_MODE_PERIODIC:
+ ltrmode = HFI_LTR_MODE_PERIODIC;
+ break;
+ default:
+ dprintk(VIDC_ERR, "Invalid ltr mode :0x%x\n",
+ ltr_mode_type);
+ ltrmode = HFI_LTR_MODE_DISABLE;
+ break;
+ }
+ return ltrmode;
+}
+
int create_pkt_cmd_session_set_buffers(
struct hfi_cmd_session_set_buffers_packet *pkt,
u32 session_id,
@@ -1405,6 +1439,54 @@
pkt->size += sizeof(u32) + sizeof(struct hfi_enable);
break;
}
+ case HAL_PARAM_VENC_LTRMODE:
+ {
+ struct hfi_ltrmode *hfi;
+ struct hal_ltrmode *hal = pdata;
+ pkt->rg_property_data[0] =
+ HFI_PROPERTY_PARAM_VENC_LTRMODE;
+ hfi = (struct hfi_ltrmode *) &pkt->rg_property_data[1];
+ hfi->ltrmode = get_hfi_ltr_mode(hal->ltrmode);
+ hfi->ltrcount = hal->ltrcount;
+ hfi->trustmode = hal->trustmode;
+ pkt->size += sizeof(u32) + sizeof(struct hfi_ltrmode);
+ pr_err("SET LTR\n");
+ break;
+ }
+ case HAL_CONFIG_VENC_USELTRFRAME:
+ {
+ struct hfi_ltruse *hfi;
+ struct hal_ltruse *hal = pdata;
+ pkt->rg_property_data[0] =
+ HFI_PROPERTY_CONFIG_VENC_USELTRFRAME;
+ hfi = (struct hfi_ltruse *) &pkt->rg_property_data[1];
+ hfi->frames = hal->frames;
+ hfi->refltr = hal->refltr;
+ hfi->useconstrnt = hal->useconstrnt;
+ pkt->size += sizeof(u32) + sizeof(struct hfi_ltruse);
+ pr_err("USE LTR\n");
+ break;
+ }
+ case HAL_CONFIG_VENC_MARKLTRFRAME:
+ {
+ struct hfi_ltrmark *hfi;
+ struct hal_ltrmark *hal = pdata;
+ pkt->rg_property_data[0] =
+ HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME;
+ hfi = (struct hfi_ltrmark *) &pkt->rg_property_data[1];
+ hfi->markframe = hal->markframe;
+ pkt->size += sizeof(u32) + sizeof(struct hfi_ltrmark);
+ pr_err("MARK LTR\n");
+ break;
+ }
+ case HAL_PARAM_VENC_HIER_P_NUM_FRAMES:
+ {
+ pkt->rg_property_data[0] =
+ HFI_PROPERTY_PARAM_VENC_HIER_P_NUM_ENH_LAYER;
+ pkt->rg_property_data[1] = *(u32 *)pdata;
+ pkt->size += sizeof(u32) * 2;
+ break;
+ }
/* FOLLOWING PROPERTIES ARE NOT IMPLEMENTED IN CORE YET */
case HAL_CONFIG_BUFFER_REQUIREMENTS:
case HAL_CONFIG_PRIORITY:
@@ -1432,7 +1514,7 @@
case HAL_CONFIG_VENC_TIMESTAMP_SCALE:
case HAL_PARAM_VENC_LOW_LATENCY:
default:
- dprintk(VIDC_ERR, "DEFAULT: Calling 0x%x", ptype);
+ dprintk(VIDC_ERR, "DEFAULT: Calling 0x%x\n", ptype);
rc = -ENOTSUPP;
break;
}
diff --git a/drivers/media/platform/msm/vidc/hfi_response_handler.c b/drivers/media/platform/msm/vidc/hfi_response_handler.c
index 189fca0..f4ad985 100644
--- a/drivers/media/platform/msm/vidc/hfi_response_handler.c
+++ b/drivers/media/platform/msm/vidc/hfi_response_handler.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -388,6 +388,10 @@
struct vidc_hal_session_init_done *sess_init_done)
{
struct hal_capability_supported *out = NULL;
+ if (!in) {
+ dprintk(VIDC_ERR, "Invalid input for supported capabilties\n");
+ return;
+ }
switch (in->capability_type) {
case HFI_CAPABILITY_FRAME_WIDTH:
out = &sess_init_done->width;
@@ -420,9 +424,17 @@
case HFI_CAPABILITY_BITRATE:
out = &sess_init_done->bitrate;
break;
+
+ case HFI_CAPABILITY_ENC_LTR_COUNT:
+ out = &sess_init_done->ltr_count;
+ break;
+
+ case HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS:
+ out = &sess_init_done->hier_p;
+ break;
}
- if (in && out) {
+ if (out) {
out->capability_type =
(enum hal_capability)in->capability_type;
out->min = in->min;
diff --git a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
index 5e3699d..176c612 100644
--- a/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_v4l2_vidc.c
@@ -120,6 +120,13 @@
return msm_vidc_g_ctrl((void *)vidc_inst, a);
}
+int msm_v4l2_s_ext_ctrl(struct file *file, void *fh,
+ struct v4l2_ext_controls *a)
+{
+ struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh);
+ return msm_vidc_s_ext_ctrl((void *)vidc_inst, a);
+}
+
int msm_v4l2_reqbufs(struct file *file, void *fh,
struct v4l2_requestbuffers *b)
{
@@ -242,6 +249,7 @@
.vidioc_streamoff = msm_v4l2_streamoff,
.vidioc_s_ctrl = msm_v4l2_s_ctrl,
.vidioc_g_ctrl = msm_v4l2_g_ctrl,
+ .vidioc_s_ext_ctrls = msm_v4l2_s_ext_ctrl,
.vidioc_subscribe_event = msm_v4l2_subscribe_event,
.vidioc_unsubscribe_event = msm_v4l2_unsubscribe_event,
.vidioc_decoder_cmd = msm_v4l2_decoder_cmd,
diff --git a/drivers/media/platform/msm/vidc/msm_vdec.c b/drivers/media/platform/msm/vidc/msm_vdec.c
index 5c735d6..ea7d670 100644
--- a/drivers/media/platform/msm/vidc/msm_vdec.c
+++ b/drivers/media/platform/msm/vidc/msm_vdec.c
@@ -21,7 +21,7 @@
#define MSM_VDEC_DVC_NAME "msm_vdec_8974"
#define MIN_NUM_OUTPUT_BUFFERS 4
-#define MAX_NUM_OUTPUT_BUFFERS 6
+#define MAX_NUM_OUTPUT_BUFFERS VIDEO_MAX_FRAME
#define DEFAULT_VIDEO_CONCEAL_COLOR_BLACK 0x8080
#define TZ_DYNAMIC_BUFFER_FEATURE_ID 12
@@ -220,7 +220,7 @@
.name = "Extradata Type",
.type = V4L2_CTRL_TYPE_MENU,
.minimum = V4L2_MPEG_VIDC_EXTRADATA_NONE,
- .maximum = V4L2_MPEG_VIDC_EXTRADATA_MPEG2_SEQDISP,
+ .maximum = V4L2_MPEG_VIDC_EXTRADATA_FRAME_BITS_INFO,
.default_value = V4L2_MPEG_VIDC_EXTRADATA_NONE,
.menu_skip_mask = ~(
(1 << V4L2_MPEG_VIDC_EXTRADATA_NONE) |
@@ -241,7 +241,9 @@
(1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_INPUT_CROP) |
(1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_DIGITAL_ZOOM) |
(1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_ASPECT_RATIO) |
- (1 << V4L2_MPEG_VIDC_EXTRADATA_MPEG2_SEQDISP)
+ (1 << V4L2_MPEG_VIDC_EXTRADATA_MPEG2_SEQDISP) |
+ (1 << V4L2_MPEG_VIDC_EXTRADATA_FRAME_QP) |
+ (1 << V4L2_MPEG_VIDC_EXTRADATA_FRAME_BITS_INFO)
),
.qmenu = mpeg_video_vidc_extradata,
.step = 0,
@@ -574,15 +576,7 @@
core);
goto exit;
}
- if (!inst->in_reconfig) {
- rc = msm_comm_try_state(inst, MSM_VIDC_RELEASE_RESOURCES_DONE);
- if (rc) {
- dprintk(VIDC_ERR,
- "Failed to move inst: %p to relase res done\n",
- inst);
- goto exit;
- }
- }
+
switch (b->type) {
case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
break;
diff --git a/drivers/media/platform/msm/vidc/msm_venc.c b/drivers/media/platform/msm/vidc/msm_venc.c
index de59e81..d8b608437 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.c
+++ b/drivers/media/platform/msm/vidc/msm_venc.c
@@ -37,6 +37,8 @@
#define B_FRAME_QP 30
#define MAX_INTRA_REFRESH_MBS 300
#define MAX_NUM_B_FRAMES 4
+#define MAX_LTR_FRAME_COUNT 10
+
#define L_MODE V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY
#define CODING V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY
@@ -114,6 +116,7 @@
"Extradata input crop",
"Extradata digital zoom",
"Extradata aspect ratio",
+ "Extradata macroblock metadata",
};
static const char *const perf_level[] = {
@@ -122,6 +125,14 @@
"Turbo"
};
+static const char *const intra_refresh_modes[] = {
+ "None",
+ "Cyclic",
+ "Adaptive",
+ "Cyclic Adaptive",
+ "Random"
+};
+
enum msm_venc_ctrl_cluster {
MSM_VENC_CTRL_CLUSTER_QP = 1 << 0,
MSM_VENC_CTRL_CLUSTER_INTRA_PERIOD = 1 << 1,
@@ -135,7 +146,8 @@
MSM_VENC_CTRL_CLUSTER_TIMING = 1 << 9,
MSM_VENC_CTRL_CLUSTER_VP8_PROFILE_LEVEL = 1 << 10,
MSM_VENC_CTRL_CLUSTER_DEINTERLACE = 1 << 11,
- MSM_VENC_CTRL_CLUSTER_MAX = 1 << 12,
+ MSM_VENC_CTRL_CLUSTER_USE_LTRFRAME = 1 << 12,
+ MSM_VENC_CTRL_CLUSTER_MAX = 1 << 13,
};
static struct msm_vidc_ctrl msm_venc_ctrls[] = {
@@ -464,6 +476,26 @@
.cluster = MSM_VENC_CTRL_CLUSTER_QP,
},
{
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_VP8_MIN_QP,
+ .name = "VP8 Minimum QP",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .minimum = 1,
+ .maximum = 128,
+ .default_value = 1,
+ .step = 1,
+ .cluster = MSM_VENC_CTRL_CLUSTER_QP,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_VP8_MAX_QP,
+ .name = "VP8 Maximum QP",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .minimum = 1,
+ .maximum = 128,
+ .default_value = 128,
+ .step = 1,
+ .cluster = MSM_VENC_CTRL_CLUSTER_QP,
+ },
+ {
.id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
.name = "Slice Mode",
.type = V4L2_CTRL_TYPE_MENU,
@@ -542,6 +574,7 @@
(1 << V4L2_CID_MPEG_VIDC_VIDEO_INTRA_REFRESH_CYCLIC_ADAPTIVE) |
(1 << V4L2_CID_MPEG_VIDC_VIDEO_INTRA_REFRESH_RANDOM)
),
+ .qmenu = intra_refresh_modes,
.cluster = MSM_VENC_CTRL_CLUSTER_INTRA_REFRESH,
},
{
@@ -651,7 +684,7 @@
.name = "Extradata Type",
.type = V4L2_CTRL_TYPE_MENU,
.minimum = V4L2_MPEG_VIDC_EXTRADATA_NONE,
- .maximum = V4L2_MPEG_VIDC_INDEX_EXTRADATA_ASPECT_RATIO,
+ .maximum = V4L2_MPEG_VIDC_EXTRADATA_METADATA_MBI,
.default_value = V4L2_MPEG_VIDC_EXTRADATA_NONE,
.menu_skip_mask = ~(
(1 << V4L2_MPEG_VIDC_EXTRADATA_NONE) |
@@ -671,7 +704,9 @@
(1 << V4L2_MPEG_VIDC_EXTRADATA_METADATA_FILLER) |
(1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_INPUT_CROP) |
(1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_DIGITAL_ZOOM) |
- (1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_ASPECT_RATIO)
+ (1 << V4L2_MPEG_VIDC_INDEX_EXTRADATA_ASPECT_RATIO) |
+ (1 << V4L2_MPEG_VIDC_EXTRADATA_LTR) |
+ (1 << V4L2_MPEG_VIDC_EXTRADATA_METADATA_MBI)
),
.qmenu = mpeg_video_vidc_extradata,
.step = 0,
@@ -729,6 +764,61 @@
.default_value = V4L2_CID_MPEG_VIDC_VIDEO_DEINTERLACE_DISABLED,
.step = 1,
.cluster = MSM_VENC_CTRL_CLUSTER_DEINTERLACE,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_USELTRFRAME,
+ .name = "H264 Use LTR",
+ .type = V4L2_CTRL_TYPE_BUTTON,
+ .minimum = 0,
+ .maximum = (MAX_LTR_FRAME_COUNT - 1),
+ .default_value = 0,
+ .step = 1,
+ .qmenu = NULL,
+ .cluster = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_LTRCOUNT,
+ .name = "Ltr Count",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .minimum = 0,
+ .maximum = MAX_LTR_FRAME_COUNT,
+ .default_value = 0,
+ .step = 1,
+ .qmenu = NULL,
+ .cluster = MSM_VENC_CTRL_CLUSTER_USE_LTRFRAME,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_LTRMODE,
+ .name = "Ltr Mode",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .minimum = V4L2_MPEG_VIDC_VIDEO_LTR_MODE_DISABLE,
+ .maximum = V4L2_MPEG_VIDC_VIDEO_LTR_MODE_PERIODIC,
+ .default_value = V4L2_MPEG_VIDC_VIDEO_LTR_MODE_DISABLE,
+ .step = 1,
+ .qmenu = NULL,
+ .cluster = MSM_VENC_CTRL_CLUSTER_USE_LTRFRAME,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_MARKLTRFRAME,
+ .name = "H264 Mark LTR",
+ .type = V4L2_CTRL_TYPE_BUTTON,
+ .minimum = 0,
+ .maximum = (MAX_LTR_FRAME_COUNT - 1),
+ .default_value = 0,
+ .step = 1,
+ .qmenu = NULL,
+ .cluster = 0,
+ },
+ {
+ .id = V4L2_CID_MPEG_VIDC_VIDEO_HIER_P_NUM_LAYERS,
+ .name = "Set Hier P num layers",
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .minimum = 0,
+ .maximum = 3,
+ .default_value = 0,
+ .step = 1,
+ .qmenu = NULL,
+ .cluster = 0,
}
};
@@ -836,28 +926,33 @@
*num_buffers = buff_req->buffer_count_actual =
max(*num_buffers, buff_req->buffer_count_actual);
}
- if (*num_buffers < MIN_NUM_CAPTURE_BUFFERS)
- *num_buffers = MIN_NUM_CAPTURE_BUFFERS;
- if (*num_buffers > VIDEO_MAX_FRAME) {
- dprintk(VIDC_ERR,
- "Changing buffers requested, from %d to max"\
- " supported (%d) best effort encoding\n",
- *num_buffers, VIDEO_MAX_FRAME);
- *num_buffers = VIDEO_MAX_FRAME;
+ if (*num_buffers < MIN_NUM_CAPTURE_BUFFERS ||
+ *num_buffers > VIDEO_MAX_FRAME) {
+ int temp = *num_buffers;
+
+ *num_buffers = clamp_val(*num_buffers,
+ MIN_NUM_CAPTURE_BUFFERS,
+ VIDEO_MAX_FRAME);
+ dprintk(VIDC_INFO,
+ "Changing buffer count on CAPTURE_MPLANE from %d to %d for best effort encoding\n",
+ temp, *num_buffers);
}
+
ctrl = v4l2_ctrl_find(&inst->ctrl_handler,
V4L2_CID_MPEG_VIDC_VIDEO_EXTRADATA);
if (ctrl)
extradata = v4l2_ctrl_g_ctrl(ctrl);
- if (extradata)
+ if (extradata != V4L2_MPEG_VIDC_EXTRADATA_NONE)
*num_planes = *num_planes + 1;
inst->fmts[CAPTURE_PORT]->num_planes = *num_planes;
+
for (i = 0; i < *num_planes; i++) {
sizes[i] = inst->fmts[CAPTURE_PORT]->get_frame_size(
i, inst->prop.height[CAPTURE_PORT],
inst->prop.width[CAPTURE_PORT]);
}
+
property_id = HAL_PARAM_BUFFER_COUNT_ACTUAL;
new_buf_count.buffer_type = HAL_BUFFER_OUTPUT;
new_buf_count.buffer_count_actual = *num_buffers;
@@ -1273,6 +1368,9 @@
struct v4l2_ctrl *temp_ctrl = NULL;
struct hfi_device *hdev;
struct hal_extradata_enable extra;
+ struct hal_ltruse useltr;
+ struct hal_ltrmark markltr;
+ u32 hier_p_layers;
if (!inst || !inst->core || !inst->core->device) {
dprintk(VIDC_ERR, "%s invalid parameters", __func__);
@@ -1683,6 +1781,26 @@
pdata = &qp_range;
break;
}
+ case V4L2_CID_MPEG_VIDC_VIDEO_VP8_MIN_QP: {
+ struct v4l2_ctrl *qp_max;
+ qp_max = TRY_GET_CTRL(V4L2_CID_MPEG_VIDC_VIDEO_VP8_MAX_QP);
+ property_id = HAL_PARAM_VENC_SESSION_QP_RANGE;
+ qp_range.layer_id = 0;
+ qp_range.max_qp = qp_max->val;
+ qp_range.min_qp = ctrl->val;
+ pdata = &qp_range;
+ break;
+ }
+ case V4L2_CID_MPEG_VIDC_VIDEO_VP8_MAX_QP: {
+ struct v4l2_ctrl *qp_min;
+ qp_min = TRY_GET_CTRL(V4L2_CID_MPEG_VIDC_VIDEO_VP8_MIN_QP);
+ property_id = HAL_PARAM_VENC_SESSION_QP_RANGE;
+ qp_range.layer_id = 0;
+ qp_range.max_qp = ctrl->val;
+ qp_range.min_qp = qp_min->val;
+ pdata = &qp_range;
+ break;
+ }
case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: {
int temp = 0;
@@ -1970,7 +2088,33 @@
pdata = &enable;
break;
}
+ case V4L2_CID_MPEG_VIDC_VIDEO_USELTRFRAME:
+ property_id = HAL_CONFIG_VENC_USELTRFRAME;
+ useltr.refltr = ctrl->val;
+ useltr.useconstrnt = false;
+ useltr.frames = 0;
+ pdata = &useltr;
+ break;
+ case V4L2_CID_MPEG_VIDC_VIDEO_MARKLTRFRAME:
+ property_id = HAL_CONFIG_VENC_MARKLTRFRAME;
+ markltr.markframe = ctrl->val;
+ pdata = &markltr;
+ break;
+ case V4L2_CID_MPEG_VIDC_VIDEO_HIER_P_NUM_LAYERS:
+ property_id = HAL_PARAM_VENC_HIER_P_NUM_FRAMES;
+ hier_p_layers = ctrl->val;
+ if (hier_p_layers > (inst->capability.hier_p.max - 1)) {
+ dprintk(VIDC_ERR,
+ "Error setting hier p num layers = %d max supported by f/w = %d\n",
+ hier_p_layers,
+ inst->capability.hier_p.max - 1);
+ rc = -ENOTSUPP;
+ break;
+ }
+ pdata = &hier_p_layers;
+ break;
default:
+ dprintk(VIDC_ERR, "Unsupported index: %x\n", ctrl->id);
rc = -ENOTSUPP;
break;
}
@@ -1987,6 +2131,89 @@
return rc;
}
+static struct v4l2_ctrl *get_cluster_from_id(int id)
+{
+ int c;
+ for (c = 0; c < ARRAY_SIZE(msm_venc_ctrls); ++c)
+ if (msm_venc_ctrls[c].id == id)
+ return (struct v4l2_ctrl *)msm_venc_ctrls[c].priv;
+ return NULL;
+}
+
+static int try_set_ext_ctrl(struct msm_vidc_inst *inst,
+ struct v4l2_ext_controls *ctrl)
+{
+ int rc = 0, i;
+ struct v4l2_ext_control *control;
+ struct hfi_device *hdev;
+ struct hal_ltrmode ltrmode;
+ struct v4l2_ctrl *cluster;
+ u32 property_id = 0;
+ void *pdata = NULL;
+ struct msm_vidc_core_capability *cap = NULL;
+
+ if (!inst || !inst->core || !inst->core->device || !ctrl) {
+ dprintk(VIDC_ERR, "%s invalid parameters\n", __func__);
+ return -EINVAL;
+ }
+
+ cluster = get_cluster_from_id(ctrl->controls[0].id);
+
+ if (!cluster) {
+ dprintk(VIDC_ERR, "Invalid Ctrl returned for id: %x\n",
+ ctrl->controls[0].id);
+ return -EINVAL;
+ }
+
+ hdev = inst->core->device;
+ cap = &inst->capability;
+
+ control = ctrl->controls;
+ for (i = 0; i < ctrl->count; i++) {
+ switch (control[i].id) {
+ case V4L2_CID_MPEG_VIDC_VIDEO_LTRMODE:
+ ltrmode.ltrmode = control[i].value;
+ ltrmode.trustmode = 1;
+ property_id = HAL_PARAM_VENC_LTRMODE;
+ pdata = <rmode;
+ break;
+ case V4L2_CID_MPEG_VIDC_VIDEO_LTRCOUNT:
+ ltrmode.ltrcount = control[i].value;
+ if (ltrmode.ltrcount > cap->ltr_count.max) {
+ dprintk(VIDC_ERR,
+ "Invalid LTR count %d. Supported max: %d\n",
+ ltrmode.ltrcount,
+ cap->ltr_count.max);
+ /*
+ * FIXME: Return an error (-EINVALID)
+ * here once VP8 supports LTR count
+ * capability
+ */
+ ltrmode.ltrcount = 1;
+ }
+ ltrmode.trustmode = 1;
+ property_id = HAL_PARAM_VENC_LTRMODE;
+ pdata = <rmode;
+ break;
+ default:
+ dprintk(VIDC_ERR, "Invalid id set: %d\n",
+ control[i].id);
+ rc = -ENOTSUPP;
+ break;
+ }
+ if (rc)
+ break;
+ }
+
+ if (!rc && property_id) {
+ dprintk(VIDC_DBG, "Control: HAL property=%x\n", property_id);
+ rc = call_hfi_op(hdev, session_set_property,
+ (void *)inst->session, property_id, pdata);
+ }
+ pr_err("Returning from %s\n", __func__);
+ return rc;
+}
+
static int msm_venc_op_s_ctrl(struct v4l2_ctrl *ctrl)
{
@@ -2072,6 +2299,22 @@
return v4l2_g_ctrl(&inst->ctrl_handler, ctrl);
}
+int msm_venc_s_ext_ctrl(struct msm_vidc_inst *inst,
+ struct v4l2_ext_controls *ctrl)
+{
+ int rc = 0;
+ if (ctrl->ctrl_class != V4L2_CTRL_CLASS_MPEG) {
+ dprintk(VIDC_ERR, "Invalid Class set for extended control\n");
+ return -EINVAL;
+ }
+ rc = try_set_ext_ctrl(inst, ctrl);
+ if (rc) {
+ dprintk(VIDC_ERR, "Error setting extended control\n");
+ return rc;
+ }
+ return rc;
+}
+
int msm_venc_cmd(struct msm_vidc_inst *inst, struct v4l2_encoder_cmd *enc)
{
int rc = 0;
diff --git a/drivers/media/platform/msm/vidc/msm_venc.h b/drivers/media/platform/msm/vidc/msm_venc.h
index 9020167..5965d39 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.h
+++ b/drivers/media/platform/msm/vidc/msm_venc.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012, 2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,6 +25,7 @@
int msm_venc_g_fmt(void *instance, struct v4l2_format *f);
int msm_venc_s_ctrl(void *instance, struct v4l2_control *a);
int msm_venc_g_ctrl(void *instance, struct v4l2_control *a);
+int msm_venc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a);
int msm_venc_reqbufs(void *instance, struct v4l2_requestbuffers *b);
int msm_venc_prepare_buf(struct msm_vidc_inst *inst, struct v4l2_buffer *b);
int msm_venc_release_buf(struct msm_vidc_inst *inst, struct v4l2_buffer *b);
diff --git a/drivers/media/platform/msm/vidc/msm_vidc.c b/drivers/media/platform/msm/vidc/msm_vidc.c
index 035fc4b..fe0a42d 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc.c
@@ -185,6 +185,15 @@
return msm_venc_g_ctrl(instance, control);
return -EINVAL;
}
+int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *control)
+{
+ struct msm_vidc_inst *inst = instance;
+ if (!inst || !control)
+ return -EINVAL;
+ if (inst->session_type == MSM_VIDC_ENCODER)
+ return msm_venc_s_ext_ctrl(instance, control);
+ return -EINVAL;
+}
int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b)
{
struct msm_vidc_inst *inst = instance;
@@ -246,38 +255,38 @@
return ret;
}
-struct buffer_info *get_same_fd_buffer(struct msm_vidc_inst *inst,
- struct list_head *list, int fd, int *plane)
+struct msm_smem *get_same_fd_buffer(struct msm_vidc_inst *inst,
+ struct list_head *list, int fd)
{
struct buffer_info *temp;
- struct buffer_info *ret = NULL;
+ struct msm_smem *same_fd_handle = NULL;
+
int i;
if (fd == 0)
return NULL;
- if (!list || fd < 0 || !plane) {
+ if (!list || fd < 0) {
dprintk(VIDC_ERR, "Invalid input\n");
goto err_invalid_input;
}
- *plane = 0;
mutex_lock(&inst->lock);
list_for_each_entry(temp, list, list) {
for (i = 0; (i < temp->num_planes)
&& (i < VIDEO_MAX_PLANES); i++) {
- if (temp && temp->fd[i] == fd) {
+ if (temp && (temp->fd[i] == fd) &&
+ temp->handle[i] && temp->mapped[i]) {
temp->same_fd_ref[i]++;
dprintk(VIDC_INFO,
"Found same fd buffer\n");
- ret = temp;
- *plane = i;
+ same_fd_handle = temp->handle[i];
break;
}
}
- if (ret)
+ if (same_fd_handle)
break;
}
mutex_unlock(&inst->lock);
err_invalid_input:
- return ret;
+ return same_fd_handle;
}
struct buffer_info *device_to_uvaddr(struct msm_vidc_inst *inst,
@@ -423,6 +432,7 @@
struct buffer_info *temp = NULL;
int plane = 0;
int i = 0, rc = 0;
+ struct msm_smem *same_fd_handle = NULL;
if (!b || !inst) {
dprintk(VIDC_ERR, "%s: invalid input\n", __func__);
@@ -480,16 +490,17 @@
if (rc < 0)
goto exit;
- temp = get_same_fd_buffer(inst, &inst->registered_bufs,
- b->m.planes[i].reserved[0], &plane);
+ same_fd_handle = get_same_fd_buffer(inst,
+ &inst->registered_bufs,
+ b->m.planes[i].reserved[0]);
populate_buf_info(binfo, b, i);
- if (temp) {
+ if (same_fd_handle) {
binfo->device_addr[i] =
- temp->handle[plane]->device_addr + binfo->buff_off[i];
+ same_fd_handle->device_addr + binfo->buff_off[i];
b->m.planes[i].m.userptr = binfo->device_addr[i];
binfo->mapped[i] = false;
- binfo->handle[i] = temp->handle[i];
+ binfo->handle[i] = same_fd_handle;
} else {
if (inst->map_output_buffer) {
binfo->handle[i] =
@@ -514,7 +525,7 @@
if ((i == 0) && is_dynamic_output_buffer_mode(b, inst)) {
rc = buf_ref_get(inst, binfo);
if (rc < 0)
- return rc;
+ goto exit;
}
dprintk(VIDC_DBG,
"%s: [MAP] binfo = %p, handle[%d] = %p, device_addr = 0x%x, fd = %d, offset = %d, mapped = %d\n",
@@ -672,7 +683,8 @@
return -EINVAL;
}
} else
- dprintk(VIDC_ERR, "%s: WARN: NULL handle", __func__);
+ dprintk(VIDC_DBG, "%s: NULL handle for plane %d\n",
+ __func__, i);
}
return 0;
}
@@ -716,6 +728,26 @@
if (!inst)
return -EINVAL;
+ if (!inst->in_reconfig) {
+ rc = msm_comm_try_state(inst, MSM_VIDC_RELEASE_RESOURCES_DONE);
+ if (rc) {
+ dprintk(VIDC_ERR,
+ "Failed to move inst: %p to release res done\n",
+ inst);
+ }
+ }
+
+ /*
+ * In dynamic buffer mode, driver needs to release resources,
+ * but not call release buffers on firmware, as the buffers
+ * were never registered with firmware.
+ */
+ if ((buffer_type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) &&
+ (inst->buffer_mode_set[CAPTURE_PORT] ==
+ HAL_BUFFER_MODE_DYNAMIC)) {
+ goto free_and_unmap;
+ }
+
list_for_each_safe(ptr, next, &inst->registered_bufs) {
bool release_buf = false;
mutex_lock(&inst->lock);
@@ -754,6 +786,8 @@
buffer_info.m.planes[0].reserved[1],
buffer_info.m.planes[0].length);
}
+
+free_and_unmap:
mutex_lock(&inst->lock);
list_for_each_safe(ptr, next, &inst->registered_bufs) {
bi = list_entry(ptr, struct buffer_info, list);
@@ -928,6 +962,13 @@
}
}
+ if (!buffer_info && inst->map_output_buffer) {
+ dprintk(VIDC_ERR,
+ "%s: error - no buffer info found in registered list\n",
+ __func__);
+ return -EINVAL;
+ }
+
if (is_dynamic_output_buffer_mode(b, inst)) {
mutex_lock(&inst->lock);
buffer_info->dequeued = true;
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_common.c b/drivers/media/platform/msm/vidc/msm_vidc_common.c
index 7ae2cb5..81f18e1 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_common.c
+++ b/drivers/media/platform/msm/vidc/msm_vidc_common.c
@@ -390,7 +390,8 @@
&inst->completions[SESSION_MSG_INDEX(cmd)],
msecs_to_jiffies(msm_vidc_hw_rsp_timeout));
if (!rc) {
- dprintk(VIDC_ERR, "Wait interrupted or timeout: %d\n", rc);
+ dprintk(VIDC_ERR, "Wait interrupted or timeout: %d\n",
+ SESSION_MSG_INDEX(cmd));
msm_comm_recover_from_session_error(inst);
rc = -EIO;
} else {
@@ -463,6 +464,9 @@
session_init_done->frame_rate;
inst->capability.scale_x = session_init_done->scale_x;
inst->capability.scale_y = session_init_done->scale_y;
+ inst->capability.ltr_count =
+ session_init_done->ltr_count;
+ inst->capability.hier_p = session_init_done->hier_p;
inst->capability.pixelprocess_capabilities =
call_hfi_op(hdev, get_core_capabilities);
inst->capability.capability_set = true;
@@ -1117,6 +1121,7 @@
struct vidc_hal_fbd *fill_buf_done;
enum hal_buffer buffer_type;
int64_t time_usec = 0;
+ int extra_idx = 0;
if (!response) {
dprintk(VIDC_ERR, "Invalid response from vidc_hal\n");
@@ -1163,6 +1168,15 @@
ns_to_timeval(time_usec * NSEC_PER_USEC);
}
vb->v4l2_buf.flags = 0;
+ extra_idx =
+ EXTRADATA_IDX(inst->fmts[CAPTURE_PORT]->num_planes);
+ if (extra_idx && (extra_idx < VIDEO_MAX_PLANES)) {
+ vb->v4l2_planes[extra_idx].m.userptr =
+ (unsigned long)fill_buf_done->extra_data_buffer;
+ vb->v4l2_planes[extra_idx].bytesused =
+ vb->v4l2_planes[extra_idx].length;
+ vb->v4l2_planes[extra_idx].data_offset = 0;
+ }
handle_dynamic_buffer(inst, (u32)fill_buf_done->packet_buffer1,
fill_buf_done->flags1);
@@ -1217,6 +1231,13 @@
fill_buf_done->start_y_coord, fill_buf_done->frame_width,
fill_buf_done->frame_height, fill_buf_done->picture_type);
+ if (extra_idx && (extra_idx < VIDEO_MAX_PLANES)) {
+ dprintk(VIDC_DBG,
+ "extradata: userptr = %p; bytesused = %d; length = %d\n",
+ (u8 *)vb->v4l2_planes[extra_idx].m.userptr,
+ vb->v4l2_planes[extra_idx].bytesused,
+ vb->v4l2_planes[extra_idx].length);
+ }
mutex_lock(&inst->bufq[CAPTURE_PORT].lock);
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
mutex_unlock(&inst->bufq[CAPTURE_PORT].lock);
@@ -1452,7 +1473,8 @@
&core->completions[SYS_MSG_INDEX(RELEASE_RESOURCE_DONE)],
msecs_to_jiffies(msm_vidc_hw_rsp_timeout));
if (!rc) {
- dprintk(VIDC_ERR, "Wait interrupted or timeout: %d\n", rc);
+ dprintk(VIDC_ERR, "Wait interrupted or timeout: %d\n",
+ SYS_MSG_INDEX(RELEASE_RESOURCE_DONE));
rc = -EIO;
}
release_ocmem_failed:
@@ -1474,7 +1496,8 @@
&core->completions[SYS_MSG_INDEX(SYS_INIT_DONE)],
msecs_to_jiffies(msm_vidc_hw_rsp_timeout));
if (!rc) {
- dprintk(VIDC_ERR, "Wait interrupted or timeout: %d\n", rc);
+ dprintk(VIDC_ERR, "Wait interrupted or timeout: %d\n",
+ SYS_MSG_INDEX(SYS_INIT_DONE));
rc = -EIO;
goto exit;
} else {
@@ -2554,7 +2577,8 @@
msecs_to_jiffies(msm_vidc_hw_rsp_timeout));
if (!rc) {
dprintk(VIDC_ERR,
- "Wait interrupted or timeout: %d\n", rc);
+ "Wait interrupted or timeout: %d\n",
+ SESSION_MSG_INDEX(SESSION_PROPERTY_INFO));
inst->state = MSM_VIDC_CORE_INVALID;
msm_comm_recover_from_session_error(inst);
rc = -EIO;
@@ -3121,6 +3145,18 @@
case V4L2_MPEG_VIDC_EXTRADATA_MPEG2_SEQDISP:
ret = HAL_EXTRADATA_MPEG2_SEQDISP;
break;
+ case V4L2_MPEG_VIDC_EXTRADATA_FRAME_QP:
+ ret = HAL_EXTRADATA_FRAME_QP;
+ break;
+ case V4L2_MPEG_VIDC_EXTRADATA_FRAME_BITS_INFO:
+ ret = HAL_EXTRADATA_FRAME_BITS_INFO;
+ break;
+ case V4L2_MPEG_VIDC_EXTRADATA_LTR:
+ ret = HAL_EXTRADATA_LTR_INFO;
+ break;
+ case V4L2_MPEG_VIDC_EXTRADATA_METADATA_MBI:
+ ret = HAL_EXTRADATA_METADATA_MBI;
+ break;
default:
dprintk(VIDC_WARN, "Extradata not found: %d\n", index);
break;
@@ -3356,7 +3392,7 @@
msecs_to_jiffies(msm_vidc_hw_rsp_timeout));
if (!rc) {
dprintk(VIDC_ERR, "%s: Wait interrupted or timeout: %d\n",
- __func__, rc);
+ __func__, SESSION_MSG_INDEX(SESSION_ABORT_DONE));
msm_comm_generate_sys_error(inst);
} else
change_inst_state(inst, MSM_VIDC_CLOSE_DONE);
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_internal.h b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
index e4f920f..06181dd 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_internal.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -190,6 +190,8 @@
u32 pixelprocess_capabilities;
struct hal_capability_supported scale_x;
struct hal_capability_supported scale_y;
+ struct hal_capability_supported ltr_count;
+ struct hal_capability_supported hier_p;
u32 capability_set;
enum buffer_mode_type buffer_mode[MAX_PORT_NUM];
};
diff --git a/drivers/media/platform/msm/vidc/venus_hfi.c b/drivers/media/platform/msm/vidc/venus_hfi.c
index 6d51c96..4fcd20e 100644
--- a/drivers/media/platform/msm/vidc/venus_hfi.c
+++ b/drivers/media/platform/msm/vidc/venus_hfi.c
@@ -856,6 +856,7 @@
fail_clk_enable:
for (i--; i >= 0; i--) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
return rc;
@@ -886,6 +887,7 @@
for (i = 0; i <= device->clk_gating_level; i++) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
device->clocks_enabled = 0;
@@ -1534,16 +1536,11 @@
int enable)
{
u8 packet[VIDC_IFACEQ_VAR_SMALL_PKT_SIZE];
- u32 hw_version;
struct hfi_cmd_sys_set_property_packet *pkt =
(struct hfi_cmd_sys_set_property_packet *) &packet;
- hw_version = venus_hfi_read_register(device, VIDC_WRAPPER_HW_VERSION);
- dprintk(VIDC_DBG, "Venus HW version: 0x%x\n", hw_version);
- if ((hw_version & 0xFFFF0000) != 0x10030000) {
- create_pkt_cmd_sys_idle_indicator(pkt, enable);
- if (venus_hfi_iface_cmdq_write(device, pkt))
- return -ENOTEMPTY;
- }
+ create_pkt_cmd_sys_idle_indicator(pkt, enable);
+ if (venus_hfi_iface_cmdq_write(device, pkt))
+ return -ENOTEMPTY;
return 0;
}
@@ -2807,12 +2804,14 @@
if (i == VCODEC_OCMEM_CLK && !device->res->has_ocmem)
continue;
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
} else {
for (i = device->clk_gating_level + 1;
i < VCODEC_MAX_CLKS; i++) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable(cl->clk);
}
}
@@ -2855,6 +2854,7 @@
fail_clk_enable:
for (; i >= 0; i--) {
cl = &device->resources.clock[i];
+ usleep(100);
clk_disable_unprepare(cl->clk);
}
mutex_unlock(&device->clk_pwr_lock);
@@ -3114,14 +3114,14 @@
return -EINVAL;
}
ocmem_buffer = device->resources.ocmem.buf;
- if (!ocmem_buffer ||
- ocmem_buffer->len < size) {
+ if (!ocmem_buffer || ocmem_buffer->len < size) {
ocmem_buffer = ocmem_allocate(OCMEM_VIDEO, size);
if (IS_ERR_OR_NULL(ocmem_buffer)) {
dprintk(VIDC_ERR,
"ocmem_allocate_nb failed: %d\n",
(u32) ocmem_buffer);
rc = -ENOMEM;
+ goto ocmem_set_failed;
}
device->resources.ocmem.buf = ocmem_buffer;
rc = venus_hfi_set_ocmem(device, ocmem_buffer);
@@ -3479,9 +3479,15 @@
&smem_block_size);
if (smem_table_ptr &&
((smem_image_index_venus + version_string_size) <=
- smem_block_size))
+ smem_block_size)) {
memcpy(version_info, smem_table_ptr + smem_image_index_venus,
version_string_size);
+ } else {
+ dprintk(VIDC_ERR,
+ "%s: failed to read version info from smem table\n",
+ __func__);
+ return -EINVAL;
+ }
while (version_info[i++] != 'V' && i < version_string_size)
;
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi.h b/drivers/media/platform/msm/vidc/vidc_hfi.h
index 70b93ff0..75f583f 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -19,6 +19,7 @@
#define HFI_EVENT_SESSION_SEQUENCE_CHANGED (HFI_OX_BASE + 0x3)
#define HFI_EVENT_SESSION_PROPERTY_CHANGED (HFI_OX_BASE + 0x4)
+#define HFI_EVENT_SESSION_LTRUSE_FAILED (HFI_OX_BASE + 0x5)
#define HFI_EVENT_RELEASE_BUFFER_REFERENCE (HFI_OX_BASE + 0x6)
#define HFI_EVENT_DATA_SEQUENCE_CHANGED_SUFFICIENT_BUFFER_RESOURCES \
@@ -81,9 +82,12 @@
#define HFI_EXTRADATA_CLOSED_CAPTION_UD 0x0000000A
#define HFI_EXTRADATA_AFD_UD 0x0000000B
#define HFI_EXTRADATA_MPEG2_SEQDISP 0x0000000D
+#define HFI_EXTRADATA_FRAME_QP 0x0000000F
+#define HFI_EXTRADATA_FRAME_BITS_INFO 0x00000010
#define HFI_EXTRADATA_MULTISLICE_INFO 0x7F100000
#define HFI_EXTRADATA_NUM_CONCEALED_MB 0x7F100001
#define HFI_EXTRADATA_INDEX 0x7F100002
+#define HFI_EXTRADATA_METADATA_LTR 0x7F100004
#define HFI_EXTRADATA_METADATA_FILLER 0x7FE00002
#define HFI_INDEX_EXTRADATA_INPUT_CROP 0x0700000E
@@ -202,6 +206,10 @@
(HFI_PROPERTY_PARAM_VDEC_OX_START + 0x015)
#define HFI_PROPERTY_PARAM_VDEC_MPEG2_SEQDISP_EXTRADATA \
(HFI_PROPERTY_PARAM_VDEC_OX_START + 0x016)
+#define HFI_PROPERTY_PARAM_VDEC_FRAME_QP_EXTRADATA \
+ (HFI_PROPERTY_PARAM_VDEC_OX_START + 0x018)
+#define HFI_PROPERTY_PARAM_VDEC_FRAME_BITS_INFO_EXTRADATA \
+ (HFI_PROPERTY_PARAM_VDEC_OX_START + 0x019)
#define HFI_PROPERTY_CONFIG_VDEC_OX_START \
(HFI_DOMAIN_BASE_VDEC + HFI_ARCH_OX_OFFSET + 0x0000)
@@ -218,6 +226,10 @@
(HFI_PROPERTY_PARAM_VENC_OX_START + 0x001)
#define HFI_PROPERTY_PARAM_VENC_H264_IDR_S3D_FRAME_PACKING_NAL \
(HFI_PROPERTY_PARAM_VENC_OX_START + 0x002)
+#define HFI_PROPERTY_PARAM_VENC_LTR_INFO \
+ (HFI_PROPERTY_PARAM_VENC_OX_START + 0x003)
+#define HFI_PROPERTY_PARAM_VENC_MBI_DUMPING \
+ (HFI_PROPERTY_PARAM_VENC_OX_START + 0x005)
#define HFI_PROPERTY_CONFIG_VENC_OX_START \
(HFI_DOMAIN_BASE_VENC + HFI_ARCH_OX_OFFSET + 0x6000)
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi_api.h b/drivers/media/platform/msm/vidc/vidc_hfi_api.h
index 846171e..c764758 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi_api.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi_api.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -97,7 +97,11 @@
HAL_EXTRADATA_NUM_CONCEALED_MB,
HAL_EXTRADATA_METADATA_FILLER,
HAL_EXTRADATA_ASPECT_RATIO,
- HAL_EXTRADATA_MPEG2_SEQDISP
+ HAL_EXTRADATA_MPEG2_SEQDISP,
+ HAL_EXTRADATA_FRAME_QP,
+ HAL_EXTRADATA_FRAME_BITS_INFO,
+ HAL_EXTRADATA_LTR_INFO,
+ HAL_EXTRADATA_METADATA_MBI,
};
enum hal_property {
@@ -177,6 +181,11 @@
HAL_PARAM_BUFFER_ALLOC_MODE,
HAL_PARAM_VDEC_FRAME_ASSEMBLY,
HAL_PARAM_VDEC_CONCEAL_COLOR,
+ HAL_PARAM_VENC_LTRMODE,
+ HAL_CONFIG_VENC_MARKLTRFRAME,
+ HAL_CONFIG_VENC_USELTRFRAME,
+ HAL_CONFIG_VENC_LTRPERIOD,
+ HAL_PARAM_VENC_HIER_P_NUM_FRAMES,
};
enum hal_domain {
@@ -896,6 +905,27 @@
enum buffer_mode_type buffer_mode;
};
+enum ltr_mode {
+ HAL_LTR_MODE_DISABLE,
+ HAL_LTR_MODE_MANUAL,
+ HAL_LTR_MODE_PERIODIC,
+};
+
+struct hal_ltrmode {
+ enum ltr_mode ltrmode;
+ u32 ltrcount;
+ u32 trustmode;
+};
+
+struct hal_ltruse {
+ u32 refltr;
+ u32 useconstrnt;
+ u32 frames;
+};
+
+struct hal_ltrmark {
+ u32 markframe;
+};
/* HAL Response */
enum command_response {
@@ -1032,6 +1062,8 @@
struct hal_capability_supported scale_x;
struct hal_capability_supported scale_y;
struct hal_capability_supported bitrate;
+ struct hal_capability_supported ltr_count;
+ struct hal_capability_supported hier_p;
struct hal_uncompressed_format_supported uncomp_format;
struct hal_interlace_format_supported HAL_format;
struct hal_nal_stream_format_supported nal_stream_format;
diff --git a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
index 1916e9f..5117266 100644
--- a/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
+++ b/drivers/media/platform/msm/vidc/vidc_hfi_helper.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -309,7 +309,7 @@
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x01A)
#define HFI_PROPERTY_PARAM_VENC_H264_NAL_SVC_EXT \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x01B)
-#define HFI_PROPERTY_PARAM_VENC_H264_LTRMODE \
+#define HFI_PROPERTY_PARAM_VENC_LTRMODE \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x01C)
#define HFI_PROPERTY_PARAM_VENC_VIDEO_FULL_RANGE \
(HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x01D)
@@ -338,7 +338,12 @@
(HFI_DOMAIN_BASE_VPE + HFI_ARCH_COMMON_OFFSET + 0x7000)
#define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER \
(HFI_PROPERTY_CONFIG_VENC_COMMON_START + 0x008)
-
+#define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME \
+ (HFI_PROPERTY_CONFIG_VENC_COMMON_START + 0x009)
+#define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME \
+ (HFI_PROPERTY_CONFIG_VENC_COMMON_START + 0x00A)
+#define HFI_PROPERTY_CONFIG_VENC_LTRPERIOD \
+ (HFI_PROPERTY_CONFIG_VENC_COMMON_START + 0x00C)
#define HFI_PROPERTY_CONFIG_VPE_COMMON_START \
(HFI_DOMAIN_BASE_VPE + HFI_ARCH_COMMON_OFFSET + 0x8000)
#define HFI_PROPERTY_CONFIG_VPE_DEINTERLACE \
@@ -361,6 +366,7 @@
#define HFI_CAPABILITY_BITRATE (HFI_COMMON_BASE + 0x8)
#define HFI_CAPABILITY_BFRAME (HFI_COMMON_BASE + 0x9)
#define HFI_CAPABILITY_HIER_P_NUM_ENH_LAYERS (HFI_COMMON_BASE + 0x10)
+#define HFI_CAPABILITY_ENC_LTR_COUNT (HFI_COMMON_BASE + 0x11)
struct hfi_capability_supported {
u32 capability_type;
@@ -531,6 +537,26 @@
u32 layer_id;
};
+#define HFI_LTR_MODE_DISABLE 0x0
+#define HFI_LTR_MODE_MANUAL 0x1
+#define HFI_LTR_MODE_PERIODIC 0x2
+
+struct hfi_ltrmode {
+ u32 ltrmode;
+ u32 ltrcount;
+ u32 trustmode;
+};
+
+struct hfi_ltruse {
+ u32 refltr;
+ u32 useconstrnt;
+ u32 frames;
+};
+
+struct hfi_ltrmark {
+ u32 markframe;
+};
+
struct hfi_frame_size {
u32 buffer_type;
u32 width;
diff --git a/drivers/media/platform/msm/wfd/enc-venus-subdev.c b/drivers/media/platform/msm/wfd/enc-venus-subdev.c
index 7e64714..40d1b2c 100644
--- a/drivers/media/platform/msm/wfd/enc-venus-subdev.c
+++ b/drivers/media/platform/msm/wfd/enc-venus-subdev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -14,6 +14,7 @@
#include <linux/bitmap.h>
#include <linux/completion.h>
#include <linux/ion.h>
+#include <linux/jiffies.h>
#include <linux/kthread.h>
#include <linux/list.h>
#include <linux/mutex.h>
@@ -28,6 +29,7 @@
#define BUF_TYPE_OUTPUT V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
#define BUF_TYPE_INPUT V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
+#define TIMEOUT msecs_to_jiffies(100)
static struct ion_client *venc_ion_client;
static long venc_secure(struct v4l2_subdev *sd);
@@ -1027,10 +1029,18 @@
index = next_free_index(&inst->free_output_indices);
mutex_unlock(&inst->lock);
- if (index < 0)
- wait_for_completion(&inst->dq_complete);
- else
+ if (index < 0) {
+ rc = wait_for_completion_timeout(&inst->dq_complete,
+ TIMEOUT);
+ if (!rc) {
+ WFD_MSG_ERR(
+ "Timed out waiting for an output buffer\n");
+ rc = -ETIMEDOUT;
+ goto err_fill_buf;
+ }
+ } else {
break;
+ }
}
buffer = (struct v4l2_buffer) {
@@ -1050,6 +1060,7 @@
mutex_unlock(&inst->lock);
}
+err_fill_buf:
return rc;
}
@@ -1153,10 +1164,18 @@
index = next_free_index(&inst->free_input_indices);
mutex_unlock(&inst->lock);
- if (index < 0)
- wait_for_completion(&inst->dq_complete);
- else
+ if (index < 0) {
+ rc = wait_for_completion_timeout(&inst->dq_complete,
+ TIMEOUT);
+ if (!rc) {
+ WFD_MSG_ERR(
+ "Timed out waiting for an input buffer\n");
+ rc = -ETIMEDOUT;
+ goto err_encode_frame;
+ }
+ } else {
break;
+ }
}
buffer = (struct v4l2_buffer) {
@@ -1176,6 +1195,7 @@
mark_index_busy(&inst->free_input_indices, index);
mutex_unlock(&inst->lock);
}
+err_encode_frame:
return rc;
}
diff --git a/drivers/media/platform/msm/wfd/mdp-5-subdev.c b/drivers/media/platform/msm/wfd/mdp-5-subdev.c
index 97204ae..a28cb1a 100644
--- a/drivers/media/platform/msm/wfd/mdp-5-subdev.c
+++ b/drivers/media/platform/msm/wfd/mdp-5-subdev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -208,6 +208,7 @@
return -EINVAL;
}
+ msm_fb_writeback_iommu_ref(inst->mdp, true);
if (inst->secure) {
rc = msm_ion_secure_buffer(mmap->ion_client,
mregion->ion_handle, VIDEO_PIXEL, 0);
@@ -231,12 +232,15 @@
!inst->secure ? "non" : "", rc);
goto iommu_fail;
}
+ msm_fb_writeback_iommu_ref(inst->mdp, false);
return 0;
iommu_fail:
if (inst->secure)
msm_ion_unsecure_buffer(mmap->ion_client, mregion->ion_handle);
secure_fail:
+ msm_fb_writeback_iommu_ref(inst->mdp, false);
+
return rc;
}
@@ -251,10 +255,10 @@
WFD_MSG_ERR("Invalid argument\n");
return -EINVAL;
}
-
inst = mmap->cookie;
mregion = mmap->mregion;
+ msm_fb_writeback_iommu_ref(inst->mdp, true);
domain = msm_fb_get_iommu_domain(inst->mdp,
inst->secure ? MDP_IOMMU_DOMAIN_CP :
MDP_IOMMU_DOMAIN_NS);
@@ -264,6 +268,7 @@
if (inst->secure)
msm_ion_unsecure_buffer(mmap->ion_client, mregion->ion_handle);
+ msm_fb_writeback_iommu_ref(inst->mdp, false);
return 0;
}
diff --git a/drivers/media/platform/msm/wfd/vsg-subdev.c b/drivers/media/platform/msm/wfd/vsg-subdev.c
index 1f827bb..433468e 100644
--- a/drivers/media/platform/msm/wfd/vsg-subdev.c
+++ b/drivers/media/platform/msm/wfd/vsg-subdev.c
@@ -26,12 +26,6 @@
#define TICKS_PER_TIMEOUT 2
-static void vsg_reset_timer(struct hrtimer *timer, ktime_t time)
-{
- hrtimer_forward_now(timer, time);
- hrtimer_restart(timer);
-}
-
static int vsg_release_input_buffer(struct vsg_context *context,
struct vsg_buf_info *buf)
{
@@ -467,7 +461,7 @@
* otherwise, diff between two consecutive frames might
* be less than max_frame_interval (for just one sample)
*/
- vsg_reset_timer(&context->threshold_timer,
+ hrtimer_forward_now(&context->threshold_timer,
ns_to_ktime(context->max_frame_interval));
}
}
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c
index 5b2ec1f..ca28003 100644
--- a/drivers/media/video/v4l2-ioctl.c
+++ b/drivers/media/video/v4l2-ioctl.c
@@ -2348,6 +2348,7 @@
int ret = 0;
switch (cmd) {
+ case VIDIOC_PREPARE_BUF:
case VIDIOC_QUERYBUF:
case VIDIOC_QBUF:
case VIDIOC_DQBUF: {
diff --git a/drivers/mfd/wcd9xxx-core-resource.c b/drivers/mfd/wcd9xxx-core-resource.c
index 1791d72..1d0f894 100644
--- a/drivers/mfd/wcd9xxx-core-resource.c
+++ b/drivers/mfd/wcd9xxx-core-resource.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -55,6 +55,8 @@
int (*codec_read)(struct wcd9xxx_core_resource*, unsigned short),
int (*codec_write)(struct wcd9xxx_core_resource*, unsigned short, u8),
int (*codec_bulk_read) (struct wcd9xxx_core_resource*, unsigned short,
+ int, u8*),
+ int (*codec_bulk_write) (struct wcd9xxx_core_resource*, unsigned short,
int, u8*))
{
mutex_init(&wcd9xxx_core_res->pm_lock);
@@ -68,6 +70,7 @@
wcd9xxx_core_res->codec_reg_read = codec_read;
wcd9xxx_core_res->codec_reg_write = codec_write;
wcd9xxx_core_res->codec_bulk_read = codec_bulk_read;
+ wcd9xxx_core_res->codec_bulk_write = codec_bulk_write;
wcd9xxx_core_res->num_irqs = num_irqs;
wcd9xxx_core_res->num_irq_regs = num_irq_regs;
diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c
index 64053de..5eb359e 100644
--- a/drivers/mfd/wcd9xxx-core.c
+++ b/drivers/mfd/wcd9xxx-core.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -555,7 +555,6 @@
{WCD9XXX_IRQ_EAR_PA_OCPL_FAULT, false},
{WCD9XXX_IRQ_HPH_L_PA_STARTUP, false},
{WCD9XXX_IRQ_HPH_R_PA_STARTUP, false},
- {WCD9320_IRQ_EAR_PA_STARTUP, false},
{WCD9XXX_IRQ_RESERVED_0, false},
{WCD9XXX_IRQ_RESERVED_1, false},
{WCD9XXX_IRQ_MAD_AUDIO, false},
@@ -605,7 +604,7 @@
wcd9xxx->codec_type->num_irqs,
wcd9xxx_num_irq_regs(wcd9xxx),
wcd9xxx_reg_read, wcd9xxx_reg_write,
- wcd9xxx_bulk_read);
+ wcd9xxx_bulk_read, wcd9xxx_bulk_write);
if (wcd9xxx_core_irq_init(&wcd9xxx->core_res))
goto err;
diff --git a/drivers/mfd/wcd9xxx-irq.c b/drivers/mfd/wcd9xxx-irq.c
index 9209f0b..7644984 100644
--- a/drivers/mfd/wcd9xxx-irq.c
+++ b/drivers/mfd/wcd9xxx-irq.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -316,10 +316,12 @@
}
memset(status, 0xff, num_irq_regs);
- wcd9xxx_bulk_write(wcd9xxx_res, WCD9XXX_A_INTR_CLEAR0,
- num_irq_regs, status);
+
+ ret = wcd9xxx_res->codec_bulk_write(wcd9xxx_res,
+ WCD9XXX_A_INTR_CLEAR0,
+ num_irq_regs, status);
if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
- wcd9xxx_reg_write(wcd9xxx_res,
+ wcd9xxx_res->codec_reg_write(wcd9xxx_res,
WCD9XXX_A_INTR_MODE, 0x02);
}
wcd9xxx_unlock_sleep(wcd9xxx_res);
diff --git a/drivers/misc/isa1200.c b/drivers/misc/isa1200.c
index 8090b95..d7fa87b 100644
--- a/drivers/misc/isa1200.c
+++ b/drivers/misc/isa1200.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2009 Samsung Electronics
* Kyungmin Park <kyungmin.park@samsung.com>
- * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -318,7 +318,7 @@
value |= (haptic->pdata->mode_ctrl << 3) |
(haptic->pdata->overdrive_high << 5) |
- (haptic->pdata->overdrive_en << 5) |
+ (haptic->pdata->overdrive_en << 6) |
(haptic->pdata->chip_en << 7);
rc = isa1200_write_reg(client, ISA1200_HCTRL0, value);
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
index 2fe9c72..1839d07 100644
--- a/drivers/misc/qseecom.c
+++ b/drivers/misc/qseecom.c
@@ -1,6 +1,6 @@
/*Qualcomm Secure Execution Environment Communicator (QSEECOM) driver
*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -71,6 +71,9 @@
#define RPMB_SERVICE 0x2000
+#define QSEECOM_SEND_CMD_CRYPTO_TIMEOUT 2000
+#define QSEECOM_LOAD_APP_CRYPTO_TIMEOUT 2000
+
enum qseecom_clk_definitions {
CLK_DFAB = 0,
CLK_SFPB,
@@ -162,6 +165,12 @@
struct qseecom_clk qsee;
struct qseecom_clk ce_drv;
struct cdev cdev;
+
+ bool support_bus_scaling;
+ uint32_t cumulative_mode;
+ enum qseecom_bandwidth_request_mode current_mode;
+ struct timer_list bw_scale_down_timer;
+ struct work_struct bw_inactive_req_ws;
};
struct qseecom_client_handle {
@@ -191,6 +200,7 @@
atomic_t ioctl_count;
bool perf_enabled;
bool fast_load_enabled;
+ enum qseecom_bandwidth_request_mode mode;
};
enum qseecom_set_clear_key_flag {
@@ -328,6 +338,7 @@
return -EFAULT;
data->listener.id = 0;
+ data->type = QSEECOM_LISTENER_SERVICE;
if (!__qseecom_is_svc_unique(data, &rcvd_lstnr)) {
pr_err("Service is not unique and is already registered\n");
data->released = true;
@@ -437,6 +448,157 @@
return ret;
}
+static int __qseecom_set_msm_bus_request(uint32_t mode)
+{
+ int ret = 0;
+ struct qseecom_clk *qclk;
+
+ qclk = &qseecom.qsee;
+ if (qclk->ce_core_src_clk != NULL) {
+ if (mode == INACTIVE) {
+ __qseecom_disable_clk(CLK_QSEE);
+ } else {
+ ret = __qseecom_enable_clk(CLK_QSEE);
+ if (ret)
+ pr_err("CLK enabling failed (%d) MODE (%d)\n",
+ ret, mode);
+ }
+ }
+
+ if ((!ret) && (qseecom.current_mode != mode)) {
+ ret = msm_bus_scale_client_update_request(
+ qseecom.qsee_perf_client, mode);
+ if (ret) {
+ pr_err("Bandwidth req failed(%d) MODE (%d)\n",
+ ret, mode);
+ if (qclk->ce_core_src_clk != NULL) {
+ if (mode == INACTIVE)
+ __qseecom_enable_clk(CLK_QSEE);
+ else
+ __qseecom_disable_clk(CLK_QSEE);
+ }
+ }
+ qseecom.current_mode = mode;
+ }
+ return ret;
+}
+
+static void qseecom_bw_inactive_req_work(struct work_struct *work)
+{
+ mutex_lock(&app_access_lock);
+ mutex_lock(&qsee_bw_mutex);
+ __qseecom_set_msm_bus_request(INACTIVE);
+ pr_debug("current_mode = %d, cumulative_mode = %d\n",
+ qseecom.current_mode, qseecom.cumulative_mode);
+ mutex_unlock(&qsee_bw_mutex);
+ mutex_unlock(&app_access_lock);
+ return;
+}
+
+static void qseecom_scale_bus_bandwidth_timer_callback(unsigned long data)
+{
+ schedule_work(&qseecom.bw_inactive_req_ws);
+ return;
+}
+
+static int qseecom_scale_bus_bandwidth_timer(uint32_t mode, uint32_t duration)
+{
+ int32_t ret = 0;
+ int32_t request_mode = INACTIVE;
+
+ mutex_lock(&qsee_bw_mutex);
+ if (mode == 0) {
+ if (qseecom.cumulative_mode > MEDIUM)
+ request_mode = HIGH;
+ else
+ request_mode = qseecom.cumulative_mode;
+ } else {
+ request_mode = mode;
+ }
+ __qseecom_set_msm_bus_request(request_mode);
+
+ del_timer_sync(&(qseecom.bw_scale_down_timer));
+ qseecom.bw_scale_down_timer.expires = jiffies +
+ msecs_to_jiffies(duration);
+ add_timer(&(qseecom.bw_scale_down_timer));
+
+ mutex_unlock(&qsee_bw_mutex);
+ return ret;
+}
+
+
+static int qseecom_unregister_bus_bandwidth_needs(
+ struct qseecom_dev_handle *data)
+{
+ int32_t ret = 0;
+
+ qseecom.cumulative_mode -= data->mode;
+ data->mode = INACTIVE;
+
+ return ret;
+}
+
+static int __qseecom_register_bus_bandwidth_needs(
+ struct qseecom_dev_handle *data, uint32_t request_mode)
+{
+ int32_t ret = 0;
+
+ if (data->mode == INACTIVE) {
+ qseecom.cumulative_mode += request_mode;
+ data->mode = request_mode;
+ } else {
+ if (data->mode != request_mode) {
+ qseecom.cumulative_mode -= data->mode;
+ qseecom.cumulative_mode += request_mode;
+ data->mode = request_mode;
+ }
+ }
+ return ret;
+}
+
+static int qseecom_scale_bus_bandwidth(struct qseecom_dev_handle *data,
+ void __user *argp)
+{
+ int32_t ret = 0;
+ int32_t req_mode;
+
+ ret = copy_from_user(&req_mode, argp, sizeof(req_mode));
+ if (ret) {
+ pr_err("copy_from_user failed\n");
+ return ret;
+ }
+ if (req_mode > HIGH) {
+ pr_err("Invalid bandwidth mode (%d)\n", req_mode);
+ return ret;
+ }
+ mutex_lock(&qsee_bw_mutex);
+ ret = __qseecom_register_bus_bandwidth_needs(data, req_mode);
+ mutex_unlock(&qsee_bw_mutex);
+
+ return ret;
+}
+
+static void __qseecom_disable_clk_scale_down(struct qseecom_dev_handle *data)
+{
+ if (!qseecom.support_bus_scaling)
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ return;
+}
+
+static int __qseecom_enable_clk_scale_up(struct qseecom_dev_handle *data)
+{
+ int ret = 0;
+ if (qseecom.support_bus_scaling) {
+ qseecom_scale_bus_bandwidth_timer(
+ MEDIUM, QSEECOM_LOAD_APP_CRYPTO_TIMEOUT);
+ } else {
+ ret = qsee_vote_for_clock(data, CLK_SFPB);
+ if (ret)
+ pr_err("Fail vote for clk SFPB ret %d\n", ret);
+ }
+ return ret;
+}
+
static int qseecom_set_client_mem_param(struct qseecom_dev_handle *data,
void __user *argp)
{
@@ -626,7 +788,7 @@
u32 app_id = 0;
struct ion_handle *ihandle; /* Ion handle */
struct qseecom_load_img_req load_img_req;
- int32_t ret;
+ int32_t ret = 0;
ion_phys_addr_t pa = 0;
uint32_t len;
struct qseecom_command_scm_resp resp;
@@ -641,16 +803,16 @@
return -EFAULT;
}
/* Vote for the SFPB clock */
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret)
- pr_warning("Unable to vote for SFPB clock");
+ return ret;
req.qsee_cmd_id = QSEOS_APP_LOOKUP_COMMAND;
load_img_req.img_name[MAX_APP_NAME_SIZE-1] = '\0';
memcpy(req.app_name, load_img_req.img_name, MAX_APP_NAME_SIZE);
ret = __qseecom_check_app_exists(req);
if (ret < 0) {
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
@@ -676,7 +838,7 @@
load_img_req.ifd_data_fd);
if (IS_ERR_OR_NULL(ihandle)) {
pr_err("Ion client could not retrieve the handle\n");
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -ENOMEM;
}
@@ -701,7 +863,7 @@
pr_err("scm_call to load app failed\n");
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EINVAL;
}
@@ -709,7 +871,7 @@
pr_err("scm_call rsp.result is QSEOS_RESULT_FAILURE\n");
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EFAULT;
}
@@ -720,7 +882,7 @@
ret);
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
}
@@ -730,7 +892,7 @@
resp.result);
if (!IS_ERR_OR_NULL(ihandle))
ion_free(qseecom.ion_clnt, ihandle);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EFAULT;
}
@@ -739,7 +901,7 @@
entry = kmalloc(sizeof(*entry), GFP_KERNEL);
if (!entry) {
pr_err("kmalloc failed\n");
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -ENOMEM;
}
entry->app_id = app_id;
@@ -762,10 +924,10 @@
if (copy_to_user(argp, &load_img_req, sizeof(load_img_req))) {
pr_err("copy_to_user failed\n");
kzfree(entry);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EFAULT;
}
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return 0;
}
@@ -953,6 +1115,8 @@
return -EINVAL;
}
+ data->type = QSEECOM_SECURE_SERVICE;
+
switch (req.cmd_id) {
case QSEOS_RPMB_PROVISION_KEY_COMMAND:
case QSEOS_RPMB_ERASE_COMMAND:
@@ -965,15 +1129,25 @@
return -EINVAL;
}
- ret = qsee_vote_for_clock(data, CLK_DFAB);
- if (ret) {
- pr_err("Failed to vote for DFAB clock%d\n", ret);
- return ret;
- }
- ret = qsee_vote_for_clock(data, CLK_SFPB);
- if (ret) {
- pr_err("Failed to vote for SFPB clock%d\n", ret);
- goto exit_reset_dfab_freq;
+ if (qseecom.support_bus_scaling) {
+ qseecom_scale_bus_bandwidth_timer(HIGH,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
+ if (ret) {
+ pr_err("Fail to set bw HIGH%d\n", ret);
+ return ret;
+ }
+ } else {
+ ret = qsee_vote_for_clock(data, CLK_DFAB);
+ if (ret) {
+ pr_err("Failed to vote for DFAB clock%d\n", ret);
+ return ret;
+ }
+ ret = qsee_vote_for_clock(data, CLK_SFPB);
+ if (ret) {
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ pr_err("Failed to vote for SFPB clock%d\n", ret);
+ goto exit;
+ }
}
msm_ion_do_cache_op(qseecom.ion_clnt, data->client.ihandle,
@@ -987,7 +1161,11 @@
ION_IOC_INV_CACHES);
if (ret) {
pr_err("qseecom_scm_call failed with err: %d\n", ret);
- goto exit_reset_sdfab_freq;
+ if (!qseecom.support_bus_scaling) {
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ }
+ goto exit;
}
switch (resp.result) {
@@ -1010,10 +1188,7 @@
ret = -EINVAL;
break;
}
-exit_reset_sdfab_freq:
- qsee_disable_clock_vote(data, CLK_SFPB);
-exit_reset_dfab_freq:
- qsee_disable_clock_vote(data, CLK_DFAB);
+exit:
return ret;
}
@@ -1484,10 +1659,9 @@
/* Populate the remaining parameters */
load_req.qsee_cmd_id = QSEOS_APP_START_COMMAND;
memcpy(load_req.app_name, appname, MAX_APP_NAME_SIZE);
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret) {
kzfree(img_data);
- pr_warning("Unable to vote for SFPB clock");
return -EIO;
}
@@ -1499,7 +1673,7 @@
kzfree(img_data);
if (ret) {
pr_err("scm_call to load failed : ret %d\n", ret);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return -EIO;
}
@@ -1522,7 +1696,7 @@
ret = -EINVAL;
break;
}
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
@@ -1551,9 +1725,8 @@
/* Populate the remaining parameters */
load_req.qsee_cmd_id = QSEOS_LOAD_SERV_IMAGE_COMMAND;
/* Vote for the SFPB clock */
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret) {
- pr_err("Unable to vote for SFPB clock: ret = %d", ret);
kzfree(img_data);
return -EIO;
}
@@ -1589,7 +1762,7 @@
}
}
kzfree(img_data);
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
return ret;
}
@@ -1799,10 +1972,24 @@
pr_err("Unable to find the handle, exiting\n");
else
ret = qseecom_unload_app(data);
- if (data->fast_load_enabled == true)
- qsee_disable_clock_vote(data, CLK_SFPB);
- if (data->perf_enabled == true)
- qsee_disable_clock_vote(data, CLK_DFAB);
+
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ if (data->mode != INACTIVE) {
+ qseecom_unregister_bus_bandwidth_needs(data);
+ if (qseecom.cumulative_mode == INACTIVE) {
+ ret = __qseecom_set_msm_bus_request(INACTIVE);
+ if (ret)
+ pr_err("Fail to scale down bus\n");
+ }
+ }
+ mutex_unlock(&qsee_bw_mutex);
+ } else {
+ if (data->fast_load_enabled == true)
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ if (data->perf_enabled == true)
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ }
if (ret == 0) {
kzfree(data);
kzfree(*handle);
@@ -1833,7 +2020,9 @@
mutex_lock(&app_access_lock);
atomic_inc(&data->ioctl_count);
-
+ if (qseecom.support_bus_scaling)
+ qseecom_scale_bus_bandwidth_timer(INACTIVE,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
ret = __qseecom_send_cmd(data, &req);
atomic_dec(&data->ioctl_count);
@@ -1856,17 +2045,30 @@
return -EINVAL;
}
if (high) {
- ret = qsee_vote_for_clock(handle->dev, CLK_DFAB);
- if (ret)
- pr_err("Failed to vote for DFAB clock%d\n", ret);
- ret = qsee_vote_for_clock(handle->dev, CLK_SFPB);
- if (ret) {
- pr_err("Failed to vote for SFPB clock%d\n", ret);
- qsee_disable_clock_vote(handle->dev, CLK_DFAB);
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ __qseecom_register_bus_bandwidth_needs(handle->dev,
+ HIGH);
+ mutex_unlock(&qsee_bw_mutex);
+ if (ret)
+ pr_err("Failed to scale bus (med) %d\n", ret);
+ } else {
+ ret = qsee_vote_for_clock(handle->dev, CLK_DFAB);
+ if (ret)
+ pr_err("Failed to vote for DFAB clock%d\n",
+ ret);
+ ret = qsee_vote_for_clock(handle->dev, CLK_SFPB);
+ if (ret) {
+ pr_err("Failed to vote for SFPB clock%d\n",
+ ret);
+ qsee_disable_clock_vote(handle->dev, CLK_DFAB);
+ }
}
} else {
- qsee_disable_clock_vote(handle->dev, CLK_DFAB);
- qsee_disable_clock_vote(handle->dev, CLK_SFPB);
+ if (!qseecom.support_bus_scaling) {
+ qsee_disable_clock_vote(handle->dev, CLK_DFAB);
+ qsee_disable_clock_vote(handle->dev, CLK_SFPB);
+ }
}
return ret;
}
@@ -2231,9 +2433,8 @@
}
/* Vote for the SFPB clock */
- ret = qsee_vote_for_clock(data, CLK_SFPB);
+ ret = __qseecom_enable_clk_scale_up(data);
if (ret) {
- pr_err("Unable to vote for SFPB clock: ret = %d", ret);
ret = -EIO;
goto exit_cpu_restore;
}
@@ -2271,7 +2472,7 @@
}
exit_disable_clock:
- qsee_disable_clock_vote(data, CLK_SFPB);
+ __qseecom_disable_clk_scale_down(data);
exit_cpu_restore:
/* Restore the CPU mask */
mask = CPU_MASK_ALL;
@@ -2446,7 +2647,7 @@
if (ret) {
pr_err("scm call to generate key failed : %d\n", ret);
__qseecom_disable_clk(CLK_QSEE);
- return ret;
+ return -EFAULT;
}
switch (resp.result) {
@@ -2497,7 +2698,7 @@
if (ret) {
pr_err("scm call to delete key failed : %d\n", ret);
__qseecom_disable_clk(CLK_QSEE);
- return ret;
+ return -EFAULT;
}
switch (resp.result) {
@@ -2505,9 +2706,18 @@
break;
case QSEOS_RESULT_INCOMPLETE:
ret = __qseecom_process_incomplete_cmd(data, &resp);
- if (ret)
+ if (ret) {
pr_err("process_incomplete_cmd FAILED, resp.result %d\n",
resp.result);
+ if (resp.result == QSEOS_RESULT_FAIL_MAX_ATTEMPT) {
+ pr_debug("Max attempts to input password reached.\n");
+ ret = -ERANGE;
+ }
+ }
+ break;
+ case QSEOS_RESULT_FAIL_MAX_ATTEMPT:
+ pr_debug("Max attempts to input password reached.\n");
+ ret = -ERANGE;
break;
case QSEOS_RESULT_FAILURE:
default:
@@ -2545,7 +2755,7 @@
__qseecom_disable_clk(CLK_QSEE);
if (qseecom.qsee.instance != qseecom.ce_drv.instance)
__qseecom_disable_clk(CLK_CE_DRV);
- return ret;
+ return -EFAULT;
}
switch (resp.result) {
@@ -2553,9 +2763,18 @@
break;
case QSEOS_RESULT_INCOMPLETE:
ret = __qseecom_process_incomplete_cmd(data, &resp);
- if (ret)
+ if (ret) {
pr_err("process_incomplete_cmd FAILED, resp.result %d\n",
resp.result);
+ if (resp.result == QSEOS_RESULT_FAIL_MAX_ATTEMPT) {
+ pr_debug("Max attempts to input password reached.\n");
+ ret = -ERANGE;
+ }
+ }
+ break;
+ case QSEOS_RESULT_FAIL_MAX_ATTEMPT:
+ pr_debug("Max attempts to input password reached.\n");
+ ret = -ERANGE;
break;
case QSEOS_RESULT_FAILURE:
default:
@@ -2595,7 +2814,7 @@
__qseecom_disable_clk(CLK_QSEE);
if (qseecom.qsee.instance != qseecom.ce_drv.instance)
__qseecom_disable_clk(CLK_CE_DRV);
- return ret;
+ return -EFAULT;
}
switch (resp.result) {
@@ -2661,7 +2880,7 @@
&generate_key_ireq);
if (ret) {
pr_err("Failed to generate key on storage: %d\n", ret);
- return -EFAULT;
+ return ret;
}
set_key_ireq.qsee_command_id = QSEOS_SET_KEY;
@@ -2684,7 +2903,7 @@
if (ret) {
pr_err("Failed to create key: pipe %d, ce %d: %d\n",
pipe, ce_hw, ret);
- return -EFAULT;
+ return ret;
}
return ret;
@@ -2791,7 +3010,7 @@
&ireq);
if (ret) {
pr_err("Failed to update key info: %d\n", ret);
- return -EFAULT;
+ return ret;
}
return ret;
@@ -2914,6 +3133,7 @@
break;
}
case QSEECOM_IOCTL_SEND_CMD_REQ: {
+ pr_debug("qseecom.current_mode %d\n", qseecom.current_mode);
if ((data->client.app_id == 0) ||
(data->type != QSEECOM_CLIENT_APP)) {
pr_err("send cmd req: invalid handle (%d) app_id(%d)\n",
@@ -2923,6 +3143,9 @@
}
/* Only one client allowed here at a time */
mutex_lock(&app_access_lock);
+ if (qseecom.support_bus_scaling)
+ qseecom_scale_bus_bandwidth_timer(INACTIVE,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
atomic_inc(&data->ioctl_count);
ret = qseecom_send_cmd(data, argp);
atomic_dec(&data->ioctl_count);
@@ -2933,6 +3156,7 @@
break;
}
case QSEECOM_IOCTL_SEND_MODFD_CMD_REQ: {
+ pr_debug("qseecom.current_mode %d\n", qseecom.current_mode);
if ((data->client.app_id == 0) ||
(data->type != QSEECOM_CLIENT_APP)) {
pr_err("send mdfd cmd: invalid handle (%d) appid(%d)\n",
@@ -2942,6 +3166,9 @@
}
/* Only one client allowed here at a time */
mutex_lock(&app_access_lock);
+ if (qseecom.support_bus_scaling)
+ qseecom_scale_bus_bandwidth_timer(INACTIVE,
+ QSEECOM_SEND_CMD_CRYPTO_TIMEOUT);
atomic_inc(&data->ioctl_count);
ret = qseecom_send_modfd_cmd(data, argp);
atomic_dec(&data->ioctl_count);
@@ -3068,12 +3295,18 @@
break;
}
atomic_inc(&data->ioctl_count);
- ret = qsee_vote_for_clock(data, CLK_DFAB);
- if (ret)
- pr_err("Failed to vote for DFAB clock%d\n", ret);
- ret = qsee_vote_for_clock(data, CLK_SFPB);
- if (ret)
- pr_err("Failed to vote for SFPB clock%d\n", ret);
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ __qseecom_register_bus_bandwidth_needs(data, HIGH);
+ mutex_unlock(&qsee_bw_mutex);
+ } else {
+ ret = qsee_vote_for_clock(data, CLK_DFAB);
+ if (ret)
+ pr_err("Fail to vote for DFAB clock%d\n", ret);
+ ret = qsee_vote_for_clock(data, CLK_SFPB);
+ if (ret)
+ pr_err("Fail to vote for SFPB clock%d\n", ret);
+ }
atomic_dec(&data->ioctl_count);
break;
}
@@ -3093,8 +3326,24 @@
break;
}
atomic_inc(&data->ioctl_count);
+ if (!qseecom.support_bus_scaling) {
qsee_disable_clock_vote(data, CLK_DFAB);
qsee_disable_clock_vote(data, CLK_SFPB);
+ }
+ atomic_dec(&data->ioctl_count);
+ break;
+ }
+
+ case QSEECOM_IOCTL_SET_BUS_SCALING_REQ: {
+ if ((data->client.app_id == 0) ||
+ (data->type != QSEECOM_CLIENT_APP)) {
+ pr_err("set bus scale: invalid handle (%d) appid(%d)\n",
+ data->type, data->client.app_id);
+ ret = -EINVAL;
+ break;
+ }
+ atomic_inc(&data->ioctl_count);
+ ret = qseecom_scale_bus_bandwidth(data, argp);
atomic_dec(&data->ioctl_count);
break;
}
@@ -3292,6 +3541,7 @@
data->abort = 0;
data->type = QSEECOM_GENERIC;
data->released = false;
+ data->mode = INACTIVE;
init_waitqueue_head(&data->abort_wq);
atomic_set(&data->ioctl_count, 0);
@@ -3304,8 +3554,8 @@
int ret = 0;
if (data->released == false) {
- pr_warn("data: released = false, type = %d, data = 0x%x\n",
- data->type, (u32)data);
+ pr_warn("data: released=false, type=%d, mode=%d, data=0x%x\n",
+ data->type, data->mode, (u32)data);
switch (data->type) {
case QSEECOM_LISTENER_SERVICE:
ret = qseecom_unregister_listener(data);
@@ -3328,11 +3578,23 @@
}
}
- if (data->fast_load_enabled == true)
- qsee_disable_clock_vote(data, CLK_SFPB);
- if (data->perf_enabled == true)
- qsee_disable_clock_vote(data, CLK_DFAB);
-
+ if (qseecom.support_bus_scaling) {
+ mutex_lock(&qsee_bw_mutex);
+ if (data->mode != INACTIVE) {
+ qseecom_unregister_bus_bandwidth_needs(data);
+ if (qseecom.cumulative_mode == INACTIVE) {
+ ret = __qseecom_set_msm_bus_request(INACTIVE);
+ if (ret)
+ pr_err("Fail to scale down bus\n");
+ }
+ }
+ mutex_unlock(&qsee_bw_mutex);
+ } else {
+ if (data->fast_load_enabled == true)
+ qsee_disable_clock_vote(data, CLK_SFPB);
+ if (data->perf_enabled == true)
+ qsee_disable_clock_vote(data, CLK_DFAB);
+ }
kfree(data);
return ret;
@@ -3475,6 +3737,10 @@
qseecom.qsee.ce_core_src_clk = NULL;
qseecom.qsee.ce_bus_clk = NULL;
+ qseecom.cumulative_mode = 0;
+ qseecom.current_mode = INACTIVE;
+ qseecom.support_bus_scaling = false;
+
qseecom.ce_drv.ce_core_clk = NULL;
qseecom.ce_drv.ce_clk = NULL;
qseecom.ce_drv.ce_core_src_clk = NULL;
@@ -3554,7 +3820,11 @@
/* register client for bus scaling */
if (pdev->dev.of_node) {
-
+ qseecom.support_bus_scaling =
+ of_property_read_bool((&pdev->dev)->of_node,
+ "qcom,support-bus-scaling");
+ pr_warn("support_bus_scaling=0x%x",
+ qseecom.support_bus_scaling);
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,disk-encrypt-pipe-pair",
&qseecom.ce_info.disk_encrypt_pipe)) {
@@ -3647,7 +3917,13 @@
qseecom_platform_support = (struct msm_bus_scale_pdata *)
pdev->dev.platform_data;
}
-
+ if (qseecom.support_bus_scaling) {
+ init_timer(&(qseecom.bw_scale_down_timer));
+ INIT_WORK(&qseecom.bw_inactive_req_ws,
+ qseecom_bw_inactive_req_work);
+ qseecom.bw_scale_down_timer.function =
+ qseecom_scale_bus_bandwidth_timer_callback;
+ }
qseecom.qsee_perf_client = msm_bus_scale_register_client(
qseecom_platform_support);
@@ -3713,6 +3989,11 @@
if (pdev->dev.platform_data != NULL)
msm_bus_scale_unregister_client(qseecom.qsee_perf_client);
+ if (qseecom.support_bus_scaling) {
+ cancel_work_sync(&qseecom.bw_inactive_req_ws);
+ del_timer_sync(&qseecom.bw_scale_down_timer);
+ }
+
/* register client for bus scaling */
if (pdev->dev.of_node) {
__qseecom_deinit_clk(CLK_QSEE);
@@ -3733,6 +4014,83 @@
return ret;
}
+static int qseecom_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ int ret = 0;
+ struct qseecom_clk *qclk;
+ qclk = &qseecom.qsee;
+
+ if (qseecom.cumulative_mode != INACTIVE) {
+ ret = __qseecom_set_msm_bus_request(INACTIVE);
+ if (ret)
+ pr_err("Fail to scale down bus\n");
+ }
+ mutex_lock(&clk_access_lock);
+ if (qclk->clk_access_cnt) {
+ if (qclk->ce_clk != NULL)
+ clk_disable_unprepare(qclk->ce_clk);
+ if (qclk->ce_core_clk != NULL)
+ clk_disable_unprepare(qclk->ce_core_clk);
+ if (qclk->ce_bus_clk != NULL)
+ clk_disable_unprepare(qclk->ce_bus_clk);
+ }
+ mutex_unlock(&clk_access_lock);
+ return 0;
+}
+
+static int qseecom_resume(struct platform_device *pdev)
+{
+ int mode = 0;
+ int ret = 0;
+ struct qseecom_clk *qclk;
+ qclk = &qseecom.qsee;
+
+ if (qseecom.cumulative_mode >= HIGH)
+ mode = HIGH;
+ else
+ mode = qseecom.cumulative_mode;
+
+ if (qseecom.cumulative_mode != INACTIVE) {
+ ret = __qseecom_set_msm_bus_request(mode);
+ if (ret)
+ pr_err("Fail to scale down bus\n");
+ }
+
+ mutex_lock(&clk_access_lock);
+ if (qclk->clk_access_cnt) {
+
+ ret = clk_prepare_enable(qclk->ce_core_clk);
+ if (ret) {
+ pr_err("Unable to enable/prepare CE core clk\n");
+ qclk->clk_access_cnt = 0;
+ goto err;
+ }
+
+ ret = clk_prepare_enable(qclk->ce_clk);
+ if (ret) {
+ pr_err("Unable to enable/prepare CE iface clk\n");
+ qclk->clk_access_cnt = 0;
+ goto ce_clk_err;
+ }
+
+ ret = clk_prepare_enable(qclk->ce_bus_clk);
+ if (ret) {
+ pr_err("Unable to enable/prepare CE bus clk\n");
+ qclk->clk_access_cnt = 0;
+ goto ce_bus_clk_err;
+ }
+ }
+ mutex_unlock(&clk_access_lock);
+ return 0;
+
+ce_bus_clk_err:
+ clk_disable_unprepare(qclk->ce_clk);
+ce_clk_err:
+ clk_disable_unprepare(qclk->ce_core_clk);
+err:
+ mutex_unlock(&clk_access_lock);
+ return -EIO;
+}
static struct of_device_id qseecom_match[] = {
{
.compatible = "qcom,qseecom",
@@ -3743,6 +4101,8 @@
static struct platform_driver qseecom_plat_driver = {
.probe = qseecom_probe,
.remove = qseecom_remove,
+ .suspend = qseecom_suspend,
+ .resume = qseecom_resume,
.driver = {
.name = "qseecom",
.owner = THIS_MODULE,
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index f4493a1..9c6bef6 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -198,9 +198,13 @@
{
int ret;
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
- struct mmc_card *card = md->queue.card;
+ struct mmc_card *card;
int locked = 0;
+ if (!md)
+ return -EINVAL;
+
+ card = md->queue.card;
if (card->ext_csd.boot_ro_lock & EXT_CSD_BOOT_WP_B_PERM_WP_EN)
locked = 2;
else if (card->ext_csd.boot_ro_lock & EXT_CSD_BOOT_WP_B_PWR_WP_EN)
@@ -226,6 +230,8 @@
return count;
md = mmc_blk_get(dev_to_disk(dev));
+ if (!md)
+ return -EINVAL;
card = md->queue.card;
mmc_rpm_hold(card->host, &card->dev);
@@ -265,6 +271,9 @@
int ret;
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
+ if (!md)
+ return -EINVAL;
+
ret = snprintf(buf, PAGE_SIZE, "%d",
get_disk_ro(dev_to_disk(dev)) ^
md->read_only);
@@ -279,6 +288,10 @@
char *end;
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
unsigned long set = simple_strtoul(buf, &end, 0);
+
+ if (!md)
+ return -EINVAL;
+
if (end == buf) {
ret = -EINVAL;
goto out;
@@ -299,6 +312,8 @@
int num_wr_reqs_to_start_packing;
int ret;
+ if (!md)
+ return -EINVAL;
num_wr_reqs_to_start_packing = md->queue.num_wr_reqs_to_start_packing;
ret = snprintf(buf, PAGE_SIZE, "%d\n", num_wr_reqs_to_start_packing);
@@ -314,9 +329,13 @@
{
int value;
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
- struct mmc_card *card = md->queue.card;
+ struct mmc_card *card;
int ret = count;
+ if (!md)
+ return -EINVAL;
+
+ card = md->queue.card;
if (!card) {
ret = -EINVAL;
goto exit;
@@ -348,9 +367,13 @@
struct device_attribute *attr, char *buf)
{
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
- struct mmc_card *card = md->queue.card;
+ struct mmc_card *card;
int ret;
+ if (!md)
+ return -EINVAL;
+
+ card = md->queue.card;
if (!card)
ret = -EINVAL;
else
@@ -368,10 +391,14 @@
{
int value;
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
- struct mmc_card *card = md->queue.card;
+ struct mmc_card *card;
unsigned int card_size;
int ret = count;
+ if (!md)
+ return -EINVAL;
+
+ card = md->queue.card;
if (!card) {
ret = -EINVAL;
goto exit;
@@ -409,6 +436,8 @@
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
int ret;
+ if (!md)
+ return -EINVAL;
ret = snprintf(buf, PAGE_SIZE, "%d\n", md->queue.no_pack_for_random);
mmc_blk_put(md);
@@ -422,9 +451,13 @@
{
int value;
struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
- struct mmc_card *card = md->queue.card;
+ struct mmc_card *card;
int ret = count;
+ if (!md)
+ return -EINVAL;
+
+ card = md->queue.card;
if (!card) {
ret = -EINVAL;
goto exit;
@@ -772,7 +805,7 @@
/* make sure this is a rpmb partition */
if ((!md) || (!(md->area_type & MMC_BLK_DATA_AREA_RPMB))) {
err = -EINVAL;
- goto cmd_done;
+ return err;
}
idata = mmc_blk_ioctl_rpmb_copy_from_user(ic_ptr);
@@ -2670,7 +2703,8 @@
*/
if ((!req && !(mq->flags & MMC_QUEUE_NEW_REQUEST)) ||
((mq->flags & MMC_QUEUE_URGENT_REQUEST) &&
- !(mq->mqrq_cur->req->cmd_flags & REQ_URGENT))) {
+ !(mq->mqrq_cur->req->cmd_flags &
+ MMC_REQ_NOREINSERT_MASK))) {
if (mmc_card_need_bkops(card))
mmc_start_bkops(card, false);
/* release host only when there are no more requests */
@@ -3076,6 +3110,9 @@
MMC_FIXUP(CID_NAME_ANY, CID_MANFID_HYNIX, CID_OEMID_ANY, add_quirk_mmc,
MMC_QUIRK_BROKEN_DATA_TIMEOUT),
+ /* Disable cache for this cards */
+ MMC_FIXUP("H8G2d", CID_MANFID_HYNIX, CID_OEMID_ANY, add_quirk_mmc,
+ MMC_QUIRK_CACHE_DISABLE),
END_FIXUP
};
@@ -3270,4 +3307,3 @@
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Multimedia Card (MMC) block device driver");
-
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index 8986829..fa3dcdc 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -79,7 +79,8 @@
continue; /* fetch again */
} else if ((mq->flags & MMC_QUEUE_URGENT_REQUEST) &&
(mq->mqrq_cur->req &&
- !(mq->mqrq_cur->req->cmd_flags & REQ_URGENT))) {
+ !(mq->mqrq_cur->req->cmd_flags &
+ MMC_REQ_NOREINSERT_MASK))) {
/*
* clean current request when urgent request
* processing in progress and current request is
@@ -348,22 +349,43 @@
#endif
if (!mqrq_cur->bounce_buf && !mqrq_prev->bounce_buf) {
+ unsigned int max_segs = host->max_segs;
+
blk_queue_bounce_limit(mq->queue, limit);
blk_queue_max_hw_sectors(mq->queue,
min(host->max_blk_count, host->max_req_size / 512));
- blk_queue_max_segments(mq->queue, host->max_segs);
blk_queue_max_segment_size(mq->queue, host->max_seg_size);
+retry:
+ blk_queue_max_segments(mq->queue, host->max_segs);
mqrq_cur->sg = mmc_alloc_sg(host->max_segs, &ret);
- if (ret)
+ if (ret == -ENOMEM)
+ goto cur_sg_alloc_failed;
+ else if (ret)
goto cleanup_queue;
-
mqrq_prev->sg = mmc_alloc_sg(host->max_segs, &ret);
- if (ret)
+ if (ret == -ENOMEM)
+ goto prev_sg_alloc_failed;
+ else if (ret)
goto cleanup_queue;
+
+ goto success;
+
+prev_sg_alloc_failed:
+ kfree(mqrq_cur->sg);
+ mqrq_cur->sg = NULL;
+cur_sg_alloc_failed:
+ host->max_segs /= 2;
+ if (host->max_segs) {
+ goto retry;
+ } else {
+ host->max_segs = max_segs;
+ goto cleanup_queue;
+ }
}
+success:
sema_init(&mq->thread_sem, 1);
mq->thread = kthread_run(mmc_queue_thread, mq, "mmcqd/%d%s",
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 94a13f9..c496077 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -895,9 +895,8 @@
mmc_post_req(host, host->areq->mrq, 0);
host->areq = NULL;
if (areq) {
- if (!(areq->cmd_flags & (REQ_URGENT
- | REQ_FUA
- | REQ_FLUSH))) {
+ if (!(areq->cmd_flags &
+ MMC_REQ_NOREINSERT_MASK)) {
areq->reinsert_req(areq);
mmc_post_req(host, areq->mrq, 0);
} else {
@@ -3357,7 +3356,8 @@
struct mmc_host *host = card->host;
int err = 0, rc;
- if (!(host->caps2 & MMC_CAP2_CACHE_CTRL))
+ if (!(host->caps2 & MMC_CAP2_CACHE_CTRL) ||
+ (card->quirks & MMC_QUIRK_CACHE_DISABLE))
return err;
if (mmc_card_mmc(card) &&
@@ -3396,7 +3396,8 @@
int err = 0, rc;
if (!(host->caps2 & MMC_CAP2_CACHE_CTRL) ||
- mmc_card_is_removable(host))
+ mmc_card_is_removable(host) ||
+ (card->quirks & MMC_QUIRK_CACHE_DISABLE))
return err;
if (card && mmc_card_mmc(card) &&
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index b295bb8..885d0d2 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1557,7 +1557,8 @@
* If HPI is not supported then cache shouldn't be enabled.
*/
if ((host->caps2 & MMC_CAP2_CACHE_CTRL) &&
- (card->ext_csd.cache_size > 0) && card->ext_csd.hpi_en) {
+ (card->ext_csd.cache_size > 0) && card->ext_csd.hpi_en &&
+ ((card->quirks & MMC_QUIRK_CACHE_DISABLE) == 0)) {
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
EXT_CSD_CACHE_CTRL, 1,
card->ext_csd.generic_cmd6_time);
@@ -1577,6 +1578,11 @@
card->ext_csd.cache_ctrl = 1;
}
}
+ if (card->quirks & MMC_QUIRK_CACHE_DISABLE) {
+ pr_warn("%s: This is Hynix card, cache disabled!\n",
+ mmc_hostname(card->host));
+ card->ext_csd.cache_ctrl = 0;
+ }
if ((host->caps2 & MMC_CAP2_PACKED_WR &&
card->ext_csd.max_packed_writes > 0) ||
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 3648d88..d4d7c18 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -851,6 +851,7 @@
((*rocr & 0x41000000) == 0x41000000)) {
err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180, true);
if (err) {
+ mmc_power_cycle(host);
ocr &= ~SD_OCR_S18R;
goto try_again;
}
diff --git a/drivers/net/ethernet/msm/msm_rmnet_bam.c b/drivers/net/ethernet/msm/msm_rmnet_bam.c
index 9f06258..7ec317a 100644
--- a/drivers/net/ethernet/msm/msm_rmnet_bam.c
+++ b/drivers/net/ethernet/msm/msm_rmnet_bam.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -341,6 +341,8 @@
if (bam_ret != 0 && bam_ret != -EAGAIN && bam_ret != -EFAULT) {
pr_err("[%s] %s: write returned error %d",
dev->name, __func__, bam_ret);
+ if (RMNET_IS_MODE_QOS(opmode))
+ skb_pull(skb, sizeof(struct QMI_QOS_HDR_S));
return -EPERM;
}
diff --git a/drivers/net/usb/rmnet_usb_ctrl.c b/drivers/net/usb/rmnet_usb_ctrl.c
index d1f3748..9682b48 100644
--- a/drivers/net/usb/rmnet_usb_ctrl.c
+++ b/drivers/net/usb/rmnet_usb_ctrl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,10 +38,6 @@
#define ACM_CTRL_RI BIT(2)
#define ACM_CTRL_CD BIT(3)
-/* polling interval for Interrupt ep */
-#define HS_INTERVAL 7
-#define FS_LS_INTERVAL 3
-
/*echo modem_wait > /sys/class/hsicctl/hsicctlx/modem_wait*/
static ssize_t modem_wait_store(struct device *d, struct device_attribute *attr,
const char *buf, size_t n)
@@ -941,9 +937,7 @@
dev->intf->cur_altsetting->desc.bInterfaceNumber;
dev->in_ctlreq->wLength = cpu_to_le16(DEFAULT_READ_URB_LENGTH);
- interval = max((int)int_in->desc.bInterval,
- (udev->speed == USB_SPEED_HIGH) ? HS_INTERVAL
- : FS_LS_INTERVAL);
+ interval = int_in->desc.bInterval;
usb_fill_int_urb(dev->inturb, udev,
dev->int_pipe,
diff --git a/drivers/net/wireless/wcnss/wcnss_wlan.c b/drivers/net/wireless/wcnss/wcnss_wlan.c
index d75c8a3..38c70a3 100644
--- a/drivers/net/wireless/wcnss/wcnss_wlan.c
+++ b/drivers/net/wireless/wcnss/wcnss_wlan.c
@@ -750,8 +750,29 @@
#ifdef CONFIG_WCNSS_REGISTER_DUMP_ON_BITE
void wcnss_log_debug_regs_on_bite(void)
{
- if (wcnss_hardware_type() == WCNSS_PRONTO_HW)
- wcnss_pronto_log_debug_regs();
+ struct platform_device *pdev = wcnss_get_platform_device();
+ struct clk *measure;
+ struct clk *wcnss_debug_mux;
+ unsigned long clk_rate;
+
+ if (wcnss_hardware_type() != WCNSS_PRONTO_HW)
+ return;
+
+ measure = clk_get(&pdev->dev, "measure");
+ wcnss_debug_mux = clk_get(&pdev->dev, "wcnss_debug");
+
+ if (!IS_ERR(measure) && !IS_ERR(wcnss_debug_mux)) {
+ if (clk_set_parent(measure, wcnss_debug_mux))
+ return;
+
+ clk_rate = clk_get_rate(measure);
+ pr_debug("wcnss: clock frequency is: %luHz\n", clk_rate);
+
+ if (clk_rate)
+ wcnss_pronto_log_debug_regs();
+ else
+ pr_err("clock frequency is zero, cannot access PMU or other registers\n");
+ }
}
#endif
diff --git a/drivers/nfc/nfc-nci.c b/drivers/nfc/nfc-nci.c
index b808f97..c6192ed 100644
--- a/drivers/nfc/nfc-nci.c
+++ b/drivers/nfc/nfc-nci.c
@@ -30,8 +30,10 @@
struct qca199x_platform_data {
unsigned int irq_gpio;
+ unsigned int irq_gpio_clk_req;
+ unsigned int clk_req_irq_num;
unsigned int dis_gpio;
- unsigned int ven_gpio;
+ unsigned int clkreq_gpio;
unsigned int reg;
const char *clk_src_name;
unsigned int clk_src_gpio;
@@ -52,32 +54,48 @@
#define MAX_PACKET_SIZE (PACKET_HEADER_SIZE_NCI + 255)
#define MAX_QCA_REG (116)
/* will timeout in approx. 100ms as 10us steps */
+#define NFC_RF_CLK_FREQ (19200000)
#define NTF_TIMEOUT (10000)
#define CORE_RESET_RSP_GID (0x60)
#define CORE_RESET_OID (0x00)
#define CORE_RST_NTF_LENGTH (0x02)
+static void clk_req_update(struct work_struct *work);
struct qca199x_dev {
wait_queue_head_t read_wq;
- struct mutex read_mutex;
- struct i2c_client *client;
- struct miscdevice qca199x_device;
- unsigned int irq_gpio;
- unsigned int dis_gpio;
- unsigned int ven_gpio;
- bool irq_enabled;
- bool sent_first_nci_write;
- spinlock_t irq_enabled_lock;
- unsigned int count_irq;
+ struct mutex read_mutex;
+ struct i2c_client *client;
+ struct miscdevice qca199x_device;
+ /* NFC_IRQ new NCI data available */
+ unsigned int irq_gpio;
+ /* CLK_REQ IRQ to signal the state has changed */
+ unsigned int irq_gpio_clk_req;
+ /* Actual IRQ no. assigned to CLK_REQ */
+ unsigned int clk_req_irq_num;
+ unsigned int dis_gpio;
+ unsigned int clkreq_gpio;
+ /* NFC_IRQ state */
+ bool irq_enabled;
+ bool sent_first_nci_write;
+ spinlock_t irq_enabled_lock;
+ unsigned int count_irq;
+ /* CLK_REQ IRQ state */
+ bool irq_enabled_clk_req;
+ spinlock_t irq_enabled_lock_clk_req;
+ unsigned int count_irq_clk_req;
enum nfcc_state state;
- unsigned int clk_src_gpio;
- const char *clk_src_name;
- struct clk *s_clk;
- bool clk_run;
+ /* CLK control */
+ unsigned int clk_src_gpio;
+ const char *clk_src_name;
+ struct clk *s_clk;
+ bool clk_run;
+ struct work_struct msm_clock_controll_work;
+ struct workqueue_struct *my_wq;
};
static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len);
+static int nfcc_hw_check(struct i2c_client *client, unsigned short curr_addr);
static int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr);
static int qca199x_clock_select(struct qca199x_dev *qca199x_dev);
static int qca199x_clock_deselect(struct qca199x_dev *qca199x_dev);
@@ -92,9 +110,10 @@
/*
* FTM-RAW-I2C RD/WR MODE
*/
-static struct devicemode device_mode;
-static int ftm_raw_write_mode;
-static int ftm_werr_code;
+static struct devicemode device_mode;
+static int ftm_raw_write_mode;
+static int ftm_werr_code;
+
static void qca199x_init_stat(struct qca199x_dev *qca199x_dev)
{
@@ -156,6 +175,95 @@
return mask;
}
+/* Handlers for CLK_REQ */
+static void qca199x_disable_irq_clk_req(struct qca199x_dev *qca199x_dev)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock_clk_req, flags);
+ if (qca199x_dev->irq_enabled_clk_req) {
+ disable_irq_nosync(qca199x_dev->clk_req_irq_num);
+ qca199x_dev->irq_enabled_clk_req = false;
+ }
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock_clk_req, flags);
+}
+
+
+static void qca199x_enable_irq_clk_req(struct qca199x_dev *qca199x_dev)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock_clk_req, flags);
+ if (!qca199x_dev->irq_enabled_clk_req) {
+ qca199x_dev->irq_enabled_clk_req = true;
+ enable_irq(qca199x_dev->clk_req_irq_num);
+ }
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock_clk_req, flags);
+}
+
+
+static irqreturn_t qca199x_dev_irq_handler_clk_req(int irq, void *dev_id)
+{
+ struct qca199x_dev *qca199x_dev = dev_id;
+ unsigned long flags;
+
+ spin_lock_irqsave(&qca199x_dev->irq_enabled_lock_clk_req, flags);
+ qca199x_dev->count_irq_clk_req++;
+ spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock_clk_req, flags);
+
+ queue_work(qca199x_dev->my_wq, &qca199x_dev->msm_clock_controll_work);
+
+ return IRQ_HANDLED;
+}
+
+
+static struct gpiomux_setting nfc_clk_on = {
+ .func = GPIOMUX_FUNC_2,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+static struct gpiomux_setting nfc_clk_on_suspend = {
+ .func = GPIOMUX_FUNC_2,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+static struct gpiomux_setting nfc_clk_off = {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+
+static void clk_req_update(struct work_struct *work)
+{
+ struct i2c_client *client;
+ struct qca199x_dev *qca199x_dev;
+ int gpio_clk_req_level = 0;
+
+ qca199x_dev = container_of(work, struct qca199x_dev,
+ msm_clock_controll_work);
+ client = qca199x_dev->client;
+
+ /* Read status level of CLK_REQ from NFC Controller, QCA199_x */
+ gpio_clk_req_level = gpio_get_value(qca199x_dev->irq_gpio_clk_req);
+ if (gpio_clk_req_level == 1) {
+ if (qca199x_dev->clk_run == false) {
+ msm_gpiomux_write(qca199x_dev->clk_src_gpio,
+ GPIOMUX_ACTIVE, &nfc_clk_on, NULL);
+ msm_gpiomux_write(qca199x_dev->clk_src_gpio,
+ GPIOMUX_SUSPENDED, &nfc_clk_on_suspend, NULL);
+ qca199x_dev->clk_run = true;
+ }
+ } else{
+ if (qca199x_dev->clk_run == true) {
+ msm_gpiomux_write(qca199x_dev->clk_src_gpio,
+ GPIOMUX_ACTIVE, &nfc_clk_off, NULL);
+ msm_gpiomux_write(qca199x_dev->clk_src_gpio,
+ GPIOMUX_SUSPENDED, &nfc_clk_off, NULL);
+ qca199x_dev->clk_run = false;
+ }
+ }
+}
+
/*
* ONLY for FTM-RAW-I2C Mode
* Required to instigate a read, which comes from DT layer. This means we need
@@ -396,7 +504,14 @@
filp->private_data = qca199x_dev;
qca199x_init_stat(qca199x_dev);
+ /* Enable interrupts from NFCC NFC_INT new NCI data available */
qca199x_enable_irq(qca199x_dev);
+
+ if ((!strcmp(qca199x_dev->clk_src_name, "GPCLK")) ||
+ (!strcmp(qca199x_dev->clk_src_name, "GPCLK2"))) {
+ /* Enable interrupts from NFCC CLK_REQ */
+ qca199x_enable_irq_clk_req(qca199x_dev);
+ }
dev_dbg(&qca199x_dev->client->dev,
"%d,%d\n", imajor(inode), iminor(inode));
return ret;
@@ -759,6 +874,33 @@
return r;
}
+/* Check for availability of qca199x_ NFC controller hardware */
+static int nfcc_hw_check(struct i2c_client *client, unsigned short curr_addr)
+{
+ int r = 0;
+ unsigned char buf = 0;
+
+ client->addr = curr_addr;
+ /* Set-up Addr 0. No data written */
+ r = i2c_master_send(client, &buf, 1);
+ if (r < 0)
+ goto err_presence_check;
+ buf = 0;
+ /* Read back from Addr 0 */
+ r = i2c_master_recv(client, &buf, 1);
+ if (r < 0)
+ goto err_presence_check;
+
+ r = 0;
+ return r;
+
+err_presence_check:
+ r = -ENXIO;
+ dev_err(&client->dev,
+ "nfc-nci nfcc_presence check - no NFCC available\n");
+ return r;
+}
+/* Initialise qca199x_ NFC controller hardware */
static int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr)
{
int r = 0;
@@ -949,6 +1091,14 @@
goto err_invalid_dis_gpio;
}
if (qca199x_dev->clk_run == false) {
+ /* Set clock rate */
+ if ((!strcmp(qca199x_dev->clk_src_name, "GPCLK")) ||
+ (!strcmp(qca199x_dev->clk_src_name, "GPCLK2"))) {
+ r = clk_set_rate(qca199x_dev->s_clk, NFC_RF_CLK_FREQ);
+ if (r)
+ goto err_invalid_clk;
+ }
+
r = clk_prepare_enable(qca199x_dev->s_clk);
if (r)
goto err_invalid_clk;
@@ -990,10 +1140,6 @@
if (r)
return -EINVAL;
- r = of_property_read_u32(np, "qcom,clk-gpio", &pdata->ven_gpio);
- if (r)
- return -EINVAL;
-
pdata->dis_gpio = of_get_named_gpio(np, "qcom,dis-gpio", 0);
if ((!gpio_is_valid(pdata->dis_gpio)))
return -EINVAL;
@@ -1004,11 +1150,24 @@
r = of_property_read_string(np, "qcom,clk-src", &pdata->clk_src_name);
- if ((!strcmp(pdata->clk_src_name, "GPCLK")) ||
- (!strcmp(pdata->clk_src_name, "GPCLK2")))
- pdata->clk_src_gpio = of_get_named_gpio(np,
- "qcom,clk-en-gpio", 0);
+ if (strcmp(pdata->clk_src_name, "GPCLK2")) {
+ r = of_property_read_u32(np, "qcom,clk-gpio",
+ &pdata->clkreq_gpio);
+ if (r)
+ return -EINVAL;
+ }
+ if ((!strcmp(pdata->clk_src_name, "GPCLK")) ||
+ (!strcmp(pdata->clk_src_name, "GPCLK2"))) {
+ pdata->clk_src_gpio = of_get_named_gpio(np,
+ "qcom,clk-src-gpio", 0);
+ if ((!gpio_is_valid(pdata->clk_src_gpio)))
+ return -EINVAL;
+ pdata->irq_gpio_clk_req = of_get_named_gpio(np,
+ "qcom,clk-req-gpio", 0);
+ if ((!gpio_is_valid(pdata->irq_gpio_clk_req)))
+ return -EINVAL;
+ }
if (r)
return -EINVAL;
return r;
@@ -1057,40 +1216,23 @@
return -ENOMEM;
}
qca199x_dev->client = client;
- if (gpio_is_valid(platform_data->irq_gpio)) {
- r = gpio_request(platform_data->irq_gpio, "nfc_irq_gpio");
- if (r) {
- dev_err(&client->dev, "unable to request gpio [%d]\n",
- platform_data->irq_gpio);
- goto err_free_dev;
- }
- r = gpio_direction_input(platform_data->irq_gpio);
- if (r) {
- dev_err(&client->dev,
- "unable to set direction for gpio [%d]\n",
- platform_data->irq_gpio);
- goto err_irq;
- }
- gpio_to_irq(0);
- irqn = gpio_to_irq(platform_data->irq_gpio);
- if (irqn < 0) {
- r = irqn;
- goto err_irq;
- }
- client->irq = irqn;
+ /*
+ * To be efficient we need to test whether nfcc hardware is physically
+ * present before attempting further hardware initialisation.
+ * For this we need to be sure the device is in ULPM state by
+ * setting disable line low early on.
+ *
+ */
- } else {
- dev_err(&client->dev, "irq gpio not provided\n");
- goto err_free_dev;
- }
+
if (gpio_is_valid(platform_data->dis_gpio)) {
r = gpio_request(platform_data->dis_gpio, "nfc_reset_gpio");
if (r) {
dev_err(&client->dev,
"NFC: unable to request gpio [%d]\n",
platform_data->dis_gpio);
- goto err_irq;
+ goto err_free_dev;
}
r = gpio_direction_output(platform_data->dis_gpio, 1);
if (r) {
@@ -1101,7 +1243,75 @@
}
} else {
dev_err(&client->dev, "dis gpio not provided\n");
- goto err_irq;
+ goto err_free_dev;
+ }
+
+ /* Put device in ULPM */
+ gpio_set_value(platform_data->dis_gpio, 0);
+ r = nfcc_hw_check(client, platform_data->reg);
+ if (r) {
+ /* We don't think there is hardware but just in case HPD */
+ gpio_set_value(platform_data->dis_gpio, 1);
+ goto err_dis_gpio;
+ }
+
+ if (gpio_is_valid(platform_data->irq_gpio)) {
+ r = gpio_request(platform_data->irq_gpio, "nfc_irq_gpio");
+ if (r) {
+ dev_err(&client->dev, "unable to request gpio [%d]\n",
+ platform_data->irq_gpio);
+ goto err_dis_gpio;
+ }
+ r = gpio_direction_input(platform_data->irq_gpio);
+ if (r) {
+
+ dev_err(&client->dev,
+ "unable to set direction for gpio [%d]\n",
+ platform_data->irq_gpio);
+ goto err_irq;
+ }
+ irqn = gpio_to_irq(platform_data->irq_gpio);
+ if (irqn < 0) {
+ r = irqn;
+ goto err_irq;
+ }
+ client->irq = irqn;
+
+ } else {
+ dev_err(&client->dev, "irq gpio not provided\n");
+ goto err_dis_gpio;
+ }
+ /* Interrupt from NFCC CLK_REQ to handle REF_CLK
+ o/p gating/selection */
+ if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
+ (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
+ if (gpio_is_valid(platform_data->irq_gpio_clk_req)) {
+ r = gpio_request(platform_data->irq_gpio_clk_req,
+ "nfc_irq_gpio_clk_en");
+ if (r) {
+ dev_err(&client->dev, "unable to request CLK_EN gpio [%d]\n",
+ platform_data->irq_gpio_clk_req);
+ goto err_irq;
+ }
+ r = gpio_direction_input(
+ platform_data->irq_gpio_clk_req);
+ if (r) {
+ dev_err(&client->dev,
+ "unable to set direction for CLK_EN gpio [%d]\n",
+ platform_data->irq_gpio_clk_req);
+ goto err_irq_clk;
+ }
+ gpio_to_irq(0);
+ irqn = gpio_to_irq(platform_data->irq_gpio_clk_req);
+ if (irqn < 0) {
+ r = irqn;
+ goto err_irq_clk;
+ }
+ platform_data->clk_req_irq_num = irqn;
+ } else {
+ dev_err(&client->dev, "irq CLK_EN gpio not provided\n");
+ goto err_irq;
+ }
}
/* Get the clock source name and gpio from from Device Tree */
qca199x_dev->clk_src_name = platform_data->clk_src_name;
@@ -1112,37 +1322,49 @@
if (r == -1)
goto err_clk;
else
- goto err_dis_gpio;
+ goto err_irq_clk;
}
- platform_data->ven_gpio = of_get_named_gpio(node,
- "qcom,clk-gpio", 0);
- if (gpio_is_valid(platform_data->ven_gpio)) {
- r = gpio_request(platform_data->ven_gpio, "nfc_ven_gpio");
- if (r) {
- dev_err(&client->dev, "unable to request gpio [%d]\n",
- platform_data->ven_gpio);
- goto err_ven_gpio;
+ if (strcmp(platform_data->clk_src_name, "GPCLK2")) {
+ platform_data->clkreq_gpio =
+ of_get_named_gpio(node, "qcom,clk-gpio", 0);
+
+ if (gpio_is_valid(platform_data->clkreq_gpio)) {
+ r = gpio_request(platform_data->clkreq_gpio,
+ "nfc_clkreq_gpio");
+ if (r) {
+ dev_err(&client->dev, "unable to request gpio [%d]\n",
+ platform_data->clkreq_gpio);
+ goto err_clkreq_gpio;
+ }
+ r = gpio_direction_input(platform_data->clkreq_gpio);
+ if (r) {
+ dev_err(&client->dev,
+ "unable to set direction for gpio [%d]\n",
+ platform_data->clkreq_gpio);
+ goto err_clkreq_gpio;
+ }
+ } else {
+ dev_err(&client->dev, "clkreq gpio not provided\n");
+ goto err_clk;
}
- r = gpio_direction_input(platform_data->ven_gpio);
- if (r) {
- dev_err(&client->dev,
- "unable to set direction for gpio [%d]\n",
- platform_data->ven_gpio);
- goto err_ven_gpio;
- }
- } else {
- dev_err(&client->dev, "ven gpio not provided\n");
- goto err_clk;
+ qca199x_dev->clkreq_gpio = platform_data->clkreq_gpio;
}
qca199x_dev->dis_gpio = platform_data->dis_gpio;
qca199x_dev->irq_gpio = platform_data->irq_gpio;
- qca199x_dev->ven_gpio = platform_data->ven_gpio;
+ if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
+ (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
+ qca199x_dev->irq_gpio_clk_req =
+ platform_data->irq_gpio_clk_req;
+ qca199x_dev->clk_req_irq_num =
+ platform_data->clk_req_irq_num;
+ }
/* init mutex and queues */
init_waitqueue_head(&qca199x_dev->read_wq);
mutex_init(&qca199x_dev->read_mutex);
spin_lock_init(&qca199x_dev->irq_enabled_lock);
+ spin_lock_init(&qca199x_dev->irq_enabled_lock_clk_req);
qca199x_dev->qca199x_device.minor = MISC_DYNAMIC_MINOR;
qca199x_dev->qca199x_device.name = "nfc-nci";
@@ -1154,6 +1376,27 @@
goto err_misc_register;
}
+
+ /*
+ * Reboot the NFCC now that all resources are ready
+ *
+ * The NFCC takes time to transition between power states.
+ * We wait 20uS for the NFCC to shutdown. (HPD)
+ * We wait 100uS for the NFCC to boot into ULPM.
+ */
+ gpio_set_value(platform_data->dis_gpio, 1);/* HPD */
+ msleep(20);
+ gpio_set_value(platform_data->dis_gpio, 0);/* ULPM */
+ msleep(100);
+
+
+ /* Here we perform a second presence check. */
+ r = nfcc_hw_check(client, platform_data->reg);
+ if (r) {
+ /* We don't think there is hardware but just in case HPD */
+ gpio_set_value(platform_data->dis_gpio, 1);
+ goto err_nfcc_not_present;
+ }
regulators.regulator = regulator_get(&client->dev, regulators.name);
if (IS_ERR(regulators.regulator)) {
r = PTR_ERR(regulators.regulator);
@@ -1172,6 +1415,7 @@
* for reading. It is cleared when all data has been read.
*/
device_mode.handle_flavour = UNSOLICITED_MODE;
+ /* NFC_INT IRQ */
qca199x_dev->irq_enabled = true;
r = request_irq(client->irq, qca199x_dev_irq_handler,
IRQF_TRIGGER_RISING, client->name, qca199x_dev);
@@ -1180,6 +1424,31 @@
goto err_request_irq_failed;
}
qca199x_disable_irq(qca199x_dev);
+ /* CLK_REQ IRQ */
+ if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
+ (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
+ r = request_irq(qca199x_dev->clk_req_irq_num,
+ qca199x_dev_irq_handler_clk_req,
+ (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING),
+ client->name, qca199x_dev);
+ if (r) {
+ dev_err(&client->dev,
+ "nfc-nci probe: request_irq failed. irq no = %d\n, main irq = %d",
+ qca199x_dev->clk_req_irq_num, client->irq);
+ goto err_request_irq_failed;
+ }
+ qca199x_dev->irq_enabled_clk_req = true;
+ qca199x_disable_irq_clk_req(qca199x_dev);
+
+
+ qca199x_dev->my_wq =
+ create_singlethread_workqueue("qca1990x_CLK_REQ_queue");
+ if (!qca199x_dev->my_wq)
+ goto err_create_workq;
+
+ INIT_WORK(&qca199x_dev->msm_clock_controll_work,
+ clk_req_update);
+ }
i2c_set_clientdata(client, qca199x_dev);
gpio_set_value(platform_data->dis_gpio, 1);
dev_dbg(&client->dev,
@@ -1187,28 +1456,33 @@
__func__);
return 0;
+err_create_workq:
+ dev_err(&client->dev,
+ "nfc-nci probe: %s, work_queue creation failure\n",
+ __func__);
+ free_irq(client->irq, qca199x_dev);
+err_nfcc_not_present:
err_request_irq_failed:
misc_deregister(&qca199x_dev->qca199x_device);
err_misc_register:
mutex_destroy(&qca199x_dev->read_mutex);
-err_ven_gpio:
- gpio_free(platform_data->ven_gpio);
+err_clkreq_gpio:
+ if (strcmp(platform_data->clk_src_name, "GPCLK2"))
+ gpio_free(platform_data->clkreq_gpio);
err_clk:
qca199x_clock_deselect(qca199x_dev);
-err_dis_gpio:
- r = gpio_direction_input(platform_data->dis_gpio);
- if (r)
- dev_err(&client->dev, "nfc-nci probe: Unable to set direction\n");
+err_irq_clk:
if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
- (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
- r = gpio_direction_input(platform_data->clk_src_gpio);
+ (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
+ r = gpio_direction_input(platform_data->irq_gpio_clk_req);
if (r)
dev_err(&client->dev, "nfc-nci probe: Unable to set direction\n");
- gpio_free(platform_data->clk_src_gpio);
+ gpio_free(platform_data->irq_gpio_clk_req);
}
- gpio_free(platform_data->dis_gpio);
err_irq:
gpio_free(platform_data->irq_gpio);
+err_dis_gpio:
+ gpio_free(platform_data->dis_gpio);
err_free_dev:
kfree(qca199x_dev);
return r;
@@ -1223,8 +1497,13 @@
misc_deregister(&qca199x_dev->qca199x_device);
mutex_destroy(&qca199x_dev->read_mutex);
gpio_free(qca199x_dev->irq_gpio);
+ if ((!strcmp(qca199x_dev->clk_src_name, "GPCLK")) ||
+ (!strcmp(qca199x_dev->clk_src_name, "GPCLK2"))) {
+ gpio_free(qca199x_dev->irq_gpio_clk_req);
+ }
gpio_free(qca199x_dev->dis_gpio);
- gpio_free(qca199x_dev->ven_gpio);
+ if (strcmp(qca199x_dev->clk_src_name, "GPCLK2"))
+ gpio_free(qca199x_dev->clkreq_gpio);
kfree(qca199x_dev);
return 0;
diff --git a/drivers/platform/msm/ipa/teth_bridge.c b/drivers/platform/msm/ipa/teth_bridge.c
index 79ec0c0..d08ac64 100644
--- a/drivers/platform/msm/ipa/teth_bridge.c
+++ b/drivers/platform/msm/ipa/teth_bridge.c
@@ -22,7 +22,6 @@
#include <linux/mutex.h>
#include <linux/skbuff.h>
#include <linux/types.h>
-#include <mach/bam_dmux.h>
#include <mach/ipa.h>
#include <mach/sps.h>
#include "ipa_i.h"
diff --git a/drivers/platform/msm/qpnp-power-on.c b/drivers/platform/msm/qpnp-power-on.c
index 507d02c..0ef2639 100644
--- a/drivers/platform/msm/qpnp-power-on.c
+++ b/drivers/platform/msm/qpnp-power-on.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -52,8 +52,15 @@
#define QPNP_PON_PS_HOLD_RST_CTL2(base) (base + 0x5B)
#define QPNP_PON_WD_RST_S2_CTL(base) (base + 0x56)
#define QPNP_PON_WD_RST_S2_CTL2(base) (base + 0x57)
-#define QPNP_PON_TRIGGER_EN(base) (base + 0x80)
+#define QPNP_PON_S3_SRC(base) (base + 0x74)
#define QPNP_PON_S3_DBC_CTL(base) (base + 0x75)
+#define QPNP_PON_TRIGGER_EN(base) (base + 0x80)
+
+#define QPNP_PON_S3_SRC_KPDPWR 0
+#define QPNP_PON_S3_SRC_RESIN 1
+#define QPNP_PON_S3_SRC_KPDPWR_OR_RESIN 2
+#define QPNP_PON_S3_SRC_KPDPWR_AND_RESIN 3
+#define QPNP_PON_S3_SRC_MASK 0x3
#define QPNP_PON_WARM_RESET_TFT BIT(4)
@@ -990,7 +997,17 @@
"Unable to config pon reset\n");
goto unreg_input_dev;
}
+ } else {
+ /* disable S2 reset */
+ rc = qpnp_pon_masked_write(pon, cfg->s2_cntl2_addr,
+ QPNP_PON_S2_CNTL_EN, 0);
+ if (rc) {
+ dev_err(&pon->spmi->dev,
+ "Unable to disable S2 reset\n");
+ goto unreg_input_dev;
+ }
}
+
rc = qpnp_pon_request_irqs(pon, cfg);
if (rc) {
dev_err(&pon->spmi->dev, "Unable to request-irq's\n");
@@ -1019,6 +1036,8 @@
u32 delay = 0, s3_debounce = 0;
int rc, sys_reset, index;
u8 pon_sts = 0;
+ const char *s3_src;
+ u8 s3_src_reg;
pon = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_pon),
GFP_KERNEL);
@@ -1119,6 +1138,32 @@
}
}
+ /* program s3 source */
+ s3_src = "kpdpwr-and-resin";
+ rc = of_property_read_string(pon->spmi->dev.of_node,
+ "qcom,s3-src", &s3_src);
+ if (rc && rc != -EINVAL) {
+ dev_err(&pon->spmi->dev, "Unable to read s3 timer\n");
+ return rc;
+ }
+
+ if (!strcmp(s3_src, "kpdpwr"))
+ s3_src_reg = QPNP_PON_S3_SRC_KPDPWR;
+ else if (!strcmp(s3_src, "resin"))
+ s3_src_reg = QPNP_PON_S3_SRC_RESIN;
+ else if (!strcmp(s3_src, "kpdpwr-or-resin"))
+ s3_src_reg = QPNP_PON_S3_SRC_KPDPWR_OR_RESIN;
+ else /* default combination */
+ s3_src_reg = QPNP_PON_S3_SRC_KPDPWR_AND_RESIN;
+
+ rc = qpnp_pon_masked_write(pon, QPNP_PON_S3_SRC(pon->base),
+ QPNP_PON_S3_SRC_MASK, s3_src_reg);
+ if (rc) {
+ dev_err(&spmi->dev,
+ "Unable to program s3 source\n");
+ return rc;
+ }
+
dev_set_drvdata(&spmi->dev, pon);
INIT_DELAYED_WORK(&pon->bark_work, bark_work_func);
diff --git a/drivers/platform/msm/sps/sps_bam.c b/drivers/platform/msm/sps/sps_bam.c
index bd4328a..ad5e241 100644
--- a/drivers/platform/msm/sps/sps_bam.c
+++ b/drivers/platform/msm/sps/sps_bam.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -169,6 +169,7 @@
list_for_each_entry(pipe, &dev->pipes_q, list) {
/* Check this pipe's bit in the source mask */
if (BAM_PIPE_IS_ASSIGNED(pipe)
+ && (!pipe->disconnecting)
&& (source & pipe->pipe_index_mask)) {
/* This pipe has an interrupt pending */
pipe_handler(dev, pipe);
@@ -585,6 +586,7 @@
pipe->mode = -1;
pipe->num_descs = 0;
pipe->desc_size = 0;
+ pipe->disconnecting = false;
memset(&pipe->sys, 0, sizeof(pipe->sys));
INIT_LIST_HEAD(&pipe->sys.events_q);
}
diff --git a/drivers/platform/msm/sps/sps_bam.h b/drivers/platform/msm/sps/sps_bam.h
index da5dafd..a20156b 100644
--- a/drivers/platform/msm/sps/sps_bam.h
+++ b/drivers/platform/msm/sps/sps_bam.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -185,6 +185,7 @@
/* System mode control */
struct sps_bam_sys_mode sys;
+ bool disconnecting;
};
/* BAM device descriptor */
diff --git a/drivers/platform/msm/sps/sps_rm.c b/drivers/platform/msm/sps/sps_rm.c
index 7d7e1a6..d8c7a4d 100644
--- a/drivers/platform/msm/sps/sps_rm.c
+++ b/drivers/platform/msm/sps/sps_rm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -556,11 +556,8 @@
{
struct sps_connection *map = (void *)pipe->map;
struct sps_connect *cfg = &pipe->connect;
- struct sps_bam *bam = pipe->bam;
- unsigned long flags;
mutex_lock(&sps_rm->lock);
- spin_lock_irqsave(&bam->isr_lock, flags);
/* Free this connection */
if (cfg->mode == SPS_MODE_SRC)
@@ -574,7 +571,6 @@
sps_rm_remove_ref(map);
- spin_unlock_irqrestore(&bam->isr_lock, flags);
mutex_unlock(&sps_rm->lock);
return 0;
@@ -800,8 +796,9 @@
synchronize_irq(bam->props.irq);
spin_lock_irqsave(&bam->isr_lock, flags);
- result = sps_bam_pipe_disconnect(pipe->bam, pipe_index);
+ pipe->disconnecting = true;
spin_unlock_irqrestore(&bam->isr_lock, flags);
+ result = sps_bam_pipe_disconnect(pipe->bam, pipe_index);
if (result) {
SPS_ERR("sps:Failed to disconnect BAM 0x%x pipe %d",
pipe->bam->props.phys_addr,
diff --git a/drivers/power/qpnp-bms.c b/drivers/power/qpnp-bms.c
index 9ea034c..bfe1f43 100644
--- a/drivers/power/qpnp-bms.c
+++ b/drivers/power/qpnp-bms.c
@@ -130,6 +130,7 @@
struct bms_irq {
unsigned int irq;
unsigned long disabled;
+ bool ready;
};
struct bms_wakeup_source {
@@ -393,7 +394,7 @@
static void enable_bms_irq(struct bms_irq *irq)
{
- if (__test_and_clear_bit(0, &irq->disabled)) {
+ if (irq->ready && __test_and_clear_bit(0, &irq->disabled)) {
enable_irq(irq->irq);
pr_debug("enabled irq %d\n", irq->irq);
}
@@ -401,12 +402,20 @@
static void disable_bms_irq(struct bms_irq *irq)
{
- if (!__test_and_set_bit(0, &irq->disabled)) {
+ if (irq->ready && !__test_and_set_bit(0, &irq->disabled)) {
disable_irq(irq->irq);
pr_debug("disabled irq %d\n", irq->irq);
}
}
+static void disable_bms_irq_nosync(struct bms_irq *irq)
+{
+ if (irq->ready && !__test_and_set_bit(0, &irq->disabled)) {
+ disable_irq_nosync(irq->irq);
+ pr_debug("disabled irq %d\n", irq->irq);
+ }
+}
+
#define HOLD_OREG_DATA BIT(0)
static int lock_output_data(struct qpnp_bms_chip *chip)
{
@@ -2509,7 +2518,7 @@
soc = calculate_soc_from_voltage(chip);
} else {
if (!chip->batfet_closed)
- qpnp_iadc_calibrate_for_trim(chip->iadc_dev, true);
+ qpnp_iadc_calibrate_for_trim(chip->iadc_dev, false);
rc = qpnp_vadc_read(chip->vadc_dev, LR_MUX1_BATT_THERM,
&result);
if (rc) {
@@ -2561,7 +2570,7 @@
soc = calculate_soc_from_voltage(chip);
} else {
if (!chip->batfet_closed)
- qpnp_iadc_calibrate_for_trim(chip->iadc_dev, true);
+ qpnp_iadc_calibrate_for_trim(chip->iadc_dev, false);
rc = qpnp_vadc_read(chip->vadc_dev, LR_MUX1_BATT_THERM,
&result);
if (rc) {
@@ -3286,12 +3295,11 @@
{
bool batfet_closed;
- if (chip->iadc_bms_revision2 > CALIB_WRKARND_DIG_MAJOR_MAX)
- return;
-
batfet_closed = is_batfet_closed(chip);
if (chip->batfet_closed != batfet_closed) {
chip->batfet_closed = batfet_closed;
+ if (chip->iadc_bms_revision2 > CALIB_WRKARND_DIG_MAJOR_MAX)
+ return;
if (batfet_closed == false) {
/* batfet opened */
schedule_work(&chip->batfet_open_work);
@@ -3563,7 +3571,7 @@
struct qpnp_bms_chip *chip = _chip;
pr_debug("sw_cc_thr irq triggered\n");
- disable_bms_irq(&chip->sw_cc_thr_irq);
+ disable_bms_irq_nosync(&chip->sw_cc_thr_irq);
bms_stay_awake(&chip->soc_wake_source);
schedule_work(&chip->recalc_work);
return IRQ_HANDLED;
@@ -3877,6 +3885,7 @@
pr_err("Unable to request " #irq_name " irq: %d\n", rc);\
return -ENXIO; \
} \
+ chip->irq_name##_irq.ready = true; \
} while (0)
static int bms_request_irqs(struct qpnp_bms_chip *chip)
@@ -4286,6 +4295,12 @@
goto error_setup;
}
+ rc = bms_request_irqs(chip);
+ if (rc) {
+ pr_err("error requesting bms irqs, rc = %d\n", rc);
+ goto error_setup;
+ }
+
battery_insertion_check(chip);
batfet_status_check(chip);
battery_status_check(chip);
@@ -4319,12 +4334,6 @@
goto unregister_dc;
}
- rc = bms_request_irqs(chip);
- if (rc) {
- pr_err("error requesting bms irqs, rc = %d\n", rc);
- goto unregister_dc;
- }
-
pr_info("probe success: soc =%d vbatt = %d ocv = %d r_sense_uohm = %u warm_reset = %d\n",
get_prop_bms_capacity(chip), vbatt, chip->last_ocv_uv,
chip->r_sense_uohm, warm_reset);
diff --git a/drivers/power/qpnp-charger.c b/drivers/power/qpnp-charger.c
index 370266b..4439881 100644
--- a/drivers/power/qpnp-charger.c
+++ b/drivers/power/qpnp-charger.c
@@ -113,6 +113,7 @@
#define USB_OCP_THR 0x52
#define USB_OCP_CLR 0x53
#define BAT_IF_TEMP_STATUS 0x09
+#define BOOST_ILIM 0x78
#define REG_OFFSET_PERP_SUBTYPE 0x05
@@ -217,6 +218,7 @@
struct qpnp_chg_irq {
int irq;
unsigned long disabled;
+ unsigned long wake_enable;
};
struct qpnp_chg_regulator {
@@ -247,6 +249,7 @@
* @max_voltage_mv: the max volts the batt should be charged up to
* @min_voltage_mv: min battery voltage before turning the FET on
* @batt_weak_voltage_mv: Weak battery voltage threshold
+ * @vbatdet_max_err_mv resume voltage hysterisis
* @max_bat_chg_current: maximum battery charge current in mA
* @warm_bat_chg_ma: warm battery maximum charge current in mA
* @cool_bat_chg_ma: cool battery maximum charge current in mA
@@ -323,6 +326,7 @@
unsigned int max_voltage_mv;
unsigned int min_voltage_mv;
unsigned int batt_weak_voltage_mv;
+ unsigned int vbatdet_max_err_mv;
int prev_usb_max_ma;
int set_vddmax_mv;
int delta_vddmax_mv;
@@ -362,6 +366,7 @@
struct work_struct soc_check_work;
struct delayed_work aicl_check_work;
struct work_struct insertion_ocv_work;
+ struct work_struct ocp_clear_work;
struct qpnp_chg_regulator otg_vreg;
struct qpnp_chg_regulator boost_vreg;
struct qpnp_chg_regulator batfet_vreg;
@@ -529,6 +534,24 @@
}
}
+static void
+qpnp_chg_irq_wake_enable(struct qpnp_chg_irq *irq)
+{
+ if (!__test_and_set_bit(0, &irq->wake_enable)) {
+ pr_debug("number = %d\n", irq->irq);
+ enable_irq_wake(irq->irq);
+ }
+}
+
+static void
+qpnp_chg_irq_wake_disable(struct qpnp_chg_irq *irq)
+{
+ if (__test_and_clear_bit(0, &irq->wake_enable)) {
+ pr_debug("number = %d\n", irq->irq);
+ disable_irq_wake(irq->irq);
+ }
+}
+
#define USB_OTG_EN_BIT BIT(0)
static int
qpnp_chg_is_otg_en_set(struct qpnp_chg_chip *chip)
@@ -881,21 +904,21 @@
return rc;
}
-#define QPNP_CHG_VINMIN_MIN_MV 4200
+#define QPNP_CHG_VINMIN_MIN_MV 4000
#define QPNP_CHG_VINMIN_HIGH_MIN_MV 5600
#define QPNP_CHG_VINMIN_HIGH_MIN_VAL 0x2B
#define QPNP_CHG_VINMIN_MAX_MV 9600
#define QPNP_CHG_VINMIN_STEP_MV 50
#define QPNP_CHG_VINMIN_STEP_HIGH_MV 200
#define QPNP_CHG_VINMIN_MASK 0x3F
-#define QPNP_CHG_VINMIN_MIN_VAL 0x10
+#define QPNP_CHG_VINMIN_MIN_VAL 0x0C
static int
qpnp_chg_vinmin_set(struct qpnp_chg_chip *chip, int voltage)
{
u8 temp;
- if (voltage < QPNP_CHG_VINMIN_MIN_MV
- || voltage > QPNP_CHG_VINMIN_MAX_MV) {
+ if ((voltage < QPNP_CHG_VINMIN_MIN_MV)
+ || (voltage > QPNP_CHG_VINMIN_MAX_MV)) {
pr_err("bad mV=%d asked to set\n", voltage);
return -EINVAL;
}
@@ -1213,10 +1236,36 @@
qpnp_chg_usb_usb_ocp_irq_handler(int irq, void *_chip)
{
struct qpnp_chg_chip *chip = _chip;
- int rc;
pr_debug("usb-ocp triggered\n");
+ schedule_work(&chip->ocp_clear_work);
+
+ return IRQ_HANDLED;
+}
+
+#define BOOST_ILIMIT_MIN 0x07
+#define BOOST_ILIMIT_DEF 0x02
+#define BOOST_ILIMT_MASK 0xFF
+static void
+qpnp_chg_ocp_clear_work(struct work_struct *work)
+{
+ int rc;
+ u8 usb_sts;
+ struct qpnp_chg_chip *chip = container_of(work,
+ struct qpnp_chg_chip, ocp_clear_work);
+
+ if (chip->type == SMBBP) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->boost_base + BOOST_ILIM,
+ BOOST_ILIMT_MASK,
+ BOOST_ILIMIT_MIN, 1);
+ if (rc) {
+ pr_err("Failed to turn configure ilim rc = %d\n", rc);
+ return;
+ }
+ }
+
rc = qpnp_chg_masked_write(chip,
chip->usb_chgpth_base + USB_OCP_CLR,
OCP_CLR_BIT,
@@ -1232,7 +1281,29 @@
if (rc)
pr_err("Failed to turn off usb ovp rc = %d\n", rc);
- return IRQ_HANDLED;
+ if (chip->type == SMBBP) {
+ /* Wait for OCP circuitry to be powered up */
+ msleep(100);
+ rc = qpnp_chg_read(chip, &usb_sts,
+ INT_RT_STS(chip->usb_chgpth_base), 1);
+ if (rc) {
+ pr_err("failed to read interrupt sts %d\n", rc);
+ return;
+ }
+
+ if (usb_sts & COARSE_DET_USB_IRQ) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->boost_base + BOOST_ILIM,
+ BOOST_ILIMT_MASK,
+ BOOST_ILIMIT_DEF, 1);
+ if (rc) {
+ pr_err("Failed to set ilim rc = %d\n", rc);
+ return;
+ }
+ } else {
+ pr_warn_ratelimited("USB short to GND detected!\n");
+ }
+ }
}
#define QPNP_CHG_VDDMAX_MIN 3400
@@ -1518,15 +1589,38 @@
return IRQ_HANDLED;
}
+#define TEST_EN_SMBC_LOOP 0xE5
+#define IBAT_REGULATION_DISABLE BIT(2)
static irqreturn_t
qpnp_chg_bat_if_batt_temp_irq_handler(int irq, void *_chip)
{
struct qpnp_chg_chip *chip = _chip;
- int batt_temp_good;
+ int batt_temp_good, batt_present, rc;
batt_temp_good = qpnp_chg_is_batt_temp_ok(chip);
pr_debug("batt-temp triggered: %d\n", batt_temp_good);
+ batt_present = qpnp_chg_is_batt_present(chip);
+ if (batt_present) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + SEC_ACCESS,
+ 0xFF,
+ 0xA5, 1);
+ if (rc) {
+ pr_err("failed to write SEC_ACCESS rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + TEST_EN_SMBC_LOOP,
+ IBAT_REGULATION_DISABLE,
+ batt_temp_good ? 0 : IBAT_REGULATION_DISABLE, 1);
+ if (rc) {
+ pr_err("failed to write COMP_OVR1 rc=%d\n", rc);
+ return rc;
+ }
+ }
+
pr_debug("psy changed batt_psy\n");
power_supply_changed(&chip->batt_psy);
return IRQ_HANDLED;
@@ -1536,15 +1630,51 @@
qpnp_chg_bat_if_batt_pres_irq_handler(int irq, void *_chip)
{
struct qpnp_chg_chip *chip = _chip;
- int batt_present;
+ int batt_present, batt_temp_good, rc;
batt_present = qpnp_chg_is_batt_present(chip);
pr_debug("batt-pres triggered: %d\n", batt_present);
if (chip->batt_present ^ batt_present) {
if (batt_present) {
+ batt_temp_good = qpnp_chg_is_batt_temp_ok(chip);
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + SEC_ACCESS,
+ 0xFF,
+ 0xA5, 1);
+ if (rc) {
+ pr_err("failed to write SEC_ACCESS: %d\n", rc);
+ return rc;
+ }
+
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + TEST_EN_SMBC_LOOP,
+ IBAT_REGULATION_DISABLE,
+ batt_temp_good
+ ? 0 : IBAT_REGULATION_DISABLE, 1);
+ if (rc) {
+ pr_err("failed to write COMP_OVR1 rc=%d\n", rc);
+ return rc;
+ }
schedule_work(&chip->insertion_ocv_work);
} else {
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + SEC_ACCESS,
+ 0xFF,
+ 0xA5, 1);
+ if (rc) {
+ pr_err("failed to write SEC_ACCESS: %d\n", rc);
+ return rc;
+ }
+
+ rc = qpnp_chg_masked_write(chip,
+ chip->buck_base + TEST_EN_SMBC_LOOP,
+ IBAT_REGULATION_DISABLE,
+ 0, 1);
+ if (rc) {
+ pr_err("failed to write COMP_OVR1 rc=%d\n", rc);
+ return rc;
+ }
chip->insertion_ocv_uv = 0;
qpnp_chg_charge_en(chip, 0);
}
@@ -1656,6 +1786,8 @@
u8 chgr_sts;
int rc;
+ qpnp_chg_irq_wake_disable(&chip->chg_fastchg);
+
rc = qpnp_chg_read(chip, &chgr_sts, INT_RT_STS(chip->chgr_base), 1);
if (rc)
pr_err("failed to read interrupt sts %d\n", rc);
@@ -1759,6 +1891,17 @@
if (!qpnp_chg_is_otg_en_set(chip))
return 0;
+ if (chip->type == SMBBP) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->boost_base + BOOST_ILIM,
+ BOOST_ILIMT_MASK,
+ BOOST_ILIMIT_DEF, 1);
+ if (rc) {
+ pr_err("Failed to set ilim rc = %d\n", rc);
+ return rc;
+ }
+ }
+
/* enable usb ovp fet */
rc = qpnp_chg_masked_write(chip,
chip->usb_chgpth_base + CHGR_USB_USB_OTG_CTL,
@@ -1782,11 +1925,23 @@
switch_usb_to_host_mode(struct qpnp_chg_chip *chip)
{
int rc;
+ u8 usb_sts;
pr_debug("switch to host mode\n");
if (qpnp_chg_is_otg_en_set(chip))
return 0;
+ if (chip->type == SMBBP) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->boost_base + BOOST_ILIM,
+ BOOST_ILIMT_MASK,
+ BOOST_ILIMIT_MIN, 1);
+ if (rc) {
+ pr_err("Failed to turn configure ilim rc = %d\n", rc);
+ return rc;
+ }
+ }
+
if (!qpnp_chg_is_dc_chg_plugged_in(chip)) {
rc = qpnp_chg_force_run_on_batt(chip, 1);
if (rc) {
@@ -1805,6 +1960,30 @@
return rc;
}
+ if (chip->type == SMBBP) {
+ /* Wait for OCP circuitry to be powered up */
+ msleep(100);
+ rc = qpnp_chg_read(chip, &usb_sts,
+ INT_RT_STS(chip->usb_chgpth_base), 1);
+ if (rc) {
+ pr_err("failed to read interrupt sts %d\n", rc);
+ return rc;
+ }
+
+ if (usb_sts & COARSE_DET_USB_IRQ) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->boost_base + BOOST_ILIM,
+ BOOST_ILIMT_MASK,
+ BOOST_ILIMIT_DEF, 1);
+ if (rc) {
+ pr_err("Failed to set ilim rc = %d\n", rc);
+ return rc;
+ }
+ } else {
+ pr_warn_ratelimited("USB short to GND detected!\n");
+ }
+ }
+
return 0;
}
@@ -2126,6 +2305,7 @@
&& soc <= chip->soc_resume_limit) {
pr_debug("resuming charging at %d%% soc\n", soc);
chip->resuming_charging = true;
+ qpnp_chg_irq_wake_enable(&chip->chg_fastchg);
qpnp_chg_set_appropriate_vbatdet(chip);
qpnp_chg_charge_en(chip, !chip->charging_disabled);
}
@@ -3130,12 +3310,13 @@
vbat_lower_than_vbatdet = !(chg_sts & VBAT_DET_LOW_IRQ);
if (vbat_lower_than_vbatdet && vbat_mv <
(chip->max_voltage_mv - chip->resume_delta_mv
- - VBATDET_MAX_ERR_MV)) {
+ - chip->vbatdet_max_err_mv)) {
vbat_low_count++;
pr_debug("woke up too early vbat_mv = %d, max_mv = %d, resume_mv = %d tolerance_mv = %d low_count = %d\n",
vbat_mv, chip->max_voltage_mv,
chip->resume_delta_mv,
- VBATDET_MAX_ERR_MV, vbat_low_count);
+ chip->vbatdet_max_err_mv,
+ vbat_low_count);
if (vbat_low_count >= CONSECUTIVE_COUNT) {
pr_debug("woke up too early stopping\n");
qpnp_chg_enable_irq(&chip->chg_vbatdet_lo);
@@ -3825,10 +4006,10 @@
return rc;
}
- enable_irq_wake(chip->chg_trklchg.irq);
- enable_irq_wake(chip->chg_failed.irq);
+ qpnp_chg_irq_wake_enable(&chip->chg_trklchg);
+ qpnp_chg_irq_wake_enable(&chip->chg_failed);
qpnp_chg_disable_irq(&chip->chg_vbatdet_lo);
- enable_irq_wake(chip->chg_vbatdet_lo.irq);
+ qpnp_chg_irq_wake_enable(&chip->chg_vbatdet_lo);
break;
case SMBB_BAT_IF_SUBTYPE:
@@ -3851,7 +4032,7 @@
return rc;
}
- enable_irq_wake(chip->batt_pres.irq);
+ qpnp_chg_irq_wake_enable(&chip->batt_pres);
chip->batt_temp_ok.irq = spmi_get_irq_byname(spmi,
spmi_resource, "bat-temp-ok");
@@ -3868,8 +4049,9 @@
chip->batt_temp_ok.irq, rc);
return rc;
}
+ qpnp_chg_bat_if_batt_temp_irq_handler(0, chip);
- enable_irq_wake(chip->batt_temp_ok.irq);
+ qpnp_chg_irq_wake_enable(&chip->batt_temp_ok);
break;
case SMBB_BUCK_SUBTYPE:
@@ -3951,11 +4133,11 @@
return rc;
}
- enable_irq_wake(chip->usb_ocp.irq);
+ qpnp_chg_irq_wake_enable(&chip->usb_ocp);
}
- enable_irq_wake(chip->usbin_valid.irq);
- enable_irq_wake(chip->chg_gone.irq);
+ qpnp_chg_irq_wake_enable(&chip->usbin_valid);
+ qpnp_chg_irq_wake_enable(&chip->chg_gone);
break;
case SMBB_DC_CHGPTH_SUBTYPE:
chip->dcin_valid.irq = spmi_get_irq_byname(spmi,
@@ -3974,7 +4156,7 @@
return rc;
}
- enable_irq_wake(chip->dcin_valid.irq);
+ qpnp_chg_irq_wake_enable(&chip->dcin_valid);
break;
}
}
@@ -4361,6 +4543,7 @@
OF_PROP_READ(chip, cold_batt_p, "batt-cold-percentage", rc, 1);
OF_PROP_READ(chip, soc_resume_limit, "resume-soc", rc, 1);
OF_PROP_READ(chip, batt_weak_voltage_mv, "vbatweak-mv", rc, 1);
+ OF_PROP_READ(chip, vbatdet_max_err_mv, "vbatdet-maxerr-mv", rc, 1);
if (rc)
return rc;
@@ -4379,6 +4562,9 @@
}
}
+ if (!chip->vbatdet_max_err_mv)
+ chip->vbatdet_max_err_mv = VBATDET_MAX_ERR_MV;
+
/* Look up JEITA compliance parameters if cool and warm temp provided */
if (chip->cool_bat_decidegc || chip->warm_bat_decidegc) {
chip->adc_tm_dev = qpnp_get_adc_tm(chip->dev, "chg");
@@ -4499,6 +4685,8 @@
INIT_WORK(&chip->reduce_power_stage_work,
qpnp_chg_reduce_power_stage_work);
mutex_init(&chip->batfet_vreg_lock);
+ INIT_WORK(&chip->ocp_clear_work,
+ qpnp_chg_ocp_clear_work);
INIT_WORK(&chip->batfet_lcl_work,
qpnp_chg_batfet_lcl_work);
INIT_WORK(&chip->insertion_ocv_work,
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index fe5af3a..e9994c2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -102,6 +102,17 @@
This driver supports the voltage regulators of DA9052-BC and
DA9053-AA/Bx PMIC.
+config REGULATOR_FAN53555
+ tristate "Fairchild FAN53555 Regulator"
+ depends on I2C
+ select REGMAP_I2C
+ help
+ This driver supports Fairchild FAN53555 Digitally Programmable
+ TinyBuck Regulator. The FAN53555 is a step-down switching voltage
+ regulator that delivers a digitally programmable output from an
+ input voltage supply of 2.5V to 5.5V. The output voltage is
+ programmed through an I2C interface.
+
config REGULATOR_ANATOP
tristate "Freescale i.MX on-chip ANATOP LDO regulators"
depends on MFD_ANATOP
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index eb07c97..d96e793 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -20,6 +20,7 @@
obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o
obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o
obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
+obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o
obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o
diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c
new file mode 100644
index 0000000..6986a52
--- /dev/null
+++ b/drivers/regulator/fan53555.c
@@ -0,0 +1,658 @@
+/*
+ * FAN53555 Fairchild Digitally Programmable TinyBuck Regulator Driver.
+ *
+ * Supported Part Numbers:
+ * FAN53555UC00X/01X/03X/04X/05X
+ *
+ * Copyright (c) 2012 Marvell Technology Ltd.
+ * Yunfan Zhang <yfzhang@marvell.com>
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/regmap.h>
+#include <linux/regulator/fan53555.h>
+
+/* Voltage setting */
+#define FAN53555_VSEL0 0x00
+#define FAN53555_VSEL1 0x01
+/* Control register */
+#define FAN53555_CONTROL 0x02
+/* IC Type */
+#define FAN53555_ID1 0x03
+/* IC mask version */
+#define FAN53555_ID2 0x04
+/* Monitor register */
+#define FAN53555_MONITOR 0x05
+
+/* VSEL bit definitions */
+#define VSEL_BUCK_EN (1 << 7)
+#define VSEL_MODE (1 << 6)
+#define VSEL_NSEL_MASK 0x3F
+#define VSEL_FULL_MASK 0xFF
+/* Chip ID and Verison */
+#define DIE_ID 0x0F /* ID1 */
+#define DIE_REV 0x0F /* ID2 */
+#define DIE_13_REV 0x0F /* DIE Revsion ID of 13 option */
+
+/* Control bit definitions */
+#define CTL_OUTPUT_DISCHG (1 << 7)
+#define CTL_SLEW_MASK (0x7 << 4)
+#define CTL_SLEW_SHIFT 4
+#define CTL_RESET (1 << 2)
+
+#define FAN53555_NVOLTAGES 64 /* Numbers of voltages */
+
+/* IC Type */
+enum {
+ FAN53555_CHIP_ID_00 = 0,
+ FAN53555_CHIP_ID_01,
+ FAN53555_CHIP_ID_02,
+ FAN53555_CHIP_ID_03,
+ FAN53555_CHIP_ID_04,
+ FAN53555_CHIP_ID_05,
+};
+
+static const int slew_rate_plan[] = {
+ 64000,
+ 32000,
+ 16000,
+ 8000,
+ 4000,
+ 2000,
+ 1000,
+ 500
+};
+
+struct fan53555_device_info {
+ struct regmap *regmap;
+ struct device *dev;
+ struct regulator_desc desc;
+ struct regulator_dev *rdev;
+ struct regulator_init_data *regulator;
+ /* IC Type and Rev */
+ int chip_id;
+ int chip_rev;
+ /* Voltage setting register */
+ unsigned int vol_reg;
+ unsigned int sleep_reg;
+ /* Voltage range and step(linear) */
+ unsigned int vsel_min;
+ unsigned int vsel_step;
+ /* Voltage slew rate limiting */
+ unsigned int slew_rate;
+ /* Sleep voltage cache */
+ unsigned int sleep_vol_cache;
+
+ bool disable_suspend;
+};
+
+static int fan53555_get_voltage(struct regulator_dev *rdev)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int rc;
+
+ rc = regmap_read(di->regmap, di->vol_reg, &val);
+ if (rc) {
+ dev_err(di->dev, "Unable to get voltage rc(%d)", rc);
+ return rc;
+ }
+
+ return ((val & VSEL_NSEL_MASK) * di->vsel_step) +
+ di->vsel_min;
+}
+
+static int fan53555_set_voltage(struct regulator_dev *rdev,
+ int min_uv, int max_uv, unsigned *selector)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ int rc, set_val, cur_uv, new_uv;
+
+ set_val = DIV_ROUND_UP(min_uv - di->vsel_min, di->vsel_step);
+ new_uv = (set_val * di->vsel_step) + di->vsel_min;
+
+ if (new_uv > max_uv || max_uv < di->vsel_min) {
+ dev_err(di->dev, "Unable to set voltage (%d %d)\n",
+ min_uv, max_uv);
+ }
+
+ cur_uv = fan53555_get_voltage(rdev);
+ if (cur_uv < 0)
+ return cur_uv;
+
+ rc = regmap_update_bits(di->regmap, di->vol_reg, VSEL_NSEL_MASK,
+ set_val);
+ if (rc) {
+ dev_err(di->dev, "Unable to set voltage (%d %d)\n",
+ min_uv, max_uv);
+ } else {
+ udelay(DIV_ROUND_UP(abs(new_uv - cur_uv),
+ slew_rate_plan[di->slew_rate]));
+ *selector = set_val;
+ }
+
+ return rc;
+}
+
+static int fan53555_list_voltage(struct regulator_dev *rdev,
+ unsigned selector)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+
+ if (selector >= di->desc.n_voltages)
+ return 0;
+
+ return selector * di->vsel_step + di->vsel_min;
+}
+
+static int fan53555_set_suspend_voltage(struct regulator_dev *rdev, int uV)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ int ret, val;
+
+ if (di->sleep_vol_cache == uV)
+ return 0;
+ ret = fan53555_set_voltage(rdev, uV, uV, &val);
+ if (ret < 0)
+ return -EINVAL;
+ ret = regmap_update_bits(di->regmap, di->sleep_reg,
+ VSEL_NSEL_MASK, val);
+ if (ret < 0)
+ return -EINVAL;
+ /* Cache the sleep voltage setting.
+ * Might not be the real voltage which is rounded */
+ di->sleep_vol_cache = uV;
+
+ return 0;
+}
+
+static int fan53555_enable(struct regulator_dev *rdev)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ int ret;
+
+ ret = regmap_update_bits(di->regmap, di->vol_reg,
+ VSEL_BUCK_EN, VSEL_BUCK_EN);
+ if (ret)
+ dev_err(di->dev, "Unable to enable regulator, ret = %d\n",
+ ret);
+ return ret;
+}
+
+static int fan53555_disable(struct regulator_dev *rdev)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ int ret;
+
+ ret = regmap_update_bits(di->regmap, di->vol_reg,
+ VSEL_BUCK_EN, 0);
+ if (ret)
+ dev_err(di->dev, "Unable to set disable regulator, ret = %d\n",
+ ret);
+ return ret;
+}
+
+static int fan53555_is_enabled(struct regulator_dev *rdev)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ int ret;
+ u32 val;
+
+ ret = regmap_read(di->regmap, di->vol_reg, &val);
+ if (ret) {
+ dev_err(di->dev, "Unable to get regulator status, ret = %d\n",
+ ret);
+ return ret;
+ } else {
+ return val & VSEL_BUCK_EN;
+ }
+}
+
+static int fan53555_set_mode(struct regulator_dev *rdev, unsigned int mode)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+
+ switch (mode) {
+ case REGULATOR_MODE_FAST:
+ regmap_update_bits(di->regmap, di->vol_reg,
+ VSEL_MODE, VSEL_MODE);
+ break;
+ case REGULATOR_MODE_NORMAL:
+ regmap_update_bits(di->regmap, di->vol_reg, VSEL_MODE, 0);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static unsigned int fan53555_get_mode(struct regulator_dev *rdev)
+{
+ struct fan53555_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret = 0;
+
+ ret = regmap_read(di->regmap, di->vol_reg, &val);
+ if (ret < 0)
+ return ret;
+ if (val & VSEL_MODE)
+ return REGULATOR_MODE_FAST;
+ else
+ return REGULATOR_MODE_NORMAL;
+}
+
+static struct regulator_ops fan53555_regulator_ops = {
+ .set_voltage = fan53555_set_voltage,
+ .get_voltage = fan53555_get_voltage,
+ .list_voltage = fan53555_list_voltage,
+ .set_suspend_voltage = fan53555_set_suspend_voltage,
+ .enable = fan53555_enable,
+ .disable = fan53555_disable,
+ .is_enabled = fan53555_is_enabled,
+ .set_mode = fan53555_set_mode,
+ .get_mode = fan53555_get_mode,
+};
+
+static struct regulator_ops fan53555_regulator_disable_suspend_ops = {
+ .set_voltage = fan53555_set_voltage,
+ .get_voltage = fan53555_get_voltage,
+ .list_voltage = fan53555_list_voltage,
+ .enable = fan53555_enable,
+ .disable = fan53555_disable,
+ .is_enabled = fan53555_is_enabled,
+ .set_mode = fan53555_set_mode,
+ .get_mode = fan53555_get_mode,
+};
+
+/* For 00,01,03,05 options:
+ * VOUT = 0.60V + NSELx * 10mV, from 0.60 to 1.23V.
+ * For 04 option:
+ * VOUT = 0.603V + NSELx * 12.826mV, from 0.603 to 1.411V.
+ * For 13 option:
+ * 13 option, its DIE ID is 0x00 and DIE_REV is 0x0F.
+ * VOUT = 0.80V + NSELx * 10mV, from 0.80 to 1.43V.
+ * */
+static int fan53555_device_setup(struct fan53555_device_info *di,
+ struct fan53555_platform_data *pdata)
+{
+ unsigned int reg, data, mask;
+
+ /* Setup voltage control register */
+ switch (pdata->sleep_vsel_id) {
+ case FAN53555_VSEL_ID_0:
+ di->sleep_reg = FAN53555_VSEL0;
+ di->vol_reg = FAN53555_VSEL1;
+ break;
+ case FAN53555_VSEL_ID_1:
+ di->sleep_reg = FAN53555_VSEL1;
+ di->vol_reg = FAN53555_VSEL0;
+ break;
+ default:
+ dev_err(di->dev, "Invalid VSEL ID!\n");
+ return -EINVAL;
+ }
+ /* Init voltage range and step */
+ switch (di->chip_id) {
+ case FAN53555_CHIP_ID_00:
+ if (di->chip_rev == DIE_13_REV) {
+ di->vsel_min = 800000;
+ di->vsel_step = 10000;
+ break;
+ }
+ case FAN53555_CHIP_ID_01:
+ case FAN53555_CHIP_ID_03:
+ case FAN53555_CHIP_ID_05:
+ di->vsel_min = 600000;
+ di->vsel_step = 10000;
+ break;
+ case FAN53555_CHIP_ID_04:
+ di->vsel_min = 603000;
+ di->vsel_step = 12826;
+ break;
+ default:
+ dev_err(di->dev,
+ "Chip ID[%d]\n not supported!\n", di->chip_id);
+ return -EINVAL;
+ }
+ /* Init slew rate */
+ if (pdata->slew_rate & 0x7)
+ di->slew_rate = pdata->slew_rate;
+ else
+ di->slew_rate = FAN53555_SLEW_RATE_64MV;
+ reg = FAN53555_CONTROL;
+ data = di->slew_rate << CTL_SLEW_SHIFT;
+ mask = CTL_SLEW_MASK;
+ return regmap_update_bits(di->regmap, reg, mask, data);
+}
+
+static int fan53555_regulator_register(struct fan53555_device_info *di,
+ struct i2c_client *client)
+{
+ struct regulator_desc *rdesc = &di->desc;
+
+ rdesc->name = "fan53555-reg";
+ if (di->disable_suspend)
+ rdesc->ops = &fan53555_regulator_disable_suspend_ops;
+ else
+ rdesc->ops = &fan53555_regulator_ops;
+ rdesc->type = REGULATOR_VOLTAGE;
+ rdesc->n_voltages = FAN53555_NVOLTAGES;
+ rdesc->owner = THIS_MODULE;
+
+ di->rdev = regulator_register(&di->desc, di->dev,
+ di->regulator, di, client->dev.of_node);
+ return PTR_RET(di->rdev);
+
+}
+
+static struct regmap_config fan53555_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
+static int fan53555_parse_backup_reg(struct i2c_client *client, u32 *sleep_sel)
+{
+ int rc = -EINVAL;
+
+ rc = of_property_read_u32(client->dev.of_node, "fairchild,backup-vsel",
+ sleep_sel);
+ if (rc) {
+ dev_err(&client->dev, "fairchild,backup-vsel property missing\n");
+ } else {
+ switch (*sleep_sel) {
+ case FAN53555_VSEL_ID_0:
+ case FAN53555_VSEL_ID_1:
+ break;
+ default:
+ dev_err(&client->dev, "Invalid VSEL ID!\n");
+ rc = -EINVAL;
+ }
+ }
+
+ return rc;
+}
+
+static u32 fan53555_get_slew_rate_reg_value(struct i2c_client *client,
+ u32 slew_rate)
+{
+ u32 index;
+
+ for (index = 0; index < ARRAY_SIZE(slew_rate_plan); index++)
+ if (slew_rate == slew_rate_plan[index])
+ break;
+
+ if (index == ARRAY_SIZE(slew_rate_plan)) {
+ dev_err(&client->dev, "invalid slew rate.\n");
+ index = FAN53555_SLEW_RATE_8MV;
+ }
+
+ return index;
+}
+
+static struct fan53555_platform_data *
+ fan53555_get_of_platform_data(struct i2c_client *client)
+{
+ struct fan53555_platform_data *pdata = NULL;
+ struct regulator_init_data *init_data;
+ u32 sleep_sel, slew_rate;
+ int rc;
+
+ init_data = of_get_regulator_init_data(&client->dev,
+ client->dev.of_node);
+ if (!init_data) {
+ dev_err(&client->dev, "regulator init data is missing\n");
+ return pdata;
+ }
+
+ rc = of_property_read_u32(client->dev.of_node, "regulator-ramp-delay",
+ &slew_rate);
+ if (rc)
+ slew_rate = slew_rate_plan[FAN53555_SLEW_RATE_8MV];
+
+ if (fan53555_parse_backup_reg(client, &sleep_sel))
+ return pdata;
+
+ pdata = devm_kzalloc(&client->dev,
+ sizeof(struct fan53555_platform_data), GFP_KERNEL);
+ if (!pdata) {
+ dev_err(&client->dev,
+ "fan53555_platform_data allocation failed.\n");
+ return pdata;
+ }
+
+ init_data->constraints.input_uV = init_data->constraints.max_uV;
+ init_data->constraints.valid_ops_mask |=
+ REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_MODE;
+ init_data->constraints.valid_modes_mask =
+ REGULATOR_MODE_NORMAL |
+ REGULATOR_MODE_FAST;
+ init_data->constraints.initial_mode = REGULATOR_MODE_NORMAL;
+
+ pdata->regulator = init_data;
+ pdata->slew_rate = fan53555_get_slew_rate_reg_value(client,
+ slew_rate);
+ pdata->sleep_vsel_id = sleep_sel;
+
+ return pdata;
+}
+
+static int fan53555_restore_working_reg(struct device_node *node,
+ struct fan53555_device_info *di)
+{
+ int ret;
+ u32 val;
+
+ /* Restore register from back up register */
+ ret = regmap_read(di->regmap, di->sleep_reg, &val);
+ if (ret < 0) {
+ dev_err(di->dev,
+ "Failed to get backup data from reg %d, ret = %d\n",
+ di->sleep_reg, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(di->regmap,
+ di->vol_reg, VSEL_FULL_MASK, val);
+ if (ret < 0) {
+ dev_err(di->dev,
+ "Failed to update working reg %d, ret = %d\n",
+ di->vol_reg, ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+static int fan53555_of_init(struct device_node *node,
+ struct fan53555_device_info *di)
+{
+ int ret, gpio;
+ enum of_gpio_flags flags;
+
+ if (of_property_read_bool(node, "fairchild,restore-reg")) {
+ ret = fan53555_restore_working_reg(node, di);
+ if (ret)
+ return ret;
+ }
+
+ if (of_find_property(node, "fairchild,vsel-gpio", NULL)) {
+ gpio = of_get_named_gpio_flags(node, "fairchild,vsel-gpio", 0,
+ &flags);
+
+ if (!gpio_is_valid(gpio)) {
+ if (gpio != -EPROBE_DEFER)
+ dev_err(di->dev, "Could not get vsel, ret = %d\n",
+ gpio);
+ return gpio;
+ }
+
+ ret = devm_gpio_request(di->dev, gpio, "fan53555_vsel");
+ if (ret) {
+ dev_err(di->dev, "Failed to obtain gpio %d ret = %d\n",
+ gpio, ret);
+ return ret;
+ }
+
+ ret = gpio_direction_output(gpio, flags & OF_GPIO_ACTIVE_LOW ?
+ 0 : 1);
+ if (ret) {
+ dev_err(di->dev,
+ "Failed to set GPIO %d to: %s, ret = %d",
+ gpio, flags & OF_GPIO_ACTIVE_LOW ?
+ "GPIO_LOW" : "GPIO_HIGH", ret);
+ return ret;
+ }
+ }
+
+ di->disable_suspend = of_property_read_bool(node,
+ "fairchild,disable-suspend");
+
+ return 0;
+}
+
+static int __devinit fan53555_regulator_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct fan53555_device_info *di;
+ struct fan53555_platform_data *pdata;
+ unsigned int val;
+ int ret;
+
+ if (client->dev.of_node)
+ pdata = fan53555_get_of_platform_data(client);
+ else
+ pdata = client->dev.platform_data;
+
+ if (!pdata || !pdata->regulator) {
+ dev_err(&client->dev, "Platform data not found!\n");
+ return -ENODEV;
+ }
+
+ di = devm_kzalloc(&client->dev, sizeof(struct fan53555_device_info),
+ GFP_KERNEL);
+ if (!di) {
+ dev_err(&client->dev, "Failed to allocate device info data!\n");
+ return -ENOMEM;
+ }
+ di->regmap = devm_regmap_init_i2c(client, &fan53555_regmap_config);
+ if (IS_ERR(di->regmap)) {
+ dev_err(&client->dev, "Failed to allocate regmap!\n");
+ return PTR_ERR(di->regmap);
+ }
+ di->dev = &client->dev;
+ di->regulator = pdata->regulator;
+ i2c_set_clientdata(client, di);
+ /* Get chip ID */
+ ret = regmap_read(di->regmap, FAN53555_ID1, &val);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to get chip ID!\n");
+ return -ENODEV;
+ }
+ di->chip_id = val & DIE_ID;
+ /* Get chip revision */
+ ret = regmap_read(di->regmap, FAN53555_ID2, &val);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to get chip Rev!\n");
+ return -ENODEV;
+ }
+ di->chip_rev = val & DIE_REV;
+ dev_info(&client->dev, "FAN53555 Option[%d] Rev[%d] Detected!\n",
+ di->chip_id, di->chip_rev);
+ /* Device init */
+ ret = fan53555_device_setup(di, pdata);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to setup device!\n");
+ return ret;
+ }
+
+ /* Set up from device tree */
+ if (client->dev.of_node) {
+ ret = fan53555_of_init(client->dev.of_node, di);
+ if (ret)
+ return ret;
+ }
+
+ ret = fan53555_regulator_register(di, client);
+ if (ret < 0)
+ dev_err(&client->dev, "Failed to register regulator!\n");
+
+ return ret;
+
+}
+
+static int __devexit fan53555_regulator_remove(struct i2c_client *client)
+{
+ struct fan53555_device_info *di = i2c_get_clientdata(client);
+
+ regulator_unregister(di->rdev);
+ return 0;
+}
+
+static struct of_device_id fan53555_match_table[] = {
+ { .compatible = "fairchild,fan53555-regulator",},
+ {},
+};
+MODULE_DEVICE_TABLE(of, fan53555_match_table);
+
+static const struct i2c_device_id fan53555_id[] = {
+ {"fan53555", -1},
+ { },
+};
+
+static struct i2c_driver fan53555_regulator_driver = {
+ .driver = {
+ .name = "fan53555-regulator",
+ .owner = THIS_MODULE,
+ .of_match_table = fan53555_match_table,
+ },
+ .probe = fan53555_regulator_probe,
+ .remove = __devexit_p(fan53555_regulator_remove),
+ .id_table = fan53555_id,
+};
+
+/**
+ * fan53555_regulator_init() - initialized fan53555 regulator driver
+ * This function registers the fan53555 regulator platform driver.
+ *
+ * Returns 0 on success or errno on failure.
+ */
+int __init fan53555_regulator_init(void)
+{
+ static bool initialized;
+
+ if (initialized)
+ return 0;
+ else
+ initialized = true;
+
+ return i2c_add_driver(&fan53555_regulator_driver);
+}
+EXPORT_SYMBOL(fan53555_regulator_init);
+module_init(fan53555_regulator_init);
+
+static void __exit fan53555_regulator_exit(void)
+{
+ i2c_del_driver(&fan53555_regulator_driver);
+}
+module_exit(fan53555_regulator_exit);
+
+MODULE_AUTHOR("Yunfan Zhang <yfzhang@marvell.com>");
+MODULE_DESCRIPTION("FAN53555 regulator driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/regulator/onsemi-ncp6335d.c b/drivers/regulator/onsemi-ncp6335d.c
index 329ac46..3d4dd04 100644
--- a/drivers/regulator/onsemi-ncp6335d.c
+++ b/drivers/regulator/onsemi-ncp6335d.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,12 +12,20 @@
#include <linux/module.h>
#include <linux/err.h>
+#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/i2c.h>
+#include <linux/log2.h>
#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
#include <linux/regmap.h>
#include <linux/regulator/onsemi-ncp6335d.h>
+#include <linux/string.h>
+#include <mach/gpiomux.h>
/* registers */
#define REG_NCP6335D_PID 0x03
@@ -30,6 +38,7 @@
/* constraints */
#define NCP6335D_MIN_VOLTAGE_UV 600000
#define NCP6335D_STEP_VOLTAGE_UV 6250
+#define NCP6335D_VOLTAGE_STEPS 128
#define NCP6335D_MIN_SLEW_NS 166
#define NCP6335D_MAX_SLEW_NS 1333
@@ -51,9 +60,15 @@
struct regmap *regmap;
struct device *dev;
unsigned int vsel_reg;
+ unsigned int vsel_backup_reg;
unsigned int mode_bit;
int curr_voltage;
int slew_rate;
+
+ unsigned int step_size;
+ unsigned int min_voltage;
+ unsigned int min_slew_ns;
+ unsigned int max_slew_ns;
};
static void dump_registers(struct ncp6335d_info *dd,
@@ -71,8 +86,8 @@
u8 val;
int delay;
- val = abs(prev_uV - new_uV) / NCP6335D_STEP_VOLTAGE_UV;
- delay = (val * dd->slew_rate / 1000) + 1;
+ val = abs(prev_uV - new_uV) / dd->step_size;
+ delay = ((val * dd->slew_rate) / 1000) + 1;
dev_dbg(dd->dev, "Slew Delay = %d\n", delay);
@@ -120,8 +135,8 @@
dev_err(dd->dev, "Unable to get volatge rc(%d)", rc);
return rc;
}
- dd->curr_voltage = ((val & NCP6335D_VOUT_SEL_MASK) *
- NCP6335D_STEP_VOLTAGE_UV) + NCP6335D_MIN_VOLTAGE_UV;
+ dd->curr_voltage = ((val & NCP6335D_VOUT_SEL_MASK) * dd->step_size) +
+ dd->min_voltage;
dump_registers(dd, dd->vsel_reg, __func__);
@@ -134,10 +149,8 @@
int rc, set_val, new_uV;
struct ncp6335d_info *dd = rdev_get_drvdata(rdev);
- set_val = DIV_ROUND_UP(min_uV - NCP6335D_MIN_VOLTAGE_UV,
- NCP6335D_STEP_VOLTAGE_UV);
- new_uV = (set_val * NCP6335D_STEP_VOLTAGE_UV) +
- NCP6335D_MIN_VOLTAGE_UV;
+ set_val = DIV_ROUND_UP(min_uV - dd->min_voltage, dd->step_size);
+ new_uV = (set_val * dd->step_size) + dd->min_voltage;
if (new_uV > max_uV) {
dev_err(dd->dev, "Unable to set volatge (%d %d)\n",
min_uV, max_uV);
@@ -159,6 +172,17 @@
return rc;
}
+static int ncp6335d_list_voltage(struct regulator_dev *rdev,
+ unsigned selector)
+{
+ struct ncp6335d_info *dd = rdev_get_drvdata(rdev);
+
+ if (selector >= NCP6335D_VOLTAGE_STEPS)
+ return 0;
+
+ return selector * dd->step_size + dd->min_voltage;
+}
+
static int ncp6335d_set_mode(struct regulator_dev *rdev,
unsigned int mode)
{
@@ -213,6 +237,7 @@
static struct regulator_ops ncp6335d_ops = {
.set_voltage = ncp6335d_set_voltage,
.get_voltage = ncp6335d_get_voltage,
+ .list_voltage = ncp6335d_list_voltage,
.enable = ncp6335d_enable,
.disable = ncp6335d_disable,
.set_mode = ncp6335d_set_mode,
@@ -222,11 +247,98 @@
static struct regulator_desc rdesc = {
.name = "ncp6335d",
.owner = THIS_MODULE,
- .n_voltages = 128,
+ .n_voltages = NCP6335D_VOLTAGE_STEPS,
.ops = &ncp6335d_ops,
};
-static int __devinit ncp6335d_init(struct ncp6335d_info *dd,
+static int ncp6335d_restore_working_reg(struct device_node *node,
+ struct ncp6335d_info *dd)
+{
+ int ret;
+ unsigned int val;
+
+ /* Restore register from back up register */
+ ret = regmap_read(dd->regmap, dd->vsel_backup_reg, &val);
+ if (ret < 0) {
+ dev_err(dd->dev, "Failed to get backup data from reg %d, ret = %d\n",
+ dd->vsel_backup_reg, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(dd->regmap, dd->vsel_reg,
+ NCP6335D_VOUT_SEL_MASK, val);
+ if (ret < 0) {
+ dev_err(dd->dev, "Failed to update working reg %d, ret = %d\n",
+ dd->vsel_reg, ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+static int ncp6335d_parse_gpio(struct device_node *node,
+ struct ncp6335d_info *dd)
+{
+ int ret = 0, gpio;
+ enum of_gpio_flags flags;
+
+ if (!of_find_property(node, "onnn,vsel-gpio", NULL))
+ return ret;
+
+ /* Get GPIO connected to vsel and set its output */
+ gpio = of_get_named_gpio_flags(node,
+ "onnn,vsel-gpio", 0, &flags);
+ if (!gpio_is_valid(gpio)) {
+ if (gpio != -EPROBE_DEFER)
+ dev_err(dd->dev, "Could not get vsel, ret = %d\n",
+ gpio);
+ return gpio;
+ }
+
+ ret = devm_gpio_request(dd->dev, gpio, "ncp6335d_vsel");
+ if (ret) {
+ dev_err(dd->dev, "Failed to obtain gpio %d ret = %d\n",
+ gpio, ret);
+ return ret;
+ }
+
+ ret = gpio_direction_output(gpio, flags & OF_GPIO_ACTIVE_LOW ? 0 : 1);
+ if (ret) {
+ dev_err(dd->dev, "Failed to set GPIO %d to: %s, ret = %d",
+ gpio, flags & OF_GPIO_ACTIVE_LOW ?
+ "GPIO_LOW" : "GPIO_HIGH", ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+static int ncp6335d_parse_tlmm(struct device_node *node,
+ struct ncp6335d_info *dd)
+{
+ int val, ret = 0;
+ u32 tmp[2];
+
+ if (!of_find_property(node, "onnn,tlmm-config", NULL))
+ return ret;
+
+ ret = of_property_read_u32_array(node, "onnn,tlmm-config", tmp, 2);
+ if (ret) {
+ dev_err(dd->dev, "onnn,tlmm-config is misconfigured, ret = %d",
+ ret);
+ return ret;
+ }
+
+ val = msm_tlmm_misc_reg_read(TLMM_SPARE_REG);
+ val &= ~tmp[0];
+ val |= tmp[1] & tmp[0];
+ msm_tlmm_misc_reg_write(TLMM_SPARE_REG, val);
+
+ return ret;
+}
+
+static int __devinit ncp6335d_init(struct i2c_client *client,
+ struct ncp6335d_info *dd,
const struct ncp6335d_platform_data *pdata)
{
int rc;
@@ -235,10 +347,12 @@
switch (pdata->default_vsel) {
case NCP6335D_VSEL0:
dd->vsel_reg = REG_NCP6335D_PROGVSEL0;
+ dd->vsel_backup_reg = REG_NCP6335D_PROGVSEL1;
dd->mode_bit = NCP6335D_PWM_MODE0;
break;
case NCP6335D_VSEL1:
dd->vsel_reg = REG_NCP6335D_PROGVSEL1;
+ dd->vsel_backup_reg = REG_NCP6335D_PROGVSEL0;
dd->mode_bit = NCP6335D_PWM_MODE1;
break;
default:
@@ -246,6 +360,20 @@
return -EINVAL;
}
+ if (of_property_read_bool(client->dev.of_node, "onnn,restore-reg")) {
+ rc = ncp6335d_restore_working_reg(client->dev.of_node, dd);
+ if (rc)
+ return rc;
+ }
+
+ rc = ncp6335d_parse_gpio(client->dev.of_node, dd);
+ if (rc)
+ return rc;
+
+ rc = ncp6335d_parse_tlmm(client->dev.of_node, dd);
+ if (rc)
+ return rc;
+
/* get the current programmed voltage */
rc = regmap_read(dd->regmap, dd->vsel_reg, &val);
if (rc) {
@@ -253,7 +381,7 @@
return rc;
}
dd->curr_voltage = ((val & NCP6335D_VOUT_SEL_MASK) *
- NCP6335D_STEP_VOLTAGE_UV) + NCP6335D_MIN_VOLTAGE_UV;
+ dd->step_size) + dd->min_voltage;
/* set discharge */
rc = regmap_update_bits(dd->regmap, REG_NCP6335D_PGOOD,
@@ -266,15 +394,15 @@
}
/* set slew rate */
- if (pdata->slew_rate_ns < NCP6335D_MIN_SLEW_NS ||
- pdata->slew_rate_ns > NCP6335D_MAX_SLEW_NS) {
+ if (pdata->slew_rate_ns < dd->min_slew_ns ||
+ pdata->slew_rate_ns > dd->max_slew_ns) {
dev_err(dd->dev, "Invalid slew rate %d\n", pdata->slew_rate_ns);
return -EINVAL;
}
- val = DIV_ROUND_UP(pdata->slew_rate_ns - NCP6335D_MIN_SLEW_NS,
- NCP6335D_MIN_SLEW_NS);
- val >>= 1;
- dd->slew_rate = val * NCP6335D_MIN_SLEW_NS;
+
+ dd->slew_rate = pdata->slew_rate_ns;
+ val = DIV_ROUND_UP(pdata->slew_rate_ns, dd->min_slew_ns);
+ val = ilog2(val);
rc = regmap_update_bits(dd->regmap, REG_NCP6335D_TIMING,
NCP6335D_SLEW_MASK, val << NCP6335D_SLEW_SHIFT);
@@ -301,6 +429,116 @@
.val_bits = 8,
};
+static int ncp6335d_parse_dt(struct i2c_client *client,
+ struct ncp6335d_info *dd)
+{
+ int rc;
+
+ rc = of_property_read_u32(client->dev.of_node,
+ "onnn,step-size", &dd->step_size);
+ if (rc < 0) {
+ dev_err(&client->dev, "step size missing: rc = %d.\n", rc);
+ return rc;
+ }
+
+ rc = of_property_read_u32(client->dev.of_node,
+ "onnn,min-slew-ns", &dd->min_slew_ns);
+ if (rc < 0) {
+ dev_err(&client->dev, "min slew us missing: rc = %d.\n", rc);
+ return rc;
+ }
+
+ rc = of_property_read_u32(client->dev.of_node,
+ "onnn,max-slew-ns", &dd->max_slew_ns);
+ if (rc < 0) {
+ dev_err(&client->dev, "max slew us missing: rc = %d.\n", rc);
+ return rc;
+ }
+
+ rc = of_property_read_u32(client->dev.of_node,
+ "onnn,min-setpoint", &dd->min_voltage);
+ if (rc < 0) {
+ dev_err(&client->dev, "min set point missing: rc = %d.\n", rc);
+ return rc;
+ }
+
+ return rc;
+}
+
+static struct ncp6335d_platform_data *
+ ncp6335d_get_of_platform_data(struct i2c_client *client)
+{
+ struct ncp6335d_platform_data *pdata = NULL;
+ struct regulator_init_data *init_data;
+ const char *mode_name;
+ int rc;
+
+ init_data = of_get_regulator_init_data(&client->dev,
+ client->dev.of_node);
+ if (!init_data) {
+ dev_err(&client->dev, "regulator init data is missing\n");
+ return pdata;
+ }
+
+ pdata = devm_kzalloc(&client->dev,
+ sizeof(struct ncp6335d_platform_data), GFP_KERNEL);
+ if (!pdata) {
+ dev_err(&client->dev, "ncp6335d_platform_data allocation failed.\n");
+ return pdata;
+ }
+
+ rc = of_property_read_u32(client->dev.of_node,
+ "onnn,vsel", &pdata->default_vsel);
+ if (rc < 0) {
+ dev_err(&client->dev, "onnn,vsel property missing: rc = %d.\n",
+ rc);
+ return NULL;
+ }
+
+ rc = of_property_read_u32(client->dev.of_node,
+ "onnn,slew-ns", &pdata->slew_rate_ns);
+ if (rc < 0) {
+ dev_err(&client->dev, "onnn,slew-ns property missing: rc = %d.\n",
+ rc);
+ return NULL;
+ }
+
+ pdata->discharge_enable = of_property_read_bool(client->dev.of_node,
+ "onnn,discharge-enable");
+
+ pdata->sleep_enable = of_property_read_bool(client->dev.of_node,
+ "onnn,sleep-enable");
+
+ pdata->init_data = init_data;
+
+ init_data->constraints.input_uV = init_data->constraints.max_uV;
+ init_data->constraints.valid_ops_mask =
+ REGULATOR_CHANGE_VOLTAGE |
+ REGULATOR_CHANGE_STATUS |
+ REGULATOR_CHANGE_MODE;
+ init_data->constraints.valid_modes_mask =
+ REGULATOR_MODE_NORMAL |
+ REGULATOR_MODE_FAST;
+
+ rc = of_property_read_string(client->dev.of_node, "onnn,mode",
+ &mode_name);
+ if (!rc) {
+ if (strcmp("pwm", mode_name) == 0) {
+ init_data->constraints.initial_mode =
+ REGULATOR_MODE_FAST;
+ } else if (strcmp("auto", mode_name) == 0) {
+ init_data->constraints.initial_mode =
+ REGULATOR_MODE_NORMAL;
+ } else {
+ dev_err(&client->dev, "onnn,mode, unknown regulator mode: %s\n",
+ mode_name);
+ return NULL;
+ }
+ }
+
+ return pdata;
+}
+
static int __devinit ncp6335d_regulator_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -309,7 +547,11 @@
struct ncp6335d_info *dd;
const struct ncp6335d_platform_data *pdata;
- pdata = client->dev.platform_data;
+ if (client->dev.of_node)
+ pdata = ncp6335d_get_of_platform_data(client);
+ else
+ pdata = client->dev.platform_data;
+
if (!pdata) {
dev_err(&client->dev, "Platform data not specified\n");
return -EINVAL;
@@ -321,6 +563,17 @@
return -ENOMEM;
}
+ if (client->dev.of_node) {
+ rc = ncp6335d_parse_dt(client, dd);
+ if (rc)
+ return rc;
+ } else {
+ dd->step_size = NCP6335D_STEP_VOLTAGE_UV;
+ dd->min_voltage = NCP6335D_MIN_VOLTAGE_UV;
+ dd->min_slew_ns = NCP6335D_MIN_SLEW_NS;
+ dd->max_slew_ns = NCP6335D_MAX_SLEW_NS;
+ }
+
dd->regmap = devm_regmap_init_i2c(client, &ncp6335d_regmap_config);
if (IS_ERR(dd->regmap)) {
dev_err(&client->dev, "Error allocating regmap\n");
@@ -339,17 +592,19 @@
dd->dev = &client->dev;
i2c_set_clientdata(client, dd);
- rc = ncp6335d_init(dd, pdata);
+ rc = ncp6335d_init(client, dd, pdata);
if (rc) {
dev_err(&client->dev, "Unable to intialize the regulator\n");
return -EINVAL;
}
- dd->regulator = regulator_register(&rdesc, &client->dev,
- dd->init_data, dd, NULL);
+ dd->regulator = regulator_register(&rdesc, &client->dev, dd->init_data,
+ dd, client->dev.of_node);
+
if (IS_ERR(dd->regulator)) {
dev_err(&client->dev, "Unable to register regulator rc(%ld)",
PTR_ERR(dd->regulator));
+
return PTR_ERR(dd->regulator);
}
@@ -365,6 +620,12 @@
return 0;
}
+static struct of_device_id ncp6335d_match_table[] = {
+ { .compatible = "onnn,ncp6335d-regulator", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ncp6335d_match_table);
+
static const struct i2c_device_id ncp6335d_id[] = {
{"ncp6335d", -1},
{ },
@@ -373,15 +634,32 @@
static struct i2c_driver ncp6335d_regulator_driver = {
.driver = {
.name = "ncp6335d-regulator",
+ .owner = THIS_MODULE,
+ .of_match_table = ncp6335d_match_table,
},
.probe = ncp6335d_regulator_probe,
.remove = __devexit_p(ncp6335d_regulator_remove),
.id_table = ncp6335d_id,
};
-static int __init ncp6335d_regulator_init(void)
+
+/**
+ * ncp6335d_regulator_init() - initialized ncp6335d regulator driver
+ * This function registers the ncp6335d regulator platform driver.
+ *
+ * Returns 0 on success or errno on failure.
+ */
+int __init ncp6335d_regulator_init(void)
{
+ static bool initialized;
+
+ if (initialized)
+ return 0;
+ else
+ initialized = true;
+
return i2c_add_driver(&ncp6335d_regulator_driver);
}
+EXPORT_SYMBOL(ncp6335d_regulator_init);
subsys_initcall(ncp6335d_regulator_init);
static void __exit ncp6335d_regulator_exit(void)
diff --git a/drivers/rtc/qpnp-rtc.c b/drivers/rtc/qpnp-rtc.c
index bfbae78..d64b577 100644
--- a/drivers/rtc/qpnp-rtc.c
+++ b/drivers/rtc/qpnp-rtc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-13, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -102,6 +102,7 @@
int rc;
unsigned long secs, irq_flags;
u8 value[4], reg = 0, alarm_enabled = 0, ctrl_reg;
+ u8 rtc_disabled = 0, rtc_ctrl_reg;
struct qpnp_rtc *rtc_dd = dev_get_drvdata(dev);
rtc_tm_to_time(tm, &secs);
@@ -152,6 +153,22 @@
* write operation
*/
+ /* Disable RTC H/w before writing on RTC register*/
+ rtc_ctrl_reg = rtc_dd->rtc_ctrl_reg;
+ if (rtc_ctrl_reg & BIT_RTC_ENABLE) {
+ rtc_disabled = 1;
+ rtc_ctrl_reg &= ~BIT_RTC_ENABLE;
+ rc = qpnp_write_wrapper(rtc_dd, &rtc_ctrl_reg,
+ rtc_dd->rtc_base + REG_OFFSET_RTC_CTRL, 1);
+ if (rc) {
+ dev_err(dev,
+ "Disabling of RTC control reg failed"
+ " with error:%d\n", rc);
+ goto rtc_rw_fail;
+ }
+ rtc_dd->rtc_ctrl_reg = rtc_ctrl_reg;
+ }
+
/* Clear WDATA[0] */
reg = 0x0;
rc = qpnp_write_wrapper(rtc_dd, ®,
@@ -177,6 +194,20 @@
goto rtc_rw_fail;
}
+ /* Enable RTC H/w after writing on RTC register*/
+ if (rtc_disabled) {
+ rtc_ctrl_reg |= BIT_RTC_ENABLE;
+ rc = qpnp_write_wrapper(rtc_dd, &rtc_ctrl_reg,
+ rtc_dd->rtc_base + REG_OFFSET_RTC_CTRL, 1);
+ if (rc) {
+ dev_err(dev,
+ "Enabling of RTC control reg failed"
+ " with error:%d\n", rc);
+ goto rtc_rw_fail;
+ }
+ rtc_dd->rtc_ctrl_reg = rtc_ctrl_reg;
+ }
+
if (alarm_enabled) {
ctrl_reg |= BIT_RTC_ALARM_ENABLE;
rc = qpnp_write_wrapper(rtc_dd, &ctrl_reg,
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index 01b0374..c29d98b 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -925,6 +925,10 @@
transport_configure_device(&sdev->sdev_gendev);
+ /* The LLD can override auto suspend tunables in ->slave_configure() */
+ sdev->use_rpm_auto = 0;
+ sdev->autosuspend_delay = SCSI_DEFAULT_AUTOSUSPEND_DELAY;
+
if (sdev->host->hostt->slave_configure) {
ret = sdev->host->hostt->slave_configure(sdev);
if (ret) {
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index 04c2a27..89a1af1 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -885,7 +885,8 @@
device_enable_async_suspend(&sdev->sdev_gendev);
scsi_autopm_get_target(starget);
pm_runtime_set_active(&sdev->sdev_gendev);
- pm_runtime_forbid(&sdev->sdev_gendev);
+ if (!sdev->use_rpm_auto)
+ pm_runtime_forbid(&sdev->sdev_gendev);
pm_runtime_enable(&sdev->sdev_gendev);
scsi_autopm_put_target(starget);
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index f454610..2b09d59 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -2612,6 +2612,10 @@
gd->events |= DISK_EVENT_MEDIA_CHANGE;
}
+ blk_pm_runtime_init(sdp->request_queue, dev);
+ if (sdp->autosuspend_delay >= 0)
+ pm_runtime_set_autosuspend_delay(dev, sdp->autosuspend_delay);
+
add_disk(gd);
sd_dif_config_host(sdkp);
@@ -2619,7 +2623,6 @@
sd_printk(KERN_NOTICE, sdkp, "Attached SCSI %sdisk\n",
sdp->removable ? "removable " : "");
- blk_pm_runtime_init(sdp->request_queue, dev);
scsi_autopm_put_device(sdp);
put_device(&sdkp->dev);
}
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index b743bd6..48959ab 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -1773,6 +1773,12 @@
*hba_handle = hba;
+ /*
+ * The device-initialize-sequence hasn't been invoked yet.
+ * Set the device to power-off state
+ */
+ ufshcd_set_ufs_dev_poweroff(hba);
+
async_schedule(ufshcd_async_scan, hba);
return 0;
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 6e7a815..c662a2b 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -345,10 +345,12 @@
*/
if (!(txn->mc & SLIM_MSG_CLK_PAUSE_SEQ_FLG))
msgv = msm_slim_get_ctrl(dev);
+ if (msgv >= 0)
+ dev->state = MSM_CTRL_AWAKE;
mutex_lock(&dev->tx_lock);
if (dev->state == MSM_CTRL_ASLEEP ||
((!(txn->mc & SLIM_MSG_CLK_PAUSE_SEQ_FLG)) &&
- dev->state == MSM_CTRL_SLEEPING)) {
+ dev->state == MSM_CTRL_IDLE)) {
dev_err(dev->dev, "runtime or system PM suspended state");
mutex_unlock(&dev->tx_lock);
if (msgv >= 0)
@@ -1452,6 +1454,10 @@
#ifdef CONFIG_PM_RUNTIME
static int msm_slim_runtime_idle(struct device *device)
{
+ struct platform_device *pdev = to_platform_device(device);
+ struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
+ if (dev->state == MSM_CTRL_AWAKE)
+ dev->state = MSM_CTRL_IDLE;
dev_dbg(device, "pm_runtime: idle...\n");
pm_request_autosuspend(device);
return -EAGAIN;
@@ -1470,7 +1476,6 @@
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
int ret;
dev_dbg(device, "pm_runtime: suspending...\n");
- dev->state = MSM_CTRL_SLEEPING;
ret = slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
if (ret) {
dev_err(device, "clk pause not entered:%d", ret);
@@ -1500,10 +1505,12 @@
static int msm_slim_suspend(struct device *dev)
{
- int ret = 0;
- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
- struct platform_device *pdev = to_platform_device(dev);
- struct msm_slim_ctrl *cdev = platform_get_drvdata(pdev);
+ int ret = -EBUSY;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct msm_slim_ctrl *cdev = platform_get_drvdata(pdev);
+ if (!pm_runtime_enabled(dev) ||
+ (!pm_runtime_suspended(dev) &&
+ cdev->state == MSM_CTRL_IDLE)) {
dev_dbg(dev, "system suspend");
ret = msm_slim_runtime_suspend(dev);
if (!ret) {
diff --git a/drivers/slimbus/slim-msm-ngd.c b/drivers/slimbus/slim-msm-ngd.c
index adca457..0b8c931 100644
--- a/drivers/slimbus/slim-msm-ngd.c
+++ b/drivers/slimbus/slim-msm-ngd.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -83,6 +83,7 @@
};
static int ngd_slim_runtime_resume(struct device *device);
+static int ngd_slim_power_up(struct msm_slim_ctrl *dev);
static irqreturn_t ngd_slim_interrupt(int irq, void *d)
{
@@ -180,6 +181,41 @@
return 0;
}
+static int mdm_ssr_notify_cb(struct notifier_block *n, unsigned long code,
+ void *_cmd)
+{
+ struct msm_slim_mdm *mdm = container_of(n, struct msm_slim_mdm, nb);
+ struct msm_slim_ctrl *dev = container_of(mdm, struct msm_slim_ctrl,
+ mdm);
+ int ret;
+
+ switch (code) {
+ case SUBSYS_BEFORE_SHUTDOWN:
+ /* make sure runtime-pm doesn't suspend during modem SSR */
+ pm_runtime_get_noresume(dev->dev);
+ break;
+ case SUBSYS_AFTER_POWERUP:
+ ret = msm_slim_qmi_check_framer_request(dev);
+ dev_err(dev->dev,
+ "%s:SLIM %lu external_modem SSR notify cb, ret %d",
+ __func__, code, ret);
+ /*
+ * Next codec transaction will reinit the HW
+ * if it was suspended
+ */
+ if (pm_runtime_suspended(dev->dev) ||
+ dev->state >= MSM_CTRL_ASLEEP) {
+ break;
+ } else {
+ ngd_slim_power_up(dev);
+ msm_slim_put_ctrl(dev);
+ }
+ default:
+ break;
+ }
+ return NOTIFY_DONE;
+}
+
static int ngd_get_tid(struct slim_controller *ctrl, struct slim_msg_txn *txn,
u8 *tid, struct completion *done)
{
@@ -243,7 +279,7 @@
}
if ((txn->mc == (SLIM_MSG_CLK_PAUSE_SEQ_FLG |
SLIM_MSG_MC_RECONFIGURE_NOW)) &&
- dev->state <= MSM_CTRL_SLEEPING) {
+ dev->state <= MSM_CTRL_IDLE) {
msm_slim_disconnect_endp(dev, &dev->rx_msgq,
&dev->use_rx_msgqs);
msm_slim_disconnect_endp(dev, &dev->tx_msgq,
@@ -268,8 +304,28 @@
* Messages related to data channel management can't
* wait since they are holding reconfiguration lock.
* clk_pause in resume (which can change state back to
- * MSM_CTRL_AWAKE), will need that lock
+ * MSM_CTRL_AWAKE), will need that lock.
+ * Port disconnection, channel removal calls should pass
+ * through since there is no activity on the bus and
+ * those calls are triggered by clients due to
+ * device_down callback in that situation.
+ * Returning 0 on the disconnections and
+ * removals will ensure consistent state of channels,
+ * ports with the HW
+ * Remote requests to remove channel/port will be
+ * returned from the path where they wait on
+ * acknowledgement from ADSP
*/
+ if ((txn->mt == SLIM_MSG_MT_DEST_REFERRED_USER) &&
+ ((mc == SLIM_USR_MC_CHAN_CTRL ||
+ mc == SLIM_USR_MC_DISCONNECT_PORT ||
+ mc == SLIM_USR_MC_RECONFIG_NOW)))
+ return -EREMOTEIO;
+ if ((txn->mt == SLIM_MSG_MT_CORE) &&
+ ((mc == SLIM_MSG_MC_DISCONNECT_PORT ||
+ mc == SLIM_MSG_MC_NEXT_REMOVE_CHANNEL ||
+ mc == SLIM_USR_MC_RECONFIG_NOW)))
+ return 0;
if ((txn->mt == SLIM_MSG_MT_CORE) &&
((mc >= SLIM_MSG_MC_CONNECT_SOURCE &&
mc <= SLIM_MSG_MC_CHANGE_CONTENT) ||
@@ -278,14 +334,27 @@
return -EREMOTEIO;
if ((txn->mt == SLIM_MSG_MT_DEST_REFERRED_USER) &&
((mc >= SLIM_USR_MC_DEFINE_CHAN &&
- mc <= SLIM_USR_MC_DISCONNECT_PORT)))
+ mc < SLIM_USR_MC_DISCONNECT_PORT)))
return -EREMOTEIO;
timeout = wait_for_completion_timeout(&dev->ctrl_up,
HZ);
- if (!timeout)
+ if (!timeout && dev->state == MSM_CTRL_DOWN)
return -ETIMEDOUT;
}
- msm_slim_get_ctrl(dev);
+ ret = msm_slim_get_ctrl(dev);
+ /*
+ * Runtime-pm's callbacks are not called until runtime-pm's
+ * error status is cleared
+ * Setting runtime status to suspended clears the error
+ * It also makes HW status cosistent with what SW has it here
+ */
+ if (ret == -ENETRESET && dev->state == MSM_CTRL_DOWN) {
+ pm_runtime_set_suspended(dev->dev);
+ msm_slim_put_ctrl(dev);
+ return -EREMOTEIO;
+ } else if (ret >= 0) {
+ dev->state = MSM_CTRL_AWAKE;
+ }
}
mutex_lock(&dev->tx_lock);
@@ -488,8 +557,10 @@
else
ret = txn->ec;
}
+
if (ret) {
- pr_err("master msg:0x%x,tid:%d ret:%d", txn->mc,
+ if (ret != -EREMOTEIO || txn->mc != SLIM_USR_MC_CHAN_CTRL)
+ pr_err("master msg:0x%x,tid:%d ret:%d", txn->mc,
txn->tid, ret);
mutex_lock(&ctrl->m_ctrl);
ctrl->txnt[txn->tid] = NULL;
@@ -615,7 +686,10 @@
txn.mc = SLIM_USR_MC_CHAN_CTRL;
txn.rl = txn.len + 4;
ret = ngd_xferandwait_ack(ctrl, &txn);
- if (ret)
+ /* HW restarting, channel removal should succeed */
+ if (ret == -EREMOTEIO)
+ return 0;
+ else if (ret)
return ret;
txn.mc = SLIM_USR_MC_RECONFIG_NOW;
@@ -731,6 +805,7 @@
ret = ngd_xfer_msg(&dev->ctrl, &txn);
if (!ret) {
enum msm_ctrl_state prev_state = dev->state;
+ pr_info("SLIM SAT: capability exchange successful");
dev->state = MSM_CTRL_AWAKE;
if (prev_state >= MSM_CTRL_ASLEEP)
complete(&dev->reconf);
@@ -802,7 +877,7 @@
static int ngd_slim_power_up(struct msm_slim_ctrl *dev)
{
void __iomem *ngd;
- int timeout, ret;
+ int timeout, ret = 0;
enum msm_ctrl_state cur_state = dev->state;
u32 laddr;
u32 ngd_int = (NGD_INT_TX_NACKED_2 |
@@ -817,10 +892,13 @@
pr_err("slimbus QMI init timed out");
}
- ret = msm_slim_qmi_power_request(dev, true);
- if (ret) {
- pr_err("SLIM QMI power request failed:%d", ret);
- return ret;
+ /* No need to vote if contorller is not in low power mode */
+ if (cur_state == MSM_CTRL_DOWN || cur_state == MSM_CTRL_ASLEEP) {
+ ret = msm_slim_qmi_power_request(dev, true);
+ if (ret) {
+ pr_err("SLIM QMI power request failed:%d", ret);
+ return ret;
+ }
}
if (!dev->ver) {
dev->ver = readl_relaxed(dev->base);
@@ -831,14 +909,35 @@
laddr = readl_relaxed(ngd + NGD_STATUS);
if (laddr & NGD_LADDR) {
/*
+ * external MDM restart case where ADSP itself was active framer
+ * For example, modem restarted when playback was active
+ */
+ if (cur_state == MSM_CTRL_AWAKE) {
+ pr_err("SLIM MDM restart: ADSP active framer:NO OP");
+ return 0;
+ }
+ /*
* ADSP power collapse case, where HW wasn't reset.
* Reconnect BAM pipes if disconnected
*/
ngd_slim_setup_msg_path(dev);
return 0;
- } else if (cur_state != MSM_CTRL_DOWN) {
- pr_info("ADSP P.C. CTRL state:%d NGD not enumerated:0x%x",
+ } else if (cur_state == MSM_CTRL_ASLEEP) {
+ pr_debug("ADSP P.C. CTRL state:%d NGD not enumerated:0x%x",
dev->state, laddr);
+ } else if (cur_state == MSM_CTRL_IDLE || cur_state == MSM_CTRL_AWAKE) {
+ /*
+ * external MDM SSR when only voice call is in progress.
+ * ADSP will reset slimbus HW. disconnect BAM pipes so that
+ * they can be connected after capability message is received.
+ * Set device state to ASLEEP to be synchronous with the HW
+ */
+ pr_err("SLIM MDM restart: MDM active framer: reinit HW");
+ dev->state = MSM_CTRL_ASLEEP;
+ msm_slim_disconnect_endp(dev, &dev->rx_msgq,
+ &dev->use_rx_msgqs);
+ msm_slim_disconnect_endp(dev, &dev->tx_msgq,
+ &dev->use_tx_msgqs);
}
/* ADSP SSR scenario, need to disconnect pipe before connecting */
if (dev->use_rx_msgqs == MSM_MSGQ_DOWN) {
@@ -869,7 +968,7 @@
timeout = wait_for_completion_timeout(&dev->reconf, HZ);
if (!timeout) {
- pr_err("failed to received master capability");
+ pr_err("Failed to receive master capability");
return -ETIMEDOUT;
}
if (cur_state == MSM_CTRL_DOWN)
@@ -972,11 +1071,13 @@
container_of(work, struct msm_slim_ctrl, slave_notify);
struct slim_controller *ctrl = &dev->ctrl;
struct slim_device *sbdev;
+ struct list_head *pos, *next;
int i;
slim_framer_booted(ctrl);
mutex_lock(&ctrl->m_ctrl);
- list_for_each_entry(sbdev, &ctrl->devs, dev_list) {
+ list_for_each_safe(pos, next, &ctrl->devs) {
int ret = 0;
+ sbdev = list_entry(pos, struct slim_device, dev_list);
mutex_unlock(&ctrl->m_ctrl);
for (i = 0; i < LADDR_RETRY; i++) {
ret = slim_get_logical_addr(sbdev, sbdev->e_addr,
@@ -1031,6 +1132,7 @@
struct resource *irq, *bam_irq;
enum apr_subsys_state q6_state;
bool rxreg_access = false;
+ bool slim_mdm = false;
q6_state = apr_get_q6_state();
if (q6_state == APR_SUBSYS_DOWN) {
@@ -1099,6 +1201,8 @@
&dev->pdata.apps_pipes);
of_property_read_u32(pdev->dev.of_node, "qcom,ea-pc",
&dev->pdata.eapc);
+ slim_mdm = of_property_read_bool(pdev->dev.of_node,
+ "qcom,slim-mdm");
} else {
dev->ctrl.nr = pdev->id;
}
@@ -1168,12 +1272,23 @@
pm_runtime_set_suspended(dev->dev);
pm_runtime_enable(dev->dev);
+ if (slim_mdm) {
+ dev->mdm.nb.notifier_call = mdm_ssr_notify_cb;
+ dev->mdm.ssr = subsys_notif_register_notifier("external_modem",
+ &dev->mdm.nb);
+ if (IS_ERR_OR_NULL(dev->mdm.ssr))
+ dev_err(dev->dev,
+ "subsys_notif_register_notifier failed %p",
+ dev->mdm.ssr);
+ }
+
INIT_WORK(&dev->slave_notify, ngd_laddr_lookup);
INIT_WORK(&dev->qmi.ssr_down, ngd_adsp_down);
INIT_WORK(&dev->qmi.ssr_up, ngd_adsp_up);
dev->qmi.nb.notifier_call = ngd_qmi_available;
pm_runtime_get_noresume(dev->dev);
ret = qmi_svc_event_notifier_register(SLIMBUS_QMI_SVC_ID,
+ SLIMBUS_QMI_SVC_V1,
SLIMBUS_QMI_INS_ID, &dev->qmi.nb);
if (ret) {
pr_err("Slimbus QMI service registration failed:%d", ret);
@@ -1201,6 +1316,7 @@
err_thread_create_failed:
qmi_svc_event_notifier_unregister(SLIMBUS_QMI_SVC_ID,
+ SLIMBUS_QMI_SVC_V1,
SLIMBUS_QMI_INS_ID, &dev->qmi.nb);
qmi_register_failed:
free_irq(dev->irq, dev);
@@ -1220,8 +1336,11 @@
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
ngd_slim_enable(dev, false);
qmi_svc_event_notifier_unregister(SLIMBUS_QMI_SVC_ID,
+ SLIMBUS_QMI_SVC_V1,
SLIMBUS_QMI_INS_ID, &dev->qmi.nb);
pm_runtime_disable(&pdev->dev);
+ if (!IS_ERR_OR_NULL(dev->mdm.ssr))
+ subsys_notif_unregister_notifier(dev->mdm.ssr, &dev->mdm.nb);
free_irq(dev->irq, dev);
slim_del_controller(&dev->ctrl);
kthread_stop(dev->rx_msgq_thread);
@@ -1234,6 +1353,10 @@
#ifdef CONFIG_PM_RUNTIME
static int ngd_slim_runtime_idle(struct device *device)
{
+ struct platform_device *pdev = to_platform_device(device);
+ struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
+ if (dev->state == MSM_CTRL_AWAKE)
+ dev->state = MSM_CTRL_IDLE;
dev_dbg(device, "pm_runtime: idle...\n");
pm_request_autosuspend(device);
return -EAGAIN;
@@ -1253,8 +1376,11 @@
if (dev->state >= MSM_CTRL_ASLEEP)
ret = slim_ctrl_clk_pause(&dev->ctrl, true, 0);
if (ret) {
- dev_err(device, "clk pause not exited:%d", ret);
- dev->state = MSM_CTRL_ASLEEP;
+ /* Did SSR cause this clock pause failure */
+ if (dev->state != MSM_CTRL_DOWN)
+ dev->state = MSM_CTRL_ASLEEP;
+ else
+ dev_err(device, "HW wakeup attempt during SSR");
} else {
dev->state = MSM_CTRL_AWAKE;
}
@@ -1267,7 +1393,6 @@
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
int ret = 0;
- dev->state = MSM_CTRL_SLEEPING;
ret = slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
if (ret) {
if (ret != -EBUSY)
@@ -1282,7 +1407,11 @@
static int ngd_slim_suspend(struct device *dev)
{
int ret = -EBUSY;
- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
+ struct platform_device *pdev = to_platform_device(dev);
+ struct msm_slim_ctrl *cdev = platform_get_drvdata(pdev);
+ if (!pm_runtime_enabled(dev) ||
+ (!pm_runtime_suspended(dev) &&
+ cdev->state == MSM_CTRL_IDLE)) {
dev_dbg(dev, "system suspend");
ret = ngd_slim_runtime_suspend(dev);
/*
diff --git a/drivers/slimbus/slim-msm.c b/drivers/slimbus/slim-msm.c
index 37bc883..5d30e54 100644
--- a/drivers/slimbus/slim-msm.c
+++ b/drivers/slimbus/slim-msm.c
@@ -69,7 +69,7 @@
if (ref <= 0)
dev_err(dev->dev, "reference count mismatch:%d", ref);
else
- pm_runtime_put(dev->dev);
+ pm_runtime_put_sync(dev->dev);
#endif
}
@@ -392,7 +392,7 @@
struct sps_pipe *pipe = endpoint->sps;
int ix = (buf - (u8 *)mem->base) / SLIM_MSGQ_BUF_LEN;
- u32 phys_addr = mem->phys_base + (SLIM_MSGQ_BUF_LEN * ix);
+ phys_addr_t phys_addr = mem->phys_base + (SLIM_MSGQ_BUF_LEN * ix);
for (ret = 0; ret < ((len + 3) >> 2); ret++)
pr_debug("BAM TX buf[%d]:0x%x", ret, ((u32 *)buf)[ret]);
@@ -425,7 +425,7 @@
}
/* Calculate buffer index */
- dev->tx_idx = (iovec.addr - mem->phys_base) / SLIM_MSGQ_BUF_LEN;
+ dev->tx_idx = ((int)(iovec.addr - mem->phys_base)) / SLIM_MSGQ_BUF_LEN;
return (u32 *)((u8 *)mem->base + (dev->tx_idx * SLIM_MSGQ_BUF_LEN));
}
@@ -500,9 +500,9 @@
/* Rx message queue buffers are 4 bytes in length */
u8 *virt_addr = mem->base + (4 * ix);
- u32 phys_addr = mem->phys_base + (4 * ix);
+ phys_addr_t phys_addr = mem->phys_base + (4 * ix);
- pr_debug("index:%d, phys:0x%x, virt:0x%p\n", ix, phys_addr, virt_addr);
+ pr_debug("index:%d, virt:0x%p\n", ix, virt_addr);
ret = sps_transfer_one(pipe, phys_addr, 4, virt_addr, flags);
if (ret)
@@ -884,11 +884,14 @@
#define SLIMBUS_QMI_SELECT_INSTANCE_RESP_V01 0x0020
#define SLIMBUS_QMI_POWER_REQ_V01 0x0021
#define SLIMBUS_QMI_POWER_RESP_V01 0x0021
+#define SLIMBUS_QMI_CHECK_FRAMER_STATUS_REQ 0x0022
+#define SLIMBUS_QMI_CHECK_FRAMER_STATUS_RESP 0x0022
#define SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN 7
#define SLIMBUS_QMI_POWER_RESP_MAX_MSG_LEN 7
#define SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN 14
#define SLIMBUS_QMI_SELECT_INSTANCE_RESP_MAX_MSG_LEN 7
+#define SLIMBUS_QMI_CHECK_FRAMER_STAT_RESP_MAX_MSG_LEN 7
enum slimbus_mode_enum_type_v01 {
/* To force a 32 bit signed enum. Do not change or use*/
@@ -936,6 +939,13 @@
struct qmi_response_type_v01 resp;
};
+struct slimbus_chkfrm_resp_msg {
+ /* Mandatory */
+ /* Result Code */
+ struct qmi_response_type_v01 resp;
+};
+
+
static struct elem_info slimbus_select_inst_req_msg_v01_ei[] = {
{
.data_type = QMI_UNSIGNED_4_BYTE,
@@ -1042,6 +1052,27 @@
},
};
+static struct elem_info slimbus_chkfrm_resp_msg_v01_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size = sizeof(struct qmi_response_type_v01),
+ .is_array = NO_ARRAY,
+ .tlv_type = 0x02,
+ .offset = offsetof(struct slimbus_chkfrm_resp_msg, resp),
+ .ei_array = get_qmi_response_type_v01_ei(),
+ },
+ {
+ .data_type = QMI_EOTI,
+ .elem_len = 0,
+ .elem_size = 0,
+ .is_array = NO_ARRAY,
+ .tlv_type = 0x00,
+ .offset = 0,
+ .ei_array = NULL,
+ },
+};
+
static void msm_slim_qmi_recv_msg(struct kthread_work *work)
{
int rc;
@@ -1174,6 +1205,7 @@
}
rc = qmi_connect_to_service(handle, SLIMBUS_QMI_SVC_ID,
+ SLIMBUS_QMI_SVC_V1,
SLIMBUS_QMI_INS_ID);
if (rc < 0) {
pr_err("%s: QMI server not found\n", __func__);
@@ -1231,3 +1263,32 @@
return msm_slim_qmi_send_power_request(dev, &req);
}
+
+int msm_slim_qmi_check_framer_request(struct msm_slim_ctrl *dev)
+{
+ struct slimbus_chkfrm_resp_msg resp = { { 0, 0 } };
+ struct msg_desc req_desc, resp_desc;
+ int rc;
+
+ req_desc.msg_id = SLIMBUS_QMI_CHECK_FRAMER_STATUS_REQ;
+ req_desc.max_msg_len = 0;
+ req_desc.ei_array = NULL;
+
+ resp_desc.msg_id = SLIMBUS_QMI_CHECK_FRAMER_STATUS_RESP;
+ resp_desc.max_msg_len = SLIMBUS_QMI_CHECK_FRAMER_STAT_RESP_MAX_MSG_LEN;
+ resp_desc.ei_array = slimbus_chkfrm_resp_msg_v01_ei;
+
+ rc = qmi_send_req_wait(dev->qmi.handle, &req_desc, NULL, 0,
+ &resp_desc, &resp, sizeof(resp), 5000);
+ if (rc < 0) {
+ dev_err(dev->dev, "%s: QMI send req failed %d\n", __func__, rc);
+ return rc;
+ }
+ /* Check the response */
+ if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
+ dev_err(dev->dev, "%s: QMI request failed 0x%x (%s)\n",
+ __func__, resp.resp.result, get_qmi_error(&resp.resp));
+ return -EREMOTEIO;
+ }
+ return 0;
+}
diff --git a/drivers/slimbus/slim-msm.h b/drivers/slimbus/slim-msm.h
index b5c41ed..5ffa300 100644
--- a/drivers/slimbus/slim-msm.h
+++ b/drivers/slimbus/slim-msm.h
@@ -16,6 +16,7 @@
#include <linux/irq.h>
#include <linux/kthread.h>
#include <mach/msm_qmi_interface.h>
+#include <mach/subsystem_notif.h>
/* Per spec.max 40 bytes per received message */
#define SLIM_MSGQ_BUF_LEN 40
@@ -82,7 +83,8 @@
/* Slimbus QMI service */
#define SLIMBUS_QMI_SVC_ID 0x0301
-#define SLIMBUS_QMI_INS_ID 1
+#define SLIMBUS_QMI_SVC_V1 1
+#define SLIMBUS_QMI_INS_ID 0
#define PGD_THIS_EE(r, v) ((v) ? PGD_THIS_EE_V2(r) : PGD_THIS_EE_V1(r))
#define PGD_PORT(r, p, v) ((v) ? PGD_PORT_V2(r, p) : PGD_PORT_V1(r, p))
@@ -168,7 +170,7 @@
enum msm_ctrl_state {
MSM_CTRL_AWAKE,
- MSM_CTRL_SLEEPING,
+ MSM_CTRL_IDLE,
MSM_CTRL_ASLEEP,
MSM_CTRL_DOWN,
};
@@ -205,6 +207,11 @@
struct work_struct ssr_up;
};
+struct msm_slim_mdm {
+ struct notifier_block nb;
+ void *ssr;
+};
+
struct msm_slim_pdata {
u32 apps_pipes;
u32 eapc;
@@ -253,6 +260,7 @@
struct work_struct slave_notify;
struct msm_slim_qmi qmi;
struct msm_slim_pdata pdata;
+ struct msm_slim_mdm mdm;
};
struct msm_sat_chan {
@@ -317,4 +325,5 @@
void msm_slim_qmi_exit(struct msm_slim_ctrl *dev);
int msm_slim_qmi_init(struct msm_slim_ctrl *dev, bool apps_is_master);
int msm_slim_qmi_power_request(struct msm_slim_ctrl *dev, bool active);
+int msm_slim_qmi_check_framer_request(struct msm_slim_ctrl *dev);
#endif
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index f6594c8..fc7c550 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -288,37 +288,27 @@
static void slim_report(struct work_struct *work)
{
- u8 laddr;
- int ret, i;
struct slim_driver *sbdrv;
struct slim_device *sbdev =
container_of(work, struct slim_device, wd);
- struct slim_controller *ctrl = sbdev->ctrl;
if (!sbdev->dev.driver)
return;
/* check if device-up or down needs to be called */
- mutex_lock(&ctrl->m_ctrl);
- /* address no longer valid, means device reported absent */
- for (i = 0; i < ctrl->num_dev; i++) {
- if (sbdev->laddr == ctrl->addrt[i].laddr &&
- ctrl->addrt[i].valid == false &&
- sbdev->notified)
- break;
- }
- mutex_unlock(&ctrl->m_ctrl);
+ if ((!sbdev->reported && !sbdev->notified) ||
+ (sbdev->reported && sbdev->notified))
+ return;
+
sbdrv = to_slim_driver(sbdev->dev.driver);
- if (i < ctrl->num_dev) {
+ /*
+ * address no longer valid, means device reported absent, whereas
+ * address valid, means device reported present
+ */
+ if (sbdev->notified && !sbdev->reported) {
sbdev->notified = false;
if (sbdrv->device_down)
sbdrv->device_down(sbdev);
- return;
- }
- if (sbdev->notified)
- return;
- ret = slim_get_logical_addr(sbdev, sbdev->e_addr, 6, &laddr);
- if (!ret) {
- if (sbdrv)
- sbdev->notified = true;
+ } else if (!sbdev->notified && sbdev->reported) {
+ sbdev->notified = true;
if (sbdrv->device_up)
sbdrv->device_up(sbdev);
}
@@ -645,6 +635,7 @@
ctrl->addrt[i].valid = false;
}
mutex_unlock(&ctrl->m_ctrl);
+ sbdev->reported = false;
queue_work(ctrl->wq, &sbdev->wd);
}
EXPORT_SYMBOL(slim_report_absent);
@@ -803,6 +794,8 @@
u8 i = 0;
bool exists = false;
struct slim_device *sbdev;
+ struct list_head *pos, *next;
+
mutex_lock(&ctrl->m_ctrl);
/* already assigned */
if (ctrl_getlogical_addr(ctrl, e_addr, e_len, &i) == 0) {
@@ -852,10 +845,12 @@
pr_info("slimbus:%d laddr:0x%x, EAPC:0x%x:0x%x", ctrl->nr, *laddr,
e_addr[1], e_addr[2]);
mutex_lock(&ctrl->m_ctrl);
- list_for_each_entry(sbdev, &ctrl->devs, dev_list) {
+ list_for_each_safe(pos, next, &ctrl->devs) {
+ sbdev = list_entry(pos, struct slim_device, dev_list);
if (memcmp(sbdev->e_addr, e_addr, 6) == 0) {
struct slim_driver *sbdrv;
sbdev->laddr = *laddr;
+ sbdev->reported = true;
if (sbdev->dev.driver) {
sbdrv = to_slim_driver(sbdev->dev.driver);
if (sbdrv->device_up)
@@ -1555,7 +1550,8 @@
for (j = *len - 1; j > i; j--)
arr[j] = arr[j - 1];
arr[i] = slc;
- ctrl->sched.usedslots += sl;
+ if (!ctrl->allocbw)
+ ctrl->sched.usedslots += sl;
return;
}
@@ -2661,7 +2657,8 @@
u32 sl = slc->seglen << slc->rootexp;
if (slc->coeff == SLIM_COEFF_3)
sl *= 3;
- ctrl->sched.usedslots -= sl;
+ if (!ctrl->allocbw)
+ ctrl->sched.usedslots -= sl;
slim_remove_ch(ctrl, slc);
slc->state = SLIM_CH_DEFINED;
}
@@ -2682,7 +2679,8 @@
if (revert || slc->def > 0) {
if (slc->coeff == SLIM_COEFF_3)
sl *= 3;
- ctrl->sched.usedslots += sl;
+ if (!ctrl->allocbw)
+ ctrl->sched.usedslots += sl;
if (revert)
slc->def++;
slc->state = SLIM_CH_ACTIVE;
@@ -2776,7 +2774,8 @@
u32 sl = slc->seglen << slc->rootexp;
if (slc->coeff == SLIM_COEFF_3)
sl *= 3;
- ctrl->sched.usedslots -= sl;
+ if (!ctrl->allocbw)
+ ctrl->sched.usedslots -= sl;
slc->state = SLIM_CH_PENDING_REMOVAL;
}
list_for_each_entry(pch, &sb->mark_suspend, pending) {
@@ -3038,7 +3037,7 @@
pch = list_entry(pos,
struct slim_pending_ch,
pending);
- if (pch->chan == slc->chan) {
+ if (pch->chan == chan) {
list_del(&pch->pending);
kfree(pch);
add_mark_removal = false;
@@ -3131,8 +3130,15 @@
*/
if (ctrl->clk_state == SLIM_CLK_PAUSED && ctrl->wakeup)
ret = ctrl->wakeup(ctrl);
+ /*
+ * If wakeup fails, make sure that next attempt can succeed.
+ * Since we already consumed pause_comp, complete it so
+ * that next wakeup isn't blocked forever
+ */
if (!ret)
ctrl->clk_state = SLIM_CLK_ACTIVE;
+ else
+ complete(&ctrl->pause_comp);
mutex_unlock(&ctrl->m_ctrl);
return ret;
} else {
diff --git a/drivers/spi/spi_qsd.c b/drivers/spi/spi_qsd.c
index 45400cb..39e81fa 100644
--- a/drivers/spi/spi_qsd.c
+++ b/drivers/spi/spi_qsd.c
@@ -1167,10 +1167,8 @@
if ((!dd->read_buf || op & SPI_OP_MAX_INPUT_DONE_FLAG) &&
(!dd->write_buf || op & SPI_OP_MAX_OUTPUT_DONE_FLAG)) {
msm_spi_ack_transfer(dd);
- if (dd->rx_unaligned_len == 0) {
if (atomic_inc_return(&dd->rx_irq_called) == 1)
return IRQ_HANDLED;
- }
msm_spi_complete(dd);
return IRQ_HANDLED;
}
diff --git a/drivers/spmi/spmi-dbgfs.c b/drivers/spmi/spmi-dbgfs.c
index 27df09333..b0a354b 100644
--- a/drivers/spmi/spmi-dbgfs.c
+++ b/drivers/spmi/spmi-dbgfs.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -48,9 +48,9 @@
/* Log buffer */
struct spmi_log_buffer {
- u32 rpos; /* Current 'read' position in buffer */
- u32 wpos; /* Current 'write' position in buffer */
- u32 len; /* Length of the buffer */
+ size_t rpos; /* Current 'read' position in buffer */
+ size_t wpos; /* Current 'write' position in buffer */
+ size_t len; /* Length of the buffer */
char data[0]; /* Log buffer */
};
@@ -583,10 +583,10 @@
pr_debug("Creating SPMI debugfs file-system\n");
root = debugfs_create_dir(DFS_ROOT_NAME, NULL);
- if (IS_ERR(root)) {
+ if (IS_ERR_OR_NULL(root)) {
pr_err("Error creating top level directory err:%ld",
(long)root);
- if ((int)root == -ENODEV)
+ if (PTR_ERR(root) == -ENODEV)
pr_err("debugfs is not enabled in the kernel");
return NULL;
}
diff --git a/drivers/spmi/spmi.c b/drivers/spmi/spmi.c
index 348ed3e..43f2710 100644
--- a/drivers/spmi/spmi.c
+++ b/drivers/spmi/spmi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -809,8 +809,8 @@
if (ret)
goto exit;
- dev_dbg(&ctrl->dev, "Bus spmi-%d registered: dev:%x\n",
- ctrl->nr, (u32)&ctrl->dev);
+ dev_dbg(&ctrl->dev, "Bus spmi-%d registered: dev:0x%p\n",
+ ctrl->nr, &ctrl->dev);
spmi_dfs_add_controller(ctrl);
return 0;
diff --git a/drivers/staging/android/ashmem.c b/drivers/staging/android/ashmem.c
index 42a5a71..7ca247a 100644
--- a/drivers/staging/android/ashmem.c
+++ b/drivers/staging/android/ashmem.c
@@ -224,21 +224,29 @@
/* If size is not set, or set to 0, always return EOF. */
if (asma->size == 0)
- goto out;
+ goto out_unlock;
if (!asma->file) {
ret = -EBADF;
- goto out;
+ goto out_unlock;
}
+ mutex_unlock(&ashmem_mutex);
+
+ /*
+ * asma and asma->file are used outside the lock here. We assume
+ * once asma->file is set it will never be changed, and will not
+ * be destroyed until all references to the file are dropped and
+ * ashmem_release is called.
+ */
ret = asma->file->f_op->read(asma->file, buf, len, pos);
- if (ret < 0)
- goto out;
+ if (ret >= 0) {
+ /** Update backing file pos, since f_ops->read() doesn't */
+ asma->file->f_pos = *pos;
+ }
+ return ret;
- /** Update backing file pos, since f_ops->read() doesn't */
- asma->file->f_pos = *pos;
-
-out:
+out_unlock:
mutex_unlock(&ashmem_mutex);
return ret;
}
@@ -406,50 +414,68 @@
static int set_name(struct ashmem_area *asma, void __user *name)
{
+ int len;
int ret = 0;
+ char local_name[ASHMEM_NAME_LEN];
+ /*
+ * Holding the ashmem_mutex while doing a copy_from_user might cause
+ * an data abort which would try to access mmap_sem. If another
+ * thread has invoked ashmem_mmap then it will be holding the
+ * semaphore and will be waiting for ashmem_mutex, there by leading to
+ * deadlock. We'll release the mutex and take the name to a local
+ * variable that does not need protection and later copy the local
+ * variable to the structure member with lock held.
+ */
+ len = strncpy_from_user(local_name, name, ASHMEM_NAME_LEN);
+ if (len < 0)
+ return len;
+ if (len == ASHMEM_NAME_LEN)
+ local_name[ASHMEM_NAME_LEN - 1] = '\0';
mutex_lock(&ashmem_mutex);
-
/* cannot change an existing mapping's name */
- if (unlikely(asma->file)) {
+ if (unlikely(asma->file))
ret = -EINVAL;
- goto out;
- }
+ else
+ strcpy(asma->name + ASHMEM_NAME_PREFIX_LEN, local_name);
- if (unlikely(copy_from_user(asma->name + ASHMEM_NAME_PREFIX_LEN,
- name, ASHMEM_NAME_LEN)))
- ret = -EFAULT;
- asma->name[ASHMEM_FULL_NAME_LEN-1] = '\0';
-
-out:
mutex_unlock(&ashmem_mutex);
-
return ret;
}
static int get_name(struct ashmem_area *asma, void __user *name)
{
int ret = 0;
+ size_t len;
+ /*
+ * Have a local variable to which we'll copy the content
+ * from asma with the lock held. Later we can copy this to the user
+ * space safely without holding any locks. So even if we proceed to
+ * wait for mmap_sem, it won't lead to deadlock.
+ */
+ char local_name[ASHMEM_NAME_LEN];
mutex_lock(&ashmem_mutex);
if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0') {
- size_t len;
/*
* Copying only `len', instead of ASHMEM_NAME_LEN, bytes
* prevents us from revealing one user's stack to another.
*/
len = strlen(asma->name + ASHMEM_NAME_PREFIX_LEN) + 1;
- if (unlikely(copy_to_user(name,
- asma->name + ASHMEM_NAME_PREFIX_LEN, len)))
- ret = -EFAULT;
+ memcpy(local_name, asma->name + ASHMEM_NAME_PREFIX_LEN, len);
} else {
- if (unlikely(copy_to_user(name, ASHMEM_NAME_DEF,
- sizeof(ASHMEM_NAME_DEF))))
- ret = -EFAULT;
+ len = sizeof(ASHMEM_NAME_DEF);
+ memcpy(local_name, ASHMEM_NAME_DEF, len);
}
mutex_unlock(&ashmem_mutex);
+ /*
+ * Now we are just copying from the stack variable to userland
+ * No lock held
+ */
+ if (unlikely(copy_to_user(name, local_name, len)))
+ ret = -EFAULT;
return ret;
}
diff --git a/drivers/thermal/msm_thermal.c b/drivers/thermal/msm_thermal.c
index c366086..73513ec 100644
--- a/drivers/thermal/msm_thermal.c
+++ b/drivers/thermal/msm_thermal.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -156,7 +156,7 @@
#define VDD_RES_RO_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 444; \
+ ko_attr.attr.mode = 0444; \
ko_attr.show = vdd_rstr_reg_##_name##_show; \
ko_attr.store = NULL; \
sysfs_attr_init(&ko_attr.attr); \
@@ -164,7 +164,7 @@
#define VDD_RES_RW_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 644; \
+ ko_attr.attr.mode = 0644; \
ko_attr.show = vdd_rstr_reg_##_name##_show; \
ko_attr.store = vdd_rstr_reg_##_name##_store; \
sysfs_attr_init(&ko_attr.attr); \
@@ -181,7 +181,7 @@
#define OCR_RW_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 644; \
+ ko_attr.attr.mode = 0644; \
ko_attr.show = ocr_reg_##_name##_show; \
ko_attr.store = ocr_reg_##_name##_store; \
sysfs_attr_init(&ko_attr.attr); \
@@ -189,7 +189,7 @@
#define PSM_RW_ATTRIB(_rail, ko_attr, j, _name) \
ko_attr.attr.name = __stringify(_name); \
- ko_attr.attr.mode = 644; \
+ ko_attr.attr.mode = 0644; \
ko_attr.show = psm_reg_##_name##_show; \
ko_attr.store = psm_reg_##_name##_store; \
sysfs_attr_init(&ko_attr.attr); \
@@ -425,7 +425,7 @@
static struct vdd_rstr_enable vdd_rstr_en = {
.ko_attr.attr.name = __stringify(enabled),
- .ko_attr.attr.mode = 644,
+ .ko_attr.attr.mode = 0644,
.ko_attr.show = vdd_rstr_en_show,
.ko_attr.store = vdd_rstr_en_store,
.enabled = 1,
@@ -1769,6 +1769,18 @@
int ret = 0;
uint32_t cpu;
+ for_each_possible_cpu(cpu) {
+ cpus[cpu].cpu = cpu;
+ cpus[cpu].offline = 0;
+ cpus[cpu].user_offline = 0;
+ cpus[cpu].hotplug_thresh_clear = false;
+ cpus[cpu].max_freq = false;
+ cpus[cpu].user_max_freq = UINT_MAX;
+ cpus[cpu].user_min_freq = 0;
+ cpus[cpu].limited_max_freq = UINT_MAX;
+ cpus[cpu].limited_min_freq = 0;
+ cpus[cpu].freq_thresh_clear = false;
+ }
BUG_ON(!pdata);
tsens_get_max_sensor_num(&max_tsens_num);
memcpy(&msm_thermal_info, pdata, sizeof(struct msm_thermal_data));
@@ -1779,10 +1791,6 @@
return -EINVAL;
enabled = 1;
- for_each_possible_cpu(cpu) {
- cpus[cpu].limited_max_freq = UINT_MAX;
- cpus[cpu].limited_min_freq = 0;
- }
ret = cpufreq_register_notifier(&msm_thermal_cpufreq_notifier,
CPUFREQ_POLICY_NOTIFIER);
if (ret)
@@ -2426,17 +2434,13 @@
key = "qcom,cpu-sensors";
cpu_cnt = of_property_count_strings(node, key);
- if (cpu_cnt != num_possible_cpus()) {
- pr_err("%s: Wrong number of cpu\n", KBUILD_MODNAME);
+ if (cpu_cnt < num_possible_cpus()) {
+ pr_err("%s: Wrong number of cpu sensors\n", KBUILD_MODNAME);
ret = -EINVAL;
goto hotplug_node_fail;
}
for_each_possible_cpu(cpu) {
- cpus[cpu].cpu = cpu;
- cpus[cpu].offline = 0;
- cpus[cpu].user_offline = 0;
- cpus[cpu].hotplug_thresh_clear = false;
ret = of_property_read_string_index(node, key, cpu,
&cpus[cpu].sensor_type);
if (ret)
@@ -2470,7 +2474,6 @@
{
char *key = NULL;
int ret = 0;
- uint32_t cpu;
key = "qcom,freq-mitigation-temp";
ret = of_property_read_u32(node, key, &data->freq_mitig_temp_degc);
@@ -2494,14 +2497,6 @@
goto PROBE_FREQ_EXIT;
freq_mitigation_enabled = 1;
- for_each_possible_cpu(cpu) {
- cpus[cpu].max_freq = false;
- cpus[cpu].user_max_freq = UINT_MAX;
- cpus[cpu].user_min_freq = 0;
- cpus[cpu].limited_max_freq = UINT_MAX;
- cpus[cpu].limited_min_freq = 0;
- cpus[cpu].freq_thresh_clear = false;
- }
PROBE_FREQ_EXIT:
if (ret) {
diff --git a/drivers/thermal/qpnp-adc-tm.c b/drivers/thermal/qpnp-adc-tm.c
index efb87a9..eb647fa 100644
--- a/drivers/thermal/qpnp-adc-tm.c
+++ b/drivers/thermal/qpnp-adc-tm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -471,16 +471,30 @@
struct qpnp_adc_tm_chip *chip, uint32_t btm_chan,
struct qpnp_vadc_chan_properties *chan_prop)
{
- int rc;
- u8 meas_interval_timer2 = 0;
+ int rc, chan_idx = 0, i = 0;
+ bool chan_found = false;
+ u8 meas_interval_timer2 = 0, timer_interval_store = 0;
uint32_t btm_chan_idx = 0;
- /* Configure kernel clients to timer1 */
- switch (chan_prop->timer_select) {
+ while (i < chip->max_channels_available) {
+ if (chip->sensor[i].btm_channel_num == btm_chan) {
+ chan_idx = i;
+ chan_found = true;
+ i++;
+ } else
+ i++;
+ }
+
+ if (!chan_found) {
+ pr_err("Channel not found\n");
+ return -EINVAL;
+ }
+
+ switch (chip->sensor[chan_idx].timer_select) {
case ADC_MEAS_TIMER_SELECT1:
rc = qpnp_adc_tm_write_reg(chip,
QPNP_ADC_TM_MEAS_INTERVAL_CTL,
- chan_prop->meas_interval1);
+ chip->sensor[chan_idx].meas_interval);
if (rc < 0) {
pr_err("timer1 configure failed\n");
return rc;
@@ -495,9 +509,10 @@
pr_err("timer2 configure read failed\n");
return rc;
}
- meas_interval_timer2 |=
- (chan_prop->meas_interval2 <<
- QPNP_ADC_TM_MEAS_INTERVAL_CTL2_SHIFT);
+ timer_interval_store = chip->sensor[chan_idx].meas_interval;
+ timer_interval_store <<= QPNP_ADC_TM_MEAS_INTERVAL_CTL2_SHIFT;
+ timer_interval_store &= QPNP_ADC_TM_MEAS_INTERVAL_CTL2_MASK;
+ meas_interval_timer2 |= timer_interval_store;
rc = qpnp_adc_tm_write_reg(chip,
QPNP_ADC_TM_MEAS_INTERVAL_CTL2,
meas_interval_timer2);
@@ -514,8 +529,9 @@
pr_err("timer3 read failed\n");
return rc;
}
- chan_prop->meas_interval2 = ADC_MEAS3_INTERVAL_1S;
- meas_interval_timer2 |= chan_prop->meas_interval2;
+ timer_interval_store = chip->sensor[chan_idx].meas_interval;
+ timer_interval_store &= QPNP_ADC_TM_MEAS_INTERVAL_CTL3_MASK;
+ meas_interval_timer2 |= timer_interval_store;
rc = qpnp_adc_tm_write_reg(chip,
QPNP_ADC_TM_MEAS_INTERVAL_CTL2,
meas_interval_timer2);
@@ -535,7 +551,18 @@
pr_err("Invalid btm channel idx\n");
return rc;
}
- adc_tm_data[btm_chan_idx].meas_interval_ctl = chan_prop->timer_select;
+ rc = qpnp_adc_tm_write_reg(chip,
+ adc_tm_data[btm_chan_idx].meas_interval_ctl,
+ chip->sensor[chan_idx].timer_select);
+ if (rc < 0) {
+ pr_err("TM channel timer configure failed\n");
+ return rc;
+ }
+
+ pr_debug("timer select:%d, timer_value_within_select:%d, channel:%x\n",
+ chip->sensor[chan_idx].timer_select,
+ chip->sensor[chan_idx].meas_interval,
+ btm_chan);
return rc;
}
@@ -954,10 +981,6 @@
chip->adc->adc_channels[channel].fast_avg_setup;
chip->adc->amux_prop->mode_sel =
ADC_OP_MEASUREMENT_INTERVAL << QPNP_OP_MODE_SHIFT;
- chip->adc->amux_prop->chan_prop->timer_select =
- ADC_MEAS_TIMER_SELECT1;
- chip->adc->amux_prop->chan_prop->meas_interval1 =
- ADC_MEAS1_INTERVAL_1S;
chip->adc->amux_prop->chan_prop->low_thr = adc_tm->low_thr;
chip->adc->amux_prop->chan_prop->high_thr = adc_tm->high_thr;
chip->adc->amux_prop->chan_prop->tm_channel_select =
@@ -1673,8 +1696,6 @@
chip->adc->adc_channels[dt_index].fast_avg_setup;
chip->adc->amux_prop->mode_sel =
ADC_OP_MEASUREMENT_INTERVAL << QPNP_OP_MODE_SHIFT;
- chip->adc->amux_prop->chan_prop->meas_interval1 =
- ADC_MEAS1_INTERVAL_1S;
adc_tm_rscale_fn[scale_type].chan(chip->vadc_dev, param,
&chip->adc->amux_prop->chan_prop->low_thr,
&chip->adc->amux_prop->chan_prop->high_thr);
@@ -1682,8 +1703,6 @@
chip->adc->amux_prop->chan_prop);
chip->adc->amux_prop->chan_prop->tm_channel_select =
chip->sensor[dt_index].btm_channel_num;
- chip->adc->amux_prop->chan_prop->timer_select =
- ADC_MEAS_TIMER_SELECT1;
chip->adc->amux_prop->chan_prop->state_request =
param->state_request;
rc = qpnp_adc_tm_configure(chip, chip->adc->amux_prop);
@@ -1880,7 +1899,7 @@
for_each_child_of_node(node, child) {
char name[25];
- int btm_channel_num;
+ int btm_channel_num, timer_select = 0;
rc = of_property_read_u32(child,
"qcom,btm-channel-number", &btm_channel_num);
@@ -1888,6 +1907,28 @@
pr_err("Invalid btm channel number\n");
goto fail;
}
+ rc = of_property_read_u32(child,
+ "qcom,meas-interval-timer-idx", &timer_select);
+ if (rc) {
+ pr_debug("Default to timer1 with interval of 1 sec\n");
+ chip->sensor[sen_idx].timer_select =
+ ADC_MEAS_TIMER_SELECT1;
+ chip->sensor[sen_idx].meas_interval =
+ ADC_MEAS1_INTERVAL_1S;
+ } else {
+ if (timer_select >= ADC_MEAS_TIMER_NUM) {
+ pr_err("Invalid timer selection number\n");
+ goto fail;
+ }
+ chip->sensor[sen_idx].timer_select = timer_select;
+ if (timer_select == ADC_MEAS_TIMER_SELECT2)
+ chip->sensor[sen_idx].meas_interval =
+ ADC_MEAS2_INTERVAL_500MS;
+ if (timer_select == ADC_MEAS_TIMER_SELECT3)
+ chip->sensor[sen_idx].meas_interval =
+ ADC_MEAS3_INTERVAL_4S;
+ }
+
chip->sensor[sen_idx].btm_channel_num = btm_channel_num;
chip->sensor[sen_idx].vadc_channel_num =
chip->adc->adc_channels[sen_idx].channel_num;
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c
index 739696d..21863e8 100644
--- a/drivers/thermal/thermal_sys.c
+++ b/drivers/thermal/thermal_sys.c
@@ -70,16 +70,19 @@
list_for_each_entry_safe(pos, var, &sensor_info_list, sensor_list) {
if (pos->sensor_id == sensor_id)
- break;
+ return pos;
}
- return pos;
+ return NULL;
}
int sensor_get_id(char *name)
{
struct sensor_info *pos, *var;
+ if (!name)
+ return -ENODEV;
+
list_for_each_entry_safe(pos, var, &sensor_info_list, sensor_list) {
if (!strcmp(pos->tz->type, name))
return pos->sensor_id;
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
index ecfacc0..066419f 100644
--- a/drivers/tty/serial/msm_serial_hs.c
+++ b/drivers/tty/serial/msm_serial_hs.c
@@ -551,6 +551,25 @@
writel_relaxed(value, uport->membase + offset);
}
+static int sps_rx_disconnect(struct sps_pipe *sps_pipe_handler)
+{
+ struct sps_connect config;
+ int ret;
+
+ ret = sps_get_config(sps_pipe_handler, &config);
+ if (ret) {
+ pr_err("%s: sps_get_config() failed ret %d\n", __func__, ret);
+ return ret;
+ }
+ config.options |= SPS_O_POLL;
+ ret = sps_set_config(sps_pipe_handler, &config);
+ if (ret) {
+ pr_err("%s: sps_set_config() failed ret %d\n", __func__, ret);
+ return ret;
+ }
+ return sps_disconnect(sps_pipe_handler);
+}
+
static void hex_dump_ipc(char *prefix, char *string, int size)
{
char linebuf[512];
@@ -1191,7 +1210,7 @@
ret = wait_event_timeout(msm_uport->rx.wait,
msm_uport->rx_bam_inprogress == false,
RX_FLUSH_COMPLETE_TIMEOUT);
- ret = sps_disconnect(sps_pipe_handle);
+ ret = sps_rx_disconnect(sps_pipe_handle);
if (ret)
MSM_HS_ERR("%s(): sps_disconnect failed\n",
__func__);
@@ -1275,7 +1294,7 @@
struct sps_pipe *sps_pipe_handle = rx->prod.pipe_handle;
int ret = 0;
- ret = sps_disconnect(sps_pipe_handle);
+ ret = sps_rx_disconnect(sps_pipe_handle);
if (ret)
MSM_HS_ERR("%s(): sps_disconnect failed\n", __func__);
@@ -2529,6 +2548,8 @@
/* Initialize the tx */
tx->tx_ready_int_en = 0;
tx->dma_in_flight = 0;
+ msm_uport->tty_flush_receive = false;
+ MSM_HS_DBG("%s: Setting tty_flush_receive to false\n", __func__);
if (!is_blsp_uart(msm_uport)) {
tx->xfer.complete_func = msm_hs_dmov_tx_callback;
diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c
index a783d53..0470194 100644
--- a/drivers/uio/uio.c
+++ b/drivers/uio/uio.c
@@ -640,38 +640,58 @@
return 0;
}
-static const struct vm_operations_struct uio_vm_ops = {
+static const struct vm_operations_struct uio_logical_vm_ops = {
.open = uio_vma_open,
.close = uio_vma_close,
.fault = uio_vma_fault,
};
+static int uio_mmap_logical(struct vm_area_struct *vma)
+{
+ vma->vm_flags |= VM_DONTEXPAND | VM_NODUMP;
+ vma->vm_ops = &uio_logical_vm_ops;
+ uio_vma_open(vma);
+ return 0;
+}
+
+static const struct vm_operations_struct uio_physical_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys,
+#endif
+};
+
static int uio_mmap_physical(struct vm_area_struct *vma)
{
struct uio_device *idev = vma->vm_private_data;
int mi = uio_find_mem_index(vma);
+ struct uio_mem *mem;
if (mi < 0)
return -EINVAL;
+ mem = idev->info->mem + mi;
- vma->vm_flags |= VM_IO | VM_RESERVED;
+ if (vma->vm_end - vma->vm_start > mem->size)
+ return -EINVAL;
+ vma->vm_ops = &uio_physical_vm_ops;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ /*
+ * We cannot use the vm_iomap_memory() helper here,
+ * because vma->vm_pgoff is the map index we looked
+ * up above in uio_find_mem_index(), rather than an
+ * actual page offset into the mmap.
+ *
+ * So we just do the physical mmap without a page
+ * offset.
+ */
+
return remap_pfn_range(vma,
vma->vm_start,
- idev->info->mem[mi].addr >> PAGE_SHIFT,
+ mem->addr >> PAGE_SHIFT,
vma->vm_end - vma->vm_start,
vma->vm_page_prot);
}
-static int uio_mmap_logical(struct vm_area_struct *vma)
-{
- vma->vm_flags |= VM_RESERVED;
- vma->vm_ops = &uio_vm_ops;
- uio_vma_open(vma);
- return 0;
-}
-
static int uio_mmap(struct file *filep, struct vm_area_struct *vma)
{
struct uio_listener *listener = filep->private_data;
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
index a2580fc..a192398 100644
--- a/drivers/usb/dwc3/debugfs.c
+++ b/drivers/usb/dwc3/debugfs.c
@@ -794,9 +794,9 @@
.release = single_release,
};
-static unsigned int ep_addr_rxdbg_mask;
+static unsigned int ep_addr_rxdbg_mask = 1;
module_param(ep_addr_rxdbg_mask, uint, S_IRUGO | S_IWUSR);
-static unsigned int ep_addr_txdbg_mask;
+static unsigned int ep_addr_txdbg_mask = 1;
module_param(ep_addr_txdbg_mask, uint, S_IRUGO | S_IWUSR);
/* Maximum debug message length */
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index 97592c4..0e371d5 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -217,6 +217,7 @@
struct qpnp_adc_tm_chip *adc_tm_dev;
struct delayed_work init_adc_work;
bool id_adc_detect;
+ struct qpnp_vadc_chip *vadc_dev;
u8 dcd_retries;
u32 bus_perf_client;
struct msm_bus_scale_pdata *bus_scale_table;
@@ -1512,6 +1513,7 @@
case DWC3_CONTROLLER_ERROR_EVENT:
dev_info(mdwc->dev, "DWC3_CONTROLLER_ERROR_EVENT received\n");
dwc3_msm_dump_phy_info(mdwc);
+ dwc3_msm_write_reg(mdwc->base, DWC3_DEVTEN, 0);
/*
* schedule work for doing block reset for recovery from erratic
* error event.
@@ -1567,10 +1569,23 @@
{
struct dwc3_msm *mdwc = container_of(w, struct dwc3_msm,
usb_block_reset_work);
+ u32 reg;
dev_dbg(mdwc->dev, "%s\n", __func__);
dwc3_msm_block_reset(&mdwc->ext_xceiv, true);
+
+ reg = (DWC3_DEVTEN_EVNTOVERFLOWEN |
+ DWC3_DEVTEN_CMDCMPLTEN |
+ DWC3_DEVTEN_ERRTICERREN |
+ DWC3_DEVTEN_WKUPEVTEN |
+ DWC3_DEVTEN_ULSTCNGEN |
+ DWC3_DEVTEN_CONNECTDONEEN |
+ DWC3_DEVTEN_USBRSTEN |
+ DWC3_DEVTEN_DISCONNEVTEN);
+ dwc3_msm_write_reg(mdwc->base, DWC3_DEVTEN, reg);
+
+
}
static void dwc3_chg_enable_secondary_det(struct dwc3_msm *mdwc)
@@ -1791,6 +1806,11 @@
return;
}
+ /* Skip if charger type was already detected externally */
+ if (mdwc->chg_state == USB_CHG_STATE_DETECTED &&
+ charger->chg_type != DWC3_INVALID_CHARGER)
+ return;
+
mdwc->chg_state = USB_CHG_STATE_UNDEFINED;
charger->chg_type = DWC3_INVALID_CHARGER;
queue_delayed_work(system_nrt_wq, &mdwc->chg_work, 0);
@@ -2239,6 +2259,27 @@
return IRQ_HANDLED;
}
+static int
+get_prop_usbin_voltage_now(struct dwc3_msm *mdwc)
+{
+ int rc = 0;
+ struct qpnp_vadc_result results;
+
+ if (IS_ERR_OR_NULL(mdwc->vadc_dev)) {
+ mdwc->vadc_dev = qpnp_get_vadc(mdwc->dev, "usbin");
+ if (IS_ERR(mdwc->vadc_dev))
+ return PTR_ERR(mdwc->vadc_dev);
+ }
+
+ rc = qpnp_vadc_read(mdwc->vadc_dev, USBIN, &results);
+ if (rc) {
+ pr_err("Unable to read usbin rc=%d\n", rc);
+ return 0;
+ } else {
+ return results.physical;
+ }
+}
+
static int dwc3_msm_power_get_property_usb(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
@@ -2264,6 +2305,9 @@
case POWER_SUPPLY_PROP_TYPE:
val->intval = psy->type;
break;
+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+ val->intval = get_prop_usbin_voltage_now(mdwc);
+ break;
default:
return -EINVAL;
}
@@ -2372,6 +2416,7 @@
POWER_SUPPLY_PROP_CURRENT_MAX,
POWER_SUPPLY_PROP_TYPE,
POWER_SUPPLY_PROP_SCOPE,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
};
static void dwc3_init_adc_work(struct work_struct *w);
@@ -2616,6 +2661,30 @@
pm_runtime_put(mdwc->dev);
}
break;
+ case MSM_USB_EXT_CHG_VOLTAGE_INFO:
+ if (get_user(val, (int __user *)arg)) {
+ pr_err("%s: get_user failed\n\n", __func__);
+ ret = -EFAULT;
+ break;
+ }
+
+ if (val == USB_REQUEST_5V)
+ pr_debug("%s:voting 5V voltage request\n", __func__);
+ else if (val == USB_REQUEST_9V)
+ pr_debug("%s:voting 9V voltage request\n", __func__);
+ break;
+ case MSM_USB_EXT_CHG_RESULT:
+ if (get_user(val, (int __user *)arg)) {
+ pr_err("%s: get_user failed\n\n", __func__);
+ ret = -EFAULT;
+ break;
+ }
+
+ if (!val)
+ pr_debug("%s:voltage request successful\n", __func__);
+ else
+ pr_debug("%s:voltage request failed\n", __func__);
+ break;
default:
ret = -EINVAL;
}
diff --git a/drivers/usb/dwc3/dwc3_otg.c b/drivers/usb/dwc3/dwc3_otg.c
index cacd635..8a034d6 100644
--- a/drivers/usb/dwc3/dwc3_otg.c
+++ b/drivers/usb/dwc3/dwc3_otg.c
@@ -197,6 +197,14 @@
if (on) {
dev_dbg(otg->phy->dev, "%s: turn on host\n", __func__);
+ dwc3_otg_notify_host_mode(otg, on);
+ ret = regulator_enable(dotg->vbus_otg);
+ if (ret) {
+ dev_err(otg->phy->dev, "unable to enable vbus_otg\n");
+ dwc3_otg_notify_host_mode(otg, 0);
+ return ret;
+ }
+
/*
* This should be revisited for more testing post-silicon.
* In worst case we may need to disconnect the root hub
@@ -222,14 +230,8 @@
dev_err(otg->phy->dev,
"%s: failed to add XHCI pdev ret=%d\n",
__func__, ret);
- return ret;
- }
-
- dwc3_otg_notify_host_mode(otg, on);
- ret = regulator_enable(dotg->vbus_otg);
- if (ret) {
- dev_err(otg->phy->dev, "unable to enable vbus_otg\n");
- platform_device_del(dwc->xhci);
+ regulator_disable(dotg->vbus_otg);
+ dwc3_otg_notify_host_mode(otg, 0);
return ret;
}
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 0cfd515..c07f18c 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -291,6 +291,7 @@
struct dwc3_ep *dep = to_dwc3_ep(ep);
struct dwc3 *dwc = dep->dwc;
+ dbg_event(dep->number, "EP0STAL", value);
dwc3_ep0_stall_and_restart(dwc);
return 0;
@@ -752,8 +753,10 @@
dwc->delayed_status = true;
out:
- if (ret < 0)
+ if (ret < 0) {
+ dbg_event(0x0, "ERRSTAL", ret);
dwc3_ep0_stall_and_restart(dwc);
+ }
}
bool zlp_required;
@@ -819,7 +822,7 @@
if ((epnum & 1) && ur->actual < ur->length) {
/* for some reason we did not get everything out */
-
+ dbg_event(epnum, "INDATSTAL", 0);
dwc3_ep0_stall_and_restart(dwc);
} else {
/*
@@ -855,6 +858,7 @@
if (ret < 0) {
dev_dbg(dwc->dev, "Invalid Test #%d\n",
dwc->test_mode_nr);
+ dbg_event(0x00, "INVALTEST", ret);
dwc3_ep0_stall_and_restart(dwc);
return;
}
@@ -1034,6 +1038,7 @@
dev_vdbg(dwc->dev, "Wrong direction for Data phase\n");
dwc3_ep0_end_control_data(dwc, dep);
+ dbg_event(epnum, "WRONGDR", 0);
dwc3_ep0_stall_and_restart(dwc);
return;
}
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 7439c45..4be032a 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2204,6 +2204,7 @@
return;
}
+ dbg_event(dep->number, "XFRCOMP", 0);
dwc3_endpoint_transfer_complete(dwc, dep, event, 1);
break;
case DWC3_DEPEVT_XFERINPROGRESS:
@@ -2213,9 +2214,11 @@
return;
}
+ dbg_event(dep->number, "XFRPROG", 0);
dwc3_endpoint_transfer_complete(dwc, dep, event, 0);
break;
case DWC3_DEPEVT_XFERNOTREADY:
+ dbg_event(dep->number, "XFRNRDY", 0);
if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
dwc3_gadget_start_isoc(dwc, dep, event);
} else {
diff --git a/drivers/usb/gadget/f_mbim.c b/drivers/usb/gadget/f_mbim.c
index 15f20ca..88a7bde 100644
--- a/drivers/usb/gadget/f_mbim.c
+++ b/drivers/usb/gadget/f_mbim.c
@@ -1710,8 +1710,10 @@
return -EIO;
}
+ spin_lock(&dev->lock);
while (list_empty(&dev->cpkt_req_q)) {
pr_debug("Requests list is empty. Wait.\n");
+ spin_unlock(&dev->lock);
ret = wait_event_interruptible(dev->read_wq,
!list_empty(&dev->cpkt_req_q));
if (ret < 0) {
@@ -1720,11 +1722,13 @@
return -ERESTARTSYS;
}
pr_debug("Received request packet\n");
+ spin_lock(&dev->lock);
}
cpkt = list_first_entry(&dev->cpkt_req_q, struct ctrl_pkt,
list);
if (cpkt->len > count) {
+ spin_unlock(&dev->lock);
mbim_unlock(&dev->read_excl);
pr_err("cpkt size too big:%d > buf size:%d\n",
cpkt->len, count);
@@ -1734,6 +1738,7 @@
pr_debug("cpkt size:%d\n", cpkt->len);
list_del(&cpkt->list);
+ spin_unlock(&dev->lock);
mbim_unlock(&dev->read_excl);
ret = copy_to_user(buf, cpkt->buf, cpkt->len);
diff --git a/drivers/usb/gadget/f_qc_rndis.c b/drivers/usb/gadget/f_qc_rndis.c
index 1af076b..69f4b1c 100644
--- a/drivers/usb/gadget/f_qc_rndis.c
+++ b/drivers/usb/gadget/f_qc_rndis.c
@@ -347,7 +347,7 @@
};
static struct usb_descriptor_header *eth_qc_ss_function[] = {
- (struct usb_descriptor_header *) &rndis_iad_descriptor,
+ (struct usb_descriptor_header *) &rndis_qc_iad_descriptor,
/* control interface matches ACM, not Ethernet */
(struct usb_descriptor_header *) &rndis_qc_control_intf,
diff --git a/drivers/usb/gadget/f_qdss.c b/drivers/usb/gadget/f_qdss.c
index 7e474f3..4ecfeac 100644
--- a/drivers/usb/gadget/f_qdss.c
+++ b/drivers/usb/gadget/f_qdss.c
@@ -1,7 +1,7 @@
/*
* f_qdss.c -- QDSS function Driver
*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -415,6 +415,8 @@
pr_debug("qdss_unbind\n");
+ flush_workqueue(qdss->wq);
+
if (gadget_is_dwc3(gadget))
dwc3_tx_fifo_resize_request(qdss->data, false);
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
index 734619f..a2bc2d9 100644
--- a/drivers/usb/gadget/u_ether.c
+++ b/drivers/usb/gadget/u_ether.c
@@ -532,7 +532,7 @@
spin_lock(&dev->req_lock);
list_add_tail(&req->list, &dev->tx_reqs);
- if (dev->port_usb->multi_pkt_xfer) {
+ if (dev->port_usb->multi_pkt_xfer && !req->context) {
dev->no_tx_req_used--;
req->length = 0;
in = dev->port_usb->in_ep;
@@ -598,6 +598,14 @@
}
} else {
skb = req->context;
+ /* Is aggregation already enabled and buffers allocated ? */
+ if (dev->port_usb->multi_pkt_xfer && dev->tx_req_bufsize) {
+ req->buf = kzalloc(dev->tx_req_bufsize, GFP_ATOMIC);
+ req->context = NULL;
+ } else {
+ req->buf = NULL;
+ }
+
spin_unlock(&dev->req_lock);
dev_kfree_skb_any(skb);
}
@@ -625,11 +633,14 @@
list_for_each(act, &dev->tx_reqs) {
req = container_of(act, struct usb_request, list);
- if (!req->buf)
+ if (!req->buf) {
req->buf = kzalloc(dev->tx_req_bufsize,
GFP_ATOMIC);
if (!req->buf)
goto free_buf;
+ }
+ /* req->context is not used for multi_pkt_xfers */
+ req->context = NULL;
}
return 0;
@@ -673,11 +684,15 @@
}
/* Allocate memory for tx_reqs to support multi packet transfer */
+ spin_lock_irqsave(&dev->req_lock, flags);
if (multi_pkt_xfer && !dev->tx_req_bufsize) {
retval = alloc_tx_buffer(dev);
- if (retval < 0)
+ if (retval < 0) {
+ spin_unlock_irqrestore(&dev->req_lock, flags);
return -ENOMEM;
+ }
}
+ spin_unlock_irqrestore(&dev->req_lock, flags);
/* apply outgoing CDC or RNDIS filters */
if (!is_promisc(cdc_filter)) {
diff --git a/drivers/usb/misc/mdm_ctrl_bridge.c b/drivers/usb/misc/mdm_ctrl_bridge.c
index 75fce2f..262b6c2 100644
--- a/drivers/usb/misc/mdm_ctrl_bridge.c
+++ b/drivers/usb/misc/mdm_ctrl_bridge.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,10 +26,6 @@
#include <asm/unaligned.h>
#include <mach/usb_bridge.h>
-/* polling interval for Interrupt ep */
-#define HS_INTERVAL 7
-#define FS_LS_INTERVAL 3
-
#define ACM_CTRL_DTR (1 << 0)
#define DEFAULT_READ_URB_LENGTH 4096
@@ -719,8 +715,7 @@
goto free_inturb;
}
- interval =
- (udev->speed == USB_SPEED_HIGH) ? HS_INTERVAL : FS_LS_INTERVAL;
+ interval = int_in->desc.bInterval;
usb_fill_int_urb(dev->inturb, udev, dev->int_pipe,
dev->intbuf, wMaxPacketSize,
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 8287ad7..15a9ab0 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009-2013, Linux Foundation. All rights reserved.
+/* Copyright (c) 2009-2014, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -41,6 +41,7 @@
#include <linux/mfd/pm8xxx/pm8921-charger.h>
#include <linux/mfd/pm8xxx/misc.h>
#include <linux/mhl_8334.h>
+#include <linux/qpnp/qpnp-adc.h>
#include <mach/scm.h>
#include <mach/clk.h>
@@ -455,8 +456,10 @@
dev_dbg(motg->phy.dev, "block_reset DEASSERT\n");
ret = clk_reset(motg->core_clk, CLK_RESET_DEASSERT);
ndelay(200);
- clk_prepare_enable(motg->core_clk);
- clk_prepare_enable(motg->pclk);
+ ret = clk_prepare_enable(motg->core_clk);
+ WARN(ret, "USB core_clk enable failed\n");
+ ret = clk_prepare_enable(motg->pclk);
+ WARN(ret, "USB pclk enable failed\n");
}
if (ret)
dev_err(motg->phy.dev, "usb hs_clk deassert failed\n");
@@ -1167,8 +1170,10 @@
}
if (motg->lpm_flags & CLOCKS_DOWN) {
- clk_prepare_enable(motg->core_clk);
- clk_prepare_enable(motg->pclk);
+ ret = clk_prepare_enable(motg->core_clk);
+ WARN(ret, "USB core_clk enable failed\n");
+ ret = clk_prepare_enable(motg->pclk);
+ WARN(ret, "USB pclk enable failed\n");
motg->lpm_flags &= ~CLOCKS_DOWN;
}
@@ -2551,6 +2556,8 @@
bool work = 0, srp_reqd, dcp;
pm_runtime_resume(otg->phy->dev);
+ if (motg->pm_done)
+ pm_runtime_get_sync(otg->phy->dev);
pr_debug("%s work\n", otg_state_string(otg->phy->state));
switch (otg->phy->state) {
case OTG_STATE_UNDEFINED:
@@ -2696,6 +2703,7 @@
*/
pm_runtime_mark_last_busy(otg->phy->dev);
pm_runtime_autosuspend(otg->phy->dev);
+ motg->pm_done = 1;
}
break;
case OTG_STATE_B_SRP_INIT:
@@ -3638,6 +3646,27 @@
return count;
}
+static int
+otg_get_prop_usbin_voltage_now(struct msm_otg *motg)
+{
+ int rc = 0;
+ struct qpnp_vadc_result results;
+
+ if (IS_ERR_OR_NULL(motg->vadc_dev)) {
+ motg->vadc_dev = qpnp_get_vadc(motg->phy.dev, "usbin");
+ if (IS_ERR(motg->vadc_dev))
+ return PTR_ERR(motg->vadc_dev);
+ }
+
+ rc = qpnp_vadc_read(motg->vadc_dev, USBIN, &results);
+ if (rc) {
+ pr_err("Unable to read usbin rc=%d\n", rc);
+ return 0;
+ } else {
+ return results.physical;
+ }
+}
+
static int otg_power_get_property_usb(struct power_supply *psy,
enum power_supply_property psp,
union power_supply_propval *val)
@@ -3667,6 +3696,9 @@
case POWER_SUPPLY_PROP_HEALTH:
val->intval = motg->usbin_health;
break;
+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+ val->intval = otg_get_prop_usbin_voltage_now(motg);
+ break;
default:
return -EINVAL;
}
@@ -3737,6 +3769,7 @@
POWER_SUPPLY_PROP_CURRENT_MAX,
POWER_SUPPLY_PROP_SCOPE,
POWER_SUPPLY_PROP_TYPE,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
};
const struct file_operations msm_otg_bus_fops = {
@@ -4020,6 +4053,30 @@
pm_runtime_put(motg->phy.dev);
}
break;
+ case MSM_USB_EXT_CHG_VOLTAGE_INFO:
+ if (get_user(val, (int __user *)arg)) {
+ pr_err("%s: get_user failed\n\n", __func__);
+ ret = -EFAULT;
+ break;
+ }
+
+ if (val == USB_REQUEST_5V)
+ pr_debug("%s:voting 5V voltage request\n", __func__);
+ else if (val == USB_REQUEST_9V)
+ pr_debug("%s:voting 9V voltage request\n", __func__);
+ break;
+ case MSM_USB_EXT_CHG_RESULT:
+ if (get_user(val, (int __user *)arg)) {
+ pr_err("%s: get_user failed\n\n", __func__);
+ ret = -EFAULT;
+ break;
+ }
+
+ if (!val)
+ pr_debug("%s:voltage request successful\n", __func__);
+ else
+ pr_debug("%s:voltage request failed\n", __func__);
+ break;
default:
ret = -EINVAL;
}
@@ -4842,6 +4899,7 @@
dev_dbg(dev, "OTG runtime resume\n");
pm_runtime_get_noresume(dev);
+ motg->pm_done = 0;
return msm_otg_resume(motg);
}
#endif
@@ -4869,6 +4927,7 @@
dev_dbg(dev, "OTG PM resume\n");
+ motg->pm_done = 0;
atomic_set(&motg->pm_suspended, 0);
if (motg->async_int || motg->sm_work_pending) {
pm_runtime_get_noresume(dev);
diff --git a/drivers/usb/storage/scsiglue.c b/drivers/usb/storage/scsiglue.c
index a324a5d..669fca9 100644
--- a/drivers/usb/storage/scsiglue.c
+++ b/drivers/usb/storage/scsiglue.c
@@ -230,6 +230,11 @@
US_FL_SCM_MULT_TARG)) &&
us->protocol == USB_PR_BULK)
us->use_last_sector_hacks = 1;
+
+ if (us->sdev_autosuspend_delay >= 0) {
+ sdev->use_rpm_auto = 1;
+ sdev->autosuspend_delay = us->sdev_autosuspend_delay;
+ }
} else {
/* Non-disk-type devices don't need to blacklist any pages
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index 2653e73..be7044b 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -742,6 +742,28 @@
return 0;
}
+/* Initialize SCSI device auto-suspend timeout here */
+static void usb_stor_set_scsi_autosuspend(struct us_data *us)
+{
+ struct usb_device *udev = us->pusb_dev;
+ struct usb_host_config *config = udev->actconfig;
+ struct usb_host_interface *intf;
+ int i;
+
+ /*
+ * Some USB UICC devices has Mass storage interface along
+ * with CCID interface. These cards are inserted all the
+ * time. Enable SCSI auto-suspend for such devices.
+ */
+ for (i = 0; i < config->desc.bNumInterfaces; i++) {
+ intf = config->interface[i]->cur_altsetting;
+ if (intf->desc.bInterfaceClass == USB_CLASS_CSCID) {
+ us->sdev_autosuspend_delay = 2000; /* msec */
+ return;
+ }
+ }
+}
+
/* Initialize all the dynamic resources we need */
static int usb_stor_acquire_resources(struct us_data *us)
{
@@ -990,6 +1012,10 @@
result = usb_stor_acquire_resources(us);
if (result)
goto BadDevice;
+
+ us->sdev_autosuspend_delay = -1;
+ usb_stor_set_scsi_autosuspend(us);
+
snprintf(us->scsi_name, sizeof(us->scsi_name), "usb-storage %s",
dev_name(&us->pusb_intf->dev));
result = scsi_add_host(us_to_host(us), dev);
diff --git a/drivers/usb/storage/usb.h b/drivers/usb/storage/usb.h
index 75f70f0..db75080 100644
--- a/drivers/usb/storage/usb.h
+++ b/drivers/usb/storage/usb.h
@@ -161,6 +161,7 @@
/* hacks for READ CAPACITY bug handling */
int use_last_sector_hacks;
int last_sector_retries;
+ int sdev_autosuspend_delay;
};
/* Convert between us_data and the corresponding Scsi_Host */
diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c
index ffbce45..1d8d91a 100644
--- a/drivers/video/au1100fb.c
+++ b/drivers/video/au1100fb.c
@@ -375,39 +375,13 @@
int au1100fb_fb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
{
struct au1100fb_device *fbdev;
- unsigned int len;
- unsigned long start=0, off;
fbdev = to_au1100fb_device(fbi);
- if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
- return -EINVAL;
- }
-
- start = fbdev->fb_phys & PAGE_MASK;
- len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len);
-
- off = vma->vm_pgoff << PAGE_SHIFT;
-
- if ((vma->vm_end - vma->vm_start + off) > len) {
- return -EINVAL;
- }
-
- off += start;
- vma->vm_pgoff = off >> PAGE_SHIFT;
-
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6
- vma->vm_flags |= VM_IO;
-
- if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot)) {
- return -EAGAIN;
- }
-
- return 0;
+ return vm_iomap_memory(vma, fbdev->fb_phys, fbdev->fb_len);
}
static struct fb_ops au1100fb_ops =
diff --git a/drivers/video/au1200fb.c b/drivers/video/au1200fb.c
index 7ca79f0..768f372 100644
--- a/drivers/video/au1200fb.c
+++ b/drivers/video/au1200fb.c
@@ -1235,36 +1235,12 @@
static int au1200fb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
{
- unsigned int len;
- unsigned long start=0, off;
struct au1200fb_device *fbdev = info->par;
- if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
- return -EINVAL;
- }
-
- start = fbdev->fb_phys & PAGE_MASK;
- len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len);
-
- off = vma->vm_pgoff << PAGE_SHIFT;
-
- if ((vma->vm_end - vma->vm_start + off) > len) {
- return -EINVAL;
- }
-
- off += start;
- vma->vm_pgoff = off >> PAGE_SHIFT;
-
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
pgprot_val(vma->vm_page_prot) |= _CACHE_MASK; /* CCA=7 */
- vma->vm_flags |= VM_IO;
-
- return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
-
- return 0;
+ return vm_iomap_memory(vma, fbdev->fb_phys, fbdev->fb_len);
}
static void set_global(u_int cmd, struct au1200_lcd_global_regs_t *pdata)
diff --git a/drivers/video/msm/mdss/dsi_host_v2.c b/drivers/video/msm/mdss/dsi_host_v2.c
index 53b6fc6..ca7f199 100644
--- a/drivers/video/msm/mdss/dsi_host_v2.c
+++ b/drivers/video/msm/mdss/dsi_host_v2.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -524,8 +524,11 @@
if (readl_poll_timeout((ctrl_base + DSI_STATUS),
status,
((status & 0x02) == 0),
- DSI_POLL_SLEEP_US, DSI_POLL_TIMEOUT_US))
+ DSI_POLL_SLEEP_US, DSI_POLL_TIMEOUT_US)) {
pr_err("%s: DSI status=%x failed\n", __func__, status);
+ pr_err("%s: Doing sw reset\n", __func__);
+ msm_dsi_sw_reset();
+ }
/* Check for x_HS_FIFO_EMPTY */
if (readl_poll_timeout((ctrl_base + DSI_FIFO_STATUS),
diff --git a/drivers/video/msm/mdss/mdp3_ctrl.c b/drivers/video/msm/mdss/mdp3_ctrl.c
index 44a7e51..e4d8d0f 100644
--- a/drivers/video/msm/mdss/mdp3_ctrl.c
+++ b/drivers/video/msm/mdss/mdp3_ctrl.c
@@ -426,10 +426,10 @@
return format;
}
-static int mdp3_ctrl_get_pack_pattern(struct msm_fb_data_type *mfd)
+static int mdp3_ctrl_get_pack_pattern(u32 imgType)
{
int packPattern = MDP3_DMA_OUTPUT_PACK_PATTERN_RGB;
- if (mfd->fb_imgType == MDP_RGBA_8888)
+ if (imgType == MDP_RGBA_8888)
packPattern = MDP3_DMA_OUTPUT_PACK_PATTERN_BGR;
return packPattern;
}
@@ -530,7 +530,7 @@
outputConfig.out_sel = mdp3_ctrl_get_intf_type(mfd);
outputConfig.bit_mask_polarity = 0;
outputConfig.color_components_flip = 0;
- outputConfig.pack_pattern = mdp3_ctrl_get_pack_pattern(mfd);
+ outputConfig.pack_pattern = mdp3_ctrl_get_pack_pattern(mfd->fb_imgType);
outputConfig.pack_align = MDP3_DMA_OUTPUT_PACK_ALIGN_LSB;
outputConfig.color_comp_out_bits = (MDP3_DMA_OUTPUT_COMP_BITS_8 << 4) |
(MDP3_DMA_OUTPUT_COMP_BITS_8 << 2)|
@@ -708,9 +708,11 @@
off_error:
mdp3_session->status = 0;
mdp3_bufq_deinit(&mdp3_session->bufq_out);
+ if (mdp3_session->overlay.id != MSMFB_NEW_REQUEST) {
+ mdp3_session->overlay.id = MSMFB_NEW_REQUEST;
+ mdp3_bufq_deinit(&mdp3_session->bufq_in);
+ }
mutex_unlock(&mdp3_session->lock);
- if (mdp3_session->overlay.id != MSMFB_NEW_REQUEST)
- mdp3_overlay_unset(mfd, mdp3_session->overlay.id);
return 0;
}
@@ -890,13 +892,11 @@
mdp3_session->overlay = *req;
if (req->id == MSMFB_NEW_REQUEST) {
if (dma->source_config.stride != stride ||
- dma->source_config.width != req->src.width ||
- dma->source_config.height != req->src.height ||
dma->source_config.format != format) {
- dma->source_config.width = req->src.width;
- dma->source_config.height = req->src.height,
dma->source_config.format = format;
dma->source_config.stride = stride;
+ dma->output_config.pack_pattern =
+ mdp3_ctrl_get_pack_pattern(req->src.format);
mdp3_clk_enable(1, 0);
mdp3_session->dma->dma_config_source(dma);
mdp3_clk_enable(0, 0);
@@ -916,7 +916,6 @@
struct mdp3_session_data *mdp3_session = mfd->mdp.private1;
struct fb_info *fbi = mfd->fbi;
struct fb_fix_screeninfo *fix;
- struct mdss_panel_info *panel_info = mfd->panel_info;
int format;
fix = &fbi->fix;
@@ -925,10 +924,10 @@
if (mdp3_session->overlay.id == ndx && ndx == 1) {
struct mdp3_dma *dma = mdp3_session->dma;
- dma->source_config.width = panel_info->xres,
- dma->source_config.height = panel_info->yres,
dma->source_config.format = format;
dma->source_config.stride = fix->line_length;
+ dma->output_config.pack_pattern =
+ mdp3_ctrl_get_pack_pattern(mfd->fb_imgType);
mdp3_clk_enable(1, 0);
mdp3_session->dma->dma_config_source(dma);
mdp3_clk_enable(0, 0);
diff --git a/drivers/video/msm/mdss/mdp3_dma.c b/drivers/video/msm/mdss/mdp3_dma.c
index 36d5cf1..800c4b3 100644
--- a/drivers/video/msm/mdss/mdp3_dma.c
+++ b/drivers/video/msm/mdss/mdp3_dma.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -339,6 +339,8 @@
dma_p_cfg_reg = MDP3_REG_READ(MDP3_REG_DMA_P_CONFIG);
dma_p_cfg_reg &= ~MDP3_DMA_IBUF_FORMAT_MASK;
dma_p_cfg_reg |= source_config->format << 25;
+ dma_p_cfg_reg &= ~MDP3_DMA_PACK_PATTERN_MASK;
+ dma_p_cfg_reg |= dma->output_config.pack_pattern << 8;
dma_p_size = source_config->width | (source_config->height << 16);
diff --git a/drivers/video/msm/mdss/mdp3_hwio.h b/drivers/video/msm/mdss/mdp3_hwio.h
index 5205b42..c40ee47 100644
--- a/drivers/video/msm/mdss/mdp3_hwio.h
+++ b/drivers/video/msm/mdss/mdp3_hwio.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -120,6 +120,7 @@
/*DMA MASK*/
#define MDP3_DMA_IBUF_FORMAT_MASK 0x06000000
+#define MDP3_DMA_PACK_PATTERN_MASK 0x00003f00
/*MISR*/
#define MDP3_REG_MODE_CLK 0x000D0000
@@ -272,6 +273,8 @@
#define MDP3_PPP_BLEND_BG_ALPHA_SEL 0x70010
+#define MDP3_PPP_ACTIVE BIT(0)
+
/*interrupt mask*/
#define MDP3_INTR_DP0_ROI_DONE_BIT BIT(0)
diff --git a/drivers/video/msm/mdss/mdp3_ppp.c b/drivers/video/msm/mdss/mdp3_ppp.c
index 71cbbe4..8cc29da8 100644
--- a/drivers/video/msm/mdss/mdp3_ppp.c
+++ b/drivers/video/msm/mdss/mdp3_ppp.c
@@ -83,9 +83,7 @@
};
struct ppp_status {
- int busy;
bool wait_for_pop;
- spinlock_t ppp_lock;
struct completion ppp_comp;
struct completion pop_q_comp;
struct mutex req_mutex; /* Protect request queue */
@@ -101,6 +99,7 @@
struct timer_list free_bw_timer;
struct work_struct free_bw_work;
bool bw_on;
+ bool bw_optimal;
};
static struct ppp_status *ppp_stat;
@@ -271,24 +270,16 @@
int mdp3_ppp_pipe_wait(void)
{
int ret = 1;
- int wait;
- unsigned long flag;
/*
- * wait 5 secs for operation to complete before declaring
+ * wait 40 ms for ppp operation to complete before declaring
* the MDP hung
*/
- spin_lock_irqsave(&ppp_stat->ppp_lock, flag);
- wait = ppp_stat->busy;
- spin_unlock_irqrestore(&ppp_stat->ppp_lock, flag);
-
- if (wait) {
- ret = wait_for_completion_timeout(
- &ppp_stat->ppp_comp, 5 * HZ);
- if (!ret)
- pr_err("%s: Timed out waiting for the MDP.\n",
- __func__);
- }
+ ret = wait_for_completion_timeout(
+ &ppp_stat->ppp_comp, msecs_to_jiffies(40));
+ if (!ret)
+ pr_err("%s: Timed out waiting for the MDP.\n",
+ __func__);
return ret;
}
@@ -321,11 +312,7 @@
static void mdp3_ppp_intr_handler(int type, void *arg)
{
- spin_lock(&ppp_stat->ppp_lock);
- ppp_stat->busy = false;
- spin_unlock(&ppp_stat->ppp_lock);
complete(&ppp_stat->ppp_comp);
- mdp3_irq_disable_nosync(type);
}
static int mdp3_ppp_callback_setup(void)
@@ -342,34 +329,61 @@
void mdp3_ppp_kickoff(void)
{
- unsigned long flag;
- mdp3_irq_enable(MDP3_PPP_DONE);
-
init_completion(&ppp_stat->ppp_comp);
-
- spin_lock_irqsave(&ppp_stat->ppp_lock, flag);
- ppp_stat->busy = true;
- spin_unlock_irqrestore(&ppp_stat->ppp_lock, flag);
+ mdp3_irq_enable(MDP3_PPP_DONE);
ppp_enable();
-
mdp3_ppp_pipe_wait();
+ mdp3_irq_disable(MDP3_PPP_DONE);
+}
+
+int mdp3_ppp_vote_update(struct msm_fb_data_type *mfd)
+{
+ struct mdss_panel_info *panel_info = mfd->panel_info;
+ uint64_t req_bw = 0, ab = 0, ib = 0;
+ int rate = 0;
+ int rc = 0;
+ if (!ppp_stat->bw_on)
+ pr_err("%s: PPP vote update in wrong state\n", __func__);
+
+ rate = MDP_BLIT_CLK_RATE;
+ req_bw = panel_info->xres * panel_info->yres *
+ panel_info->mipi.frame_rate *
+ MDP_PPP_MAX_BPP *
+ MDP_PPP_DYNAMIC_FACTOR *
+ MDP_PPP_MAX_READ_WRITE;
+ ib = (req_bw * 3) / 2;
+
+ if (ppp_stat->bw_optimal)
+ ab = ib / 2;
+ else
+ ab = req_bw;
+ rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_PPP, ab, ib);
+ if (rc < 0) {
+ pr_err("%s: scale_set_quota failed\n", __func__);
+ return rc;
+ }
+ return rc;
}
int mdp3_ppp_turnon(struct msm_fb_data_type *mfd, int on_off)
{
struct mdss_panel_info *panel_info = mfd->panel_info;
- uint64_t ab = 0, ib = 0;
+ uint64_t req_bw = 0, ab = 0, ib = 0;
int rate = 0;
int rc;
if (on_off) {
rate = MDP_BLIT_CLK_RATE;
- ab = panel_info->xres * panel_info->yres *
+ req_bw = panel_info->xres * panel_info->yres *
panel_info->mipi.frame_rate *
MDP_PPP_MAX_BPP *
MDP_PPP_DYNAMIC_FACTOR *
MDP_PPP_MAX_READ_WRITE;
- ib = (ab * 3) / 2;
+ ib = (req_bw * 3) / 2;
+ if (ppp_stat->bw_optimal)
+ ab = ib / 2;
+ else
+ ab = req_bw;
}
mdp3_clk_set_rate(MDP3_CLK_CORE, rate, MDP3_CLIENT_PPP);
rc = mdp3_clk_enable(on_off, 0);
@@ -387,10 +401,21 @@
return 0;
}
+bool mdp3_optimal_bw(int req_cnt)
+{
+ if (req_cnt == 1 && ppp_stat->req_q.count == 1)
+ return true;
+ return false;
+}
+
void mdp3_start_ppp(struct ppp_blit_op *blit_op)
{
/* Wait for the pipe to clear */
- do { } while (mdp3_ppp_pipe_wait() <= 0);
+ if (MDP3_REG_READ(MDP3_REG_DISPLAY_STATUS) &
+ MDP3_PPP_ACTIVE) {
+ pr_err("ppp core is hung up on previous request\n");
+ return;
+ }
config_ppp_op_mode(blit_op);
if (blit_op->solid_fill) {
MDP3_REG_WRITE(0x10138, 0x10000000);
@@ -1046,6 +1071,7 @@
pr_err("%s: mdp3_iommu_enable failed\n", __func__);
return;
}
+ ppp_stat->bw_optimal = mdp3_optimal_bw(req->count);
mdp3_ppp_turnon(mfd, 1);
if (rc < 0) {
mdp3_iommu_disable(MDP3_CLIENT_PPP);
@@ -1079,6 +1105,10 @@
if (ppp_stat->wait_for_pop)
complete(&ppp_stat->pop_q_comp);
mutex_unlock(&ppp_stat->req_mutex);
+ if (req && (ppp_stat->bw_optimal != mdp3_optimal_bw(req->count))) {
+ ppp_stat->bw_optimal = !ppp_stat->bw_optimal;
+ mdp3_ppp_vote_update(mfd);
+ }
}
mod_timer(&ppp_stat->free_bw_timer, jiffies +
msecs_to_jiffies(MDP_RELEASE_BW_TIMEOUT));
@@ -1211,13 +1241,11 @@
INIT_WORK(&ppp_stat->blit_work, mdp3_ppp_blit_wq_handler);
INIT_WORK(&ppp_stat->free_bw_work, mdp3_free_bw_wq_handler);
init_completion(&ppp_stat->pop_q_comp);
- spin_lock_init(&ppp_stat->ppp_lock);
mutex_init(&ppp_stat->req_mutex);
mutex_init(&ppp_stat->config_ppp_mutex);
init_timer(&ppp_stat->free_bw_timer);
ppp_stat->free_bw_timer.function = mdp3_free_fw_timer_func;
ppp_stat->free_bw_timer.data = 0;
- ppp_stat->busy = false;
ppp_stat->mfd = mfd;
mdp3_ppp_callback_setup();
return 0;
diff --git a/drivers/video/msm/mdss/mdss.h b/drivers/video/msm/mdss/mdss.h
index ab54cbe..ada1281 100644
--- a/drivers/video/msm/mdss/mdss.h
+++ b/drivers/video/msm/mdss/mdss.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -79,6 +79,21 @@
spinlock_t lock;
};
+struct mdss_fudge_factor {
+ u32 numer;
+ u32 denom;
+};
+
+struct mdss_prefill_data {
+ u32 ot_bytes;
+ u32 y_buf_bytes;
+ u32 y_scaler_lines_bilinear;
+ u32 y_scaler_lines_caf;
+ u32 post_scaler_pixels;
+ u32 pp_pixels;
+ u32 fbc_lines;
+};
+
struct mdss_data_type {
u32 mdp_rev;
struct clk *mdp_clk[MDSS_MAX_CLK];
@@ -104,6 +119,7 @@
u8 has_wfd_blk;
u8 has_wb_ad;
+ u32 rotator_ot_limit;
u32 mdp_irq_mask;
u32 mdp_hist_irq_mask;
@@ -114,8 +130,8 @@
unsigned long min_mdp_clk;
u32 res_init;
- u32 bus_hdl;
+ u32 highest_bank_bit;
u32 smp_mb_cnt;
u32 smp_mb_size;
u32 smp_mb_per_pipe;
@@ -125,6 +141,15 @@
u32 max_bw_low;
u32 max_bw_high;
+ u32 axi_port_cnt;
+ u32 curr_bw_uc_idx;
+ u32 bus_hdl;
+ struct msm_bus_scale_pdata *bus_scale_table;
+
+ struct mdss_fudge_factor ab_factor;
+ struct mdss_fudge_factor ib_factor;
+ struct mdss_fudge_factor clk_factor;
+
struct mdss_hw_settings *hw_settings;
struct mdss_mdp_pipe *vig_pipes;
@@ -162,9 +187,11 @@
struct early_suspend early_suspend;
struct mdss_debug_inf debug_inf;
- int current_bus_idx;
bool mixer_switched;
struct mdss_panel_cfg pan_cfg;
+
+ int handoff_pending;
+ struct mdss_prefill_data prefill_data;
};
extern struct mdss_data_type *mdss_res;
diff --git a/drivers/video/msm/mdss/mdss_dsi.c b/drivers/video/msm/mdss/mdss_dsi.c
index 54c8a06..2efb973 100644
--- a/drivers/video/msm/mdss/mdss_dsi.c
+++ b/drivers/video/msm/mdss/mdss_dsi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -316,20 +316,10 @@
/* disable DSI controller */
mdss_dsi_controller_cfg(0, pdata);
- mdss_dsi_clk_ctrl(ctrl_pdata, 0);
-
- ret = mdss_dsi_enable_bus_clocks(ctrl_pdata);
- if (ret) {
- pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
- ret);
- mdss_dsi_panel_power_on(pdata, 0);
- return ret;
- }
-
/* disable DSI phy */
- mdss_dsi_phy_enable(ctrl_pdata, 0);
+ mdss_dsi_phy_disable(ctrl_pdata);
- mdss_dsi_disable_bus_clocks(ctrl_pdata);
+ mdss_dsi_clk_ctrl(ctrl_pdata, 0);
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
@@ -389,7 +379,7 @@
if (!pdata->panel_info.mipi.lp11_init)
mdss_dsi_panel_reset(pdata, 1);
- ret = mdss_dsi_enable_bus_clocks(ctrl_pdata);
+ ret = mdss_dsi_bus_clk_start(ctrl_pdata);
if (ret) {
pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
ret);
@@ -400,7 +390,7 @@
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
mdss_dsi_phy_init(pdata);
- mdss_dsi_disable_bus_clocks(ctrl_pdata);
+ mdss_dsi_bus_clk_stop(ctrl_pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, 1);
@@ -642,33 +632,58 @@
if (new_fps !=
ctrl_pdata->panel_data.panel_info.mipi.frame_rate) {
- rc = mdss_dsi_clk_div_config
- (&ctrl_pdata->panel_data.panel_info, new_fps);
- if (rc) {
- pr_err("%s: unable to initialize the clk dividers\n",
- __func__);
- return rc;
- }
- ctrl_pdata->pclk_rate =
- ctrl_pdata->panel_data.panel_info.mipi.dsi_pclk_rate;
- ctrl_pdata->byte_clk_rate =
- ctrl_pdata->panel_data.panel_info.clk_rate / 8;
-
if (pdata->panel_info.dfps_update
- == DFPS_IMMEDIATE_CLK_UPDATE_MODE) {
- dsi_ctrl = MIPI_INP((ctrl_pdata->ctrl_base) +
- 0x0004);
- ctrl_pdata->panel_data.panel_info.mipi.frame_rate =
- new_fps;
- dsi_ctrl &= ~0x2;
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0004,
- dsi_ctrl);
- mdss_dsi_controller_cfg(true, pdata);
- mdss_dsi_clk_ctrl(ctrl_pdata, 0);
- mdss_dsi_clk_ctrl(ctrl_pdata, 1);
- dsi_ctrl |= 0x2;
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0004,
- dsi_ctrl);
+ == DFPS_IMMEDIATE_PORCH_UPDATE_MODE) {
+ u32 hsync_period, vsync_period;
+ u32 new_dsi_v_total, current_dsi_v_total;
+ vsync_period =
+ mdss_panel_get_vtotal(&pdata->panel_info);
+ hsync_period =
+ mdss_panel_get_htotal(&pdata->panel_info);
+ current_dsi_v_total =
+ MIPI_INP((ctrl_pdata->ctrl_base) + 0x2C);
+ new_dsi_v_total =
+ ((vsync_period - 1) << 16) | (hsync_period - 1);
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
+ (current_dsi_v_total | 0x8000000));
+ if (new_dsi_v_total & 0x8000000) {
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
+ new_dsi_v_total);
+ } else {
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
+ (new_dsi_v_total | 0x8000000));
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
+ (new_dsi_v_total & 0x7ffffff));
+ }
+ pdata->panel_info.mipi.frame_rate = new_fps;
+ } else {
+ rc = mdss_dsi_clk_div_config
+ (&ctrl_pdata->panel_data.panel_info, new_fps);
+ if (rc) {
+ pr_err("%s: unable to initialize the clk dividers\n",
+ __func__);
+ return rc;
+ }
+ ctrl_pdata->pclk_rate =
+ pdata->panel_info.mipi.dsi_pclk_rate;
+ ctrl_pdata->byte_clk_rate =
+ pdata->panel_info.clk_rate / 8;
+
+ if (pdata->panel_info.dfps_update
+ == DFPS_IMMEDIATE_CLK_UPDATE_MODE) {
+ dsi_ctrl = MIPI_INP((ctrl_pdata->ctrl_base) +
+ 0x0004);
+ pdata->panel_info.mipi.frame_rate = new_fps;
+ dsi_ctrl &= ~0x2;
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0004,
+ dsi_ctrl);
+ mdss_dsi_controller_cfg(true, pdata);
+ mdss_dsi_clk_ctrl(ctrl_pdata, 0);
+ mdss_dsi_clk_ctrl(ctrl_pdata, 1);
+ dsi_ctrl |= 0x2;
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0004,
+ dsi_ctrl);
+ }
}
} else {
pr_debug("%s: Panel is already at this FPS\n", __func__);
@@ -825,35 +840,39 @@
static struct device_node *mdss_dsi_find_panel_of_node(
struct platform_device *pdev, char *panel_cfg)
{
- int l;
- int ctrl_id = -1;
- char *panel_name;
+ int len, i;
+ int ctrl_id = pdev->id - 1;
+ char panel_name[MDSS_MAX_PANEL_LEN];
+ char ctrl_id_stream[3] = "0:";
+ char *stream = NULL, *pan = NULL;
struct device_node *dsi_pan_node = NULL, *mdss_node = NULL;
- l = strlen(panel_cfg);
- if (!l) {
+ len = strlen(panel_cfg);
+ if (!len) {
/* no panel cfg chg, parse dt */
pr_debug("%s:%d: no cmd line cfg present\n",
__func__, __LINE__);
- dsi_pan_node = mdss_dsi_pref_prim_panel(pdev);
+ goto end;
} else {
- if (panel_cfg[0] == '0') {
- pr_debug("%s:%d: DSI ctrl 1\n", __func__, __LINE__);
- ctrl_id = 0;
- } else if (panel_cfg[0] == '1') {
- pr_debug("%s:%d: DSI ctrl 2\n", __func__, __LINE__);
- ctrl_id = 1;
+ if (ctrl_id == 1)
+ strlcpy(ctrl_id_stream, "1:", 3);
+
+ stream = strnstr(panel_cfg, ctrl_id_stream, len);
+ if (!stream) {
+ pr_err("controller config is not present\n");
+ goto end;
}
- if ((pdev->id - 1) != ctrl_id) {
- pr_err("%s:%d:pdev_ID=[%d]\n",
- __func__, __LINE__, pdev->id);
- return NULL;
+ stream += 2;
+
+ pan = strnchr(stream, strlen(stream), ':');
+ if (!pan) {
+ strlcpy(panel_name, stream, MDSS_MAX_PANEL_LEN);
+ } else {
+ for (i = 0; (stream + i) < pan; i++)
+ panel_name[i] = *(stream + i);
+ panel_name[i] = 0;
}
- /*
- * skip first two chars '<dsi_ctrl_id>' and
- * ':' to get to the panel name
- */
- panel_name = panel_cfg + 2;
+
pr_debug("%s:%d:%s:%s\n", __func__, __LINE__,
panel_cfg, panel_name);
@@ -870,9 +889,12 @@
if (!dsi_pan_node) {
pr_err("%s: invalid pan node, selecting prim panel\n",
__func__);
- dsi_pan_node = mdss_dsi_pref_prim_panel(pdev);
+ goto end;
}
+ return dsi_pan_node;
}
+end:
+ dsi_pan_node = mdss_dsi_pref_prim_panel(pdev);
return dsi_pan_node;
}
@@ -1196,6 +1218,12 @@
DFPS_IMMEDIATE_CLK_UPDATE_MODE;
pr_debug("%s: dfps mode: Immediate clk\n",
__func__);
+ } else if (!strcmp(data,
+ "dfps_immediate_porch_mode")) {
+ pinfo->dfps_update =
+ DFPS_IMMEDIATE_PORCH_UPDATE_MODE;
+ pr_debug("%s: dfps mode: Immediate porch\n",
+ __func__);
} else {
pr_debug("%s: dfps to default mode\n",
__func__);
diff --git a/drivers/video/msm/mdss/mdss_dsi.h b/drivers/video/msm/mdss/mdss_dsi.h
index b89a935..2c9c37d 100644
--- a/drivers/video/msm/mdss/mdss_dsi.h
+++ b/drivers/video/msm/mdss/mdss_dsi.h
@@ -227,6 +227,8 @@
#define DSI_EV_MDP_FIFO_UNDERFLOW 0x0002
#define DSI_EV_MDP_BUSY_RELEASE 0x80000000
+#define DSI_FLAG_CLOCK_MASTER 0x80000000
+
struct mdss_dsi_ctrl_pdata {
int ndx; /* panel_num */
int (*on) (struct mdss_panel_data *pdata);
@@ -238,6 +240,8 @@
unsigned char *ctrl_base;
int reg_size;
u32 clk_cnt;
+ int clk_cnt_sub;
+ u32 flags;
struct clk *mdp_core_clk;
struct clk *ahb_clk;
struct clk *axi_clk;
@@ -308,13 +312,20 @@
void mdss_dsi_cmd_mdp_start(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_cmd_bta_sw_trigger(struct mdss_panel_data *pdata);
void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl);
-int mdss_dsi_clk_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, int enable);
+void mdss_dsi_clk_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, int enable);
+int mdss_dsi_link_clk_start(struct mdss_dsi_ctrl_pdata *ctrl);
+void mdss_dsi_link_clk_stop(struct mdss_dsi_ctrl_pdata *ctrl);
+int mdss_dsi_bus_clk_start(struct mdss_dsi_ctrl_pdata *ctrl);
+void mdss_dsi_bus_clk_stop(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_clk_req(struct mdss_dsi_ctrl_pdata *ctrl,
int enable);
void mdss_dsi_controller_cfg(int enable,
struct mdss_panel_data *pdata);
void mdss_dsi_sw_reset(struct mdss_panel_data *pdata);
+struct mdss_dsi_ctrl_pdata *mdss_dsi_ctrl_slave(
+ struct mdss_dsi_ctrl_pdata *ctrl);
+
irqreturn_t mdss_dsi_isr(int irq, void *ptr);
void mdss_dsi_irq_handler_config(struct mdss_dsi_ctrl_pdata *ctrl_pdata);
@@ -327,7 +338,7 @@
int mdss_dsi_enable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata);
void mdss_dsi_disable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata);
void mdss_dsi_panel_reset(struct mdss_panel_data *pdata, int enable);
-void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on);
+void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl);
void mdss_dsi_phy_init(struct mdss_panel_data *pdata);
void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base);
void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl);
diff --git a/drivers/video/msm/mdss/mdss_dsi_host.c b/drivers/video/msm/mdss/mdss_dsi_host.c
index bd156fc..b4478ac 100644
--- a/drivers/video/msm/mdss/mdss_dsi_host.c
+++ b/drivers/video/msm/mdss/mdss_dsi_host.c
@@ -92,6 +92,10 @@
ctrl_list[ctrl->ndx] = ctrl; /* keep it */
+ if (ctrl->shared_pdata.broadcast_enable)
+ if (ctrl->ndx == DSI_CTRL_1)
+ ctrl->flags |= DSI_FLAG_CLOCK_MASTER;
+
if (mdss_register_irq(ctrl->dsi_hw))
pr_err("%s: mdss_register_irq failed.\n", __func__);
@@ -117,6 +121,22 @@
}
}
+struct mdss_dsi_ctrl_pdata *mdss_dsi_ctrl_slave(
+ struct mdss_dsi_ctrl_pdata *ctrl)
+{
+ int ndx;
+ struct mdss_dsi_ctrl_pdata *sctrl = NULL;
+
+ /* only two controllers */
+ ndx = ctrl->ndx;
+ ndx += 1;
+ ndx %= DSI_CTRL_MAX;
+ sctrl = ctrl_list[ndx];
+
+ return sctrl;
+
+}
+
void mdss_dsi_clk_req(struct mdss_dsi_ctrl_pdata *ctrl, int enable)
{
if (enable == 0) {
@@ -1460,10 +1480,10 @@
MIPI_OUTP(left_ctrl_pdata->ctrl_base + 0x0110, isr0);
}
- pr_debug("%s: isr=%x", __func__, isr);
+ pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr);
if (isr & DSI_INTR_ERROR) {
- pr_err("%s: isr=%x %x", __func__, isr, (int)DSI_INTR_ERROR);
+ pr_err("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr);
mdss_dsi_error(ctrl);
}
diff --git a/drivers/video/msm/mdss/mdss_dsi_panel.c b/drivers/video/msm/mdss/mdss_dsi_panel.c
index 60e2cf9..76e6d1b 100644
--- a/drivers/video/msm/mdss/mdss_dsi_panel.c
+++ b/drivers/video/msm/mdss/mdss_dsi_panel.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -815,11 +815,11 @@
pinfo->mipi.insert_dcs_cmd =
(!rc ? tmp : 1);
rc = of_property_read_u32(np,
- "qcom,mdss-dsi-te-v-sync-continue-lines", &tmp);
+ "qcom,mdss-dsi-wr-mem-continue", &tmp);
pinfo->mipi.wr_mem_continue =
(!rc ? tmp : 0x3c);
rc = of_property_read_u32(np,
- "qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line", &tmp);
+ "qcom,mdss-dsi-wr-mem-start", &tmp);
pinfo->mipi.wr_mem_start =
(!rc ? tmp : 0x2c);
rc = of_property_read_u32(np,
@@ -829,7 +829,7 @@
rc = of_property_read_u32(np, "qcom,mdss-dsi-virtual-channel-id", &tmp);
pinfo->mipi.vc = (!rc ? tmp : 0);
pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RGB;
- data = of_get_property(np, "mdss-dsi-color-order", NULL);
+ data = of_get_property(np, "qcom,mdss-dsi-color-order", NULL);
if (data) {
if (!strcmp(data, "rgb_swap_rbg"))
pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RBG;
diff --git a/drivers/video/msm/mdss/mdss_edp.c b/drivers/video/msm/mdss/mdss_edp.c
index c9050f7..eca73a8 100644
--- a/drivers/video/msm/mdss/mdss_edp.c
+++ b/drivers/video/msm/mdss/mdss_edp.c
@@ -33,8 +33,6 @@
#include <mach/dma.h>
#include "mdss.h"
-#include "mdss_panel.h"
-#include "mdss_mdp.h"
#include "mdss_edp.h"
#include "mdss_debug.h"
@@ -392,6 +390,7 @@
void mdss_edp_clock_synchrous(struct mdss_edp_drv_pdata *ep, int sync)
{
u32 data;
+ u32 color;
/* EDP_MISC1_MISC0 */
data = edp_read(ep->base + 0x02c);
@@ -401,6 +400,20 @@
else
data &= ~0x01;
+ /* only legacy rgb mode supported */
+ color = 0; /* 6 bits */
+ if (ep->edid.color_depth == 8)
+ color = 0x01;
+ else if (ep->edid.color_depth == 10)
+ color = 0x02;
+ else if (ep->edid.color_depth == 12)
+ color = 0x03;
+ else if (ep->edid.color_depth == 16)
+ color = 0x04;
+
+ color <<= 5; /* bit 5 to bit 7 */
+
+ data |= color;
/* EDP_MISC1_MISC0 */
edp_write(ep->base + 0x2c, data);
}
@@ -532,8 +545,6 @@
pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
-
if (!edp_drv->cont_splash) { /* vote for clocks */
mdss_edp_phy_pll_reset(edp_drv);
mdss_edp_aux_reset(edp_drv);
@@ -593,6 +604,8 @@
}
pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);
+ /* wait until link training is completed */
+ mutex_lock(&edp_drv->train_mutex);
INIT_COMPLETION(edp_drv->idle_comp);
mdss_edp_state_ctrl(edp_drv, ST_PUSH_IDLE);
@@ -622,12 +635,12 @@
mdss_edp_clk_disable(edp_drv);
mdss_edp_unprepare_clocks(edp_drv);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
-
mdss_edp_aux_ctrl(edp_drv, 0);
pr_debug("%s-: state_ctrl=%x\n", __func__,
edp_read(edp_drv->base + 0x8));
+
+ mutex_unlock(&edp_drv->train_mutex);
return 0;
}
@@ -724,6 +737,9 @@
edp_drv->panel_data.panel_info.brightness_max =
(!ret ? tmp : MDSS_MAX_BL_BRIGHTNESS);
+ edp_drv->panel_data.panel_info.edp.frame_rate =
+ DEFAULT_FRAME_RATE;/* 60 fps */
+
edp_drv->panel_data.event_handler = mdss_edp_event_handler;
edp_drv->panel_data.set_backlight = mdss_edp_set_backlight;
@@ -809,7 +825,6 @@
if (ep->cont_splash)
return;
- INIT_COMPLETION(ep->train_comp);
mdss_edp_link_train(ep);
}
@@ -1090,10 +1105,6 @@
pr_debug("%s:cont_splash=%d\n", __func__, edp_drv->cont_splash);
- /* need mdss clock to receive irq */
- if (!edp_drv->cont_splash)
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
-
/* only need aux and ahb clock for aux channel */
mdss_edp_prepare_aux_clocks(edp_drv);
mdss_edp_aux_clk_enable(edp_drv);
@@ -1122,9 +1133,6 @@
mdss_edp_aux_clk_disable(edp_drv);
mdss_edp_unprepare_aux_clocks(edp_drv);
- if (!edp_drv->cont_splash)
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
-
if (edp_drv->cont_splash) { /* vote for clocks */
mdss_edp_prepare_clocks(edp_drv);
mdss_edp_clk_enable(edp_drv);
diff --git a/drivers/video/msm/mdss/mdss_edp.h b/drivers/video/msm/mdss/mdss_edp.h
index 0c0200d..12e3be7 100644
--- a/drivers/video/msm/mdss/mdss_edp.h
+++ b/drivers/video/msm/mdss/mdss_edp.h
@@ -293,6 +293,7 @@
struct clk *pixel_clk;
struct clk *ahb_clk;
struct clk *link_clk;
+ struct clk *mdp_core_clk;
int clk_on;
/* gpios */
@@ -314,6 +315,7 @@
struct completion idle_comp;
struct completion video_comp;
struct mutex aux_mutex;
+ struct mutex train_mutex;
u32 aux_cmd_busy;
u32 aux_cmd_i2c;
int aux_trans_num;
diff --git a/drivers/video/msm/mdss/mdss_edp_aux.c b/drivers/video/msm/mdss/mdss_edp_aux.c
index bbcee19..1c36ab0 100644
--- a/drivers/video/msm/mdss/mdss_edp_aux.c
+++ b/drivers/video/msm/mdss/mdss_edp_aux.c
@@ -1196,7 +1196,6 @@
static void edp_clear_training_pattern(struct mdss_edp_drv_pdata *ep)
{
pr_debug("%s:\n", __func__);
- edp_write(ep->base + EDP_STATE_CTRL, 0);
edp_train_pattern_set_write(ep, 0);
usleep(ep->dpcd.training_read_interval);
}
@@ -1224,6 +1223,7 @@
mdss_edp_config_ctrl(ep);
mdss_edp_lane_power_ctrl(ep, 1);
+ mdss_edp_state_ctrl(ep, 0);
edp_clear_training_pattern(ep);
usleep(ep->dpcd.training_read_interval);
@@ -1240,6 +1240,7 @@
pr_debug("%s: Training 1 completed successfully", __func__);
+ mdss_edp_state_ctrl(ep, 0);
edp_clear_training_pattern(ep);
ret = edp_start_link_train_2(ep);
if (ret < 0) {
@@ -1312,12 +1313,18 @@
int mdss_edp_link_train(struct mdss_edp_drv_pdata *ep)
{
- return edp_aux_link_train(ep);
+ int ret;
+
+ mutex_lock(&ep->train_mutex);
+ ret = edp_aux_link_train(ep);
+ mutex_unlock(&ep->train_mutex);
+ return ret;
}
void mdss_edp_aux_init(struct mdss_edp_drv_pdata *ep)
{
mutex_init(&ep->aux_mutex);
+ mutex_init(&ep->train_mutex);
init_completion(&ep->aux_comp);
init_completion(&ep->train_comp);
init_completion(&ep->idle_comp);
diff --git a/drivers/video/msm/mdss/mdss_fb.c b/drivers/video/msm/mdss/mdss_fb.c
index 08cdcef..1df2903 100644
--- a/drivers/video/msm/mdss/mdss_fb.c
+++ b/drivers/video/msm/mdss/mdss_fb.c
@@ -2,7 +2,7 @@
* Core MDSS framebuffer driver.
*
* Copyright (C) 2007 Google Incorporated
- * Copyright (c) 2008-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2008-2014, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -121,7 +121,11 @@
if (notify > NOTIFY_UPDATE_POWER_OFF)
return -EINVAL;
- if (notify == NOTIFY_UPDATE_START) {
+ if (mfd->update.is_suspend) {
+ to_user = NOTIFY_TYPE_SUSPEND;
+ mfd->update.is_suspend = 0;
+ ret = 1;
+ } else if (notify == NOTIFY_UPDATE_START) {
INIT_COMPLETION(mfd->update.comp);
ret = wait_for_completion_timeout(
&mfd->update.comp, 4 * HZ);
@@ -264,10 +268,14 @@
return ret;
}
-static void mdss_fb_parse_dt_split(struct msm_fb_data_type *mfd)
+static void mdss_fb_parse_dt(struct msm_fb_data_type *mfd)
{
u32 data[2];
struct platform_device *pdev = mfd->pdev;
+
+ mfd->splash_logo_enabled = of_property_read_bool(pdev->dev.of_node,
+ "qcom,mdss-fb-splash-logo-enabled");
+
if (of_property_read_u32_array(pdev->dev.of_node, "qcom,mdss-fb-split",
data, 2))
return;
@@ -439,19 +447,29 @@
mfd->mdp_sync_pt_data.timeline =
sw_sync_timeline_create(timeline_name);
if (mfd->mdp_sync_pt_data.timeline == NULL) {
- pr_err("%s: cannot create time line", __func__);
+ pr_err("cannot create release fence time line\n");
return -ENOMEM;
}
mfd->mdp_sync_pt_data.notifier.notifier_call =
__mdss_fb_sync_buf_done_callback;
}
- if ((mfd->panel.type == WRITEBACK_PANEL) ||
- (mfd->panel.type == MIPI_CMD_PANEL))
- mfd->mdp_sync_pt_data.threshold = 1;
- else
- mfd->mdp_sync_pt_data.threshold = 2;
- if (mfd->index == 0) {
+ switch (mfd->panel.type) {
+ case WRITEBACK_PANEL:
+ mfd->mdp_sync_pt_data.threshold = 1;
+ mfd->mdp_sync_pt_data.retire_threshold = 0;
+ break;
+ case MIPI_CMD_PANEL:
+ mfd->mdp_sync_pt_data.threshold = 1;
+ mfd->mdp_sync_pt_data.retire_threshold = 1;
+ break;
+ default:
+ mfd->mdp_sync_pt_data.threshold = 2;
+ mfd->mdp_sync_pt_data.retire_threshold = 0;
+ break;
+ }
+
+ if (mfd->splash_logo_enabled) {
mfd->splash_thread = kthread_run(mdss_fb_splash_thread, mfd,
"mdss_fb_splash");
if (IS_ERR(mfd->splash_thread)) {
@@ -773,6 +791,7 @@
}
mutex_lock(&mfd->update.lock);
mfd->update.type = NOTIFY_TYPE_UPDATE;
+ mfd->update.is_suspend = 0;
mutex_unlock(&mfd->update.lock);
}
break;
@@ -787,7 +806,9 @@
mutex_lock(&mfd->update.lock);
mfd->update.type = NOTIFY_TYPE_SUSPEND;
+ mfd->update.is_suspend = 1;
mutex_unlock(&mfd->update.lock);
+ complete(&mfd->update.comp);
del_timer(&mfd->no_update.timer);
mfd->no_update.value = NOTIFY_TYPE_SUSPEND;
complete(&mfd->no_update.comp);
@@ -1144,7 +1165,7 @@
mfd->panel_power_on = false;
mfd->dcm_state = DCM_UNINIT;
- mdss_fb_parse_dt_split(mfd);
+ mdss_fb_parse_dt(mfd);
if (mdss_fb_alloc_fbmem(mfd)) {
pr_err("unable to allocate framebuffer memory\n");
@@ -1993,42 +2014,37 @@
}
/**
- * mdss_fb_sync_get_rel_fence() - get release fence from sync pt timeline
- * @sync_pt_data: Sync pt structure holding timeline and fence info.
+ * mdss_fb_sync_get_fence() - get fence from timeline
+ * @timeline: Timeline to create the fence on
+ * @fence_name: Name of the fence that will be created for debugging
+ * @val: Timeline value at which the fence will be signaled
*
- * Function returns a release fence on the timeline associated with the
- * sync pt struct given and it's associated information. The release fence
- * created can be used to signal when buffers provided will be released.
+ * Function returns a fence on the timeline given with the name provided.
+ * The fence created will be signaled when the timeline is advanced.
*/
-static struct sync_fence *__mdss_fb_sync_get_rel_fence(
- struct msm_sync_pt_data *sync_pt_data)
+struct sync_fence *mdss_fb_sync_get_fence(struct sw_sync_timeline *timeline,
+ const char *fence_name, int val)
{
- struct sync_pt *rel_sync_pt;
- struct sync_fence *rel_fence;
- int val;
+ struct sync_pt *sync_pt;
+ struct sync_fence *fence;
- val = sync_pt_data->timeline_value + sync_pt_data->threshold +
- atomic_read(&sync_pt_data->commit_cnt);
+ pr_debug("%s: buf sync fence timeline=%d\n", fence_name, val);
- pr_debug("%s: buf sync rel fence timeline=%d\n",
- sync_pt_data->fence_name, val);
-
- rel_sync_pt = sw_sync_pt_create(sync_pt_data->timeline, val);
- if (rel_sync_pt == NULL) {
- pr_err("%s: cannot create sync point\n",
- sync_pt_data->fence_name);
+ sync_pt = sw_sync_pt_create(timeline, val);
+ if (sync_pt == NULL) {
+ pr_err("%s: cannot create sync point\n", fence_name);
return NULL;
}
/* create fence */
- rel_fence = sync_fence_create(sync_pt_data->fence_name, rel_sync_pt);
- if (rel_fence == NULL) {
- sync_pt_free(rel_sync_pt);
- pr_err("%s: cannot create fence\n", sync_pt_data->fence_name);
+ fence = sync_fence_create(fence_name, sync_pt);
+ if (fence == NULL) {
+ sync_pt_free(sync_pt);
+ pr_err("%s: cannot create fence\n", fence_name);
return NULL;
}
- return rel_fence;
+ return fence;
}
static int mdss_fb_handle_buf_sync_ioctl(struct msm_sync_pt_data *sync_pt_data,
@@ -2036,8 +2052,10 @@
{
int i, ret = 0;
int acq_fen_fd[MDP_MAX_FENCE_FD];
- struct sync_fence *fence, *rel_fence;
+ struct sync_fence *fence, *rel_fence, *retire_fence;
int rel_fen_fd;
+ int retire_fen_fd;
+ int val;
if ((buf_sync->acq_fen_fd_cnt > MDP_MAX_FENCE_FD) ||
(sync_pt_data->timeline == NULL))
@@ -2074,7 +2092,12 @@
if (ret)
goto buf_sync_err_1;
- rel_fence = __mdss_fb_sync_get_rel_fence(sync_pt_data);
+ val = sync_pt_data->timeline_value + sync_pt_data->threshold +
+ atomic_read(&sync_pt_data->commit_cnt);
+
+ /* Set release fence */
+ rel_fence = mdss_fb_sync_get_fence(sync_pt_data->timeline,
+ sync_pt_data->fence_name, val);
if (IS_ERR_OR_NULL(rel_fence)) {
pr_err("%s: unable to retrieve release fence\n",
sync_pt_data->fence_name);
@@ -2098,6 +2121,50 @@
pr_err("%s: copy_to_user failed\n", sync_pt_data->fence_name);
goto buf_sync_err_3;
}
+
+ if (!(buf_sync->flags & MDP_BUF_SYNC_FLAG_RETIRE_FENCE))
+ goto skip_retire_fence;
+
+ if (sync_pt_data->get_retire_fence)
+ retire_fence = sync_pt_data->get_retire_fence(sync_pt_data);
+ else
+ retire_fence = NULL;
+
+ if (IS_ERR_OR_NULL(retire_fence)) {
+ val += sync_pt_data->retire_threshold;
+ retire_fence = mdss_fb_sync_get_fence(
+ sync_pt_data->timeline, "mdp-retire", val);
+ }
+
+ if (IS_ERR_OR_NULL(retire_fence)) {
+ pr_err("%s: unable to retrieve retire fence\n",
+ sync_pt_data->fence_name);
+ ret = retire_fence ? PTR_ERR(rel_fence) : -ENOMEM;
+ goto buf_sync_err_3;
+ }
+ retire_fen_fd = get_unused_fd_flags(0);
+
+ if (retire_fen_fd < 0) {
+ pr_err("%s: get_unused_fd_flags failed for retire fence\n",
+ sync_pt_data->fence_name);
+ ret = -EIO;
+ sync_fence_put(retire_fence);
+ goto buf_sync_err_3;
+ }
+
+ sync_fence_install(retire_fence, retire_fen_fd);
+
+ ret = copy_to_user(buf_sync->retire_fen_fd, &retire_fen_fd,
+ sizeof(int));
+ if (ret) {
+ pr_err("%s: copy_to_user failed for retire fence\n",
+ sync_pt_data->fence_name);
+ put_unused_fd(retire_fen_fd);
+ sync_fence_put(retire_fence);
+ goto buf_sync_err_3;
+ }
+
+skip_retire_fence:
mutex_unlock(&sync_pt_data->sync_mutex);
if (buf_sync->flags & MDP_BUF_SYNC_FLAG_WAIT)
@@ -2242,13 +2309,6 @@
return -EEXIST;
}
- if ((fb_pdata->panel_info.type != MIPI_VIDEO_PANEL) ||
- (pdata->panel_info.type != MIPI_VIDEO_PANEL)) {
- pr_err("Split panel not supported for panel type %d\n",
- pdata->panel_info.type);
- return -EINVAL;
- }
-
fb_pdata->next = pdata;
return 0;
@@ -2355,3 +2415,27 @@
}
module_init(mdss_fb_init);
+
+int mdss_fb_suspres_panel(struct device *dev, void *data)
+{
+ struct msm_fb_data_type *mfd;
+ int rc;
+ u32 event;
+
+ if (!data) {
+ pr_err("Device state not defined\n");
+ return -EINVAL;
+ }
+ mfd = dev_get_drvdata(dev);
+ if (!mfd)
+ return 0;
+
+ event = *((bool *) data) ? MDSS_EVENT_RESUME : MDSS_EVENT_SUSPEND;
+
+ rc = mdss_fb_send_panel_event(mfd, event, NULL);
+ if (rc)
+ pr_warn("unable to %s fb%d (%d)\n",
+ event == MDSS_EVENT_RESUME ? "resume" : "suspend",
+ mfd->index, rc);
+ return rc;
+}
diff --git a/drivers/video/msm/mdss/mdss_fb.h b/drivers/video/msm/mdss/mdss_fb.h
index e796fc6..2e024c9 100644
--- a/drivers/video/msm/mdss/mdss_fb.h
+++ b/drivers/video/msm/mdss/mdss_fb.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2008-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -85,6 +85,7 @@
struct completion comp;
struct mutex lock;
int value;
+ int is_suspend;
};
struct msm_sync_pt_data {
@@ -95,13 +96,16 @@
struct sw_sync_timeline *timeline;
int timeline_value;
u32 threshold;
-
+ u32 retire_threshold;
atomic_t commit_cnt;
bool flushed;
bool async_wait_fences;
struct mutex sync_mutex;
struct notifier_block notifier;
+
+ struct sync_fence *(*get_retire_fence)
+ (struct msm_sync_pt_data *sync_pt_data);
};
struct msm_fb_data_type;
@@ -211,6 +215,7 @@
bool shutdown_pending;
struct task_struct *splash_thread;
+ bool splash_logo_enabled;
struct msm_fb_backup_type msm_fb_backup;
struct completion power_set_comp;
@@ -244,6 +249,9 @@
void mdss_fb_update_backlight(struct msm_fb_data_type *mfd);
void mdss_fb_wait_for_fence(struct msm_sync_pt_data *sync_pt_data);
void mdss_fb_signal_timeline(struct msm_sync_pt_data *sync_pt_data);
+struct sync_fence *mdss_fb_sync_get_fence(struct sw_sync_timeline *timeline,
+ const char *fence_name, int val);
int mdss_fb_register_mdp_instance(struct msm_mdp_interface *mdp);
int mdss_fb_dcm(struct msm_fb_data_type *mfd, int req_state);
+int mdss_fb_suspres_panel(struct device *dev, void *data);
#endif /* MDSS_FB_H */
diff --git a/drivers/video/msm/mdss/mdss_hdmi_edid.c b/drivers/video/msm/mdss/mdss_hdmi_edid.c
index a45876b..d0b89a3 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_edid.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_edid.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1120,7 +1120,7 @@
u8 i = 0, offset = 0, std_blk = 0;
u32 video_format = HDMI_VFRMT_640x480p60_4_3;
u32 has480p = false;
- u8 len;
+ u8 len = 0;
int rc;
const u8 *edid_blk0 = NULL;
const u8 *edid_blk1 = NULL;
@@ -1140,7 +1140,7 @@
hdmi_edid_find_block(data_buf+0x80, DBC_START_OFFSET,
VIDEO_DATA_BLOCK, &len) : NULL;
- if (svd == NULL || len == 0 || len > MAX_DATA_BLOCK_SIZE) {
+ if (num_of_cea_blocks && (len == 0 || len > MAX_DATA_BLOCK_SIZE)) {
DEV_DBG("%s: No/Invalid Video Data Block\n",
__func__);
return;
diff --git a/drivers/video/msm/mdss/mdss_hdmi_tx.c b/drivers/video/msm/mdss/mdss_hdmi_tx.c
index a29fb751..79afdca 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_tx.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_tx.c
@@ -20,6 +20,7 @@
#include <linux/of_gpio.h>
#include <linux/of_platform.h>
#include <linux/types.h>
+#include <linux/msm_hdmi.h>
#include <mach/msm_hdmi_audio_codec.h>
#define REG_DUMP 0
@@ -119,6 +120,7 @@
static inline void hdmi_tx_set_audio_switch_node(struct hdmi_tx_ctrl *hdmi_ctrl,
int val, bool force);
static int hdmi_tx_audio_setup(struct hdmi_tx_ctrl *hdmi_ctrl);
+static void hdmi_tx_en_encryption(struct hdmi_tx_ctrl *hdmi_ctrl, u32 on);
struct mdss_hw hdmi_tx_hw = {
.hw_ndx = MDSS_HW_HDMI,
@@ -133,6 +135,7 @@
};
struct dss_gpio ddc_gpio_config[] = {
+ {0, 1, COMPATIBLE_NAME "-ddc-mux-sel"},
{0, 1, COMPATIBLE_NAME "-ddc-clk"},
{0, 1, COMPATIBLE_NAME "-ddc-data"}
};
@@ -222,6 +225,77 @@
{20480, 247500} } },
};
+int register_hdmi_cable_notification(struct hdmi_cable_notify *handler)
+{
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+ struct list_head *pos;
+
+ if (!hdmi_tx_hw.ptr) {
+ DEV_WARN("%s: HDMI Tx core not ready\n", __func__);
+ return -EPROBE_DEFER;
+ }
+
+ if (!handler) {
+ DEV_ERR("%s: Empty handler\n", __func__);
+ return -ENODEV;
+ }
+
+ hdmi_ctrl = (struct hdmi_tx_ctrl *) hdmi_tx_hw.ptr;
+
+ mutex_lock(&hdmi_ctrl->cable_notify_mutex);
+ handler->status = hdmi_ctrl->hpd_state;
+ list_for_each(pos, &hdmi_ctrl->cable_notify_handlers);
+ list_add_tail(&handler->link, pos);
+ mutex_unlock(&hdmi_ctrl->cable_notify_mutex);
+
+ return handler->status;
+} /* register_hdmi_cable_notification */
+
+int unregister_hdmi_cable_notification(struct hdmi_cable_notify *handler)
+{
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+
+ if (!hdmi_tx_hw.ptr) {
+ DEV_WARN("%s: HDMI Tx core not ready\n", __func__);
+ return -ENODEV;
+ }
+
+ if (!handler) {
+ DEV_ERR("%s: Empty handler\n", __func__);
+ return -ENODEV;
+ }
+
+ hdmi_ctrl = (struct hdmi_tx_ctrl *) hdmi_tx_hw.ptr;
+
+ mutex_lock(&hdmi_ctrl->cable_notify_mutex);
+ list_del(&handler->link);
+ mutex_unlock(&hdmi_ctrl->cable_notify_mutex);
+
+ return 0;
+} /* unregister_hdmi_cable_notification */
+
+static void hdmi_tx_cable_notify_work(struct work_struct *work)
+{
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+ struct hdmi_cable_notify *pos;
+
+ hdmi_ctrl = container_of(work, struct hdmi_tx_ctrl, cable_notify_work);
+
+ if (!hdmi_ctrl) {
+ DEV_ERR("%s: invalid hdmi data\n", __func__);
+ return;
+ }
+
+ mutex_lock(&hdmi_ctrl->cable_notify_mutex);
+ list_for_each_entry(pos, &hdmi_ctrl->cable_notify_handlers, link) {
+ if (pos->status != hdmi_ctrl->hpd_state) {
+ pos->status = hdmi_ctrl->hpd_state;
+ pos->hpd_notify(pos);
+ }
+ }
+ mutex_unlock(&hdmi_ctrl->cable_notify_mutex);
+} /* hdmi_tx_cable_notify_work */
+
static bool hdmi_tx_is_cea_format(int mode)
{
bool cea_fmt;
@@ -327,6 +401,9 @@
if (!hdmi_ctrl->pdata.primary && (hdmi_ctrl->sdev.state != val))
switch_set_state(&hdmi_ctrl->sdev, val);
+
+ /* Notify all registered modules of cable connection status */
+ schedule_work(&hdmi_ctrl->cable_notify_work);
} /* hdmi_tx_send_cable_notification */
static inline u32 hdmi_tx_is_dvi_mode(struct hdmi_tx_ctrl *hdmi_ctrl)
@@ -840,11 +917,11 @@
switch (status) {
case HDCP_STATE_AUTHENTICATED:
if (hdmi_ctrl->hpd_state) {
- /* Clear AV Mute */
- rc = hdmi_tx_config_avmute(hdmi_ctrl, 0);
- if (rc)
- DEV_ERR("%s: Failed to clear av mute. rc=%d\n",
- __func__, rc);
+ if (hdmi_ctrl->pdata.primary)
+ hdmi_tx_en_encryption(hdmi_ctrl, true);
+ else
+ /* Clear AV Mute */
+ rc = hdmi_tx_config_avmute(hdmi_ctrl, 0);
hdmi_tx_set_audio_switch_node(hdmi_ctrl, 1, false);
}
break;
@@ -852,11 +929,11 @@
hdmi_tx_set_audio_switch_node(hdmi_ctrl, 0, false);
if (hdmi_ctrl->hpd_state) {
- /* Set AV Mute */
- rc = hdmi_tx_config_avmute(hdmi_ctrl, 1);
- if (rc)
- DEV_ERR("%s: Failed to set av mute. rc=%d\n",
- __func__, rc);
+ if (hdmi_ctrl->pdata.primary)
+ hdmi_tx_en_encryption(hdmi_ctrl, false);
+ else
+ /* Set AV Mute */
+ rc = hdmi_tx_config_avmute(hdmi_ctrl, 1);
DEV_DBG("%s: Reauthenticating\n", __func__);
rc = hdmi_hdcp_reauthenticate(
@@ -1570,6 +1647,28 @@
DSS_REG_W(io, HDMI_GEN_PKT_CTRL, packet_control);
} /* hdmi_tx_set_spd_infoframe */
+static void hdmi_tx_en_encryption(struct hdmi_tx_ctrl *hdmi_ctrl, u32 on)
+{
+ u32 reg_val;
+ struct dss_io_data *io = NULL;
+
+ if (!hdmi_ctrl->hdcp_feature_on || !hdmi_ctrl->present_hdcp)
+ return;
+
+ io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+
+ mutex_lock(&hdmi_ctrl->mutex);
+ reg_val = DSS_REG_R_ND(io, HDMI_CTRL);
+
+ if (on)
+ reg_val |= BIT(2);
+ else
+ reg_val &= ~BIT(2);
+ DSS_REG_W(io, HDMI_CTRL, reg_val);
+
+ mutex_unlock(&hdmi_ctrl->mutex);
+} /* hdmi_tx_en_encryption */
+
static void hdmi_tx_set_mode(struct hdmi_tx_ctrl *hdmi_ctrl, u32 power_on)
{
struct dss_io_data *io = NULL;
@@ -1586,12 +1685,14 @@
return;
}
+ mutex_lock(&hdmi_ctrl->mutex);
if (power_on) {
/* Enable the block */
reg_val |= BIT(0);
/* HDMI Encryption, if HDCP is enabled */
- if (hdmi_ctrl->hdcp_feature_on && hdmi_ctrl->present_hdcp)
+ if (hdmi_ctrl->hdcp_feature_on &&
+ hdmi_ctrl->present_hdcp && !hdmi_ctrl->pdata.primary)
reg_val |= BIT(2);
/* Set transmission mode to DVI based in EDID info */
@@ -1601,6 +1702,7 @@
}
DSS_REG_W(io, HDMI_CTRL, reg_val);
+ mutex_unlock(&hdmi_ctrl->mutex);
DEV_DBG("HDMI Core: %s, HDMI_CTRL=0x%08x\n",
power_on ? "Enable" : "Disable", reg_val);
@@ -2566,6 +2668,11 @@
hdmi_ctrl->panel_power_on = true;
mutex_unlock(&hdmi_ctrl->mutex);
+ if (hdmi_ctrl->pdata.primary) {
+ if (hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_DDC_PM, true))
+ DEV_ERR("%s: Failed to enable ddc power\n", __func__);
+ }
+
hdmi_cec_config(hdmi_ctrl->feature_data[HDMI_TX_FEAT_CEC]);
if (hdmi_ctrl->hpd_state) {
@@ -2835,6 +2942,7 @@
if (hdmi_ctrl->workq)
destroy_workqueue(hdmi_ctrl->workq);
mutex_destroy(&hdmi_ctrl->lut_lock);
+ mutex_destroy(&hdmi_ctrl->cable_notify_mutex);
mutex_destroy(&hdmi_ctrl->mutex);
hdmi_tx_hw.ptr = NULL;
@@ -2864,6 +2972,10 @@
hdmi_setup_video_mode_lut();
mutex_init(&hdmi_ctrl->mutex);
mutex_init(&hdmi_ctrl->lut_lock);
+ mutex_init(&hdmi_ctrl->cable_notify_mutex);
+
+ INIT_LIST_HEAD(&hdmi_ctrl->cable_notify_handlers);
+
hdmi_ctrl->workq = create_workqueue("hdmi_tx_workq");
if (!hdmi_ctrl->workq) {
DEV_ERR("%s: hdmi_tx_workq creation failed.\n", __func__);
@@ -2881,8 +2993,9 @@
hdmi_ctrl->hpd_initialized = false;
hdmi_ctrl->hpd_off_pending = false;
init_completion(&hdmi_ctrl->hpd_done);
- INIT_WORK(&hdmi_ctrl->hpd_int_work, hdmi_tx_hpd_int_work);
+ INIT_WORK(&hdmi_ctrl->hpd_int_work, hdmi_tx_hpd_int_work);
+ INIT_WORK(&hdmi_ctrl->cable_notify_work, hdmi_tx_cable_notify_work);
INIT_WORK(&hdmi_ctrl->power_off_work, hdmi_tx_power_off_work);
spin_lock_init(&hdmi_ctrl->hpd_state_lock);
@@ -3027,10 +3140,10 @@
case MDSS_EVENT_PANEL_ON:
if (hdmi_ctrl->hdcp_feature_on && hdmi_ctrl->present_hdcp) {
/* Set AV Mute before starting authentication */
- rc = hdmi_tx_config_avmute(hdmi_ctrl, 1);
- if (rc)
- DEV_ERR("%s: Failed to set av mute. rc=%d\n",
- __func__, rc);
+ if (hdmi_ctrl->pdata.primary)
+ hdmi_tx_en_encryption(hdmi_ctrl, false);
+ else
+ rc = hdmi_tx_config_avmute(hdmi_ctrl, 1);
DEV_DBG("%s: Starting HDCP authentication\n", __func__);
rc = hdmi_hdcp_authenticate(
diff --git a/drivers/video/msm/mdss/mdss_hdmi_tx.h b/drivers/video/msm/mdss/mdss_hdmi_tx.h
index 0787dee..8233ba8 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_tx.h
+++ b/drivers/video/msm/mdss/mdss_hdmi_tx.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -55,6 +55,8 @@
struct mutex mutex;
struct mutex lut_lock;
+ struct mutex cable_notify_mutex;
+ struct list_head cable_notify_handlers;
struct kobject *kobj;
struct switch_dev sdev;
struct switch_dev audio_sdev;
@@ -78,6 +80,7 @@
struct work_struct hpd_int_work;
struct work_struct power_off_work;
+ struct work_struct cable_notify_work;
bool hdcp_feature_on;
u32 present_hdcp;
diff --git a/drivers/video/msm/mdss/mdss_hdmi_util.c b/drivers/video/msm/mdss/mdss_hdmi_util.c
index de422a4..6f6c805 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_util.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_util.c
@@ -46,6 +46,7 @@
int hdmi_get_video_id_code(struct msm_hdmi_mode_timing_info *timing_in)
{
int i, vic = -1;
+ struct msm_hdmi_mode_timing_info *supported_timing;
if (!timing_in) {
DEV_ERR("%s: invalid input\n", __func__);
@@ -54,8 +55,7 @@
/* active_low_h, active_low_v and interlaced are not checked against */
for (i = 0; i < HDMI_VFRMT_MAX; i++) {
- struct msm_hdmi_mode_timing_info *supported_timing =
- &hdmi_supported_video_mode_lut[i];
+ supported_timing = &hdmi_supported_video_mode_lut[i];
if (!supported_timing->supported)
continue;
@@ -84,8 +84,24 @@
break;
}
- if (vic < 0)
- DEV_ERR("%s: timing asked is not yet supported\n", __func__);
+ if (vic < 0) {
+ for (i = 0; i < HDMI_VFRMT_MAX; i++) {
+ supported_timing = &hdmi_supported_video_mode_lut[i];
+ if (!supported_timing->supported)
+ continue;
+ if (timing_in->active_h != supported_timing->active_h)
+ continue;
+ if (timing_in->active_v != supported_timing->active_v)
+ continue;
+ vic = (int)supported_timing->video_format;
+ break;
+ }
+ }
+
+ if (vic < 0) {
+ DEV_ERR("%s: timing is not supported h=%d v=%d\n",
+ __func__, timing_in->active_h, timing_in->active_v);
+ }
exit:
DEV_DBG("%s: vic = %d timing = %s\n", __func__, vic,
diff --git a/drivers/video/msm/mdss/mdss_mdp.c b/drivers/video/msm/mdss/mdss_mdp.c
index fe33331..e1786a6 100644
--- a/drivers/video/msm/mdss/mdss_mdp.c
+++ b/drivers/video/msm/mdss/mdss_mdp.c
@@ -1,7 +1,7 @@
/*
* MDSS MDP Interface (used by framebuffer core)
*
- * Copyright (c) 2007-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2007-2014, The Linux Foundation. All rights reserved.
* Copyright (C) 2007 Google Incorporated
*
* This software is licensed under the terms of the GNU General Public
@@ -80,21 +80,7 @@
static DEFINE_SPINLOCK(mdp_lock);
static DEFINE_MUTEX(mdp_clk_lock);
static DEFINE_MUTEX(bus_bw_lock);
-
-#define MDP_BUS_VECTOR_ENTRY(ab_val, ib_val) \
- { \
- .src = MSM_BUS_MASTER_MDP_PORT0, \
- .dst = MSM_BUS_SLAVE_EBI_CH0, \
- .ab = (ab_val), \
- .ib = (ib_val), \
- }
-
-static struct msm_bus_vectors mdp_bus_vectors[] = {
- MDP_BUS_VECTOR_ENTRY(0, 0),
- MDP_BUS_VECTOR_ENTRY(SZ_128M, SZ_256M),
- MDP_BUS_VECTOR_ENTRY(SZ_256M, SZ_512M),
-};
-static struct msm_bus_paths mdp_bus_usecases[ARRAY_SIZE(mdp_bus_vectors)];
+static DEFINE_MUTEX(mdp_iommu_lock);
static struct mdss_panel_intf pan_types[] = {
{"dsi", MDSS_PANEL_INTF_DSI},
@@ -102,12 +88,6 @@
{"hdmi", MDSS_PANEL_INTF_HDMI},
};
-static struct msm_bus_scale_pdata mdp_bus_scale_table = {
- .usecase = mdp_bus_usecases,
- .num_usecases = ARRAY_SIZE(mdp_bus_usecases),
- .name = "mdss_mdp",
-};
-
struct mdss_iommu_map_type mdss_iommu_map[MDSS_IOMMU_MAX_DOMAIN] = {
[MDSS_IOMMU_DOMAIN_UNSECURE] = {
.client_name = "mdp_ns",
@@ -153,8 +133,10 @@
static int mdss_mdp_parse_dt_prop_len(struct platform_device *pdev,
char *prop_name);
static int mdss_mdp_parse_dt_smp(struct platform_device *pdev);
+static int mdss_mdp_parse_dt_prefill(struct platform_device *pdev);
static int mdss_mdp_parse_dt_misc(struct platform_device *pdev);
static int mdss_mdp_parse_dt_ad_cfg(struct platform_device *pdev);
+static int mdss_mdp_parse_dt_bus_scale(struct platform_device *pdev);
u32 mdss_mdp_fb_stride(u32 fb_index, u32 xres, int bpp)
{
@@ -331,23 +313,17 @@
static int mdss_mdp_bus_scale_register(struct mdss_data_type *mdata)
{
if (!mdata->bus_hdl) {
- struct msm_bus_scale_pdata *bus_pdata = &mdp_bus_scale_table;
- int i;
-
- for (i = 0; i < bus_pdata->num_usecases; i++) {
- mdp_bus_usecases[i].num_paths = 1;
- mdp_bus_usecases[i].vectors = &mdp_bus_vectors[i];
- }
-
- mdata->bus_hdl = msm_bus_scale_register_client(bus_pdata);
- if (!mdata->bus_hdl) {
- pr_err("not able to get bus scale\n");
- return -ENOMEM;
+ mdata->bus_hdl =
+ msm_bus_scale_register_client(mdata->bus_scale_table);
+ if (IS_ERR_VALUE(mdata->bus_hdl)) {
+ pr_err("bus_client register failed\n");
+ return -EINVAL;
}
pr_debug("register bus_hdl=%x\n", mdata->bus_hdl);
}
- return 0;
+
+ return mdss_mdp_bus_scale_set_quota(AB_QUOTA, IB_QUOTA);
}
static void mdss_mdp_bus_scale_unregister(struct mdss_data_type *mdata)
@@ -360,7 +336,7 @@
int mdss_mdp_bus_scale_set_quota(u64 ab_quota, u64 ib_quota)
{
- int bus_idx;
+ int new_uc_idx;
if (mdss_res->bus_hdl < 1) {
pr_err("invalid bus handle %d\n", mdss_res->bus_hdl);
@@ -368,32 +344,50 @@
}
if ((ab_quota | ib_quota) == 0) {
- bus_idx = 0;
+ new_uc_idx = 0;
} else {
- int num_cases = mdp_bus_scale_table.num_usecases;
+ int i;
struct msm_bus_vectors *vect = NULL;
+ struct msm_bus_scale_pdata *bw_table =
+ mdss_res->bus_scale_table;
+ unsigned long size;
- bus_idx = (mdss_res->current_bus_idx % (num_cases - 1)) + 1;
-
- vect = mdp_bus_scale_table.usecase[mdss_res->current_bus_idx].
- vectors;
-
- /* avoid performing updates for small changes */
- if ((ALIGN(ab_quota, SZ_64M) == ALIGN(vect->ab, SZ_64M)) &&
- (ALIGN(ib_quota, SZ_64M) == ALIGN(vect->ib, SZ_64M))) {
- pr_debug("skip bus scaling, no change in vectors\n");
- return 0;
+ if (!bw_table || !mdss_res->axi_port_cnt) {
+ pr_err("invalid input\n");
+ return -EINVAL;
}
- vect = mdp_bus_scale_table.usecase[bus_idx].vectors;
- vect->ab = ab_quota;
- vect->ib = ib_quota;
+ size = SZ_64M / mdss_res->axi_port_cnt;
- pr_debug("bus scale idx=%d ab=%llu ib=%llu\n", bus_idx,
- vect->ab, vect->ib);
+ ab_quota = div_u64(ab_quota, mdss_res->axi_port_cnt);
+ ib_quota = div_u64(ib_quota, mdss_res->axi_port_cnt);
+
+ new_uc_idx = (mdss_res->curr_bw_uc_idx %
+ (bw_table->num_usecases - 1)) + 1;
+
+ for (i = 0; i < mdss_res->axi_port_cnt; i++) {
+ vect = &bw_table->usecase[mdss_res->curr_bw_uc_idx].
+ vectors[i];
+
+ /* avoid performing updates for small changes */
+ if ((ALIGN(ab_quota, size) == ALIGN(vect->ab, size)) &&
+ (ALIGN(ib_quota, size) == ALIGN(vect->ib, size))) {
+ pr_debug("skip bus scaling, no changes\n");
+ return 0;
+ }
+
+ vect = &bw_table->usecase[new_uc_idx].vectors[i];
+ vect->ab = ab_quota;
+ vect->ib = ib_quota;
+
+ pr_debug("uc_idx=%d path_idx=%d ab=%llu ib=%llu\n",
+ new_uc_idx, i, vect->ab, vect->ib);
+ }
}
- mdss_res->current_bus_idx = bus_idx;
- return msm_bus_scale_client_update_request(mdss_res->bus_hdl, bus_idx);
+ mdss_res->curr_bw_uc_idx = new_uc_idx;
+
+ return msm_bus_scale_client_update_request(mdss_res->bus_hdl,
+ new_uc_idx);
}
static inline u32 mdss_mdp_irq_mask(u32 intr_type, u32 intf_num)
@@ -653,7 +647,9 @@
} else {
pm_runtime_get_sync(&mdata->pdev->dev);
msm_bus_scale_client_update_request(
- mdata->bus_hdl, mdata->current_bus_idx);
+ mdata->bus_hdl, mdata->curr_bw_uc_idx);
+ if (!mdata->handoff_pending)
+ mdss_iommu_attach(mdata);
}
}
@@ -784,8 +780,10 @@
struct mdss_iommu_map_type *iomap;
int i;
+ mutex_lock(&mdp_iommu_lock);
if (mdata->iommu_attached) {
pr_debug("mdp iommu already attached\n");
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -802,6 +800,7 @@
}
mdata->iommu_attached = true;
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -812,8 +811,10 @@
struct mdss_iommu_map_type *iomap;
int i;
+ mutex_lock(&mdp_iommu_lock);
if (!mdata->iommu_attached) {
pr_debug("mdp iommu already dettached\n");
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -830,6 +831,7 @@
}
mdata->iommu_attached = false;
+ mutex_unlock(&mdp_iommu_lock);
return 0;
}
@@ -1042,17 +1044,29 @@
return rc;
}
+/**
+ * mdss_mdp_footswitch_ctrl_splash() - clocks handoff for cont. splash screen
+ * @on: 1 to start handoff, 0 to complete the handoff after first frame update
+ *
+ * MDSS Clocks and GDSC are already on during continous splash screen, but
+ * increasing ref count will keep clocks from being turned off until handoff
+ * has properly happend after frame update.
+ */
void mdss_mdp_footswitch_ctrl_splash(int on)
{
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (mdata != NULL) {
if (on) {
pr_debug("Enable MDP FS for splash.\n");
+ mdata->handoff_pending = true;
regulator_enable(mdata->fs);
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
mdss_hw_init(mdata);
} else {
pr_debug("Disable MDP FS for splash.\n");
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
regulator_disable(mdata->fs);
+ mdata->handoff_pending = false;
}
} else {
pr_warn("mdss mdata not initialized\n");
@@ -1076,6 +1090,7 @@
SPRINT("dma_pipes=%d\n", mdata->ndma_pipes);
SPRINT("smp_count=%d\n", mdata->smp_mb_cnt);
SPRINT("smp_size=%d\n", mdata->smp_mb_size);
+ SPRINT("smp_mb_per_pipe=%d\n", mdata->smp_mb_per_pipe);
SPRINT("max_downscale_ratio=%d\n", MAX_DOWNSCALE_RATIO);
SPRINT("max_upscale_ratio=%d\n", MAX_UPSCALE_RATIO);
if (mdata->max_bw_low)
@@ -1087,6 +1102,8 @@
SPRINT(" bwc");
if (mdata->has_decimation)
SPRINT(" decimation");
+ if (mdata->highest_bank_bit)
+ SPRINT(" tile_format");
SPRINT("\n");
return cnt;
@@ -1207,7 +1224,6 @@
pr_err("unable to register bus scaling\n");
goto probe_done;
}
- mdss_mdp_bus_scale_set_quota(AB_QUOTA, IB_QUOTA);
rc = mdss_mdp_debug_init(mdata);
if (rc) {
@@ -1528,6 +1544,12 @@
return rc;
}
+ rc = mdss_mdp_parse_dt_prefill(pdev);
+ if (rc) {
+ pr_err("Error in device tree : prefill\n");
+ return rc;
+ }
+
rc = mdss_mdp_parse_dt_misc(pdev);
if (rc) {
pr_err("Error in device tree : misc\n");
@@ -1547,6 +1569,12 @@
return rc;
}
+ rc = mdss_mdp_parse_dt_bus_scale(pdev);
+ if (rc) {
+ pr_err("Error in device tree : bus scale\n");
+ return rc;
+ }
+
return 0;
}
@@ -2003,6 +2031,84 @@
return rc;
}
+static void mdss_mdp_parse_dt_fudge_factors(struct platform_device *pdev,
+ char *prop_name, struct mdss_fudge_factor *ff)
+{
+ int rc;
+ u32 data[2] = {1, 1};
+
+ rc = mdss_mdp_parse_dt_handler(pdev, prop_name, data, 2);
+ if (rc) {
+ pr_err("err reading %s\n", prop_name);
+ } else {
+ ff->numer = data[0];
+ ff->denom = data[1];
+ }
+}
+
+static int mdss_mdp_parse_dt_prefill(struct platform_device *pdev)
+{
+ struct mdss_data_type *mdata = platform_get_drvdata(pdev);
+ struct mdss_prefill_data *prefill = &mdata->prefill_data;
+ int rc;
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-outstanding-buffer-bytes",
+ &prefill->ot_bytes);
+ if (rc) {
+ pr_err("prefill outstanding buffer bytes not specified\n");
+ return rc;
+ }
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-y-buffer-bytes", &prefill->y_buf_bytes);
+ if (rc) {
+ pr_err("prefill y buffer bytes not specified\n");
+ return rc;
+ }
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-scaler-buffer-lines-bilinear",
+ &prefill->y_scaler_lines_bilinear);
+ if (rc) {
+ pr_err("prefill scaler lines for bilinear not specified\n");
+ return rc;
+ }
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-scaler-buffer-lines-caf",
+ &prefill->y_scaler_lines_caf);
+ if (rc) {
+ pr_debug("prefill scaler lines for caf not specified\n");
+ return rc;
+ }
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-post-scaler-buffer-pixels",
+ &prefill->post_scaler_pixels);
+ if (rc) {
+ pr_err("prefill post scaler buffer pixels not specified\n");
+ return rc;
+ }
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-pingpong-buffer-pixels",
+ &prefill->pp_pixels);
+ if (rc) {
+ pr_err("prefill pingpong buffer lines not specified\n");
+ return rc;
+ }
+
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-prefill-fbc-lines", &prefill->fbc_lines);
+ if (rc) {
+ pr_err("prefill FBC lines not specified\n");
+ return rc;
+ }
+
+ return 0;
+}
+
static int mdss_mdp_parse_dt_misc(struct platform_device *pdev)
{
struct mdss_data_type *mdata = platform_get_drvdata(pdev);
@@ -2014,6 +2120,10 @@
&data);
mdata->rot_block_size = (!rc ? data : 128);
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-rotator-ot-limit", &data);
+ mdata->rotator_ot_limit = (!rc ? data : 0);
+
mdata->has_bwc = of_property_read_bool(pdev->dev.of_node,
"qcom,mdss-has-bwc");
mdata->has_decimation = of_property_read_bool(pdev->dev.of_node,
@@ -2022,6 +2132,34 @@
"qcom,mdss-has-wfd-blk");
prop = of_find_property(pdev->dev.of_node, "batfet-supply", NULL);
mdata->batfet_required = prop ? true : false;
+ rc = of_property_read_u32(pdev->dev.of_node,
+ "qcom,mdss-highest-bank-bit", &(mdata->highest_bank_bit));
+ if (rc)
+ pr_debug("Could not read optional property: highest bank bit\n");
+
+ /*
+ * 2x factor on AB because bus driver will divide by 2
+ * due to 2x ports to BIMC
+ */
+ mdata->ab_factor.numer = 2;
+ mdata->ab_factor.denom = 1;
+ mdss_mdp_parse_dt_fudge_factors(pdev, "qcom,mdss-ab-factor",
+ &mdata->ab_factor);
+
+ /*
+ * 1.2 factor on ib as default value. This value is
+ * experimentally determined and should be tuned in device
+ * tree.
+ */
+ mdata->ib_factor.numer = 6;
+ mdata->ib_factor.denom = 5;
+ mdss_mdp_parse_dt_fudge_factors(pdev, "qcom,mdss-ib-factor",
+ &mdata->ib_factor);
+
+ mdata->clk_factor.numer = 1;
+ mdata->clk_factor.denom = 1;
+ mdss_mdp_parse_dt_fudge_factors(pdev, "qcom,mdss-clk-factor",
+ &mdata->clk_factor);
rc = of_property_read_u32(pdev->dev.of_node,
"qcom,max-bandwidth-low-kbps", &mdata->max_bw_low);
@@ -2076,6 +2214,31 @@
return rc;
}
+static int mdss_mdp_parse_dt_bus_scale(struct platform_device *pdev)
+{
+ int rc;
+ struct mdss_data_type *mdata = platform_get_drvdata(pdev);
+
+ rc = of_property_read_u32(pdev->dev.of_node, "qcom,msm-bus,num-paths",
+ &mdata->axi_port_cnt);
+ if (rc) {
+ pr_err("Error. qcom,msm-bus,num-paths prop not found.rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ mdata->bus_scale_table = msm_bus_cl_get_pdata(pdev);
+ if (IS_ERR_OR_NULL(mdata->bus_scale_table)) {
+ rc = PTR_ERR(mdata->bus_scale_table);
+ if (!rc)
+ rc = -EINVAL;
+ pr_err("msm_bus_cl_get_pdata failed. rc=%d\n", rc);
+ mdata->bus_scale_table = NULL;
+ }
+
+ return rc;
+}
+
static int mdss_mdp_parse_dt_handler(struct platform_device *pdev,
char *prop_name, u32 *offsets, int len)
{
@@ -2339,11 +2502,12 @@
static int mdss_mdp_runtime_resume(struct device *dev)
{
struct mdss_data_type *mdata = dev_get_drvdata(dev);
+ bool device_on = true;
if (!mdata)
return -ENODEV;
dev_dbg(dev, "pm_runtime: resuming...\n");
-
+ device_for_each_child(dev, &device_on, mdss_fb_suspres_panel);
mdss_mdp_footswitch_ctrl(mdata, true);
return 0;
@@ -2363,6 +2527,7 @@
static int mdss_mdp_runtime_suspend(struct device *dev)
{
struct mdss_data_type *mdata = dev_get_drvdata(dev);
+ bool device_on = false;
if (!mdata)
return -ENODEV;
dev_dbg(dev, "pm_runtime: suspending...\n");
@@ -2371,6 +2536,7 @@
pr_err("MDP suspend failed\n");
return -EBUSY;
}
+ device_for_each_child(dev, &device_on, mdss_fb_suspres_panel);
mdss_mdp_footswitch_ctrl(mdata, false);
return 0;
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index 1c4efb4..3afb27e 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -145,6 +145,14 @@
MDSS_MDP_WB_CTL_TYPE_LINE
};
+struct mdss_mdp_perf_params {
+ u64 bw_overlap;
+ u64 bw_prefill;
+ u32 prefill_bytes;
+ u64 bw_ctl;
+ u32 mdp_clk_rate;
+};
+
struct mdss_mdp_ctl {
u32 num;
char __iomem *base;
@@ -168,11 +176,11 @@
u32 dst_format;
bool is_secure;
- u32 bus_ab_quota;
- u32 bus_ib_quota;
u32 clk_rate;
- u32 perf_changed;
int force_screen_state;
+ struct mdss_mdp_perf_params cur_perf;
+ struct mdss_mdp_perf_params new_perf;
+ int perf_status;
struct mdss_data_type *mdata;
struct msm_fb_data_type *mfd;
@@ -180,6 +188,7 @@
struct mdss_mdp_mixer *mixer_right;
struct mutex lock;
struct mutex *shared_lock;
+ spinlock_t spin_lock;
struct mdss_panel_data *panel_data;
struct mdss_mdp_vsync_handler vsync_handler;
@@ -198,7 +207,8 @@
struct mdss_mdp_vsync_handler *);
int (*remove_vsync_handler) (struct mdss_mdp_ctl *,
struct mdss_mdp_vsync_handler *);
- int (*config_fps_fnc) (struct mdss_mdp_ctl *ctl, int new_fps);
+ int (*config_fps_fnc) (struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_ctl *sctl, int new_fps);
struct blocking_notifier_head notifier_head;
@@ -237,7 +247,7 @@
u8 unpack_count; /* 0 = 1 component, 1 = 2 component ... */
u8 bpp;
u8 alpha_enable; /* source has alpha */
-
+ u8 tile;
u8 bits[MAX_PLANES];
u8 element[MAX_PLANES];
};
@@ -309,6 +319,7 @@
uint32_t bl_bright_shift;
uint32_t bl_lin[AD_BL_LIN_LEN];
uint32_t bl_lin_inv[AD_BL_LIN_LEN];
+ uint32_t bl_att_lut[AD_BL_ATT_LUT_LEN];
};
struct pp_sts_type {
@@ -422,12 +433,11 @@
u32 splash_mem_addr;
u32 splash_mem_size;
u32 sd_enabled;
-};
-struct mdss_mdp_perf_params {
- u32 ib_quota;
- u32 ab_quota;
- u32 mdp_clk_rate;
+ struct sw_sync_timeline *vsync_timeline;
+ struct mdss_mdp_vsync_handler vsync_retire_handler;
+ struct work_struct retire_work;
+ int retire_cnt;
};
/**
@@ -519,8 +529,11 @@
int mdss_mdp_ctl_start(struct mdss_mdp_ctl *ctl, bool handoff);
int mdss_mdp_ctl_stop(struct mdss_mdp_ctl *ctl);
int mdss_mdp_ctl_intf_event(struct mdss_mdp_ctl *ctl, int event, void *arg);
+int mdss_mdp_perf_bw_check(struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_pipe **left_plist, int left_cnt,
+ struct mdss_mdp_pipe **right_plist, int right_cnt);
int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
- struct mdss_mdp_perf_params *perf);
+ struct mdss_mdp_perf_params *perf, struct mdss_mdp_img_rect *roi);
int mdss_mdp_ctl_notify(struct mdss_mdp_ctl *ctl, int event);
void mdss_mdp_ctl_notifier_register(struct mdss_mdp_ctl *ctl,
struct notifier_block *notifier);
@@ -529,8 +542,13 @@
int mdss_mdp_mixer_handoff(struct mdss_mdp_ctl *ctl, u32 num,
struct mdss_mdp_pipe *pipe);
+
int mdss_mdp_scan_pipes(void);
+void mdss_mdp_ctl_perf_taken(struct mdss_mdp_ctl *ctl);
+void mdss_mdp_ctl_perf_done(struct mdss_mdp_ctl *ctl);
+void mdss_mdp_ctl_perf_release_bw(struct mdss_mdp_ctl *ctl);
+
struct mdss_mdp_mixer *mdss_mdp_wb_mixer_alloc(int rotator);
int mdss_mdp_wb_mixer_destroy(struct mdss_mdp_mixer *mixer);
struct mdss_mdp_mixer *mdss_mdp_mixer_get(struct mdss_mdp_ctl *ctl, int mux);
@@ -598,6 +616,7 @@
void mdss_mdp_pipe_unmap(struct mdss_mdp_pipe *pipe);
struct mdss_mdp_pipe *mdss_mdp_pipe_alloc_dma(struct mdss_mdp_mixer *mixer);
+u32 mdss_mdp_smp_get_size(struct mdss_mdp_pipe *pipe);
int mdss_mdp_smp_reserve(struct mdss_mdp_pipe *pipe);
void mdss_mdp_smp_unreserve(struct mdss_mdp_pipe *pipe);
void mdss_mdp_smp_release(struct mdss_mdp_pipe *pipe);
@@ -632,6 +651,10 @@
void mdss_mdp_intersect_rect(struct mdss_mdp_img_rect *res_rect,
const struct mdss_mdp_img_rect *dst_rect,
const struct mdss_mdp_img_rect *sci_rect);
+void mdss_mdp_crop_rect(struct mdss_mdp_img_rect *src_rect,
+ struct mdss_mdp_img_rect *dst_rect,
+ const struct mdss_mdp_img_rect *sci_rect);
+
int mdss_mdp_wb_kickoff(struct msm_fb_data_type *mfd);
int mdss_mdp_wb_ioctl_handler(struct msm_fb_data_type *mfd, u32 cmd, void *arg);
diff --git a/drivers/video/msm/mdss/mdss_mdp_ctl.c b/drivers/video/msm/mdss/mdss_mdp_ctl.c
index db67773..b445afa 100644
--- a/drivers/video/msm/mdss/mdss_mdp_ctl.c
+++ b/drivers/video/msm/mdss/mdss_mdp_ctl.c
@@ -18,30 +18,26 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
+#include <linux/sort.h>
#include "mdss_fb.h"
#include "mdss_mdp.h"
-/* truncate at 1k */
-#define MDSS_MDP_BUS_FACTOR_SHIFT 10
-/* 1.5 bus fudge factor */
-#define MDSS_MDP_BUS_FUDGE_FACTOR_IB(val) (((val) / 2) * 3)
-#define MDSS_MDP_BUS_FUDGE_FACTOR_HIGH_IB(val) (val << 1)
-#define MDSS_MDP_BUS_FUDGE_FACTOR_AB(val) (val << 1)
-#define MDSS_MDP_BUS_FLOOR_BW (1600000000ULL >> MDSS_MDP_BUS_FACTOR_SHIFT)
+static inline u64 fudge_factor(u64 val, u32 numer, u32 denom)
+{
+ u64 result = (val * (u64)numer);
+ do_div(result, denom);
+ return result;
+}
-/* 1.25 clock fudge factor */
-#define MDSS_MDP_CLK_FUDGE_FACTOR(val) (((val) * 5) / 4)
+#define AB_FUDGE_FACTOR(val) fudge_factor((val), \
+ (mdss_res->ab_factor.numer), (mdss_res->ab_factor.denom))
-enum {
- MDSS_MDP_PERF_UPDATE_SKIP,
- MDSS_MDP_PERF_UPDATE_EARLY,
- MDSS_MDP_PERF_UPDATE_LATE,
-};
+#define IB_FUDGE_FACTOR(val) fudge_factor((val), \
+ (mdss_res->ib_factor.numer), (mdss_res->ib_factor.denom))
-#define MDSS_MDP_PERF_UPDATE_CLK BIT(0)
-#define MDSS_MDP_PERF_UPDATE_BUS BIT(1)
-#define MDSS_MDP_PERF_UPDATE_ALL -1
+#define CLK_FUDGE_FACTOR(val) fudge_factor((val), \
+ (mdss_res->clk_factor.numer), (mdss_res->clk_factor.denom))
static DEFINE_MUTEX(mdss_mdp_ctl_lock);
@@ -63,112 +59,243 @@
pinfo->clk_rate;
}
-static u32 __mdss_mdp_ctrl_perf_ovrd_helper(struct mdss_mdp_mixer *mixer,
- u32 *npipe)
+static inline u32 mdss_mdp_clk_fudge_factor(struct mdss_mdp_mixer *mixer,
+ u32 rate)
{
- struct mdss_panel_info *pinfo;
- struct mdss_mdp_pipe *pipe;
- u32 mnum, ovrd = 0;
+ struct mdss_panel_info *pinfo = &mixer->ctl->panel_data->panel_info;
- if (!mixer || !mixer->ctl->panel_data)
- return 0;
+ rate = CLK_FUDGE_FACTOR(rate);
- pinfo = &mixer->ctl->panel_data->panel_info;
- for (mnum = 0; mnum < MDSS_MDP_MAX_STAGE; mnum++) {
- pipe = mixer->stage_pipe[mnum];
- if (pipe && pinfo) {
- *npipe = *npipe + 1;
- if ((pipe->src.w >= pipe->src.h) &&
- (pipe->src.w >= pinfo->xres))
- ovrd = 1;
- }
- }
+ /*
+ * If the panel is video mode and its back porch period is
+ * small, the workaround of increasing mdp clk is needed to
+ * avoid underrun.
+ */
+ if (mixer->ctl->is_video_mode && pinfo &&
+ (pinfo->lcdc.v_back_porch < MDP_MIN_VBP))
+ rate = CLK_FUDGE_FACTOR(rate);
- return ovrd;
+ return rate;
}
-/**
- * mdss_mdp_ctrl_perf_ovrd() - Determines if performance override is needed
- * @mdata: Struct containing references to all MDP5 hardware structures
- * and status info such as interupts, target caps etc.
- * @ab_quota: Arbitrated bandwidth quota
- * @ib_quota: Instantaneous bandwidth quota
- *
- * Function calculates the minimum required MDP and BIMC clocks to avoid MDP
- * underflow during portrait video playback. The calculations are based on the
- * way MDP fetches (bandwidth requirement) and processes data through
- * MDP pipeline (MDP clock requirement) based on frame size and scaling
- * requirements.
- */
-static void __mdss_mdp_ctrl_perf_ovrd(struct mdss_data_type *mdata,
- u64 *ab_quota, u64 *ib_quota)
+struct mdss_mdp_prefill_params {
+ u32 smp_bytes;
+ u32 xres;
+ u32 src_w;
+ u32 dst_w;
+ u32 src_h;
+ u32 dst_h;
+ u32 dst_y;
+ u32 bpp;
+ bool is_yuv;
+ bool is_caf;
+ bool is_fbc;
+ bool is_bwc;
+ bool is_tile;
+ bool is_hflip;
+};
+
+static inline bool mdss_mdp_perf_is_caf(struct mdss_mdp_pipe *pipe)
{
- struct mdss_mdp_ctl *ctl;
- u32 i, npipe = 0, ovrd = 0;
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
- for (i = 0; i < mdata->nctl; i++) {
- ctl = mdata->ctl_off + i;
- if (!ctl->power_on)
- continue;
- ovrd |= __mdss_mdp_ctrl_perf_ovrd_helper(
- ctl->mixer_left, &npipe);
- ovrd |= __mdss_mdp_ctrl_perf_ovrd_helper(
- ctl->mixer_right, &npipe);
- }
+ /*
+ * CAF mode filter is enabled when format is yuv and
+ * upscaling. Post processing had the decision to use CAF
+ * under these conditions.
+ */
+ return ((mdata->mdp_rev >= MDSS_MDP_HW_REV_102) &&
+ pipe->src_fmt->is_yuv && ((pipe->src.h >> pipe->vert_deci) <=
+ pipe->dst.h));
+}
- *ab_quota = MDSS_MDP_BUS_FUDGE_FACTOR_AB(*ab_quota);
- if (npipe > 1)
- *ib_quota = MDSS_MDP_BUS_FUDGE_FACTOR_HIGH_IB(*ib_quota);
- else
- *ib_quota = MDSS_MDP_BUS_FUDGE_FACTOR_IB(*ib_quota);
+static inline u32 mdss_mdp_calc_y_scaler_bytes(struct mdss_mdp_prefill_params
+ *params, struct mdss_prefill_data *prefill)
+{
+ u32 y_scaler_bytes = 0, y_scaler_lines = 0;
- if (ovrd && (*ib_quota < MDSS_MDP_BUS_FLOOR_BW)) {
- *ib_quota = MDSS_MDP_BUS_FLOOR_BW;
- pr_debug("forcing the BIMC clock to 200 MHz : %llu bytes",
- *ib_quota);
+ if (params->is_yuv) {
+ if (params->src_h != params->dst_h) {
+ y_scaler_lines = (params->is_caf) ?
+ prefill->y_scaler_lines_caf :
+ prefill->y_scaler_lines_bilinear;
+ /*
+ * y is src_width, u is src_width/2 and v is
+ * src_width/2, so the total is scaler_lines *
+ * src_w * 2
+ */
+ y_scaler_bytes = y_scaler_lines * params->src_w * 2;
+ }
} else {
- pr_debug("ib quota : %llu bytes", *ib_quota);
- }
-}
-
-static int mdss_mdp_ctl_perf_commit(struct mdss_data_type *mdata, u32 flags)
-{
- struct mdss_mdp_ctl *ctl;
- int cnum;
- unsigned long clk_rate = 0;
- u64 bus_ab_quota = 0, bus_ib_quota = 0;
-
- if (!flags) {
- pr_err("nothing to update\n");
- return -EINVAL;
- }
-
- mutex_lock(&mdss_mdp_ctl_lock);
- for (cnum = 0; cnum < mdata->nctl; cnum++) {
- ctl = mdata->ctl_off + cnum;
- if (ctl->power_on) {
- bus_ab_quota += ctl->bus_ab_quota;
- bus_ib_quota += ctl->bus_ib_quota;
-
- if (ctl->clk_rate > clk_rate)
- clk_rate = ctl->clk_rate;
+ if (params->src_h != params->dst_h) {
+ y_scaler_lines = prefill->y_scaler_lines_bilinear;
+ y_scaler_bytes = y_scaler_lines * params->src_w *
+ params->bpp;
}
}
- if (flags & MDSS_MDP_PERF_UPDATE_BUS) {
- bus_ab_quota = bus_ib_quota;
- __mdss_mdp_ctrl_perf_ovrd(mdata, &bus_ab_quota, &bus_ib_quota);
- bus_ib_quota <<= MDSS_MDP_BUS_FACTOR_SHIFT;
- bus_ab_quota <<= MDSS_MDP_BUS_FACTOR_SHIFT;
- mdss_mdp_bus_scale_set_quota(bus_ab_quota, bus_ib_quota);
- }
- if (flags & MDSS_MDP_PERF_UPDATE_CLK) {
- clk_rate = MDSS_MDP_CLK_FUDGE_FACTOR(clk_rate);
- pr_debug("update clk rate = %lu HZ\n", clk_rate);
- mdss_mdp_set_clk_rate(clk_rate);
- }
- mutex_unlock(&mdss_mdp_ctl_lock);
- return 0;
+ return y_scaler_bytes;
+}
+
+static inline u32 mdss_mdp_calc_latency_buf_bytes(struct mdss_mdp_prefill_params
+ *params, struct mdss_prefill_data *prefill)
+{
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+ u32 latency_lines, latency_buf_bytes;
+
+ if (params->is_yuv) {
+ if (params->is_bwc) {
+ latency_lines = 4;
+ latency_buf_bytes = params->src_w * params->bpp *
+ latency_lines;
+ } else {
+ latency_lines = 2;
+ latency_buf_bytes = ALIGN(params->src_w * params->bpp *
+ latency_lines, mdata->smp_mb_size) * 2;
+ }
+ } else {
+ if (params->is_tile) {
+ latency_lines = 8;
+ latency_buf_bytes = params->src_w * params->bpp *
+ latency_lines;
+ } else if (params->is_bwc) {
+ latency_lines = 4;
+ latency_buf_bytes = params->src_w * params->bpp *
+ latency_lines;
+ } else {
+ latency_lines = 2;
+ latency_buf_bytes = ALIGN(params->src_w * params->bpp *
+ latency_lines, mdata->smp_mb_size);
+ }
+ }
+
+ return latency_buf_bytes;
+}
+
+static inline u32 mdss_mdp_calc_scaling_w_h(u32 val, u32 src_h, u32 dst_h,
+ u32 src_w, u32 dst_w)
+{
+ if (dst_h)
+ val = mult_frac(val, src_h, dst_h);
+ if (dst_w)
+ val = mult_frac(val, src_w, dst_w);
+
+ return val;
+}
+
+static u32 mdss_mdp_perf_calc_pipe_prefill_video(struct mdss_mdp_prefill_params
+ *params)
+{
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+ struct mdss_prefill_data *prefill = &mdata->prefill_data;
+ u32 prefill_bytes;
+ u32 latency_buf_bytes;
+ u32 y_buf_bytes = 0;
+ u32 y_scaler_bytes;
+ u32 pp_bytes = 0, pp_lines = 0;
+ u32 post_scaler_bytes;
+ u32 fbc_bytes = 0;
+
+ prefill_bytes = prefill->ot_bytes;
+
+ latency_buf_bytes = mdss_mdp_calc_latency_buf_bytes(params, prefill);
+ prefill_bytes += latency_buf_bytes;
+ pr_debug("latency_buf_bytes bw_calc=%d actual=%d\n", latency_buf_bytes,
+ params->smp_bytes);
+
+ if (params->is_yuv)
+ y_buf_bytes = prefill->y_buf_bytes;
+
+ y_scaler_bytes = mdss_mdp_calc_y_scaler_bytes(params, prefill);
+
+ prefill_bytes += y_buf_bytes + y_scaler_bytes;
+
+ post_scaler_bytes = prefill->post_scaler_pixels * params->bpp;
+ post_scaler_bytes = mdss_mdp_calc_scaling_w_h(post_scaler_bytes,
+ params->src_h, params->dst_h, params->src_w, params->dst_w);
+ prefill_bytes += post_scaler_bytes;
+
+ if (params->xres)
+ pp_lines = DIV_ROUND_UP(prefill->pp_pixels, params->xres);
+ if (params->xres && params->dst_h && (params->dst_y <= pp_lines))
+ pp_bytes = ((params->src_w * params->bpp * prefill->pp_pixels /
+ params->xres) * params->src_h) / params->dst_h;
+ prefill_bytes += pp_bytes;
+
+ if (params->is_fbc) {
+ fbc_bytes = prefill->fbc_lines * params->bpp;
+ fbc_bytes = mdss_mdp_calc_scaling_w_h(fbc_bytes, params->src_h,
+ params->dst_h, params->src_w, params->dst_w);
+ }
+ prefill_bytes += fbc_bytes;
+
+ pr_debug("ot=%d y_buf=%d pp_lines=%d pp=%d post_sc=%d fbc_bytes=%d\n",
+ prefill->ot_bytes, y_buf_bytes, pp_lines, pp_bytes,
+ post_scaler_bytes, fbc_bytes);
+
+ return prefill_bytes;
+}
+
+static u32 mdss_mdp_perf_calc_pipe_prefill_cmd(struct mdss_mdp_prefill_params
+ *params)
+{
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+ struct mdss_prefill_data *prefill = &mdata->prefill_data;
+ u32 prefill_bytes;
+ u32 ot_bytes = 0;
+ u32 latency_lines, latency_buf_bytes;
+ u32 y_buf_bytes = 0;
+ u32 y_scaler_bytes;
+ u32 fbc_cmd_lines = 0, fbc_cmd_bytes = 0;
+ u32 post_scaler_bytes = 0;
+
+ /* y_scaler_bytes are same for the first or non first line */
+ y_scaler_bytes = mdss_mdp_calc_y_scaler_bytes(params, prefill);
+ prefill_bytes = y_scaler_bytes;
+
+ /* 1st line if fbc is not enabled and 2nd line if fbc is enabled */
+ if (((params->dst_y == 0) && !params->is_fbc) ||
+ ((params->dst_y <= 1) && params->is_fbc)) {
+ if (params->is_bwc || params->is_tile)
+ latency_lines = 4;
+ else if (!params->is_caf && params->is_hflip)
+ latency_lines = 1;
+ else
+ latency_lines = 0;
+ latency_buf_bytes = params->src_w * params->bpp * latency_lines;
+ prefill_bytes += latency_buf_bytes;
+
+ fbc_cmd_lines++;
+ if (params->is_fbc)
+ fbc_cmd_lines++;
+ fbc_cmd_bytes = params->bpp * params->dst_w * fbc_cmd_lines;
+ fbc_cmd_bytes = mdss_mdp_calc_scaling_w_h(fbc_cmd_bytes,
+ params->src_h, params->dst_h, params->src_w,
+ params->dst_w);
+ prefill_bytes += fbc_cmd_bytes;
+ } else {
+ ot_bytes = prefill->ot_bytes;
+ prefill_bytes += ot_bytes;
+
+ latency_buf_bytes = mdss_mdp_calc_latency_buf_bytes(params,
+ prefill);
+ prefill_bytes += latency_buf_bytes;
+
+ if (params->is_yuv)
+ y_buf_bytes = prefill->y_buf_bytes;
+ prefill_bytes += y_buf_bytes;
+
+ post_scaler_bytes = prefill->post_scaler_pixels * params->bpp;
+ post_scaler_bytes = mdss_mdp_calc_scaling_w_h(post_scaler_bytes,
+ params->src_h, params->dst_h, params->src_w,
+ params->dst_w);
+ prefill_bytes += post_scaler_bytes;
+ }
+
+ pr_debug("ot=%d bwc=%d smp=%d y_buf=%d fbc=%d\n", ot_bytes,
+ params->is_bwc, latency_buf_bytes, y_buf_bytes, fbc_cmd_bytes);
+
+ return prefill_bytes;
}
/**
@@ -183,16 +310,22 @@
* (MDP clock requirement) based on frame size and scaling requirements.
*/
int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
- struct mdss_mdp_perf_params *perf)
+ struct mdss_mdp_perf_params *perf, struct mdss_mdp_img_rect *roi)
{
struct mdss_mdp_mixer *mixer;
int fps = DEFAULT_FRAME_RATE;
- u32 quota, rate, v_total, src_h;
+ u32 quota, rate, v_total, src_h, xres = 0;
+ struct mdss_mdp_img_rect src, dst;
+ bool is_fbc = false;
+ struct mdss_mdp_prefill_params prefill_params;
if (!pipe || !perf || !pipe->mixer)
return -EINVAL;
mixer = pipe->mixer;
+ dst = pipe->dst;
+ src = pipe->src;
+
if (mixer->rotator_mode) {
v_total = pipe->flags & MDP_ROT_90 ? pipe->dst.w : pipe->dst.h;
} else if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF) {
@@ -201,18 +334,31 @@
pinfo = &mixer->ctl->panel_data->panel_info;
fps = mdss_panel_get_framerate(pinfo);
v_total = mdss_panel_get_vtotal(pinfo);
+ xres = pinfo->xres;
+ is_fbc = pinfo->fbc.enabled;
} else {
v_total = mixer->height;
+ xres = mixer->width;
}
+ if (roi)
+ mdss_mdp_crop_rect(&src, &dst, roi);
+
+ pr_debug("v_total=%d, xres=%d fps=%d\n", v_total, xres, fps);
+
/*
* when doing vertical decimation lines will be skipped, hence there is
* no need to account for these lines in MDP clock or request bus
* bandwidth to fetch them.
*/
- src_h = pipe->src.h >> pipe->vert_deci;
+ src_h = src.h >> pipe->vert_deci;
- quota = fps * pipe->src.w * src_h;
+ quota = fps * src.w * src_h;
+
+ pr_debug("src(w,h)(%d,%d) dst(w,h)(%d,%d) dst_y=%d bpp=%d yuv=%d\n",
+ pipe->src.w, src_h, pipe->dst.w, pipe->dst.h, pipe->dst.y,
+ pipe->src_fmt->bpp, pipe->src_fmt->is_yuv);
+
if (pipe->src_fmt->chroma_sample == MDSS_MDP_CHROMA_420)
/*
* with decimation, chroma is not downsampled, this means we
@@ -225,41 +371,79 @@
else
quota *= pipe->src_fmt->bpp;
- rate = pipe->dst.w;
- if (src_h > pipe->dst.h)
- rate = (rate * src_h) / pipe->dst.h;
+ rate = dst.w;
+ if (src_h > dst.h)
+ rate = (rate * src_h) / dst.h;
rate *= v_total * fps;
if (mixer->rotator_mode) {
rate /= 4; /* block mode fetch at 4 pix/clk */
quota *= 2; /* bus read + write */
- perf->ib_quota = quota;
+ perf->bw_overlap = quota;
} else {
- perf->ib_quota = (quota / pipe->dst.h) * v_total;
+ perf->bw_overlap = (quota / dst.h) * v_total;
}
- perf->ab_quota = quota;
- perf->mdp_clk_rate = rate;
- pr_debug("mixer=%d pnum=%d clk_rate=%u bus ab=%u ib=%u\n",
- mixer->num, pipe->num, rate, perf->ab_quota, perf->ib_quota);
+ perf->mdp_clk_rate = mdss_mdp_clk_fudge_factor(mixer, rate);
+
+ prefill_params.smp_bytes = mdss_mdp_smp_get_size(pipe);
+ prefill_params.xres = xres;
+ prefill_params.src_w = src.w;
+ prefill_params.src_h = src_h;
+ prefill_params.dst_w = dst.w;
+ prefill_params.dst_h = dst.h;
+ prefill_params.dst_y = dst.y;
+ prefill_params.bpp = pipe->src_fmt->bpp;
+ prefill_params.is_yuv = pipe->src_fmt->is_yuv;
+ prefill_params.is_caf = mdss_mdp_perf_is_caf(pipe);
+ prefill_params.is_fbc = is_fbc;
+ prefill_params.is_bwc = pipe->bwc_mode;
+ prefill_params.is_tile = pipe->src_fmt->tile;
+ prefill_params.is_hflip = pipe->flags & MDP_FLIP_LR;
+
+ if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF) {
+ perf->prefill_bytes = (mixer->ctl->is_video_mode) ?
+ mdss_mdp_perf_calc_pipe_prefill_video(&prefill_params) :
+ mdss_mdp_perf_calc_pipe_prefill_cmd(&prefill_params);
+ }
+ else
+ perf->prefill_bytes = 0;
+
+ pr_debug("mixer=%d pnum=%d clk_rate=%u bw_overlap=%llu prefill=%d\n",
+ mixer->num, pipe->num, perf->mdp_clk_rate, perf->bw_overlap,
+ perf->prefill_bytes);
return 0;
}
-static void mdss_mdp_perf_mixer_update(struct mdss_mdp_mixer *mixer,
- u32 *bus_ab_quota, u32 *bus_ib_quota,
- u32 *clk_rate)
+static inline int mdss_mdp_perf_is_overlap(u32 y00, u32 y01, u32 y10, u32 y11)
+{
+ return (y10 < y00 && y11 >= y01) || (y10 >= y00 && y10 <= y01);
+}
+
+static inline int cmpu32(const void *a, const void *b)
+{
+ return (*(u32 *)a < *(u32 *)b) ? -1 : 0;
+}
+
+static void mdss_mdp_perf_calc_mixer(struct mdss_mdp_mixer *mixer,
+ struct mdss_mdp_perf_params *perf,
+ struct mdss_mdp_pipe **pipe_list, int num_pipes)
{
struct mdss_mdp_pipe *pipe;
struct mdss_panel_info *pinfo = NULL;
int fps = DEFAULT_FRAME_RATE;
- u32 v_total;
+ u32 v_total = 0;
int i;
- u32 max_clk_rate = 0, ab_total = 0, ib_total = 0;
+ u32 max_clk_rate = 0;
+ u64 bw_overlap_max = 0;
+ u64 bw_overlap[MDSS_MDP_MAX_STAGE] = { 0 };
+ u32 v_region[MDSS_MDP_MAX_STAGE * 2] = { 0 };
+ u32 prefill_bytes = 0;
- *bus_ab_quota = 0;
- *bus_ib_quota = 0;
- *clk_rate = 0;
+ BUG_ON(num_pipes > MDSS_MDP_MAX_STAGE);
+
+ memset(perf, 0, sizeof(*perf));
if (!mixer->rotator_mode) {
if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF) {
@@ -272,100 +456,437 @@
} else {
v_total = mixer->height;
}
- *clk_rate = mixer->width * v_total * fps;
- if (pinfo && pinfo->lcdc.v_back_porch < MDP_MIN_VBP)
- *clk_rate = MDSS_MDP_CLK_FUDGE_FACTOR(*clk_rate);
- if (!pinfo) {
- /* perf for bus writeback */
- *bus_ab_quota = fps * mixer->width * mixer->height * 3;
- *bus_ab_quota >>= MDSS_MDP_BUS_FACTOR_SHIFT;
- *bus_ib_quota = *bus_ab_quota;
- }
+ perf->mdp_clk_rate = mixer->width * v_total * fps;
+ perf->mdp_clk_rate =
+ mdss_mdp_clk_fudge_factor(mixer, perf->mdp_clk_rate);
+
+ if (!pinfo) /* perf for bus writeback */
+ perf->bw_overlap =
+ fps * mixer->width * mixer->height * 3;
}
- for (i = 0; i < MDSS_MDP_MAX_STAGE; i++) {
- struct mdss_mdp_perf_params perf;
- pipe = mixer->stage_pipe[i];
+ memset(bw_overlap, 0, sizeof(u64) * MDSS_MDP_MAX_STAGE);
+ memset(v_region, 0, sizeof(u32) * MDSS_MDP_MAX_STAGE * 2);
+
+ for (i = 0; i < num_pipes; i++) {
+ struct mdss_mdp_perf_params tmp;
+ pipe = pipe_list[i];
if (pipe == NULL)
continue;
- if (mdss_mdp_perf_calc_pipe(pipe, &perf))
+ if (mdss_mdp_perf_calc_pipe(pipe, &tmp, &mixer->roi))
continue;
-
- ab_total += perf.ab_quota >> MDSS_MDP_BUS_FACTOR_SHIFT;
- ib_total += perf.ib_quota >> MDSS_MDP_BUS_FACTOR_SHIFT;
- if (perf.mdp_clk_rate > max_clk_rate)
- max_clk_rate = perf.mdp_clk_rate;
+ prefill_bytes += tmp.prefill_bytes;
+ bw_overlap[i] = tmp.bw_overlap;
+ v_region[2*i] = pipe->dst.y;
+ v_region[2*i + 1] = pipe->dst.y + pipe->dst.h;
+ if (tmp.mdp_clk_rate > max_clk_rate)
+ max_clk_rate = tmp.mdp_clk_rate;
}
- *bus_ab_quota += ab_total;
- *bus_ib_quota += ib_total;
- if (max_clk_rate > *clk_rate)
- *clk_rate = max_clk_rate;
+ /*
+ * Sort the v_region array so the total display area can be
+ * divided into individual regions. Check how many pipes fetch
+ * data for each region and sum them up, then the worst case
+ * of all regions is ib request.
+ */
+ sort(v_region, num_pipes * 2, sizeof(u32), cmpu32, NULL);
+ for (i = 1; i < num_pipes * 2; i++) {
+ int j;
+ u64 bw_max_region = 0;
+ u32 y0, y1;
+ pr_debug("v_region[%d]%d\n", i, v_region[i]);
+ if (v_region[i] == v_region[i-1])
+ continue;
+ y0 = (v_region[i-1]) ? v_region[i-1] + 1 : 0;
+ y1 = v_region[i];
+ for (j = 0; j < num_pipes; j++) {
+ if (!bw_overlap[j])
+ continue;
+ pipe = pipe_list[j];
+ if (mdss_mdp_perf_is_overlap(y0, y1, pipe->dst.y,
+ (pipe->dst.y + pipe->dst.h)))
+ bw_max_region += bw_overlap[j];
+ pr_debug("v[%d](%d,%d)pipe[%d](%d,%d)bw(%llu %llu)\n",
+ i, y0, y1, j, pipe->dst.y,
+ pipe->dst.y + pipe->dst.h, bw_overlap[j],
+ bw_max_region);
+ }
+ bw_overlap_max = max(bw_overlap_max, bw_max_region);
+ }
- pr_debug("final mixer=%d clk_rate=%u bus ab=%u ib=%u\n", mixer->num,
- *clk_rate, *bus_ab_quota, *bus_ib_quota);
+ perf->bw_overlap += bw_overlap_max;
+ perf->prefill_bytes += prefill_bytes;
+
+ if (max_clk_rate > perf->mdp_clk_rate)
+ perf->mdp_clk_rate = max_clk_rate;
+
+ pr_debug("final mixer=%d video=%d clk_rate=%u bw=%llu prefill=%d\n",
+ mixer->num, mixer->ctl->is_video_mode, perf->mdp_clk_rate,
+ perf->bw_overlap, perf->prefill_bytes);
+
}
-static int mdss_mdp_ctl_perf_update(struct mdss_mdp_ctl *ctl)
+static u32 mdss_mdp_get_vbp_factor(struct mdss_mdp_ctl *ctl)
{
- int ret = MDSS_MDP_PERF_UPDATE_SKIP;
- u32 clk_rate, ab_quota, ib_quota;
- u32 max_clk_rate = 0, total_ab_quota = 0, total_ib_quota = 0;
+ u32 fps, v_total, vbp, vbp_fac;
+ struct mdss_panel_info *pinfo;
- if (ctl->mixer_left) {
- mdss_mdp_perf_mixer_update(ctl->mixer_left, &ab_quota,
- &ib_quota, &clk_rate);
- total_ab_quota += ab_quota;
- total_ib_quota += ib_quota;
- max_clk_rate = clk_rate;
+ if (!ctl || !ctl->panel_data)
+ return 0;
+
+ pinfo = &ctl->panel_data->panel_info;
+ fps = mdss_panel_get_framerate(pinfo);
+ v_total = mdss_panel_get_vtotal(pinfo);
+ vbp = pinfo->lcdc.v_back_porch + pinfo->lcdc.v_pulse_width;
+ vbp_fac = (vbp) ? fps * v_total / vbp : 0;
+ pr_debug("vbp_fac=%d vbp=%d v_total=%d\n", vbp_fac, vbp, v_total);
+
+ return vbp_fac;
+}
+
+static u32 mdss_mdp_get_vbp_factor_max(struct mdss_mdp_ctl *ctl)
+{
+ u32 vbp_max = 0;
+ int i;
+ struct mdss_data_type *mdata;
+
+ if (!ctl || !ctl->mdata)
+ return 0;
+
+ mdata = ctl->mdata;
+ for (i = 0; i < mdata->nctl; i++) {
+ struct mdss_mdp_ctl *ctl = mdata->ctl_off + i;
+ u32 vbp_fac;
+
+ if (ctl->power_on) {
+ vbp_fac = mdss_mdp_get_vbp_factor(ctl);
+ vbp_max = max(vbp_max, vbp_fac);
+ }
}
- if (ctl->mixer_right) {
- mdss_mdp_perf_mixer_update(ctl->mixer_right, &ab_quota,
- &ib_quota, &clk_rate);
- total_ab_quota += ab_quota;
- total_ib_quota += ib_quota;
- if (clk_rate > max_clk_rate)
- max_clk_rate = clk_rate;
+ return vbp_max;
+}
+
+static void __mdss_mdp_perf_calc_ctl_helper(struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_perf_params *perf,
+ struct mdss_mdp_pipe **left_plist, int left_cnt,
+ struct mdss_mdp_pipe **right_plist, int right_cnt)
+{
+ struct mdss_mdp_perf_params tmp;
+
+ memset(perf, 0, sizeof(*perf));
+
+ if (left_cnt && ctl->mixer_left) {
+ mdss_mdp_perf_calc_mixer(ctl->mixer_left, &tmp,
+ left_plist, left_cnt);
+ perf->bw_overlap += tmp.bw_overlap;
+ perf->prefill_bytes += tmp.prefill_bytes;
+ perf->mdp_clk_rate = tmp.mdp_clk_rate;
+ }
+
+ if (right_cnt && ctl->mixer_right) {
+ mdss_mdp_perf_calc_mixer(ctl->mixer_right, &tmp,
+ right_plist, right_cnt);
+ perf->bw_overlap += tmp.bw_overlap;
+ perf->prefill_bytes += tmp.prefill_bytes;
+ if (tmp.mdp_clk_rate > perf->mdp_clk_rate)
+ perf->mdp_clk_rate = tmp.mdp_clk_rate;
if (ctl->intf_type) {
- clk_rate = mdss_mdp_get_pclk_rate(ctl);
+ u32 clk_rate = mdss_mdp_get_pclk_rate(ctl);
/* minimum clock rate due to inefficiency in 3dmux */
clk_rate = mult_frac(clk_rate >> 1, 9, 8);
- if (clk_rate > max_clk_rate)
- max_clk_rate = clk_rate;
+ if (clk_rate > perf->mdp_clk_rate)
+ perf->mdp_clk_rate = clk_rate;
}
}
/* request minimum bandwidth to have bus clock on when display is on */
- if (total_ib_quota == 0)
- total_ib_quota = SZ_16M >> MDSS_MDP_BUS_FACTOR_SHIFT;
+ if (perf->bw_overlap == 0)
+ perf->bw_overlap = SZ_16M;
- if (max_clk_rate != ctl->clk_rate) {
- if (max_clk_rate > ctl->clk_rate)
- ret = MDSS_MDP_PERF_UPDATE_EARLY;
- else
- ret = MDSS_MDP_PERF_UPDATE_LATE;
- ctl->clk_rate = max_clk_rate;
- ctl->perf_changed |= MDSS_MDP_PERF_UPDATE_CLK;
+ if (ctl->intf_type != MDSS_MDP_NO_INTF) {
+ u32 vbp_fac = mdss_mdp_get_vbp_factor_max(ctl);
+
+ perf->bw_prefill = perf->prefill_bytes;
+ /*
+ * Prefill bandwidth equals the amount of data (number
+ * of prefill_bytes) divided by the the amount time
+ * available (blanking period). It is equivalent that
+ * prefill bytes times a factor in unit Hz, which is
+ * the reciprocal of time.
+ */
+ perf->bw_prefill *= vbp_fac;
}
- if ((total_ab_quota != ctl->bus_ab_quota) ||
- (total_ib_quota != ctl->bus_ib_quota)) {
- if (ret == MDSS_MDP_PERF_UPDATE_SKIP) {
- if (total_ib_quota >= ctl->bus_ib_quota)
- ret = MDSS_MDP_PERF_UPDATE_EARLY;
- else
- ret = MDSS_MDP_PERF_UPDATE_LATE;
+ perf->bw_ctl = max(perf->bw_prefill, perf->bw_overlap);
+
+ if (ctl->is_video_mode)
+ perf->bw_ctl = IB_FUDGE_FACTOR(perf->bw_ctl);
+}
+
+int mdss_mdp_perf_bw_check(struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_pipe **left_plist, int left_cnt,
+ struct mdss_mdp_pipe **right_plist, int right_cnt)
+{
+ struct mdss_data_type *mdata = ctl->mdata;
+ struct mdss_mdp_perf_params perf;
+ u32 bw, threshold;
+
+ /* we only need bandwidth check on real-time clients (interfaces) */
+ if (ctl->intf_type == MDSS_MDP_NO_INTF)
+ return 0;
+
+ __mdss_mdp_perf_calc_ctl_helper(ctl, &perf,
+ left_plist, left_cnt, right_plist, right_cnt);
+
+ /* convert bandwidth to kb */
+ bw = DIV_ROUND_UP_ULL(perf.bw_ctl, 1000);
+ pr_debug("calculated bandwidth=%uk\n", bw);
+
+ threshold = ctl->is_video_mode ? mdata->max_bw_low : mdata->max_bw_high;
+ if (bw > threshold) {
+ pr_debug("exceeds bandwidth: %ukb > %ukb\n", bw, threshold);
+ return -E2BIG;
+ }
+
+ return 0;
+}
+
+static void mdss_mdp_perf_calc_ctl(struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_perf_params *perf)
+{
+ struct mdss_mdp_pipe **left_plist, **right_plist;
+
+ left_plist = ctl->mixer_left ? ctl->mixer_left->stage_pipe : NULL;
+ right_plist = ctl->mixer_right ? ctl->mixer_right->stage_pipe : NULL;
+
+ __mdss_mdp_perf_calc_ctl_helper(ctl, perf,
+ left_plist, (left_plist ? MDSS_MDP_MAX_STAGE : 0),
+ right_plist, (right_plist ? MDSS_MDP_MAX_STAGE : 0));
+
+ pr_debug("ctl=%d clk_rate=%u\n", ctl->num, perf->mdp_clk_rate);
+ pr_debug("bw_overlap=%llu bw_prefill=%llu prefill_byptes=%d\n",
+ perf->bw_overlap, perf->bw_prefill, perf->prefill_bytes);
+}
+
+static bool mdss_mdp_ctl_perf_bw_released(struct mdss_mdp_ctl *ctl)
+{
+ unsigned long flags;
+ bool released = false;
+
+ if (!ctl || !ctl->panel_data ||
+ (ctl->panel_data->panel_info.type != MIPI_CMD_PANEL))
+ return released;
+
+ spin_lock_irqsave(&ctl->spin_lock, flags);
+ if (ctl->perf_status == 0) {
+ released = true;
+ ctl->perf_status++;
+ } else if (ctl->perf_status <= 2) {
+ ctl->perf_status++;
+ } else {
+ pr_err("pervious commit was not done\n");
+ }
+
+ pr_debug("perf_status=%d\n", ctl->perf_status);
+ spin_unlock_irqrestore(&ctl->spin_lock, flags);
+
+ return released;
+}
+
+/**
+ * @mdss_mdp_ctl_perf_taken() - indicates a committed buffer is taken
+ * by h/w
+ * @ctl - pointer to ctl data structure
+ *
+ * A committed buffer to be displayed is taken at a vsync or reader
+ * pointer interrupt by h/w. This function must be called in vsync
+ * interrupt context to indicate the buf status is changed.
+ */
+void mdss_mdp_ctl_perf_taken(struct mdss_mdp_ctl *ctl)
+{
+ if (!ctl || !ctl->panel_data ||
+ (ctl->panel_data->panel_info.type != MIPI_CMD_PANEL))
+ return;
+
+ spin_lock(&ctl->spin_lock);
+ if (ctl->perf_status)
+ ctl->perf_status++;
+ pr_debug("perf_status=%d\n", ctl->perf_status);
+ spin_unlock(&ctl->spin_lock);
+}
+
+/**
+ * @mdss_mdp_ctl_perf_done() - indicates a committed buffer is
+ * displayed, so resources such as
+ * bandwidth that are associated to this
+ * buffer can be released.
+ * @ctl - pointer to a ctl
+ *
+ * When pingping done interrupt is trigged, mdp finishes displaying a
+ * buffer which was committed by user and taken by h/w and calling
+ * this function to clear those two states. This function must be
+ * called in pinppong done interrupt context.
+ */
+void mdss_mdp_ctl_perf_done(struct mdss_mdp_ctl *ctl)
+{
+ if (!ctl || !ctl->panel_data ||
+ (ctl->panel_data->panel_info.type != MIPI_CMD_PANEL))
+ return;
+
+ spin_lock(&ctl->spin_lock);
+ if (ctl->perf_status) {
+ ctl->perf_status--;
+ if (ctl->perf_status)
+ ctl->perf_status--;
+ }
+ pr_debug("perf_status=%d\n", ctl->perf_status);
+ spin_unlock(&ctl->spin_lock);
+}
+
+static inline void mdss_mdp_ctl_perf_update_bus(struct mdss_mdp_ctl *ctl)
+{
+ u64 bw_sum_of_intfs = 0;
+ u64 bus_ab_quota, bus_ib_quota;
+ struct mdss_data_type *mdata;
+ int i;
+
+ if (!ctl || !ctl->mdata)
+ return;
+
+ mdata = ctl->mdata;
+ for (i = 0; i < mdata->nctl; i++) {
+ struct mdss_mdp_ctl *ctl;
+ ctl = mdata->ctl_off + i;
+ if (ctl->power_on) {
+ bw_sum_of_intfs += ctl->cur_perf.bw_ctl;
+ pr_debug("c=%d bw=%llu\n", ctl->num,
+ ctl->cur_perf.bw_ctl);
}
- ctl->bus_ab_quota = total_ab_quota;
- ctl->bus_ib_quota = total_ib_quota;
- ctl->perf_changed |= MDSS_MDP_PERF_UPDATE_BUS;
+ }
+ bus_ib_quota = bw_sum_of_intfs;
+ bus_ab_quota = AB_FUDGE_FACTOR(bw_sum_of_intfs);
+ mdss_mdp_bus_scale_set_quota(bus_ab_quota, bus_ib_quota);
+ pr_debug("ab=%llu ib=%llu\n", bus_ab_quota, bus_ib_quota);
+}
+
+/**
+ * @mdss_mdp_ctl_perf_release_bw() - request zero bandwidth
+ * @ctl - pointer to a ctl
+ *
+ * Function checks a state variable for the ctl, if all pending commit
+ * requests are done, meanning no more bandwidth is needed, release
+ * bandwidth request.
+ */
+void mdss_mdp_ctl_perf_release_bw(struct mdss_mdp_ctl *ctl)
+{
+ unsigned long flags;
+ int need_release = 0;
+ struct mdss_data_type *mdata;
+ int i;
+
+ /* only do this for command panel */
+ if (!ctl || !ctl->mdata || !ctl->panel_data ||
+ (ctl->panel_data->panel_info.type != MIPI_CMD_PANEL))
+ return;
+
+ mutex_lock(&mdss_mdp_ctl_lock);
+ mdata = ctl->mdata;
+ /*
+ * If video interface present, cmd panel bandwidth cannot be
+ * released.
+ */
+ for (i = 0; i < mdata->nctl; i++) {
+ struct mdss_mdp_ctl *ctl = mdata->ctl_off + i;
+
+ if (ctl->power_on && ctl->is_video_mode) {
+ mutex_unlock(&mdss_mdp_ctl_lock);
+ return;
+ }
}
- return ret;
+ spin_lock_irqsave(&ctl->spin_lock, flags);
+ if (!ctl->perf_status)
+ need_release = 1;
+ pr_debug("need release=%d\n", need_release);
+ spin_unlock_irqrestore(&ctl->spin_lock, flags);
+
+ if (need_release) {
+ ctl->cur_perf.bw_ctl = 0;
+ ctl->new_perf.bw_ctl = 0;
+ mdss_mdp_ctl_perf_update_bus(ctl);
+ }
+ mutex_unlock(&mdss_mdp_ctl_lock);
+}
+
+static void mdss_mdp_ctl_perf_update(struct mdss_mdp_ctl *ctl,
+ int params_changed)
+{
+ struct mdss_mdp_perf_params *new, *old;
+ int update_bus = 0, update_clk = 0;
+ struct mdss_data_type *mdata;
+
+ if (!ctl || !ctl->mdata)
+ return;
+
+ mutex_lock(&mdss_mdp_ctl_lock);
+
+ mdata = ctl->mdata;
+ old = &ctl->cur_perf;
+ new = &ctl->new_perf;
+
+ if (ctl->power_on) {
+ if (params_changed || mdss_mdp_ctl_perf_bw_released(ctl))
+ mdss_mdp_perf_calc_ctl(ctl, new);
+ /*
+ * if params have just changed delay the update until
+ * later once the hw configuration has been flushed to
+ * MDP
+ */
+ if ((params_changed && (new->bw_ctl > old->bw_ctl)) ||
+ (!params_changed && (new->bw_ctl < old->bw_ctl))) {
+ pr_debug("c=%d p=%d new_bw=%llu,old_bw=%llu\n",
+ ctl->num, params_changed, new->bw_ctl,
+ old->bw_ctl);
+ old->bw_ctl = new->bw_ctl;
+ update_bus = 1;
+ }
+
+ if ((params_changed && (new->mdp_clk_rate > old->mdp_clk_rate))
+ || (!params_changed && (new->mdp_clk_rate <
+ old->mdp_clk_rate))) {
+ old->mdp_clk_rate = new->mdp_clk_rate;
+ update_clk = 1;
+ }
+ } else {
+ memset(old, 0, sizeof(old));
+ memset(new, 0, sizeof(new));
+ update_bus = 1;
+ update_clk = 1;
+ }
+
+ if (update_bus)
+ mdss_mdp_ctl_perf_update_bus(ctl);
+
+ if (update_clk) {
+ u32 clk_rate = 0;
+ int i;
+
+ for (i = 0; i < mdata->nctl; i++) {
+ struct mdss_mdp_ctl *ctl;
+ ctl = mdata->ctl_off + i;
+ if (ctl->power_on)
+ clk_rate = max(ctl->cur_perf.mdp_clk_rate,
+ clk_rate);
+ }
+ mdss_mdp_set_clk_rate(clk_rate);
+ pr_debug("update clk rate = %d HZ\n", clk_rate);
+ }
+
+ mutex_unlock(&mdss_mdp_ctl_lock);
}
static struct mdss_mdp_ctl *mdss_mdp_ctl_alloc(struct mdss_data_type *mdata,
@@ -385,6 +906,7 @@
ctl->ref_cnt++;
ctl->mdata = mdata;
mutex_init(&ctl->lock);
+ spin_lock_init(&ctl->spin_lock);
BLOCKING_INIT_NOTIFIER_HEAD(&ctl->notifier_head);
pr_debug("alloc ctl_num=%d\n", ctl->num);
break;
@@ -606,13 +1128,26 @@
mdss_mdp_ctl_free(ctl);
- mdss_mdp_ctl_perf_commit(ctl->mdata, MDSS_MDP_PERF_UPDATE_ALL);
+ mdss_mdp_ctl_perf_update(ctl, 0);
return 0;
}
+static inline struct mdss_mdp_ctl *mdss_mdp_get_split_ctl(
+ struct mdss_mdp_ctl *ctl)
+{
+ if (ctl && ctl->mixer_right && (ctl->mixer_right->ctl != ctl))
+ return ctl->mixer_right->ctl;
+
+ return NULL;
+}
+
int mdss_mdp_ctl_splash_finish(struct mdss_mdp_ctl *ctl, bool handoff)
{
+ struct mdss_mdp_ctl *sctl = mdss_mdp_get_split_ctl(ctl);
+ if (sctl)
+ sctl->panel_data->panel_info.cont_splash_enabled = 0;
+
switch (ctl->panel_data->panel_info.type) {
case MIPI_VIDEO_PANEL:
case EDP_PANEL:
@@ -637,15 +1172,6 @@
return 0;
}
-static inline struct mdss_mdp_ctl *mdss_mdp_get_split_ctl(
- struct mdss_mdp_ctl *ctl)
-{
- if (ctl && ctl->mixer_right && (ctl->mixer_right->ctl != ctl))
- return ctl->mixer_right->ctl;
-
- return NULL;
-}
-
static int mdss_mdp_ctl_fbc_enable(int enable,
struct mdss_mdp_mixer *mixer, struct mdss_panel_info *pdata)
{
@@ -1142,9 +1668,7 @@
if (!handoff)
ctl->power_on = true;
- ctl->bus_ab_quota = 0;
- ctl->bus_ib_quota = 0;
- ctl->clk_rate = 0;
+ memset(&ctl->cur_perf, 0, sizeof(ctl->cur_perf));
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
@@ -1233,8 +1757,7 @@
ctl->power_on = false;
ctl->play_cnt = 0;
- ctl->clk_rate = 0;
- mdss_mdp_ctl_perf_commit(ctl->mdata, MDSS_MDP_PERF_UPDATE_ALL);
+ mdss_mdp_ctl_perf_update(ctl, 0);
}
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
@@ -1729,9 +2252,12 @@
int mdss_mdp_ctl_update_fps(struct mdss_mdp_ctl *ctl, int fps)
{
int ret = 0;
+ struct mdss_mdp_ctl *sctl = NULL;
+
+ sctl = mdss_mdp_get_split_ctl(ctl);
if (ctl->config_fps_fnc)
- ret = ctl->config_fps_fnc(ctl, fps);
+ ret = ctl->config_fps_fnc(ctl, sctl, fps);
return ret;
}
@@ -1822,10 +2348,7 @@
if (ctl->wait_fnc)
ret = ctl->wait_fnc(ctl, NULL);
- if (ctl->perf_changed) {
- mdss_mdp_ctl_perf_commit(ctl->mdata, ctl->perf_changed);
- ctl->perf_changed = 0;
- }
+ mdss_mdp_ctl_perf_update(ctl, 0);
mutex_unlock(&ctl->lock);
@@ -1858,7 +2381,6 @@
struct mdss_mdp_ctl *sctl = NULL;
int mixer1_changed, mixer2_changed;
int ret = 0;
- int perf_update = MDSS_MDP_PERF_UPDATE_SKIP;
if (!ctl) {
pr_err("display function not set\n");
@@ -1879,10 +2401,9 @@
mixer2_changed = (ctl->mixer_right && ctl->mixer_right->params_changed);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
if (mixer1_changed || mixer2_changed
|| ctl->force_screen_state) {
- perf_update = mdss_mdp_ctl_perf_update(ctl);
-
if (ctl->prepare_fnc)
ret = ctl->prepare_fnc(ctl, arg);
if (ret) {
@@ -1890,10 +2411,7 @@
goto done;
}
- if (perf_update == MDSS_MDP_PERF_UPDATE_EARLY) {
- mdss_mdp_ctl_perf_commit(ctl->mdata, ctl->perf_changed);
- ctl->perf_changed = 0;
- }
+ mdss_mdp_ctl_perf_update(ctl, 1);
if (mixer1_changed)
mdss_mdp_mixer_update(ctl->mixer_left);
diff --git a/drivers/video/msm/mdss/mdss_mdp_formats.h b/drivers/video/msm/mdss/mdss_mdp_formats.h
index a2edf90..dcbff88 100644
--- a/drivers/video/msm/mdss/mdss_mdp_formats.h
+++ b/drivers/video/msm/mdss/mdss_mdp_formats.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -81,6 +81,25 @@
}, \
}
+#define FMT_RGB_8888_TILE(fmt, alpha_en, e0, e1, e2, e3) \
+ { \
+ .format = (fmt), \
+ .fetch_planes = MDSS_MDP_PLANE_INTERLEAVED, \
+ .unpack_tight = 1, \
+ .unpack_align_msb = 0, \
+ .alpha_enable = (alpha_en), \
+ .unpack_count = 4, \
+ .bpp = 4, \
+ .tile = 1, \
+ .element = { (e0), (e1), (e2), (e3) }, \
+ .bits = { \
+ [C3_ALPHA] = COLOR_8BIT, \
+ [C2_R_Cr] = COLOR_8BIT, \
+ [C0_G_Y] = COLOR_8BIT, \
+ [C1_B_Cb] = COLOR_8BIT, \
+ }, \
+ }
+
#define FMT_YUV_COMMON(fmt) \
.format = (fmt), \
.is_yuv = 1, \
@@ -125,6 +144,22 @@
FMT_RGB_8888(MDP_RGBX_8888, 0, C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA),
FMT_RGB_8888(MDP_BGRA_8888, 1, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
FMT_RGB_8888(MDP_BGRX_8888, 0, C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA),
+ FMT_RGB_8888_TILE(MDP_RGBA_8888_TILE, 1, C2_R_Cr, C0_G_Y, C1_B_Cb,
+ C3_ALPHA),
+ FMT_RGB_8888_TILE(MDP_ARGB_8888_TILE, 1, C3_ALPHA, C2_R_Cr, C0_G_Y,
+ C1_B_Cb),
+ FMT_RGB_8888_TILE(MDP_ABGR_8888_TILE, 1, C3_ALPHA, C1_B_Cb, C0_G_Y,
+ C2_R_Cr),
+ FMT_RGB_8888_TILE(MDP_BGRA_8888_TILE, 1, C1_B_Cb, C0_G_Y, C2_R_Cr,
+ C3_ALPHA),
+ FMT_RGB_8888_TILE(MDP_RGBX_8888_TILE, 0, C2_R_Cr, C0_G_Y, C1_B_Cb,
+ C3_ALPHA),
+ FMT_RGB_8888_TILE(MDP_XRGB_8888_TILE, 0, C3_ALPHA, C2_R_Cr, C0_G_Y,
+ C1_B_Cb),
+ FMT_RGB_8888_TILE(MDP_XBGR_8888_TILE, 0, C3_ALPHA, C1_B_Cb, C0_G_Y,
+ C2_R_Cr),
+ FMT_RGB_8888_TILE(MDP_BGRX_8888_TILE, 0, C1_B_Cb, C0_G_Y, C2_R_Cr,
+ C3_ALPHA),
FMT_YUV_PSEUDO(MDP_Y_CRCB_H1V1, MDSS_MDP_CHROMA_RGB, C2_R_Cr, C1_B_Cb),
FMT_YUV_PSEUDO(MDP_Y_CBCR_H1V1, MDSS_MDP_CHROMA_RGB, C1_B_Cb, C2_R_Cr),
diff --git a/drivers/video/msm/mdss/mdss_mdp_hwio.h b/drivers/video/msm/mdss/mdss_mdp_hwio.h
index 9948738..bff56d2 100644
--- a/drivers/video/msm/mdss/mdss_mdp_hwio.h
+++ b/drivers/video/msm/mdss/mdss_mdp_hwio.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,6 +25,8 @@
#define MDSS_MDP_HW_REV_102 0x10020000
#define MDSS_MDP_HW_REV_103 0x10030000
+#define MDSS_MDP_FETCH_CONFIG_RESET_VALUE 0x00000087
+
#define MDSS_REG_HW_VERSION 0x0
#define MDSS_REG_HW_INTR_STATUS 0x10
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c b/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
index ae45587..79bdee2 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_cmd.c
@@ -247,6 +247,8 @@
return;
}
+ mdss_mdp_ctl_perf_taken(ctl);
+
vsync_time = ktime_get();
ctl->vsync_cnt++;
@@ -308,6 +310,8 @@
return;
}
+ mdss_mdp_ctl_perf_done(ctl);
+
spin_lock(&ctx->clk_lock);
list_for_each_entry(tmp, &ctx->vsync_handlers, list) {
if (tmp->enabled && tmp->cmd_post_flush)
@@ -340,9 +344,12 @@
struct mdss_mdp_cmd_ctx *ctx =
container_of(work, typeof(*ctx), pp_done_work);
- if (ctx->ctl)
+ if (ctx->ctl) {
while (atomic_add_unless(&ctx->pp_done_cnt, -1, 0))
mdss_mdp_ctl_notify(ctx->ctl, MDP_NOTIFY_FRAME_DONE);
+
+ mdss_mdp_ctl_perf_release_bw(ctx->ctl);
+ }
}
static void clk_ctrl_work(struct work_struct *work)
@@ -428,7 +435,6 @@
pdata->panel_info.cont_splash_enabled = 0;
mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_PANEL_CLK_CTRL, (void *)0);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
return ret;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_video.c b/drivers/video/msm/mdss/mdss_mdp_intf_video.c
index f8c59d7..55a4a4d 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_video.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_video.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -466,7 +466,63 @@
ctl->underrun_cnt);
}
-static int mdss_mdp_video_config_fps(struct mdss_mdp_ctl *ctl, int new_fps)
+static int mdss_mdp_video_vfp_fps_update(struct mdss_mdp_ctl *ctl, int new_fps)
+{
+ int curr_fps;
+ u32 add_v_lines = 0;
+ u32 current_vsync_period_f0, new_vsync_period_f0;
+ struct mdss_panel_data *pdata;
+ struct mdss_mdp_video_ctx *ctx;
+ u32 vsync_period, hsync_period;
+
+ ctx = (struct mdss_mdp_video_ctx *) ctl->priv_data;
+ if (!ctx) {
+ pr_err("invalid ctx\n");
+ return -ENODEV;
+ }
+
+ pdata = ctl->panel_data;
+ if (pdata == NULL) {
+ pr_err("%s: Invalid panel data\n", __func__);
+ return -EINVAL;
+ }
+
+ vsync_period = mdss_panel_get_vtotal(&pdata->panel_info);
+ hsync_period = mdss_panel_get_htotal(&pdata->panel_info);
+ curr_fps = mdss_panel_get_framerate(&pdata->panel_info);
+
+ if (curr_fps > new_fps) {
+ add_v_lines = mult_frac(vsync_period,
+ (curr_fps - new_fps), new_fps);
+ pdata->panel_info.lcdc.v_front_porch += add_v_lines;
+ } else {
+ add_v_lines = mult_frac(vsync_period,
+ (new_fps - curr_fps), new_fps);
+ pdata->panel_info.lcdc.v_front_porch -= add_v_lines;
+ }
+
+ vsync_period = mdss_panel_get_vtotal(&pdata->panel_info);
+ current_vsync_period_f0 = mdp_video_read(ctx,
+ MDSS_MDP_REG_INTF_VSYNC_PERIOD_F0);
+ new_vsync_period_f0 = (vsync_period * hsync_period);
+
+ mdp_video_write(ctx, MDSS_MDP_REG_INTF_VSYNC_PERIOD_F0,
+ current_vsync_period_f0 | 0x800000);
+ if (new_vsync_period_f0 & 0x800000) {
+ mdp_video_write(ctx, MDSS_MDP_REG_INTF_VSYNC_PERIOD_F0,
+ new_vsync_period_f0);
+ } else {
+ mdp_video_write(ctx, MDSS_MDP_REG_INTF_VSYNC_PERIOD_F0,
+ new_vsync_period_f0 | 0x800000);
+ mdp_video_write(ctx, MDSS_MDP_REG_INTF_VSYNC_PERIOD_F0,
+ new_vsync_period_f0 & 0x7fffff);
+ }
+
+ return 0;
+}
+
+static int mdss_mdp_video_config_fps(struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_ctl *sctl, int new_fps)
{
struct mdss_mdp_video_ctx *ctx;
struct mdss_panel_data *pdata;
@@ -529,6 +585,40 @@
ctl->force_screen_state = MDSS_SCREEN_DEFAULT;
mdss_mdp_display_commit(ctl, NULL);
mdss_mdp_display_wait4comp(ctl);
+ } else if (pdata->panel_info.dfps_update
+ == DFPS_IMMEDIATE_PORCH_UPDATE_MODE){
+ if (!ctx->timegen_en) {
+ pr_err("TG is OFF. DFPS mode invalid\n");
+ return -EINVAL;
+ }
+
+ video_vsync_irq_enable(ctl, true);
+ INIT_COMPLETION(ctx->vsync_comp);
+ rc = wait_for_completion_timeout(&ctx->vsync_comp,
+ usecs_to_jiffies(VSYNC_TIMEOUT_US));
+ WARN(rc <= 0, "timeout (%d) vsync interrupt on ctl=%d\n",
+ rc, ctl->num);
+ rc = 0;
+ video_vsync_irq_disable(ctl);
+
+ rc = mdss_mdp_video_vfp_fps_update(ctl, new_fps);
+ if (rc < 0) {
+ pr_err("%s: Error during DFPS\n", __func__);
+ return rc;
+ }
+ if (sctl) {
+ rc = mdss_mdp_video_vfp_fps_update(sctl,
+ new_fps);
+ if (rc < 0) {
+ pr_err("%s: DFPS error\n", __func__);
+ return rc;
+ }
+ }
+ rc = mdss_mdp_ctl_intf_event(ctl,
+ MDSS_EVENT_PANEL_UPDATE_FPS,
+ (void *)new_fps);
+ WARN(rc, "intf %d panel fps update error (%d)\n",
+ ctl->intf_num, rc);
} else {
pr_err("intf %d panel, unknown FPS mode\n",
ctl->intf_num);
@@ -646,7 +736,6 @@
free_bootmem_late(mdp5_data->splash_mem_addr,
mdp5_data->splash_mem_size);
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
return ret;
}
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c b/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
index ff55c57..27a7707 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_writeback.c
@@ -17,6 +17,9 @@
#include "mdss_mdp_rotator.h"
#include "mdss_panel.h"
+#define VBIF_WR_LIM_CONF 0xC0
+#define MDSS_DEFAULT_OT_SETTING 0x10
+
enum mdss_mdp_writeback_type {
MDSS_MDP_WRITEBACK_TYPE_ROTATOR,
MDSS_MDP_WRITEBACK_TYPE_LINE,
@@ -34,6 +37,9 @@
u32 intr_type;
u32 intf_num;
+ u32 xin_id;
+ u32 wr_lim;
+
u32 opmode;
struct mdss_mdp_format_params *dst_fmt;
u16 width;
@@ -55,26 +61,31 @@
.type = MDSS_MDP_WRITEBACK_TYPE_ROTATOR,
.intr_type = MDSS_MDP_IRQ_WB_ROT_COMP,
.intf_num = 0,
+ .xin_id = 3,
},
{
.type = MDSS_MDP_WRITEBACK_TYPE_ROTATOR,
.intr_type = MDSS_MDP_IRQ_WB_ROT_COMP,
.intf_num = 1,
+ .xin_id = 11,
},
{
.type = MDSS_MDP_WRITEBACK_TYPE_LINE,
.intr_type = MDSS_MDP_IRQ_WB_ROT_COMP,
.intf_num = 0,
+ .xin_id = 3,
},
{
.type = MDSS_MDP_WRITEBACK_TYPE_LINE,
.intr_type = MDSS_MDP_IRQ_WB_ROT_COMP,
.intf_num = 1,
+ .xin_id = 11,
},
{
.type = MDSS_MDP_WRITEBACK_TYPE_WFD,
.intr_type = MDSS_MDP_IRQ_WB_WFD,
.intf_num = 0,
+ .xin_id = 6,
},
};
@@ -438,9 +449,12 @@
{
struct mdss_mdp_writeback_ctx *ctx;
struct mdss_mdp_writeback_arg *wb_args;
- u32 flush_bits;
+ u32 flush_bits, val, off;
int ret;
+ if (!ctl || !ctl->mdata)
+ return -ENODEV;
+
ctx = (struct mdss_mdp_writeback_ctx *) ctl->priv_data;
if (!ctx)
return -ENODEV;
@@ -451,6 +465,18 @@
return -EPERM;
}
+ if (ctl->mdata->rotator_ot_limit) {
+ if (ctx->type == MDSS_MDP_WRITEBACK_TYPE_ROTATOR)
+ ctx->wr_lim = ctl->mdata->rotator_ot_limit;
+ else
+ ctx->wr_lim = MDSS_DEFAULT_OT_SETTING;
+ off = (ctx->xin_id % 4) * 8;
+ val = readl_relaxed(ctl->mdata->vbif_base + VBIF_WR_LIM_CONF);
+ val &= ~(0xFF << off);
+ val |= (ctx->wr_lim) << off;
+ writel_relaxed(val, ctl->mdata->vbif_base + VBIF_WR_LIM_CONF);
+ }
+
wb_args = (struct mdss_mdp_writeback_arg *) arg;
if (!wb_args)
return -ENOENT;
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index 51ecdbd..5d6ecdc 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -23,6 +23,7 @@
#include <linux/delay.h>
#include <linux/msm_mdp.h>
#include <linux/memblock.h>
+#include <linux/sw_sync.h>
#include <mach/iommu_domains.h>
#include <mach/event_timer.h>
@@ -155,6 +156,9 @@
pr_err("Invalid decimation factors horz=%d vert=%d\n",
req->horz_deci, req->vert_deci);
return -EINVAL;
+ } else if (req->flags & MDP_BWC_EN) {
+ pr_err("Decimation can't be enabled with BWC\n");
+ return -EINVAL;
}
}
@@ -261,7 +265,7 @@
int rc;
for (;;) {
- rc = mdss_mdp_perf_calc_pipe(pipe, &perf);
+ rc = mdss_mdp_perf_calc_pipe(pipe, &perf, NULL);
if (!rc && (perf.mdp_clk_rate <= mdata->max_mdp_clk_rate))
break;
@@ -271,7 +275,8 @@
* requirement by applying vertical decimation and reduce
* mdp clock requirement
*/
- if (mdata->has_decimation && (pipe->vert_deci < MAX_DECIMATION))
+ if (mdata->has_decimation && (pipe->vert_deci < MAX_DECIMATION)
+ && !pipe->bwc_mode)
pipe->vert_deci++;
else
return -EPERM;
@@ -598,12 +603,6 @@
!mdp5_data->mdata->has_wfd_blk)
mdss_mdp_smp_release(pipe);
- /*
- * Clear previous SMP reservations and reserve according to the
- * latest configuration
- */
- mdss_mdp_smp_unreserve(pipe);
-
ret = mdss_mdp_smp_reserve(pipe);
if (ret) {
pr_debug("mdss_mdp_smp_reserve failed. ret=%d\n", ret);
@@ -687,6 +686,7 @@
if ((num_planes <= 0) || (num_planes > MAX_PLANES))
return -EINVAL;
+ mdss_bus_bandwidth_ctrl(1);
memset(data, 0, sizeof(*data));
for (i = 0; i < num_planes; i++) {
data->p[i].flags = flags;
@@ -700,6 +700,7 @@
break;
}
}
+ mdss_bus_bandwidth_ctrl(0);
data->num_planes = i;
@@ -709,8 +710,11 @@
int mdss_mdp_overlay_free_buf(struct mdss_mdp_data *data)
{
int i;
+
+ mdss_bus_bandwidth_ctrl(1);
for (i = 0; i < data->num_planes && data->p[i].len; i++)
mdss_mdp_put_img(&data->p[i]);
+ mdss_bus_bandwidth_ctrl(0);
data->num_planes = 0;
@@ -1100,7 +1104,7 @@
struct mdss_mdp_pipe *pipe;
struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
u32 pipe_ndx, unset_ndx = 0;
- int i;
+ int i, destroy_pipe;
for (i = 0; unset_ndx != ndx && i < MDSS_MDP_MAX_SSPP; i++) {
pipe_ndx = BIT(i);
@@ -1111,16 +1115,22 @@
pr_warn("unknown pipe ndx=%x\n", pipe_ndx);
continue;
}
+
mutex_lock(&mfd->lock);
pipe->pid = 0;
+ destroy_pipe = pipe->play_cnt == 0;
+
if (!list_empty(&pipe->used_list)) {
list_del_init(&pipe->used_list);
- list_add(&pipe->cleanup_list,
- &mdp5_data->pipes_cleanup);
+ if (!destroy_pipe)
+ list_add(&pipe->cleanup_list,
+ &mdp5_data->pipes_cleanup);
}
mutex_unlock(&mfd->lock);
mdss_mdp_mixer_pipe_unstage(pipe);
mdss_mdp_pipe_unmap(pipe);
+ if (destroy_pipe)
+ mdss_mdp_pipe_destroy(pipe);
}
}
return 0;
@@ -2211,6 +2221,10 @@
caps->features |= MDP_BWC_EN;
if (mdata->has_decimation)
caps->features |= MDP_DECIMATION_EN;
+
+ caps->max_smp_cnt = mdss_res->smp_mb_cnt;
+ caps->smp_per_pipe = mdata->smp_mb_per_pipe;
+
return 0;
}
@@ -2249,6 +2263,98 @@
return ret;
}
+static int __handle_overlay_prepare(struct msm_fb_data_type *mfd,
+ struct mdp_overlay_list *ovlist,
+ struct mdp_overlay *overlays)
+{
+ struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
+ struct mdss_mdp_pipe *pipe;
+ struct mdp_overlay *req;
+ int ret = 0;
+ int i;
+ u32 new_reqs = 0;
+
+ ret = mutex_lock_interruptible(&mdp5_data->ov_lock);
+ if (ret)
+ return ret;
+
+ if (!mfd->panel_power_on) {
+ mutex_unlock(&mdp5_data->ov_lock);
+ return -EPERM;
+ }
+
+ pr_debug("prepare fb%d num_overlays=%d\n", mfd->index,
+ ovlist->num_overlays);
+
+ for (i = 0; i < ovlist->num_overlays; i++) {
+ req = overlays + i;
+
+ req->z_order += MDSS_MDP_STAGE_0;
+ ret = mdss_mdp_overlay_pipe_setup(mfd, req, &pipe);
+ req->z_order -= MDSS_MDP_STAGE_0;
+
+ if (IS_ERR_VALUE(ret))
+ goto validate_exit;
+
+ /* keep track of the new overlays to unset in case of errors */
+ if (pipe->play_cnt == 0)
+ new_reqs |= pipe->ndx;
+ }
+
+validate_exit:
+ if (IS_ERR_VALUE(ret))
+ mdss_mdp_overlay_release(mfd, new_reqs);
+ mutex_unlock(&mdp5_data->ov_lock);
+
+ ovlist->processed_overlays = i;
+
+ return ret;
+}
+
+static int __handle_ioctl_overlay_prepare(struct msm_fb_data_type *mfd,
+ void __user *argp)
+{
+ struct mdp_overlay_list ovlist;
+ struct mdp_overlay *overlays;
+ int i, ret;
+
+ if (copy_from_user(&ovlist, argp, sizeof(ovlist)))
+ return -EFAULT;
+
+ overlays = kmalloc(ovlist.num_overlays * sizeof(*overlays), GFP_KERNEL);
+ if (!overlays) {
+ pr_err("Unable to allocate memory for overlays\n");
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < ovlist.num_overlays; i++) {
+ if (copy_from_user(overlays + i, ovlist.overlay_list[i],
+ sizeof(struct mdp_overlay))) {
+ ret = -EFAULT;
+ goto validate_exit;
+ }
+ }
+
+ ret = __handle_overlay_prepare(mfd, &ovlist, overlays);
+ if (!IS_ERR_VALUE(ret)) {
+ for (i = 0; i < ovlist.num_overlays; i++) {
+ if (copy_to_user(ovlist.overlay_list[i], overlays + i,
+ sizeof(struct mdp_overlay))) {
+ ret = -EFAULT;
+ goto validate_exit;
+ }
+ }
+ }
+
+ if (copy_to_user(argp, &ovlist, sizeof(ovlist)))
+ ret = -EFAULT;
+
+validate_exit:
+ kfree(overlays);
+
+ return ret;
+}
+
static int mdss_mdp_overlay_ioctl_handler(struct msm_fb_data_type *mfd,
u32 cmd, void __user *argp)
{
@@ -2372,6 +2478,9 @@
if (!ret)
ret = copy_to_user(argp, &metadata, sizeof(metadata));
break;
+ case MSMFB_OVERLAY_PREPARE:
+ ret = __handle_ioctl_overlay_prepare(mfd, argp);
+ break;
default:
if (mfd->panel.type == WRITEBACK_PANEL)
ret = mdss_mdp_wb_ioctl_handler(mfd, cmd, argp);
@@ -2460,10 +2569,10 @@
}
if (!mfd->panel_info->cont_splash_enabled &&
- (mfd->panel_info->type != DTV_PANEL) &&
- (mfd->panel_info->type != WRITEBACK_PANEL)) {
+ (mfd->panel_info->type != DTV_PANEL)) {
rc = mdss_mdp_overlay_start(mfd);
- if (!IS_ERR_VALUE(rc))
+ if (!IS_ERR_VALUE(rc) &&
+ (mfd->panel_info->type != WRITEBACK_PANEL))
rc = mdss_mdp_overlay_kickoff(mfd, NULL);
} else {
rc = mdss_mdp_ctl_setup(mdp5_data->ctl);
@@ -2545,14 +2654,9 @@
int mdss_panel_register_done(struct mdss_panel_data *pdata)
{
- /*
- * Clocks are already on if continuous splash is enabled,
- * increasing ref_cnt to help balance clocks once done.
- */
- if (pdata->panel_info.cont_splash_enabled) {
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ if (pdata->panel_info.cont_splash_enabled)
mdss_mdp_footswitch_ctrl_splash(1);
- }
+
return 0;
}
@@ -2709,6 +2813,107 @@
return rc;
}
+static void __vsync_retire_handle_vsync(struct mdss_mdp_ctl *ctl, ktime_t t)
+{
+ struct msm_fb_data_type *mfd = ctl->mfd;
+ struct mdss_overlay_private *mdp5_data;
+
+ if (!mfd || !mfd->mdp.private1) {
+ pr_warn("Invalid handle for vsync\n");
+ return;
+ }
+
+ mdp5_data = mfd_to_mdp5_data(mfd);
+ schedule_work(&mdp5_data->retire_work);
+}
+
+static void __vsync_retire_work_handler(struct work_struct *work)
+{
+ struct mdss_overlay_private *mdp5_data =
+ container_of(work, typeof(*mdp5_data), retire_work);
+ struct msm_sync_pt_data *sync_pt_data;
+
+ if (!mdp5_data->ctl || !mdp5_data->ctl->mfd)
+ return;
+
+ if (!mdp5_data->ctl->remove_vsync_handler)
+ return;
+
+ sync_pt_data = &mdp5_data->ctl->mfd->mdp_sync_pt_data;
+ mutex_lock(&sync_pt_data->sync_mutex);
+ if (mdp5_data->retire_cnt > 0) {
+ sw_sync_timeline_inc(mdp5_data->vsync_timeline, 1);
+
+ mdp5_data->retire_cnt--;
+ if (mdp5_data->retire_cnt == 0) {
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ mdp5_data->ctl->remove_vsync_handler(mdp5_data->ctl,
+ &mdp5_data->vsync_retire_handler);
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ }
+ }
+ mutex_unlock(&sync_pt_data->sync_mutex);
+}
+
+static struct sync_fence *
+__vsync_retire_get_fence(struct msm_sync_pt_data *sync_pt_data)
+{
+ struct msm_fb_data_type *mfd;
+ struct mdss_overlay_private *mdp5_data;
+ struct mdss_mdp_ctl *ctl;
+ int rc, value;
+
+ mfd = container_of(sync_pt_data, typeof(*mfd), mdp_sync_pt_data);
+ mdp5_data = mfd_to_mdp5_data(mfd);
+
+ if (!mdp5_data || !mdp5_data->ctl)
+ return ERR_PTR(-ENODEV);
+
+ ctl = mdp5_data->ctl;
+ if (!ctl->add_vsync_handler)
+ return ERR_PTR(-EOPNOTSUPP);
+
+ if (!ctl->power_on) {
+ pr_debug("fb%d vsync pending first update\n", mfd->index);
+ return ERR_PTR(-EPERM);
+ }
+
+ if (mdp5_data->retire_cnt == 0) {
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ rc = ctl->add_vsync_handler(ctl,
+ &mdp5_data->vsync_retire_handler);
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ if (IS_ERR_VALUE(rc))
+ return ERR_PTR(rc);
+ }
+ value = mdp5_data->vsync_timeline->value + 1 + mdp5_data->retire_cnt;
+ mdp5_data->retire_cnt++;
+
+ return mdss_fb_sync_get_fence(mdp5_data->vsync_timeline,
+ "mdp-retire", value);
+}
+
+static int __vsync_retire_setup(struct msm_fb_data_type *mfd)
+{
+ struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd);
+ char name[24];
+
+ snprintf(name, sizeof(name), "mdss_fb%d_retire", mfd->index);
+ mdp5_data->vsync_timeline = sw_sync_timeline_create(name);
+ if (mdp5_data->vsync_timeline == NULL) {
+ pr_err("cannot vsync create time line");
+ return -ENOMEM;
+ }
+ mfd->mdp_sync_pt_data.get_retire_fence = __vsync_retire_get_fence;
+
+ mdp5_data->vsync_retire_handler.vsync_handler =
+ __vsync_retire_handle_vsync;
+ mdp5_data->vsync_retire_handler.cmd_post_flush = false;
+ INIT_WORK(&mdp5_data->retire_work, __vsync_retire_work_handler);
+
+ return 0;
+}
+
int mdss_mdp_overlay_init(struct msm_fb_data_type *mfd)
{
struct device *dev = mfd->fbi->dev;
@@ -2775,6 +2980,12 @@
pr_err("Error dfps sysfs creation ret=%d\n", rc);
goto init_fail;
}
+ } else if (mfd->panel_info->type == MIPI_CMD_PANEL) {
+ rc = __vsync_retire_setup(mfd);
+ if (IS_ERR_VALUE(rc)) {
+ pr_err("unable to create vsync timeline\n");
+ goto init_fail;
+ }
}
mfd->mdp_sync_pt_data.async_wait_fences = true;
rc = sysfs_create_link_nowarn(&dev->kobj,
diff --git a/drivers/video/msm/mdss/mdss_mdp_pipe.c b/drivers/video/msm/mdss/mdss_mdp_pipe.c
index 88a2a69..b6f9b17 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pipe.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pipe.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,6 +32,8 @@
static DEFINE_MUTEX(mdss_mdp_smp_lock);
static int mdss_mdp_pipe_free(struct mdss_mdp_pipe *pipe);
+static int mdss_mdp_smp_mmb_set(int client_id, unsigned long *smp);
+static void mdss_mdp_smp_mmb_free(unsigned long *smp, bool write);
static struct mdss_mdp_pipe *mdss_mdp_pipe_search_by_client_id(
struct mdss_data_type *mdata, int client_id);
@@ -58,8 +60,27 @@
else
n -= fixed_cnt;
- /* reserve more blocks if needed, but can't free mmb at this point */
- for (i = bitmap_weight(smp_map->allocated, SMP_MB_CNT); i < n; i++) {
+ i = bitmap_weight(smp_map->allocated, SMP_MB_CNT);
+
+ /*
+ * SMP programming is not double buffered. Fail the request,
+ * that calls for change in smp configuration (addition/removal
+ * of smp blocks), so that fallback solution happens.
+ */
+ if (i != 0 && n != i) {
+ pr_debug("Can't change mmb config, num_blks: %d alloc: %d\n",
+ n, i);
+ return 0;
+ }
+
+ /*
+ * Clear previous SMP reservations and reserve according to the
+ * latest configuration
+ */
+ mdss_mdp_smp_mmb_free(smp_map->reserved, false);
+
+ /* Reserve mmb blocks*/
+ for (; i < n; i++) {
if (bitmap_full(mdata->mmb_alloc_map, SMP_MB_CNT))
break;
@@ -108,6 +129,26 @@
}
}
+/**
+ * @mdss_mdp_smp_get_size - get allocated smp size for a pipe
+ * @pipe: pointer to a pipe
+ *
+ * Function counts number of blocks that are currently allocated for a
+ * pipe, then smp buffer size is number of blocks multiplied by block
+ * size.
+ */
+u32 mdss_mdp_smp_get_size(struct mdss_mdp_pipe *pipe)
+{
+ int i, mb_cnt = 0;
+
+ for (i = 0; i < MAX_PLANES; i++) {
+ mb_cnt += bitmap_weight(pipe->smp_map[i].allocated, SMP_MB_CNT);
+ mb_cnt += bitmap_weight(pipe->smp_map[i].fixed, SMP_MB_CNT);
+ }
+
+ return mb_cnt * SMP_MB_SIZE;
+}
+
static void mdss_mdp_smp_set_wm_levels(struct mdss_mdp_pipe *pipe, int mb_cnt)
{
u32 fetch_size, val, wm[3];
@@ -168,7 +209,7 @@
u32 num_blks = 0, reserved = 0;
struct mdss_mdp_plane_sizes ps;
int i;
- int rc = 0, rot_mode = 0;
+ int rc = 0, rot_mode = 0, wb_mixer = 0;
u32 nlines, format;
u16 width;
@@ -249,11 +290,26 @@
}
}
- nlines = pipe->bwc_mode ? 1 : 2;
+ if (pipe->src_fmt->tile)
+ nlines = 8;
+ else
+ nlines = pipe->bwc_mode ? 1 : 2;
+
+ if (pipe->mixer->type == MDSS_MDP_MIXER_TYPE_WRITEBACK)
+ wb_mixer = 1;
mutex_lock(&mdss_mdp_smp_lock);
+ for (i = (MAX_PLANES - 1); i >= ps.num_planes; i--) {
+ if (bitmap_weight(pipe->smp_map[i].allocated, SMP_MB_CNT)) {
+ pr_debug("Extra mmb identified for pnum=%d plane=%d\n",
+ pipe->num, i);
+ mutex_unlock(&mdss_mdp_smp_lock);
+ return -EAGAIN;
+ }
+ }
+
for (i = 0; i < ps.num_planes; i++) {
- if (rot_mode) {
+ if (rot_mode || wb_mixer) {
num_blks = 1;
} else {
num_blks = DIV_ROUND_UP(ps.ystride[i] * nlines,
@@ -505,7 +561,7 @@
* shared as long as its attached to a writeback mixer
*/
pipe = mdata->dma_pipes + mixer->num;
- mdss_mdp_pipe_map(pipe);
+ atomic_inc(&pipe->ref_cnt);
pr_debug("pipe sharing for pipe=%d\n", pipe->num);
} else {
pr_err("no %d type pipes available\n", type);
@@ -619,15 +675,20 @@
pr_debug("ndx=%x pnum=%d ref_cnt=%d\n", pipe->ndx, pipe->num,
atomic_read(&pipe->ref_cnt));
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
- mdss_mdp_pipe_sspp_term(pipe);
- mdss_mdp_smp_free(pipe);
+ if (pipe->play_cnt) {
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ mdss_mdp_pipe_sspp_term(pipe);
+ mdss_mdp_smp_free(pipe);
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ mdss_mdp_smp_unreserve(pipe);
+ }
+
pipe->flags = 0;
pipe->bwc_mode = 0;
+ pipe->mfd = NULL;
memset(&pipe->scale, 0, sizeof(struct mdp_scale_data));
- mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
-
return 0;
}
@@ -761,31 +822,14 @@
pipe->src_fmt->bpp);
pipe->is_handed_off = true;
+ pipe->play_cnt = 1;
atomic_inc(&pipe->ref_cnt);
error:
return rc;
}
-void mdss_mdp_crop_rect(struct mdss_mdp_img_rect *src_rect,
- struct mdss_mdp_img_rect *dst_rect,
- const struct mdss_mdp_img_rect *sci_rect)
-{
- struct mdss_mdp_img_rect res;
- mdss_mdp_intersect_rect(&res, dst_rect, sci_rect);
- if (res.w && res.h) {
- if ((res.w != dst_rect->w) || (res.h != dst_rect->h)) {
- src_rect->x = src_rect->x + (res.x - dst_rect->x);
- src_rect->y = src_rect->y + (res.y - dst_rect->y);
- src_rect->w = res.w;
- src_rect->h = res.h;
- }
- *dst_rect = (struct mdss_mdp_img_rect)
- {(res.x - sci_rect->x), (res.y - sci_rect->y),
- res.w, res.h};
- }
-}
static int mdss_mdp_image_setup(struct mdss_mdp_pipe *pipe,
struct mdss_mdp_data *data)
@@ -888,6 +932,7 @@
u32 chroma_samp, unpack, src_format;
u32 secure = 0;
u32 opmode;
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
fmt = pipe->src_fmt;
@@ -918,6 +963,9 @@
(fmt->bits[C1_B_Cb] << 2) |
(fmt->bits[C0_G_Y] << 0);
+ if (fmt->tile)
+ src_format |= BIT(30);
+
if (pipe->flags & MDP_ROT_90)
src_format |= BIT(11); /* ROT90 */
@@ -937,6 +985,11 @@
if (pipe->scale.enable_pxl_ext)
opmode |= (1 << 31);
+ if (fmt->tile && mdata->highest_bank_bit) {
+ mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_FETCH_CONFIG,
+ MDSS_MDP_FETCH_CONFIG_RESET_VALUE |
+ mdata->highest_bank_bit << 18);
+ }
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_FORMAT, src_format);
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_UNPACK_PATTERN, unpack);
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC_OP_MODE, opmode);
diff --git a/drivers/video/msm/mdss/mdss_mdp_pp.c b/drivers/video/msm/mdss/mdss_mdp_pp.c
index 8dfa7a3..5c9ad9c 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pp.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pp.c
@@ -179,7 +179,8 @@
#define MDSS_MDP_GC_SIZE 0x28
#define MDSS_MDP_PCC_SIZE 0xB8
#define MDSS_MDP_GAMUT_SIZE 0x5C
-#define MDSS_MDP_IGC_DSPP_COLORS 0x3
+#define MDSS_MDP_IGC_DSPP_SIZE 0x28
+#define MDSS_MDP_IGC_SSPP_SIZE 0x88
#define TOTAL_BLEND_STAGES 0x4
#define PP_FLAGS_DIRTY_PA 0x1
@@ -395,6 +396,7 @@
struct mdss_mdp_ctl *ctl, u32 num, u32 *opmode);
static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd);
static void pp_ad_cfg_lut(char __iomem *addr, u32 *data);
+static u32 pp_ad_attenuate_bl(u32 bl, struct mdss_ad_info *ad);
static int pp_num_to_side(struct mdss_mdp_ctl *ctl, u32 num);
static inline bool pp_sts_is_enabled(u32 sts, int side);
static inline void pp_sts_set_split_bits(u32 *sts, u32 bits);
@@ -1588,7 +1590,7 @@
if (mdata->nad_cfgs == 0)
valid_mixers = false;
for (i = 0; i < mixer_cnt && valid_mixers; i++) {
- if (mixer_id[i] > mdata->nad_cfgs)
+ if (mixer_id[i] >= mdata->nad_cfgs)
valid_mixers = false;
}
if (valid_mixers && (mixer_cnt <= mdata->nmax_concurrent_ad_hw)) {
@@ -1647,6 +1649,7 @@
if (ad->state & PP_AD_STATE_BL_LIN) {
bl = ad->bl_lin[bl >> ad->bl_bright_shift];
bl = bl << ad->bl_bright_shift;
+ bl = pp_ad_attenuate_bl(bl, ad);
}
ad->bl_data = bl;
pp_ad_input_write(&mdata->ad_off[dspp_num], ad);
@@ -3780,7 +3783,7 @@
{
struct mdss_ad_info *ad;
struct msm_fb_data_type *bl_mfd;
- int lin_ret = -1, inv_ret = -1, ret = 0;
+ int lin_ret = -1, inv_ret = -1, att_ret = -1, ret = 0;
u32 ratio_temp, shift = 0, last_ops;
ret = mdss_mdp_get_ad(mfd, &ad);
@@ -3829,6 +3832,23 @@
} else
ad->state |= PP_AD_STATE_BL_LIN;
+ if ((init_cfg->params.init.bl_att_len == AD_BL_ATT_LUT_LEN) &&
+ (init_cfg->params.init.bl_att_lut)) {
+ att_ret = copy_from_user(&ad->bl_att_lut,
+ init_cfg->params.init.bl_att_lut,
+ init_cfg->params.init.bl_att_len *
+ sizeof(uint32_t));
+ if (att_ret)
+ ret = -ENOMEM;
+ } else {
+ ret = -EINVAL;
+ }
+ if (ret) {
+ ad->state &= ~PP_AD_STATE_BL_LIN;
+ goto ad_config_exit;
+ } else
+ ad->state |= PP_AD_STATE_BL_LIN;
+
ad->sts |= PP_AD_STS_DIRTY_INIT;
} else if (init_cfg->ops & MDP_PP_AD_CFG) {
memcpy(&ad->cfg, &init_cfg->params.cfg,
@@ -4255,6 +4275,7 @@
if (ad->state & PP_AD_STATE_BL_LIN) {
bl = ad->bl_lin[bl >> ad->bl_bright_shift];
bl = bl << ad->bl_bright_shift;
+ bl = pp_ad_attenuate_bl(bl, ad);
}
ad->bl_data = bl;
}
@@ -4329,6 +4350,8 @@
AD_BL_LIN_LEN);
memset(&ad->bl_lin_inv, 0, sizeof(uint32_t) *
AD_BL_LIN_LEN);
+ memset(&ad->bl_att_lut, 0, sizeof(uint32_t) *
+ AD_BL_ATT_LUT_LEN);
memset(&ad->init, 0, sizeof(struct mdss_ad_init));
memset(&ad->cfg, 0, sizeof(struct mdss_ad_cfg));
mutex_lock(&bl_mfd->bl_lock);
@@ -4390,7 +4413,7 @@
ctl = mfd_to_ctl(ad->mfd);
mdata = mfd_to_mdata(ad->mfd);
- if (!mdata || ad->calc_hw_num > mdata->nad_cfgs) {
+ if (!mdata || ad->calc_hw_num >= mdata->nad_cfgs) {
mutex_unlock(&ad->lock);
return;
}
@@ -4473,6 +4496,30 @@
addr + ((PP_AD_LUT_LEN - 1) * 2));
}
+static u32 pp_ad_attenuate_bl(u32 bl, struct mdss_ad_info *ad)
+{
+ u32 shift = 0, ratio_temp = 0;
+ u32 n, lut_interval, bl_att, out;
+
+ ratio_temp = ad->cfg.backlight_max / (AD_BL_ATT_LUT_LEN - 1);
+ while (ratio_temp > 0) {
+ ratio_temp = ratio_temp >> 1;
+ shift++;
+ }
+ n = bl >> shift;
+ lut_interval = (ad->cfg.backlight_max + 1) / (AD_BL_ATT_LUT_LEN - 1);
+ bl_att = ad->bl_att_lut[n] + (bl - lut_interval * n) *
+ (ad->bl_att_lut[n + 1] - ad->bl_att_lut[n]) /
+ lut_interval;
+ if (ad->init.alpha_base)
+ out = (ad->init.alpha * bl_att +
+ (ad->init.alpha_base - ad->init.alpha) * bl) /
+ ad->init.alpha_base;
+ else
+ out = bl;
+ return out;
+}
+
int mdss_mdp_ad_addr_setup(struct mdss_data_type *mdata, u32 *ad_offsets)
{
u32 i;
@@ -4642,12 +4689,6 @@
MDSS_MDP_MEM_COL_SIZE)) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
- /* IGC range */
- } else if ((ptr >= base + MDSS_MDP_REG_IGC_VIG_BASE) &&
- (ptr <= base + MDSS_MDP_REG_IGC_VIG_BASE +
- MDSS_MDP_GC_SIZE)) {
- ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
- break;
}
}
@@ -4676,12 +4717,6 @@
} else if (ptr == base + MDSS_MDP_REG_SSPP_SRC_OP_MODE) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
- /* IGC range */
- } else if ((ptr >= base + MDSS_MDP_REG_IGC_RGB_BASE) &&
- (ptr <= base + MDSS_MDP_REG_IGC_RGB_BASE +
- MDSS_MDP_GC_SIZE)) {
- ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
- break;
}
}
@@ -4710,12 +4745,6 @@
} else if (ptr == base + MDSS_MDP_REG_SSPP_SRC_OP_MODE) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
break;
- /* IGC range */
- } else if ((ptr >= base + MDSS_MDP_REG_IGC_DMA_BASE) &&
- (ptr <= base + MDSS_MDP_REG_IGC_DMA_BASE +
- MDSS_MDP_GC_SIZE)) {
- ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
- break;
}
}
@@ -4782,9 +4811,15 @@
} else if (ptr == (mdss_res->mdp_base + MDSS_MDP_REG_HW_VERSION) ||
ptr == (mdss_res->mdp_base + MDSS_MDP_REG_DISP_INTF_SEL)) {
ret = MDP_PP_OPS_READ;
+ /* IGC DSPP range */
} else if (ptr >= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE) &&
- ptr < (mdss_res->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE +
- MDSS_MDP_IGC_DSPP_COLORS)) {
+ ptr <= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_DSPP_BASE +
+ MDSS_MDP_IGC_DSPP_SIZE)) {
+ ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
+ /* IGC SSPP range */
+ } else if (ptr >= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_VIG_BASE) &&
+ ptr <= (mdss_res->mdp_base + MDSS_MDP_REG_IGC_VIG_BASE +
+ MDSS_MDP_IGC_SSPP_SIZE)) {
ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;
} else if (ptr >= dspp_base && ptr < (dspp_base +
(mdss_res->nmixers_intf * MDSS_MDP_DSPP_ADDRESS_OFFSET))) {
diff --git a/drivers/video/msm/mdss/mdss_mdp_rotator.c b/drivers/video/msm/mdss/mdss_mdp_rotator.c
index 588e217..91e6373 100644
--- a/drivers/video/msm/mdss/mdss_mdp_rotator.c
+++ b/drivers/video/msm/mdss/mdss_mdp_rotator.c
@@ -224,12 +224,6 @@
pipe->params_changed++;
rot->params_changed = 0;
- /*
- * Clear previous SMP reservations and reserve according
- * to the latest configuration
- */
- mdss_mdp_smp_unreserve(pipe);
-
ret = mdss_mdp_smp_reserve(pipe);
if (ret) {
pr_err("unable to mdss_mdp_smp_reserve rot data\n");
diff --git a/drivers/video/msm/mdss/mdss_mdp_util.c b/drivers/video/msm/mdss/mdss_mdp_util.c
index 79873b6..69506d4 100644
--- a/drivers/video/msm/mdss/mdss_mdp_util.c
+++ b/drivers/video/msm/mdss/mdss_mdp_util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -257,6 +257,27 @@
else
*res_rect = (struct mdss_mdp_img_rect){l, t, (r-l), (b-t)};
}
+
+void mdss_mdp_crop_rect(struct mdss_mdp_img_rect *src_rect,
+ struct mdss_mdp_img_rect *dst_rect,
+ const struct mdss_mdp_img_rect *sci_rect)
+{
+ struct mdss_mdp_img_rect res;
+ mdss_mdp_intersect_rect(&res, dst_rect, sci_rect);
+
+ if (res.w && res.h) {
+ if ((res.w != dst_rect->w) || (res.h != dst_rect->h)) {
+ src_rect->x = src_rect->x + (res.x - dst_rect->x);
+ src_rect->y = src_rect->y + (res.y - dst_rect->y);
+ src_rect->w = res.w;
+ src_rect->h = res.h;
+ }
+ *dst_rect = (struct mdss_mdp_img_rect)
+ {(res.x - sci_rect->x), (res.y - sci_rect->y),
+ res.w, res.h};
+ }
+}
+
int mdss_mdp_get_rau_strides(u32 w, u32 h,
struct mdss_mdp_format_params *fmt,
struct mdss_mdp_plane_sizes *ps)
diff --git a/drivers/video/msm/mdss/mdss_mdp_wb.c b/drivers/video/msm/mdss/mdss_mdp_wb.c
index dc791d9..454183d 100644
--- a/drivers/video/msm/mdss/mdss_mdp_wb.c
+++ b/drivers/video/msm/mdss/mdss_mdp_wb.c
@@ -51,7 +51,8 @@
REGISTERED,
IN_FREE_QUEUE,
IN_BUSY_QUEUE,
- WITH_CLIENT
+ WITH_CLIENT,
+ WB_BUFFER_READY,
};
struct mdss_mdp_wb_data {
@@ -60,11 +61,14 @@
struct msmfb_data buf_info;
struct mdss_mdp_data buf_data;
int state;
+ bool user_alloc;
};
static DEFINE_MUTEX(mdss_mdp_wb_buf_lock);
static struct mdss_mdp_wb mdss_mdp_wb_info;
+static void mdss_mdp_wb_free_node(struct mdss_mdp_wb_data *node);
+
#ifdef DEBUG_WRITEBACK
/* for debugging: writeback output buffer to allocated memory */
static inline
@@ -284,6 +288,7 @@
struct mdss_mdp_wb_data *node, *temp;
list_for_each_entry_safe(node, temp, &wb->register_queue,
registered_entry) {
+ mdss_mdp_wb_free_node(node);
list_del(&node->registered_entry);
kfree(node);
}
@@ -400,12 +405,24 @@
struct mdss_mdp_img_data *buf;
int ret;
+ if (!list_empty(&wb->register_queue)) {
+ list_for_each_entry(node, &wb->register_queue, registered_entry)
+ if ((node->buf_info.memory_id == data->memory_id) &&
+ (node->buf_info.offset == data->offset)) {
+ pr_debug("found node fd=%x off=%x addr=%x\n",
+ data->memory_id, data->offset,
+ node->buf_data.p[0].addr);
+ return node;
+ }
+ }
+
node = kzalloc(sizeof(struct mdss_mdp_wb_data), GFP_KERNEL);
if (node == NULL) {
pr_err("out of memory\n");
return NULL;
}
+ node->user_alloc = true;
node->buf_data.num_planes = 1;
buf = &node->buf_data.p[0];
if (wb->is_secure)
@@ -433,6 +450,22 @@
return NULL;
}
+static void mdss_mdp_wb_free_node(struct mdss_mdp_wb_data *node)
+{
+ struct mdss_mdp_img_data *buf;
+
+ if (node->user_alloc) {
+ buf = &node->buf_data.p[0];
+ pr_debug("free user node mem_id=%d offset=%u addr=0x%x\n",
+ node->buf_info.memory_id,
+ node->buf_info.offset,
+ buf->addr);
+
+ mdss_mdp_put_img(&node->buf_data.p[0]);
+ node->user_alloc = false;
+ }
+}
+
static int mdss_mdp_wb_queue(struct msm_fb_data_type *mfd,
struct msmfb_data *data, int local)
{
@@ -457,13 +490,37 @@
if (node == NULL)
node = get_user_node(mfd, data);
- if (!node || node->state == IN_BUSY_QUEUE ||
- node->state == IN_FREE_QUEUE) {
- pr_err("memory not registered or Buffer already with us\n");
- ret = -EINVAL;
+ if (!node) {
+ pr_err("memory not registered\n");
+ ret = -ENOENT;
} else {
- list_add_tail(&node->active_entry, &wb->free_queue);
- node->state = IN_FREE_QUEUE;
+ struct mdss_mdp_img_data *buf = &node->buf_data.p[0];
+
+ switch (node->state) {
+ case IN_FREE_QUEUE:
+ pr_err("node 0x%pa was already queueued before\n",
+ &buf->addr);
+ ret = -EINVAL;
+ break;
+ case IN_BUSY_QUEUE:
+ pr_err("node 0x%pa still in busy state\n", &buf->addr);
+ ret = -EBUSY;
+ break;
+ case WB_BUFFER_READY:
+ pr_debug("node 0x%pa re-queueded without dequeue\n",
+ &buf->addr);
+ list_del(&node->active_entry);
+ case WITH_CLIENT:
+ case REGISTERED:
+ list_add_tail(&node->active_entry, &wb->free_queue);
+ node->state = IN_FREE_QUEUE;
+ break;
+ default:
+ pr_err("Invalid node 0x%pa state %d\n",
+ &buf->addr, node->state);
+ ret = -EINVAL;
+ break;
+ }
}
mutex_unlock(&wb->lock);
@@ -533,6 +590,8 @@
if (!ctl->power_on)
return 0;
+ memset(&wb_args, 0, sizeof(wb_args));
+
mutex_lock(&mdss_mdp_wb_buf_lock);
if (wb) {
mutex_lock(&wb->lock);
@@ -573,6 +632,7 @@
if (wb && node) {
mutex_lock(&wb->lock);
list_add_tail(&node->active_entry, &wb->busy_queue);
+ node->state = WB_BUFFER_READY;
mutex_unlock(&wb->lock);
wake_up(&wb->wait_q);
}
@@ -834,3 +894,22 @@
return mdss_mdp_wb_set_secure(mfd, enable);
}
EXPORT_SYMBOL(msm_fb_writeback_set_secure);
+
+/**
+ * msm_fb_writeback_iommu_ref() - Power ON/OFF mdp clock
+ * @enable - true/false to Power ON/OFF mdp clock
+ *
+ * Call to enable mdp clock at start of mdp_mmap/mdp_munmap API and
+ * to disable mdp clock at end of these API's to ensure iommu is in
+ * proper state while driver map/un-map any buffers.
+ */
+int msm_fb_writeback_iommu_ref(struct fb_info *info, int enable)
+{
+ if (enable)
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ else
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+
+ return 0;
+}
+EXPORT_SYMBOL(msm_fb_writeback_iommu_ref);
diff --git a/drivers/video/msm/mdss/mdss_panel.h b/drivers/video/msm/mdss/mdss_panel.h
index a42ff1e..274c523 100644
--- a/drivers/video/msm/mdss/mdss_panel.h
+++ b/drivers/video/msm/mdss/mdss_panel.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2008-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -227,9 +227,14 @@
u32 init_delay;
};
+struct edp_panel_info {
+ char frame_rate; /* fps */
+};
+
enum dynamic_fps_update {
DFPS_SUSPEND_RESUME_MODE,
DFPS_IMMEDIATE_CLK_UPDATE_MODE,
+ DFPS_IMMEDIATE_PORCH_UPDATE_MODE,
};
enum lvds_mode {
@@ -309,6 +314,7 @@
struct fbc_panel_info fbc;
struct mipi_panel_info mipi;
struct lvds_panel_info lvds;
+ struct edp_panel_info edp;
};
struct mdss_panel_data {
@@ -349,6 +355,9 @@
case MIPI_CMD_PANEL:
frame_rate = panel_info->mipi.frame_rate;
break;
+ case EDP_PANEL:
+ frame_rate = panel_info->edp.frame_rate;
+ break;
case WRITEBACK_PANEL:
frame_rate = DEFAULT_FRAME_RATE;
break;
diff --git a/drivers/video/msm/mdss/msm_mdss_io_8974.c b/drivers/video/msm/mdss/msm_mdss_io_8974.c
index a63275b..6ebcdf6 100644
--- a/drivers/video/msm/mdss/msm_mdss_io_8974.c
+++ b/drivers/video/msm/mdss/msm_mdss_io_8974.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -247,10 +247,12 @@
return 0;
}
-int mdss_dsi_enable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+int mdss_dsi_bus_clk_start(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
int rc = 0;
+ pr_debug("%s: ndx=%d\n", __func__, ctrl_pdata->ndx);
+
rc = clk_prepare_enable(ctrl_pdata->mdp_core_clk);
if (rc) {
pr_err("%s: failed to enable mdp_core_clock. rc=%d\n",
@@ -277,14 +279,14 @@
return rc;
}
-void mdss_dsi_disable_bus_clocks(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+void mdss_dsi_bus_clk_stop(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
clk_disable_unprepare(ctrl_pdata->axi_clk);
clk_disable_unprepare(ctrl_pdata->ahb_clk);
clk_disable_unprepare(ctrl_pdata->mdp_core_clk);
}
-static int mdss_dsi_clk_prepare(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+static int mdss_dsi_link_clk_prepare(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
int rc = 0;
@@ -316,7 +318,7 @@
return rc;
}
-static void mdss_dsi_clk_unprepare(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+static void mdss_dsi_link_clk_unprepare(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
if (!ctrl_pdata) {
pr_err("%s: Invalid input data\n", __func__);
@@ -328,7 +330,7 @@
clk_unprepare(ctrl_pdata->esc_clk);
}
-static int mdss_dsi_clk_set_rate(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+static int mdss_dsi_link_clk_set_rate(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
u32 esc_clk_rate = 19200000;
int rc = 0;
@@ -369,7 +371,7 @@
return rc;
}
-static int mdss_dsi_clk_enable(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+static int mdss_dsi_link_clk_enable(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
int rc = 0;
@@ -378,6 +380,8 @@
return -EINVAL;
}
+ pr_debug("%s: ndx=%d\n", __func__, ctrl_pdata->ndx);
+
if (ctrl_pdata->mdss_dsi_clk_on) {
pr_info("%s: mdss_dsi_clks already ON\n", __func__);
return 0;
@@ -413,13 +417,15 @@
return rc;
}
-static void mdss_dsi_clk_disable(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
+static void mdss_dsi_link_clk_disable(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
if (!ctrl_pdata) {
pr_err("%s: Invalid input data\n", __func__);
return;
}
+ pr_debug("%s: ndx=%d\n", __func__, ctrl_pdata->ndx);
+
if (ctrl_pdata->mdss_dsi_clk_on == 0) {
pr_info("%s: mdss_dsi_clks already OFF\n", __func__);
return;
@@ -432,62 +438,110 @@
ctrl_pdata->mdss_dsi_clk_on = 0;
}
-int mdss_dsi_clk_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, int enable)
+int mdss_dsi_link_clk_start(struct mdss_dsi_ctrl_pdata *ctrl)
{
int rc = 0;
- mutex_lock(&ctrl->mutex);
+ rc = mdss_dsi_link_clk_set_rate(ctrl);
+ if (rc) {
+ pr_err("%s: failed to set clk rates. rc=%d\n",
+ __func__, rc);
+ goto error;
+ }
+
+ rc = mdss_dsi_link_clk_prepare(ctrl);
+ if (rc) {
+ pr_err("%s: failed to prepare clks. rc=%d\n",
+ __func__, rc);
+ goto error;
+ }
+
+ rc = mdss_dsi_link_clk_enable(ctrl);
+ if (rc) {
+ pr_err("%s: failed to enable clks. rc=%d\n",
+ __func__, rc);
+ mdss_dsi_link_clk_unprepare(ctrl);
+ goto error;
+ }
+
+error:
+ return rc;
+}
+
+void mdss_dsi_link_clk_stop(struct mdss_dsi_ctrl_pdata *ctrl)
+{
+ mdss_dsi_link_clk_disable(ctrl);
+ mdss_dsi_link_clk_unprepare(ctrl);
+}
+
+static void mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl, int enable)
+{
+ int changed = 0;
+
if (enable) {
- if (ctrl->clk_cnt == 0) {
- rc = mdss_dsi_enable_bus_clocks(ctrl);
- if (rc) {
- pr_err("%s: failed to enable bus clks. rc=%d\n",
- __func__, rc);
- goto error;
- }
-
- rc = mdss_dsi_clk_set_rate(ctrl);
- if (rc) {
- pr_err("%s: failed to set clk rates. rc=%d\n",
- __func__, rc);
- mdss_dsi_disable_bus_clocks(ctrl);
- goto error;
- }
-
- rc = mdss_dsi_clk_prepare(ctrl);
- if (rc) {
- pr_err("%s: failed to prepare clks. rc=%d\n",
- __func__, rc);
- mdss_dsi_disable_bus_clocks(ctrl);
- goto error;
- }
-
- rc = mdss_dsi_clk_enable(ctrl);
- if (rc) {
- pr_err("%s: failed to enable clks. rc=%d\n",
- __func__, rc);
- mdss_dsi_clk_unprepare(ctrl);
- mdss_dsi_disable_bus_clocks(ctrl);
- goto error;
- }
+ if (ctrl->clk_cnt_sub == 0)
+ changed++;
+ ctrl->clk_cnt_sub++;
+ } else {
+ if (ctrl->clk_cnt_sub) {
+ ctrl->clk_cnt_sub--;
+ if (ctrl->clk_cnt_sub == 0)
+ changed++;
+ } else {
+ pr_debug("%s: Can not be turned off\n", __func__);
}
+ }
+
+ pr_debug("%s: ndx=%d clk_cnt_sub=%d changed=%d enable=%d\n",
+ __func__, ctrl->ndx, ctrl->clk_cnt_sub, changed, enable);
+ if (changed) {
+ if (enable) {
+ if (mdss_dsi_bus_clk_start(ctrl) == 0)
+ mdss_dsi_link_clk_start(ctrl);
+ } else {
+ mdss_dsi_link_clk_stop(ctrl);
+ mdss_dsi_bus_clk_stop(ctrl);
+ }
+ }
+}
+
+static DEFINE_MUTEX(dsi_clk_lock); /* per system */
+
+void mdss_dsi_clk_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, int enable)
+{
+ int changed = 0;
+ struct mdss_dsi_ctrl_pdata *sctrl = NULL;
+
+ mutex_lock(&dsi_clk_lock);
+ if (enable) {
+ if (ctrl->clk_cnt == 0)
+ changed++;
ctrl->clk_cnt++;
} else {
if (ctrl->clk_cnt) {
ctrl->clk_cnt--;
- if (ctrl->clk_cnt == 0) {
- mdss_dsi_clk_disable(ctrl);
- mdss_dsi_clk_unprepare(ctrl);
- mdss_dsi_disable_bus_clocks(ctrl);
- }
+ if (ctrl->clk_cnt == 0)
+ changed++;
+ } else {
+ pr_debug("%s: Can not be turned off\n", __func__);
}
}
- pr_debug("%s: ctrl ndx=%d enabled=%d clk_cnt=%d\n",
- __func__, ctrl->ndx, enable, ctrl->clk_cnt);
-error:
- mutex_unlock(&ctrl->mutex);
- return rc;
+ pr_debug("%s: ndx=%d clk_cnt=%d changed=%d enable=%d\n",
+ __func__, ctrl->ndx, ctrl->clk_cnt, changed, enable);
+ if (ctrl->flags & DSI_FLAG_CLOCK_MASTER)
+ sctrl = mdss_dsi_ctrl_slave(ctrl);
+
+ if (changed) {
+ if (enable && sctrl)
+ mdss_dsi_clk_ctrl_sub(sctrl, enable);
+
+ mdss_dsi_clk_ctrl_sub(ctrl, enable);
+
+ if (!enable && sctrl)
+ mdss_dsi_clk_ctrl_sub(sctrl, enable);
+ }
+ mutex_unlock(&dsi_clk_lock);
}
void mdss_dsi_phy_sw_reset(unsigned char *ctrl_base)
@@ -502,7 +556,7 @@
wmb();
}
-void mdss_dsi_phy_enable(struct mdss_dsi_ctrl_pdata *ctrl, int on)
+void mdss_dsi_phy_disable(struct mdss_dsi_ctrl_pdata *ctrl)
{
static struct mdss_dsi_ctrl_pdata *left_ctrl;
@@ -511,59 +565,28 @@
return;
}
- if (!left_ctrl
- && ctrl->shared_pdata.broadcast_enable)
- if ((ctrl->panel_data).panel_info.pdest
- == DISPLAY_1)
- left_ctrl = ctrl;
+ if (left_ctrl &&
+ (ctrl->panel_data.panel_info.pdest == DISPLAY_1))
+ return;
- if (on) {
- MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x03);
- wmb();
- usleep(100);
- MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006);
- wmb();
- usleep(100);
- MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x001);
- wmb();
- usleep(100);
- MIPI_OUTP(ctrl->ctrl_base + 0x0268, 0x000);
- wmb();
- usleep(100);
- MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x007);
- wmb();
- MIPI_OUTP(ctrl->ctrl_base + 0x03cc, 0x01);
- wmb();
- usleep(100);
-
- /* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07e);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06e);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x06c);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x064);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x065);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x075);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x077);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x07f);
- wmb();
- } else {
- if (left_ctrl &&
+ if (left_ctrl &&
(ctrl->panel_data.panel_info.pdest
- == DISPLAY_1))
- return;
-
- if (left_ctrl &&
- (ctrl->panel_data.panel_info.pdest
- == DISPLAY_2)) {
- MIPI_OUTP(left_ctrl->ctrl_base + 0x0220, 0x006);
- MIPI_OUTP(left_ctrl->ctrl_base + 0x0470, 0x000);
- MIPI_OUTP(left_ctrl->ctrl_base + 0x0598, 0x000);
- }
- MIPI_OUTP(ctrl->ctrl_base + 0x0220, 0x006);
- MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x000);
- MIPI_OUTP(ctrl->ctrl_base + 0x0598, 0x000);
- wmb();
+ ==
+ DISPLAY_2)) {
+ MIPI_OUTP(left_ctrl->ctrl_base + 0x0470,
+ 0x000);
+ MIPI_OUTP(left_ctrl->ctrl_base + 0x0598,
+ 0x000);
}
+
+ MIPI_OUTP(ctrl->ctrl_base + 0x0470, 0x000);
+ MIPI_OUTP(ctrl->ctrl_base + 0x0598, 0x000);
+
+ /*
+ * Wait for the registers writes to complete in order to
+ * ensure that the phy is completely disabled
+ */
+ wmb();
}
void mdss_dsi_phy_init(struct mdss_panel_data *pdata)
@@ -675,6 +698,8 @@
clk_put(edp_drv->ahb_clk);
if (edp_drv->link_clk)
clk_put(edp_drv->link_clk);
+ if (edp_drv->mdp_core_clk)
+ clk_put(edp_drv->mdp_core_clk);
}
int mdss_edp_clk_init(struct mdss_edp_drv_pdata *edp_drv)
@@ -709,6 +734,14 @@
goto mdss_edp_clk_err;
}
+ /* need mdss clock to receive irq */
+ edp_drv->mdp_core_clk = clk_get(dev, "mdp_core_clk");
+ if (IS_ERR(edp_drv->mdp_core_clk)) {
+ pr_err("%s: Can't find mdp_core_clk", __func__);
+ edp_drv->mdp_core_clk = NULL;
+ goto mdss_edp_clk_err;
+ }
+
return 0;
mdss_edp_clk_err:
@@ -736,7 +769,16 @@
goto c1;
}
+ /* need mdss clock to receive irq */
+ ret = clk_enable(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to enable mdp_core_clk\n", __func__);
+ goto c0;
+ }
+
return 0;
+c0:
+ clk_disable(edp_drv->ahb_clk);
c1:
clk_disable(edp_drv->aux_clk);
c2:
@@ -748,6 +790,7 @@
{
clk_disable(edp_drv->aux_clk);
clk_disable(edp_drv->ahb_clk);
+ clk_disable(edp_drv->mdp_core_clk);
}
int mdss_edp_clk_enable(struct mdss_edp_drv_pdata *edp_drv)
@@ -791,11 +834,18 @@
pr_err("%s: Failed to enable link clk\n", __func__);
goto c1;
}
+ ret = clk_enable(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to enable mdp_core_clk\n", __func__);
+ goto c0;
+ }
edp_drv->clk_on = 1;
return 0;
+c0:
+ clk_disable(edp_drv->link_clk);
c1:
clk_disable(edp_drv->ahb_clk);
c2:
@@ -817,6 +867,7 @@
clk_disable(edp_drv->pixel_clk);
clk_disable(edp_drv->ahb_clk);
clk_disable(edp_drv->link_clk);
+ clk_disable(edp_drv->mdp_core_clk);
edp_drv->clk_on = 0;
}
@@ -825,10 +876,11 @@
{
int ret;
+ /* ahb clock should be prepared first */
ret = clk_prepare(edp_drv->ahb_clk);
if (ret) {
pr_err("%s: Failed to prepare ahb clk\n", __func__);
- goto c1;
+ goto c3;
}
ret = clk_prepare(edp_drv->aux_clk);
if (ret) {
@@ -836,16 +888,26 @@
goto c2;
}
+ /* need mdss clock to receive irq */
+ ret = clk_prepare(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to prepare mdp_core clk\n", __func__);
+ goto c1;
+ }
+
return 0;
c1:
- clk_unprepare(edp_drv->ahb_clk);
+ clk_unprepare(edp_drv->aux_clk);
c2:
+ clk_unprepare(edp_drv->ahb_clk);
+c3:
return ret;
}
void mdss_edp_unprepare_aux_clocks(struct mdss_edp_drv_pdata *edp_drv)
{
+ clk_unprepare(edp_drv->mdp_core_clk);
clk_unprepare(edp_drv->aux_clk);
clk_unprepare(edp_drv->ahb_clk);
}
@@ -854,7 +916,7 @@
{
int ret;
- /* ahb clock should be first one to enable */
+ /* ahb clock should be prepared first */
ret = clk_prepare(edp_drv->ahb_clk);
if (ret) {
pr_err("%s: Failed to prepare ahb clk\n", __func__);
@@ -875,8 +937,15 @@
pr_err("%s: Failed to prepare link clk\n", __func__);
goto c1;
}
+ ret = clk_prepare(edp_drv->mdp_core_clk);
+ if (ret) {
+ pr_err("%s: Failed to prepare mdp_core clk\n", __func__);
+ goto c0;
+ }
return 0;
+c0:
+ clk_unprepare(edp_drv->link_clk);
c1:
clk_unprepare(edp_drv->pixel_clk);
c2:
@@ -889,6 +958,7 @@
void mdss_edp_unprepare_clocks(struct mdss_edp_drv_pdata *edp_drv)
{
+ clk_unprepare(edp_drv->mdp_core_clk);
clk_unprepare(edp_drv->aux_clk);
clk_unprepare(edp_drv->pixel_clk);
clk_unprepare(edp_drv->link_clk);
diff --git a/drivers/video/msm/vidc/common/dec/vdec.c b/drivers/video/msm/vidc/common/dec/vdec.c
old mode 100644
new mode 100755
index ec27b00..276a48f
--- a/drivers/video/msm/vidc/common/dec/vdec.c
+++ b/drivers/video/msm/vidc/common/dec/vdec.c
@@ -42,7 +42,9 @@
#define ERR(x...) pr_err(x)
#define VID_DEC_NAME "msm_vidc_dec"
-
+#ifdef KW_TAINT_ANALYSIS 51
+ extern void * get_tainted_stuff();
+#endif
static char *node_name[2] = {"", "_sec"};
static struct vid_dec_dev *vid_dec_device_p;
static dev_t vid_dec_dev_num;
@@ -1736,7 +1738,11 @@
unsigned long kernel_vaddr, phy_addr, len;
unsigned long ker_vaddr;
u32 result = true;
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *arg = (void __user *) get_tainted_stuff();
+ #else
void __user *arg = (void __user *)u_arg;
+ #endif
int rc = 0;
size_t ion_len;
diff --git a/drivers/video/msm/vidc/common/enc/venc.c b/drivers/video/msm/vidc/common/enc/venc.c
old mode 100644
new mode 100755
index 823626a..ee9c48b
--- a/drivers/video/msm/vidc/common/enc/venc.c
+++ b/drivers/video/msm/vidc/common/enc/venc.c
@@ -45,7 +45,9 @@
#define INFO(x...) printk(KERN_INFO x)
#define ERR(x...) printk(KERN_ERR x)
-
+#ifdef KW_TAINT_ANALYSIS
+ extern void * get_tainted_stuff();
+#endif
static struct vid_enc_dev *vid_enc_device_p;
static dev_t vid_enc_dev_num;
static struct class *vid_enc_class;
@@ -840,7 +842,11 @@
{
struct video_client_ctx *client_ctx = NULL;
struct venc_ioctl_msg venc_msg;
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *arg = (void __user *)get_tainted_stuff();;
+ #else
void __user *arg = (void __user *)u_arg;
+ #endif
u32 result = true;
int result_read = -1;
diff --git a/fs/fat/cache.c b/fs/fat/cache.c
index 1cc7038..bab81ca 100644
--- a/fs/fat/cache.c
+++ b/fs/fat/cache.c
@@ -294,8 +294,9 @@
if (ret < 0)
return ret;
else if (ret == FAT_ENT_EOF) {
- fat_fs_error(sb, "%s: request beyond EOF (i_pos %lld)",
- __func__, MSDOS_I(inode)->i_pos);
+ fat_fs_error_ratelimit(sb,
+ "%s: request beyond EOF (i_pos %lld)",
+ __func__, MSDOS_I(inode)->i_pos);
return -EIO;
}
return dclus;
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 4640d3b..6d18d0f 100755
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -146,6 +146,7 @@
header-y += genetlink.h
header-y += gfs2_ondisk.h
header-y += gigaset_dev.h
+header-y += hbtp_input.h
header-y += hdlc.h
header-y += hdlcdrv.h
header-y += hdreg.h
diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
index 130d0fd..ac750ea 100644
--- a/include/linux/blk_types.h
+++ b/include/linux/blk_types.h
@@ -176,6 +176,8 @@
REQ_SANITIZE)
#define REQ_CLONE_MASK REQ_COMMON_MASK
+#define MMC_REQ_NOREINSERT_MASK (REQ_URGENT | REQ_FUA | REQ_FLUSH)
+
#define REQ_RAHEAD (1 << __REQ_RAHEAD)
#define REQ_THROTTLED (1 << __REQ_THROTTLED)
diff --git a/include/linux/diagchar.h b/include/linux/diagchar.h
index d525e84..f78d418 100644
--- a/include/linux/diagchar.h
+++ b/include/linux/diagchar.h
@@ -119,10 +119,10 @@
/* This needs to be modified manually now, when we add
a new RANGE of SSIDs to the msg_mask_tbl */
#define MSG_MASK_TBL_CNT 24
-#define EVENT_LAST_ID 0x09CB
+#define EVENT_LAST_ID 0x09F6
#define MSG_SSID_0 0
-#define MSG_SSID_0_LAST 97
+#define MSG_SSID_0_LAST 101
#define MSG_SSID_1 500
#define MSG_SSID_1_LAST 506
#define MSG_SSID_2 1000
@@ -138,7 +138,7 @@
#define MSG_SSID_7 4600
#define MSG_SSID_7_LAST 4614
#define MSG_SSID_8 5000
-#define MSG_SSID_8_LAST 5030
+#define MSG_SSID_8_LAST 5031
#define MSG_SSID_9 5500
#define MSG_SSID_9_LAST 5516
#define MSG_SSID_10 6000
@@ -154,7 +154,7 @@
#define MSG_SSID_15 8000
#define MSG_SSID_15_LAST 8000
#define MSG_SSID_16 8500
-#define MSG_SSID_16_LAST 8523
+#define MSG_SSID_16_LAST 8524
#define MSG_SSID_17 9000
#define MSG_SSID_17_LAST 9008
#define MSG_SSID_18 9500
@@ -166,7 +166,7 @@
#define MSG_SSID_21 10300
#define MSG_SSID_21_LAST 10300
#define MSG_SSID_22 10350
-#define MSG_SSID_22_LAST 10374
+#define MSG_SSID_22_LAST 10377
#define MSG_SSID_23 0xC000
#define MSG_SSID_23_LAST 0xC063
@@ -182,6 +182,7 @@
MSG_LVL_LOW,
MSG_LVL_ERROR,
MSG_LVL_LOW,
+ MSG_LVL_LOW,
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_HIGH,
@@ -280,7 +281,7 @@
MSG_LVL_LOW,
MSG_LVL_LOW,
MSG_LVL_LOW|MSG_LVL_MED|MSG_LVL_HIGH|MSG_LVL_ERROR|MSG_LVL_FATAL,
- MSG_LVL_MED,
+ MSG_LVL_LOW,
MSG_LVL_LOW|MSG_LVL_MED|MSG_LVL_HIGH|MSG_LVL_ERROR|MSG_LVL_FATAL,
MSG_LVL_LOW,
MSG_LVL_MED,
@@ -292,6 +293,10 @@
MSG_LVL_LOW,
MSG_LVL_LOW|MSG_LVL_MED|MSG_LVL_HIGH|MSG_LVL_ERROR|MSG_LVL_FATAL,
MSG_LVL_MED,
+ MSG_LVL_HIGH,
+ MSG_LVL_LOW,
+ MSG_LVL_HIGH,
+ MSG_LVL_HIGH
};
static const uint32_t msg_bld_masks_1[] = {
@@ -321,7 +326,8 @@
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_MED,
- MSG_LVL_MED,
+ MSG_LVL_MED|MSG_MASK_5|MSG_MASK_6|MSG_MASK_7|
+ MSG_MASK_8|MSG_MASK_9|MSG_MASK_10,
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_MED
@@ -439,6 +445,7 @@
MSG_LVL_MED,
MSG_LVL_MED,
MSG_LVL_MED,
+ MSG_LVL_MED,
MSG_LVL_MED
};
@@ -632,6 +639,7 @@
MSG_LVL_LOW,
MSG_LVL_LOW,
MSG_LVL_LOW,
+ MSG_LVL_LOW,
};
static const uint32_t msg_bld_masks_17[] = {
@@ -722,13 +730,16 @@
MSG_LVL_LOW,
MSG_LVL_LOW,
MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
+ MSG_LVL_LOW,
MSG_LVL_LOW
};
/* LOG CODES */
static const uint32_t log_code_last_tbl[] = {
0x0, /* EQUIP ID 0 */
- 0x182F, /* EQUIP ID 1 */
+ 0x184A, /* EQUIP ID 1 */
0x0, /* EQUIP ID 2 */
0x0, /* EQUIP ID 3 */
0x4910, /* EQUIP ID 4 */
diff --git a/include/linux/hbtp_input.h b/include/linux/hbtp_input.h
new file mode 100644
index 0000000..2c3798e
--- /dev/null
+++ b/include/linux/hbtp_input.h
@@ -0,0 +1,46 @@
+#ifndef _HBTP_INPUT_H
+#define _HBTP_INPUT_H
+
+#include <linux/input.h>
+
+#define HBTP_MAX_FINGER 10
+
+struct hbtp_input_touch {
+ bool active;
+ __s32 tool;
+ __s32 x;
+ __s32 y;
+ __s32 pressure;
+ __s32 major;
+ __s32 minor;
+ __s32 orientation;
+};
+
+struct hbtp_input_mt {
+ __s32 num_touches;
+ struct hbtp_input_touch touches[HBTP_MAX_FINGER];
+};
+
+struct hbtp_input_absinfo {
+ bool active;
+ __u16 code;
+ __s32 minimum;
+ __s32 maximum;
+};
+
+enum hbtp_afe_power_cmd {
+ HBTP_AFE_POWER_ON,
+ HBTP_AFE_POWER_OFF,
+};
+
+/* ioctl */
+#define HBTP_INPUT_IOCTL_BASE 'T'
+#define HBTP_SET_ABSPARAM _IOW(HBTP_INPUT_IOCTL_BASE, 201, \
+ struct hbtp_input_absinfo *)
+#define HBTP_SET_TOUCHDATA _IOW(HBTP_INPUT_IOCTL_BASE, 202, \
+ struct hbtp_input_mt)
+#define HBTP_SET_POWERSTATE _IOW(HBTP_INPUT_IOCTL_BASE, 203, \
+ enum hbtp_afe_power_cmd)
+
+#endif /* _HBTP_INPUT_H */
+
diff --git a/arch/arm/boot/dts/msm8926-qrd-skug.dts b/include/linux/i2c/i2c-qup.h
similarity index 62%
copy from arch/arm/boot/dts/msm8926-qrd-skug.dts
copy to include/linux/i2c/i2c-qup.h
index 4aab4f9..a950864 100644
--- a/arch/arm/boot/dts/msm8926-qrd-skug.dts
+++ b/include/linux/i2c/i2c-qup.h
@@ -1,4 +1,5 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/*
+ * Copyright (c) 2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,12 +11,13 @@
* GNU General Public License for more details.
*/
-/dts-v1/;
-/include/ "msm8926-qrd-skug.dtsi"
+#ifndef __I2C_QUP_H__
+#define __I2C_QUP_H__
-/ {
- model = "Qualcomm MSM 8926 QRD SKUG";
- compatible = "qcom,msm8926-qrd", "qcom,msm8926", "qcom,qrd";
- qcom,board-id = <11 5>;
-};
+#ifdef CONFIG_I2C_QUP
+int __init qup_i2c_init_driver(void);
+#else
+static inline int __init qup_i2c_init_driver(void) { return 0; }
+#endif
+#endif /* __I2C_QUP_H__ */
diff --git a/include/linux/input.h b/include/linux/input.h
index 558178b..77fc253 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -850,6 +850,7 @@
#define SW_HPHL_OVERCURRENT 0x0e /* set = over current on left hph */
#define SW_HPHR_OVERCURRENT 0x0f /* set = over current on right hph */
#define SW_UNSUPPORT_INSERT 0x10 /* set = unsupported device inserted */
+#define SW_MICROPHONE2_INSERT 0x11 /* set = inserted */
#define SW_MAX 0x20
#define SW_CNT (SW_MAX+1)
diff --git a/include/linux/mfd/wcd9xxx/core-resource.h b/include/linux/mfd/wcd9xxx/core-resource.h
index 442496e..b45cf6a 100644
--- a/include/linux/mfd/wcd9xxx/core-resource.h
+++ b/include/linux/mfd/wcd9xxx/core-resource.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -67,6 +67,8 @@
unsigned short, u8);
int (*codec_bulk_read) (struct wcd9xxx_core_resource *,
unsigned short, int, u8 *);
+ int (*codec_bulk_write) (struct wcd9xxx_core_resource *,
+ unsigned short, int, u8 *);
/* Pointer to parent container data structure */
void *parent;
@@ -80,6 +82,8 @@
int (*codec_read)(struct wcd9xxx_core_resource *, unsigned short),
int (*codec_write)(struct wcd9xxx_core_resource *, unsigned short, u8),
int (*codec_bulk_read) (struct wcd9xxx_core_resource *, unsigned short,
+ int, u8 *),
+ int (*codec_bulk_write) (struct wcd9xxx_core_resource *, unsigned short,
int, u8 *));
extern void wcd9xxx_core_res_deinit(
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 1740576..272fe77 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -355,6 +355,7 @@
/* Skip data-timeout advertised by card */
#define MMC_QUIRK_BROKEN_DATA_TIMEOUT (1<<12)
+#define MMC_QUIRK_CACHE_DISABLE (1 << 14) /* prevent cache enable */
unsigned int erase_size; /* erase size in sectors */
unsigned int erase_shift; /* if erase unit is power 2 */
diff --git a/include/linux/msm_hdmi.h b/include/linux/msm_hdmi.h
new file mode 100644
index 0000000..70fae94
--- /dev/null
+++ b/include/linux/msm_hdmi.h
@@ -0,0 +1,57 @@
+/* include/linux/msm_hdmi.h
+ *
+ * Copyright (c) 2014 The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef _MSM_HDMI_H_
+#define _MSM_HDMI_H_
+
+/*
+ * HDMI cable notify handler sturcture.
+ * link A link for the linked list
+ * status Current status of HDMI cable connection
+ * hpd_notify Callback function to provide cable status
+ */
+struct hdmi_cable_notify {
+ struct list_head link;
+ int status;
+ void (*hpd_notify) (struct hdmi_cable_notify *h);
+};
+
+#ifdef CONFIG_FB_MSM_MDSS_HDMI_PANEL
+/*
+ * Register for HDMI cable connect or disconnect notification.
+ * @param handler callback handler for notification
+ * @return negative value as error otherwise current status of cable
+ */
+int register_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler);
+
+/*
+ * Un-register for HDMI cable connect or disconnect notification.
+ * @param handler callback handler for notification
+ * @return negative value as error
+ */
+int unregister_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler);
+#else
+int register_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler) {
+ return 0;
+}
+
+int unregister_hdmi_cable_notification(
+ struct hdmi_cable_notify *handler) {
+ return 0;
+}
+#endif /* CONFIG_FB_MSM_MDSS_HDMI_PANEL */
+
+#endif /*_MSM_HDMI_H_*/
diff --git a/include/linux/msm_kgsl.h b/include/linux/msm_kgsl.h
index f74fcbe..17986b5 100644
--- a/include/linux/msm_kgsl.h
+++ b/include/linux/msm_kgsl.h
@@ -24,6 +24,7 @@
#define KGSL_CONTEXT_NO_FAULT_TOLERANCE 0x00000200
#define KGSL_CONTEXT_SYNC 0x00000400
+#define KGSL_CONTEXT_PWR_CONSTRAINT 0x00000800
/* bits [12:15] are reserved for future use */
#define KGSL_CONTEXT_TYPE_MASK 0x01F00000
#define KGSL_CONTEXT_TYPE_SHIFT 20
@@ -197,6 +198,7 @@
KGSL_PROP_VERSION = 0x00000008,
KGSL_PROP_GPU_RESET_STAT = 0x00000009,
KGSL_PROP_PWRCTRL = 0x0000000E,
+ KGSL_PROP_PWR_CONSTRAINT = 0x00000012,
};
struct kgsl_shadowprop {
@@ -882,6 +884,34 @@
#define IOCTL_KGSL_SUBMIT_COMMANDS \
_IOWR(KGSL_IOC_TYPE, 0x3D, struct kgsl_submit_commands)
+/**
+ * struct kgsl_device_constraint - device constraint argument
+ * @context_id: KGSL context ID
+ * @type: type of constraint i.e pwrlevel/none
+ * @data: constraint data
+ * @size: size of the constraint data
+ */
+struct kgsl_device_constraint {
+ unsigned int type;
+ unsigned int context_id;
+ void __user *data;
+ size_t size;
+};
+
+/* Constraint Type*/
+#define KGSL_CONSTRAINT_NONE 0
+#define KGSL_CONSTRAINT_PWRLEVEL 1
+
+/* PWRLEVEL constraint level*/
+/* set to min frequency */
+#define KGSL_CONSTRAINT_PWR_MIN 0
+/* set to max frequency */
+#define KGSL_CONSTRAINT_PWR_MAX 1
+
+struct kgsl_device_constraint_pwrlevel {
+ unsigned int level;
+};
+
#ifdef __KERNEL__
#ifdef CONFIG_MSM_KGSL_DRM
int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start,
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index b7f9b86..e332368 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -1,7 +1,7 @@
/* include/linux/msm_mdp.h
*
* Copyright (C) 2007 Google Incorporated
- * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -79,7 +79,8 @@
#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \
unsigned int)
#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
-
+#define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169, \
+ struct mdp_overlay_list)
#define FB_TYPE_3D_PANEL 0x10101010
#define MDP_IMGTYPE2_START 0x10000
#define MSMFB_DRIVER_VERSION 0xF9E8D701
@@ -811,6 +812,7 @@
#define MDSS_MAX_BL_BRIGHTNESS 255
#define AD_BL_LIN_LEN 256
+#define AD_BL_ATT_LUT_LEN 33
#define MDSS_AD_MODE_AUTO_BL 0x0
#define MDSS_AD_MODE_AUTO_STR 0x1
@@ -839,9 +841,13 @@
uint16_t frame_h;
uint8_t logo_v;
uint8_t logo_h;
+ uint32_t alpha;
+ uint32_t alpha_base;
uint32_t bl_lin_len;
+ uint32_t bl_att_len;
uint32_t *bl_lin;
uint32_t *bl_lin_inv;
+ uint32_t *bl_att_lut;
};
#define MDSS_AD_BL_CTRL_MODE_EN 1
@@ -965,6 +971,8 @@
uint8_t rgb_pipes;
uint8_t vig_pipes;
uint8_t dma_pipes;
+ uint8_t max_smp_cnt;
+ uint8_t smp_per_pipe;
uint32_t features;
};
@@ -984,6 +992,7 @@
#define MDP_MAX_FENCE_FD 32
#define MDP_BUF_SYNC_FLAG_WAIT 1
+#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
struct mdp_buf_sync {
uint32_t flags;
@@ -991,6 +1000,7 @@
uint32_t session_id;
int *acq_fen_fd;
int *rel_fen_fd;
+ int *retire_fen_fd;
};
struct mdp_async_blit_req_list {
@@ -1000,22 +1010,32 @@
};
#define MDP_DISPLAY_COMMIT_OVERLAY 1
-struct mdp_buf_fence {
- uint32_t flags;
- uint32_t acq_fen_fd_cnt;
- int acq_fen_fd[MDP_MAX_FENCE_FD];
- int rel_fen_fd[MDP_MAX_FENCE_FD];
-};
-
struct mdp_display_commit {
uint32_t flags;
uint32_t wait_for_finish;
struct fb_var_screeninfo var;
- struct mdp_buf_fence buf_fence;
struct mdp_rect roi;
};
+/**
+* struct mdp_overlay_list - argument for ioctl MSMFB_OVERLAY_PREPARE
+* @num_overlays: Number of overlay layers as part of the frame.
+* @overlay_list: Pointer to a list of overlay structures identifying
+* the layers as part of the frame
+* @flags: Flags can be used to extend behavior.
+* @processed_overlays: Output parameter indicating how many pipes were
+* successful. If there are no errors this number should
+* match num_overlays. Otherwise it will indicate the last
+* successful index for overlay that couldn't be set.
+*/
+struct mdp_overlay_list {
+ uint32_t num_overlays;
+ struct mdp_overlay **overlay_list;
+ uint32_t flags;
+ uint32_t processed_overlays;
+};
+
struct mdp_page_protection {
uint32_t page_protection;
};
@@ -1069,6 +1089,7 @@
int msm_fb_writeback_stop(struct fb_info *info);
int msm_fb_writeback_terminate(struct fb_info *info);
int msm_fb_writeback_set_secure(struct fb_info *info, int enable);
+int msm_fb_writeback_iommu_ref(struct fb_info *info, int enable);
#endif
#endif /*_MSM_MDP_H_*/
diff --git a/include/linux/msm_vidc_enc.h b/include/linux/msm_vidc_enc.h
index dcc2353..4ce3db1 100644
--- a/include/linux/msm_vidc_enc.h
+++ b/include/linux/msm_vidc_enc.h
@@ -59,6 +59,7 @@
#define VEN_EXTRADATA_QCOMFILLER 0x002
#define VEN_EXTRADATA_SLICEINFO 0x100
#define VEN_EXTRADATA_LTRINFO 0x200
+#define VEN_EXTRADATA_MBINFO 0x400
/*ENCODER CONFIGURATION CONSTANTS*/
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index 6a68b72..d797797 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -615,6 +615,28 @@
* @NL80211_CMD_CRIT_PROTOCOL_STOP: Indicates the connection reliability can
* return back to normal.
*
+ * @NL80211_CMD_GET_COALESCE: Get currently supported coalesce rules.
+ * @NL80211_CMD_SET_COALESCE: Configure coalesce rules or clear existing rules.
+ *
+ * @NL80211_CMD_CHANNEL_SWITCH: Perform a channel switch by announcing the
+ * the new channel information (Channel Switch Announcement - CSA)
+ * in the beacon for some time (as defined in the
+ * %NL80211_ATTR_CH_SWITCH_COUNT parameter) and then change to the
+ * new channel. Userspace provides the new channel information (using
+ * %NL80211_ATTR_WIPHY_FREQ and the attributes determining channel
+ * width). %NL80211_ATTR_CH_SWITCH_BLOCK_TX may be supplied to inform
+ * other station that transmission must be blocked until the channel
+ * switch is complete.
+ *
+ * @NL80211_CMD_VENDOR: Vendor-specified command/event. The command is specified
+ * by the %NL80211_ATTR_VENDOR_ID attribute and a sub-command in
+ * %NL80211_ATTR_VENDOR_SUBCMD. Parameter(s) can be transported in
+ * %NL80211_ATTR_VENDOR_DATA.
+ * For feature advertisement, the %NL80211_ATTR_VENDOR_DATA attribute is
+ * used in the wiphy data as a nested attribute containing descriptions
+ * (&struct nl80211_vendor_cmd_info) of the supported vendor commands.
+ * This may also be sent as an event with the same attributes.
+ *
* @NL80211_CMD_MAX: highest used command number
* @__NL80211_CMD_AFTER_LAST: internal use
*/
@@ -778,6 +800,13 @@
NL80211_CMD_CRIT_PROTOCOL_START,
NL80211_CMD_CRIT_PROTOCOL_STOP,
+ NL80211_CMD_GET_COALESCE,
+ NL80211_CMD_SET_COALESCE,
+
+ NL80211_CMD_CHANNEL_SWITCH,
+
+ NL80211_CMD_VENDOR,
+
/* add new commands above here */
/* used to define NL80211_CMD_MAX below */
@@ -1380,6 +1409,43 @@
* allowed to be used with the first @NL80211_CMD_SET_STATION command to
* update a TDLS peer STA entry.
*
+ * @NL80211_ATTR_COALESCE_RULE: Coalesce rule information.
+ *
+ * @NL80211_ATTR_CH_SWITCH_COUNT: u32 attribute specifying the number of TBTT's
+ * until the channel switch event.
+ * @NL80211_ATTR_CH_SWITCH_BLOCK_TX: flag attribute specifying that transmission
+ * must be blocked on the current channel (before the channel switch
+ * operation).
+ * @NL80211_ATTR_CSA_IES: Nested set of attributes containing the IE information
+ * for the time while performing a channel switch.
+ * @NL80211_ATTR_CSA_C_OFF_BEACON: Offset of the channel switch counter
+ * field in the beacons tail (%NL80211_ATTR_BEACON_TAIL).
+ * @NL80211_ATTR_CSA_C_OFF_PRESP: Offset of the channel switch counter
+ * field in the probe response (%NL80211_ATTR_PROBE_RESP).
+ *
+ * @NL80211_ATTR_RXMGMT_FLAGS: flags for nl80211_send_mgmt(), u32.
+ * As specified in the &enum nl80211_rxmgmt_flags.
+ *
+ * @NL80211_ATTR_STA_SUPPORTED_CHANNELS: array of supported channels.
+ *
+ * @NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES: array of supported
+ * supported operating classes.
+ *
+ * @NL80211_ATTR_HANDLE_DFS: A flag indicating whether user space
+ * controls DFS operation in IBSS mode. If the flag is included in
+ * %NL80211_CMD_JOIN_IBSS request, the driver will allow use of DFS
+ * channels and reports radar events to userspace. Userspace is required
+ * to react to radar events, e.g. initiate a channel switch or leave the
+ * IBSS network.
+ *
+ * @NL80211_ATTR_VENDOR_ID: The vendor ID, either a 24-bit OUI or, if
+ * %NL80211_VENDOR_ID_IS_LINUX is set, a special Linux ID (not used yet)
+ * @NL80211_ATTR_VENDOR_SUBCMD: vendor sub-command
+ * @NL80211_ATTR_VENDOR_DATA: data for the vendor command, if any; this
+ * attribute is also used for vendor command feature advertisement
+ * @NL80211_ATTR_VENDOR_EVENTS: used for event list advertising in the wiphy
+ * info, containing a nested array of possible events
+ *
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
*/
@@ -1680,6 +1746,33 @@
NL80211_ATTR_PEER_AID,
+ NL80211_ATTR_COALESCE_RULE,
+
+ NL80211_ATTR_CH_SWITCH_COUNT,
+ NL80211_ATTR_CH_SWITCH_BLOCK_TX,
+ NL80211_ATTR_CSA_IES,
+ NL80211_ATTR_CSA_C_OFF_BEACON,
+ NL80211_ATTR_CSA_C_OFF_PRESP,
+
+ NL80211_ATTR_RXMGMT_FLAGS,
+
+ NL80211_ATTR_STA_SUPPORTED_CHANNELS,
+
+ NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES,
+
+ NL80211_ATTR_HANDLE_DFS,
+
+ NL80211_ATTR_SUPPORT_5_MHZ,
+ NL80211_ATTR_SUPPORT_10_MHZ,
+
+ NL80211_ATTR_OPMODE_NOTIF,
+
+ NL80211_ATTR_VENDOR_ID,
+ NL80211_ATTR_VENDOR_SUBCMD,
+ NL80211_ATTR_VENDOR_DATA,
+
+ NL80211_ATTR_VENDOR_EVENTS,
+
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
@@ -3143,4 +3236,24 @@
/* maximum duration for critical protocol measures */
#define NL80211_CRIT_PROTO_MAX_DURATION 5000 /* msec */
+/*
+ * If this flag is unset, the lower 24 bits are an OUI, if set
+ * a Linux nl80211 vendor ID is used (no such IDs are allocated
+ * yet, so that's not valid so far)
+ */
+#define NL80211_VENDOR_ID_IS_LINUX 0x80000000
+
+/**
+ * struct nl80211_vendor_cmd_info - vendor command data
+ * @vendor_id: If the %NL80211_VENDOR_ID_IS_LINUX flag is clear, then the
+ * value is a 24-bit OUI; if it is set then a separately allocated ID
+ * may be used, but no such IDs are allocated yet. New IDs should be
+ * added to this file when needed.
+ * @subcmd: sub-command ID for the command
+ */
+struct nl80211_vendor_cmd_info {
+ __u32 vendor_id;
+ __u32 subcmd;
+};
+
#endif /* __LINUX_NL80211_H */
diff --git a/include/linux/qpnp/qpnp-adc.h b/include/linux/qpnp/qpnp-adc.h
index e6dcc3b..13eb461 100644
--- a/include/linux/qpnp/qpnp-adc.h
+++ b/include/linux/qpnp/qpnp-adc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -190,6 +190,7 @@
* %CHAN_PATH_SCALING2: ratio of {1, 4}
* %CHAN_PATH_SCALING3: ratio of {1, 6}
* %CHAN_PATH_SCALING4: ratio of {1, 20}
+ * %CHAN_PATH_SCALING5: ratio of {1, 8}
* %CHAN_PATH_NONE: Do not use this pre-scaling ratio type.
*
* The pre-scaling is applied for signals to be within the voltage range
@@ -201,6 +202,7 @@
PATH_SCALING2,
PATH_SCALING3,
PATH_SCALING4,
+ PATH_SCALING5,
PATH_SCALING_NONE,
};
@@ -572,12 +574,10 @@
/**
* enum qpnp_adc_meas_timer_select - Selects the timer for which
* the appropriate polling frequency is set.
- * %ADC_MEAS_TIMER_SELECT1 - Select this timer if the client is USB_ID.
- * %ADC_MEAS_TIMER_SELECT2 - Select this timer if the client is batt_therm.
- * %ADC_MEAS_TIMER_SELECT3 - The timer is added only for completion. It is
- * not used by kernel space clients and user space clients cannot set
- * the polling frequency. The driver will set a appropriate polling
- * frequency to measure the user space clients from qpnp_adc_meas_timer_3.
+ * %ADC_MEAS_TIMER_SELECT1 - Select this timer for measurement polling interval
+ * for 1 second.
+ * %ADC_MEAS_TIMER_SELECT2 - Select this timer for 500ms measurement interval.
+ * %ADC_MEAS_TIMER_SELECT3 - Select this timer for 5 second interval.
*/
enum qpnp_adc_meas_timer_select {
ADC_MEAS_TIMER_SELECT1 = 0,
@@ -893,7 +893,8 @@
{1, 3},
{1, 4},
{1, 6},
- {1, 20}
+ {1, 20},
+ {1, 8}
};
/**
diff --git a/include/linux/qrng.h b/include/linux/qrng.h
index 35708e3..8c09627 100644
--- a/include/linux/qrng.h
+++ b/include/linux/qrng.h
@@ -1,5 +1,5 @@
-#ifndef __QRNG_H_
-#define __QRNG_H_
+#ifndef _QRNG_H_
+#define _QRNG_H_
#include <linux/types.h>
#include <linux/ioctl.h>
@@ -9,4 +9,4 @@
#define QRNG_IOCTL_RESET_BUS_BANDWIDTH\
_IO(QRNG_IOC_MAGIC, 1)
-#endif /* __QRNG_H_ */
+#endif /* _QRNG_H_ */
diff --git a/include/linux/regulator/cpr-regulator.h b/include/linux/regulator/cpr-regulator.h
index 3b23d17..9d06a8c 100644
--- a/include/linux/regulator/cpr-regulator.h
+++ b/include/linux/regulator/cpr-regulator.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -18,9 +18,6 @@
#define CPR_REGULATOR_DRIVER_NAME "qcom,cpr-regulator"
-#define CPR_PVS_EFUSE_BITS_MAX 5
-#define CPR_PVS_EFUSE_BINS_MAX (1 << CPR_PVS_EFUSE_BITS_MAX)
-
/**
* enum cpr_fuse_corner_enum - CPR fuse corner enum values
* %CPR_FUSE_CORNER_SVS: Lowest voltage for APC
@@ -70,33 +67,21 @@
};
/**
- * enum pvs_process_enum - PVS process enum values
- * %APC_PVS_NO: No PVS
- * %APC_PVS_SLOW: Slow PVS process
- * %APC_PVS_NOM: Nominal PVS process
- * %APC_PVS_FAST: Fast PVS process
- */
-enum apc_pvs_process_enum {
- APC_PVS_NO,
- APC_PVS_SLOW,
- APC_PVS_NOM,
- APC_PVS_FAST,
- NUM_APC_PVS,
-};
-
-/**
* enum vdd_mx_vmin_method - Method to determine vmin for vdd-mx
* %VDD_MX_VMIN_APC: Equal to APC voltage
* %VDD_MX_VMIN_APC_CORNER_CEILING: Equal to PVS corner ceiling voltage
* %VDD_MX_VMIN_APC_SLOW_CORNER_CEILING:
* Equal to slow speed corner ceiling
* %VDD_MX_VMIN_MX_VMAX: Equal to specified vdd-mx-vmax voltage
+ * %VDD_MX_VMIN_APC_CORNER_MAP: Equal to the APC corner mapped MX
+ * voltage
*/
enum vdd_mx_vmin_method {
VDD_MX_VMIN_APC,
VDD_MX_VMIN_APC_CORNER_CEILING,
VDD_MX_VMIN_APC_SLOW_CORNER_CEILING,
VDD_MX_VMIN_MX_VMAX,
+ VDD_MX_VMIN_APC_CORNER_MAP,
};
#ifdef CONFIG_MSM_CPR_REGULATOR
diff --git a/include/linux/regulator/fan53555.h b/include/linux/regulator/fan53555.h
new file mode 100644
index 0000000..bb22419
--- /dev/null
+++ b/include/linux/regulator/fan53555.h
@@ -0,0 +1,66 @@
+/*
+ * fan53555.h - Fairchild Regulator FAN53555 Driver
+ *
+ * Copyright (C) 2012 Marvell Technology Ltd.
+ * Yunfan Zhang <yfzhang@marvell.com>
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __FAN53555_H__
+
+/* VSEL ID */
+enum {
+ FAN53555_VSEL_ID_0 = 0,
+ FAN53555_VSEL_ID_1,
+};
+
+/* Transition slew rate limiting from a low to high voltage.
+ * -----------------------
+ * Bin |Slew Rate(mV/uS)
+ * ------|----------------
+ * 000 | 64.00
+ * ------|----------------
+ * 001 | 32.00
+ * ------|----------------
+ * 010 | 16.00
+ * ------|----------------
+ * 011 | 8.00
+ * ------|----------------
+ * 100 | 4.00
+ * ------|----------------
+ * 101 | 2.00
+ * ------|----------------
+ * 110 | 1.00
+ * ------|----------------
+ * 111 | 0.50
+ * -----------------------
+ */
+enum {
+ FAN53555_SLEW_RATE_64MV = 0,
+ FAN53555_SLEW_RATE_32MV,
+ FAN53555_SLEW_RATE_16MV,
+ FAN53555_SLEW_RATE_8MV,
+ FAN53555_SLEW_RATE_4MV,
+ FAN53555_SLEW_RATE_2MV,
+ FAN53555_SLEW_RATE_1MV,
+ FAN53555_SLEW_RATE_0_5MV,
+};
+
+struct fan53555_platform_data {
+ struct regulator_init_data *regulator;
+ unsigned int slew_rate;
+ /* Sleep VSEL ID */
+ unsigned int sleep_vsel_id;
+};
+
+#ifdef CONFIG_REGULATOR_FAN53555
+int __init fan53555_regulator_init(void);
+#else
+static inline int __init fan53555_regulator_init(void) { return 0; }
+#endif
+
+#endif /* __FAN53555_H__ */
diff --git a/include/linux/regulator/onsemi-ncp6335d.h b/include/linux/regulator/onsemi-ncp6335d.h
index 98a5fea..399742f 100644
--- a/include/linux/regulator/onsemi-ncp6335d.h
+++ b/include/linux/regulator/onsemi-ncp6335d.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,4 +26,10 @@
bool sleep_enable;
};
+#ifdef CONFIG_REGULATOR_ONSEMI_NCP6335D
+int __init ncp6335d_regulator_init(void);
+#else
+static inline int __init ncp6335d_regulator_init(void) { return 0; }
+#endif
+
#endif
diff --git a/include/linux/remote_spinlock.h b/include/linux/remote_spinlock.h
index e39846f..49d19ed 100644
--- a/include/linux/remote_spinlock.h
+++ b/include/linux/remote_spinlock.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, 2011, 2013 The Linux Foundation.
+/* Copyright (c) 2008-2009, 2011, 2013-2014 The Linux Foundation.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
@@ -83,6 +83,11 @@
0; }) \
: 0; \
})
+#define remote_spin_lock_rlock_id(lock, tid) \
+ _remote_spin_lock_rlock_id(&((lock)->remote), tid)
+
+#define remote_spin_unlock_rlock(lock) \
+ _remote_spin_unlock_rlock(&((lock)->remote))
#define remote_spin_release(lock, pid) \
_remote_spin_release(&((lock)->remote), pid)
diff --git a/include/linux/slimbus/slimbus.h b/include/linux/slimbus/slimbus.h
index 67f4d8c..56a3a5f 100644
--- a/include/linux/slimbus/slimbus.h
+++ b/include/linux/slimbus/slimbus.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -634,6 +634,10 @@
* @driver: Device's driver. Pointer to access routines.
* @ctrl: Slimbus controller managing the bus hosting this device.
* @laddr: 1-byte Logical address of this device.
+ * @reported: Flag to indicate whether this device reported present. The flag
+ * is set when device reports present, and is reset when it reports
+ * absent. This flag alongwith notified flag below is used to call
+ * device_up, or device_down callbacks for driver of this device.
* @mark_define: List of channels pending definition/activation.
* @mark_suspend: List of channels pending suspend.
* @mark_removal: List of channels pending removal.
@@ -657,6 +661,7 @@
struct slim_driver *driver;
struct slim_controller *ctrl;
u8 laddr;
+ bool reported;
struct list_head mark_define;
struct list_head mark_suspend;
struct list_head mark_removal;
diff --git a/include/linux/usb/msm_ext_chg.h b/include/linux/usb/msm_ext_chg.h
index dcc786d..596ab49 100644
--- a/include/linux/usb/msm_ext_chg.h
+++ b/include/linux/usb/msm_ext_chg.h
@@ -6,6 +6,8 @@
#define USB_CHG_BLOCK_ULPI 1
#define USB_CHG_BLOCK_QSCRATCH 2
+#define USB_REQUEST_5V 1
+#define USB_REQUEST_9V 2
/**
* struct msm_usb_chg_info - MSM USB charger block details.
* @chg_block_type: The type of charger block. QSCRATCH/ULPI.
@@ -28,4 +30,10 @@
/* Vote against USB hardware low power mode */
#define MSM_USB_EXT_CHG_BLOCK_LPM _IOW('M', 1, int)
+/* To tell kernel about voltage being voted */
+#define MSM_USB_EXT_CHG_VOLTAGE_INFO _IOW('M', 2, int)
+
+/* To tell kernel about voltage request result */
+#define MSM_USB_EXT_CHG_RESULT _IOW('M', 3, int)
+
#endif /* __LINUX_USB_MSM_EXT_CHG_H */
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 045a58b..d16448a 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -2,7 +2,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Author: Brian Swetland <swetland@google.com>
- * Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2014, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -346,6 +346,7 @@
* @chg_check_timer: The timer used to implement the workaround to detect
* very slow plug in of wall charger.
* @ui_enabled: USB Intterupt is enabled or disabled.
+ * @pm_done: Indicates whether USB is PM resumed
*/
struct msm_otg {
struct usb_phy phy;
@@ -462,6 +463,8 @@
bool ext_chg_active;
struct completion ext_chg_wait;
int ui_enabled;
+ bool pm_done;
+ struct qpnp_vadc_chip *vadc_dev;
};
struct ci13xxx_platform_data {
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 51ca67d..81d5b9c 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1841,7 +1841,11 @@
V4L2_MPEG_VIDC_INDEX_EXTRADATA_INPUT_CROP,
V4L2_MPEG_VIDC_INDEX_EXTRADATA_DIGITAL_ZOOM,
V4L2_MPEG_VIDC_INDEX_EXTRADATA_ASPECT_RATIO,
- V4L2_MPEG_VIDC_EXTRADATA_MPEG2_SEQDISP
+ V4L2_MPEG_VIDC_EXTRADATA_MPEG2_SEQDISP,
+ V4L2_MPEG_VIDC_EXTRADATA_FRAME_QP,
+ V4L2_MPEG_VIDC_EXTRADATA_FRAME_BITS_INFO,
+ V4L2_MPEG_VIDC_EXTRADATA_LTR,
+ V4L2_MPEG_VIDC_EXTRADATA_METADATA_MBI,
};
#define V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 26)
@@ -1909,6 +1913,27 @@
#define V4L2_CID_MPEG_VIDC_VIDEO_CONCEAL_COLOR \
(V4L2_CID_MPEG_MSM_VIDC_BASE + 38)
+#define V4L2_CID_MPEG_VIDC_VIDEO_LTRMODE \
+ (V4L2_CID_MPEG_MSM_VIDC_BASE + 39)
+
+enum v4l2_mpeg_vidc_video_ltrmode {
+ V4L2_MPEG_VIDC_VIDEO_LTR_MODE_DISABLE = 0,
+ V4L2_MPEG_VIDC_VIDEO_LTR_MODE_MANUAL = 1,
+ V4L2_MPEG_VIDC_VIDEO_LTR_MODE_PERIODIC = 2
+};
+
+#define V4L2_CID_MPEG_VIDC_VIDEO_LTRCOUNT \
+ (V4L2_CID_MPEG_MSM_VIDC_BASE + 40)
+
+#define V4L2_CID_MPEG_VIDC_VIDEO_USELTRFRAME \
+ (V4L2_CID_MPEG_MSM_VIDC_BASE + 41)
+
+#define V4L2_CID_MPEG_VIDC_VIDEO_MARKLTRFRAME \
+ (V4L2_CID_MPEG_MSM_VIDC_BASE + 42)
+
+#define V4L2_CID_MPEG_VIDC_VIDEO_HIER_P_NUM_LAYERS \
+ (V4L2_CID_MPEG_MSM_VIDC_BASE + 43)
+
/* Camera class control IDs */
#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
#define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1)
diff --git a/include/media/msm_cam_sensor.h b/include/media/msm_cam_sensor.h
index 38d3aab..e301d8f 100644
--- a/include/media/msm_cam_sensor.h
+++ b/include/media/msm_cam_sensor.h
@@ -47,6 +47,7 @@
#define MAX_EEPROM_NAME 32
#define MAX_AF_ITERATIONS 3
+#define MAX_NUMBER_OF_STEPS 47
enum flash_type {
LED_FLASH = 1,
@@ -93,6 +94,8 @@
SENSOR_GPIO_VANA,
SENSOR_GPIO_VDIG,
SENSOR_GPIO_VAF,
+ SENSOR_GPIO_FL_EN,
+ SENSOR_GPIO_FL_NOW,
SENSOR_GPIO_MAX,
};
@@ -220,6 +223,8 @@
struct msm_sensor_power_setting_array {
struct msm_sensor_power_setting *power_setting;
uint16_t size;
+ struct msm_sensor_power_setting *power_down_setting;
+ uint16_t size_down;
};
struct msm_sensor_id_info_t {
@@ -227,7 +232,25 @@
uint16_t sensor_id;
};
+enum msm_sensor_camera_id_t {
+ CAMERA_0,
+ CAMERA_1,
+ CAMERA_2,
+ CAMERA_3,
+ MAX_CAMERAS,
+};
+
+enum cci_i2c_master_t {
+ MASTER_0,
+ MASTER_1,
+ MASTER_MAX,
+};
+
struct msm_camera_sensor_slave_info {
+ char sensor_name[32];
+ char eeprom_name[32];
+ char actuator_name[32];
+ enum msm_sensor_camera_id_t camera_id;
uint16_t slave_addr;
enum msm_camera_i2c_reg_addr_type addr_type;
struct msm_sensor_id_info_t sensor_id_info;
@@ -317,10 +340,19 @@
uint8_t csi_phy_sel;
};
+enum camb_position_t {
+ BACK_CAMERA_B,
+ FRONT_CAMERA_B,
+};
+
struct msm_sensor_info_t {
- char sensor_name[MAX_SENSOR_NAME];
- int32_t session_id;
- int32_t subdev_id[SUB_MODULE_MAX];
+ char sensor_name[MAX_SENSOR_NAME];
+ int32_t session_id;
+ int32_t subdev_id[SUB_MODULE_MAX];
+ uint8_t is_mount_angle_valid;
+ uint32_t sensor_mount_angle;
+ int modes_supported;
+ enum camb_position_t position;
};
struct camera_vreg_t {
@@ -332,11 +364,6 @@
uint32_t delay;
};
-enum camb_position_t {
- BACK_CAMERA_B,
- FRONT_CAMERA_B,
-};
-
enum camerab_mode_t {
CAMERA_MODE_2D_B = (1<<0),
CAMERA_MODE_3D_B = (1<<1)
@@ -381,6 +408,7 @@
CFG_EEPROM_GET_CAL_DATA,
CFG_EEPROM_READ_CAL_DATA,
CFG_EEPROM_WRITE_DATA,
+ CFG_EEPROM_GET_MM_INFO,
};
struct eeprom_get_t {
@@ -397,6 +425,12 @@
uint32_t num_bytes;
};
+struct eeprom_get_mm_t {
+ uint32_t mm_support;
+ uint32_t mm_compression;
+ uint32_t mm_size;
+};
+
struct msm_eeprom_cfg_data {
enum eeprom_cfg_type_t cfgtype;
uint8_t is_supported;
@@ -405,6 +439,7 @@
struct eeprom_get_t get_data;
struct eeprom_read_t read_data;
struct eeprom_write_t write_data;
+ struct eeprom_get_mm_t get_mm_data;
} cfg;
};
@@ -440,6 +475,7 @@
CFG_GET_ACTUATOR_INFO,
CFG_SET_ACTUATOR_INFO,
CFG_SET_DEFAULT_FOCUS,
+ CFG_SET_POSITION,
CFG_MOVE_FOCUS,
};
@@ -538,6 +574,13 @@
ACTUATOR_WEB_CAM_2,
};
+
+struct msm_actuator_set_position_t {
+ uint16_t number_of_steps;
+ uint16_t pos[MAX_NUMBER_OF_STEPS];
+ uint16_t delay[MAX_NUMBER_OF_STEPS];
+};
+
struct msm_actuator_cfg_data {
int cfgtype;
uint8_t is_af_supported;
@@ -545,6 +588,7 @@
struct msm_actuator_move_params_t move;
struct msm_actuator_set_info_t set_info;
struct msm_actuator_get_info_t get_info;
+ struct msm_actuator_set_position_t setpos;
enum af_camera_name cam_name;
} cfg;
};
@@ -576,6 +620,20 @@
uint32_t flash_current[2];
};
+/* sensor init structures and enums */
+enum msm_sensor_init_cfg_type_t {
+ CFG_SINIT_PROBE,
+ CFG_SINIT_PROBE_DONE,
+ CFG_SINIT_PROBE_WAIT_DONE,
+};
+
+struct sensor_init_cfg_data {
+ enum msm_sensor_init_cfg_type_t cfgtype;
+ union {
+ void *setting;
+ } cfg;
+};
+
#define VIDIOC_MSM_SENSOR_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct sensorb_cfg_data)
@@ -603,6 +661,9 @@
#define VIDIOC_MSM_SENSOR_GET_AF_STATUS \
_IOWR('V', BASE_VIDIOC_PRIVATE + 9, uint32_t)
+#define VIDIOC_MSM_SENSOR_INIT_CFG \
+ _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct sensor_init_cfg_data)
+
#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */
#endif /* __LINUX_MSM_CAM_SENSOR_H */
diff --git a/include/media/msm_vidc.h b/include/media/msm_vidc.h
index 81db11a..9028b1a 100644
--- a/include/media/msm_vidc.h
+++ b/include/media/msm_vidc.h
@@ -60,6 +60,7 @@
int msm_vidc_s_fmt(void *instance, struct v4l2_format *f);
int msm_vidc_g_fmt(void *instance, struct v4l2_format *f);
int msm_vidc_s_ctrl(void *instance, struct v4l2_control *a);
+int msm_vidc_s_ext_ctrl(void *instance, struct v4l2_ext_controls *a);
int msm_vidc_g_ctrl(void *instance, struct v4l2_control *a);
int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b);
int msm_vidc_prepare_buf(void *instance, struct v4l2_buffer *b);
@@ -95,6 +96,16 @@
int *domain_num, int *partition_num);
void *msm_vidc_smem_get_client(void *instance);
#endif
+
+struct msm_vidc_extradata_header {
+ unsigned int size;
+ unsigned int:32; /** Keeping binary compatibility */
+ unsigned int:32; /* with firmware and OpenMAX IL **/
+ unsigned int type; /* msm_vidc_extradata_type */
+ unsigned int data_size;
+ unsigned char data[1];
+};
+
struct msm_vidc_interlace_payload {
unsigned int format;
};
@@ -160,6 +171,13 @@
unsigned int fpa_repetition_period;
unsigned int fpa_extension_flag;
};
+struct msm_vidc_frame_qp_payload {
+ unsigned int frame_qp;
+};
+struct msm_vidc_frame_bits_info_payload {
+ unsigned int frame_bits;
+ unsigned int header_bits;
+};
enum msm_vidc_extradata_type {
EXTRADATA_NONE = 0x00000000,
@@ -173,11 +191,15 @@
EXTRADATA_PANSCAN_WINDOW = 0x00000008,
EXTRADATA_RECOVERY_POINT_SEI = 0x00000009,
EXTRADATA_MPEG2_SEQDISP = 0x0000000D,
+ EXTRADATA_FRAME_QP = 0x0000000F,
+ EXTRADATA_FRAME_BITS_INFO = 0x00000010,
EXTRADATA_MULTISLICE_INFO = 0x7F100000,
EXTRADATA_NUM_CONCEALED_MB = 0x7F100001,
EXTRADATA_INDEX = 0x7F100002,
EXTRADATA_ASPECT_RATIO = 0x7F100003,
EXTRADATA_METADATA_FILLER = 0x7FE00002,
+ MSM_VIDC_EXTRADATA_METADATA_LTR = 0x7F100004,
+ EXTRADATA_METADATA_MBI = 0x7F100005,
};
enum msm_vidc_interlace_type {
INTERLACE_FRAME_PROGRESSIVE = 0x01,
diff --git a/include/media/msmb_camera.h b/include/media/msmb_camera.h
index 62e7b27..a4f5a01 100644
--- a/include/media/msmb_camera.h
+++ b/include/media/msmb_camera.h
@@ -36,6 +36,7 @@
#define MSM_CAMERA_SUBDEV_LED_FLASH 11
#define MSM_CAMERA_SUBDEV_STROBE_FLASH 12
#define MSM_CAMERA_SUBDEV_BUF_MNGR 13
+#define MSM_CAMERA_SUBDEV_SENSOR_INIT 14
#define MSM_MAX_CAMERA_SENSORS 5
diff --git a/include/media/msmb_pproc.h b/include/media/msmb_pproc.h
index ed4ffa2..26c1048 100644
--- a/include/media/msmb_pproc.h
+++ b/include/media/msmb_pproc.h
@@ -229,6 +229,9 @@
#define VIDIOC_MSM_CPP_QUEUE_BUF \
_IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl_t)
+#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO \
+ _IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t)
+
#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
#define V4L2_EVENT_VPE_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 1)
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index a69f3f1..518dfb1 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -37,7 +37,7 @@
const unsigned char MIN_HARD_MUTE_VAL = 0x00;
const unsigned char MAX_HARD_MUTE_VAL = 0x03;
const unsigned char MIN_SRCH_MODE = 0x00;
-const unsigned char MAX_SRCH_MODE = 0x01;
+const unsigned char MAX_SRCH_MODE = 0x09;
const unsigned char MIN_SCAN_DWELL = 0x00;
const unsigned char MAX_SCAN_DWELL = 0x0F;
const unsigned char MIN_SIG_TH = 0x00;
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 7932ba1..9f0d486 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -524,6 +524,10 @@
* @capability: station capability
* @ext_capab: extended capabilities of the station
* @ext_capab_len: number of extended capabilities
+ * @supported_channels: supported channels in IEEE 802.11 format
+ * @supported_channels_len: number of supported channels
+ * @supported_oper_classes: supported oper classes in IEEE 802.11 format
+ * @supported_oper_classes_len: number of supported operating classes
*/
struct station_parameters {
u8 *supported_rates;
@@ -542,6 +546,10 @@
u16 capability;
u8 *ext_capab;
u8 ext_capab_len;
+ const u8 *supported_channels;
+ u8 supported_channels_len;
+ const u8 *supported_oper_classes;
+ u8 supported_oper_classes_len;
};
/**
@@ -2038,6 +2046,34 @@
};
/**
+ * enum wiphy_vendor_command_flags - validation flags for vendor commands
+ * @WIPHY_VENDOR_CMD_NEED_WDEV: vendor command requires wdev
+ * @WIPHY_VENDOR_CMD_NEED_NETDEV: vendor command requires netdev
+ * @WIPHY_VENDOR_CMD_NEED_RUNNING: interface/wdev must be up & running
+ * (must be combined with %_WDEV or %_NETDEV)
+ */
+enum wiphy_vendor_command_flags {
+ WIPHY_VENDOR_CMD_NEED_WDEV = BIT(0),
+ WIPHY_VENDOR_CMD_NEED_NETDEV = BIT(1),
+ WIPHY_VENDOR_CMD_NEED_RUNNING = BIT(2),
+};
+
+/**
+ * struct wiphy_vendor_command - vendor command definition
+ * @info: vendor command identifying information, as used in nl80211
+ * @flags: flags, see &enum wiphy_vendor_command_flags
+ * @doit: callback for the operation, note that wdev is %NULL if the
+ * flags didn't ask for a wdev and non-%NULL otherwise; the data
+ * pointer may be %NULL if userspace provided no data at all
+ */
+struct wiphy_vendor_command {
+ struct nl80211_vendor_cmd_info info;
+ u32 flags;
+ int (*doit)(struct wiphy *wiphy, struct wireless_dev *wdev,
+ void *data, int data_len);
+};
+
+/**
* struct wiphy - wireless hardware description
* @reg_notifier: the driver's regulatory notification callback,
* note that if your driver uses wiphy_apply_custom_regulatory()
@@ -2136,6 +2172,11 @@
* supports for ACL.
* @country_ie_pref: country IE processing preferences specified
* by enum nl80211_country_ie_pref
+ *
+ * @vendor_commands: array of vendor commands supported by the hardware
+ * @n_vendor_commands: number of vendor commands
+ * @vendor_events: array of vendor events supported by the hardware
+ * @n_vendor_events: number of vendor events
*/
struct wiphy {
/* assign these fields before you register the wiphy */
@@ -2240,6 +2281,10 @@
const struct iw_handler_def *wext;
#endif
+ const struct wiphy_vendor_command *vendor_commands;
+ const struct nl80211_vendor_cmd_info *vendor_events;
+ int n_vendor_commands, n_vendor_events;
+
char priv[0] __attribute__((__aligned__(NETDEV_ALIGN)));
};
@@ -3120,6 +3165,121 @@
*/
void wiphy_rfkill_stop_polling(struct wiphy *wiphy);
+/**
+ * DOC: Vendor commands
+ *
+ * Occasionally, there are special protocol or firmware features that
+ * can't be implemented very openly. For this and similar cases, the
+ * vendor command functionality allows implementing the features with
+ * (typically closed-source) userspace and firmware, using nl80211 as
+ * the configuration mechanism.
+ *
+ * A driver supporting vendor commands must register them as an array
+ * in struct wiphy, with handlers for each one, each command has an
+ * OUI and sub command ID to identify it.
+ *
+ * Note that this feature should not be (ab)used to implement protocol
+ * features that could openly be shared across drivers. In particular,
+ * it must never be required to use vendor commands to implement any
+ * "normal" functionality that higher-level userspace like connection
+ * managers etc. need.
+ */
+
+struct sk_buff *__cfg80211_alloc_reply_skb(struct wiphy *wiphy,
+ enum nl80211_commands cmd,
+ enum nl80211_attrs attr,
+ int approxlen);
+
+struct sk_buff *__cfg80211_alloc_event_skb(struct wiphy *wiphy,
+ enum nl80211_commands cmd,
+ enum nl80211_attrs attr,
+ int vendor_event_idx,
+ int approxlen, gfp_t gfp);
+
+void __cfg80211_send_event_skb(struct sk_buff *skb, gfp_t gfp);
+
+/**
+ * cfg80211_vendor_cmd_alloc_reply_skb - allocate vendor command reply
+ * @wiphy: the wiphy
+ * @approxlen: an upper bound of the length of the data that will
+ * be put into the skb
+ *
+ * This function allocates and pre-fills an skb for a reply to
+ * a vendor command. Since it is intended for a reply, calling
+ * it outside of a vendor command's doit() operation is invalid.
+ *
+ * The returned skb is pre-filled with some identifying data in
+ * a way that any data that is put into the skb (with skb_put(),
+ * nla_put() or similar) will end up being within the
+ * %NL80211_ATTR_VENDOR_DATA attribute, so all that needs to be done
+ * with the skb is adding data for the corresponding userspace tool
+ * which can then read that data out of the testdata attribute. You
+ * must not modify the skb in any other way.
+ *
+ * When done, call cfg80211_vendor_cmd_reply() with the skb and return
+ * its error code as the result of the doit() operation.
+ *
+ * Return: An allocated and pre-filled skb. %NULL if any errors happen.
+ */
+static inline struct sk_buff *
+cfg80211_vendor_cmd_alloc_reply_skb(struct wiphy *wiphy, int approxlen)
+{
+ return __cfg80211_alloc_reply_skb(wiphy, NL80211_CMD_TESTMODE,
+ NL80211_ATTR_TESTDATA, approxlen);
+}
+
+/**
+ * cfg80211_vendor_cmd_reply - send the reply skb
+ * @skb: The skb, must have been allocated with
+ * cfg80211_vendor_cmd_alloc_reply_skb()
+ *
+ * Since calling this function will usually be the last thing
+ * before returning from the vendor command doit() you should
+ * return the error code. Note that this function consumes the
+ * skb regardless of the return value.
+ *
+ * Return: An error code or 0 on success.
+ */
+int cfg80211_vendor_cmd_reply(struct sk_buff *skb);
+
+/**
+ * cfg80211_vendor_event_alloc - allocate vendor-specific event skb
+ * @wiphy: the wiphy
+ * @event_idx: index of the vendor event in the wiphy's vendor_events
+ * @approxlen: an upper bound of the length of the data that will
+ * be put into the skb
+ * @gfp: allocation flags
+ *
+ * This function allocates and pre-fills an skb for an event on the
+ * vendor-specific multicast group.
+ *
+ * When done filling the skb, call cfg80211_vendor_event() with the
+ * skb to send the event.
+ *
+ * Return: An allocated and pre-filled skb. %NULL if any errors happen.
+ */
+static inline struct sk_buff *
+cfg80211_vendor_event_alloc(struct wiphy *wiphy, int approxlen,
+ int event_idx, gfp_t gfp)
+{
+ return __cfg80211_alloc_event_skb(wiphy, NL80211_CMD_VENDOR,
+ NL80211_ATTR_VENDOR_DATA,
+ event_idx, approxlen, gfp);
+}
+
+/**
+ * cfg80211_vendor_event - send the event
+ * @skb: The skb, must have been allocated with cfg80211_vendor_event_alloc()
+ * @gfp: allocation flags
+ *
+ * This function sends the given @skb, which must have been allocated
+ * by cfg80211_vendor_event_alloc(), as an event. It always consumes it.
+ */
+static inline void cfg80211_vendor_event(struct sk_buff *skb, gfp_t gfp)
+{
+ __cfg80211_send_event_skb(skb, gfp);
+}
+
#ifdef CONFIG_NL80211_TESTMODE
/**
* DOC: Test mode
@@ -3153,8 +3313,12 @@
* When done, call cfg80211_testmode_reply() with the skb and return
* its error code as the result of the @testmode_cmd operation.
*/
-struct sk_buff *cfg80211_testmode_alloc_reply_skb(struct wiphy *wiphy,
- int approxlen);
+static inline struct sk_buff *
+cfg80211_testmode_alloc_reply_skb(struct wiphy *wiphy, int approxlen)
+{
+ return __cfg80211_alloc_reply_skb(wiphy, NL80211_CMD_TESTMODE,
+ NL80211_ATTR_TESTDATA, approxlen);
+}
/**
* cfg80211_testmode_reply - send the reply skb
@@ -3167,7 +3331,10 @@
* Note that this function consumes the skb regardless of the
* return value.
*/
-int cfg80211_testmode_reply(struct sk_buff *skb);
+static inline int cfg80211_testmode_reply(struct sk_buff *skb)
+{
+ return cfg80211_vendor_cmd_reply(skb);
+}
/**
* cfg80211_testmode_alloc_event_skb - allocate testmode event
@@ -3188,8 +3355,13 @@
* When done filling the skb, call cfg80211_testmode_event() with the
* skb to send the event.
*/
-struct sk_buff *cfg80211_testmode_alloc_event_skb(struct wiphy *wiphy,
- int approxlen, gfp_t gfp);
+static inline struct sk_buff *
+cfg80211_testmode_alloc_event_skb(struct wiphy *wiphy, int approxlen, gfp_t gfp)
+{
+ return __cfg80211_alloc_event_skb(wiphy, NL80211_CMD_TESTMODE,
+ NL80211_ATTR_TESTDATA, -1,
+ approxlen, gfp);
+}
/**
* cfg80211_testmode_event - send the event
@@ -3201,7 +3373,10 @@
* by cfg80211_testmode_alloc_event_skb(), as an event. It always
* consumes it.
*/
-void cfg80211_testmode_event(struct sk_buff *skb, gfp_t gfp);
+static inline void cfg80211_testmode_event(struct sk_buff *skb, gfp_t gfp)
+{
+ __cfg80211_send_event_skb(skb, gfp);
+}
#define CFG80211_TESTMODE_CMD(cmd) .testmode_cmd = (cmd),
#define CFG80211_TESTMODE_DUMP(cmd) .testmode_dump = (cmd),
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index e4170a2..a5a9e4d 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -252,6 +252,14 @@
atomic_dec(&fl->users);
}
+extern void icmpv6_notify(struct sk_buff *skb, u8 type, u8 code, __be32 info);
+
+int icmpv6_push_pending_frames(struct sock *sk, struct flowi6 *fl6,
+ struct icmp6hdr *thdr, int len);
+
+struct dst_entry *icmpv6_route_lookup(struct net *net, struct sk_buff *skb,
+ struct sock *sk, struct flowi6 *fl6);
+
extern int ip6_ra_control(struct sock *sk, int sel);
extern int ipv6_parse_hopopts(struct sk_buff *skb);
@@ -294,6 +302,18 @@
return __ipv6_addr_src_scope(__ipv6_addr_type(addr));
}
+static inline bool __ipv6_addr_needs_scope_id(int type)
+{
+ return type & IPV6_ADDR_LINKLOCAL ||
+ (type & IPV6_ADDR_MULTICAST &&
+ (type & (IPV6_ADDR_LOOPBACK|IPV6_ADDR_LINKLOCAL)));
+}
+
+static inline __u32 ipv6_iface_scope_id(const struct in6_addr *addr, int iface)
+{
+ return __ipv6_addr_needs_scope_id(__ipv6_addr_type(addr)) ? iface : 0;
+}
+
static inline int ipv6_addr_cmp(const struct in6_addr *a1, const struct in6_addr *a2)
{
return memcmp(a1, a2, sizeof(struct in6_addr));
diff --git a/include/net/ping.h b/include/net/ping.h
index 682b5ae..b1717ae 100644
--- a/include/net/ping.h
+++ b/include/net/ping.h
@@ -13,6 +13,7 @@
#ifndef _PING_H
#define _PING_H
+#include <net/icmp.h>
#include <net/netns/hash.h>
/* PING_HTABLE_SIZE must be power of 2 */
@@ -28,6 +29,18 @@
*/
#define GID_T_MAX (((gid_t)~0U) >> 1)
+/* Compatibility glue so we can support IPv6 when it's compiled as a module */
+struct pingv6_ops {
+ int (*ipv6_recv_error)(struct sock *sk, struct msghdr *msg, int len);
+ int (*datagram_recv_ctl)(struct sock *sk, struct msghdr *msg,
+ struct sk_buff *skb);
+ int (*icmpv6_err_convert)(u8 type, u8 code, int *err);
+ void (*ipv6_icmp_error)(struct sock *sk, struct sk_buff *skb, int err,
+ __be16 port, u32 info, u8 *payload);
+ int (*ipv6_chk_addr)(struct net *net, const struct in6_addr *addr,
+ struct net_device *dev, int strict);
+};
+
struct ping_table {
struct hlist_nulls_head hash[PING_HTABLE_SIZE];
rwlock_t lock;
@@ -39,10 +52,40 @@
};
extern struct proto ping_prot;
+extern struct ping_table ping_table;
+#if IS_ENABLED(CONFIG_IPV6)
+extern struct pingv6_ops pingv6_ops;
+#endif
+struct pingfakehdr {
+ struct icmphdr icmph;
+ struct iovec *iov;
+ sa_family_t family;
+ __wsum wcheck;
+};
-extern void ping_rcv(struct sk_buff *);
-extern void ping_err(struct sk_buff *, u32 info);
+int ping_get_port(struct sock *sk, unsigned short ident);
+void ping_hash(struct sock *sk);
+void ping_unhash(struct sock *sk);
+
+int ping_init_sock(struct sock *sk);
+void ping_close(struct sock *sk, long timeout);
+int ping_bind(struct sock *sk, struct sockaddr *uaddr, int addr_len);
+void ping_err(struct sk_buff *skb, int offset, u32 info);
+void ping_v4_err(struct sk_buff *skb, u32 info);
+int ping_getfrag(void *from, char *to, int offset, int fraglen, int odd,
+ struct sk_buff *);
+
+int ping_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
+ size_t len, int noblock, int flags, int *addr_len);
+int ping_common_sendmsg(int family, struct msghdr *msg, size_t len,
+ void *user_icmph, size_t icmph_len);
+int ping_v4_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
+ size_t len);
+int ping_v6_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
+ size_t len);
+int ping_queue_rcv_skb(struct sock *sk, struct sk_buff *skb);
+void ping_rcv(struct sk_buff *skb);
#ifdef CONFIG_PROC_FS
extern int __init ping_proc_init(void);
@@ -50,6 +93,7 @@
#endif
void __init ping_init(void);
-
+int __init pingv6_init(void);
+void pingv6_exit(void);
#endif /* _PING_H */
diff --git a/include/net/transp_v6.h b/include/net/transp_v6.h
index 498433d..48b42ea 100644
--- a/include/net/transp_v6.h
+++ b/include/net/transp_v6.h
@@ -11,6 +11,7 @@
extern struct proto udpv6_prot;
extern struct proto udplitev6_prot;
extern struct proto tcpv6_prot;
+extern struct proto pingv6_prot;
struct flowi6;
@@ -21,6 +22,8 @@
extern void ipv6_frag_exit(void);
/* transport protocols */
+extern int pingv6_init(void);
+extern void pingv6_exit(void);
extern int rawv6_init(void);
extern void rawv6_exit(void);
extern int udpv6_init(void);
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 7c6a558..6a54bb4 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -152,7 +152,10 @@
unsigned no_read_disc_info:1; /* Avoid READ_DISC_INFO cmds */
unsigned no_read_capacity_16:1; /* Avoid READ_CAPACITY_16 cmds */
unsigned is_visible:1; /* is the device visible in sysfs */
+ unsigned use_rpm_auto:1; /* Enable runtime PM auto suspend */
+#define SCSI_DEFAULT_AUTOSUSPEND_DELAY -1
+ int autosuspend_delay;
DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */
struct list_head event_list; /* asserted events */
struct work_struct event_work;
diff --git a/include/sound/jack.h b/include/sound/jack.h
index 8e8c133..4a88c22 100644
--- a/include/sound/jack.h
+++ b/include/sound/jack.h
@@ -47,6 +47,9 @@
SND_JACK_OC_HPHL = 0x0000040,
SND_JACK_OC_HPHR = 0x0000080,
SND_JACK_UNSUPPORTED = 0x0000100,
+ SND_JACK_MICROPHONE2 = 0x0000200,
+ SND_JACK_ANC_HEADPHONE = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
+ SND_JACK_MICROPHONE2,
/* Kept separate from switches to facilitate implementation */
SND_JACK_BTN_0 = 0x4000000,
SND_JACK_BTN_1 = 0x2000000,
diff --git a/include/sound/q6asm-v2.h b/include/sound/q6asm-v2.h
index a78c333..1635fc3 100644
--- a/include/sound/q6asm-v2.h
+++ b/include/sound/q6asm-v2.h
@@ -72,6 +72,7 @@
#define SYNC_IO_MODE 0x0001
#define ASYNC_IO_MODE 0x0002
#define COMPRESSED_IO 0x0040
+#define COMPRESSED_STREAM_IO 0x0080
#define NT_MODE 0x0400
#define NO_TIMESTAMP 0xFF00
@@ -399,4 +400,8 @@
int q6asm_send_meta_data(struct audio_client *ac, uint32_t initial_samples,
uint32_t trailing_samples);
+/* Send the stream meta data to remove initial and trailing silence */
+int q6asm_stream_send_meta_data(struct audio_client *ac, uint32_t stream_id,
+ uint32_t initial_samples, uint32_t trailing_samples);
+
#endif /* __Q6_ASM_H__ */
diff --git a/include/sound/q6lsm.h b/include/sound/q6lsm.h
index 34eba81..8f06f20c 100644
--- a/include/sound/q6lsm.h
+++ b/include/sound/q6lsm.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -47,6 +47,8 @@
uint16_t user_sensitivity;
uint16_t kw_sensitivity;
bool started;
+ dma_addr_t lsm_cal_phy_addr;
+ uint32_t lsm_cal_size;
};
struct lsm_stream_cmd_open_tx {
@@ -123,10 +125,9 @@
int q6lsm_open(struct lsm_client *client);
int q6lsm_start(struct lsm_client *client, bool wait);
int q6lsm_stop(struct lsm_client *client, bool wait);
-int q6lsm_snd_model_buf_alloc(struct lsm_client *client, uint32_t len);
+int q6lsm_snd_model_buf_alloc(struct lsm_client *client, size_t len);
int q6lsm_snd_model_buf_free(struct lsm_client *client);
int q6lsm_close(struct lsm_client *client);
-int q6lsm_unmap_cal_blocks(void);
int q6lsm_register_sound_model(struct lsm_client *client,
enum lsm_detection_mode mode, u16 minkeyword,
u16 minuser, bool detectfailure);
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 954a8c4..d9e1f1d 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -1682,9 +1682,12 @@
{
struct rq *rq = task_rq(p);
- if (WARN_ON(rq != this_rq()) ||
- WARN_ON(p == current))
+ if (rq != this_rq() || p == current) {
+ printk_sched("%s: Failed to wakeup task %d (%s), rq = %p, this_rq = %p, p = %p, current = %p\n",
+ __func__, task_pid_nr(p), p->comm, rq,
+ this_rq(), p, current);
return;
+ }
lockdep_assert_held(&rq->lock);
@@ -6947,6 +6950,7 @@
#ifdef CONFIG_CGROUP_SCHED
struct task_group root_task_group;
+LIST_HEAD(task_groups);
#endif
DECLARE_PER_CPU(cpumask_var_t, load_balance_tmpmask);
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index c0288a6..34fe64f 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -80,7 +80,7 @@
struct cfs_rq;
struct rt_rq;
-static LIST_HEAD(task_groups);
+extern struct list_head task_groups;
struct cfs_bandwidth {
#ifdef CONFIG_CFS_BANDWIDTH
diff --git a/lib/Kconfig b/lib/Kconfig
index 8437e36..09f0d8a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -379,7 +379,7 @@
Implementation is done using GnuPG MPI library
config QMI_ENCDEC
- bool
+ bool "QMI Encode/Decode Library"
help
Library to encode & decode QMI messages from within
the kernel. The kernel drivers encode the C structure into
@@ -388,7 +388,7 @@
and then decode it into a C structure.
config QMI_ENCDEC_DEBUG
- bool
+ bool "QMI Encode/Decode Library Debug"
help
Kernel config option to enable debugging QMI Encode/Decode
library. This will log the information regarding the element
diff --git a/lib/scatterlist.c b/lib/scatterlist.c
index 6096e89..547a01f 100644
--- a/lib/scatterlist.c
+++ b/lib/scatterlist.c
@@ -228,12 +228,14 @@
struct scatterlist *sg, *prv;
unsigned int left;
+ memset(table, 0, sizeof(*table));
+
+ if (nents == 0)
+ return -EINVAL;
#ifndef ARCH_HAS_SG_CHAIN
BUG_ON(nents > max_ents);
#endif
- memset(table, 0, sizeof(*table));
-
left = nents;
prv = NULL;
do {
diff --git a/mm/page-writeback.c b/mm/page-writeback.c
index a5e8dc2..d012c75 100644
--- a/mm/page-writeback.c
+++ b/mm/page-writeback.c
@@ -190,6 +190,18 @@
zone_reclaimable_pages(z) - z->dirty_balance_reserve;
}
/*
+ * Unreclaimable memory (kernel memory or anonymous memory
+ * without swap) can bring down the dirtyable pages below
+ * the zone's dirty balance reserve and the above calculation
+ * will underflow. However we still want to add in nodes
+ * which are below threshold (negative values) to get a more
+ * accurate calculation but make sure that the total never
+ * underflows.
+ */
+ if ((long)x < 0)
+ x = 0;
+
+ /*
* Make sure that the number of highmem pages is never larger
* than the number of the total dirtyable memory. This can only
* occur in very strange VM situations but we want to make sure
@@ -211,8 +223,8 @@
{
unsigned long x;
- x = global_page_state(NR_FREE_PAGES) + global_reclaimable_pages() -
- dirty_balance_reserve;
+ x = global_page_state(NR_FREE_PAGES) + global_reclaimable_pages();
+ x -= min(x, dirty_balance_reserve);
if (!vm_highmem_is_dirtyable)
x -= highmem_dirtyable_memory(x);
@@ -279,9 +291,12 @@
* highmem zone can hold its share of dirty pages, so we don't
* care about vm_highmem_is_dirtyable here.
*/
- return zone_page_state(zone, NR_FREE_PAGES) +
- zone_reclaimable_pages(zone) -
- zone->dirty_balance_reserve;
+ unsigned long nr_pages = zone_page_state(zone, NR_FREE_PAGES) +
+ zone_reclaimable_pages(zone);
+
+ /* don't allow this to underflow */
+ nr_pages -= min(nr_pages, zone->dirty_balance_reserve);
+ return nr_pages;
}
/**
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index a225089..f378b38 100644
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
@@ -35,7 +35,7 @@
struct iphdr _iph;
ip:
iph = skb_header_pointer(skb, nhoff, sizeof(_iph), &_iph);
- if (!iph)
+ if (!iph || iph->ihl < 5)
return false;
if (ip_is_fragment(iph))
diff --git a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c
index f20b5cc..b848d6f 100644
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -1559,7 +1559,7 @@
static const struct net_protocol icmp_protocol = {
.handler = icmp_rcv,
- .err_handler = ping_err,
+ .err_handler = ping_v4_err,
.no_policy = 1,
.netns_ok = 1,
};
diff --git a/net/ipv4/icmp.c b/net/ipv4/icmp.c
index 2cb2bf8..2e109ff 100644
--- a/net/ipv4/icmp.c
+++ b/net/ipv4/icmp.c
@@ -788,7 +788,7 @@
if (iph->protocol == IPPROTO_ICMP &&
iph->ihl >= 5 &&
pskb_may_pull(skb, (iph->ihl<<2)+8)) {
- ping_err(skb, icmp_hdr(skb)->un.gateway);
+ ping_v4_err(skb, icmp_hdr(skb)->un.gateway);
}
out:
diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index 50009c7..7f38d35 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -33,7 +33,6 @@
#include <linux/netdevice.h>
#include <net/snmp.h>
#include <net/ip.h>
-#include <net/ipv6.h>
#include <net/icmp.h>
#include <net/protocol.h>
#include <linux/skbuff.h>
@@ -46,8 +45,18 @@
#include <net/inet_common.h>
#include <net/checksum.h>
+#if IS_ENABLED(CONFIG_IPV6)
+#include <linux/in6.h>
+#include <linux/icmpv6.h>
+#include <net/addrconf.h>
+#include <net/ipv6.h>
+#include <net/transp_v6.h>
+#endif
-static struct ping_table ping_table;
+
+struct ping_table ping_table;
+struct pingv6_ops pingv6_ops;
+EXPORT_SYMBOL_GPL(pingv6_ops);
static u16 ping_port_rover;
@@ -57,6 +66,7 @@
pr_debug("hash(%d) = %d\n", num, res);
return res;
}
+EXPORT_SYMBOL_GPL(ping_hash);
static inline struct hlist_nulls_head *ping_hashslot(struct ping_table *table,
struct net *net, unsigned num)
@@ -64,7 +74,7 @@
return &table->hash[ping_hashfn(net, num, PING_HTABLE_MASK)];
}
-static int ping_v4_get_port(struct sock *sk, unsigned short ident)
+int ping_get_port(struct sock *sk, unsigned short ident)
{
struct hlist_nulls_node *node;
struct hlist_nulls_head *hlist;
@@ -102,6 +112,10 @@
ping_portaddr_for_each_entry(sk2, node, hlist) {
isk2 = inet_sk(sk2);
+ /* BUG? Why is this reuse and not reuseaddr? ping.c
+ * doesn't turn off SO_REUSEADDR, and it doesn't expect
+ * that other ping processes can steal its packets.
+ */
if ((isk2->inet_num == ident) &&
(sk2 != sk) &&
(!sk2->sk_reuse || !sk->sk_reuse))
@@ -124,17 +138,18 @@
write_unlock_bh(&ping_table.lock);
return 1;
}
+EXPORT_SYMBOL_GPL(ping_get_port);
-static void ping_v4_hash(struct sock *sk)
+void ping_hash(struct sock *sk)
{
- pr_debug("ping_v4_hash(sk->port=%u)\n", inet_sk(sk)->inet_num);
+ pr_debug("ping_hash(sk->port=%u)\n", inet_sk(sk)->inet_num);
BUG(); /* "Please do not press this button again." */
}
-static void ping_v4_unhash(struct sock *sk)
+void ping_unhash(struct sock *sk)
{
struct inet_sock *isk = inet_sk(sk);
- pr_debug("ping_v4_unhash(isk=%p,isk->num=%u)\n", isk, isk->inet_num);
+ pr_debug("ping_unhash(isk=%p,isk->num=%u)\n", isk, isk->inet_num);
if (sk_hashed(sk)) {
write_lock_bh(&ping_table.lock);
hlist_nulls_del(&sk->sk_nulls_node);
@@ -145,31 +160,61 @@
write_unlock_bh(&ping_table.lock);
}
}
+EXPORT_SYMBOL_GPL(ping_unhash);
-static struct sock *ping_v4_lookup(struct net *net, __be32 saddr, __be32 daddr,
- u16 ident, int dif)
+static struct sock *ping_lookup(struct net *net, struct sk_buff *skb, u16 ident)
{
struct hlist_nulls_head *hslot = ping_hashslot(&ping_table, net, ident);
struct sock *sk = NULL;
struct inet_sock *isk;
struct hlist_nulls_node *hnode;
+ int dif = skb->dev->ifindex;
- pr_debug("try to find: num = %d, daddr = %pI4, dif = %d\n",
- (int)ident, &daddr, dif);
+ if (skb->protocol == htons(ETH_P_IP)) {
+ pr_debug("try to find: num = %d, daddr = %pI4, dif = %d\n",
+ (int)ident, &ip_hdr(skb)->daddr, dif);
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (skb->protocol == htons(ETH_P_IPV6)) {
+ pr_debug("try to find: num = %d, daddr = %pI6c, dif = %d\n",
+ (int)ident, &ipv6_hdr(skb)->daddr, dif);
+#endif
+ }
+
read_lock_bh(&ping_table.lock);
ping_portaddr_for_each_entry(sk, hnode, hslot) {
isk = inet_sk(sk);
- pr_debug("found: %p: num = %d, daddr = %pI4, dif = %d\n", sk,
- (int)isk->inet_num, &isk->inet_rcv_saddr,
- sk->sk_bound_dev_if);
-
pr_debug("iterate\n");
if (isk->inet_num != ident)
continue;
- if (isk->inet_rcv_saddr && isk->inet_rcv_saddr != daddr)
- continue;
+
+ if (skb->protocol == htons(ETH_P_IP) &&
+ sk->sk_family == AF_INET) {
+ pr_debug("found: %p: num=%d, daddr=%pI4, dif=%d\n", sk,
+ (int) isk->inet_num, &isk->inet_rcv_saddr,
+ sk->sk_bound_dev_if);
+
+ if (isk->inet_rcv_saddr &&
+ isk->inet_rcv_saddr != ip_hdr(skb)->daddr)
+ continue;
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (skb->protocol == htons(ETH_P_IPV6) &&
+ sk->sk_family == AF_INET6) {
+ struct ipv6_pinfo *np = inet6_sk(sk);
+
+ pr_debug("found: %p: num=%d, daddr=%pI6c, dif=%d\n", sk,
+ (int) isk->inet_num,
+ &inet6_sk(sk)->rcv_saddr,
+ sk->sk_bound_dev_if);
+
+ if (!ipv6_addr_any(&np->rcv_saddr) &&
+ !ipv6_addr_equal(&np->rcv_saddr,
+ &ipv6_hdr(skb)->daddr))
+ continue;
+#endif
+ }
+
if (sk->sk_bound_dev_if && sk->sk_bound_dev_if != dif)
continue;
@@ -198,7 +243,7 @@
}
-static int ping_init_sock(struct sock *sk)
+int ping_init_sock(struct sock *sk)
{
struct net *net = sock_net(sk);
gid_t group = current_egid();
@@ -224,8 +269,9 @@
return -EACCES;
}
+EXPORT_SYMBOL_GPL(ping_init_sock);
-static void ping_close(struct sock *sk, long timeout)
+void ping_close(struct sock *sk, long timeout)
{
pr_debug("ping_close(sk=%p,sk->num=%u)\n",
inet_sk(sk), inet_sk(sk)->inet_num);
@@ -233,36 +279,122 @@
sk_common_release(sk);
}
+EXPORT_SYMBOL_GPL(ping_close);
+/* Checks the bind address and possibly modifies sk->sk_bound_dev_if. */
+int ping_check_bind_addr(struct sock *sk, struct inet_sock *isk,
+ struct sockaddr *uaddr, int addr_len) {
+ struct net *net = sock_net(sk);
+ if (sk->sk_family == AF_INET) {
+ struct sockaddr_in *addr = (struct sockaddr_in *) uaddr;
+ int chk_addr_ret;
+
+ if (addr_len < sizeof(*addr))
+ return -EINVAL;
+
+ pr_debug("ping_check_bind_addr(sk=%p,addr=%pI4,port=%d)\n",
+ sk, &addr->sin_addr.s_addr, ntohs(addr->sin_port));
+
+ chk_addr_ret = inet_addr_type(net, addr->sin_addr.s_addr);
+
+ if (addr->sin_addr.s_addr == htonl(INADDR_ANY))
+ chk_addr_ret = RTN_LOCAL;
+
+ if ((sysctl_ip_nonlocal_bind == 0 &&
+ isk->freebind == 0 && isk->transparent == 0 &&
+ chk_addr_ret != RTN_LOCAL) ||
+ chk_addr_ret == RTN_MULTICAST ||
+ chk_addr_ret == RTN_BROADCAST)
+ return -EADDRNOTAVAIL;
+
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (sk->sk_family == AF_INET6) {
+ struct sockaddr_in6 *addr = (struct sockaddr_in6 *) uaddr;
+ int addr_type, scoped, has_addr;
+ struct net_device *dev = NULL;
+
+ if (addr_len < sizeof(*addr))
+ return -EINVAL;
+
+ pr_debug("ping_check_bind_addr(sk=%p,addr=%pI6c,port=%d)\n",
+ sk, addr->sin6_addr.s6_addr, ntohs(addr->sin6_port));
+
+ addr_type = ipv6_addr_type(&addr->sin6_addr);
+ scoped = __ipv6_addr_needs_scope_id(addr_type);
+ if ((addr_type != IPV6_ADDR_ANY &&
+ !(addr_type & IPV6_ADDR_UNICAST)) ||
+ (scoped && !addr->sin6_scope_id))
+ return -EINVAL;
+
+ rcu_read_lock();
+ if (addr->sin6_scope_id) {
+ dev = dev_get_by_index_rcu(net, addr->sin6_scope_id);
+ if (!dev) {
+ rcu_read_unlock();
+ return -ENODEV;
+ }
+ }
+ has_addr = pingv6_ops.ipv6_chk_addr(net, &addr->sin6_addr, dev,
+ scoped);
+ rcu_read_unlock();
+
+ if (!(isk->freebind || isk->transparent || has_addr ||
+ addr_type == IPV6_ADDR_ANY))
+ return -EADDRNOTAVAIL;
+
+ if (scoped)
+ sk->sk_bound_dev_if = addr->sin6_scope_id;
+#endif
+ } else {
+ return -EAFNOSUPPORT;
+ }
+ return 0;
+}
+
+void ping_set_saddr(struct sock *sk, struct sockaddr *saddr)
+{
+ if (saddr->sa_family == AF_INET) {
+ struct inet_sock *isk = inet_sk(sk);
+ struct sockaddr_in *addr = (struct sockaddr_in *) saddr;
+ isk->inet_rcv_saddr = isk->inet_saddr = addr->sin_addr.s_addr;
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (saddr->sa_family == AF_INET6) {
+ struct sockaddr_in6 *addr = (struct sockaddr_in6 *) saddr;
+ struct ipv6_pinfo *np = inet6_sk(sk);
+ np->rcv_saddr = np->saddr = addr->sin6_addr;
+#endif
+ }
+}
+
+void ping_clear_saddr(struct sock *sk, int dif)
+{
+ sk->sk_bound_dev_if = dif;
+ if (sk->sk_family == AF_INET) {
+ struct inet_sock *isk = inet_sk(sk);
+ isk->inet_rcv_saddr = isk->inet_saddr = 0;
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (sk->sk_family == AF_INET6) {
+ struct ipv6_pinfo *np = inet6_sk(sk);
+ memset(&np->rcv_saddr, 0, sizeof(np->rcv_saddr));
+ memset(&np->saddr, 0, sizeof(np->saddr));
+#endif
+ }
+}
/*
* We need our own bind because there are no privileged id's == local ports.
* Moreover, we don't allow binding to multi- and broadcast addresses.
*/
-static int ping_bind(struct sock *sk, struct sockaddr *uaddr, int addr_len)
+int ping_bind(struct sock *sk, struct sockaddr *uaddr, int addr_len)
{
- struct sockaddr_in *addr = (struct sockaddr_in *)uaddr;
struct inet_sock *isk = inet_sk(sk);
unsigned short snum;
- int chk_addr_ret;
int err;
+ int dif = sk->sk_bound_dev_if;
- if (addr_len < sizeof(struct sockaddr_in))
- return -EINVAL;
-
- pr_debug("ping_v4_bind(sk=%p,sa_addr=%08x,sa_port=%d)\n",
- sk, addr->sin_addr.s_addr, ntohs(addr->sin_port));
-
- chk_addr_ret = inet_addr_type(sock_net(sk), addr->sin_addr.s_addr);
- if (addr->sin_addr.s_addr == htonl(INADDR_ANY))
- chk_addr_ret = RTN_LOCAL;
-
- if ((sysctl_ip_nonlocal_bind == 0 &&
- isk->freebind == 0 && isk->transparent == 0 &&
- chk_addr_ret != RTN_LOCAL) ||
- chk_addr_ret == RTN_MULTICAST ||
- chk_addr_ret == RTN_BROADCAST)
- return -EADDRNOTAVAIL;
+ err = ping_check_bind_addr(sk, isk, uaddr, addr_len);
+ if (err)
+ return err;
lock_sock(sk);
@@ -271,42 +403,50 @@
goto out;
err = -EADDRINUSE;
- isk->inet_rcv_saddr = isk->inet_saddr = addr->sin_addr.s_addr;
- snum = ntohs(addr->sin_port);
- if (ping_v4_get_port(sk, snum) != 0) {
- isk->inet_saddr = isk->inet_rcv_saddr = 0;
+ ping_set_saddr(sk, uaddr);
+ snum = ntohs(((struct sockaddr_in *)uaddr)->sin_port);
+ if (ping_get_port(sk, snum) != 0) {
+ ping_clear_saddr(sk, dif);
goto out;
}
- pr_debug("after bind(): num = %d, daddr = %pI4, dif = %d\n",
+ pr_debug("after bind(): num = %d, dif = %d\n",
(int)isk->inet_num,
- &isk->inet_rcv_saddr,
(int)sk->sk_bound_dev_if);
err = 0;
- if (isk->inet_rcv_saddr)
+ if ((sk->sk_family == AF_INET && isk->inet_rcv_saddr) ||
+ (sk->sk_family == AF_INET6 &&
+ !ipv6_addr_any(&inet6_sk(sk)->rcv_saddr)))
sk->sk_userlocks |= SOCK_BINDADDR_LOCK;
+
if (snum)
sk->sk_userlocks |= SOCK_BINDPORT_LOCK;
isk->inet_sport = htons(isk->inet_num);
isk->inet_daddr = 0;
isk->inet_dport = 0;
+
+#if IS_ENABLED(CONFIG_IPV6)
+ if (sk->sk_family == AF_INET6)
+ memset(&inet6_sk(sk)->daddr, 0, sizeof(inet6_sk(sk)->daddr));
+#endif
+
sk_dst_reset(sk);
out:
release_sock(sk);
pr_debug("ping_v4_bind -> %d\n", err);
return err;
}
+EXPORT_SYMBOL_GPL(ping_bind);
/*
* Is this a supported type of ICMP message?
*/
-static inline int ping_supported(int type, int code)
+static inline int ping_supported(int family, int type, int code)
{
- if (type == ICMP_ECHO && code == 0)
- return 1;
- return 0;
+ return (family == AF_INET && type == ICMP_ECHO && code == 0) ||
+ (family == AF_INET6 && type == ICMPV6_ECHO_REQUEST && code == 0);
}
/*
@@ -314,30 +454,44 @@
* sort of error condition.
*/
-static int ping_queue_rcv_skb(struct sock *sk, struct sk_buff *skb);
-
-void ping_err(struct sk_buff *skb, u32 info)
+void ping_err(struct sk_buff *skb, int offset, u32 info)
{
- struct iphdr *iph = (struct iphdr *)skb->data;
- struct icmphdr *icmph = (struct icmphdr *)(skb->data+(iph->ihl<<2));
+ int family;
+ struct icmphdr *icmph;
struct inet_sock *inet_sock;
- int type = icmph->type;
- int code = icmph->code;
+ int type;
+ int code;
struct net *net = dev_net(skb->dev);
struct sock *sk;
int harderr;
int err;
+ if (skb->protocol == htons(ETH_P_IP)) {
+ struct iphdr *iph = (struct iphdr *)skb->data;
+ offset = iph->ihl << 2;
+ family = AF_INET;
+ type = icmp_hdr(skb)->type;
+ code = icmp_hdr(skb)->code;
+ icmph = (struct icmphdr *)(skb->data + offset);
+ } else if (skb->protocol == htons(ETH_P_IPV6)) {
+ family = AF_INET6;
+ type = icmp6_hdr(skb)->icmp6_type;
+ code = icmp6_hdr(skb)->icmp6_code;
+ icmph = (struct icmphdr *) (skb->data + offset);
+ } else {
+ BUG();
+ }
+
/* We assume the packet has already been checked by icmp_unreach */
- if (!ping_supported(icmph->type, icmph->code))
+ if (!ping_supported(family, icmph->type, icmph->code))
return;
- pr_debug("ping_err(type=%04x,code=%04x,id=%04x,seq=%04x)\n", type,
- code, ntohs(icmph->un.echo.id), ntohs(icmph->un.echo.sequence));
+ pr_debug("ping_err(proto=0x%x,type=%d,code=%d,id=%04x,seq=%04x)\n",
+ skb->protocol, type, code, ntohs(icmph->un.echo.id),
+ ntohs(icmph->un.echo.sequence));
- sk = ping_v4_lookup(net, iph->daddr, iph->saddr,
- ntohs(icmph->un.echo.id), skb->dev->ifindex);
+ sk = ping_lookup(net, skb, ntohs(icmph->un.echo.id));
if (sk == NULL) {
pr_debug("no socket, dropping\n");
return; /* No socket for error */
@@ -348,70 +502,85 @@
harderr = 0;
inet_sock = inet_sk(sk);
- switch (type) {
- default:
- case ICMP_TIME_EXCEEDED:
- err = EHOSTUNREACH;
- break;
- case ICMP_SOURCE_QUENCH:
- /* This is not a real error but ping wants to see it.
- * Report it with some fake errno. */
- err = EREMOTEIO;
- break;
- case ICMP_PARAMETERPROB:
- err = EPROTO;
- harderr = 1;
- break;
- case ICMP_DEST_UNREACH:
- if (code == ICMP_FRAG_NEEDED) { /* Path MTU discovery */
- if (inet_sock->pmtudisc != IP_PMTUDISC_DONT) {
- err = EMSGSIZE;
- harderr = 1;
- break;
+ if (skb->protocol == htons(ETH_P_IP)) {
+ switch (type) {
+ default:
+ case ICMP_TIME_EXCEEDED:
+ err = EHOSTUNREACH;
+ break;
+ case ICMP_SOURCE_QUENCH:
+ /* This is not a real error but ping wants to see it.
+ * Report it with some fake errno. */
+ err = EREMOTEIO;
+ break;
+ case ICMP_PARAMETERPROB:
+ err = EPROTO;
+ harderr = 1;
+ break;
+ case ICMP_DEST_UNREACH:
+ if (code == ICMP_FRAG_NEEDED) { /* Path MTU discovery */
+ if (inet_sock->pmtudisc != IP_PMTUDISC_DONT) {
+ err = EMSGSIZE;
+ harderr = 1;
+ break;
+ }
+ goto out;
}
- goto out;
+ err = EHOSTUNREACH;
+ if (code <= NR_ICMP_UNREACH) {
+ harderr = icmp_err_convert[code].fatal;
+ err = icmp_err_convert[code].errno;
+ }
+ break;
+ case ICMP_REDIRECT:
+ /* See ICMP_SOURCE_QUENCH */
+ err = EREMOTEIO;
+ break;
}
- err = EHOSTUNREACH;
- if (code <= NR_ICMP_UNREACH) {
- harderr = icmp_err_convert[code].fatal;
- err = icmp_err_convert[code].errno;
- }
- break;
- case ICMP_REDIRECT:
- /* See ICMP_SOURCE_QUENCH */
- err = EREMOTEIO;
- break;
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (skb->protocol == htons(ETH_P_IPV6)) {
+ harderr = pingv6_ops.icmpv6_err_convert(type, code, &err);
+#endif
}
/*
* RFC1122: OK. Passes ICMP errors back to application, as per
* 4.1.3.3.
*/
- if (!inet_sock->recverr) {
+ if ((family == AF_INET && !inet_sock->recverr) ||
+ (family == AF_INET6 && !inet6_sk(sk)->recverr)) {
if (!harderr || sk->sk_state != TCP_ESTABLISHED)
goto out;
} else {
- ip_icmp_error(sk, skb, err, 0 /* no remote port */,
- info, (u8 *)icmph);
+ if (family == AF_INET) {
+ ip_icmp_error(sk, skb, err, 0 /* no remote port */,
+ info, (u8 *)icmph);
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (family == AF_INET6) {
+ pingv6_ops.ipv6_icmp_error(sk, skb, err, 0,
+ info, (u8 *)icmph);
+#endif
+ }
}
sk->sk_err = err;
sk->sk_error_report(sk);
out:
sock_put(sk);
}
+EXPORT_SYMBOL_GPL(ping_err);
+
+void ping_v4_err(struct sk_buff *skb, u32 info)
+{
+ ping_err(skb, 0, info);
+}
/*
- * Copy and checksum an ICMP Echo packet from user space into a buffer.
+ * Copy and checksum an ICMP Echo packet from user space into a buffer
+ * starting from the payload.
*/
-struct pingfakehdr {
- struct icmphdr icmph;
- struct iovec *iov;
- __wsum wcheck;
-};
-
-static int ping_getfrag(void *from, char * to,
- int offset, int fraglen, int odd, struct sk_buff *skb)
+int ping_getfrag(void *from, char *to,
+ int offset, int fraglen, int odd, struct sk_buff *skb)
{
struct pingfakehdr *pfh = (struct pingfakehdr *)from;
@@ -422,20 +591,33 @@
pfh->iov, 0, fraglen - sizeof(struct icmphdr),
&pfh->wcheck))
return -EFAULT;
-
- return 0;
+ } else if (offset < sizeof(struct icmphdr)) {
+ BUG();
+ } else {
+ if (csum_partial_copy_fromiovecend
+ (to, pfh->iov, offset - sizeof(struct icmphdr),
+ fraglen, &pfh->wcheck))
+ return -EFAULT;
}
- if (offset < sizeof(struct icmphdr))
- BUG();
- if (csum_partial_copy_fromiovecend
- (to, pfh->iov, offset - sizeof(struct icmphdr),
- fraglen, &pfh->wcheck))
- return -EFAULT;
+
+#if IS_ENABLED(CONFIG_IPV6)
+ /* For IPv6, checksum each skb as we go along, as expected by
+ * icmpv6_push_pending_frames. For IPv4, accumulate the checksum in
+ * wcheck, it will be finalized in ping_v4_push_pending_frames.
+ */
+ if (pfh->family == AF_INET6) {
+ skb->csum = pfh->wcheck;
+ skb->ip_summed = CHECKSUM_NONE;
+ pfh->wcheck = 0;
+ }
+#endif
+
return 0;
}
+EXPORT_SYMBOL_GPL(ping_getfrag);
-static int ping_push_pending_frames(struct sock *sk, struct pingfakehdr *pfh,
- struct flowi4 *fl4)
+static int ping_v4_push_pending_frames(struct sock *sk, struct pingfakehdr *pfh,
+ struct flowi4 *fl4)
{
struct sk_buff *skb = skb_peek(&sk->sk_write_queue);
@@ -447,24 +629,9 @@
return ip_push_pending_frames(sk, fl4);
}
-static int ping_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
- size_t len)
-{
- struct net *net = sock_net(sk);
- struct flowi4 fl4;
- struct inet_sock *inet = inet_sk(sk);
- struct ipcm_cookie ipc;
- struct icmphdr user_icmph;
- struct pingfakehdr pfh;
- struct rtable *rt = NULL;
- struct ip_options_data opt_copy;
- int free = 0;
- __be32 saddr, daddr, faddr;
- u8 tos;
- int err;
-
- pr_debug("ping_sendmsg(sk=%p,sk->num=%u)\n", inet, inet->inet_num);
-
+int ping_common_sendmsg(int family, struct msghdr *msg, size_t len,
+ void *user_icmph, size_t icmph_len) {
+ u8 type, code;
if (len > 0xFFFF)
return -EMSGSIZE;
@@ -479,15 +646,53 @@
/*
* Fetch the ICMP header provided by the userland.
- * iovec is modified!
+ * iovec is modified! The ICMP header is consumed.
*/
-
- if (memcpy_fromiovec((u8 *)&user_icmph, msg->msg_iov,
- sizeof(struct icmphdr)))
+ if (memcpy_fromiovec(user_icmph, msg->msg_iov, icmph_len))
return -EFAULT;
- if (!ping_supported(user_icmph.type, user_icmph.code))
+
+ if (family == AF_INET) {
+ type = ((struct icmphdr *) user_icmph)->type;
+ code = ((struct icmphdr *) user_icmph)->code;
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (family == AF_INET6) {
+ type = ((struct icmp6hdr *) user_icmph)->icmp6_type;
+ code = ((struct icmp6hdr *) user_icmph)->icmp6_code;
+#endif
+ } else {
+ BUG();
+ }
+
+ if (!ping_supported(family, type, code))
return -EINVAL;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ping_common_sendmsg);
+
+int ping_v4_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
+ size_t len)
+{
+ struct net *net = sock_net(sk);
+ struct flowi4 fl4;
+ struct inet_sock *inet = inet_sk(sk);
+ struct ipcm_cookie ipc;
+ struct icmphdr user_icmph;
+ struct pingfakehdr pfh;
+ struct rtable *rt = NULL;
+ struct ip_options_data opt_copy;
+ int free = 0;
+ __be32 saddr, daddr, faddr;
+ u8 tos;
+ int err;
+
+ pr_debug("ping_v4_sendmsg(sk=%p,sk->num=%u)\n", inet, inet->inet_num);
+
+ err = ping_common_sendmsg(AF_INET, msg, len, &user_icmph,
+ sizeof(user_icmph));
+ if (err)
+ return err;
+
/*
* Get and verify the address.
*/
@@ -593,13 +798,14 @@
pfh.icmph.un.echo.sequence = user_icmph.un.echo.sequence;
pfh.iov = msg->msg_iov;
pfh.wcheck = 0;
+ pfh.family = AF_INET;
err = ip_append_data(sk, &fl4, ping_getfrag, &pfh, len,
0, &ipc, &rt, msg->msg_flags);
if (err)
ip_flush_pending_frames(sk);
else
- err = ping_push_pending_frames(sk, &pfh, &fl4);
+ err = ping_v4_push_pending_frames(sk, &pfh, &fl4);
release_sock(sk);
out:
@@ -620,11 +826,13 @@
goto out;
}
-static int ping_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
- size_t len, int noblock, int flags, int *addr_len)
+int ping_recvmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
+ size_t len, int noblock, int flags, int *addr_len)
{
struct inet_sock *isk = inet_sk(sk);
- struct sockaddr_in *sin = (struct sockaddr_in *)msg->msg_name;
+ int family = sk->sk_family;
+ struct sockaddr_in *sin;
+ struct sockaddr_in6 *sin6;
struct sk_buff *skb;
int copied, err;
@@ -634,11 +842,22 @@
if (flags & MSG_OOB)
goto out;
- if (addr_len)
- *addr_len = sizeof(*sin);
+ if (addr_len) {
+ if (family == AF_INET)
+ *addr_len = sizeof(*sin);
+ else if (family == AF_INET6 && addr_len)
+ *addr_len = sizeof(*sin6);
+ }
- if (flags & MSG_ERRQUEUE)
- return ip_recv_error(sk, msg, len);
+ if (flags & MSG_ERRQUEUE) {
+ if (family == AF_INET) {
+ return ip_recv_error(sk, msg, len);
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (family == AF_INET6) {
+ return pingv6_ops.ipv6_recv_error(sk, msg, len);
+#endif
+ }
+ }
skb = skb_recv_datagram(sk, flags, noblock, &err);
if (!skb)
@@ -657,15 +876,41 @@
sock_recv_timestamp(msg, sk, skb);
- /* Copy the address. */
- if (sin) {
+ /* Copy the address and add cmsg data. */
+ if (family == AF_INET) {
+ sin = (struct sockaddr_in *) msg->msg_name;
sin->sin_family = AF_INET;
sin->sin_port = 0 /* skb->h.uh->source */;
sin->sin_addr.s_addr = ip_hdr(skb)->saddr;
memset(sin->sin_zero, 0, sizeof(sin->sin_zero));
+
+ if (isk->cmsg_flags)
+ ip_cmsg_recv(msg, skb);
+
+#if IS_ENABLED(CONFIG_IPV6)
+ } else if (family == AF_INET6) {
+ struct ipv6_pinfo *np = inet6_sk(sk);
+ struct ipv6hdr *ip6 = ipv6_hdr(skb);
+ sin6 = (struct sockaddr_in6 *) msg->msg_name;
+ sin6->sin6_family = AF_INET6;
+ sin6->sin6_port = 0;
+ sin6->sin6_addr = ip6->saddr;
+
+ if (np->sndflow)
+ sin6->sin6_flowinfo =
+ *(__be32 *)ip6 & IPV6_FLOWINFO_MASK;
+
+ if (__ipv6_addr_needs_scope_id(
+ ipv6_addr_type(&sin6->sin6_addr)))
+ sin6->sin6_scope_id = IP6CB(skb)->iif;
+
+ if (inet6_sk(sk)->rxopt.all)
+ pingv6_ops.datagram_recv_ctl(sk, msg, skb);
+#endif
+ } else {
+ BUG();
}
- if (isk->cmsg_flags)
- ip_cmsg_recv(msg, skb);
+
err = copied;
done:
@@ -674,8 +919,9 @@
pr_debug("ping_recvmsg -> %d\n", err);
return err;
}
+EXPORT_SYMBOL_GPL(ping_recvmsg);
-static int ping_queue_rcv_skb(struct sock *sk, struct sk_buff *skb)
+int ping_queue_rcv_skb(struct sock *sk, struct sk_buff *skb)
{
pr_debug("ping_queue_rcv_skb(sk=%p,sk->num=%d,skb=%p)\n",
inet_sk(sk), inet_sk(sk)->inet_num, skb);
@@ -686,6 +932,7 @@
}
return 0;
}
+EXPORT_SYMBOL_GPL(ping_queue_rcv_skb);
/*
@@ -696,10 +943,7 @@
{
struct sock *sk;
struct net *net = dev_net(skb->dev);
- struct iphdr *iph = ip_hdr(skb);
struct icmphdr *icmph = icmp_hdr(skb);
- __be32 saddr = iph->saddr;
- __be32 daddr = iph->daddr;
/* We assume the packet has already been checked by icmp_rcv */
@@ -709,8 +953,7 @@
/* Push ICMP header back */
skb_push(skb, skb->data - (u8 *)icmph);
- sk = ping_v4_lookup(net, saddr, daddr, ntohs(icmph->un.echo.id),
- skb->dev->ifindex);
+ sk = ping_lookup(net, skb, ntohs(icmph->un.echo.id));
if (sk != NULL) {
pr_debug("rcv on socket %p\n", sk);
ping_queue_rcv_skb(sk, skb_get(skb));
@@ -721,6 +964,7 @@
/* We're called from icmp_rcv(). kfree_skb() is done there. */
}
+EXPORT_SYMBOL_GPL(ping_rcv);
struct proto ping_prot = {
.name = "PING",
@@ -731,13 +975,13 @@
.disconnect = udp_disconnect,
.setsockopt = ip_setsockopt,
.getsockopt = ip_getsockopt,
- .sendmsg = ping_sendmsg,
+ .sendmsg = ping_v4_sendmsg,
.recvmsg = ping_recvmsg,
.bind = ping_bind,
.backlog_rcv = ping_queue_rcv_skb,
- .hash = ping_v4_hash,
- .unhash = ping_v4_unhash,
- .get_port = ping_v4_get_port,
+ .hash = ping_hash,
+ .unhash = ping_unhash,
+ .get_port = ping_get_port,
.obj_size = sizeof(struct inet_sock),
};
EXPORT_SYMBOL(ping_prot);
diff --git a/net/ipv6/Makefile b/net/ipv6/Makefile
index 686934a..753be5d 100644
--- a/net/ipv6/Makefile
+++ b/net/ipv6/Makefile
@@ -7,7 +7,7 @@
ipv6-objs := af_inet6.o anycast.o ip6_output.o ip6_input.o addrconf.o \
addrlabel.o \
route.o ip6_fib.o ipv6_sockglue.o ndisc.o udp.o udplite.o \
- raw.o protocol.o icmp.o mcast.o reassembly.o tcp_ipv6.o \
+ raw.o protocol.o icmp.o mcast.o reassembly.o tcp_ipv6.o ping.o \
exthdrs.o datagram.o ip6_flowlabel.o inet6_connection_sock.o
ipv6-$(CONFIG_SYSCTL) = sysctl_net_ipv6.o
diff --git a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c
index 29625e9..22ebbb9 100644
--- a/net/ipv6/af_inet6.c
+++ b/net/ipv6/af_inet6.c
@@ -49,6 +49,7 @@
#include <net/udplite.h>
#include <net/tcp.h>
#include <net/ipip.h>
+#include <net/ping.h>
#include <net/protocol.h>
#include <net/inet_common.h>
#include <net/route.h>
@@ -1130,6 +1131,9 @@
if (err)
goto out_unregister_udplite_proto;
+ err = proto_register(&pingv6_prot, 1);
+ if (err)
+ goto out_unregister_ping_proto;
/* We MUST register RAW sockets before we create the ICMP6,
* IGMP6, or NDISC control sockets.
@@ -1225,6 +1229,10 @@
if (err)
goto ipv6_packet_fail;
+ err = pingv6_init();
+ if (err)
+ goto pingv6_fail;
+
#ifdef CONFIG_SYSCTL
err = ipv6_sysctl_register();
if (err)
@@ -1237,6 +1245,8 @@
sysctl_fail:
ipv6_packet_cleanup();
#endif
+pingv6_fail:
+ pingv6_exit();
ipv6_packet_fail:
tcpv6_exit();
tcpv6_fail:
@@ -1284,6 +1294,8 @@
rtnl_unregister_all(PF_INET6);
out_sock_register_fail:
rawv6_exit();
+out_unregister_ping_proto:
+ proto_unregister(&pingv6_prot);
out_unregister_raw_proto:
proto_unregister(&rawv6_prot);
out_unregister_udplite_proto:
diff --git a/net/ipv6/icmp.c b/net/ipv6/icmp.c
index 27ac95a..ba0c147 100644
--- a/net/ipv6/icmp.c
+++ b/net/ipv6/icmp.c
@@ -55,6 +55,7 @@
#include <net/ipv6.h>
#include <net/ip6_checksum.h>
+#include <net/ping.h>
#include <net/protocol.h>
#include <net/raw.h>
#include <net/rawv6.h>
@@ -79,10 +80,22 @@
return net->ipv6.icmp_sk[smp_processor_id()];
}
+static void icmpv6_err(struct sk_buff *skb, struct inet6_skb_parm *opt,
+ u8 type, u8 code, int offset, __be32 info)
+{
+ /* icmpv6_notify checks 8 bytes can be pulled, icmp6hdr is 8 bytes */
+ struct icmp6hdr *icmp6 = (struct icmp6hdr *) (skb->data + offset);
+
+ if (!(type & ICMPV6_INFOMSG_MASK))
+ if (icmp6->icmp6_type == ICMPV6_ECHO_REQUEST)
+ ping_err(skb, offset, info);
+}
+
static int icmpv6_rcv(struct sk_buff *skb);
static const struct inet6_protocol icmpv6_protocol = {
.handler = icmpv6_rcv,
+ .err_handler = icmpv6_err,
.flags = INET6_PROTO_NOPOLICY|INET6_PROTO_FINAL,
};
@@ -217,7 +230,8 @@
return (*op & 0xC0) == 0x80;
}
-static int icmpv6_push_pending_frames(struct sock *sk, struct flowi6 *fl6, struct icmp6hdr *thdr, int len)
+int icmpv6_push_pending_frames(struct sock *sk, struct flowi6 *fl6,
+ struct icmp6hdr *thdr, int len)
{
struct sk_buff *skb;
struct icmp6hdr *icmp6h;
@@ -300,8 +314,8 @@
static inline void mip6_addr_swap(struct sk_buff *skb) {}
#endif
-static struct dst_entry *icmpv6_route_lookup(struct net *net, struct sk_buff *skb,
- struct sock *sk, struct flowi6 *fl6)
+struct dst_entry *icmpv6_route_lookup(struct net *net, struct sk_buff *skb,
+ struct sock *sk, struct flowi6 *fl6)
{
struct dst_entry *dst, *dst2;
struct flowi6 fl2;
@@ -594,7 +608,7 @@
icmpv6_xmit_unlock(sk);
}
-static void icmpv6_notify(struct sk_buff *skb, u8 type, u8 code, __be32 info)
+void icmpv6_notify(struct sk_buff *skb, u8 type, u8 code, __be32 info)
{
const struct inet6_protocol *ipprot;
int inner_offset;
@@ -687,7 +701,8 @@
skb->csum = ~csum_unfold(csum_ipv6_magic(saddr, daddr, skb->len,
IPPROTO_ICMPV6, 0));
if (__skb_checksum_complete(skb)) {
- LIMIT_NETDEBUG(KERN_DEBUG "ICMPv6 checksum failed [%pI6 > %pI6]\n",
+ LIMIT_NETDEBUG(KERN_DEBUG
+ "ICMPv6 checksum failed [%pI6c > %pI6c]\n",
saddr, daddr);
goto discard_it;
}
@@ -708,7 +723,7 @@
break;
case ICMPV6_ECHO_REPLY:
- /* we couldn't care less */
+ ping_rcv(skb);
break;
case ICMPV6_PKT_TOOBIG:
diff --git a/net/ipv6/ping.c b/net/ipv6/ping.c
new file mode 100644
index 0000000..f46e315
--- /dev/null
+++ b/net/ipv6/ping.c
@@ -0,0 +1,222 @@
+/*
+ * INET An implementation of the TCP/IP protocol suite for the LINUX
+ * operating system. INET is implemented using the BSD Socket
+ * interface as the means of communication with the user level.
+ *
+ * "Ping" sockets
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Based on ipv4/ping.c code.
+ *
+ * Authors: Lorenzo Colitti (IPv6 support)
+ * Vasiliy Kulikov / Openwall (IPv4 implementation, for Linux 2.6),
+ * Pavel Kankovsky (IPv4 implementation, for Linux 2.4.32)
+ *
+ */
+
+#include <net/addrconf.h>
+#include <net/ipv6.h>
+#include <net/ip6_route.h>
+#include <net/protocol.h>
+#include <net/udp.h>
+#include <net/transp_v6.h>
+#include <net/ping.h>
+#include <linux/module.h>
+
+struct proto pingv6_prot = {
+ .name = "PINGv6",
+ .owner = THIS_MODULE,
+ .init = ping_init_sock,
+ .close = ping_close,
+ .connect = ip6_datagram_connect,
+ .disconnect = udp_disconnect,
+ .setsockopt = ipv6_setsockopt,
+ .getsockopt = ipv6_getsockopt,
+ .sendmsg = ping_v6_sendmsg,
+ .recvmsg = ping_recvmsg,
+ .bind = ping_bind,
+ .backlog_rcv = ping_queue_rcv_skb,
+ .hash = ping_hash,
+ .unhash = ping_unhash,
+ .get_port = ping_get_port,
+ .obj_size = sizeof(struct raw6_sock),
+};
+EXPORT_SYMBOL_GPL(pingv6_prot);
+
+static struct inet_protosw pingv6_protosw = {
+ .type = SOCK_DGRAM,
+ .protocol = IPPROTO_ICMPV6,
+ .prot = &pingv6_prot,
+ .ops = &inet6_dgram_ops,
+ .no_check = UDP_CSUM_DEFAULT,
+ .flags = INET_PROTOSW_REUSE,
+};
+
+
+/* Compatibility glue so we can support IPv6 when it's compiled as a module */
+int dummy_ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len)
+{
+ return -EAFNOSUPPORT;
+}
+int dummy_datagram_recv_ctl(struct sock *sk, struct msghdr *msg,
+ struct sk_buff *skb)
+{
+ return -EAFNOSUPPORT;
+}
+int dummy_icmpv6_err_convert(u8 type, u8 code, int *err)
+{
+ return -EAFNOSUPPORT;
+}
+void dummy_ipv6_icmp_error(struct sock *sk, struct sk_buff *skb, int err,
+ __be16 port, u32 info, u8 *payload) {}
+int dummy_ipv6_chk_addr(struct net *net, const struct in6_addr *addr,
+ struct net_device *dev, int strict)
+{
+ return 0;
+}
+
+int __init pingv6_init(void)
+{
+ pingv6_ops.ipv6_recv_error = ipv6_recv_error;
+ pingv6_ops.datagram_recv_ctl = datagram_recv_ctl;
+ pingv6_ops.icmpv6_err_convert = icmpv6_err_convert;
+ pingv6_ops.ipv6_icmp_error = ipv6_icmp_error;
+ pingv6_ops.ipv6_chk_addr = ipv6_chk_addr;
+ return inet6_register_protosw(&pingv6_protosw);
+}
+
+/* This never gets called because it's not possible to unload the ipv6 module,
+ * but just in case.
+ */
+void pingv6_exit(void)
+{
+ pingv6_ops.ipv6_recv_error = dummy_ipv6_recv_error;
+ pingv6_ops.datagram_recv_ctl = dummy_datagram_recv_ctl;
+ pingv6_ops.icmpv6_err_convert = dummy_icmpv6_err_convert;
+ pingv6_ops.ipv6_icmp_error = dummy_ipv6_icmp_error;
+ pingv6_ops.ipv6_chk_addr = dummy_ipv6_chk_addr;
+ inet6_unregister_protosw(&pingv6_protosw);
+}
+
+int ping_v6_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
+ size_t len)
+{
+ struct inet_sock *inet = inet_sk(sk);
+ struct ipv6_pinfo *np = inet6_sk(sk);
+ struct icmp6hdr user_icmph;
+ int addr_type;
+ struct in6_addr *daddr;
+ int iif = 0;
+ struct flowi6 fl6;
+ int err;
+ int hlimit;
+ struct dst_entry *dst;
+ struct rt6_info *rt;
+ struct pingfakehdr pfh;
+
+ pr_debug("ping_v6_sendmsg(sk=%p,sk->num=%u)\n", inet, inet->inet_num);
+
+ err = ping_common_sendmsg(AF_INET6, msg, len, &user_icmph,
+ sizeof(user_icmph));
+ if (err)
+ return err;
+
+ if (msg->msg_name) {
+ struct sockaddr_in6 *u = (struct sockaddr_in6 *) msg->msg_name;
+ if (msg->msg_namelen < sizeof(struct sockaddr_in6) ||
+ u->sin6_family != AF_INET6) {
+ return -EINVAL;
+ }
+ if (sk->sk_bound_dev_if &&
+ sk->sk_bound_dev_if != u->sin6_scope_id) {
+ return -EINVAL;
+ }
+ daddr = &(u->sin6_addr);
+ iif = u->sin6_scope_id;
+ } else {
+ if (sk->sk_state != TCP_ESTABLISHED)
+ return -EDESTADDRREQ;
+ daddr = &np->daddr;
+ }
+
+ if (!iif)
+ iif = sk->sk_bound_dev_if;
+
+ addr_type = ipv6_addr_type(daddr);
+ if (__ipv6_addr_needs_scope_id(addr_type) && !iif)
+ return -EINVAL;
+ if (addr_type & IPV6_ADDR_MAPPED)
+ return -EINVAL;
+
+ /* TODO: use ip6_datagram_send_ctl to get options from cmsg */
+
+ memset(&fl6, 0, sizeof(fl6));
+
+ fl6.flowi6_proto = IPPROTO_ICMPV6;
+ fl6.saddr = np->saddr;
+ fl6.daddr = *daddr;
+ fl6.fl6_icmp_type = user_icmph.icmp6_type;
+ fl6.fl6_icmp_code = user_icmph.icmp6_code;
+ security_sk_classify_flow(sk, flowi6_to_flowi(&fl6));
+
+ if (!fl6.flowi6_oif && ipv6_addr_is_multicast(&fl6.daddr))
+ fl6.flowi6_oif = np->mcast_oif;
+ else if (!fl6.flowi6_oif)
+ fl6.flowi6_oif = np->ucast_oif;
+
+ dst = ip6_sk_dst_lookup_flow(sk, &fl6, daddr, 1);
+ if (IS_ERR(dst))
+ return PTR_ERR(dst);
+ rt = (struct rt6_info *) dst;
+
+ np = inet6_sk(sk);
+ if (!np)
+ return -EBADF;
+
+ if (!fl6.flowi6_oif && ipv6_addr_is_multicast(&fl6.daddr))
+ fl6.flowi6_oif = np->mcast_oif;
+ else if (!fl6.flowi6_oif)
+ fl6.flowi6_oif = np->ucast_oif;
+
+ pfh.icmph.type = user_icmph.icmp6_type;
+ pfh.icmph.code = user_icmph.icmp6_code;
+ pfh.icmph.checksum = 0;
+ pfh.icmph.un.echo.id = inet->inet_sport;
+ pfh.icmph.un.echo.sequence = user_icmph.icmp6_sequence;
+ pfh.iov = msg->msg_iov;
+ pfh.wcheck = 0;
+ pfh.family = AF_INET6;
+
+ if (ipv6_addr_is_multicast(&fl6.daddr))
+ hlimit = np->mcast_hops;
+ else
+ hlimit = np->hop_limit;
+ if (hlimit < 0)
+ hlimit = ip6_dst_hoplimit(dst);
+
+ lock_sock(sk);
+ err = ip6_append_data(sk, ping_getfrag, &pfh, len,
+ 0, hlimit,
+ np->tclass, NULL, &fl6, rt,
+ MSG_DONTWAIT, np->dontfrag);
+
+ if (err) {
+ ICMP6_INC_STATS_BH(sock_net(sk), rt->rt6i_idev,
+ ICMP6_MIB_OUTERRORS);
+ ip6_flush_pending_frames(sk);
+ } else {
+ err = icmpv6_push_pending_frames(sk, &fl6,
+ (struct icmp6hdr *) &pfh.icmph,
+ len);
+ }
+ release_sock(sk);
+
+ if (err)
+ return err;
+
+ return len;
+}
diff --git a/net/wireless/core.h b/net/wireless/core.h
index 036faee..2e85324 100644
--- a/net/wireless/core.h
+++ b/net/wireless/core.h
@@ -69,9 +69,7 @@
struct mutex sched_scan_mtx;
-#ifdef CONFIG_NL80211_TESTMODE
- struct genl_info *testmode_info;
-#endif
+ struct genl_info *cur_cmd_info;
struct work_struct conn_work;
struct work_struct event_work;
diff --git a/net/wireless/db.txt b/net/wireless/db.txt
index 24bb5d0..c27f165 100644
--- a/net/wireless/db.txt
+++ b/net/wireless/db.txt
@@ -14,14 +14,6 @@
(57240 - 63720 @ 2160), (N/A, 0)
-country AD:
- (2402 - 2482 @ 40), (N/A, 20)
- (5170 - 5250 @ 80), (N/A, 20)
- (5250 - 5330 @ 80), (N/A, 20), DFS
- (5490 - 5710 @ 80), (N/A, 27), DFS
- # 60 gHz band channels 1-4, ref: Etsi En 302 567
- (57240 - 65880 @ 2160), (N/A, 40), NO-OUTDOOR
-
country AE:
(2402 - 2482 @ 40), (N/A, 20)
(5170 - 5250 @ 80), (3, 17)
@@ -126,11 +118,6 @@
(5250 - 5330 @ 20), (N/A, 20), DFS
(5735 - 5835 @ 20), (N/A, 20)
-country BL:
- (2402 - 2482 @ 40), (N/A, 20)
- (5170 - 5250 @ 40), (N/A, 18)
- (5250 - 5330 @ 40), (N/A, 18), DFS
-
country BM:
(2402 - 2472 @ 40), (N/A, 30)
(5150 - 5250 @ 80), (6, 17)
@@ -308,6 +295,12 @@
# 60 gHz band channels 1-4, ref: Etsi En 302 567
(57240 - 65880 @ 2160), (N/A, 40), NO-OUTDOOR
+country ET: DFS-ETSI
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 80), (N/A, 20)
+ (5250 - 5330 @ 80), (N/A, 20), DFS
+ (5490 - 5710 @ 80), (N/A, 27), DFS
+
country FI: DFS-ETSI
(2402 - 2482 @ 40), (N/A, 20)
(5170 - 5250 @ 80), (N/A, 20)
@@ -423,7 +416,7 @@
country ID:
# ref: http://www.postel.go.id/content/ID/regulasi/standardisasi/kepdir/bwa%205,8%20ghz.pdf
- (2402 - 2482 @ 40), (N/A, 20)
+ (2402 - 2482 @ 20), (N/A, 20)
(5735 - 5815 @ 20), (N/A, 23)
country IE: DFS-ETSI
@@ -498,6 +491,13 @@
(5250 - 5330 @ 80), (N/A, 20), DFS
(5490 - 5710 @ 80), (N/A, 27), DFS
+country KY:
+ (2402 - 2472 @ 40), (N/A, 27)
+ (5170 - 5250 @ 80), (3, 17)
+ (5250 - 5330 @ 80), (3, 24), DFS
+ (5490 - 5710 @ 80), (3, 24), DFS
+ (5735 - 5835 @ 80), (3, 30)
+
country KP:
(2402 - 2482 @ 20), (N/A, 20)
(5170 - 5330 @ 20), (6, 20)
@@ -838,6 +838,12 @@
# 60 gHz band channels 1-4, ref: Etsi En 302 567
(57240 - 65880 @ 2160), (N/A, 40), NO-OUTDOOR
+country SR: DFS-ETSI
+ (2400 - 2483.5 @ 40), (N/A, 100 mW)
+ (5150 - 5250 @ 80), (N/A, 100 mW), NO-OUTDOOR
+ (5250 - 5350 @ 80), (N/A, 100 mW), NO-OUTDOOR, DFS
+ (5470 - 5725 @ 80), (N/A, 500 mW), DFS
+
country SV:
(2402 - 2482 @ 40), (N/A, 20)
(5170 - 5250 @ 20), (3, 17)
@@ -909,7 +915,7 @@
(5250 - 5330 @ 80), (3, 24), DFS
(5490 - 5600 @ 80), (3, 24), DFS
(5650 - 5710 @ 40), (3, 24), DFS
- (5735 - 5835 @ 80), (3, 30)
+ (5710 - 5835 @ 80), (3, 30)
# 60g band
# reference: http://cfr.regstoday.com/47cfr15.aspx#47_CFR_15p255
# channels 1,2,3, EIRP=40dBm(43dBm peak)
@@ -960,6 +966,12 @@
(5470 - 5725 @ 80), (6, 24), DFS
(5725 - 5850 @ 80), (6, 30)
+country WS: DFS-ETSI
+ (2402 - 2482 @ 40), (N/A, 20)
+ (5170 - 5250 @ 20), (3, 17)
+ (5250 - 5330 @ 80), (3, 24), DFS
+ (5490 - 5710 @ 80), (3, 24), DFS
+
country YE:
(2402 - 2482 @ 40), (N/A, 20)
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 7db02f3..e90ef68 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -223,6 +223,20 @@
[NL80211_ATTR_IE_RIC] = { .type = NLA_BINARY,
.len = IEEE80211_MAX_DATA_LEN },
[NL80211_ATTR_PEER_AID] = { .type = NLA_U16 },
+ [NL80211_ATTR_STA_SUPPORTED_CHANNELS] = { .type = NLA_BINARY },
+ [NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES] = { .type = NLA_BINARY },
+ [NL80211_ATTR_CH_SWITCH_COUNT] = { .type = NLA_U32 },
+ [NL80211_ATTR_CH_SWITCH_BLOCK_TX] = { .type = NLA_FLAG },
+ [NL80211_ATTR_CSA_IES] = { .type = NLA_NESTED },
+ [NL80211_ATTR_CSA_C_OFF_BEACON] = { .type = NLA_U16 },
+ [NL80211_ATTR_CSA_C_OFF_PRESP] = { .type = NLA_U16 },
+ [NL80211_ATTR_STA_SUPPORTED_CHANNELS] = { .type = NLA_BINARY },
+ [NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES] = { .type = NLA_BINARY },
+ [NL80211_ATTR_HANDLE_DFS] = { .type = NLA_FLAG },
+ [NL80211_ATTR_OPMODE_NOTIF] = { .type = NLA_U8 },
+ [NL80211_ATTR_VENDOR_ID] = { .type = NLA_U32 },
+ [NL80211_ATTR_VENDOR_SUBCMD] = { .type = NLA_U32 },
+ [NL80211_ATTR_VENDOR_DATA] = { .type = NLA_BINARY },
};
/* policy for the key attributes */
@@ -1074,6 +1088,39 @@
NLA_PUT_U32(msg, NL80211_ATTR_MAC_ACL_MAX,
dev->wiphy.max_acl_mac_addrs);
+ if (dev->wiphy.n_vendor_commands) {
+ const struct nl80211_vendor_cmd_info *info;
+ struct nlattr *nested;
+
+ nested = nla_nest_start(msg, NL80211_ATTR_VENDOR_DATA);
+ if (!nested)
+ goto nla_put_failure;
+
+ for (i = 0; i < dev->wiphy.n_vendor_commands; i++) {
+ info = &dev->wiphy.vendor_commands[i].info;
+ if (nla_put(msg, i + 1, sizeof(*info), info))
+ goto nla_put_failure;
+ }
+ nla_nest_end(msg, nested);
+ }
+
+ if (dev->wiphy.n_vendor_events) {
+ const struct nl80211_vendor_cmd_info *info;
+ struct nlattr *nested;
+
+ nested = nla_nest_start(msg,
+ NL80211_ATTR_VENDOR_EVENTS);
+ if (!nested)
+ goto nla_put_failure;
+
+ for (i = 0; i < dev->wiphy.n_vendor_events; i++) {
+ info = &dev->wiphy.vendor_events[i];
+ if (nla_put(msg, i + 1, sizeof(*info), info))
+ goto nla_put_failure;
+ }
+ nla_nest_end(msg, nested);
+ }
+
return genlmsg_end(msg, hdr);
nla_put_failure:
@@ -2774,6 +2821,41 @@
return ERR_PTR(ret);
}
+static int nl80211_parse_sta_channel_info(struct genl_info *info,
+ struct station_parameters *params)
+{
+ if (info->attrs[NL80211_ATTR_STA_SUPPORTED_CHANNELS]) {
+ params->supported_channels =
+ nla_data(info->attrs[NL80211_ATTR_STA_SUPPORTED_CHANNELS]);
+ params->supported_channels_len =
+ nla_len(info->attrs[NL80211_ATTR_STA_SUPPORTED_CHANNELS]);
+ /*
+ * Need to include at least one (first channel, number of
+ * channels) tuple for each subband, and must have proper
+ * tuples for the rest of the data as well.
+ */
+ if (params->supported_channels_len < 2)
+ return -EINVAL;
+ if (params->supported_channels_len % 2)
+ return -EINVAL;
+ }
+
+ if (info->attrs[NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES]) {
+ params->supported_oper_classes =
+ nla_data(info->attrs[NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES]);
+ params->supported_oper_classes_len =
+ nla_len(info->attrs[NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES]);
+ /*
+ * The value of the Length field of the Supported Operating
+ * Classes element is between 2 and 253.
+ */
+ if (params->supported_oper_classes_len < 2 ||
+ params->supported_oper_classes_len > 253)
+ return -EINVAL;
+ }
+ return 0;
+}
+
static struct nla_policy
nl80211_sta_wme_policy[NL80211_STA_WME_MAX + 1] __read_mostly = {
[NL80211_STA_WME_UAPSD_QUEUES] = { .type = NLA_U8 },
@@ -2797,6 +2879,10 @@
params->vht_capa =
nla_data(info->attrs[NL80211_ATTR_VHT_CAPABILITY]);
+ err = nl80211_parse_sta_channel_info(info, params);
+ if (err)
+ return err;
+
/* parse WME attributes if present */
if (!info->attrs[NL80211_ATTR_STA_WME])
return 0;
@@ -3063,6 +3149,10 @@
params.plink_action =
nla_get_u8(info->attrs[NL80211_ATTR_STA_PLINK_ACTION]);
+ err = nl80211_parse_sta_channel_info(info, ¶ms);
+ if (err)
+ return err;
+
if (!rdev->ops->add_station)
return -EOPNOTSUPP;
@@ -5166,6 +5256,57 @@
return cfg80211_leave_ibss(rdev, dev, false);
}
+static struct sk_buff *
+__cfg80211_alloc_vendor_skb(struct cfg80211_registered_device *rdev,
+ int approxlen, u32 portid, u32 seq,
+ enum nl80211_commands cmd,
+ enum nl80211_attrs attr,
+ const struct nl80211_vendor_cmd_info *info,
+ gfp_t gfp)
+{
+ struct sk_buff *skb;
+ void *hdr;
+ struct nlattr *data;
+
+ skb = nlmsg_new(approxlen + 100, gfp);
+ if (!skb)
+ return NULL;
+
+ hdr = nl80211hdr_put(skb, portid, seq, 0, cmd);
+ if (!hdr) {
+ kfree_skb(skb);
+ return NULL;
+ }
+
+ if (nla_put_u32(skb, NL80211_ATTR_WIPHY, rdev->wiphy_idx))
+ goto nla_put_failure;
+
+ if (info) {
+ if (nla_put_u32(skb, NL80211_ATTR_VENDOR_ID,
+ info->vendor_id))
+ goto nla_put_failure;
+ if (nla_put_u32(skb, NL80211_ATTR_VENDOR_SUBCMD,
+ info->subcmd))
+ goto nla_put_failure;
+ }
+
+ data = nla_nest_start(skb, attr);
+
+ ((void **)skb->cb)[0] = rdev;
+ ((void **)skb->cb)[1] = hdr;
+ ((void **)skb->cb)[2] = data;
+
+ return skb;
+
+ nla_put_failure:
+ kfree_skb(skb);
+ return NULL;
+}
+
+static struct genl_multicast_group nl80211_vendor_mcgrp = {
+ .name = "vendor",
+};
+
#ifdef CONFIG_NL80211_TESTMODE
static struct genl_multicast_group nl80211_testmode_mcgrp = {
.name = "testmode",
@@ -5181,11 +5322,11 @@
err = -EOPNOTSUPP;
if (rdev->ops->testmode_cmd) {
- rdev->testmode_info = info;
+ rdev->cur_cmd_info = info;
err = rdev->ops->testmode_cmd(&rdev->wiphy,
nla_data(info->attrs[NL80211_ATTR_TESTDATA]),
nla_len(info->attrs[NL80211_ATTR_TESTDATA]));
- rdev->testmode_info = NULL;
+ rdev->cur_cmd_info = NULL;
}
return err;
@@ -5290,89 +5431,53 @@
return err;
}
-static struct sk_buff *
-__cfg80211_testmode_alloc_skb(struct cfg80211_registered_device *rdev,
- int approxlen, u32 pid, u32 seq, gfp_t gfp)
-{
- struct sk_buff *skb;
- void *hdr;
- struct nlattr *data;
-
- skb = nlmsg_new(approxlen + 100, gfp);
- if (!skb)
- return NULL;
-
- hdr = nl80211hdr_put(skb, pid, seq, 0, NL80211_CMD_TESTMODE);
- if (!hdr) {
- kfree_skb(skb);
- return NULL;
- }
-
- NLA_PUT_U32(skb, NL80211_ATTR_WIPHY, rdev->wiphy_idx);
- data = nla_nest_start(skb, NL80211_ATTR_TESTDATA);
-
- ((void **)skb->cb)[0] = rdev;
- ((void **)skb->cb)[1] = hdr;
- ((void **)skb->cb)[2] = data;
-
- return skb;
-
- nla_put_failure:
- kfree_skb(skb);
- return NULL;
-}
-
-struct sk_buff *cfg80211_testmode_alloc_reply_skb(struct wiphy *wiphy,
- int approxlen)
+struct sk_buff *__cfg80211_alloc_event_skb(struct wiphy *wiphy,
+ enum nl80211_commands cmd,
+ enum nl80211_attrs attr,
+ int vendor_event_idx,
+ int approxlen, gfp_t gfp)
{
struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+ const struct nl80211_vendor_cmd_info *info;
- if (WARN_ON(!rdev->testmode_info))
+ switch (cmd) {
+ case NL80211_CMD_TESTMODE:
+ if (WARN_ON(vendor_event_idx != -1))
+ return NULL;
+ info = NULL;
+ break;
+ case NL80211_CMD_VENDOR:
+ if (WARN_ON(vendor_event_idx < 0 ||
+ vendor_event_idx >= wiphy->n_vendor_events))
+ return NULL;
+ info = &wiphy->vendor_events[vendor_event_idx];
+ break;
+ default:
+ WARN_ON(1);
return NULL;
-
- return __cfg80211_testmode_alloc_skb(rdev, approxlen,
- rdev->testmode_info->snd_pid,
- rdev->testmode_info->snd_seq,
- GFP_KERNEL);
+ }
+ return __cfg80211_alloc_vendor_skb(rdev, approxlen, 0, 0,
+ cmd, attr, info, gfp);
}
-EXPORT_SYMBOL(cfg80211_testmode_alloc_reply_skb);
+EXPORT_SYMBOL(__cfg80211_alloc_event_skb);
-int cfg80211_testmode_reply(struct sk_buff *skb)
+void __cfg80211_send_event_skb(struct sk_buff *skb, gfp_t gfp)
{
struct cfg80211_registered_device *rdev = ((void **)skb->cb)[0];
void *hdr = ((void **)skb->cb)[1];
struct nlattr *data = ((void **)skb->cb)[2];
- if (WARN_ON(!rdev->testmode_info)) {
- kfree_skb(skb);
- return -EINVAL;
- }
-
nla_nest_end(skb, data);
genlmsg_end(skb, hdr);
- return genlmsg_reply(skb, rdev->testmode_info);
+
+ if (data->nla_type == NL80211_ATTR_VENDOR_DATA)
+ genlmsg_multicast_netns(wiphy_net(&rdev->wiphy), skb, 0,
+ nl80211_vendor_mcgrp.id, gfp);
+ else
+ genlmsg_multicast_netns(wiphy_net(&rdev->wiphy), skb, 0,
+ nl80211_testmode_mcgrp.id, gfp);
}
-EXPORT_SYMBOL(cfg80211_testmode_reply);
-
-struct sk_buff *cfg80211_testmode_alloc_event_skb(struct wiphy *wiphy,
- int approxlen, gfp_t gfp)
-{
- struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
-
- return __cfg80211_testmode_alloc_skb(rdev, approxlen, 0, 0, gfp);
-}
-EXPORT_SYMBOL(cfg80211_testmode_alloc_event_skb);
-
-void cfg80211_testmode_event(struct sk_buff *skb, gfp_t gfp)
-{
- void *hdr = ((void **)skb->cb)[1];
- struct nlattr *data = ((void **)skb->cb)[2];
-
- nla_nest_end(skb, data);
- genlmsg_end(skb, hdr);
- genlmsg_multicast(skb, 0, nl80211_testmode_mcgrp.id, gfp);
-}
-EXPORT_SYMBOL(cfg80211_testmode_event);
+EXPORT_SYMBOL(__cfg80211_send_event_skb);
#endif
static int nl80211_connect(struct sk_buff *skb, struct genl_info *info)
@@ -6590,6 +6695,105 @@
return rdev->ops->update_ft_ies(&rdev->wiphy, dev, &ft_params);
}
+static int nl80211_vendor_cmd(struct sk_buff *skb, struct genl_info *info)
+{
+ struct cfg80211_registered_device *rdev = info->user_ptr[0];
+ struct net_device *dev = info->user_ptr[1];
+ struct wireless_dev *wdev = dev->ieee80211_ptr;
+ int i, err;
+ u32 vid, subcmd;
+
+ if (!rdev->wiphy.vendor_commands)
+ return -EOPNOTSUPP;
+
+ if (IS_ERR(wdev)) {
+ err = PTR_ERR(wdev);
+ if (err != -EINVAL)
+ return err;
+ wdev = NULL;
+ } else if (wdev->wiphy != &rdev->wiphy) {
+ return -EINVAL;
+ }
+
+ if (!info->attrs[NL80211_ATTR_VENDOR_ID] ||
+ !info->attrs[NL80211_ATTR_VENDOR_SUBCMD])
+ return -EINVAL;
+
+ vid = nla_get_u32(info->attrs[NL80211_ATTR_VENDOR_ID]);
+ subcmd = nla_get_u32(info->attrs[NL80211_ATTR_VENDOR_SUBCMD]);
+ for (i = 0; i < rdev->wiphy.n_vendor_commands; i++) {
+ const struct wiphy_vendor_command *vcmd;
+ void *data = NULL;
+ int len = 0;
+
+ vcmd = &rdev->wiphy.vendor_commands[i];
+
+ if (vcmd->info.vendor_id != vid || vcmd->info.subcmd != subcmd)
+ continue;
+
+ if (vcmd->flags & (WIPHY_VENDOR_CMD_NEED_WDEV |
+ WIPHY_VENDOR_CMD_NEED_NETDEV)) {
+ if (!wdev)
+ return -EINVAL;
+ if (vcmd->flags & WIPHY_VENDOR_CMD_NEED_NETDEV &&
+ !wdev->netdev)
+ return -EINVAL;
+
+ if (vcmd->flags & WIPHY_VENDOR_CMD_NEED_RUNNING) {
+ if (wdev->netdev &&
+ !netif_running(wdev->netdev))
+ return -ENETDOWN;
+ }
+ } else {
+ wdev = NULL;
+ }
+
+ if (info->attrs[NL80211_ATTR_VENDOR_DATA]) {
+ data = nla_data(info->attrs[NL80211_ATTR_VENDOR_DATA]);
+ len = nla_len(info->attrs[NL80211_ATTR_VENDOR_DATA]);
+ }
+
+ return rdev->wiphy.vendor_commands[i].doit(&rdev->wiphy, wdev,
+ data, len);
+ }
+
+ return -EOPNOTSUPP;
+}
+
+struct sk_buff *__cfg80211_alloc_reply_skb(struct wiphy *wiphy,
+ enum nl80211_commands cmd,
+ enum nl80211_attrs attr,
+ int approxlen)
+{
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
+
+ if (WARN_ON(!rdev->cur_cmd_info))
+ return NULL;
+
+ return __cfg80211_alloc_vendor_skb(rdev, approxlen,
+ 0,
+ 0,
+ cmd, attr, NULL, GFP_KERNEL);
+}
+EXPORT_SYMBOL(__cfg80211_alloc_reply_skb);
+
+int cfg80211_vendor_cmd_reply(struct sk_buff *skb)
+{
+ struct cfg80211_registered_device *rdev = ((void **)skb->cb)[0];
+ void *hdr = ((void **)skb->cb)[1];
+ struct nlattr *data = ((void **)skb->cb)[2];
+
+ if (WARN_ON(!rdev->cur_cmd_info)) {
+ kfree_skb(skb);
+ return -EINVAL;
+ }
+
+ nla_nest_end(skb, data);
+ genlmsg_end(skb, hdr);
+ return genlmsg_reply(skb, rdev->cur_cmd_info);
+}
+EXPORT_SYMBOL(cfg80211_vendor_cmd_reply);
+
#define NL80211_FLAG_NEED_WIPHY 0x01
#define NL80211_FLAG_NEED_NETDEV 0x02
#define NL80211_FLAG_NEED_RTNL 0x04
@@ -7194,7 +7398,14 @@
.internal_flags = NL80211_FLAG_NEED_NETDEV_UP |
NL80211_FLAG_NEED_RTNL,
},
-
+ {
+ .cmd = NL80211_CMD_VENDOR,
+ .doit = nl80211_vendor_cmd,
+ .policy = nl80211_policy,
+ .flags = GENL_ADMIN_PERM,
+ .internal_flags = NL80211_FLAG_NEED_WIPHY |
+ NL80211_FLAG_NEED_RTNL,
+ },
};
static struct genl_multicast_group nl80211_mlme_mcgrp = {
@@ -8517,6 +8728,9 @@
if (err)
goto err_out;
#endif
+ err = genl_register_mc_group(&nl80211_fam, &nl80211_vendor_mcgrp);
+ if (err)
+ goto err_out;
err = netlink_register_notifier(&nl80211_netlink_notifier);
if (err)
diff --git a/net/wireless/reg.c b/net/wireless/reg.c
index b094741..78aa256 100755
--- a/net/wireless/reg.c
+++ b/net/wireless/reg.c
@@ -1184,7 +1184,10 @@
enum nl80211_reg_initiator setby)
{
mutex_lock(®_mutex);
- wiphy_update_regulatory(wiphy, setby);
+ if (last_request)
+ wiphy_update_regulatory(wiphy, last_request->initiator);
+ else
+ wiphy_update_regulatory(wiphy, setby);
mutex_unlock(®_mutex);
}
diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c
old mode 100644
new mode 100755
index af648e0..120e0dc
--- a/net/wireless/wext-core.c
+++ b/net/wireless/wext-core.c
@@ -19,7 +19,9 @@
#include <net/netlink.h>
#include <net/wext.h>
#include <net/net_namespace.h>
-
+#ifdef KW_TAINT_ANALYSIS
+ extern void * get_tainted_stuff();
+#endif
typedef int (*wext_ioctl_func)(struct net_device *, struct iwreq *,
unsigned int, struct iw_request_info *,
iw_handler);
@@ -1006,8 +1008,13 @@
int wext_handle_ioctl(struct net *net, struct ifreq *ifr, unsigned int cmd,
- void __user *arg)
+ void __user *arg_actual)
{
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *arg = (void __user *)get_tainted_stuff();
+ #else
+ void __user *arg = (void __user *)arg_actual;
+ #endif
struct iw_request_info info = { .cmd = cmd, .flags = 0 };
int ret;
@@ -1056,7 +1063,11 @@
int compat_wext_handle_ioctl(struct net *net, unsigned int cmd,
unsigned long arg)
{
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *argp = (void __user *)get_tainted_stuff();
+ #else
void __user *argp = (void __user *)arg;
+ #endif
struct iw_request_info info;
struct iwreq iwr;
char *colon;
diff --git a/net/x25/af_x25.c b/net/x25/af_x25.c
old mode 100644
new mode 100755
index a306bc6..c143046
--- a/net/x25/af_x25.c
+++ b/net/x25/af_x25.c
@@ -59,7 +59,9 @@
#include <net/x25.h>
#include <net/compat.h>
-
+#ifdef KW_TAINT_ANALYSIS
+ extern void * get_tainted_stuff();
+#endif
int sysctl_x25_restart_request_timeout = X25_DEFAULT_T20;
int sysctl_x25_call_request_timeout = X25_DEFAULT_T21;
int sysctl_x25_reset_request_timeout = X25_DEFAULT_T22;
@@ -1625,7 +1627,7 @@
#ifdef CONFIG_COMPAT
static int compat_x25_subscr_ioctl(unsigned int cmd,
- struct compat_x25_subscrip_struct __user *x25_subscr32)
+ struct compat_x25_subscrip_struct __user *x25_subscr32_actual)
{
struct compat_x25_subscrip_struct x25_subscr;
struct x25_neigh *nb;
@@ -1633,6 +1635,11 @@
int rc = -EINVAL;
rc = -EFAULT;
+ #ifdef KW_TAINT_ANALYSIS
+ struct compat_x25_subscrip_struct __user *x25_subscr32 = (struct compat_x25_subscrip_struct __user *)get_tainted_stuff();
+ #else
+ struct compat_x25_subscrip_struct __user *x25_subscr32 = x25_subscr32_actual;
+ #endif
if (copy_from_user(&x25_subscr, x25_subscr32, sizeof(*x25_subscr32)))
goto out;
@@ -1675,7 +1682,11 @@
static int compat_x25_ioctl(struct socket *sock, unsigned int cmd,
unsigned long arg)
{
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *argp = (void __user *)get_tainted_stuff();
+ #else
void __user *argp = compat_ptr(arg);
+ #endif
struct sock *sk = sock->sk;
int rc = -ENOIOCTLCMD;
diff --git a/net/x25/x25_link.c b/net/x25/x25_link.c
old mode 100644
new mode 100755
index 4acacf3..c82fcc2
--- a/net/x25/x25_link.c
+++ b/net/x25/x25_link.c
@@ -31,6 +31,9 @@
#include <linux/init.h>
#include <net/x25.h>
+#ifdef KW_TAINT_ANALYSIS
+ extern void * get_tainted_stuff();
+#endif
LIST_HEAD(x25_neigh_list);
DEFINE_RWLOCK(x25_neigh_list_lock);
@@ -338,13 +341,17 @@
/*
* Handle the ioctls that control the subscription functions.
*/
-int x25_subscr_ioctl(unsigned int cmd, void __user *arg)
+int x25_subscr_ioctl(unsigned int cmd, void __user *arg_actual)
{
struct x25_subscrip_struct x25_subscr;
struct x25_neigh *nb;
struct net_device *dev;
int rc = -EINVAL;
-
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *arg = (void __user *)get_tainted_stuff();
+ #else
+ void __user *arg = arg_actual;
+ #endif
if (cmd != SIOCX25GSUBSCRIP && cmd != SIOCX25SSUBSCRIP)
goto out;
diff --git a/net/x25/x25_route.c b/net/x25/x25_route.c
old mode 100644
new mode 100755
index cf63662..7a1778a
--- a/net/x25/x25_route.c
+++ b/net/x25/x25_route.c
@@ -21,7 +21,9 @@
#include <linux/init.h>
#include <linux/slab.h>
#include <net/x25.h>
-
+#ifdef KW_TAINT_ANALYSIS
+ extern void * get_tainted_stuff();
+#endif
LIST_HEAD(x25_route_list);
DEFINE_RWLOCK(x25_route_list_lock);
@@ -179,12 +181,16 @@
/*
* Handle the ioctls that control the routing functions.
*/
-int x25_route_ioctl(unsigned int cmd, void __user *arg)
+int x25_route_ioctl(unsigned int cmd, void __user *arg_actual)
{
struct x25_route_struct rt;
struct net_device *dev;
int rc = -EINVAL;
-
+ #ifdef KW_TAINT_ANALYSIS
+ void __user *arg = (void __user *)get_tainted_stuff();
+ #else
+ void __user *arg = arg_actual;
+ #endif
if (cmd != SIOCADDRT && cmd != SIOCDELRT)
goto out;
diff --git a/sound/core/jack.c b/sound/core/jack.c
index 9e2e085..6e2dbdb 100644
--- a/sound/core/jack.c
+++ b/sound/core/jack.c
@@ -35,6 +35,7 @@
SW_HPHL_OVERCURRENT,
SW_HPHR_OVERCURRENT,
SW_UNSUPPORT_INSERT,
+ SW_MICROPHONE2_INSERT,
};
static int snd_jack_dev_free(struct snd_device *device)
diff --git a/sound/soc/codecs/msm8x10-wcd.c b/sound/soc/codecs/msm8x10-wcd.c
index 87416dd..452bbab 100644
--- a/sound/soc/codecs/msm8x10-wcd.c
+++ b/sound/soc/codecs/msm8x10-wcd.c
@@ -167,6 +167,10 @@
"cdc-vdda-cp",
};
+static int on_demand_regulator_control(struct on_demand_supply *supply,
+ bool enable,
+ u8 shift);
+
struct msm8x10_wcd_priv {
struct snd_soc_codec *codec;
u32 adc_count;
@@ -178,7 +182,6 @@
/* mbhc module */
struct wcd9xxx_mbhc mbhc;
- struct delayed_work hs_detect_work;
struct wcd9xxx_mbhc_config *mbhc_cfg;
/*
@@ -186,6 +189,7 @@
* end of impedance measurement
*/
struct list_head reg_save_restore;
+ u32 micb_en_count;
};
static unsigned short rx_digital_gain_reg[] = {
@@ -298,7 +302,6 @@
return ret;
}
}
- pr_debug("write sucess register = %x val = %x\n", reg, data[1]);
return 0;
}
@@ -347,7 +350,6 @@
}
}
}
- pr_debug("%s: reg 0x%x = 0x%x\n", __func__, reg, *dest);
return 0;
}
@@ -397,6 +399,32 @@
return temp;
}
+static int __msm8x10_wcd_bulk_write(struct msm8x10_wcd *msm8x10_wcd,
+ unsigned short reg, int count, u8 *buf)
+{
+ int ret = -EINVAL;
+ mutex_lock(&msm8x10_wcd->io_lock);
+ if (MSM8X10_WCD_IS_HELICON_REG(reg))
+ ret = msm8x10_wcd_i2c_write(reg, count, buf);
+ else if (MSM8X10_WCD_IS_DINO_REG(reg))
+ ret = msm8x10_wcd_abh_write_device(msm8x10_wcd, reg,
+ buf, count);
+ if (ret < 0)
+ dev_err(msm8x10_wcd->dev,
+ "%s: codec bulk write failed\n", __func__);
+ mutex_unlock(&msm8x10_wcd->io_lock);
+ return ret;
+}
+
+int msm8x10_wcd_bulk_write(struct wcd9xxx_core_resource *core_res,
+ unsigned short reg, int count, u8 *buf)
+{
+ struct msm8x10_wcd *msm8x10_wcd =
+ (struct msm8x10_wcd *) core_res->parent;
+ return __msm8x10_wcd_bulk_write(msm8x10_wcd, reg, count, buf);
+}
+EXPORT_SYMBOL(msm8x10_wcd_bulk_write);
+
int msm8x10_wcd_reg_read(struct wcd9xxx_core_resource *core_res,
unsigned short reg)
{
@@ -453,8 +481,8 @@
__func__, reg);
else
dev_dbg(msm8x10_wcd->dev,
- "%s: Write %x to R%d(0x%x)\n",
- __func__, val, reg, reg);
+ "%s: Write 0x%x to 0x%x\n",
+ __func__, val, reg);
return ret;
}
@@ -490,8 +518,6 @@
* Registers lower than 0x100 are top level registers which can be
* written by the Taiko core driver.
*/
- dev_dbg(codec->dev, "%s: reg 0x%x\n", __func__, reg);
-
if ((reg >= MSM8X10_WCD_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
return 1;
@@ -527,7 +553,7 @@
unsigned int value)
{
int ret;
- dev_dbg(codec->dev, "%s: Write from reg 0x%x\n", __func__, reg);
+ dev_dbg(codec->dev, "%s: Write to reg 0x%x\n", __func__, reg);
if (reg == SND_SOC_NOPM)
return 0;
@@ -758,6 +784,39 @@
return NULL;
}
+static int on_demand_regulator_control(struct on_demand_supply *supply,
+ bool enable,
+ u8 shift)
+{
+ int ret = 0;
+
+ if (!supply || !supply->supply)
+ return 0;
+
+ if (enable) {
+ if (atomic_inc_return(&supply->ref) == 1)
+ ret = regulator_enable(supply->supply);
+ if (ret)
+ pr_err("%s: Failed to enable %s\n",
+ __func__,
+ on_demand_supply_name[shift]);
+ } else {
+ if (atomic_read(&supply->ref) == 0) {
+ pr_debug("%s: %s supply has been disabled.\n",
+ __func__, on_demand_supply_name[shift]);
+ return 0;
+ }
+ if (atomic_dec_return(&supply->ref) == 0)
+ ret = regulator_disable(supply->supply);
+ if (ret)
+ pr_err("%s: Failed to disable %s\n",
+ __func__,
+ on_demand_supply_name[shift]);
+ }
+
+ return ret;
+}
+
static int msm8x10_wcd_codec_enable_on_demand_supply(
struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
@@ -783,25 +842,14 @@
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
- if (atomic_inc_return(&supply->ref) == 1)
- ret = regulator_enable(supply->supply);
- if (ret)
- dev_err(codec->dev, "%s: Failed to enable %s\n",
- __func__,
- on_demand_supply_name[w->shift]);
+ ret = on_demand_regulator_control(supply,
+ true,
+ w->shift);
break;
case SND_SOC_DAPM_POST_PMD:
- if (atomic_read(&supply->ref) == 0) {
- dev_dbg(codec->dev, "%s: %s supply has been disabled.\n",
- __func__, on_demand_supply_name[w->shift]);
- goto out;
- }
- if (atomic_dec_return(&supply->ref) == 0)
- ret = regulator_disable(supply->supply);
- if (ret)
- dev_err(codec->dev, "%s: Failed to disable %s\n",
- __func__,
- on_demand_supply_name[w->shift]);
+ ret = on_demand_regulator_control(supply,
+ false,
+ w->shift);
break;
default:
break;
@@ -1650,6 +1698,9 @@
snd_soc_update_bits(codec, micb_int_reg, 0x04, 0x04);
snd_soc_update_bits(codec, MSM8X10_WCD_A_MICB_1_CTL,
0x80, 0x80);
+ msm8x10_wcd->micb_en_count++;
+ pr_debug("%s micb_en_count : %d", __func__,
+ msm8x10_wcd->micb_en_count);
break;
case SND_SOC_DAPM_POST_PMU:
usleep_range(20000, 20100);
@@ -1657,6 +1708,10 @@
wcd9xxx_resmgr_notifier_call(&msm8x10_wcd->resmgr, e_post_on);
break;
case SND_SOC_DAPM_POST_PMD:
+ if (msm8x10_wcd->micb_en_count > 0)
+ msm8x10_wcd->micb_en_count--;
+ pr_debug("%s micb_en_count : %d", __func__,
+ msm8x10_wcd->micb_en_count);
snd_soc_update_bits(codec, MSM8X10_WCD_A_MICB_1_CTL,
0x80, 0x00);
/* Let MBHC module know so micbias switch to be off */
@@ -2574,8 +2629,6 @@
/* Disable internal biasing path which can cause leakage */
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_BIAS_CURR_CTL_2, 0x04),
- /* Enable pulldown to reduce leakage */
- MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_MICB_1_CTL, 0x82),
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_TX_COM_BIAS, 0xE0),
/* Keep the same default gain settings for TX paths */
MSM8X10_WCD_REG_VAL(MSM8X10_WCD_A_TX_1_EN, 0x32),
@@ -2714,18 +2767,33 @@
}
static int msm8x10_wcd_enable_ext_mb_source(struct snd_soc_codec *codec,
- bool turn_on)
+ bool turn_on,
+ bool use_dapm)
{
int ret = 0;
- if (turn_on)
- ret = snd_soc_dapm_force_enable_pin(&codec->dapm,
- "MICBIAS_REGULATOR");
- else
- ret = snd_soc_dapm_disable_pin(&codec->dapm,
- "MICBIAS_REGULATOR");
+ if (use_dapm) {
+ if (turn_on)
+ ret = snd_soc_dapm_force_enable_pin(&codec->dapm,
+ "MICBIAS_REGULATOR");
+ else
+ ret = snd_soc_dapm_disable_pin(&codec->dapm,
+ "MICBIAS_REGULATOR");
- snd_soc_dapm_sync(&codec->dapm);
+ snd_soc_dapm_sync(&codec->dapm);
+ } else {
+ struct on_demand_supply *supply;
+ struct msm8x10_wcd_priv *msm8x10_wcd =
+ snd_soc_codec_get_drvdata(codec);
+
+ supply = &msm8x10_wcd->on_demand_list[ON_DEMAND_MICBIAS];
+ if (!supply || !supply->supply || !msm8x10_wcd)
+ return 0;
+
+ ret = on_demand_regulator_control(supply,
+ turn_on,
+ ON_DEMAND_MICBIAS);
+ }
if (ret)
dev_err(codec->dev, "%s: Failed to %s external micbias source\n",
@@ -2738,20 +2806,33 @@
}
static int msm8x10_wcd_enable_mbhc_micbias(struct snd_soc_codec *codec,
- bool enable)
+ bool enable,
+ enum wcd9xxx_micbias_num micb_num)
{
int rc;
+ struct msm8x10_wcd_priv *msm8x10_wcd = snd_soc_codec_get_drvdata(codec);
+
+ if (micb_num != MBHC_MICBIAS1) {
+ rc = -EINVAL;
+ goto err;
+ }
if (enable)
rc = snd_soc_dapm_force_enable_pin(&codec->dapm,
DAPM_MICBIAS_EXTERNAL_STANDALONE);
- else
+ else {
+ if (msm8x10_wcd->micb_en_count > 0) {
+ msm8x10_wcd->micb_en_count--;
+ pr_debug("%s micb_en_count : %d", __func__,
+ msm8x10_wcd->micb_en_count);
+ return 0;
+ }
rc = snd_soc_dapm_disable_pin(&codec->dapm,
DAPM_MICBIAS_EXTERNAL_STANDALONE);
+ }
snd_soc_dapm_sync(&codec->dapm);
- snd_soc_update_bits(codec, WCD9XXX_A_MICB_1_CTL,
- 0x80, enable ? 0x80 : 0x00);
+err:
if (rc)
pr_debug("%s: Failed to force %s micbias", __func__,
enable ? "enable" : "disable");
@@ -3011,33 +3092,18 @@
.compute_impedance = msm8x10_wcd_compute_impedance,
};
-static void delayed_hs_detect_fn(struct work_struct *work)
-{
- struct delayed_work *delayed_work;
- struct msm8x10_wcd_priv *wcd_priv;
-
- delayed_work = to_delayed_work(work);
- wcd_priv = container_of(delayed_work, struct msm8x10_wcd_priv,
- hs_detect_work);
-
- if (!wcd_priv) {
- pr_err("%s: Invalid private data for codec\n", __func__);
- return;
- }
-
- wcd9xxx_mbhc_start(&wcd_priv->mbhc, wcd_priv->mbhc_cfg);
-}
-
-
int msm8x10_wcd_hs_detect(struct snd_soc_codec *codec,
struct wcd9xxx_mbhc_config *mbhc_cfg)
{
struct msm8x10_wcd_priv *wcd = snd_soc_codec_get_drvdata(codec);
+ if (!wcd) {
+ dev_err(codec->dev, "%s: Invalid private data for codec\n",
+ __func__);
+ return -EINVAL;
+ }
wcd->mbhc_cfg = mbhc_cfg;
- schedule_delayed_work(&wcd->hs_detect_work,
- msecs_to_jiffies(5000));
- return 0;
+ return wcd9xxx_mbhc_start(&wcd->mbhc, wcd->mbhc_cfg);
}
EXPORT_SYMBOL_GPL(msm8x10_wcd_hs_detect);
@@ -3204,8 +3270,6 @@
msm8x10_wcd = codec->control_data;
msm8x10_wcd->pdino_base = ioremap(MSM8X10_DINO_CODEC_BASE_ADDR,
MSM8X10_DINO_CODEC_REG_SIZE);
- INIT_DELAYED_WORK(&msm8x10_wcd_priv->hs_detect_work,
- delayed_hs_detect_fn);
pdata = dev_get_platdata(msm8x10_wcd->dev);
if (!pdata) {
@@ -3241,6 +3305,8 @@
on_demand_supply_name[ON_DEMAND_MICBIAS]);
atomic_set(&msm8x10_wcd_priv->on_demand_list[ON_DEMAND_MICBIAS].ref, 0);
+ msm8x10_wcd_priv->micb_en_count = 0;
+
ret = wcd9xxx_mbhc_init(&msm8x10_wcd_priv->mbhc,
&msm8x10_wcd_priv->resmgr,
codec, msm8x10_wcd_enable_mbhc_micbias,
@@ -3618,7 +3684,8 @@
MSM8X10_WCD_NUM_IRQ_REGS,
msm8x10_wcd_reg_read,
msm8x10_wcd_reg_write,
- msm8x10_wcd_bulk_read);
+ msm8x10_wcd_bulk_read,
+ msm8x10_wcd_bulk_write);
if (wcd9xxx_core_irq_init(core_res)) {
dev_err(msm8x10->dev,
"%s: irq initialization failed\n", __func__);
diff --git a/sound/soc/codecs/wcd9306.c b/sound/soc/codecs/wcd9306.c
index 07f4a5b..dd50020 100644
--- a/sound/soc/codecs/wcd9306.c
+++ b/sound/soc/codecs/wcd9306.c
@@ -2284,16 +2284,23 @@
}
/* called under codec_resource_lock acquisition */
-static int tapan_enable_mbhc_micbias(struct snd_soc_codec *codec, bool enable)
+static int tapan_enable_mbhc_micbias(struct snd_soc_codec *codec, bool enable,
+ enum wcd9xxx_micbias_num micb_num)
{
int rc;
+ const char *micbias;
+
+ if (micb_num == MBHC_MICBIAS2)
+ micbias = DAPM_MICBIAS2_EXTERNAL_STANDALONE;
+ else
+ return -EINVAL;
if (enable)
rc = snd_soc_dapm_force_enable_pin(&codec->dapm,
- DAPM_MICBIAS2_EXTERNAL_STANDALONE);
+ micbias);
else
rc = snd_soc_dapm_disable_pin(&codec->dapm,
- DAPM_MICBIAS2_EXTERNAL_STANDALONE);
+ micbias);
if (!rc)
snd_soc_dapm_sync(&codec->dapm);
pr_debug("%s: leave ret %d\n", __func__, rc);
@@ -5516,7 +5523,8 @@
mux_wait_us + WCD9XXX_USLEEP_RANGE_MARGIN_US);
break;
case PA_DISABLE:
- wcd9xxx_enable_static_pa(mbhc, false);
+ if (!mbhc->hph_pa_dac_state)
+ wcd9xxx_enable_static_pa(mbhc, false);
wcd9xxx_restore_registers(codec, &tapan->reg_save_restore);
break;
}
diff --git a/sound/soc/codecs/wcd9320.c b/sound/soc/codecs/wcd9320.c
index f874c43..5dedec8 100644
--- a/sound/soc/codecs/wcd9320.c
+++ b/sound/soc/codecs/wcd9320.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -48,6 +48,7 @@
#define TAIKO_HPH_PA_SETTLE_COMP_OFF 13000
#define DAPM_MICBIAS2_EXTERNAL_STANDALONE "MIC BIAS2 External Standalone"
+#define DAPM_MICBIAS3_EXTERNAL_STANDALONE "MIC BIAS3 External Standalone"
/* RX_HPH_CNP_WG_TIME increases by 0.24ms */
#define TAIKO_WG_TIME_FACTOR_US 240
@@ -2823,16 +2824,26 @@
}
/* called under codec_resource_lock acquisition */
-static int taiko_enable_mbhc_micbias(struct snd_soc_codec *codec, bool enable)
+static int taiko_enable_mbhc_micbias(struct snd_soc_codec *codec, bool enable,
+ enum wcd9xxx_micbias_num micb_num)
{
int rc;
+ const char *micbias;
+
+ if (micb_num != MBHC_MICBIAS3 &&
+ micb_num != MBHC_MICBIAS2)
+ return -EINVAL;
+
+ micbias = (micb_num == MBHC_MICBIAS3) ?
+ DAPM_MICBIAS3_EXTERNAL_STANDALONE :
+ DAPM_MICBIAS2_EXTERNAL_STANDALONE;
if (enable)
rc = snd_soc_dapm_force_enable_pin(&codec->dapm,
- DAPM_MICBIAS2_EXTERNAL_STANDALONE);
+ micbias);
else
rc = snd_soc_dapm_disable_pin(&codec->dapm,
- DAPM_MICBIAS2_EXTERNAL_STANDALONE);
+ micbias);
if (!rc)
snd_soc_dapm_sync(&codec->dapm);
pr_debug("%s: leave ret %d\n", __func__, rc);
@@ -4013,6 +4024,7 @@
{"MIC BIAS3 External", NULL, "LDO_H"},
{"MIC BIAS4 External", NULL, "LDO_H"},
{DAPM_MICBIAS2_EXTERNAL_STANDALONE, NULL, "LDO_H Standalone"},
+ {DAPM_MICBIAS3_EXTERNAL_STANDALONE, NULL, "LDO_H Standalone"},
};
static int taiko_readable(struct snd_soc_codec *ssc, unsigned int reg)
@@ -5135,6 +5147,24 @@
return 0;
}
+static int taiko_codec_iir_mux_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct snd_soc_codec *codec = w->codec;
+
+ pr_debug("%s: event = %d\n", __func__, event);
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ snd_soc_write(codec, w->reg, snd_soc_read(codec, w->reg));
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ snd_soc_write(codec, w->reg, snd_soc_read(codec, w->reg));
+ break;
+ }
+ return 0;
+}
+
static int taiko_codec_dsm_mux_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
@@ -5535,6 +5565,10 @@
taiko_codec_enable_micbias,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_MICBIAS_E(DAPM_MICBIAS3_EXTERNAL_STANDALONE, SND_SOC_NOPM,
+ 7, 0, taiko_codec_enable_micbias,
+ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+ SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", SND_SOC_NOPM, 7, 0,
taiko_codec_enable_micbias,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
@@ -5629,10 +5663,16 @@
SND_SOC_DAPM_POST_PMD),
/* Sidetone */
- SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
+ SND_SOC_DAPM_MUX_E("IIR1 INP1 MUX", TAIKO_A_CDC_IIR1_GAIN_B1_CTL, 0, 0,
+ &iir1_inp1_mux, taiko_codec_iir_mux_event,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
SND_SOC_DAPM_MIXER("IIR1", TAIKO_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
- SND_SOC_DAPM_MUX("IIR2 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir2_inp1_mux),
+ SND_SOC_DAPM_MUX_E("IIR2 INP1 MUX", TAIKO_A_CDC_IIR2_GAIN_B1_CTL, 0, 0,
+ &iir2_inp1_mux, taiko_codec_iir_mux_event,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
SND_SOC_DAPM_MIXER("IIR2", TAIKO_A_CDC_CLK_SD_CTL, 1, 0, NULL, 0),
/* AUX PGA */
@@ -6466,7 +6506,7 @@
__wr(WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL, 0xFF, 0x10);
/* Reset MBHC and set it up for STA */
__wr(WCD9XXX_A_CDC_MBHC_CLK_CTL, 0xFF, 0x0A);
- __wr(WCD9XXX_A_CDC_MBHC_EN_CTL, 0xFF, 0x02);
+ snd_soc_write(codec, WCD9XXX_A_CDC_MBHC_EN_CTL, 0x2);
__wr(WCD9XXX_A_CDC_MBHC_CLK_CTL, 0xFF, 0x02);
/* Set HPH_MBHC for zdet */
@@ -6497,7 +6537,8 @@
/* Clean up starts */
/* Turn off PA ramp generator */
snd_soc_write(codec, WCD9XXX_A_CDC_PA_RAMP_B1_CTL, 0x0);
- wcd9xxx_enable_static_pa(mbhc, false);
+ if (!mbhc->hph_pa_dac_state)
+ wcd9xxx_enable_static_pa(mbhc, false);
wcd9xxx_restore_registers(codec, &taiko->reg_save_restore);
break;
}
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.c b/sound/soc/codecs/wcd9xxx-mbhc.c
index 32ca0c6..4426e4a 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.c
+++ b/sound/soc/codecs/wcd9xxx-mbhc.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -43,7 +43,7 @@
#define WCD9XXX_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | \
SND_JACK_OC_HPHR | SND_JACK_LINEOUT | \
- SND_JACK_UNSUPPORTED)
+ SND_JACK_UNSUPPORTED | SND_JACK_MICROPHONE2)
#define WCD9XXX_JACK_BUTTON_MASK (SND_JACK_BTN_0 | SND_JACK_BTN_1 | \
SND_JACK_BTN_2 | SND_JACK_BTN_3 | \
SND_JACK_BTN_4 | SND_JACK_BTN_5 | \
@@ -64,6 +64,7 @@
#define STATUS_REL_DETECTION 0x0C
#define HS_DETECT_PLUG_TIME_MS (5 * 1000)
+#define ANC_HPH_DETECT_PLUG_TIME_MS (5 * 1000)
#define HS_DETECT_PLUG_INERVAL_MS 100
#define SWCH_REL_DEBOUNCE_TIME_MS 50
#define SWCH_IRQ_DEBOUNCE_TIME_US 5000
@@ -179,7 +180,10 @@
uint32_t *zr);
static s16 wcd9xxx_get_current_v(struct wcd9xxx_mbhc *mbhc,
const enum wcd9xxx_current_v_idx idx);
-static void wcd9xxx_get_z(struct wcd9xxx_mbhc *mbhc, s16 *dce_z, s16 *sta_z);
+static void wcd9xxx_get_z(struct wcd9xxx_mbhc *mbhc, s16 *dce_z, s16 *sta_z,
+ struct mbhc_micbias_regs *micb_regs,
+ bool norel);
+
static void wcd9xxx_mbhc_calc_thres(struct wcd9xxx_mbhc *mbhc);
static bool wcd9xxx_mbhc_polling(struct wcd9xxx_mbhc *mbhc)
@@ -610,13 +614,23 @@
}
static void wcd9xxx_get_mbhc_micbias_regs(struct wcd9xxx_mbhc *mbhc,
- struct mbhc_micbias_regs *micbias_regs)
+ enum wcd9xxx_mbhc_micbias_type mb_type)
{
unsigned int cfilt;
struct wcd9xxx_micbias_setting *micbias_pdata =
mbhc->resmgr->micbias_pdata;
+ struct mbhc_micbias_regs *micbias_regs;
+ enum wcd9xxx_micbias_num mb_num;
- switch (mbhc->mbhc_cfg->micbias) {
+ if (mb_type == MBHC_ANC_MIC_MB) {
+ micbias_regs = &mbhc->mbhc_anc_bias_regs;
+ mb_num = mbhc->mbhc_cfg->anc_micbias;
+ } else {
+ micbias_regs = &mbhc->mbhc_bias_regs;
+ mb_num = mbhc->mbhc_cfg->micbias;
+ }
+
+ switch (mb_num) {
case MBHC_MICBIAS1:
cfilt = micbias_pdata->bias1_cfilt_sel;
micbias_regs->mbhc_reg = WCD9XXX_A_MICB_1_MBHC;
@@ -654,19 +668,31 @@
case WCD9XXX_CFILT1_SEL:
micbias_regs->cfilt_val = WCD9XXX_A_MICB_CFILT_1_VAL;
micbias_regs->cfilt_ctl = WCD9XXX_A_MICB_CFILT_1_CTL;
- mbhc->mbhc_data.micb_mv = micbias_pdata->cfilt1_mv;
break;
case WCD9XXX_CFILT2_SEL:
micbias_regs->cfilt_val = WCD9XXX_A_MICB_CFILT_2_VAL;
micbias_regs->cfilt_ctl = WCD9XXX_A_MICB_CFILT_2_CTL;
- mbhc->mbhc_data.micb_mv = micbias_pdata->cfilt2_mv;
break;
case WCD9XXX_CFILT3_SEL:
micbias_regs->cfilt_val = WCD9XXX_A_MICB_CFILT_3_VAL;
micbias_regs->cfilt_ctl = WCD9XXX_A_MICB_CFILT_3_CTL;
- mbhc->mbhc_data.micb_mv = micbias_pdata->cfilt3_mv;
break;
}
+
+ if (mb_type == MBHC_PRIMARY_MIC_MB) {
+ switch (cfilt) {
+ case WCD9XXX_CFILT1_SEL:
+ mbhc->mbhc_data.micb_mv = micbias_pdata->cfilt1_mv;
+ break;
+ case WCD9XXX_CFILT2_SEL:
+ mbhc->mbhc_data.micb_mv = micbias_pdata->cfilt2_mv;
+ break;
+ case WCD9XXX_CFILT3_SEL:
+ mbhc->mbhc_data.micb_mv = micbias_pdata->cfilt3_mv;
+ break;
+ }
+ }
+
}
static void wcd9xxx_clr_and_turnon_hph_padac(struct wcd9xxx_mbhc *mbhc)
@@ -819,7 +845,8 @@
if (mbhc->micbias_enable && mbhc->micbias_enable_cb) {
pr_debug("%s: Disabling micbias\n", __func__);
- mbhc->micbias_enable_cb(mbhc->codec, false);
+ mbhc->micbias_enable_cb(mbhc->codec, false,
+ mbhc->mbhc_cfg->micbias);
mbhc->micbias_enable = false;
}
mbhc->zl = mbhc->zr = 0;
@@ -845,7 +872,8 @@
if (mbhc->micbias_enable && mbhc->micbias_enable_cb &&
mbhc->hph_status == SND_JACK_HEADSET) {
pr_debug("%s: Disabling micbias\n", __func__);
- mbhc->micbias_enable_cb(mbhc->codec, false);
+ mbhc->micbias_enable_cb(mbhc->codec, false,
+ mbhc->mbhc_cfg->micbias);
mbhc->micbias_enable = false;
}
@@ -855,8 +883,10 @@
wcd9xxx_jack_report(mbhc, &mbhc->headset_jack,
0, WCD9XXX_JACK_MASK);
mbhc->hph_status &= ~(SND_JACK_HEADSET |
- SND_JACK_LINEOUT);
+ SND_JACK_LINEOUT |
+ SND_JACK_ANC_HEADPHONE);
}
+
/* Report insertion */
mbhc->hph_status |= jack_type;
@@ -870,11 +900,15 @@
mbhc->update_z = true;
} else if (jack_type == SND_JACK_LINEOUT) {
mbhc->current_plug = PLUG_TYPE_HIGH_HPH;
+ } else if (jack_type == SND_JACK_ANC_HEADPHONE) {
+ mbhc->polling_active = BUTTON_POLLING_SUPPORTED;
+ mbhc->current_plug = PLUG_TYPE_ANC_HEADPHONE;
}
if (mbhc->micbias_enable && mbhc->micbias_enable_cb) {
pr_debug("%s: Enabling micbias\n", __func__);
- mbhc->micbias_enable_cb(mbhc->codec, true);
+ mbhc->micbias_enable_cb(mbhc->codec, true,
+ mbhc->mbhc_cfg->micbias);
}
if (mbhc->impedance_detect && impedance_detect_en)
@@ -1041,7 +1075,14 @@
static short wcd9xxx_codec_sta_dce(struct wcd9xxx_mbhc *mbhc, int dce,
bool norel)
{
- return __wcd9xxx_codec_sta_dce(mbhc, dce, false, norel);
+ bool override_bypass;
+
+ /* Bypass override if it is already enabled */
+ override_bypass = (snd_soc_read(mbhc->codec,
+ WCD9XXX_A_CDC_MBHC_B1_CTL) &
+ 0x04) ? true : false;
+
+ return __wcd9xxx_codec_sta_dce(mbhc, dce, override_bypass, norel);
}
static s32 __wcd9xxx_codec_sta_dce_v(struct wcd9xxx_mbhc *mbhc, s8 dce,
@@ -1094,7 +1135,8 @@
/* called only from interrupt which is under codec_resource_lock acquisition */
static short wcd9xxx_mbhc_setup_hs_polling(struct wcd9xxx_mbhc *mbhc,
- bool is_cs_enable)
+ struct mbhc_micbias_regs *mbhc_micb_regs,
+ bool is_cs_enable)
{
struct snd_soc_codec *codec = mbhc->codec;
short bias_value;
@@ -1115,7 +1157,7 @@
btn_det = WCD9XXX_MBHC_CAL_BTN_DET_PTR(mbhc->mbhc_cfg->calibration);
/* Enable external voltage source to micbias if present */
if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mb_source)
- mbhc->mbhc_cb->enable_mb_source(codec, true);
+ mbhc->mbhc_cb->enable_mb_source(codec, true, true);
/*
* setup internal micbias if codec uses internal micbias for
@@ -1132,15 +1174,19 @@
snd_soc_update_bits(codec, WCD9XXX_A_CLK_BUFF_EN1, 0x05, 0x01);
/* Make sure CFILT is in fast mode, save current mode */
- cfilt_mode = snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl);
+ cfilt_mode = snd_soc_read(codec, mbhc_micb_regs->cfilt_ctl);
if (mbhc->mbhc_cb && mbhc->mbhc_cb->cfilt_fast_mode)
mbhc->mbhc_cb->cfilt_fast_mode(codec, mbhc);
else
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.cfilt_ctl,
+ snd_soc_update_bits(codec, mbhc_micb_regs->cfilt_ctl,
0x70, 0x00);
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
- snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1, 0x04);
+ snd_soc_write(codec, WCD9XXX_A_MBHC_SCALING_MUX_1,
+ mbhc->scaling_mux_in);
+ pr_debug("%s: scaling_mux_input: %d\n", __func__,
+ mbhc->scaling_mux_in);
+
if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mux_bias_block)
mbhc->mbhc_cb->enable_mux_bias_block(codec);
else
@@ -1165,7 +1211,7 @@
/* don't flip override */
bias_value = __wcd9xxx_codec_sta_dce(mbhc, 1, true, true);
- snd_soc_write(codec, mbhc->mbhc_bias_regs.cfilt_ctl, cfilt_mode);
+ snd_soc_write(codec, mbhc_micb_regs->cfilt_ctl, cfilt_mode);
snd_soc_update_bits(codec, WCD9XXX_A_MBHC_HPH, 0x13, 0x00);
if (mbhc->mbhc_cfg->do_recalibration) {
@@ -1173,7 +1219,7 @@
reg = snd_soc_read(codec, WCD9XXX_A_CDC_MBHC_B1_CTL);
change = snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
0x78, btn_det->mbhc_nsc << 3);
- wcd9xxx_get_z(mbhc, &dce_z, &sta_z);
+ wcd9xxx_get_z(mbhc, &dce_z, &sta_z, mbhc_micb_regs, true);
if (change)
snd_soc_write(codec, WCD9XXX_A_CDC_MBHC_B1_CTL, reg);
if (dce_z && sta_z) {
@@ -1197,7 +1243,8 @@
snd_soc_update_bits(mbhc->codec,
WCD9XXX_A_CDC_MBHC_B1_CTL,
0x78, WCD9XXX_MBHC_NSC_CS << 3);
- wcd9xxx_get_z(mbhc, &dce_z, NULL);
+ wcd9xxx_get_z(mbhc, &dce_z, NULL, mbhc_micb_regs,
+ true);
snd_soc_write(mbhc->codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
reg);
if (dce_z) {
@@ -1253,7 +1300,7 @@
/* Disable external voltage source to micbias if present */
if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mb_source)
- mbhc->mbhc_cb->enable_mb_source(mbhc->codec, false);
+ mbhc->mbhc_cb->enable_mb_source(mbhc->codec, false, true);
mbhc->polling_active = false;
mbhc->mbhc_state = MBHC_STATE_NONE;
@@ -1664,10 +1711,10 @@
return 0;
}
-void wcd9xxx_turn_onoff_current_source(struct wcd9xxx_mbhc *mbhc, bool on,
- bool highhph)
+void wcd9xxx_turn_onoff_current_source(struct wcd9xxx_mbhc *mbhc,
+ struct mbhc_micbias_regs *mbhc_micb_regs,
+ bool on, bool highhph)
{
-
struct snd_soc_codec *codec;
struct wcd9xxx_mbhc_btn_detect_cfg *btn_det;
const struct wcd9xxx_mbhc_plug_detect_cfg *plug_det =
@@ -1682,7 +1729,7 @@
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_B1_CTL,
0x78, 0x48);
/* pull down diode bit to 0 */
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.mbhc_reg,
+ snd_soc_update_bits(codec, mbhc_micb_regs->mbhc_reg,
0x01, 0x00);
/*
* Keep the low power insertion/removal
@@ -1697,7 +1744,7 @@
* (INS_DET_ISRC_EN__ENABLE)
* MICB_2_MBHC__SCHT_TRIG_EN to 1
*/
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.mbhc_reg,
+ snd_soc_update_bits(codec, mbhc_micb_regs->mbhc_reg,
0xF0, 0xF0);
/* Disconnect MBHC Override from MicBias and LDOH */
snd_soc_update_bits(codec, WCD9XXX_A_MAD_ANA_CTRL, 0x10, 0x00);
@@ -1706,16 +1753,16 @@
/* Connect MBHC Override from MicBias and LDOH */
snd_soc_update_bits(codec, WCD9XXX_A_MAD_ANA_CTRL, 0x10, 0x10);
/* INS_DET_ISRC_CTL to acdb value */
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.mbhc_reg,
+ snd_soc_update_bits(codec, mbhc_micb_regs->mbhc_reg,
0x60, plug_det->mic_current << 5);
if (!highhph) {
/* INS_DET_ISRC_EN__ENABLE to 0 */
snd_soc_update_bits(codec,
- mbhc->mbhc_bias_regs.mbhc_reg,
+ mbhc_micb_regs->mbhc_reg,
0x80, 0x00);
/* MICB_2_MBHC__SCHT_TRIG_EN to 0 */
snd_soc_update_bits(codec,
- mbhc->mbhc_bias_regs.mbhc_reg,
+ mbhc_micb_regs->mbhc_reg,
0x10, 0x00);
}
/* Nsc to acdb value */
@@ -1742,7 +1789,8 @@
rt[0].vddio = false;
rt[0].hwvalue = true;
rt[0].hphl_status = wcd9xxx_hphl_status(mbhc);
- rt[0].dce = wcd9xxx_mbhc_setup_hs_polling(mbhc, true);
+ rt[0].dce = wcd9xxx_mbhc_setup_hs_polling(mbhc, &mbhc->mbhc_bias_regs,
+ true);
rt[0].mic_bias = false;
for (i = 1; i < NUM_DCE_PLUG_INS_DETECT - 1; i++) {
@@ -1754,11 +1802,15 @@
wcd9xxx_codec_hphr_gnd_switch(codec, true);
if (rt[i].mic_bias)
- wcd9xxx_turn_onoff_current_source(mbhc, false, false);
+ wcd9xxx_turn_onoff_current_source(mbhc,
+ &mbhc->mbhc_bias_regs,
+ false, false);
rt[i].dce = __wcd9xxx_codec_sta_dce(mbhc, 1, !highhph, true);
if (rt[i].mic_bias)
- wcd9xxx_turn_onoff_current_source(mbhc, true, false);
+ wcd9xxx_turn_onoff_current_source(mbhc,
+ &mbhc->mbhc_bias_regs,
+ true, false);
if (rt[i].swap_gnd)
wcd9xxx_codec_hphr_gnd_switch(codec, false);
}
@@ -1811,7 +1863,8 @@
wcd9xxx_mbhc_ctrl_clk_bandgap(mbhc, true);
rt[0].hphl_status = wcd9xxx_hphl_status(mbhc);
- rt[0].dce = wcd9xxx_mbhc_setup_hs_polling(mbhc, false);
+ rt[0].dce = wcd9xxx_mbhc_setup_hs_polling(mbhc, &mbhc->mbhc_bias_regs,
+ false);
rt[0].swap_gnd = false;
rt[0].vddio = false;
rt[0].hwvalue = true;
@@ -2004,10 +2057,178 @@
return 0;
}
+/*
+ * Function to determine whether anc microphone is preset or not.
+ * Return true if anc microphone is detected or false if not detected.
+ */
+static bool wcd9xxx_detect_anc_plug_type(struct wcd9xxx_mbhc *mbhc)
+{
+ struct wcd9xxx_mbhc_detect rt[NUM_DCE_PLUG_INS_DETECT - 1];
+ bool anc_mic_found = true;
+ int i, mb_mv;
+ const struct wcd9xxx_mbhc_plug_type_cfg *plug_type =
+ WCD9XXX_MBHC_CAL_PLUG_TYPE_PTR(mbhc->mbhc_cfg->calibration);
+ s16 hs_max, dce_z;
+ s16 no_mic;
+ bool override_en;
+ bool timedout;
+ unsigned long timeout, retry = 0;
+ enum wcd9xxx_mbhc_plug_type type;
+ bool cs_enable;
+
+ if (mbhc->mbhc_cfg->anc_micbias != MBHC_MICBIAS3 &&
+ mbhc->mbhc_cfg->anc_micbias != MBHC_MICBIAS2)
+ return false;
+
+ pr_debug("%s: enter\n", __func__);
+
+ override_en = (snd_soc_read(mbhc->codec, WCD9XXX_A_CDC_MBHC_B1_CTL) &
+ 0x04) ? true : false;
+ cs_enable = ((mbhc->mbhc_cfg->cs_enable_flags &
+ (1 << MBHC_CS_ENABLE_DET_ANC)) != 0) &&
+ (!(snd_soc_read(mbhc->codec,
+ mbhc->mbhc_anc_bias_regs.ctl_reg) & 0x80)) &&
+ (mbhc->mbhc_cfg->micbias != mbhc->mbhc_cfg->anc_micbias);
+
+ if (cs_enable) {
+ wcd9xxx_turn_onoff_current_source(mbhc,
+ &mbhc->mbhc_anc_bias_regs,
+ true, false);
+ } else {
+ if (mbhc->mbhc_cfg->anc_micbias == MBHC_MICBIAS3) {
+ if (mbhc->micbias_enable_cb)
+ mbhc->micbias_enable_cb(mbhc->codec, true,
+ mbhc->mbhc_cfg->anc_micbias);
+ else
+ return false;
+ } else {
+ /* Enable override */
+ if (!override_en)
+ wcd9xxx_turn_onoff_override(mbhc, true);
+ }
+ }
+
+ if (!cs_enable) {
+ hs_max = plug_type->v_hs_max;
+ no_mic = plug_type->v_no_mic;
+ dce_z = mbhc->mbhc_data.dce_z;
+ mb_mv = mbhc->mbhc_data.micb_mv;
+ } else {
+ hs_max = WCD9XXX_V_CS_HS_MAX;
+ no_mic = WCD9XXX_V_CS_NO_MIC;
+ mb_mv = VDDIO_MICBIAS_MV;
+ dce_z = mbhc->mbhc_data.dce_nsc_cs_z;
+ }
+
+ wcd9xxx_mbhc_ctrl_clk_bandgap(mbhc, true);
+
+ timeout = jiffies + msecs_to_jiffies(ANC_HPH_DETECT_PLUG_TIME_MS);
+ anc_mic_found = true;
+
+ while (!(timedout = time_after(jiffies, timeout))) {
+ retry++;
+
+ if (wcd9xxx_swch_level_remove(mbhc)) {
+ pr_debug("%s: Switch level is low\n", __func__);
+ anc_mic_found = false;
+ break;
+ }
+
+ pr_debug("%s: Retry attempt %lu", __func__, retry - 1);
+
+ rt[0].hphl_status = wcd9xxx_hphl_status(mbhc);
+ rt[0].dce = wcd9xxx_mbhc_setup_hs_polling(mbhc,
+ &mbhc->mbhc_anc_bias_regs,
+ cs_enable);
+ rt[0]._vdces = __wcd9xxx_codec_sta_dce_v(mbhc, true, rt[0].dce,
+ dce_z, (u32)mb_mv);
+
+ if (rt[0]._vdces >= no_mic && rt[0]._vdces < hs_max)
+ rt[0]._type = PLUG_TYPE_HEADSET;
+ else if (rt[0]._vdces < no_mic)
+ rt[0]._type = PLUG_TYPE_HEADPHONE;
+ else
+ rt[0]._type = PLUG_TYPE_HIGH_HPH;
+
+ pr_debug("%s: DCE #%d, V %04d, HPHL %d TYPE %d\n",
+ __func__, 0, rt[0]._vdces,
+ rt[0].hphl_status & 0x01,
+ rt[0]._type);
+
+ for (i = 1; i < NUM_DCE_PLUG_INS_DETECT - 1; i++) {
+ rt[i].dce = __wcd9xxx_codec_sta_dce(mbhc, 1,
+ true, true);
+ rt[i]._vdces = __wcd9xxx_codec_sta_dce_v(mbhc, true,
+ rt[i].dce, dce_z,
+ (u32) mb_mv);
+
+ if (rt[i]._vdces >= no_mic && rt[i]._vdces < hs_max)
+ rt[i]._type = PLUG_TYPE_HEADSET;
+ else if (rt[i]._vdces < no_mic)
+ rt[i]._type = PLUG_TYPE_HEADPHONE;
+ else
+ rt[i]._type = PLUG_TYPE_HIGH_HPH;
+
+ rt[i].hphl_status = wcd9xxx_hphl_status(mbhc);
+
+ pr_debug("%s: DCE #%d, V %04d, HPHL %d TYPE %d\n",
+ __func__, i, rt[i]._vdces,
+ rt[i].hphl_status & 0x01,
+ rt[i]._type);
+ }
+
+ /*
+ * Check for the "type" of all the 4 measurements
+ * If all 4 measurements have the Type as PLUG_TYPE_HEADSET
+ * then it is proper mic and declare that the plug has two mics
+ */
+ for (i = 0; i < NUM_DCE_PLUG_INS_DETECT - 1; i++) {
+ if (i > 0 && (rt[i - 1]._type != rt[i]._type)) {
+ type = PLUG_TYPE_INVALID;
+ break;
+ } else {
+ type = rt[0]._type;
+ }
+ }
+
+ pr_debug("%s: Plug type found in ANC detection :%d",
+ __func__, type);
+
+ if (type != PLUG_TYPE_HEADSET)
+ anc_mic_found = false;
+ if (anc_mic_found || (type == PLUG_TYPE_HEADPHONE &&
+ mbhc->mbhc_cfg->hw_jack_type == FIVE_POLE_JACK) ||
+ (type == PLUG_TYPE_HIGH_HPH &&
+ mbhc->mbhc_cfg->hw_jack_type == SIX_POLE_JACK))
+ break;
+ }
+
+ wcd9xxx_mbhc_ctrl_clk_bandgap(mbhc, false);
+ if (cs_enable) {
+ wcd9xxx_turn_onoff_current_source(mbhc,
+ &mbhc->mbhc_anc_bias_regs,
+ false, false);
+ } else {
+ if (mbhc->mbhc_cfg->anc_micbias == MBHC_MICBIAS3) {
+ if (mbhc->micbias_enable_cb)
+ mbhc->micbias_enable_cb(mbhc->codec, false,
+ mbhc->mbhc_cfg->anc_micbias);
+ } else {
+ /* Disable override */
+ if (!override_en)
+ wcd9xxx_turn_onoff_override(mbhc, false);
+ }
+ }
+ pr_debug("%s: leave\n", __func__);
+ return anc_mic_found;
+}
+
/* called under codec_resource_lock acquisition */
static void wcd9xxx_find_plug_and_report(struct wcd9xxx_mbhc *mbhc,
enum wcd9xxx_mbhc_plug_type plug_type)
{
+ bool anc_mic_found = false;
+
pr_debug("%s: enter current_plug(%d) new_plug(%d)\n",
__func__, mbhc->current_plug, plug_type);
@@ -2033,25 +2254,50 @@
wcd9xxx_report_plug(mbhc, 1, SND_JACK_UNSUPPORTED);
wcd9xxx_cleanup_hs_polling(mbhc);
} else if (plug_type == PLUG_TYPE_HEADSET) {
- /*
- * If Headphone was reported previously, this will
- * only report the mic line
- */
- wcd9xxx_report_plug(mbhc, 1, SND_JACK_HEADSET);
+
+ if (mbhc->mbhc_cfg->enable_anc_mic_detect) {
+ /*
+ * Do not report Headset, because at this point
+ * it could be a ANC headphone having two mics.
+ * So, proceed further to detect if there is a
+ * second mic.
+ */
+ mbhc->scaling_mux_in = 0x08;
+ anc_mic_found = wcd9xxx_detect_anc_plug_type(mbhc);
+ }
+
+ if (anc_mic_found) {
+ /* Report ANC headphone */
+ wcd9xxx_report_plug(mbhc, 1, SND_JACK_ANC_HEADPHONE);
+ } else {
+ /*
+ * If Headphone was reported previously, this will
+ * only report the mic line
+ */
+ wcd9xxx_report_plug(mbhc, 1, SND_JACK_HEADSET);
+ }
/* Button detection required RC oscillator */
wcd9xxx_mbhc_ctrl_clk_bandgap(mbhc, true);
+ /*
+ * sleep so that audio path completely tears down
+ * before report plug insertion to the user space
+ */
msleep(100);
- /* if PA is already on, switch micbias source to VDDIO */
+ /*
+ * if PA is already on, switch micbias
+ * source to VDDIO
+ */
if (mbhc->event_state &
- (1 << MBHC_EVENT_PA_HPHL | 1 << MBHC_EVENT_PA_HPHR |
- 1 << MBHC_EVENT_PRE_TX_1_3_ON))
- __wcd9xxx_switch_micbias(mbhc, 1, false, false);
+ (1 << MBHC_EVENT_PA_HPHL | 1 << MBHC_EVENT_PA_HPHR))
+ __wcd9xxx_switch_micbias(mbhc, 1, false,
+ false);
wcd9xxx_start_hs_polling(mbhc);
} else if (plug_type == PLUG_TYPE_HIGH_HPH) {
if (mbhc->mbhc_cfg->detect_extn_cable) {
/* High impedance device found. Report as LINEOUT*/
- wcd9xxx_report_plug(mbhc, 1, SND_JACK_LINEOUT);
+ if (mbhc->current_plug == PLUG_TYPE_NONE)
+ wcd9xxx_report_plug(mbhc, 1, SND_JACK_LINEOUT);
wcd9xxx_cleanup_hs_polling(mbhc);
pr_debug("%s: setup mic trigger for further detection\n",
__func__);
@@ -2095,10 +2341,14 @@
(!(snd_soc_read(mbhc->codec,
mbhc->mbhc_bias_regs.ctl_reg) & 0x80)));
+ mbhc->scaling_mux_in = 0x04;
+
if (current_source_enable) {
- wcd9xxx_turn_onoff_current_source(mbhc, true, false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ true, false);
plug_type = wcd9xxx_codec_cs_get_plug_type(mbhc, false);
- wcd9xxx_turn_onoff_current_source(mbhc, false, false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ false, false);
} else {
wcd9xxx_turn_onoff_override(mbhc, true);
plug_type = wcd9xxx_codec_get_plug_type(mbhc, true);
@@ -2223,7 +2473,8 @@
(!(snd_soc_read(mbhc->codec,
mbhc->mbhc_bias_regs.ctl_reg) & 0x80)));
if (cs_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, true, false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ true, false);
timeout = jiffies + msecs_to_jiffies(HS_DETECT_PLUG_TIME_MS);
while (!(timedout = time_after(jiffies, timeout))) {
@@ -2291,7 +2542,8 @@
}
if (cs_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, false, false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ false, false);
if (timedout)
pr_debug("%s: Microphone did not settle in %d seconds\n",
@@ -2322,7 +2574,8 @@
u32 mb_mv;
pr_debug("%s: enter\n", __func__);
- if (mbhc->current_plug != PLUG_TYPE_HEADSET) {
+ if (mbhc->current_plug != PLUG_TYPE_HEADSET &&
+ mbhc->current_plug != PLUG_TYPE_ANC_HEADPHONE) {
pr_debug("%s(): Headset is not inserted, ignore removal\n",
__func__);
snd_soc_update_bits(codec, WCD9XXX_A_CDC_MBHC_CLK_CTL,
@@ -2339,7 +2592,8 @@
(!(snd_soc_read(codec,
mbhc->mbhc_bias_regs.ctl_reg) & 0x80)));
if (cs_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, true, false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ true, false);
timeout = jiffies + msecs_to_jiffies(FAKE_REMOVAL_MIN_PERIOD_MS);
do {
@@ -2370,7 +2624,8 @@
removed ? "" : "not ");
if (cs_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, false, false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ false, false);
if (removed) {
if (mbhc->mbhc_cfg->detect_extn_cable) {
@@ -2752,8 +3007,8 @@
* headphone detection.
*/
if (current_source_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, true,
- false);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ true, false);
else
wcd9xxx_turn_onoff_override(mbhc, true);
@@ -2811,6 +3066,14 @@
} else if (plug_type == PLUG_TYPE_HIGH_HPH) {
pr_debug("%s: High HPH detected, continue polling\n",
__func__);
+ if (mbhc->mbhc_cfg->detect_extn_cable) {
+ if (mbhc->current_plug != plug_type)
+ wcd9xxx_report_plug(mbhc, 1,
+ SND_JACK_LINEOUT);
+ } else if (mbhc->current_plug == PLUG_TYPE_NONE) {
+ wcd9xxx_report_plug(mbhc, 1,
+ SND_JACK_HEADPHONE);
+ }
} else {
if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
pt_gnd_mic_swap_cnt++;
@@ -2837,8 +3100,9 @@
WCD9XXX_BCL_LOCK(mbhc->resmgr);
/* Turn off override/current source */
if (current_source_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, false,
- false);
+ wcd9xxx_turn_onoff_current_source(mbhc,
+ &mbhc->mbhc_bias_regs,
+ false, false);
else
wcd9xxx_turn_onoff_override(mbhc, false);
/*
@@ -2864,7 +3128,8 @@
}
if (!correction && current_source_enable)
- wcd9xxx_turn_onoff_current_source(mbhc, false, highhph);
+ wcd9xxx_turn_onoff_current_source(mbhc, &mbhc->mbhc_bias_regs,
+ false, highhph);
else if (!correction)
wcd9xxx_turn_onoff_override(mbhc, false);
@@ -2906,16 +3171,15 @@
if (wcd9xxx_cancel_btn_work(mbhc))
pr_debug("%s: button press is canceled\n", __func__);
- /* cancel detect plug */
- wcd9xxx_cancel_hs_detect_plug(mbhc,
- &mbhc->correct_plug_swch);
-
insert = !wcd9xxx_swch_level_remove(mbhc);
pr_debug("%s: Current plug type %d, insert %d\n", __func__,
mbhc->current_plug, insert);
if ((mbhc->current_plug == PLUG_TYPE_NONE) && insert) {
mbhc->lpi_enabled = false;
wmb();
+ /* cancel detect plug */
+ wcd9xxx_cancel_hs_detect_plug(mbhc,
+ &mbhc->correct_plug_swch);
if ((mbhc->current_plug != PLUG_TYPE_NONE) &&
!(snd_soc_read(codec, WCD9XXX_A_MBHC_INSERT_DETECT) &
@@ -2930,6 +3194,9 @@
} else if ((mbhc->current_plug != PLUG_TYPE_NONE) && !insert) {
mbhc->lpi_enabled = false;
wmb();
+ /* cancel detect plug */
+ wcd9xxx_cancel_hs_detect_plug(mbhc,
+ &mbhc->correct_plug_swch);
if (mbhc->current_plug == PLUG_TYPE_HEADPHONE) {
wcd9xxx_report_plug(mbhc, 0, SND_JACK_HEADPHONE);
@@ -2946,6 +3213,12 @@
} else if (mbhc->current_plug == PLUG_TYPE_HIGH_HPH) {
wcd9xxx_report_plug(mbhc, 0, SND_JACK_LINEOUT);
is_removed = true;
+ } else if (mbhc->current_plug == PLUG_TYPE_ANC_HEADPHONE) {
+ wcd9xxx_pause_hs_polling(mbhc);
+ wcd9xxx_mbhc_ctrl_clk_bandgap(mbhc, false);
+ wcd9xxx_cleanup_hs_polling(mbhc);
+ wcd9xxx_report_plug(mbhc, 0, SND_JACK_ANC_HEADPHONE);
+ is_removed = true;
}
if (is_removed) {
@@ -3106,7 +3379,9 @@
return mask;
}
-static void wcd9xxx_get_z(struct wcd9xxx_mbhc *mbhc, s16 *dce_z, s16 *sta_z)
+static void wcd9xxx_get_z(struct wcd9xxx_mbhc *mbhc, s16 *dce_z, s16 *sta_z,
+ struct mbhc_micbias_regs *micb_regs,
+ bool norel_detection)
{
s16 reg0, reg1;
int change;
@@ -3114,21 +3389,21 @@
WCD9XXX_BCL_ASSERT_LOCKED(mbhc->resmgr);
/* Pull down micbias to ground and disconnect vddio switch */
- reg0 = snd_soc_read(codec, mbhc->mbhc_bias_regs.ctl_reg);
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg, 0x81, 0x1);
- reg1 = snd_soc_read(codec, mbhc->mbhc_bias_regs.mbhc_reg);
- snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.mbhc_reg, 1 << 7, 0);
+ reg0 = snd_soc_read(codec, micb_regs->ctl_reg);
+ snd_soc_update_bits(codec, micb_regs->ctl_reg, 0x81, 0x1);
+ reg1 = snd_soc_read(codec, micb_regs->mbhc_reg);
+ snd_soc_update_bits(codec, micb_regs->mbhc_reg, 1 << 7, 0);
/* Disconnect override from micbias */
change = snd_soc_update_bits(codec, WCD9XXX_A_MAD_ANA_CTRL, 1 << 4,
1 << 0);
usleep_range(1000, 1000 + 1000);
if (sta_z) {
- *sta_z = wcd9xxx_codec_sta_dce(mbhc, 0, false);
+ *sta_z = wcd9xxx_codec_sta_dce(mbhc, 0, norel_detection);
pr_debug("%s: sta_z 0x%x\n", __func__, *sta_z & 0xFFFF);
}
if (dce_z) {
- *dce_z = wcd9xxx_codec_sta_dce(mbhc, 1, false);
+ *dce_z = wcd9xxx_codec_sta_dce(mbhc, 1, norel_detection);
pr_debug("%s: dce_z 0x%x\n", __func__, *dce_z & 0xFFFF);
}
@@ -3137,16 +3412,22 @@
snd_soc_update_bits(codec, WCD9XXX_A_MAD_ANA_CTRL, 1 << 4,
1 << 4);
/* Disable pull down micbias to ground */
- snd_soc_write(codec, mbhc->mbhc_bias_regs.mbhc_reg, reg1);
- snd_soc_write(codec, mbhc->mbhc_bias_regs.ctl_reg, reg0);
+ snd_soc_write(codec, micb_regs->mbhc_reg, reg1);
+ snd_soc_write(codec, micb_regs->ctl_reg, reg0);
}
+/*
+ * This function recalibrates dce_z and sta_z parameters.
+ * No release detection will be false when this function is
+ * used.
+ */
void wcd9xxx_update_z(struct wcd9xxx_mbhc *mbhc)
{
const u16 sta_z = mbhc->mbhc_data.sta_z;
const u16 dce_z = mbhc->mbhc_data.dce_z;
- wcd9xxx_get_z(mbhc, &mbhc->mbhc_data.dce_z, &mbhc->mbhc_data.sta_z);
+ wcd9xxx_get_z(mbhc, &mbhc->mbhc_data.dce_z, &mbhc->mbhc_data.sta_z,
+ &mbhc->mbhc_bias_regs, false);
pr_debug("%s: sta_z 0x%x,dce_z 0x%x -> sta_z 0x%x,dce_z 0x%x\n",
__func__, sta_z & 0xFFFF, dce_z & 0xFFFF,
mbhc->mbhc_data.sta_z & 0xFFFF,
@@ -3593,7 +3874,7 @@
* turn on the external voltage source for Calibration.
*/
if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mb_source)
- mbhc->mbhc_cb->enable_mb_source(codec, true);
+ mbhc->mbhc_cb->enable_mb_source(codec, true, false);
cfilt_mode = snd_soc_read(codec, mbhc->mbhc_bias_regs.cfilt_ctl);
if (mbhc->mbhc_cb && mbhc->mbhc_cb->cfilt_fast_mode)
@@ -3715,7 +3996,7 @@
usleep_range(100, 100);
if (mbhc->mbhc_cb && mbhc->mbhc_cb->enable_mb_source)
- mbhc->mbhc_cb->enable_mb_source(codec, false);
+ mbhc->mbhc_cb->enable_mb_source(codec, false, false);
wcd9xxx_enable_irq(mbhc->resmgr->core_res,
mbhc->intr_ids->dce_est_complete);
@@ -4063,7 +4344,10 @@
mbhc->mbhc_cfg = mbhc_cfg;
/* Get HW specific mbhc registers' address */
- wcd9xxx_get_mbhc_micbias_regs(mbhc, &mbhc->mbhc_bias_regs);
+ wcd9xxx_get_mbhc_micbias_regs(mbhc, MBHC_PRIMARY_MIC_MB);
+
+ /* Get HW specific mbhc registers' address for anc */
+ wcd9xxx_get_mbhc_micbias_regs(mbhc, MBHC_ANC_MIC_MB);
/* Put CFILT in fast mode by default */
if (mbhc->mbhc_cb && mbhc->mbhc_cb->cfilt_fast_mode)
@@ -4278,7 +4562,7 @@
}
if (mbhc->micbias_enable && mbhc->polling_active &&
!(snd_soc_read(mbhc->codec, mbhc->mbhc_bias_regs.ctl_reg)
- & 0x80)) {
+ & 0x80)) {
pr_debug("%s:Micbias turned off by recording, set up again",
__func__);
snd_soc_update_bits(codec, mbhc->mbhc_bias_regs.ctl_reg,
@@ -4439,6 +4723,7 @@
s16 *z[] = {
&l[0], &r[0], &r[1], &l[1], &l[2], &r[2],
};
+ bool override_en;
struct snd_soc_codec *codec = mbhc->codec;
const int mux_wait_us = 25;
const struct wcd9xxx_reg_mask_val reg_set_mux[] = {
@@ -4475,7 +4760,10 @@
wcd9xxx_onoff_ext_mclk(mbhc, true);
- wcd9xxx_turn_onoff_override(mbhc, true);
+ override_en = (snd_soc_read(codec, WCD9XXX_A_CDC_MBHC_B1_CTL) & 0x04) ?
+ true : false;
+ if (!override_en)
+ wcd9xxx_turn_onoff_override(mbhc, true);
pr_debug("%s: Setting impedance detection\n", __func__);
/* Codec specific setup for L0, R0, L1 and R1 measurements */
@@ -4523,7 +4811,8 @@
wcd9xxx_onoff_ext_mclk(mbhc, false);
- wcd9xxx_turn_onoff_override(mbhc, false);
+ if (!override_en)
+ wcd9xxx_turn_onoff_override(mbhc, false);
mbhc->mbhc_cb->compute_impedance(l, r, zl, zr);
pr_debug("%s: L0: 0x%x(%d), L1: 0x%x(%d), L2: 0x%x(%d)\n",
@@ -4541,10 +4830,8 @@
int wcd9xxx_mbhc_get_impedance(struct wcd9xxx_mbhc *mbhc, uint32_t *zl,
uint32_t *zr)
{
- WCD9XXX_BCL_LOCK(mbhc->resmgr);
*zl = mbhc->zl;
*zr = mbhc->zr;
- WCD9XXX_BCL_UNLOCK(mbhc->resmgr);
if (*zl && *zr)
return 0;
@@ -4559,7 +4846,8 @@
*/
int wcd9xxx_mbhc_init(struct wcd9xxx_mbhc *mbhc, struct wcd9xxx_resmgr *resmgr,
struct snd_soc_codec *codec,
- int (*micbias_enable_cb) (struct snd_soc_codec*, bool),
+ int (*micbias_enable_cb) (struct snd_soc_codec*, bool,
+ enum wcd9xxx_micbias_num),
const struct wcd9xxx_mbhc_cb *mbhc_cb,
const struct wcd9xxx_mbhc_intr *mbhc_cdc_intr_ids,
int rco_clk_rate,
diff --git a/sound/soc/codecs/wcd9xxx-mbhc.h b/sound/soc/codecs/wcd9xxx-mbhc.h
index b5031a6..cf25798 100644
--- a/sound/soc/codecs/wcd9xxx-mbhc.h
+++ b/sound/soc/codecs/wcd9xxx-mbhc.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -78,6 +78,12 @@
PLUG_TYPE_HEADPHONE,
PLUG_TYPE_HIGH_HPH,
PLUG_TYPE_GND_MIC_SWAP,
+ PLUG_TYPE_ANC_HEADPHONE,
+};
+
+enum wcd9xxx_mbhc_micbias_type {
+ MBHC_PRIMARY_MIC_MB,
+ MBHC_ANC_MIC_MB,
};
enum wcd9xxx_micbias_num {
@@ -88,6 +94,12 @@
MBHC_MICBIAS4,
};
+enum hw_jack_type {
+ FOUR_POLE_JACK = 0,
+ FIVE_POLE_JACK,
+ SIX_POLE_JACK,
+};
+
enum wcd9xx_mbhc_micbias_enable_bits {
MBHC_MICBIAS_ENABLE_THRESHOLD_HEADSET,
MBHC_MICBIAS_ENABLE_REGULAR_HEADSET,
@@ -97,6 +109,7 @@
MBHC_CS_ENABLE_POLLING,
MBHC_CS_ENABLE_INSERTION,
MBHC_CS_ENABLE_REMOVAL,
+ MBHC_CS_ENABLE_DET_ANC,
};
enum wcd9xxx_mbhc_state {
@@ -217,6 +230,7 @@
*/
void *calibration;
enum wcd9xxx_micbias_num micbias;
+ enum wcd9xxx_micbias_num anc_micbias;
int (*mclk_cb_fn) (struct snd_soc_codec*, int, bool);
unsigned int mclk_rate;
unsigned int gpio;
@@ -232,6 +246,8 @@
bool use_int_rbias;
bool do_recalibration;
bool use_vddio_meas;
+ bool enable_anc_mic_detect;
+ enum hw_jack_type hw_jack_type;
};
struct wcd9xxx_cfilt_mode {
@@ -266,7 +282,7 @@
enum mbhc_impedance_detect_stages stage);
void (*compute_impedance) (s16 *, s16 *, uint32_t *, uint32_t *);
void (*enable_mbhc_txfe) (struct snd_soc_codec *, bool);
- int (*enable_mb_source) (struct snd_soc_codec *, bool);
+ int (*enable_mb_source) (struct snd_soc_codec *, bool, bool);
void (*setup_int_rbias) (struct snd_soc_codec *, bool);
void (*pull_mb_to_vddio) (struct snd_soc_codec *, bool);
};
@@ -283,6 +299,8 @@
struct mbhc_internal_cal_data mbhc_data;
struct mbhc_micbias_regs mbhc_bias_regs;
+ struct mbhc_micbias_regs mbhc_anc_bias_regs;
+
bool mbhc_micbias_switched;
u32 hph_status; /* track headhpone status */
@@ -331,7 +349,8 @@
struct notifier_block nblock;
bool micbias_enable;
- int (*micbias_enable_cb) (struct snd_soc_codec*, bool);
+ int (*micbias_enable_cb) (struct snd_soc_codec*, bool,
+ enum wcd9xxx_micbias_num);
bool impedance_detect;
/* impedance of hphl and hphr */
@@ -340,6 +359,8 @@
u32 rco_clk_rate;
bool update_z;
+
+ u8 scaling_mux_in;
/* Holds codec specific interrupt mapping */
const struct wcd9xxx_mbhc_intr *intr_ids;
@@ -409,7 +430,8 @@
void wcd9xxx_mbhc_stop(struct wcd9xxx_mbhc *mbhc);
int wcd9xxx_mbhc_init(struct wcd9xxx_mbhc *mbhc, struct wcd9xxx_resmgr *resmgr,
struct snd_soc_codec *codec,
- int (*micbias_enable_cb) (struct snd_soc_codec*, bool),
+ int (*micbias_enable_cb) (struct snd_soc_codec*, bool,
+ enum wcd9xxx_micbias_num),
const struct wcd9xxx_mbhc_cb *mbhc_cb,
const struct wcd9xxx_mbhc_intr *mbhc_cdc_intr_ids,
int rco_clk_rate,
diff --git a/sound/soc/msm/apq8074.c b/sound/soc/msm/apq8074.c
index 5b12b9c..4e79109 100644
--- a/sound/soc/msm/apq8074.c
+++ b/sound/soc/msm/apq8074.c
@@ -1812,7 +1812,7 @@
.name = "MSM8974 Compr",
.stream_name = "COMPR",
.cpu_dai_name = "MultiMedia4",
- .platform_name = "msm-compr-dsp",
+ .platform_name = "msm-compress-dsp",
.dynamic = 1,
.trigger = {SND_SOC_DPCM_TRIGGER_POST,
SND_SOC_DPCM_TRIGGER_POST},
diff --git a/sound/soc/msm/msm-dai-fe.c b/sound/soc/msm/msm-dai-fe.c
index 6f94d99..2b43ab6 100644
--- a/sound/soc/msm/msm-dai-fe.c
+++ b/sound/soc/msm/msm-dai-fe.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -25,7 +25,7 @@
/* Conventional and unconventional sample rate supported */
static unsigned int supported_sample_rates[] = {
8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
- 96000, 192000
+ 88200, 96000, 176400, 192000
};
static struct snd_pcm_hw_constraint_list constraints_sample_rates = {
@@ -689,20 +689,6 @@
.name = "DTMF_RX_HOSTLESS",
},
{
- .capture = {
- .stream_name = "Listen Audio Service Capture",
- .aif_name = "LSM_UL_HL",
- .rates = SNDRV_PCM_RATE_16000,
- .formats = SNDRV_PCM_FMTBIT_S16_LE,
- .channels_min = 1,
- .channels_max = 1,
- .rate_min = 16000,
- .rate_max = 16000,
- },
- .ops = &msm_fe_dai_ops,
- .name = "LSM",
- },
- {
.playback = {
.stream_name = "VoLTE Stub Playback",
.aif_name = "VOLTE_STUB_DL",
@@ -801,6 +787,118 @@
.ops = &msm_fe_dai_ops,
.name = "QCHAT",
},
+ {
+ .capture = {
+ .stream_name = "Listen 1 Audio Service Capture",
+ .aif_name = "LSM1_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM1",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 2 Audio Service Capture",
+ .aif_name = "LSM2_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM2",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 3 Audio Service Capture",
+ .aif_name = "LSM3_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM3",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 4 Audio Service Capture",
+ .aif_name = "LSM4_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM4",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 5 Audio Service Capture",
+ .aif_name = "LSM5_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM5",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 6 Audio Service Capture",
+ .aif_name = "LSM6_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM6",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 7 Audio Service Capture",
+ .aif_name = "LSM7_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM7",
+ },
+ {
+ .capture = {
+ .stream_name = "Listen 8 Audio Service Capture",
+ .aif_name = "LSM8_UL_HL",
+ .rates = SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_min = 16000,
+ .rate_max = 16000,
+ },
+ .ops = &msm_fe_dai_ops,
+ .name = "LSM8",
+ },
};
static __devinit int msm_fe_dai_dev_probe(struct platform_device *pdev)
diff --git a/sound/soc/msm/msm8226.c b/sound/soc/msm/msm8226.c
index b4ae0a4..b512bb5 100644
--- a/sound/soc/msm/msm8226.c
+++ b/sound/soc/msm/msm8226.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -82,6 +82,7 @@
.read_fw_bin = false,
.calibration = NULL,
.micbias = MBHC_MICBIAS2,
+ .anc_micbias = MBHC_MICBIAS2,
.mclk_cb_fn = msm_snd_enable_codec_ext_clk,
.mclk_rate = TAPAN_EXT_CLK_RATE,
.gpio = 0,
@@ -93,9 +94,12 @@
.swap_gnd_mic = NULL,
.cs_enable_flags = (1 << MBHC_CS_ENABLE_POLLING |
1 << MBHC_CS_ENABLE_INSERTION |
- 1 << MBHC_CS_ENABLE_REMOVAL),
+ 1 << MBHC_CS_ENABLE_REMOVAL |
+ 1 << MBHC_CS_ENABLE_DET_ANC),
.do_recalibration = true,
.use_vddio_meas = true,
+ .enable_anc_mic_detect = false,
+ .hw_jack_type = FOUR_POLE_JACK,
};
struct msm_auxpcm_gpio {
@@ -1406,9 +1410,9 @@
},
/* LSM FE */
{
- .name = "Listen Audio Service",
- .stream_name = "Listen Audio Service",
- .cpu_dai_name = "LSM",
+ .name = "Listen 1 Audio Service",
+ .stream_name = "Listen 1 Audio Service",
+ .cpu_dai_name = "LSM1",
.platform_name = "msm-lsm-client",
.dynamic = 1,
.trigger = {SND_SOC_DPCM_TRIGGER_POST,
@@ -1435,6 +1439,142 @@
/* this dainlink has playback support */
.be_id = MSM_FRONTEND_DAI_MULTIMEDIA8,
},
+ {
+ .name = "Listen 2 Audio Service",
+ .stream_name = "Listen 2 Audio Service",
+ .cpu_dai_name = "LSM2",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM2,
+ },
+ {
+ .name = "Listen 3 Audio Service",
+ .stream_name = "Listen 3 Audio Service",
+ .cpu_dai_name = "LSM3",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM3,
+ },
+ {
+ .name = "Listen 4 Audio Service",
+ .stream_name = "Listen 4 Audio Service",
+ .cpu_dai_name = "LSM4",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM4,
+ },
+ {
+ .name = "Listen 5 Audio Service",
+ .stream_name = "Listen 5 Audio Service",
+ .cpu_dai_name = "LSM5",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM5,
+ },
+ {
+ .name = "Listen 6 Audio Service",
+ .stream_name = "Listen 6 Audio Service",
+ .cpu_dai_name = "LSM6",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM6,
+ },
+ {
+ .name = "Listen 7 Audio Service",
+ .stream_name = "Listen 7 Audio Service",
+ .cpu_dai_name = "LSM7",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM7,
+ },
+ {
+ .name = "Listen 8 Audio Service",
+ .stream_name = "Listen 8 Audio Service",
+ .cpu_dai_name = "LSM8",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM8,
+ },
+ {
+ .name = "INT_HFP_BT Hostless",
+ .stream_name = "INT_HFP_BT Hostless",
+ .cpu_dai_name = "INT_HFP_BT_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ /* this dai link has playback support */
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ },
+ {
+ .name = "MSM8226 HFP TX",
+ .stream_name = "MultiMedia6",
+ .cpu_dai_name = "MultiMedia6",
+ .platform_name = "msm-pcm-loopback",
+ .dynamic = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .ignore_suspend = 1,
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ /* this dai link has playback support */
+ .ignore_pmdown_time = 1,
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA6,
+ },
/* Backend BT/FM DAI Links */
{
.name = LPASS_BE_INT_BT_SCO_RX,
@@ -2042,6 +2182,8 @@
struct msm8226_asoc_mach_data *pdata;
int ret;
const char *auxpcm_pri_gpio_set = NULL;
+ const char *mbhc_audio_jack_type = NULL;
+ size_t n = strlen("4-pole-jack");
if (!pdev->dev.of_node) {
dev_err(&pdev->dev, "No platform supplied from device tree\n");
@@ -2107,6 +2249,35 @@
mbhc_cfg.gpio_level_insert = of_property_read_bool(pdev->dev.of_node,
"qcom,headset-jack-type-NC");
+ ret = of_property_read_string(pdev->dev.of_node,
+ "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
+ if (ret) {
+ dev_dbg(&pdev->dev, "Looking up %s property in node %s failed",
+ "qcom,mbhc-audio-jack-type",
+ pdev->dev.of_node->full_name);
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "Jack type properties set to default");
+ } else {
+ if (!strncmp(mbhc_audio_jack_type, "4-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
+ } else if (!strncmp(mbhc_audio_jack_type, "5-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = FIVE_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = true;
+ dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
+ } else if (!strncmp(mbhc_audio_jack_type, "6-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = SIX_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = true;
+ dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
+ } else {
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "Unknown value, hence setting to default");
+ }
+ }
+
ret = snd_soc_register_card(card);
if (ret == -EPROBE_DEFER)
goto err;
diff --git a/sound/soc/msm/msm8974.c b/sound/soc/msm/msm8974.c
index 4c3a72e..ca5e217 100644
--- a/sound/soc/msm/msm8974.c
+++ b/sound/soc/msm/msm8974.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -117,6 +117,7 @@
.read_fw_bin = false,
.calibration = NULL,
.micbias = MBHC_MICBIAS2,
+ .anc_micbias = MBHC_MICBIAS2,
.mclk_cb_fn = msm_snd_enable_codec_ext_clk,
.mclk_rate = TAIKO_EXT_CLK_RATE,
.gpio = 0,
@@ -128,9 +129,12 @@
.swap_gnd_mic = NULL,
.cs_enable_flags = (1 << MBHC_CS_ENABLE_POLLING |
1 << MBHC_CS_ENABLE_INSERTION |
- 1 << MBHC_CS_ENABLE_REMOVAL),
+ 1 << MBHC_CS_ENABLE_REMOVAL |
+ 1 << MBHC_CS_ENABLE_DET_ANC),
.do_recalibration = true,
.use_vddio_meas = true,
+ .enable_anc_mic_detect = false,
+ .hw_jack_type = SIX_POLE_JACK,
};
struct msm_auxpcm_gpio {
@@ -1313,6 +1317,8 @@
SNDRV_PCM_HW_PARAM_CHANNELS);
pr_debug("%s()\n", __func__);
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ slim0_rx_bit_format);
rate->min = rate->max = 48000;
channels->min = channels->max = msm_slim_0_tx_ch;
@@ -2111,9 +2117,9 @@
},
/* LSM FE */
{
- .name = "Listen Audio Service",
- .stream_name = "Listen Audio Service",
- .cpu_dai_name = "LSM",
+ .name = "Listen 1 Audio Service",
+ .stream_name = "Listen 1 Audio Service",
+ .cpu_dai_name = "LSM1",
.platform_name = "msm-lsm-client",
.dynamic = 1,
.trigger = { SND_SOC_DPCM_TRIGGER_POST,
@@ -2250,6 +2256,111 @@
.be_id = MSM_FRONTEND_DAI_MULTIMEDIA6,
},
{
+ .name = "Listen 2 Audio Service",
+ .stream_name = "Listen 2 Audio Service",
+ .cpu_dai_name = "LSM2",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM2,
+ },
+ {
+ .name = "Listen 3 Audio Service",
+ .stream_name = "Listen 3 Audio Service",
+ .cpu_dai_name = "LSM3",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM3,
+ },
+ {
+ .name = "Listen 4 Audio Service",
+ .stream_name = "Listen 4 Audio Service",
+ .cpu_dai_name = "LSM4",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM4,
+ },
+ {
+ .name = "Listen 5 Audio Service",
+ .stream_name = "Listen 5 Audio Service",
+ .cpu_dai_name = "LSM5",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM5,
+ },
+ {
+ .name = "Listen 6 Audio Service",
+ .stream_name = "Listen 6 Audio Service",
+ .cpu_dai_name = "LSM6",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM6,
+ },
+ {
+ .name = "Listen 7 Audio Service",
+ .stream_name = "Listen 7 Audio Service",
+ .cpu_dai_name = "LSM7",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM7,
+ },
+ {
+ .name = "Listen 8 Audio Service",
+ .stream_name = "Listen 8 Audio Service",
+ .cpu_dai_name = "LSM8",
+ .platform_name = "msm-lsm-client",
+ .dynamic = 1,
+ .trigger = { SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST },
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .be_id = MSM_FRONTEND_DAI_LSM8,
+ },
+ {
.name = LPASS_BE_SLIMBUS_4_TX,
.stream_name = "Slimbus4 Capture",
.cpu_dai_name = "msm-dai-q6-dev.16393",
@@ -2711,6 +2822,8 @@
int ret;
const char *auxpcm_pri_gpio_set = NULL;
const char *prop_name_ult_lo_gpio = "qcom,ext-ult-lo-amp-gpio";
+ const char *mbhc_audio_jack_type = NULL;
+ size_t n = strlen("4-pole-jack");
struct resource *pri_muxsel;
struct resource *sec_muxsel;
@@ -2770,6 +2883,34 @@
if (ret)
goto err;
+ ret = of_property_read_string(pdev->dev.of_node,
+ "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
+ if (ret) {
+ dev_dbg(&pdev->dev, "Looking up %s property in node %s failed",
+ "qcom,mbhc-audio-jack-type",
+ pdev->dev.of_node->full_name);
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "Jack type properties set to default");
+ } else {
+ if (!strncmp(mbhc_audio_jack_type, "4-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
+ } else if (!strncmp(mbhc_audio_jack_type, "5-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = FIVE_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = true;
+ dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
+ } else if (!strncmp(mbhc_audio_jack_type, "6-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = SIX_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = true;
+ dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
+ } else {
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "Unknown value, hence setting to default");
+ }
+ }
if (of_property_read_bool(pdev->dev.of_node, "qcom,hdmi-audio-rx")) {
dev_info(&pdev->dev, "%s(): hdmi audio support present\n",
__func__);
diff --git a/sound/soc/msm/msm8x10.c b/sound/soc/msm/msm8x10.c
index caf81fc..7b3a028 100644
--- a/sound/soc/msm/msm8x10.c
+++ b/sound/soc/msm/msm8x10.c
@@ -1,4 +1,4 @@
- /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -106,6 +106,7 @@
1 << MBHC_CS_ENABLE_REMOVAL),
.do_recalibration = false,
.use_vddio_meas = false,
+ .hw_jack_type = FOUR_POLE_JACK,
};
/*
@@ -286,6 +287,8 @@
SNDRV_PCM_HW_PARAM_CHANNELS);
pr_debug("%s(), channel:%d\n", __func__, msm_pri_mi2s_tx_ch);
+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ msm_sec_mi2s_rx_bit_format);
rate->min = rate->max = 48000;
channels->min = channels->max = msm_pri_mi2s_tx_ch;
@@ -1048,6 +1051,8 @@
static __devinit int msm8x10_asoc_machine_probe(struct platform_device *pdev)
{
struct snd_soc_card *card = &snd_soc_card_msm8x10;
+ const char *mbhc_audio_jack_type = NULL;
+ size_t n = strlen("4-pole-jack");
int ret;
dev_dbg(&pdev->dev, "%s\n", __func__);
@@ -1085,6 +1090,35 @@
mbhc_cfg.use_int_rbias = of_property_read_bool(pdev->dev.of_node,
"qcom,mbhc-bias-internal");
+ ret = of_property_read_string(pdev->dev.of_node,
+ "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
+ if (ret) {
+ dev_dbg(&pdev->dev, "Looking up %s property in node %s failed",
+ "qcom,mbhc-audio-jack-type",
+ pdev->dev.of_node->full_name);
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "Jack type properties set to default");
+ } else {
+ if (!strncmp(mbhc_audio_jack_type, "4-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
+ } else if (!strncmp(mbhc_audio_jack_type, "5-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = FIVE_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = true;
+ dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
+ } else if (!strncmp(mbhc_audio_jack_type, "6-pole-jack", n)) {
+ mbhc_cfg.hw_jack_type = SIX_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = true;
+ dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
+ } else {
+ mbhc_cfg.hw_jack_type = FOUR_POLE_JACK;
+ mbhc_cfg.enable_anc_mic_detect = false;
+ dev_dbg(&pdev->dev, "Unknown value, hence setting to default");
+ }
+ }
+
spdev = pdev;
ret = snd_soc_register_card(card);
diff --git a/sound/soc/msm/qdsp6v2/audio_acdb.c b/sound/soc/msm/qdsp6v2/audio_acdb.c
index 4e04bef..df15c59 100644
--- a/sound/soc/msm/qdsp6v2/audio_acdb.c
+++ b/sound/soc/msm/qdsp6v2/audio_acdb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1151,13 +1151,6 @@
result = result2;
}
- result2 = q6lsm_unmap_cal_blocks();
- if (result2 < 0) {
- pr_err("%s: lsm_unmap_cal_blocks failed, err = %d\n",
- __func__, result2);
- result = result2;
- }
-
result2 = q6asm_unmap_cal_blocks();
if (result2 < 0) {
pr_err("%s: asm_unmap_cal_blocks failed, err = %d\n",
diff --git a/sound/soc/msm/qdsp6v2/audio_ocmem.c b/sound/soc/msm/qdsp6v2/audio_ocmem.c
index 4a25606..5be880d 100644
--- a/sound/soc/msm/qdsp6v2/audio_ocmem.c
+++ b/sound/soc/msm/qdsp6v2/audio_ocmem.c
@@ -536,6 +536,7 @@
mutex_unlock(&audio_ocmem_lcl.state_process_lock);
fail_cmd:
pr_debug("%s: exit\n", __func__);
+ audio_ocmem_lcl.buf = NULL;
audio_ocmem_lcl.audio_ocmem_running = false;
return ret;
}
@@ -834,6 +835,7 @@
ret = ocmem_free(OCMEM_LP_AUDIO, audio_ocmem_lcl.buf);
if (ret)
pr_err("%s: ocmem_free failed\n", __func__);
+ audio_ocmem_lcl.buf = NULL;
}
static int lpass_notifier_cb(struct notifier_block *this, unsigned long code,
diff --git a/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c
index 5f512ae..41ef3e3 100644
--- a/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c
@@ -49,8 +49,13 @@
#define PARTIAL_DRAIN_ACK_EARLY_BY_MSEC 150
#define MP3_OUTPUT_FRAME_SZ 1152
#define AAC_OUTPUT_FRAME_SZ 1024
+#define AC3_OUTPUT_FRAME_SZ 1536
+#define EAC3_OUTPUT_FRAME_SZ 1536
#define DSP_NUM_OUTPUT_FRAME_BUFFERED 2
+/* decoder parameter length */
+#define DDP_DEC_MAX_NUM_PARAM 18
+
/* Default values used if user space does not set */
#define COMPR_PLAYBACK_MIN_FRAGMENT_SIZE (8 * 1024)
#define COMPR_PLAYBACK_MAX_FRAGMENT_SIZE (128 * 1024)
@@ -61,9 +66,22 @@
const DECLARE_TLV_DB_LINEAR(msm_compr_vol_gain, 0,
COMPRESSED_LR_VOL_MAX_STEPS);
+/*
+ * LSB 8 bits is used as stream id for some DSP
+ * commands for compressed playback.
+ */
+#define STREAM_ID_FROM_TOKEN(i) (i & 0xFF)
+
+/* Stream id switches between 1 and 2 */
+#define NEXT_STREAM_ID(stream_id) ((stream_id & 1) + 1)
+
+#define STREAM_ARRAY_INDEX(stream_id) (stream_id - 1)
+
+#define MAX_NUMBER_OF_STREAMS 2
+
struct msm_compr_gapless_state {
bool set_next_stream_id;
- int32_t stream_opened[2];
+ int32_t stream_opened[MAX_NUMBER_OF_STREAMS];
uint32_t initial_samples_drop;
uint32_t trailing_samples_drop;
uint32_t gapless_transition;
@@ -76,6 +94,7 @@
uint32_t volume[MSM_FRONTEND_DAI_MAX][2]; /* For both L & R */
struct msm_compr_audio_effects *audio_effects[MSM_FRONTEND_DAI_MAX];
bool use_dsp_gapless_mode;
+ struct msm_compr_dec_params *dec_params[MSM_FRONTEND_DAI_MAX];
};
struct msm_compr_audio {
@@ -91,8 +110,10 @@
uint32_t app_pointer;
uint32_t buffer_size;
uint32_t byte_offset;
- uint32_t copied_total;
- uint32_t bytes_received;
+ uint32_t copied_total; /* bytes consumed by DSP */
+ uint32_t bytes_received; /* from userspace */
+ uint32_t bytes_sent; /* to DSP */
+
int32_t first_buffer;
int32_t last_buffer;
int32_t partial_drain_delay;
@@ -105,6 +126,8 @@
uint32_t cmd_ack;
uint32_t cmd_interrupt;
uint32_t drain_ready;
+ uint32_t stream_available;
+ uint32_t next_stream;
struct msm_compr_gapless_state gapless_state;
@@ -120,6 +143,7 @@
wait_queue_head_t drain_wait;
wait_queue_head_t flush_wait;
wait_queue_head_t close_wait;
+ wait_queue_head_t wait_for_stream_avail;
spinlock_t lock;
};
@@ -131,6 +155,10 @@
struct eq_params equalizer;
};
+struct msm_compr_dec_params {
+ struct snd_dec_ddp ddp_params;
+};
+
static int msm_compr_set_volume(struct snd_compr_stream *cstream,
uint32_t volume_l, uint32_t volume_r)
{
@@ -158,6 +186,23 @@
return rc;
}
+static int msm_compr_send_ddp_cfg(struct audio_client *ac,
+ struct snd_dec_ddp *ddp)
+{
+ int i, rc;
+ pr_debug("%s\n", __func__);
+ for (i = 0; i < ddp->params_length; i++) {
+ rc = q6asm_ds1_set_endp_params(ac, ddp->params_id[i],
+ ddp->params_value[i]);
+ if (rc) {
+ pr_err("sending params_id: %d failed\n",
+ ddp->params_id[i]);
+ return rc;
+ }
+ }
+ return 0;
+}
+
static int msm_compr_send_buffer(struct msm_compr_audio *prtd)
{
int buffer_length;
@@ -178,7 +223,8 @@
pr_debug("%s: bytes_received = %d copied_total = %d\n",
__func__, prtd->bytes_received, prtd->copied_total);
if (prtd->first_buffer && prtd->gapless_state.use_dsp_gapless_mode)
- q6asm_send_meta_data(prtd->audio_client,
+ q6asm_stream_send_meta_data(prtd->audio_client,
+ prtd->audio_client->stream_id,
prtd->gapless_state.initial_samples_drop,
prtd->gapless_state.trailing_samples_drop);
@@ -211,6 +257,7 @@
if (q6asm_async_write(prtd->audio_client, ¶m) < 0) {
pr_err("%s:q6asm_async_write failed\n", __func__);
} else {
+ prtd->bytes_sent += buffer_length;
if (prtd->first_buffer)
prtd->first_buffer = 0;
}
@@ -227,6 +274,7 @@
uint32_t chan_mode = 0;
uint32_t sample_rate = 0;
int bytes_available, stream_id;
+ uint32_t stream_index;
pr_debug("%s opcode =%08x\n", __func__, opcode);
switch (opcode) {
@@ -284,8 +332,10 @@
spin_unlock(&prtd->lock);
break;
case ASM_DATA_EVENT_RENDERED_EOS:
- pr_debug("ASM_DATA_CMDRSP_EOS\n");
spin_lock(&prtd->lock);
+ pr_debug("%s: ASM_DATA_CMDRSP_EOS token 0x%x,stream id %d\n",
+ __func__, token, STREAM_ID_FROM_TOKEN(token));
+ stream_id = STREAM_ID_FROM_TOKEN(token);
if (atomic_read(&prtd->eos) &&
!prtd->gapless_state.set_next_stream_id) {
pr_debug("ASM_DATA_CMDRSP_EOS wake up\n");
@@ -293,15 +343,26 @@
wake_up(&prtd->eos_wait);
}
atomic_set(&prtd->eos, 0);
- stream_id = ac->stream_id^1; /*prev stream */
+ stream_index = STREAM_ARRAY_INDEX(stream_id);
+ if (stream_index >= MAX_NUMBER_OF_STREAMS ||
+ stream_index < 0) {
+ pr_err("%s: Invalid stream index %d", __func__,
+ stream_index);
+ spin_unlock(&prtd->lock);
+ break;
+ }
+
if (prtd->gapless_state.set_next_stream_id &&
- prtd->gapless_state.stream_opened[stream_id]) {
- q6asm_stream_cmd_nowait(prtd->audio_client,
- CMD_CLOSE, stream_id);
+ prtd->gapless_state.stream_opened[stream_index]) {
+ pr_debug("%s: CMD_CLOSE stream_id %d\n",
+ __func__, stream_id);
+ q6asm_stream_cmd_nowait(ac, CMD_CLOSE, stream_id);
atomic_set(&prtd->close, 1);
- prtd->gapless_state.stream_opened[stream_id] = 0;
+ prtd->gapless_state.stream_opened[stream_index] = 0;
prtd->gapless_state.set_next_stream_id = false;
}
+ if (prtd->gapless_state.gapless_transition)
+ prtd->gapless_state.gapless_transition = 0;
spin_unlock(&prtd->lock);
break;
case ASM_DATA_EVENT_SR_CM_CHANGE_NOTIFY:
@@ -323,7 +384,7 @@
spin_lock(&prtd->lock);
/* FIXME: A state is a much better way of dealing with this */
- if (!prtd->copied_total) {
+ if (prtd->bytes_sent == 0) {
bytes_available = prtd->bytes_received - prtd->copied_total;
if (bytes_available < cstream->runtime->fragment_size) {
pr_debug("CMD_RUN_V2 Insufficient data to send. break out\n");
@@ -334,18 +395,39 @@
spin_unlock(&prtd->lock);
break;
case ASM_STREAM_CMD_FLUSH:
- pr_debug("ASM_STREAM_CMD_FLUSH\n");
+ pr_debug("%s: ASM_STREAM_CMD_FLUSH:", __func__);
+ pr_debug("token 0x%x, stream id %d\n", token,
+ STREAM_ID_FROM_TOKEN(token));
prtd->cmd_ack = 1;
wake_up(&prtd->flush_wait);
break;
case ASM_DATA_CMD_REMOVE_INITIAL_SILENCE:
- pr_debug("ASM_DATA_CMD_REMOVE_INITIAL_SILENCE\n");
+ pr_debug("%s: ASM_DATA_CMD_REMOVE_INITIAL_SILENCE:",
+ __func__);
+ pr_debug("token 0x%x, stream id = %d\n", token,
+ STREAM_ID_FROM_TOKEN(token));
break;
case ASM_DATA_CMD_REMOVE_TRAILING_SILENCE:
- pr_debug("ASM_DATA_CMD_REMOVE_TRAILING_SILENCE\n");
+ pr_debug("%s: ASM_DATA_CMD_REMOVE_TRAILING_SILENCE:",
+ __func__);
+ pr_debug("token = 0x%x, stream id = %d\n", token,
+ STREAM_ID_FROM_TOKEN(token));
break;
case ASM_STREAM_CMD_CLOSE:
- pr_debug("ASM_DATA_CMD_CLOSE\n");
+ pr_debug("%s: ASM_DATA_CMD_CLOSE:", __func__);
+ pr_debug("token 0x%x, stream id %d\n", token,
+ STREAM_ID_FROM_TOKEN(token));
+ /*
+ * wakeup wait for stream avail on stream 3
+ * after stream 1 ends.
+ */
+ if (prtd->next_stream) {
+ pr_debug("%s:CLOSE:wakeup wait for stream\n",
+ __func__);
+ prtd->stream_available = 1;
+ wake_up(&prtd->wait_for_stream_avail);
+ prtd->next_stream = 0;
+ }
if (atomic_read(&prtd->close) &&
atomic_read(&prtd->wait_on_close)) {
prtd->cmd_ack = 1;
@@ -359,10 +441,12 @@
break;
}
case ASM_SESSION_CMDRSP_GET_SESSIONTIME_V3:
- pr_debug("ASM_SESSION_CMDRSP_GET_SESSIONTIME_V3\n");
+ pr_debug("%s: ASM_SESSION_CMDRSP_GET_SESSIONTIME_V3\n",
+ __func__);
break;
case RESET_EVENTS:
- pr_err("Received reset events CB, move to error state");
+ pr_err("%s: Received reset events CB, move to error state",
+ __func__);
spin_lock(&prtd->lock);
snd_compr_fragment_elapsed(cstream);
prtd->copied_total = prtd->bytes_received;
@@ -370,7 +454,8 @@
spin_unlock(&prtd->lock);
break;
default:
- pr_debug("Not Supported Event opcode[0x%x]\n", opcode);
+ pr_debug("%s: Not Supported Event opcode[0x%x]\n",
+ __func__, opcode);
break;
}
}
@@ -409,7 +494,11 @@
case FORMAT_MPEG4_AAC:
memset(&aac_cfg, 0x0, sizeof(struct asm_aac_cfg));
aac_cfg.aot = AAC_ENC_MODE_EAAC_P;
- aac_cfg.format = 0x03;
+ if (prtd->codec_param.codec.format ==
+ SND_AUDIOSTREAMFORMAT_MP4ADTS)
+ aac_cfg.format = 0x0;
+ else
+ aac_cfg.format = 0x03;
aac_cfg.ch_cfg = prtd->num_channels;
aac_cfg.sample_rate = prtd->sample_rate;
ret = q6asm_stream_media_format_block_aac(prtd->audio_client,
@@ -436,6 +525,7 @@
uint16_t bits_per_sample = 16;
int dir = IN, ret = 0;
struct audio_client *ac = prtd->audio_client;
+ uint32_t stream_index;
struct asm_softpause_params softpause = {
.enable = SOFT_PAUSE_ENABLE,
.period = SOFT_PAUSE_PERIOD,
@@ -448,7 +538,7 @@
.rampingcurve = SOFT_VOLUME_CURVE_LINEAR,
};
- pr_debug("%s\n", __func__);
+ pr_debug("%s: stream_id %d\n", __func__, ac->stream_id);
ret = q6asm_stream_open_write_v2(ac,
prtd->codec, bits_per_sample,
ac->stream_id,
@@ -458,7 +548,13 @@
return -ENOMEM;
}
- prtd->gapless_state.stream_opened[ac->stream_id] = 1;
+ stream_index = STREAM_ARRAY_INDEX(ac->stream_id);
+ if (stream_index >= MAX_NUMBER_OF_STREAMS || stream_index < 0) {
+ pr_err("%s: Invalid stream index:%d", __func__, stream_index);
+ return -EINVAL;
+ }
+
+ prtd->gapless_state.stream_opened[stream_index] = 1;
pr_debug("%s be_id %d\n", __func__, soc_prtd->dai_link->be_id);
msm_pcm_routing_reg_phy_stream(soc_prtd->dai_link->be_id,
ac->perf_mode,
@@ -479,7 +575,7 @@
pr_err("%s: Send SoftVolume Param failed ret=%d\n",
__func__, ret);
- ret = q6asm_set_io_mode(ac, (COMPRESSED_IO | ASYNC_IO_MODE));
+ ret = q6asm_set_io_mode(ac, (COMPRESSED_STREAM_IO | ASYNC_IO_MODE));
if (ret < 0) {
pr_err("%s: Set IO mode failed\n", __func__);
return -EINVAL;
@@ -502,6 +598,7 @@
prtd->copied_total = 0;
prtd->app_pointer = 0;
prtd->bytes_received = 0;
+ prtd->bytes_sent = 0;
prtd->buffer = ac->port[dir].buf[0].data;
prtd->buffer_paddr = ac->port[dir].buf[0].phys;
prtd->buffer_size = runtime->fragments * runtime->fragment_size;
@@ -537,11 +634,20 @@
kfree(prtd);
return -ENOMEM;
}
+ pdata->dec_params[rtd->dai_link->be_id] =
+ kzalloc(sizeof(struct msm_compr_dec_params), GFP_KERNEL);
+ if (!pdata->dec_params[rtd->dai_link->be_id]) {
+ pr_err("%s: Could not allocate memory for dec params\n",
+ __func__);
+ kfree(prtd);
+ return -ENOMEM;
+ }
prtd->audio_client = q6asm_audio_client_alloc(
(app_cb)compr_event_handler, prtd);
if (!prtd->audio_client) {
pr_err("%s: Could not allocate memory for client\n", __func__);
kfree(pdata->audio_effects[rtd->dai_link->be_id]);
+ kfree(pdata->dec_params[rtd->dai_link->be_id]);
kfree(prtd);
return -ENOMEM;
}
@@ -551,6 +657,7 @@
prtd->session_id = prtd->audio_client->session;
prtd->codec = FORMAT_MP3;
prtd->bytes_received = 0;
+ prtd->bytes_sent = 0;
prtd->copied_total = 0;
prtd->byte_offset = 0;
prtd->sample_rate = 44100;
@@ -559,6 +666,7 @@
prtd->last_buffer = 0;
prtd->first_buffer = 1;
prtd->partial_drain_delay = 0;
+ prtd->next_stream = 0;
memset(&prtd->gapless_state, 0, sizeof(struct msm_compr_gapless_state));
/*
* Update the use_dsp_gapless_mode from gapless struture with the value
@@ -582,6 +690,7 @@
init_waitqueue_head(&prtd->drain_wait);
init_waitqueue_head(&prtd->flush_wait);
init_waitqueue_head(&prtd->close_wait);
+ init_waitqueue_head(&prtd->wait_for_stream_avail);
runtime->private_data = prtd;
populate_codec_list(prtd);
@@ -610,21 +719,9 @@
struct audio_client *ac = prtd->audio_client;
int dir = IN, ret = 0, stream_id;
unsigned long flags;
+ uint32_t stream_index;
pr_debug("%s\n", __func__);
- pdata->cstream[soc_prtd->dai_link->be_id] = NULL;
- if (cstream->direction == SND_COMPRESS_PLAYBACK) {
- if (atomic_read(&pdata->audio_ocmem_req) > 1)
- atomic_dec(&pdata->audio_ocmem_req);
- else if (atomic_cmpxchg(&pdata->audio_ocmem_req, 1, 0))
- audio_ocmem_process_req(AUDIO, false);
-
- msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
- SNDRV_PCM_STREAM_PLAYBACK);
- }
-
- pr_debug("%s: ocmem_req: %d\n", __func__,
- atomic_read(&pdata->audio_ocmem_req));
if (atomic_read(&prtd->eos)) {
ret = wait_event_timeout(prtd->eos_wait,
@@ -643,25 +740,44 @@
spin_lock_irqsave(&prtd->lock, flags);
stream_id = ac->stream_id;
- if (prtd->gapless_state.stream_opened[stream_id^1]) {
+ stream_index = STREAM_ARRAY_INDEX(NEXT_STREAM_ID(stream_id));
+
+ if ((stream_index < MAX_NUMBER_OF_STREAMS && stream_index >= 0) &&
+ (prtd->gapless_state.stream_opened[stream_index])) {
spin_unlock_irqrestore(&prtd->lock, flags);
- q6asm_stream_cmd(ac, CMD_CLOSE, stream_id^1);
+ pr_debug(" close stream %d", NEXT_STREAM_ID(stream_id));
+ q6asm_stream_cmd(ac, CMD_CLOSE, NEXT_STREAM_ID(stream_id));
spin_lock_irqsave(&prtd->lock, flags);
}
- if (prtd->gapless_state.stream_opened[stream_id]) {
+
+ stream_index = STREAM_ARRAY_INDEX(stream_id);
+ if ((stream_index < MAX_NUMBER_OF_STREAMS && stream_index >= 0) &&
+ (prtd->gapless_state.stream_opened[stream_index])) {
spin_unlock_irqrestore(&prtd->lock, flags);
+ pr_debug("close stream %d", stream_id);
q6asm_stream_cmd(ac, CMD_CLOSE, stream_id);
spin_lock_irqsave(&prtd->lock, flags);
}
spin_unlock_irqrestore(&prtd->lock, flags);
- /* client buf alloc was with stream id 0, so free with the same */
- ac->stream_id = 0;
+ pdata->cstream[soc_prtd->dai_link->be_id] = NULL;
+ if (cstream->direction == SND_COMPRESS_PLAYBACK) {
+ if (atomic_read(&pdata->audio_ocmem_req) > 1)
+ atomic_dec(&pdata->audio_ocmem_req);
+ else if (atomic_cmpxchg(&pdata->audio_ocmem_req, 1, 0))
+ audio_ocmem_process_req(AUDIO, false);
+ msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
+ SNDRV_PCM_STREAM_PLAYBACK);
+ }
+
+ pr_debug("%s: ocmem_req: %d\n", __func__,
+ atomic_read(&pdata->audio_ocmem_req));
q6asm_audio_client_buf_free_contiguous(dir, ac);
q6asm_audio_client_free(ac);
kfree(pdata->audio_effects[soc_prtd->dai_link->be_id]);
+ kfree(pdata->dec_params[soc_prtd->dai_link->be_id]);
kfree(prtd);
return 0;
@@ -726,11 +842,13 @@
case SND_AUDIOCODEC_AC3: {
prtd->codec = FORMAT_AC3;
+ frame_sz = AC3_OUTPUT_FRAME_SZ;
break;
}
case SND_AUDIOCODEC_EAC3: {
prtd->codec = FORMAT_EAC3;
+ frame_sz = EAC3_OUTPUT_FRAME_SZ;
break;
}
@@ -773,6 +891,45 @@
return rc;
}
+static int msm_compr_wait_for_stream_avail(struct msm_compr_audio *prtd,
+ unsigned long *flags)
+{
+ int rc = 0;
+ pr_debug("next session is already in opened state\n");
+ prtd->next_stream = 1;
+ prtd->cmd_interrupt = 0;
+ spin_unlock_irqrestore(&prtd->lock, *flags);
+ /*
+ * Wait for stream to be available, or the wait to be interrupted by
+ * commands like flush or till a timeout of one second.
+ */
+ rc = wait_event_timeout(prtd->wait_for_stream_avail,
+ prtd->stream_available || prtd->cmd_interrupt, 1 * HZ);
+ pr_err("%s:prtd->stream_available %d, prtd->cmd_interrupt %d rc %d\n",
+ __func__, prtd->stream_available, prtd->cmd_interrupt, rc);
+
+ spin_lock_irqsave(&prtd->lock, *flags);
+ if (rc == 0) {
+ pr_err("%s: wait_for_stream_avail timed out\n",
+ __func__);
+ rc = -ETIMEDOUT;
+ } else if (prtd->cmd_interrupt == 1) {
+ /*
+ * This scenario might not happen as we do not allow
+ * flush in transition state.
+ */
+ pr_debug("%s: wait_for_stream_avail interrupted\n", __func__);
+ prtd->cmd_interrupt = 0;
+ prtd->stream_available = 0;
+ rc = -EINTR;
+ } else {
+ prtd->stream_available = 0;
+ rc = 0;
+ }
+ pr_debug("%s : rc = %d", __func__, rc);
+ return rc;
+}
+
static int msm_compr_trigger(struct snd_compr_stream *cstream, int cmd)
{
struct snd_compr_runtime *runtime = cstream->runtime;
@@ -786,6 +943,7 @@
int bytes_to_write;
unsigned long flags;
int stream_id;
+ uint32_t stream_index;
if (cstream->direction != SND_COMPRESS_PLAYBACK) {
pr_err("%s: Unsupported stream type\n", __func__);
@@ -817,6 +975,13 @@
prtd->gapless_state.gapless_transition);
stream_id = ac->stream_id;
atomic_set(&prtd->start, 0);
+ if (prtd->next_stream) {
+ pr_debug("%s: interrupt next track wait queues\n",
+ __func__);
+ prtd->cmd_interrupt = 1;
+ wake_up(&prtd->wait_for_stream_avail);
+ prtd->next_stream = 0;
+ }
if (atomic_read(&prtd->eos)) {
pr_debug("%s: interrupt eos wait queues", __func__);
prtd->cmd_interrupt = 1;
@@ -831,9 +996,9 @@
atomic_set(&prtd->drain, 0);
}
prtd->last_buffer = 0;
- pr_debug("issue CMD_FLUSH\n");
prtd->cmd_ack = 0;
if (!prtd->gapless_state.gapless_transition) {
+ pr_debug("issue CMD_FLUSH stream_id %d\n", stream_id);
spin_unlock_irqrestore(&prtd->lock, flags);
rc = q6asm_stream_cmd(
prtd->audio_client, CMD_FLUSH, stream_id);
@@ -859,6 +1024,8 @@
prtd->copied_total = 0;
prtd->app_pointer = 0;
prtd->bytes_received = 0;
+ prtd->bytes_sent = 0;
+
atomic_set(&prtd->xrun, 0);
spin_unlock_irqrestore(&prtd->lock, flags);
break;
@@ -866,7 +1033,9 @@
pr_debug("SNDRV_PCM_TRIGGER_PAUSE_PUSH transition %d\n",
prtd->gapless_state.gapless_transition);
if (!prtd->gapless_state.gapless_transition) {
- q6asm_cmd_nowait(prtd->audio_client, CMD_PAUSE);
+ pr_debug("issue CMD_PAUSE stream_id %d\n",
+ ac->stream_id);
+ q6asm_stream_cmd_nowait(ac, CMD_PAUSE, ac->stream_id);
atomic_set(&prtd->start, 0);
}
break;
@@ -942,7 +1111,8 @@
/* send EOS */
prtd->cmd_ack = 0;
- q6asm_cmd_nowait(prtd->audio_client, CMD_EOS);
+ pr_debug("issue CMD_EOS stream_id %d\n", ac->stream_id);
+ q6asm_stream_cmd_nowait(ac, CMD_EOS, ac->stream_id);
pr_info("PARTIAL DRAIN, do not wait for EOS ack\n");
/* send a zero length buffer */
@@ -979,8 +1149,9 @@
}
/* move to next stream and reset vars */
- pr_debug("%s: Moving to next stream in gapless\n", __func__);
- ac->stream_id ^= 1;
+ pr_debug("%s: Moving to next stream in gapless\n",
+ __func__);
+ ac->stream_id = NEXT_STREAM_ID(ac->stream_id);
prtd->byte_offset = 0;
prtd->app_pointer = 0;
prtd->first_buffer = 1;
@@ -1007,11 +1178,11 @@
stream can be used for gapless playback
*/
prtd->gapless_state.set_next_stream_id = false;
- pr_debug("%s: CMD_EOS\n", __func__);
+ pr_debug("%s:CMD_EOS stream_id %d\n", __func__, ac->stream_id);
prtd->cmd_ack = 0;
atomic_set(&prtd->eos, 1);
- q6asm_cmd_nowait(prtd->audio_client, CMD_EOS);
+ q6asm_stream_cmd_nowait(ac, CMD_EOS, ac->stream_id);
spin_unlock_irqrestore(&prtd->lock, flags);
@@ -1023,7 +1194,8 @@
if (rc < 0)
pr_err("%s: EOS wait failed\n", __func__);
- pr_debug("%s: SNDRV_COMPRESS_DRAIN out of wait for EOS\n", __func__);
+ pr_debug("%s: SNDRV_COMPRESS_DRAIN out of wait for EOS\n",
+ __func__);
if (prtd->cmd_interrupt)
rc = -EINTR;
@@ -1035,12 +1207,14 @@
* so prepare the current stream in session for gapless playback
*/
spin_lock_irqsave(&prtd->lock, flags);
- pr_debug("%s: issue CMD_PAUSE ", __func__);
- q6asm_cmd_nowait(prtd->audio_client, CMD_PAUSE);
+ pr_debug("%s:issue CMD_PAUSE stream_id %d",
+ __func__, ac->stream_id);
+ q6asm_stream_cmd_nowait(ac, CMD_PAUSE, ac->stream_id);
prtd->cmd_ack = 0;
spin_unlock_irqrestore(&prtd->lock, flags);
- pr_debug("%s: issue CMD_FLUSH", __func__);
- q6asm_cmd(prtd->audio_client, CMD_FLUSH);
+ pr_debug("%s:issue CMD_FLUSH ac->stream_id %d",
+ __func__, ac->stream_id);
+ q6asm_stream_cmd(ac, CMD_FLUSH, ac->stream_id);
wait_event_timeout(prtd->flush_wait,
prtd->cmd_ack, 1 * HZ / 4);
@@ -1052,8 +1226,11 @@
in the next avail() ioctl
prtd->copied_total = 0;
prtd->bytes_received = 0;
+ do not reset prtd->bytes_sent as well as the same
+ session is used for gapless playback
*/
prtd->byte_offset = 0;
+
prtd->app_pointer = 0;
prtd->first_buffer = 1;
prtd->last_buffer = 0;
@@ -1073,13 +1250,56 @@
pr_debug("%s: SND_COMPR_TRIGGER_NEXT_TRACK\n", __func__);
spin_lock_irqsave(&prtd->lock, flags);
rc = 0;
- stream_id = ac->stream_id^1; /*next stream in gapless*/
- if (prtd->gapless_state.stream_opened[stream_id]) {
- pr_debug("next session is already in opened state\n");
+ /* next stream in gapless */
+ stream_id = NEXT_STREAM_ID(ac->stream_id);
+ /*
+ * Wait if stream 1 has not completed before honoring next
+ * track for stream 3. Scenario happens if second clip is
+ * small and fills in one buffer so next track will be
+ * called immediately.
+ */
+ stream_index = STREAM_ARRAY_INDEX(stream_id);
+ if (stream_index >= MAX_NUMBER_OF_STREAMS ||
+ stream_index < 0) {
+ pr_err("%s: Invalid stream index: %d", __func__,
+ stream_index);
spin_unlock_irqrestore(&prtd->lock, flags);
+ rc = -EINVAL;
break;
}
+
+ if (prtd->gapless_state.stream_opened[stream_index]) {
+ if (prtd->gapless_state.gapless_transition) {
+ rc = msm_compr_wait_for_stream_avail(prtd,
+ &flags);
+ } else {
+ /*
+ * If session is already opened break out if
+ * the state is not gapless transition. This
+ * is when seek happens after the last buffer
+ * is sent to the driver. Next track would be
+ * called again after last buffer is sent.
+ */
+ pr_debug("next session is in opened state\n");
+ spin_unlock_irqrestore(&prtd->lock, flags);
+ break;
+ }
+ }
spin_unlock_irqrestore(&prtd->lock, flags);
+ if (rc < 0) {
+ /*
+ * if return type EINTR then reset to zero. Tiny
+ * compress treats EINTR as error and prevents PARTIAL
+ * DRAIN. EINTR is not an error. wait for stream avail
+ * is interrupted by some other command like FLUSH.
+ */
+ if (rc == -EINTR) {
+ pr_debug("%s: EINTR reset rc to 0\n", __func__);
+ rc = 0;
+ }
+ break;
+ }
+ pr_debug("%s: open_write stream_id %d", __func__, stream_id);
rc = q6asm_stream_open_write_v2(prtd->audio_client,
prtd->codec, 16,
stream_id,
@@ -1096,7 +1316,7 @@
break;
}
spin_lock_irqsave(&prtd->lock, flags);
- prtd->gapless_state.stream_opened[stream_id] = 1;
+ prtd->gapless_state.stream_opened[stream_index] = 1;
prtd->gapless_state.set_next_stream_id = true;
spin_unlock_irqrestore(&prtd->lock, flags);
break;
@@ -1247,8 +1467,6 @@
* since the available bytes fits fragment_size, copy the data right away
*/
spin_lock_irqsave(&prtd->lock, flags);
- if (prtd->gapless_state.gapless_transition)
- prtd->gapless_state.gapless_transition = 0;
prtd->bytes_received += count;
if (atomic_read(&prtd->start)) {
if (atomic_read(&prtd->xrun)) {
@@ -1470,6 +1688,74 @@
return 0;
}
+static int msm_compr_dec_params_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol);
+ unsigned long fe_id = kcontrol->private_value;
+ struct msm_compr_pdata *pdata = (struct msm_compr_pdata *)
+ snd_soc_platform_get_drvdata(platform);
+ struct msm_compr_dec_params *dec_params = NULL;
+ struct snd_compr_stream *cstream = NULL;
+ struct msm_compr_audio *prtd = NULL;
+ long *values = &(ucontrol->value.integer.value[0]);
+
+ pr_debug("%s\n", __func__);
+ if (fe_id >= MSM_FRONTEND_DAI_MAX) {
+ pr_err("%s Received out of bounds fe_id %lu\n",
+ __func__, fe_id);
+ return -EINVAL;
+ }
+
+ cstream = pdata->cstream[fe_id];
+ dec_params = pdata->dec_params[fe_id];
+
+ if (!cstream || !dec_params) {
+ pr_err("%s: stream or dec_params inactive\n", __func__);
+ return -EINVAL;
+ }
+ prtd = cstream->runtime->private_data;
+ if (!prtd) {
+ pr_err("%s: cannot set dec_params\n", __func__);
+ return -EINVAL;
+ }
+ switch (prtd->codec) {
+ case FORMAT_MP3:
+ case FORMAT_MPEG4_AAC:
+ pr_debug("%s: no runtime parameters for codec: %d\n", __func__,
+ prtd->codec);
+ break;
+ case FORMAT_AC3:
+ case FORMAT_EAC3: {
+ struct snd_dec_ddp *ddp = &dec_params->ddp_params;
+ int cnt;
+ ddp->params_length = (*values++);
+ if (ddp->params_length > DDP_DEC_MAX_NUM_PARAM) {
+ pr_err("%s: invalid num of params:: %d\n", __func__,
+ ddp->params_length);
+ return -EINVAL;
+ }
+ for (cnt = 0; cnt < ddp->params_length; cnt++) {
+ ddp->params_id[cnt] = *values++;
+ ddp->params_value[cnt] = *values++;
+ }
+ if (msm_compr_send_ddp_cfg(prtd->audio_client, ddp) < 0)
+ pr_err("%s: DDP CMD CFG failed\n", __func__);
+ break;
+ }
+ default:
+ break;
+ }
+ return 0;
+}
+
+static int msm_compr_dec_params_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ /* dummy function */
+ return 0;
+}
+
static int msm_compr_probe(struct snd_soc_platform *platform)
{
struct msm_compr_pdata *pdata;
@@ -1489,6 +1775,7 @@
pdata->volume[i][0] = COMPRESSED_LR_VOL_MAX_STEPS;
pdata->volume[i][1] = COMPRESSED_LR_VOL_MAX_STEPS;
pdata->audio_effects[i] = NULL;
+ pdata->dec_params[i] = NULL;
pdata->cstream[i] = NULL;
}
@@ -1522,6 +1809,16 @@
return 0;
}
+static int msm_compr_dec_params_info(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 128;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = 0xFFFFFFFF;
+ return 0;
+}
+
static int msm_compr_add_volume_control(struct snd_soc_pcm_runtime *rtd)
{
const char *mixer_ctl_name = "Compress Playback";
@@ -1648,6 +1945,57 @@
msm_compr_gapless_put),
};
+static int msm_compr_add_dec_runtime_params_control(
+ struct snd_soc_pcm_runtime *rtd)
+{
+ const char *mixer_ctl_name = "Audio Stream";
+ const char *deviceNo = "NN";
+ const char *suffix = "Dec Params";
+ char *mixer_str = NULL;
+ int ctl_len;
+ struct snd_kcontrol_new fe_dec_params_control[1] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "?",
+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
+ .info = msm_compr_dec_params_info,
+ .get = msm_compr_dec_params_get,
+ .put = msm_compr_dec_params_put,
+ .private_value = 0,
+ }
+ };
+
+ if (!rtd) {
+ pr_err("%s NULL rtd\n", __func__);
+ return 0;
+ }
+
+ pr_debug("%s: added new compr FE with name %s, id %d, cpu dai %s, device no %d\n",
+ __func__, rtd->dai_link->name, rtd->dai_link->be_id,
+ rtd->dai_link->cpu_dai_name, rtd->pcm->device);
+
+ ctl_len = strlen(mixer_ctl_name) + 1 + strlen(deviceNo) + 1 +
+ strlen(suffix) + 1;
+ mixer_str = kzalloc(ctl_len, GFP_KERNEL);
+
+ if (!mixer_str) {
+ pr_err("failed to allocate mixer ctrl str of len %d", ctl_len);
+ return 0;
+ }
+
+ snprintf(mixer_str, ctl_len, "%s %d %s", mixer_ctl_name,
+ rtd->pcm->device, suffix);
+
+ fe_dec_params_control[0].name = mixer_str;
+ fe_dec_params_control[0].private_value = rtd->dai_link->be_id;
+ pr_debug("Registering new mixer ctl %s", mixer_str);
+ snd_soc_add_platform_controls(rtd->platform,
+ fe_dec_params_control,
+ ARRAY_SIZE(fe_dec_params_control));
+ kfree(mixer_str);
+ return 0;
+}
+
static int msm_compr_new(struct snd_soc_pcm_runtime *rtd)
{
int rc;
@@ -1659,6 +2007,10 @@
if (rc)
pr_err("%s: Could not add Compr Audio Effects Control\n",
__func__);
+ rc = msm_compr_add_dec_runtime_params_control(rtd);
+ if (rc)
+ pr_err("%s: Could not add Compr Dec runtime params Control\n",
+ __func__);
return 0;
}
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c
index 32eaebf..08448fe 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -99,7 +99,7 @@
/* Conventional and unconventional sample rate supported */
static unsigned int supported_sample_rates[] = {
8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
- 96000, 192000
+ 88200, 96000, 176400, 192000
};
static uint32_t in_frame_info[CAPTURE_MAX_NUM_PERIODS][2];
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
index 91c0744..32e6b2b 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -59,6 +59,7 @@
#define INVALID_SESSION -1
#define SESSION_TYPE_RX 0
#define SESSION_TYPE_TX 1
+#define MAX_LSM_SESSIONS 8
#define EC_PORT_ID_PRIMARY_MI2S_TX 1
#define EC_PORT_ID_SECONDARY_MI2S_TX 2
@@ -153,12 +154,12 @@
* If new back-end is defined, add new back-end DAI ID at the end of enum
*/
-
+#define SRS_TRUMEDIA_INDEX 2
union srs_trumedia_params_u {
struct srs_trumedia_params srs_params;
unsigned short int raw_params[1];
};
-static union srs_trumedia_params_u msm_srs_trumedia_params[2];
+static union srs_trumedia_params_u msm_srs_trumedia_params[SRS_TRUMEDIA_INDEX];
static int srs_port_id = -1;
static void srs_send_params(int port_id, unsigned int techs,
@@ -1186,7 +1187,7 @@
SRS_PARAM_OFFSET_MASK) >> 16);
value = (unsigned short)(ucontrol->value.integer.value[0] &
SRS_PARAM_VALUE_MASK);
- if (offset < max) {
+ if ((offset < max) && (index < SRS_TRUMEDIA_INDEX)) {
msm_srs_trumedia_params[index].raw_params[offset] = value;
pr_debug("SRS %s: index set... (max %d, requested %d, val %d, paramblockidx %d)",
__func__, max, offset, value, index);
@@ -2612,11 +2613,45 @@
static const struct soc_enum lsm_mux_enum =
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mad_audio_mux_text), mad_audio_mux_text);
-static const struct snd_kcontrol_new lsm_mux =
+
+static const struct snd_kcontrol_new lsm1_mux =
SOC_DAPM_ENUM_EXT("LSM1 MUX", lsm_mux_enum,
msm_routing_lsm_mux_get,
msm_routing_lsm_mux_put);
+static const struct snd_kcontrol_new lsm2_mux =
+ SOC_DAPM_ENUM_EXT("LSM2 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+static const struct snd_kcontrol_new lsm3_mux =
+ SOC_DAPM_ENUM_EXT("LSM3 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+
+static const struct snd_kcontrol_new lsm4_mux =
+ SOC_DAPM_ENUM_EXT("LSM4 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+static const struct snd_kcontrol_new lsm5_mux =
+ SOC_DAPM_ENUM_EXT("LSM5 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+
+static const struct snd_kcontrol_new lsm6_mux =
+ SOC_DAPM_ENUM_EXT("LSM6 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+static const struct snd_kcontrol_new lsm7_mux =
+ SOC_DAPM_ENUM_EXT("LSM7 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+
+static const struct snd_kcontrol_new lsm8_mux =
+ SOC_DAPM_ENUM_EXT("LSM8 MUX", lsm_mux_enum,
+ msm_routing_lsm_mux_get,
+ msm_routing_lsm_mux_put);
+
+
static const char * const lsm_func_text[] = {
"None", "AUDIO", "BEACON", "ULTRASOUND", "SWAUDIO",
};
@@ -2784,6 +2819,7 @@
int msm_routing_get_rms_value_control(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol) {
int rc = 0;
+ int be_idx = 0;
char *param_value;
int *update_param_value;
uint32_t param_length = sizeof(uint32_t);
@@ -2793,21 +2829,26 @@
pr_err("%s, param memory alloc failed\n", __func__);
return -ENOMEM;
}
- rc = adm_get_params(SLIMBUS_0_TX,
- RMS_MODULEID_APPI_PASSTHRU,
- RMS_PARAM_FIRST_SAMPLE,
- param_length + param_payload_len,
- param_value);
- if (rc) {
- pr_err("%s: get parameters failed\n", __func__);
- kfree(param_value);
- return -EINVAL;
- }
- update_param_value = (int *)param_value;
- ucontrol->value.integer.value[0] = update_param_value[0];
+ for (be_idx = 0; be_idx < MSM_BACKEND_DAI_MAX; be_idx++)
+ if (msm_bedais[be_idx].port_id == SLIMBUS_0_TX)
+ break;
+ if ((be_idx < MSM_BACKEND_DAI_MAX) && msm_bedais[be_idx].active) {
+ rc = adm_get_params(SLIMBUS_0_TX,
+ RMS_MODULEID_APPI_PASSTHRU,
+ RMS_PARAM_FIRST_SAMPLE,
+ param_length + param_payload_len,
+ param_value);
+ if (rc) {
+ pr_err("%s: get parameters failed\n", __func__);
+ kfree(param_value);
+ return -EINVAL;
+ }
+ update_param_value = (int *)param_value;
+ ucontrol->value.integer.value[0] = update_param_value[0];
- pr_debug("%s: FROM DSP value[0] 0x%x\n",
- __func__, update_param_value[0]);
+ pr_debug("%s: FROM DSP value[0] 0x%x\n",
+ __func__, update_param_value[0]);
+ }
kfree(param_value);
return 0;
}
@@ -3157,7 +3198,21 @@
SND_SOC_DAPM_AIF_IN("DTMF_DL_HL", "DTMF_RX_HOSTLESS Playback",
0, 0, 0, 0),
/* LSM */
- SND_SOC_DAPM_AIF_OUT("LSM_UL_HL", "Listen Audio Service Capture",
+ SND_SOC_DAPM_AIF_OUT("LSM1_UL_HL", "Listen 1 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM2_UL_HL", "Listen 2 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM3_UL_HL", "Listen 3 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM4_UL_HL", "Listen 4 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM5_UL_HL", "Listen 5 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM6_UL_HL", "Listen 6 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM7_UL_HL", "Listen 7 Audio Service Capture",
+ 0, 0, 0, 0),
+ SND_SOC_DAPM_AIF_OUT("LSM8_UL_HL", "Listen 8 Audio Service Capture",
0, 0, 0, 0),
SND_SOC_DAPM_AIF_IN("QCHAT_DL", "QCHAT Playback", 0, 0, 0, 0),
SND_SOC_DAPM_AIF_OUT("QCHAT_UL", "QCHAT Capture", 0, 0, 0, 0),
@@ -3245,7 +3300,14 @@
&pcm_rx_switch_mixer_controls),
/* Mux Definitions */
- SND_SOC_DAPM_MUX("LSM1 MUX", SND_SOC_NOPM, 0, 0, &lsm_mux),
+ SND_SOC_DAPM_MUX("LSM1 MUX", SND_SOC_NOPM, 0, 0, &lsm1_mux),
+ SND_SOC_DAPM_MUX("LSM2 MUX", SND_SOC_NOPM, 0, 0, &lsm2_mux),
+ SND_SOC_DAPM_MUX("LSM3 MUX", SND_SOC_NOPM, 0, 0, &lsm3_mux),
+ SND_SOC_DAPM_MUX("LSM4 MUX", SND_SOC_NOPM, 0, 0, &lsm4_mux),
+ SND_SOC_DAPM_MUX("LSM5 MUX", SND_SOC_NOPM, 0, 0, &lsm5_mux),
+ SND_SOC_DAPM_MUX("LSM6 MUX", SND_SOC_NOPM, 0, 0, &lsm6_mux),
+ SND_SOC_DAPM_MUX("LSM7 MUX", SND_SOC_NOPM, 0, 0, &lsm7_mux),
+ SND_SOC_DAPM_MUX("LSM8 MUX", SND_SOC_NOPM, 0, 0, &lsm8_mux),
SND_SOC_DAPM_MUX("SLIM_0_RX AANC MUX", SND_SOC_NOPM, 0, 0,
aanc_slim_0_rx_mux),
@@ -3775,7 +3837,62 @@
{"LSM1 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
{"LSM1 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
{"LSM1 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
- {"LSM_UL_HL", NULL, "LSM1 MUX"},
+ {"LSM1_UL_HL", NULL, "LSM1 MUX"},
+
+ {"LSM2 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM2 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM2 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM2 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM2 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM2_UL_HL", NULL, "LSM2 MUX"},
+
+
+ {"LSM3 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM3 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM3 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM3 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM3 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM3_UL_HL", NULL, "LSM3 MUX"},
+
+
+ {"LSM4 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM4 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM4 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM4 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM4 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM4_UL_HL", NULL, "LSM4 MUX"},
+
+ {"LSM5 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM5 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM5 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM5 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM5 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM5_UL_HL", NULL, "LSM5 MUX"},
+
+ {"LSM6 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM6 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM6 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM6 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM6 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM6_UL_HL", NULL, "LSM6 MUX"},
+
+
+ {"LSM7 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM7 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM7 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM7 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM7 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM7_UL_HL", NULL, "LSM7 MUX"},
+
+
+ {"LSM8 MUX", "SLIMBUS_0_TX", "SLIMBUS_0_TX"},
+ {"LSM8 MUX", "SLIMBUS_1_TX", "SLIMBUS_1_TX"},
+ {"LSM8 MUX", "SLIMBUS_3_TX", "SLIMBUS_3_TX"},
+ {"LSM8 MUX", "SLIMBUS_4_TX", "SLIMBUS_4_TX"},
+ {"LSM8 MUX", "SLIMBUS_5_TX", "SLIMBUS_5_TX"},
+ {"LSM8_UL_HL", NULL, "LSM8 MUX"},
+
+
{"QCHAT_Tx Mixer", "PRI_TX_QCHAT", "PRI_I2S_TX"},
{"QCHAT_Tx Mixer", "SLIM_0_TX_QCHAT", "SLIMBUS_0_TX"},
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h
index 54f5e4a..f2b0436 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -79,9 +79,16 @@
MSM_FRONTEND_DAI_VOICE_STUB,
MSM_FRONTEND_DAI_VOLTE,
MSM_FRONTEND_DAI_DTMF_RX,
- MSM_FRONTEND_DAI_LSM1,
MSM_FRONTEND_DAI_VOICE2,
MSM_FRONTEND_DAI_QCHAT,
+ MSM_FRONTEND_DAI_LSM1,
+ MSM_FRONTEND_DAI_LSM2,
+ MSM_FRONTEND_DAI_LSM3,
+ MSM_FRONTEND_DAI_LSM4,
+ MSM_FRONTEND_DAI_LSM5,
+ MSM_FRONTEND_DAI_LSM6,
+ MSM_FRONTEND_DAI_LSM7,
+ MSM_FRONTEND_DAI_LSM8,
MSM_FRONTEND_DAI_MAX,
};
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c
index 97c7b5d..e3c8944 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -86,6 +86,10 @@
struct voip_frame_hdr {
uint32_t timestamp;
union {
+ /*
+ * Bits 0-15: Frame type
+ * Bits 16-31: Frame rate
+ */
uint32_t frame_type;
uint32_t packet_rate;
};
@@ -162,8 +166,6 @@
struct snd_ctl_elem_value *ucontrol);
static int msm_voip_rate_config_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
-static int msm_voip_rate_config_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol);
static int msm_voip_evrc_min_max_rate_config_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
static int msm_voip_evrc_min_max_rate_config_get(struct snd_kcontrol *kcontrol,
@@ -277,7 +279,7 @@
SOC_SINGLE_EXT("Voip Mode Config", SND_SOC_NOPM, 0, VOIP_MODE_MAX, 0,
msm_voip_mode_config_get, msm_voip_mode_config_put),
SOC_SINGLE_EXT("Voip Rate Config", SND_SOC_NOPM, 0, VOIP_RATE_MAX, 0,
- msm_voip_rate_config_get, msm_voip_rate_config_put),
+ NULL, msm_voip_rate_config_put),
SOC_SINGLE_MULTI_EXT("Voip Evrc Min Max Rate Config", SND_SOC_NOPM,
0, VOC_1_RATE, 0, 2, msm_voip_evrc_min_max_rate_config_get,
msm_voip_evrc_min_max_rate_config_put),
@@ -385,6 +387,8 @@
struct voip_buf_node *buf_node = NULL;
struct voip_drv_info *prtd = private_data;
unsigned long dsp_flags;
+ uint32_t rate_type;
+ uint32_t frame_rate;
if (prtd->playback_substream == NULL)
return;
@@ -408,7 +412,19 @@
* Bits 4-7: Frame type
*/
*voc_pkt = ((buf_node->frame.frm_hdr.frame_type &
- 0x0F) << 4) | (prtd->rate_type & 0x0F);
+ 0x0F) << 4);
+ frame_rate = (buf_node->frame.frm_hdr.frame_type &
+ 0xFFFF0000) >> 16;
+ if (frame_rate) {
+ if (voip_get_rate_type(prtd->mode, frame_rate,
+ &rate_type)) {
+ pr_err("%s(): fail at getting rate_type \n",
+ __func__);
+ } else
+ prtd->rate_type = rate_type;
+ }
+ *voc_pkt |= prtd->rate_type & 0x0F;
+
voc_pkt = voc_pkt + DSP_FRAME_HDR_LEN;
memcpy(voc_pkt,
&buf_node->frame.voc_pkt[0],
@@ -1087,30 +1103,43 @@
return 0;
}
-static int msm_voip_rate_config_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- mutex_lock(&voip_info.lock);
-
- ucontrol->value.integer.value[0] = voip_info.rate;
-
- mutex_unlock(&voip_info.lock);
-
- return 0;
-}
-
static int msm_voip_rate_config_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
+ int ret = 0;
+ int rate = ucontrol->value.integer.value[0];
+
mutex_lock(&voip_info.lock);
- voip_info.rate = ucontrol->value.integer.value[0];
+ if (voip_info.rate != rate) {
+ voip_info.rate = rate;
+ pr_debug("%s: rate=%d\n", __func__, voip_info.rate);
- pr_debug("%s: rate=%d\n", __func__, voip_info.rate);
+ if (voip_info.state == VOIP_STARTED &&
+ (voip_info.mode == MODE_AMR ||
+ voip_info.mode == MODE_AMR_WB)) {
+ ret = voip_config_vocoder(
+ voip_info.capture_substream);
+ if (ret) {
+ pr_err("%s:Failed to configure vocoder, ret=%d\n",
+ __func__, ret);
+ goto done;
+ }
+
+ ret = voc_update_amr_vocoder_rate(
+ voc_get_session_id(VOIP_SESSION_NAME));
+ if (ret) {
+ pr_err("%s:Failed to update AMR rate, ret=%d\n",
+ __func__, ret);
+ }
+ }
+ }
+
+done:
mutex_unlock(&voip_info.lock);
- return 0;
+ return ret;
}
static int msm_voip_evrc_min_max_rate_config_get(struct snd_kcontrol *kcontrol,
diff --git a/sound/soc/msm/qdsp6v2/q6adm.c b/sound/soc/msm/qdsp6v2/q6adm.c
index 54b1263..2a6ce43 100644
--- a/sound/soc/msm/qdsp6v2/q6adm.c
+++ b/sound/soc/msm/qdsp6v2/q6adm.c
@@ -93,6 +93,11 @@
sz = sizeof(struct adm_cmd_set_pp_params_inband_v5) +
sizeof(struct srs_trumedia_params_GLOBAL);
adm_params = kzalloc(sz, GFP_KERNEL);
+ if (!adm_params) {
+ pr_err("%s, adm params memory alloc failed\n",
+ __func__);
+ return -ENOMEM;
+ }
adm_params->payload_size =
sizeof(struct srs_trumedia_params_GLOBAL) +
sizeof(struct adm_param_data_v5);
@@ -117,6 +122,11 @@
sz = sizeof(struct adm_cmd_set_pp_params_inband_v5) +
sizeof(struct srs_trumedia_params_WOWHD);
adm_params = kzalloc(sz, GFP_KERNEL);
+ if (!adm_params) {
+ pr_err("%s, adm params memory alloc failed\n",
+ __func__);
+ return -ENOMEM;
+ }
adm_params->payload_size =
sizeof(struct srs_trumedia_params_WOWHD) +
sizeof(struct adm_param_data_v5);
@@ -142,6 +152,11 @@
sz = sizeof(struct adm_cmd_set_pp_params_inband_v5) +
sizeof(struct srs_trumedia_params_CSHP);
adm_params = kzalloc(sz, GFP_KERNEL);
+ if (!adm_params) {
+ pr_err("%s, adm params memory alloc failed\n",
+ __func__);
+ return -ENOMEM;
+ }
adm_params->payload_size =
sizeof(struct srs_trumedia_params_CSHP) +
sizeof(struct adm_param_data_v5);
@@ -166,6 +181,11 @@
sz = sizeof(struct adm_cmd_set_pp_params_inband_v5) +
sizeof(struct srs_trumedia_params_HPF);
adm_params = kzalloc(sz, GFP_KERNEL);
+ if (!adm_params) {
+ pr_err("%s, adm params memory alloc failed\n",
+ __func__);
+ return -ENOMEM;
+ }
adm_params->payload_size =
sizeof(struct srs_trumedia_params_HPF) +
sizeof(struct adm_param_data_v5);
@@ -186,6 +206,11 @@
sz = sizeof(struct adm_cmd_set_pp_params_inband_v5) +
sizeof(struct srs_trumedia_params_PEQ);
adm_params = kzalloc(sz, GFP_KERNEL);
+ if (!adm_params) {
+ pr_err("%s, adm params memory alloc failed\n",
+ __func__);
+ return -ENOMEM;
+ }
adm_params->payload_size =
sizeof(struct srs_trumedia_params_PEQ) +
sizeof(struct adm_param_data_v5);
@@ -208,6 +233,11 @@
sz = sizeof(struct adm_cmd_set_pp_params_inband_v5) +
sizeof(struct srs_trumedia_params_HL);
adm_params = kzalloc(sz, GFP_KERNEL);
+ if (!adm_params) {
+ pr_err("%s, adm params memory alloc failed\n",
+ __func__);
+ return -ENOMEM;
+ }
adm_params->payload_size =
sizeof(struct srs_trumedia_params_HL) +
sizeof(struct adm_param_data_v5);
@@ -449,6 +479,12 @@
{
uint32_t *payload;
int i, index;
+
+ if (data == NULL) {
+ pr_err("%s: data paramter is null\n", __func__);
+ return -EINVAL;
+ }
+
payload = data->payload;
if (data->opcode == RESET_EVENTS) {
diff --git a/sound/soc/msm/qdsp6v2/q6afe.c b/sound/soc/msm/qdsp6v2/q6afe.c
index acb8e70..774a33c 100644
--- a/sound/soc/msm/qdsp6v2/q6afe.c
+++ b/sound/soc/msm/qdsp6v2/q6afe.c
@@ -436,8 +436,9 @@
}
index = q6audio_get_port_index(port_id);
- if (index < 0) {
- pr_debug("%s: AFE port index invalid!\n", __func__);
+ if (index < 0 || index > AFE_MAX_PORTS) {
+ pr_debug("%s: AFE port index[%d] invalid!\n",
+ __func__, index);
goto done;
}
@@ -652,8 +653,9 @@
goto fail_cmd;
}
index = q6audio_get_port_index(port_id);
- if (index < 0) {
- pr_debug("%s: AFE port index invalid!\n", __func__);
+ if (index < 0 || index > AFE_MAX_PORTS) {
+ pr_debug("%s: AFE port index[%d] invalid!\n",
+ __func__, index);
goto fail_cmd;
}
diff --git a/sound/soc/msm/qdsp6v2/q6asm.c b/sound/soc/msm/qdsp6v2/q6asm.c
index e60cd26..7e0d03e 100644
--- a/sound/soc/msm/qdsp6v2/q6asm.c
+++ b/sound/soc/msm/qdsp6v2/q6asm.c
@@ -81,6 +81,7 @@
static int q6asm_map_channels(u8 *channel_mapping, uint32_t channels);
void *q6asm_mmap_apr_reg(void);
+static int q6asm_is_valid_session(struct apr_client_data *data, void *priv);
/* for ASM custom topology */
static struct audio_buffer common_buf[2];
@@ -132,6 +133,10 @@
static ssize_t audio_output_latency_dbgfs_read(struct file *file,
char __user *buf, size_t count, loff_t *ppos)
{
+ if (out_buffer == NULL) {
+ pr_err("%s: out_buffer is null\n", __func__);
+ return 0;
+ }
snprintf(out_buffer, OUT_BUFFER_SIZE, "%ld,%ld,%ld,%ld,%ld,%ld,",\
out_cold_tv.tv_sec, out_cold_tv.tv_usec, out_warm_tv.tv_sec,\
out_warm_tv.tv_usec, out_cont_tv.tv_sec, out_cont_tv.tv_usec);
@@ -177,6 +182,10 @@
static ssize_t audio_input_latency_dbgfs_read(struct file *file,
char __user *buf, size_t count, loff_t *ppos)
{
+ if (in_buffer == NULL) {
+ pr_err("%s: in_buffer is null\n", __func__);
+ return 0;
+ }
snprintf(in_buffer, IN_BUFFER_SIZE, "%ld,%ld,",\
in_cont_tv.tv_sec, in_cont_tv.tv_usec);
return simple_read_from_buffer(buf, IN_BUFFER_SIZE, ppos,
@@ -292,17 +301,30 @@
static void config_debug_fs_init(void)
{
out_buffer = kmalloc(OUT_BUFFER_SIZE, GFP_KERNEL);
+ if (out_buffer == NULL) {
+ pr_err("%s: kmalloc() for out_buffer failed\n", __func__);
+ goto fail_1;
+ }
+ in_buffer = kmalloc(IN_BUFFER_SIZE, GFP_KERNEL);
+ if (in_buffer == NULL) {
+ pr_err("%s: kmalloc() for in_buffer failed\n", __func__);
+ goto fail_2;
+ }
out_dentry = debugfs_create_file("audio_out_latency_measurement_node",\
S_IRUGO | S_IWUSR | S_IWGRP,\
NULL, NULL, &audio_output_latency_debug_fops);
if (IS_ERR(out_dentry))
- pr_err("debugfs_create_file failed\n");
- in_buffer = kmalloc(IN_BUFFER_SIZE, GFP_KERNEL);
+ pr_err("%s: debugfs_create_file failed\n", __func__);
in_dentry = debugfs_create_file("audio_in_latency_measurement_node",\
S_IRUGO | S_IWUSR | S_IWGRP,\
NULL, NULL, &audio_input_latency_debug_fops);
if (IS_ERR(in_dentry))
- pr_err("debugfs_create_file failed\n");
+ pr_err("%s: debugfs_create_file failed\n", __func__);
+ return;
+fail_2:
+ kfree(out_buffer);
+fail_1:
+ return;
}
#else
static void config_debug_fs_write(struct audio_buffer *ab)
@@ -817,6 +839,8 @@
ac->io_mode = SYNC_IO_MODE;
ac->perf_mode = LEGACY_PCM_MODE;
ac->fptr_cache_ops = NULL;
+ /* DSP expects stream id from 1 */
+ ac->stream_id = 1;
ac->apr = apr_register("ADSP", "ASM", \
(apr_fn)q6asm_callback,\
((ac->session) << 8 | 0x0001),\
@@ -1066,8 +1090,11 @@
{
uint32_t sid = 0;
uint32_t dir = 0;
+ uint32_t i = IN;
uint32_t *payload;
unsigned long dsp_flags;
+ struct asm_buffer_node *buf_node = NULL;
+ struct list_head *ptr, *next;
struct audio_client *ac = NULL;
struct audio_port_data *port;
@@ -1086,6 +1113,20 @@
data->reset_proc,
this_mmap.apr);
apr_reset(this_mmap.apr);
+ for (; i <= OUT; i++) {
+ list_for_each_safe(ptr, next,
+ &common_client.port[i].mem_map_handle) {
+ buf_node = list_entry(ptr,
+ struct asm_buffer_node,
+ list);
+ if (buf_node->buf_addr_lsw ==
+ common_client.port[i].buf->phys) {
+ list_del(&buf_node->list);
+ kfree(buf_node);
+ }
+ }
+ pr_debug("%s:Clearing custom topology\n", __func__);
+ }
this_mmap.apr = NULL;
reset_custom_topology_flags();
set_custom_topology = 1;
@@ -1196,6 +1237,7 @@
unsigned long dsp_flags;
uint32_t *payload;
uint32_t wakeup_flag = 1;
+ int32_t ret = 0;
if ((ac == NULL) || (data == NULL)) {
@@ -1219,6 +1261,9 @@
}
if (data->opcode == RESET_EVENTS) {
+ if(ac->apr == NULL) {
+ ac->apr = ac->apr2;
+ }
pr_debug("q6asm_callback: Reset event is received: %d %d apr[%p]\n",
data->reset_event, data->reset_proc, ac->apr);
if (ac->cb)
@@ -1259,11 +1304,10 @@
case ASM_SESSION_CMD_REGISTER_FORX_OVERFLOW_EVENTS:
case ASM_STREAM_CMD_FLUSH_READBUFS:
pr_debug("%s:Payload = [0x%x]\n", __func__, payload[0]);
- if (token != ac->session) {
- pr_err("%s:Invalid session[%d] rxed expected[%d]",
- __func__, token, ac->session);
- return -EINVAL;
- }
+ ret = q6asm_is_valid_session(data, priv);
+ if (ret != 0)
+ return ret;
+
case ASM_STREAM_CMD_OPEN_READ_V3:
case ASM_STREAM_CMD_OPEN_WRITE_V3:
case ASM_STREAM_CMD_OPEN_READWRITE_V2:
@@ -1570,8 +1614,8 @@
hdr->src_domain = APR_DOMAIN_APPS;
hdr->dest_svc = APR_SVC_ASM;
hdr->dest_domain = APR_DOMAIN_ADSP;
- hdr->src_port = ((ac->session << 8) & 0xFF00) | (stream_id+1);
- hdr->dest_port = ((ac->session << 8) & 0xFF00) | (stream_id+1);
+ hdr->src_port = ((ac->session << 8) & 0xFF00) | (stream_id);
+ hdr->dest_port = ((ac->session << 8) & 0xFF00) | (stream_id);
if (cmd_flg) {
hdr->token = ac->session;
atomic_set(&ac->cmd_state, 1);
@@ -1611,8 +1655,8 @@
hdr->src_domain = APR_DOMAIN_APPS;
hdr->dest_svc = APR_SVC_ASM;
hdr->dest_domain = APR_DOMAIN_ADSP;
- hdr->src_port = ((ac->session << 8) & 0xFF00) | (stream_id+1);
- hdr->dest_port = ((ac->session << 8) & 0xFF00) | (stream_id+1);
+ hdr->src_port = ((ac->session << 8) & 0xFF00) | (stream_id);
+ hdr->dest_port = ((ac->session << 8) & 0xFF00) | (stream_id);
if (cmd_flg) {
hdr->token = ac->session;
atomic_set(&ac->cmd_state, 1);
@@ -1790,6 +1834,17 @@
q6asm_stream_add_hdr(ac, &open.hdr, sizeof(open), TRUE, stream_id);
+ /*
+ * Updated the token field with stream/session for compressed playback
+ * Platform driver must know the the stream with which the command is
+ * associated
+ */
+ if (ac->io_mode & COMPRESSED_STREAM_IO)
+ open.hdr.token = ((ac->session << 8) & 0xFFFF00) |
+ (stream_id & 0xFF);
+
+ pr_debug("%s: token = 0x%x, stream_id %d, session 0x%x\n",
+ __func__, open.hdr.token, stream_id, ac->session);
open.hdr.opcode = ASM_STREAM_CMD_OPEN_WRITE_V3;
open.mode_flags = 0x00;
if (ac->perf_mode == ULTRA_LOW_LATENCY_PCM_MODE)
@@ -2745,6 +2800,17 @@
q6asm_stream_add_hdr(ac, &fmt.hdr, sizeof(fmt), TRUE, stream_id);
+ /*
+ * Updated the token field with stream/session for compressed playback
+ * Platform driver must know the the stream with which the command is
+ * associated
+ */
+ if (ac->io_mode & COMPRESSED_STREAM_IO)
+ fmt.hdr.token = ((ac->session << 8) & 0xFFFF00) |
+ (stream_id & 0xFF);
+
+ pr_debug("%s: token = 0x%x, stream_id %d, session 0x%x\n",
+ __func__, fmt.hdr.token, stream_id, ac->session);
fmt.hdr.opcode = ASM_DATA_CMD_MEDIA_FMT_UPDATE_V2;
fmt.fmt_blk.fmt_blk_size = sizeof(fmt) - sizeof(fmt.hdr) -
sizeof(fmt.fmt_blk);
@@ -3083,6 +3149,9 @@
rc = -EINVAL;
goto fail_cmd;
}
+
+ rc = 0;
+fail_cmd:
list_for_each_safe(ptr, next, &ac->port[dir].mem_map_handle) {
buf_node = list_entry(ptr, struct asm_buffer_node,
list);
@@ -3092,9 +3161,6 @@
break;
}
}
-
- rc = 0;
-fail_cmd:
return rc;
}
@@ -3262,6 +3328,9 @@
pr_err("timeout. waited for memory_unmap\n");
goto fail_cmd;
}
+ rc = 0;
+
+fail_cmd:
list_for_each_safe(ptr, next, &ac->port[dir].mem_map_handle) {
buf_node = list_entry(ptr, struct asm_buffer_node,
list);
@@ -3271,9 +3340,6 @@
break;
}
}
- rc = 0;
-
-fail_cmd:
return rc;
}
@@ -3389,8 +3455,6 @@
vol.hdr.opcode = ASM_STREAM_CMD_SET_PP_PARAMS_V2;
vol.param.data_payload_addr_lsw = 0;
vol.param.data_payload_addr_msw = 0;
-
-
vol.param.mem_map_handle = 0;
vol.param.data_payload_size = sizeof(vol) -
sizeof(vol.hdr) - sizeof(vol.param);
@@ -3420,6 +3484,7 @@
fail_cmd:
return rc;
}
+
int q6asm_set_softpause(struct audio_client *ac,
struct asm_softpause_params *pause_param)
{
@@ -3739,13 +3804,15 @@
u32 lbuf_addr_lsw;
u32 liomode;
u32 io_compressed;
+ u32 io_compressed_stream;
if (!ac || ac->apr == NULL) {
pr_err("%s: APR handle NULL\n", __func__);
return -EINVAL;
}
- q6asm_add_hdr_async(ac, &write.hdr, sizeof(write), FALSE);
+ q6asm_stream_add_hdr_async(
+ ac, &write.hdr, sizeof(write), FALSE, ac->stream_id);
port = &ac->port[IN];
ab = &port->buf[port->dsp_buf];
@@ -3760,10 +3827,12 @@
write.timestamp_lsw = param->lsw_ts;
liomode = (ASYNC_IO_MODE | NT_MODE);
io_compressed = (ASYNC_IO_MODE | COMPRESSED_IO);
+ io_compressed_stream = (ASYNC_IO_MODE | COMPRESSED_STREAM_IO);
if (ac->io_mode == liomode)
lbuf_addr_lsw = (write.buf_addr_lsw - 32);
- else if (ac->io_mode == io_compressed)
+ else if (ac->io_mode == io_compressed ||
+ ac->io_mode == io_compressed_stream)
lbuf_addr_lsw = (write.buf_addr_lsw - param->metadata_len);
else
lbuf_addr_lsw = write.buf_addr_lsw;
@@ -4093,6 +4162,17 @@
return -EINVAL;
}
q6asm_stream_add_hdr(ac, &hdr, sizeof(hdr), TRUE, stream_id);
+
+ /*
+ * Updated the token field with stream/session for compressed playback
+ * Platform driver must know the the stream with which the command is
+ * associated
+ */
+ if (ac->io_mode & COMPRESSED_STREAM_IO)
+ hdr.token = ((ac->session << 8) & 0xFFFF00) |
+ (stream_id & 0xFF);
+ pr_debug("%s: token = 0x%x, stream_id %d, session 0x%x\n",
+ __func__, hdr.token, stream_id, ac->session);
switch (cmd) {
case CMD_PAUSE:
pr_debug("%s:CMD_PAUSE\n", __func__);
@@ -4191,6 +4271,18 @@
return -EINVAL;
}
q6asm_stream_add_hdr_async(ac, &hdr, sizeof(hdr), TRUE, stream_id);
+
+ /*
+ * Updated the token field with stream/session for compressed playback
+ * Platform driver must know the the stream with which the command is
+ * associated
+ */
+ if (ac->io_mode & COMPRESSED_STREAM_IO)
+ hdr.token = ((ac->session << 8) & 0xFFFF00) |
+ (stream_id & 0xFF);
+
+ pr_debug("%s: token = 0x%x, stream_id %d, session 0x%x\n",
+ __func__, hdr.token, stream_id, ac->session);
switch (cmd) {
case CMD_PAUSE:
pr_debug("%s:CMD_PAUSE\n", __func__);
@@ -4237,17 +4329,30 @@
return __q6asm_cmd_nowait(ac, cmd, stream_id);
}
-int q6asm_send_meta_data(struct audio_client *ac, uint32_t initial_samples,
- uint32_t trailing_samples)
+int __q6asm_send_meta_data(struct audio_client *ac, uint32_t stream_id,
+ uint32_t initial_samples, uint32_t trailing_samples)
{
struct asm_data_cmd_remove_silence silence;
int rc = 0;
+
if (!ac || ac->apr == NULL) {
pr_err("APR handle NULL\n");
return -EINVAL;
}
pr_debug("%s session[%d]", __func__, ac->session);
- q6asm_add_hdr_async(ac, &silence.hdr, sizeof(silence), FALSE);
+ q6asm_stream_add_hdr_async(ac, &silence.hdr, sizeof(silence), FALSE,
+ stream_id);
+
+ /*
+ * Updated the token field with stream/session for compressed playback
+ * Platform driver must know the the stream with which the command is
+ * associated
+ */
+ if (ac->io_mode & COMPRESSED_STREAM_IO)
+ silence.hdr.token = ((ac->session << 8) & 0xFFFF00) |
+ (stream_id & 0xFF);
+ pr_debug("%s: token = 0x%x, stream_id %d, session 0x%x\n",
+ __func__, silence.hdr.token, stream_id, ac->session);
silence.hdr.opcode = ASM_DATA_CMD_REMOVE_INITIAL_SILENCE;
silence.num_samples_to_remove = initial_samples;
@@ -4272,6 +4377,20 @@
return -EINVAL;
}
+int q6asm_stream_send_meta_data(struct audio_client *ac, uint32_t stream_id,
+ uint32_t initial_samples, uint32_t trailing_samples)
+{
+ return __q6asm_send_meta_data(ac, stream_id, initial_samples,
+ trailing_samples);
+}
+
+int q6asm_send_meta_data(struct audio_client *ac, uint32_t initial_samples,
+ uint32_t trailing_samples)
+{
+ return __q6asm_send_meta_data(ac, ac->stream_id, initial_samples,
+ trailing_samples);
+}
+
static void q6asm_reset_buf_state(struct audio_client *ac)
{
int cnt = 0;
@@ -4375,6 +4494,34 @@
}
+static int q6asm_is_valid_session(struct apr_client_data *data, void *priv)
+{
+
+ struct audio_client *ac = (struct audio_client *)priv;
+ uint32_t token = data->token;
+
+ /*
+ * Some commands for compressed playback has token as session and
+ * other commands has session|stream. Check for both conditions
+ * before deciding if the callback was for a invalud session.
+ */
+ if (ac->io_mode & COMPRESSED_STREAM_IO) {
+ if ((token & 0xFFFFFF00) != ((ac->session << 8) & 0xFFFFFF00)
+ && (token != ac->session)) {
+ pr_err("%s:Invalid compr session[%d] rxed expected[%d]",
+ __func__, token, ac->session);
+ return -EINVAL;
+ }
+ } else {
+ if (token != ac->session) {
+ pr_err("%s:Invalid session[%d] rxed expected[%d]",
+ __func__, token, ac->session);
+ return -EINVAL;
+ }
+ }
+ return 0;
+}
+
static int __init q6asm_init(void)
{
int lcnt;
diff --git a/sound/soc/msm/qdsp6v2/q6core.c b/sound/soc/msm/qdsp6v2/q6core.c
index e9352df..496a5ef 100644
--- a/sound/soc/msm/qdsp6v2/q6core.c
+++ b/sound/soc/msm/qdsp6v2/q6core.c
@@ -41,6 +41,11 @@
uint32_t nseg;
int i, j;
+ if (data == NULL) {
+ pr_err("%s: data argument is null\n", __func__);
+ return -EINVAL;
+ }
+
pr_debug("core msg: payload len = %u, apr resp opcode = 0x%X\n",
data->payload_size, data->opcode);
diff --git a/sound/soc/msm/qdsp6v2/q6lsm.c b/sound/soc/msm/qdsp6v2/q6lsm.c
index 9227b23..a88b733 100644
--- a/sound/soc/msm/qdsp6v2/q6lsm.c
+++ b/sound/soc/msm/qdsp6v2/q6lsm.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2014, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -35,6 +35,7 @@
#define APR_TIMEOUT (5 * HZ)
#define LSM_CAL_SIZE 4096
+#define LSM_ALIGN_BOUNDARY 512
enum {
CMD_STATE_CLEARED = 0,
@@ -48,13 +49,11 @@
LSM_CONTROL_SESSION = 0x0F,
};
+#define CHECK_SESSION(x) (x < LSM_MIN_SESSION_ID || x > LSM_MAX_SESSION_ID)
struct lsm_common {
void *apr;
atomic_t apr_users;
- uint32_t lsm_cal_addr;
- uint32_t lsm_cal_size;
- uint32_t mmap_handle_for_cal;
- struct lsm_client common_client;
+ struct lsm_client common_client[LSM_MAX_SESSION_ID + 1];
struct mutex apr_lock;
};
@@ -93,9 +92,9 @@
}
payload = data->payload;
- pr_debug("%s: Session %d opcode 0x%x token 0x%x payload size %d\n",
- __func__, client->session,
- data->opcode, data->token, data->payload_size);
+ pr_debug("%s: Session %d opcode 0x%x token 0x%x payload size %d\n"
+ "payload [0] = %x\n", __func__, client->session,
+ data->opcode, data->token, data->payload_size, payload[0]);
if (data->opcode == APR_BASIC_RSP_RESULT) {
token = data->token;
@@ -150,13 +149,13 @@
}
}
spin_unlock_irqrestore(&lsm_session_lock, flags);
+ pr_debug("%s: Alloc Session %d", __func__, n);
return ret;
}
static void q6lsm_session_free(struct lsm_client *client)
{
unsigned long flags;
-
pr_debug("%s: Freeing session ID %d\n", __func__, client->session);
spin_lock_irqsave(&lsm_session_lock, flags);
lsm_session[client->session] = LSM_INVALID_SESSION_ID;
@@ -207,13 +206,18 @@
kfree(client);
return NULL;
}
-
- pr_debug("%s: New client session %d\n", __func__, client->session);
client->session = n;
client->cb = cb;
client->priv = priv;
+ pr_debug("%s:Client session %d\n", __func__, client->session);
+ if (CHECK_SESSION(client->session)) {
+ kfree(client);
+ return NULL;
+ }
+ pr_debug("%s:Client Session %d\n", __func__, client->session);
client->apr = apr_register("ADSP", "LSM", q6lsm_callback,
- ((client->session) << 8 | 0x0001), client);
+ ((client->session) << 8 | client->session),
+ client);
if (client->apr == NULL) {
pr_err("%s: Registration with APR failed\n", __func__);
@@ -239,9 +243,12 @@
void q6lsm_client_free(struct lsm_client *client)
{
- if (!client || !client->session)
+ if (!client)
return;
-
+ if (CHECK_SESSION(client->session)) {
+ pr_err("%s: Invalid Session %d", __func__, client->session);
+ return;
+ }
apr_deregister(client->apr);
client->mmap_apr = NULL;
q6lsm_session_free(client);
@@ -308,8 +315,8 @@
hdr->src_domain = APR_DOMAIN_APPS;
hdr->dest_svc = APR_SVC_LSM;
hdr->dest_domain = APR_DOMAIN_ADSP;
- hdr->src_port = ((client->session << 8) & 0xFF00) | 0x01;
- hdr->dest_port = ((client->session << 8) & 0xFF00) | 0x01;
+ hdr->src_port = ((client->session << 8) & 0xFF00) | client->session;
+ hdr->dest_port = ((client->session << 8) & 0xFF00) | client->session;
hdr->pkt_size = pkt_size;
if (cmd_flg)
hdr->token = client->session;
@@ -331,7 +338,7 @@
if (rc)
pr_err("%s: Open failed opcode 0x%x, rc %d\n",
__func__, open.hdr.opcode, rc);
-
+ pr_debug("%s: leave %d\n", __func__, rc);
return rc;
}
@@ -429,15 +436,15 @@
q6lsm_add_hdr(client, &cmd.hdr, sizeof(cmd), true);
cmd.hdr.opcode = LSM_SESSION_CMD_REGISTER_SOUND_MODEL;
- cmd.model_addr_lsw = client->sound_model.phys;
- cmd.model_addr_msw = 0;
+ cmd.model_addr_lsw = lower_32_bits(client->sound_model.phys);
+ cmd.model_addr_msw = upper_32_bits(client->sound_model.phys);
cmd.model_size = client->sound_model.size;
/* read updated mem_map_handle by q6lsm_mmapcallback */
rmb();
cmd.mem_map_handle = client->sound_model.mem_map_handle;
- pr_debug("%s: lsw %x, size %d, handle %x\n", __func__,
- cmd.model_addr_lsw, cmd.model_size, cmd.mem_map_handle);
+ pr_debug("%s: addr %pa, size %d, handle %x\n", __func__,
+ &client->sound_model.phys, cmd.model_size, cmd.mem_map_handle);
rc = q6lsm_apr_send_pkt(client, client->apr, &cmd, true, NULL);
if (rc)
pr_err("%s: Failed cmd op[0x%x]rc[%d]\n", __func__,
@@ -458,6 +465,8 @@
return -EINVAL;
}
pr_debug("%s: session[%d]", __func__, client->session);
+ if (CHECK_SESSION(client->session))
+ return -EINVAL;
memset(&cmd, 0, sizeof(cmd));
q6lsm_add_hdr(client, &cmd.hdr, sizeof(cmd.hdr), false);
@@ -492,7 +501,7 @@
}
static int q6lsm_memory_map_regions(struct lsm_client *client,
- uint32_t dma_addr_p, uint32_t dma_buf_sz,
+ dma_addr_t dma_addr_p, uint32_t dma_buf_sz,
uint32_t *mmap_p)
{
struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
@@ -502,9 +511,11 @@
int rc;
int cmd_size = 0;
- pr_debug("%s: dma_addr_p 0x%x, dma_buf_sz %d, mmap_p 0x%p, session %d\n",
- __func__, dma_addr_p, dma_buf_sz, mmap_p, client->session);
-
+ pr_debug("%s: dma_addr_p 0x%pa, dma_buf_sz %d, mmap_p 0x%p, session %d\n",
+ __func__, &dma_addr_p, dma_buf_sz, mmap_p,
+ client->session);
+ if (CHECK_SESSION(client->session))
+ return -EINVAL;
cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions) +
sizeof(struct avs_shared_map_region_payload);
@@ -524,8 +535,8 @@
sizeof(struct avs_cmd_shared_mem_map_regions));
mregions = (struct avs_shared_map_region_payload *)payload;
- mregions->shm_addr_lsw = dma_addr_p;
- mregions->shm_addr_msw = 0;
+ mregions->shm_addr_lsw = lower_32_bits(dma_addr_p);
+ mregions->shm_addr_msw = upper_32_bits(dma_addr_p);
mregions->mem_size_bytes = dma_buf_sz;
rc = q6lsm_apr_send_pkt(client, client->mmap_apr, mmap_region_cmd,
@@ -545,7 +556,8 @@
struct avs_cmd_shared_mem_unmap_regions unmap;
int rc = 0;
int cmd_size = 0;
-
+ if (CHECK_SESSION(client->session))
+ return -EINVAL;
cmd_size = sizeof(struct avs_cmd_shared_mem_unmap_regions);
q6lsm_add_mmaphdr(client, &unmap.hdr, cmd_size,
true, (client->session << 8));
@@ -569,107 +581,35 @@
struct lsm_cmd_set_params params;
struct acdb_cal_block lsm_cal;
- pr_debug("%s: enter\n", __func__);
-
+ pr_debug("%s: Session %d\n", __func__, client->session);
+ if (CHECK_SESSION(client->session))
+ return -EINVAL;
memset(&lsm_cal, 0, sizeof(lsm_cal));
get_lsm_cal(&lsm_cal);
- if (!lsm_cal.cal_size) {
- pr_err("%s: Could not get LSM calibration data\n", __func__);
- rc = -EINVAL;
- goto bail;
- }
-
/* Cache mmap address, only map once or if new addr */
- if ((lsm_common.lsm_cal_addr != lsm_cal.cal_paddr) ||
- (lsm_cal.cal_size > lsm_common.lsm_cal_size)) {
- if (lsm_common.lsm_cal_addr != 0) {
- rc = q6lsm_memory_unmap_regions(client,
- lsm_common.mmap_handle_for_cal);
- if (rc)
- pr_warn("%s: Unmapping %x failed, %d\n",
- __func__, lsm_common.lsm_cal_addr, rc);
- }
-
- rc = q6lsm_memory_map_regions(client, lsm_cal.cal_paddr,
- LSM_CAL_SIZE,
- &lsm_common.mmap_handle_for_cal);
- if (rc < 0) {
- pr_err("%s: Calibration data memory map failed, %d\n",
- __func__, rc);
- goto bail;
- }
- lsm_common.lsm_cal_addr = lsm_cal.cal_paddr;
- lsm_common.lsm_cal_size = LSM_CAL_SIZE;
- lsm_common.common_client.session = client->session;
- }
-
+ lsm_common.common_client[client->session].session = client->session;
q6lsm_add_hdr(client, ¶ms.hdr, sizeof(params), true);
params.hdr.opcode = LSM_SESSION_CMD_SET_PARAMS;
- params.data_payload_addr_lsw = lsm_cal.cal_paddr;
- params.data_payload_addr_msw = 0;
- /* read updated mem_map_handle by q6lsm_mmapcallback */
- rmb();
- params.mem_map_handle = lsm_common.mmap_handle_for_cal;
+ params.data_payload_addr_lsw = lower_32_bits(client->lsm_cal_phy_addr);
+ params.data_payload_addr_msw = upper_32_bits(client->lsm_cal_phy_addr);
+ params.mem_map_handle = client->sound_model.mem_map_handle;
params.data_payload_size = lsm_cal.cal_size;
-
+ pr_debug("%s: Cal Size = %x", __func__, client->lsm_cal_size);
rc = q6lsm_apr_send_pkt(client, client->apr, ¶ms, true, NULL);
if (rc)
pr_err("%s: Failed set_params opcode 0x%x, rc %d\n",
__func__, params.hdr.opcode, rc);
-bail:
return rc;
}
-int q6lsm_unmap_cal_blocks(void)
-{
- int result = 0;
- int result2 = 0;
-
- if (lsm_common.mmap_handle_for_cal == 0)
- goto done;
-
- if (lsm_common.common_client.mmap_apr == NULL) {
- lsm_common.common_client.mmap_apr = q6lsm_mmap_apr_reg();
- if (lsm_common.common_client.mmap_apr == NULL) {
- pr_err("%s: q6lsm_mmap_apr_reg failed\n",
- __func__);
- result = -EPERM;
- goto done;
- }
- }
-
- result2 = q6lsm_memory_unmap_regions(
- &lsm_common.common_client,
- lsm_common.mmap_handle_for_cal);
- if (result2 < 0) {
- pr_err("%s: unmap failed, err %d\n",
- __func__, result2);
- result = result2;
- } else {
- lsm_common.mmap_handle_for_cal = 0;
- }
-
- result2 = q6lsm_mmap_apr_dereg();
- if (result2 < 0) {
- pr_err("%s: q6lsm_mmap_apr_dereg failed, err %d\n",
- __func__, result2);
- result = result2;
- } else {
- lsm_common.common_client.mmap_apr = NULL;
- }
-
- lsm_common.lsm_cal_addr = 0;
- lsm_common.lsm_cal_size = 0;
-
-done:
- return result;
-}
-
int q6lsm_snd_model_buf_free(struct lsm_client *client)
{
int rc;
pr_debug("%s: Session id %d\n", __func__, client->session);
+ if (CHECK_SESSION(client->session))
+ return -EINVAL;
+
mutex_lock(&client->cmd_lock);
rc = q6lsm_memory_unmap_regions(client,
client->sound_model.mem_map_handle);
@@ -678,12 +618,16 @@
if (client->sound_model.data) {
ion_unmap_kernel(client->sound_model.client,
- client->sound_model.handle);
+ client->sound_model.handle);
ion_free(client->sound_model.client,
- client->sound_model.handle);
+ client->sound_model.handle);
ion_client_destroy(client->sound_model.client);
+ client->sound_model.client = NULL;
+ client->sound_model.handle = NULL;
client->sound_model.data = NULL;
client->sound_model.phys = 0;
+ client->lsm_cal_phy_addr = 0;
+ client->lsm_cal_size = 0;
}
mutex_unlock(&client->cmd_lock);
return rc;
@@ -695,7 +639,7 @@
struct lsm_client *client = NULL;
if (session_id == LSM_CONTROL_SESSION) {
- client = &lsm_common.common_client;
+ client = &lsm_common.common_client[session_id];
goto done;
}
@@ -724,19 +668,19 @@
struct lsm_client *client = NULL;
if (data->opcode == RESET_EVENTS) {
- pr_debug("%s: SSR event received 0x%x, event 0x%x, proc 0x%x\n",
- __func__, data->opcode, data->reset_event,
- data->reset_proc);
- lsm_common.lsm_cal_addr = 0;
+ sid = (data->token >> 8) & 0x0F;
+ pr_debug("%s: SSR event received 0x%x, event 0x%x,\n"
+ "proc 0x%x SID 0x%x\n", __func__, data->opcode,
+ data->reset_event, data->reset_proc, sid);
+ lsm_common.common_client[sid].lsm_cal_phy_addr = 0;
return 0;
}
command = payload[0];
retcode = payload[1];
- pr_debug("%s: opcode 0x%x command 0x%x return code 0x%x\n", __func__,
- data->opcode, command, retcode);
-
sid = (data->token >> 8) & 0x0F;
+ pr_debug("%s: opcode 0x%x command 0x%x return code 0x%x SID 0x%x\n",
+ __func__, data->opcode, command, retcode, sid);
client = q6lsm_get_lsm_client(sid);
if (!client) {
pr_debug("%s: Session %d already freed\n", __func__, sid);
@@ -774,15 +718,31 @@
return 0;
}
-int q6lsm_snd_model_buf_alloc(struct lsm_client *client, uint32_t len)
+int q6lsm_snd_model_buf_alloc(struct lsm_client *client, size_t len)
{
int rc = -EINVAL;
+ struct acdb_cal_block lsm_cal;
+ size_t pad_zero = 0, total_mem = 0;
- if (!client)
+ if (!client || len <= LSM_ALIGN_BOUNDARY)
return rc;
-
+ memset(&lsm_cal, 0, sizeof(lsm_cal));
mutex_lock(&client->cmd_lock);
+ get_lsm_cal(&lsm_cal);
+ pr_debug("%s:Snd Model len = %d cal size %d", __func__,
+ len, lsm_cal.cal_size);
+ if (!lsm_cal.cal_paddr) {
+ pr_err("%s: No LSM calibration set for session", __func__);
+ mutex_unlock(&client->cmd_lock);
+ return -EINVAL;
+ }
if (!client->sound_model.data) {
+ client->sound_model.size = len;
+ pad_zero = (LSM_ALIGN_BOUNDARY -
+ (len % LSM_ALIGN_BOUNDARY));
+ total_mem = pad_zero + len + lsm_cal.cal_size;
+ pr_debug("%s: Pad zeros sound model %d Total mem %d\n",
+ __func__, pad_zero, total_mem);
client->sound_model.client =
msm_ion_client_create(UINT_MAX, "lsm_client");
if (IS_ERR_OR_NULL(client->sound_model.client)) {
@@ -791,8 +751,8 @@
goto fail;
}
client->sound_model.handle =
- ion_alloc(client->sound_model.client,
- len, SZ_4K, (0x1 << ION_AUDIO_HEAP_ID), 0);
+ ion_alloc(client->sound_model.client,
+ total_mem, SZ_4K, (0x1 << ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(client->sound_model.handle)) {
pr_err("%s: ION memory allocation for AUDIO failed\n",
__func__);
@@ -817,7 +777,13 @@
goto fail;
}
memset(client->sound_model.data, 0, len);
- client->sound_model.size = len;
+ client->lsm_cal_phy_addr = (pad_zero +
+ client->sound_model.phys +
+ client->sound_model.size);
+ client->lsm_cal_size = lsm_cal.cal_size;
+ memcpy((client->sound_model.data + pad_zero +
+ client->sound_model.size),
+ (uint32_t *)lsm_cal.cal_kvaddr, len);
} else {
rc = -EBUSY;
goto fail;
@@ -825,7 +791,7 @@
mutex_unlock(&client->cmd_lock);
rc = q6lsm_memory_map_regions(client, client->sound_model.phys,
- client->sound_model.size,
+ len,
&client->sound_model.mem_map_handle);
if (rc < 0) {
pr_err("%s:CMD Memory_map_regions failed\n", __func__);
@@ -882,16 +848,18 @@
static int __init q6lsm_init(void)
{
+ int i = 0;
pr_debug("%s\n", __func__);
spin_lock_init(&lsm_session_lock);
spin_lock_init(&mmap_lock);
mutex_init(&lsm_common.apr_lock);
-
- lsm_common.common_client.session = LSM_CONTROL_SESSION;
- init_waitqueue_head(&lsm_common.common_client.cmd_wait);
- mutex_init(&lsm_common.common_client.cmd_lock);
- atomic_set(&lsm_common.common_client.cmd_state, CMD_STATE_CLEARED);
-
+ for (; i <= LSM_MAX_SESSION_ID; i++) {
+ lsm_common.common_client[i].session = LSM_CONTROL_SESSION;
+ init_waitqueue_head(&lsm_common.common_client[i].cmd_wait);
+ mutex_init(&lsm_common.common_client[i].cmd_lock);
+ atomic_set(&lsm_common.common_client[i].cmd_state,
+ CMD_STATE_CLEARED);
+ }
return 0;
}
diff --git a/sound/soc/msm/qdsp6v2/q6voice.c b/sound/soc/msm/qdsp6v2/q6voice.c
index c4395c2..61a262f 100644
--- a/sound/soc/msm/qdsp6v2/q6voice.c
+++ b/sound/soc/msm/qdsp6v2/q6voice.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -29,7 +29,7 @@
#include "q6voice.h"
-#define TIMEOUT_MS 200
+#define TIMEOUT_MS 300
#define CMD_STATUS_SUCCESS 0
@@ -943,6 +943,7 @@
if (is_voip_session(v->session_id) ||
is_qchat_session(v->session_id) ||
+ is_volte_session(v->session_id) ||
v->voc_state == VOC_ERROR) {
/* Destroy CVS. */
pr_debug("%s: CVS destroy session\n", __func__);
@@ -1493,6 +1494,77 @@
return ret;
}
+static int voice_config_cvs_vocoder_amr_rate(struct voice_data *v)
+{
+ int ret = 0;
+ void *apr_cvs;
+ u16 cvs_handle;
+ struct cvs_set_amr_enc_rate_cmd cvs_set_amr_rate;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+
+ ret = -EINVAL;
+ goto done;
+ }
+ apr_cvs = common.apr_q6_cvs;
+
+ if (!apr_cvs) {
+ pr_err("%s: apr_cvs is NULL.\n", __func__);
+
+ ret = -EINVAL;
+ goto done;
+ }
+
+ cvs_handle = voice_get_cvs_handle(v);
+
+ pr_debug("%s: Setting AMR rate. Media Type: %d\n", __func__,
+ common.mvs_info.media_type);
+
+ cvs_set_amr_rate.hdr.hdr_field =
+ APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ cvs_set_amr_rate.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(cvs_set_amr_rate) - APR_HDR_SIZE);
+ cvs_set_amr_rate.hdr.src_port =
+ voice_get_idx_for_session(v->session_id);
+ cvs_set_amr_rate.hdr.dest_port = cvs_handle;
+ cvs_set_amr_rate.hdr.token = 0;
+
+ if (common.mvs_info.media_type == VSS_MEDIA_ID_AMR_NB_MODEM)
+ cvs_set_amr_rate.hdr.opcode =
+ VSS_ISTREAM_CMD_VOC_AMR_SET_ENC_RATE;
+ else if (common.mvs_info.media_type == VSS_MEDIA_ID_AMR_WB_MODEM)
+ cvs_set_amr_rate.hdr.opcode =
+ VSS_ISTREAM_CMD_VOC_AMRWB_SET_ENC_RATE;
+
+ cvs_set_amr_rate.amr_rate.mode = common.mvs_info.rate;
+
+ v->cvs_state = CMD_STATUS_FAIL;
+
+ ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_amr_rate);
+ if (ret < 0) {
+ pr_err("%s: Error %d sending SET_AMR_RATE\n",
+ __func__, ret);
+
+ goto done;
+ }
+ ret = wait_event_timeout(v->cvs_wait,
+ (v->cvs_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout\n", __func__);
+
+ ret = -EINVAL;
+ goto done;
+ }
+
+ return 0;
+done:
+ return ret;
+}
+
static int voice_config_cvs_vocoder(struct voice_data *v)
{
int ret = 0;
@@ -1597,80 +1669,13 @@
break;
}
- case VSS_MEDIA_ID_AMR_NB_MODEM: {
- struct cvs_set_amr_enc_rate_cmd cvs_set_amr_rate;
-
- pr_debug("Setting AMR rate\n");
-
- cvs_set_amr_rate.hdr.hdr_field =
- APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
- APR_HDR_LEN(APR_HDR_SIZE),
- APR_PKT_VER);
- cvs_set_amr_rate.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(cvs_set_amr_rate) - APR_HDR_SIZE);
- cvs_set_amr_rate.hdr.src_port =
- voice_get_idx_for_session(v->session_id);
- cvs_set_amr_rate.hdr.dest_port = cvs_handle;
- cvs_set_amr_rate.hdr.token = 0;
- cvs_set_amr_rate.hdr.opcode =
- VSS_ISTREAM_CMD_VOC_AMR_SET_ENC_RATE;
- cvs_set_amr_rate.amr_rate.mode = common.mvs_info.rate;
-
- v->cvs_state = CMD_STATUS_FAIL;
-
- ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_amr_rate);
- if (ret < 0) {
- pr_err("%s: Error %d sending SET_AMR_RATE\n",
- __func__, ret);
- goto fail;
- }
- ret = wait_event_timeout(v->cvs_wait,
- (v->cvs_state == CMD_STATUS_SUCCESS),
- msecs_to_jiffies(TIMEOUT_MS));
- if (!ret) {
- pr_err("%s: wait_event timeout\n", __func__);
- goto fail;
- }
-
- ret = voice_set_dtx(v);
- if (ret < 0)
- goto fail;
-
- break;
- }
+ case VSS_MEDIA_ID_AMR_NB_MODEM:
case VSS_MEDIA_ID_AMR_WB_MODEM: {
- struct cvs_set_amrwb_enc_rate_cmd cvs_set_amrwb_rate;
-
- pr_debug("Setting AMR WB rate\n");
-
- cvs_set_amrwb_rate.hdr.hdr_field =
- APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
- APR_HDR_LEN(APR_HDR_SIZE),
- APR_PKT_VER);
- cvs_set_amrwb_rate.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(cvs_set_amrwb_rate) -
- APR_HDR_SIZE);
- cvs_set_amrwb_rate.hdr.src_port =
- voice_get_idx_for_session(v->session_id);
- cvs_set_amrwb_rate.hdr.dest_port = cvs_handle;
- cvs_set_amrwb_rate.hdr.token = 0;
- cvs_set_amrwb_rate.hdr.opcode =
- VSS_ISTREAM_CMD_VOC_AMRWB_SET_ENC_RATE;
- cvs_set_amrwb_rate.amrwb_rate.mode = common.mvs_info.rate;
-
- v->cvs_state = CMD_STATUS_FAIL;
-
- ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_amrwb_rate);
- if (ret < 0) {
- pr_err("%s: Error %d sending SET_AMRWB_RATE\n",
+ ret = voice_config_cvs_vocoder_amr_rate(v);
+ if (ret) {
+ pr_err("%s: Failed to update vocoder rate. %d\n",
__func__, ret);
- goto fail;
- }
- ret = wait_event_timeout(v->cvs_wait,
- (v->cvs_state == CMD_STATUS_SUCCESS),
- msecs_to_jiffies(TIMEOUT_MS));
- if (!ret) {
- pr_err("%s: wait_event timeout\n", __func__);
+
goto fail;
}
@@ -1697,6 +1702,31 @@
return -EINVAL;
}
+int voc_update_amr_vocoder_rate(uint32_t session_id)
+{
+ int ret = 0;
+ struct voice_data *v;
+
+ pr_debug("%s: session_id:%d", __func__, session_id);
+
+ v = voice_get_session(session_id);
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL, session_id:%d\n", __func__,
+ session_id);
+
+ ret = -EINVAL;
+ goto done;
+ }
+
+ mutex_lock(&v->lock);
+ ret = voice_config_cvs_vocoder_amr_rate(v);
+ mutex_unlock(&v->lock);
+
+done:
+ return ret;
+}
+
static int voice_send_start_voice_cmd(struct voice_data *v)
{
struct apr_hdr mvm_start_voice_cmd;
@@ -3408,6 +3438,10 @@
mvm_handle = voice_get_mvm_handle(v);
cvp_handle = voice_get_cvp_handle(v);
+ /* disable slowtalk if st_enable is set */
+ if (v->st_enable)
+ voice_send_set_pp_enable_cmd(v, MODULE_ID_VOICE_MODULE_ST, 0);
+
/* stop playback or recording */
v->music_info.force = 1;
voice_cvs_stop_playback(v);
diff --git a/sound/soc/msm/qdsp6v2/q6voice.h b/sound/soc/msm/qdsp6v2/q6voice.h
index 5c0cf21..9efc9fc 100644
--- a/sound/soc/msm/qdsp6v2/q6voice.h
+++ b/sound/soc/msm/qdsp6v2/q6voice.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1465,5 +1465,6 @@
int voc_start_record(uint32_t port_id, uint32_t set, uint32_t session_id);
int voice_get_idx_for_session(u32 session_id);
int voc_set_ext_ec_ref(uint16_t port_id, bool state);
+int voc_update_amr_vocoder_rate(uint32_t session_id);
#endif
diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c
index 0970a83..4792719 100644
--- a/sound/soc/soc-compress.c
+++ b/sound/soc/soc-compress.c
@@ -475,7 +475,6 @@
struct snd_soc_pcm_runtime *fe = cstream->private_data;
struct snd_pcm_substream *fe_substream = fe->pcm->streams[0].substream;
struct snd_soc_platform *platform = fe->platform;
- struct snd_pcm_hw_params *hw_params;
int ret = 0, stream;
if (cstream->direction == SND_COMPRESS_PLAYBACK)
@@ -483,10 +482,6 @@
else
stream = SNDRV_PCM_STREAM_CAPTURE;
- hw_params = kzalloc(sizeof(*hw_params), GFP_KERNEL);
- if (hw_params == NULL)
- return -ENOMEM;
-
mutex_lock(&fe->card->dpcm_mutex);
/* first we call set_params for the platform driver
* this should configure the soc side