blob: d1a02bead45813a20a2d70399a6b20c5df590f53 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
2 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Dave Airliebc54fd12005-06-23 22:46:46 +10004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110028 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#ifndef _I915_DRV_H_
31#define _I915_DRV_H_
32
Jesse Barnes585fb112008-07-29 11:54:06 -070033#include "i915_reg.h"
34
Linus Torvalds1da177e2005-04-16 15:20:36 -070035/* General customization:
36 */
37
38#define DRIVER_AUTHOR "Tungsten Graphics, Inc."
39
40#define DRIVER_NAME "i915"
41#define DRIVER_DESC "Intel Graphics"
Dave Airliede227f52006-01-25 15:31:43 +110042#define DRIVER_DATE "20060119"
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Jesse Barnes317c35d2008-08-25 15:11:06 -070044enum pipe {
45 PIPE_A = 0,
46 PIPE_B,
47};
48
Linus Torvalds1da177e2005-04-16 15:20:36 -070049/* Interface history:
50 *
51 * 1.1: Original.
Dave Airlie0d6aa602006-01-02 20:14:23 +110052 * 1.2: Add Power Management
53 * 1.3: Add vblank support
Dave Airliede227f52006-01-25 15:31:43 +110054 * 1.4: Fix cmdbuffer path, add heap destroy
Dave Airlie702880f2006-06-24 17:07:34 +100055 * 1.5: Add vblank pipe configuration
=?utf-8?q?Michel_D=C3=A4nzer?=2228ed62006-10-25 01:05:09 +100056 * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
57 * - Support vertical blank on secondary display pipe
Linus Torvalds1da177e2005-04-16 15:20:36 -070058 */
59#define DRIVER_MAJOR 1
=?utf-8?q?Michel_D=C3=A4nzer?=2228ed62006-10-25 01:05:09 +100060#define DRIVER_MINOR 6
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#define DRIVER_PATCHLEVEL 0
62
Linus Torvalds1da177e2005-04-16 15:20:36 -070063typedef struct _drm_i915_ring_buffer {
64 int tail_mask;
65 unsigned long Start;
66 unsigned long End;
67 unsigned long Size;
68 u8 *virtual_start;
69 int head;
70 int tail;
71 int space;
72 drm_local_map_t map;
73} drm_i915_ring_buffer_t;
74
75struct mem_block {
76 struct mem_block *next;
77 struct mem_block *prev;
78 int start;
79 int size;
Eric Anholt6c340ea2007-08-25 20:23:09 +100080 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
Linus Torvalds1da177e2005-04-16 15:20:36 -070081};
82
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +100083typedef struct _drm_i915_vbl_swap {
84 struct list_head head;
85 drm_drawable_t drw_id;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070086 unsigned int plane;
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +100087 unsigned int sequence;
88} drm_i915_vbl_swap_t;
89
Jesse Barnes0a3e67a2008-09-30 12:14:26 -070090struct opregion_header;
91struct opregion_acpi;
92struct opregion_swsci;
93struct opregion_asle;
94
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +010095struct intel_opregion {
96 struct opregion_header *header;
97 struct opregion_acpi *acpi;
98 struct opregion_swsci *swsci;
99 struct opregion_asle *asle;
100 int enabled;
101};
102
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103typedef struct drm_i915_private {
104 drm_local_map_t *sarea;
105 drm_local_map_t *mmio_map;
106
107 drm_i915_sarea_t *sarea_priv;
108 drm_i915_ring_buffer_t ring;
109
Dave Airlie9c8da5e2005-07-10 15:38:56 +1000110 drm_dma_handle_t *status_page_dmah;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 void *hw_status_page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 dma_addr_t dma_status_page;
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700113 uint32_t counter;
Wang Zhenyudc7a9312007-06-10 15:58:19 +1000114 unsigned int status_gfx_addr;
115 drm_local_map_t hws_map;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000117 unsigned int cpp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 int back_offset;
119 int front_offset;
120 int current_page;
121 int page_flipping;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122
123 wait_queue_head_t irq_queue;
124 atomic_t irq_received;
Dave Airlieaf6061a2008-05-07 12:15:39 +1000125 atomic_t irq_emitted;
Eric Anholted4cb412008-07-29 12:10:39 -0700126 /** Protects user_irq_refcount and irq_mask_reg */
127 spinlock_t user_irq_lock;
128 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
129 int user_irq_refcount;
130 /** Cached value of IMR to avoid reads in updating the bitfield */
131 u32 irq_mask_reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132
133 int tex_lru_log_granularity;
134 int allow_batchbuffer;
135 struct mem_block *agp_heap;
Dave Airlie0d6aa602006-01-02 20:14:23 +1100136 unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
Dave Airlie702880f2006-06-24 17:07:34 +1000137 int vblank_pipe;
=?utf-8?q?Michel_D=C3=A4nzer?=a6b54f32006-10-24 23:37:43 +1000138
139 spinlock_t swaps_lock;
140 drm_i915_vbl_swap_t vbl_swaps;
141 unsigned int swaps_pending;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000142
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100143 struct intel_opregion opregion;
144
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000145 /* Register state */
146 u8 saveLBB;
147 u32 saveDSPACNTR;
148 u32 saveDSPBCNTR;
Keith Packarde948e992008-05-07 12:27:53 +1000149 u32 saveDSPARB;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000150 u32 savePIPEACONF;
151 u32 savePIPEBCONF;
152 u32 savePIPEASRC;
153 u32 savePIPEBSRC;
154 u32 saveFPA0;
155 u32 saveFPA1;
156 u32 saveDPLL_A;
157 u32 saveDPLL_A_MD;
158 u32 saveHTOTAL_A;
159 u32 saveHBLANK_A;
160 u32 saveHSYNC_A;
161 u32 saveVTOTAL_A;
162 u32 saveVBLANK_A;
163 u32 saveVSYNC_A;
164 u32 saveBCLRPAT_A;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000165 u32 savePIPEASTAT;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000166 u32 saveDSPASTRIDE;
167 u32 saveDSPASIZE;
168 u32 saveDSPAPOS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700169 u32 saveDSPAADDR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000170 u32 saveDSPASURF;
171 u32 saveDSPATILEOFF;
172 u32 savePFIT_PGM_RATIOS;
173 u32 saveBLC_PWM_CTL;
174 u32 saveBLC_PWM_CTL2;
175 u32 saveFPB0;
176 u32 saveFPB1;
177 u32 saveDPLL_B;
178 u32 saveDPLL_B_MD;
179 u32 saveHTOTAL_B;
180 u32 saveHBLANK_B;
181 u32 saveHSYNC_B;
182 u32 saveVTOTAL_B;
183 u32 saveVBLANK_B;
184 u32 saveVSYNC_B;
185 u32 saveBCLRPAT_B;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000186 u32 savePIPEBSTAT;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000187 u32 saveDSPBSTRIDE;
188 u32 saveDSPBSIZE;
189 u32 saveDSPBPOS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700190 u32 saveDSPBADDR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000191 u32 saveDSPBSURF;
192 u32 saveDSPBTILEOFF;
Jesse Barnes585fb112008-07-29 11:54:06 -0700193 u32 saveVGA0;
194 u32 saveVGA1;
195 u32 saveVGA_PD;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000196 u32 saveVGACNTRL;
197 u32 saveADPA;
198 u32 saveLVDS;
Jesse Barnes585fb112008-07-29 11:54:06 -0700199 u32 savePP_ON_DELAYS;
200 u32 savePP_OFF_DELAYS;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000201 u32 saveDVOA;
202 u32 saveDVOB;
203 u32 saveDVOC;
204 u32 savePP_ON;
205 u32 savePP_OFF;
206 u32 savePP_CONTROL;
Jesse Barnes585fb112008-07-29 11:54:06 -0700207 u32 savePP_DIVISOR;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000208 u32 savePFIT_CONTROL;
209 u32 save_palette_a[256];
210 u32 save_palette_b[256];
211 u32 saveFBC_CFB_BASE;
212 u32 saveFBC_LL_BASE;
213 u32 saveFBC_CONTROL;
214 u32 saveFBC_CONTROL2;
Jesse Barnes0da3ea12008-02-20 09:39:58 +1000215 u32 saveIER;
216 u32 saveIIR;
217 u32 saveIMR;
Keith Packard1f84e552008-02-16 19:19:29 -0800218 u32 saveCACHE_MODE_0;
Keith Packarde948e992008-05-07 12:27:53 +1000219 u32 saveD_STATE;
Jesse Barnes585fb112008-07-29 11:54:06 -0700220 u32 saveCG_2D_DIS;
Keith Packard1f84e552008-02-16 19:19:29 -0800221 u32 saveMI_ARB_STATE;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000222 u32 saveSWF0[16];
223 u32 saveSWF1[16];
224 u32 saveSWF2[3];
225 u8 saveMSR;
226 u8 saveSR[8];
Jesse Barnes123f7942008-02-07 11:15:20 -0800227 u8 saveGR[25];
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000228 u8 saveAR_INDEX;
Jesse Barnesa59e1222008-05-07 12:25:46 +1000229 u8 saveAR[21];
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000230 u8 saveDACMASK;
231 u8 saveDACDATA[256*3]; /* 256 3-byte colors */
Jesse Barnesa59e1222008-05-07 12:25:46 +1000232 u8 saveCR[37];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233} drm_i915_private_t;
234
Eric Anholtc153f452007-09-03 12:06:45 +1000235extern struct drm_ioctl_desc i915_ioctls[];
Dave Airlieb3a83632005-09-30 18:37:36 +1000236extern int i915_max_ioctl;
237
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 /* i915_dma.c */
Dave Airlie84b1fd12007-07-11 15:53:27 +1000239extern void i915_kernel_lost_context(struct drm_device * dev);
Dave Airlie22eae942005-11-10 22:16:34 +1100240extern int i915_driver_load(struct drm_device *, unsigned long flags);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000241extern int i915_driver_unload(struct drm_device *);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000242extern void i915_driver_lastclose(struct drm_device * dev);
Eric Anholt6c340ea2007-08-25 20:23:09 +1000243extern void i915_driver_preclose(struct drm_device *dev,
244 struct drm_file *file_priv);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000245extern int i915_driver_device_is_agp(struct drm_device * dev);
Dave Airlie0d6aa602006-01-02 20:14:23 +1100246extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
247 unsigned long arg);
Dave Airlieaf6061a2008-05-07 12:15:39 +1000248
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249/* i915_irq.c */
Eric Anholtc153f452007-09-03 12:06:45 +1000250extern int i915_irq_emit(struct drm_device *dev, void *data,
251 struct drm_file *file_priv);
252extern int i915_irq_wait(struct drm_device *dev, void *data,
253 struct drm_file *file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254
255extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000256extern void i915_driver_irq_preinstall(struct drm_device * dev);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700257extern int i915_driver_irq_postinstall(struct drm_device *dev);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000258extern void i915_driver_irq_uninstall(struct drm_device * dev);
Eric Anholtc153f452007-09-03 12:06:45 +1000259extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
260 struct drm_file *file_priv);
261extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
262 struct drm_file *file_priv);
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700263extern int i915_enable_vblank(struct drm_device *dev, int crtc);
264extern void i915_disable_vblank(struct drm_device *dev, int crtc);
265extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
Eric Anholtc153f452007-09-03 12:06:45 +1000266extern int i915_vblank_swap(struct drm_device *dev, void *data,
267 struct drm_file *file_priv);
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100268extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269
270/* i915_mem.c */
Eric Anholtc153f452007-09-03 12:06:45 +1000271extern int i915_mem_alloc(struct drm_device *dev, void *data,
272 struct drm_file *file_priv);
273extern int i915_mem_free(struct drm_device *dev, void *data,
274 struct drm_file *file_priv);
275extern int i915_mem_init_heap(struct drm_device *dev, void *data,
276 struct drm_file *file_priv);
277extern int i915_mem_destroy_heap(struct drm_device *dev, void *data,
278 struct drm_file *file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279extern void i915_mem_takedown(struct mem_block **heap);
Dave Airlie84b1fd12007-07-11 15:53:27 +1000280extern void i915_mem_release(struct drm_device * dev,
Eric Anholt6c340ea2007-08-25 20:23:09 +1000281 struct drm_file *file_priv, struct mem_block *heap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282
Jesse Barnes317c35d2008-08-25 15:11:06 -0700283/* i915_suspend.c */
284extern int i915_save_state(struct drm_device *dev);
285extern int i915_restore_state(struct drm_device *dev);
286
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700287/* i915_suspend.c */
288extern int i915_save_state(struct drm_device *dev);
289extern int i915_restore_state(struct drm_device *dev);
290
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100291/* i915_opregion.c */
292extern int intel_opregion_init(struct drm_device *dev);
293extern void intel_opregion_free(struct drm_device *dev);
294extern void opregion_asle_intr(struct drm_device *dev);
295extern void opregion_enable_asle(struct drm_device *dev);
296
Dave Airlie0d6aa602006-01-02 20:14:23 +1100297#define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg))
298#define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
Dave Airliebc5f4522007-11-05 12:50:58 +1000299#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg))
Dave Airlie0d6aa602006-01-02 20:14:23 +1100300#define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val))
Jesse Barnes317c35d2008-08-25 15:11:06 -0700301#define I915_READ8(reg) DRM_READ8(dev_priv->mmio_map, (reg))
302#define I915_WRITE8(reg,val) DRM_WRITE8(dev_priv->mmio_map, (reg), (val))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303
304#define I915_VERBOSE 0
305
306#define RING_LOCALS unsigned int outring, ringmask, outcount; \
307 volatile char *virt;
308
309#define BEGIN_LP_RING(n) do { \
310 if (I915_VERBOSE) \
Márton Németh3e684ea2008-01-24 15:58:57 +1000311 DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
312 if (dev_priv->ring.space < (n)*4) \
Harvey Harrisonbf9d8922008-04-30 00:55:10 -0700313 i915_wait_ring(dev, (n)*4, __func__); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314 outcount = 0; \
315 outring = dev_priv->ring.tail; \
316 ringmask = dev_priv->ring.tail_mask; \
317 virt = dev_priv->ring.virtual_start; \
318} while (0)
319
320#define OUT_RING(n) do { \
321 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
Alan Hourihanec29b6692006-08-12 16:29:24 +1000322 *(volatile unsigned int *)(virt + outring) = (n); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 outcount++; \
324 outring += 4; \
325 outring &= ringmask; \
326} while (0)
327
328#define ADVANCE_LP_RING() do { \
329 if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
330 dev_priv->ring.tail = outring; \
331 dev_priv->ring.space -= outcount * 4; \
Jesse Barnes585fb112008-07-29 11:54:06 -0700332 I915_WRITE(PRB0_TAIL, outring); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333} while(0)
334
Jesse Barnes585fb112008-07-29 11:54:06 -0700335/**
336 * Reads a dword out of the status page, which is written to from the command
337 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
338 * MI_STORE_DATA_IMM.
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000339 *
Jesse Barnes585fb112008-07-29 11:54:06 -0700340 * The following dwords have a reserved meaning:
341 * 0: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
342 * 4: ring 0 head pointer
343 * 5: ring 1 head pointer (915-class)
344 * 6: ring 2 head pointer (915-class)
345 *
346 * The area from dword 0x10 to 0x3ff is available for driver usage.
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000347 */
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000348#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
Jesse Barnes585fb112008-07-29 11:54:06 -0700349#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000350
Jesse Barnes585fb112008-07-29 11:54:06 -0700351extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000352
353#define IS_I830(dev) ((dev)->pci_device == 0x3577)
354#define IS_845G(dev) ((dev)->pci_device == 0x2562)
355#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
356#define IS_I855(dev) ((dev)->pci_device == 0x3582)
357#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
358
Carlos Martín4d1f7882008-01-23 16:41:17 +1000359#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000360#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
361#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
Jesse Barnes3bf48462008-04-06 11:55:04 -0700362#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
363 (dev)->pci_device == 0x27AE)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000364#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
365 (dev)->pci_device == 0x2982 || \
366 (dev)->pci_device == 0x2992 || \
367 (dev)->pci_device == 0x29A2 || \
368 (dev)->pci_device == 0x2A02 || \
Zhenyu Wang5f5f9d42008-01-24 16:46:36 +1000369 (dev)->pci_device == 0x2A12 || \
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000370 (dev)->pci_device == 0x2A42 || \
371 (dev)->pci_device == 0x2E02 || \
372 (dev)->pci_device == 0x2E12 || \
373 (dev)->pci_device == 0x2E22)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000374
375#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
376
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700377#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
Zhenyu Wang5f5f9d42008-01-24 16:46:36 +1000378
Zhenyu Wangd3adbc02008-06-20 12:12:56 +1000379#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
380 (dev)->pci_device == 0x2E12 || \
381 (dev)->pci_device == 0x2E22)
382
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000383#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
384 (dev)->pci_device == 0x29B2 || \
385 (dev)->pci_device == 0x29D2)
386
387#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
388 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
389
390#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700391 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000392
Jesse Barnesb9bfdfe2008-08-25 15:16:19 -0700393#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
Zhenyu Wangb39d50e2008-02-19 20:59:09 +1000394
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000395#define PRIMARY_RINGBUFFER_SIZE (128*1024)
Dave Airlie0d6aa602006-01-02 20:14:23 +1100396
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397#endif