blob: 31d487386335dd883728fd0c53ed41cdc4697e05 [file] [log] [blame]
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
Harini Jayaramaneba52672011-09-08 15:13:00 -060015#include <linux/i2c.h>
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070016#include <linux/msm_ssbi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070017#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
Krishna Kondadd794462011-10-01 00:19:29 -070019#include <asm/mach/mmc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070020#include <mach/board.h>
21#include <mach/msm_iomap.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Harini Jayaraman738c9312011-09-08 15:22:38 -060024#include <mach/msm_spi.h>
Amit Blay5e4ec192011-10-20 09:16:54 +020025#include <linux/usb/android.h>
26#include <linux/usb/msm_hsusb.h>
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070027#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070028#include "timer.h"
29#include "devices.h"
David Collinsfb88c432011-08-25 15:12:47 -070030#include "board-9615.h"
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -060031#include "cpuidle.h"
32#include "pm.h"
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -070033#include "acpuclock.h"
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070034
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070035static struct pm8xxx_adc_amux pm8018_adc_channels_data[] = {
36 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
37 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
38 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
39 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
40 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
41 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
42 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
43 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
44 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV2,
45 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
46 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
47 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
48 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
49 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
50 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
51 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
52 {"pa_therm0", ADC_MPP_1_AMUX3, CHAN_PATH_SCALING1, AMUX_RSV1,
53 ADC_DECIMATION_TYPE2, ADC_SCALE_PA_THERM},
54};
55
56static struct pm8xxx_adc_properties pm8018_adc_data = {
57 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
58 .bitresolution = 15,
59 .bipolar = 0,
60};
61
62static struct pm8xxx_adc_platform_data pm8018_adc_pdata = {
63 .adc_channel = pm8018_adc_channels_data,
64 .adc_num_board_channel = ARRAY_SIZE(pm8018_adc_channels_data),
65 .adc_prop = &pm8018_adc_data,
66};
67
David Collinsfb88c432011-08-25 15:12:47 -070068static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
69 .irq_base = PM8018_IRQ_BASE,
70 .devirq = MSM_GPIO_TO_INT(87),
71 .irq_trigger_flag = IRQF_TRIGGER_LOW,
72};
73
74static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
75 .gpio_base = PM8018_GPIO_PM_TO_SYS(1),
76};
77
78static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
79 .mpp_base = PM8018_MPP_PM_TO_SYS(1),
80};
81
82static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
83 .rtc_write_enable = false,
Ashay Jaiswaldb5e6dc2011-10-12 11:02:47 +053084 .rtc_alarm_powerup = false,
David Collinsfb88c432011-08-25 15:12:47 -070085};
86
87static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
88 .pull_up = 1,
89 .kpd_trigger_delay_us = 970,
90 .wakeup = 1,
91};
92
93static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
94 .priority = 0,
95};
96
97static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
98 .irq_pdata = &pm8xxx_irq_pdata,
99 .gpio_pdata = &pm8xxx_gpio_pdata,
100 .mpp_pdata = &pm8xxx_mpp_pdata,
101 .rtc_pdata = &pm8xxx_rtc_pdata,
102 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
103 .misc_pdata = &pm8xxx_misc_pdata,
David Collins00b31e62011-08-31 20:00:10 -0700104 .regulator_pdatas = msm_pm8018_regulator_pdata,
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -0700105 .adc_pdata = &pm8018_adc_pdata,
David Collinsfb88c432011-08-25 15:12:47 -0700106};
107
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700108static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
109 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
110 .slave = {
David Collinsfb88c432011-08-25 15:12:47 -0700111 .name = PM8018_CORE_DEV_NAME,
112 .platform_data = &pm8018_platform_data,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700113 },
114};
115
David Collinsbea297a2011-09-28 13:11:14 -0700116static struct platform_device msm9615_device_rpm_regulator __devinitdata = {
117 .name = "rpm-regulator",
118 .id = -1,
119 .dev = {
120 .platform_data = &msm_rpm_regulator_9615_pdata,
121 },
122};
123
David Collins0f9942a2011-10-31 09:47:34 -0700124static struct platform_device msm9615_device_ext_2p95v_vreg = {
125 .name = GPIO_REGULATOR_DEV_NAME,
126 .id = 18,
127 .dev = {
128 .platform_data =
129 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P95V],
130 },
131};
132
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700133static struct gpiomux_setting ps_hold = {
134 .func = GPIOMUX_FUNC_1,
135 .drv = GPIOMUX_DRV_8MA,
136 .pull = GPIOMUX_PULL_NONE,
137};
138
Rohit Vaswani09666872011-08-23 17:41:54 -0700139static struct gpiomux_setting gsbi4 = {
140 .func = GPIOMUX_FUNC_1,
141 .drv = GPIOMUX_DRV_8MA,
142 .pull = GPIOMUX_PULL_NONE,
143};
144
Harini Jayaramaneba52672011-09-08 15:13:00 -0600145static struct gpiomux_setting gsbi5 = {
146 .func = GPIOMUX_FUNC_1,
147 .drv = GPIOMUX_DRV_8MA,
148 .pull = GPIOMUX_PULL_NONE,
149};
150
Harini Jayaraman738c9312011-09-08 15:22:38 -0600151static struct gpiomux_setting gsbi3 = {
152 .func = GPIOMUX_FUNC_1,
153 .drv = GPIOMUX_DRV_8MA,
154 .pull = GPIOMUX_PULL_NONE,
155};
156
157static struct gpiomux_setting gsbi3_cs1_config = {
158 .func = GPIOMUX_FUNC_4,
159 .drv = GPIOMUX_DRV_8MA,
160 .pull = GPIOMUX_PULL_NONE,
161};
162
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700163struct msm_gpiomux_config msm9615_ps_hold_config[] __initdata = {
164 {
165 .gpio = 83,
166 .settings = {
167 [GPIOMUX_SUSPENDED] = &ps_hold,
168 },
169 },
170};
171
Rohit Vaswani09666872011-08-23 17:41:54 -0700172struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
173 {
Harini Jayaraman738c9312011-09-08 15:22:38 -0600174 .gpio = 8, /* GSBI3 QUP SPI_CLK */
175 .settings = {
176 [GPIOMUX_SUSPENDED] = &gsbi3,
177 },
178 },
179 {
180 .gpio = 9, /* GSBI3 QUP SPI_CS_N */
181 .settings = {
182 [GPIOMUX_SUSPENDED] = &gsbi3,
183 },
184 },
185 {
186 .gpio = 10, /* GSBI3 QUP SPI_DATA_MISO */
187 .settings = {
188 [GPIOMUX_SUSPENDED] = &gsbi3,
189 },
190 },
191 {
192 .gpio = 11, /* GSBI3 QUP SPI_DATA_MOSI */
193 .settings = {
194 [GPIOMUX_SUSPENDED] = &gsbi3,
195 },
196 },
197 {
Rohit Vaswani09666872011-08-23 17:41:54 -0700198 .gpio = 12, /* GSBI4 UART */
199 .settings = {
200 [GPIOMUX_SUSPENDED] = &gsbi4,
201 },
202 },
203 {
204 .gpio = 13, /* GSBI4 UART */
205 .settings = {
206 [GPIOMUX_SUSPENDED] = &gsbi4,
207 },
208 },
209 {
210 .gpio = 14, /* GSBI4 UART */
211 .settings = {
212 [GPIOMUX_SUSPENDED] = &gsbi4,
213 },
214 },
215 {
216 .gpio = 15, /* GSBI4 UART */
217 .settings = {
218 [GPIOMUX_SUSPENDED] = &gsbi4,
219 },
220 },
Harini Jayaramaneba52672011-09-08 15:13:00 -0600221 {
222 .gpio = 16, /* GSBI5 I2C QUP SCL */
223 .settings = {
224 [GPIOMUX_SUSPENDED] = &gsbi5,
225 },
226 },
227 {
228 .gpio = 17, /* GSBI5 I2C QUP SDA */
229 .settings = {
230 [GPIOMUX_SUSPENDED] = &gsbi5,
231 },
232 },
Harini Jayaraman738c9312011-09-08 15:22:38 -0600233 {
234 /* GPIO 19 can be used for I2C/UART on GSBI5 */
235 .gpio = 19, /* GSBI3 QUP SPI_CS_1 */
236 .settings = {
237 [GPIOMUX_SUSPENDED] = &gsbi3_cs1_config,
238 },
239 },
Rohit Vaswani09666872011-08-23 17:41:54 -0700240};
241
Krishna Kondadd794462011-10-01 00:19:29 -0700242#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
243 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
244
Krishna Konda7186bfe2011-10-17 15:36:54 -0700245#define GPIO_SDCARD_PWR_EN 18
246#define GPIO_SDC1_HW_DET 80
Krishna Konda3b78ea72011-10-18 16:09:19 -0700247#define GPIO_SDC2_DAT1_WAKEUP 26
Krishna Kondadd794462011-10-01 00:19:29 -0700248
249/* MDM9x15 have 2 SDCC controllers */
250enum sdcc_controllers {
251 SDCC1,
252 SDCC2,
253 MAX_SDCC_CONTROLLER
254};
255
256#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
257/* SDC1 pad data */
258static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
259 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
260 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
261 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
262};
263
264static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
265 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
266 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
267 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
268};
269
270static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
271 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
272 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
273 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
274};
275
276static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
277 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
278 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
279 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
280};
281
282static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
283 [SDCC1] = {
284 .on = sdc1_pad_pull_on_cfg,
285 .off = sdc1_pad_pull_off_cfg,
286 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
287 },
288};
289
290static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
291 [SDCC1] = {
292 .on = sdc1_pad_drv_on_cfg,
293 .off = sdc1_pad_drv_off_cfg,
294 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
295 },
296};
297
298static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
299 [SDCC1] = {
300 .pull = &mmc_pad_pull_data[SDCC1],
301 .drv = &mmc_pad_drv_data[SDCC1]
302 },
303};
304#endif
305
Krishna Konda71aef182011-10-01 02:27:51 -0700306#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
307static struct gpiomux_setting sdcc2_clk_actv_cfg = {
308 .func = GPIOMUX_FUNC_1,
309 .drv = GPIOMUX_DRV_16MA,
310 .pull = GPIOMUX_PULL_NONE,
311};
312
313static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
314 .func = GPIOMUX_FUNC_1,
315 .drv = GPIOMUX_DRV_8MA,
316 .pull = GPIOMUX_PULL_UP,
317};
318
319static struct gpiomux_setting sdcc2_suspend_cfg = {
320 .func = GPIOMUX_FUNC_1,
321 .drv = GPIOMUX_DRV_2MA,
322 .pull = GPIOMUX_PULL_DOWN,
323};
324
325static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
326 {
327 /* SDC2_DATA_0 */
328 .gpio = 25,
329 .settings = {
330 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
331 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
332 },
333 },
334 {
335 /* SDC2_DATA_1 */
336 .gpio = 26,
337 .settings = {
338 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
339 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
340 },
341 },
342 {
343 /* SDC2_DATA_2 */
344 .gpio = 27,
345 .settings = {
346 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
347 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
348 },
349 },
350 {
351 /* SDC2_DATA_3 */
352 .gpio = 28,
353 .settings = {
354 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
355 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
356 },
357 },
358 {
359 /* SDC2_CMD GSBI1 */
360 .gpio = 29,
361 .settings = {
362 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
363 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
364 },
365 },
366 {
367 /* SDC2_CLK GSBI1 */
368 .gpio = 30,
369 .settings = {
370 [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
371 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
372 },
373 },
374};
375
376static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
377 {25, "sdc2_dat_0"},
378 {26, "sdc2_dat_1"},
379 {27, "sdc2_dat_2"},
380 {28, "sdc2_dat_3"},
381 {29, "sdc2_cmd"},
382 {30, "sdc2_clk"},
383};
384
385static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
386 [SDCC2] = {
387 .gpio = sdc2_gpio_cfg,
388 .size = ARRAY_SIZE(sdc2_gpio_cfg),
389 },
390};
391#else
392static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
393#endif
394
395static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
Krishna Kondadd794462011-10-01 00:19:29 -0700396#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
397 [SDCC1] = {
398 .is_gpio = 0,
399 .pad_data = &mmc_pad_data[SDCC1],
400 },
401#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700402#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
403 [SDCC2] = {
404 .is_gpio = 1,
405 .gpio_data = &mmc_gpio_data[SDCC2],
406 },
407#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700408};
409
410#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
411static unsigned int sdc1_sup_clk_rates[] = {
412 400000, 24000000, 48000000
413};
414
415static struct mmc_platform_data sdc1_data = {
416 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
417 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
418 .sup_clk_table = sdc1_sup_clk_rates,
419 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
Krishna Konda890b1d12011-10-18 16:05:37 -0700420 .pclk_src_dfab = 1,
Krishna Kondadd794462011-10-01 00:19:29 -0700421 .sdcc_v4_sup = true,
422 .pin_data = &mmc_slot_pin_data[SDCC1],
Krishna Konda7186bfe2011-10-17 15:36:54 -0700423#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
424 .status_gpio = GPIO_SDC1_HW_DET,
425 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
426 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
427#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700428};
429static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
430#else
431static struct mmc_platform_data *msm9615_sdc1_pdata;
432#endif
433
Krishna Konda71aef182011-10-01 02:27:51 -0700434#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
435static unsigned int sdc2_sup_clk_rates[] = {
436 400000, 24000000, 48000000
437};
438
439static struct mmc_platform_data sdc2_data = {
440 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
441 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
442 .sup_clk_table = sdc2_sup_clk_rates,
443 .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
Krishna Konda890b1d12011-10-18 16:05:37 -0700444 .pclk_src_dfab = 1,
Krishna Konda71aef182011-10-01 02:27:51 -0700445 .sdcc_v4_sup = true,
446 .pin_data = &mmc_slot_pin_data[SDCC2],
Krishna Konda3b78ea72011-10-18 16:09:19 -0700447#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
448 .sdiowakeup_irq = MSM_GPIO_TO_INT(GPIO_SDC2_DAT1_WAKEUP),
449#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700450};
451static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
452#else
453static struct mmc_platform_data *msm9615_sdc2_pdata;
454#endif
455
Krishna Kondadd794462011-10-01 00:19:29 -0700456static void __init msm9615_init_mmc(void)
457{
458 int ret;
459
460 if (msm9615_sdc1_pdata) {
461 ret = gpio_request(GPIO_SDCARD_PWR_EN, "SDCARD_PWR_EN");
462
463 if (ret) {
464 pr_err("%s: sdcc1: Error requesting GPIO "
465 "SDCARD_PWR_EN:%d\n", __func__, ret);
466 } else {
467 ret = gpio_direction_output(GPIO_SDCARD_PWR_EN, 1);
468 if (ret) {
469 pr_err("%s: sdcc1: Error setting o/p direction"
470 " for GPIO SDCARD_PWR_EN:%d\n",
471 __func__, ret);
472 gpio_free(GPIO_SDCARD_PWR_EN);
473 } else {
474 msm_add_sdcc(1, msm9615_sdc1_pdata);
475 }
476 }
477 }
Krishna Konda71aef182011-10-01 02:27:51 -0700478
479 if (msm9615_sdc2_pdata) {
480 msm_gpiomux_install(msm9615_sdcc2_configs,
481 ARRAY_SIZE(msm9615_sdcc2_configs));
482
483 /* SDC2: External card slot */
484 msm_add_sdcc(2, msm9615_sdc2_pdata);
485 }
Krishna Kondadd794462011-10-01 00:19:29 -0700486}
487#else
488static void __init msm9615_init_mmc(void) { }
489#endif
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600490static struct msm_cpuidle_state msm_cstates[] __initdata = {
491 {0, 0, "C0", "WFI",
492 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
493
494 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
495 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
496
497 {0, 2, "C2", "POWER_COLLAPSE",
498 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
499};
500static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
501 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
502 .idle_supported = 1,
503 .suspend_supported = 1,
504 .idle_enabled = 0,
505 .suspend_enabled = 0,
506 },
507 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
508 .idle_supported = 1,
509 .suspend_supported = 1,
510 .idle_enabled = 0,
511 .suspend_enabled = 0,
512 },
513 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
514 .idle_supported = 1,
515 .suspend_supported = 1,
516 .idle_enabled = 1,
517 .suspend_enabled = 1,
518 },
519};
Krishna Kondadd794462011-10-01 00:19:29 -0700520
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700521static int __init gpiomux_init(void)
522{
523 int rc;
524
525 rc = msm_gpiomux_init(NR_GPIO_IRQS);
526 if (rc) {
527 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
528 return rc;
529 }
Rohit Vaswani09666872011-08-23 17:41:54 -0700530 msm_gpiomux_install(msm9615_gsbi_configs,
531 ARRAY_SIZE(msm9615_gsbi_configs));
532
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700533 msm_gpiomux_install(msm9615_ps_hold_config,
534 ARRAY_SIZE(msm9615_ps_hold_config));
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700535 return 0;
536}
537
Harini Jayaraman738c9312011-09-08 15:22:38 -0600538static struct msm_spi_platform_data msm9615_qup_spi_gsbi3_pdata = {
539 .max_clock_speed = 24000000,
540};
541
Harini Jayaramaneba52672011-09-08 15:13:00 -0600542static struct msm_i2c_platform_data msm9615_i2c_qup_gsbi5_pdata = {
543 .clk_freq = 100000,
544 .src_clk_rate = 24000000,
545};
546
Amit Blay5e4ec192011-10-20 09:16:54 +0200547static struct msm_otg_platform_data msm_otg_pdata = {
548 .mode = USB_PERIPHERAL,
549 .otg_control = OTG_NO_CONTROL,
550 .phy_type = SNPS_28NM_INTEGRATED_PHY,
551 .pclk_src_name = "dfab_usb_hs_clk",
552};
553
554static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
555{
556 return 0;
557}
558
559static struct android_usb_platform_data android_usb_pdata = {
560 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
561};
562
563static struct platform_device android_usb_device = {
564 .name = "android_usb",
565 .id = -1,
566 .dev = {
567 .platform_data = &android_usb_pdata,
568 },
569};
570
571static struct platform_device *common_devices[] = {
572 &msm9615_device_dmov,
573 &msm_device_smd,
574 &msm_device_otg,
575 &msm_device_gadget_peripheral,
576 &android_usb_device,
577 &msm9615_device_uart_gsbi4,
David Collins0f9942a2011-10-31 09:47:34 -0700578 &msm9615_device_ext_2p95v_vreg,
Amit Blay5e4ec192011-10-20 09:16:54 +0200579 &msm9615_device_ssbi_pmic1,
580 &msm9615_device_qup_i2c_gsbi5,
581 &msm9615_device_qup_spi_gsbi3,
582 &msm_device_sps,
583 &msm9615_device_tsens,
584 &msm_device_nand,
585 &msm_rpm_device,
586#ifdef CONFIG_HW_RANDOM_MSM
587 &msm_device_rng,
588#endif
589
590#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
591 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700592 &msm9615_qcrypto_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200593#endif
594
595#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
596 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700597 &msm9615_qcedev_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200598#endif
599};
600
Harini Jayaramaneba52672011-09-08 15:13:00 -0600601static void __init msm9615_i2c_init(void)
602{
603 msm9615_device_qup_i2c_gsbi5.dev.platform_data =
604 &msm9615_i2c_qup_gsbi5_pdata;
605}
606
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700607static void __init msm9615_common_init(void)
608{
609 msm9615_device_init();
610 gpiomux_init();
Harini Jayaramaneba52672011-09-08 15:13:00 -0600611 msm9615_i2c_init();
David Collins00b31e62011-08-31 20:00:10 -0700612 regulator_suppress_info_printing();
David Collinsbea297a2011-09-28 13:11:14 -0700613 platform_device_register(&msm9615_device_rpm_regulator);
Harini Jayaraman738c9312011-09-08 15:22:38 -0600614 msm9615_device_qup_spi_gsbi3.dev.platform_data =
615 &msm9615_qup_spi_gsbi3_pdata;
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700616 msm9615_device_ssbi_pmic1.dev.platform_data =
617 &msm9615_ssbi_pm8018_pdata;
David Collins00b31e62011-08-31 20:00:10 -0700618 pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
Amit Blay5e4ec192011-10-20 09:16:54 +0200619
620 msm_device_otg.dev.platform_data = &msm_otg_pdata;
621 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
Rohit Vaswani09666872011-08-23 17:41:54 -0700622 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
Krishna Kondadd794462011-10-01 00:19:29 -0700623
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -0700624 msm_clock_init(&msm9615_clock_init_data);
625 acpuclk_init(&acpuclk_9615_soc_data);
626
Krishna Kondadd794462011-10-01 00:19:29 -0700627 msm9615_init_mmc();
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600628 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
629 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
630 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
631 msm_pm_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700632}
633
634static void __init msm9615_cdp_init(void)
635{
636 msm9615_common_init();
637}
638
639static void __init msm9615_mtp_init(void)
640{
641 msm9615_common_init();
642}
643
644MACHINE_START(MSM9615_CDP, "QCT MSM9615 CDP")
645 .map_io = msm9615_map_io,
646 .init_irq = msm9615_init_irq,
647 .timer = &msm_timer,
648 .init_machine = msm9615_cdp_init,
649MACHINE_END
650
651MACHINE_START(MSM9615_MTP, "QCT MSM9615 MTP")
652 .map_io = msm9615_map_io,
653 .init_irq = msm9615_init_irq,
654 .timer = &msm_timer,
655 .init_machine = msm9615_mtp_init,
656MACHINE_END