blob: 3ad9eb00aebdae8fb9c8f560298e8fd8be0e48f4 [file] [log] [blame]
Clemens Ladischd0ce9942007-12-23 19:50:57 +01001/*
Clemens Ladisch873591d2009-03-09 09:12:55 +01002 * C-Media CMI8788 driver for C-Media's reference design and similar models
Clemens Ladischd0ce9942007-12-23 19:50:57 +01003 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
Clemens Ladischdc0adf42009-09-28 11:17:36 +020021 * CMI8788:
22 *
Clemens Ladischd0ce9942007-12-23 19:50:57 +010023 * SPI 0 -> 1st AK4396 (front)
Clemens Ladisch7113e952008-01-14 08:55:03 +010024 * SPI 1 -> 2nd AK4396 (surround)
Clemens Ladischd0ce9942007-12-23 19:50:57 +010025 * SPI 2 -> 3rd AK4396 (center/LFE)
26 * SPI 3 -> WM8785
Clemens Ladisch7113e952008-01-14 08:55:03 +010027 * SPI 4 -> 4th AK4396 (back)
Clemens Ladischd0ce9942007-12-23 19:50:57 +010028 *
29 * GPIO 0 -> DFS0 of AK5385
30 * GPIO 1 -> DFS1 of AK5385
Clemens Ladisch873591d2009-03-09 09:12:55 +010031 * GPIO 8 -> enable headphone amplifier on HT-Omega models
Clemens Ladischdc0adf42009-09-28 11:17:36 +020032 *
33 * CM9780:
34 *
35 * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
Clemens Ladischd0ce9942007-12-23 19:50:57 +010036 */
37
Clemens Ladischdf91bc22008-08-29 13:08:34 +020038#include <linux/delay.h>
Clemens Ladisch902b05c2008-02-22 18:40:56 +010039#include <linux/mutex.h>
Clemens Ladischd0ce9942007-12-23 19:50:57 +010040#include <linux/pci.h>
Clemens Ladisch902b05c2008-02-22 18:40:56 +010041#include <sound/ac97_codec.h>
Clemens Ladischccc80fb2008-01-16 08:32:08 +010042#include <sound/control.h>
Clemens Ladischd0ce9942007-12-23 19:50:57 +010043#include <sound/core.h>
44#include <sound/initval.h>
45#include <sound/pcm.h>
46#include <sound/pcm_params.h>
47#include <sound/tlv.h>
48#include "oxygen.h"
Clemens Ladischc6260262008-01-25 08:41:52 +010049#include "ak4396.h"
Clemens Ladischf5b23682008-03-19 08:14:01 +010050#include "wm8785.h"
Clemens Ladischd0ce9942007-12-23 19:50:57 +010051
52MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
53MODULE_DESCRIPTION("C-Media CMI8788 driver");
Clemens Ladischd023dc02008-05-13 09:18:27 +020054MODULE_LICENSE("GPL v2");
Clemens Ladischd0ce9942007-12-23 19:50:57 +010055MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
56
57static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
58static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
59static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
60
61module_param_array(index, int, NULL, 0444);
62MODULE_PARM_DESC(index, "card index");
63module_param_array(id, charp, NULL, 0444);
64MODULE_PARM_DESC(id, "ID string");
65module_param_array(enable, bool, NULL, 0444);
66MODULE_PARM_DESC(enable, "enable card");
67
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020068enum {
69 MODEL_CMEDIA_REF, /* C-Media's reference design */
70 MODEL_MERIDIAN, /* AuzenTech X-Meridian */
Clemens Ladisch873591d2009-03-09 09:12:55 +010071 MODEL_CLARO, /* HT-Omega Claro */
72 MODEL_CLARO_HALO, /* HT-Omega Claro halo */
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020073};
74
Clemens Ladischd0ce9942007-12-23 19:50:57 +010075static struct pci_device_id oxygen_ids[] __devinitdata = {
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020076 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
77 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
78 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
79 { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
80 { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
81 { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
82 { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
83 { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
84 { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
Clemens Ladisch873591d2009-03-09 09:12:55 +010085 { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
86 { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
Clemens Ladischd0ce9942007-12-23 19:50:57 +010087 { }
88};
89MODULE_DEVICE_TABLE(pci, oxygen_ids);
90
Clemens Ladisch878ac3e2008-01-21 08:50:19 +010091
92#define GPIO_AK5385_DFS_MASK 0x0003
93#define GPIO_AK5385_DFS_NORMAL 0x0000
94#define GPIO_AK5385_DFS_DOUBLE 0x0001
95#define GPIO_AK5385_DFS_QUAD 0x0002
96
Clemens Ladisch873591d2009-03-09 09:12:55 +010097#define GPIO_CLARO_HP 0x0100
98
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +010099struct generic_data {
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200100 u8 ak4396_regs[4][5];
101 u16 wm8785_regs[1];
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100102};
103
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100104static void ak4396_write(struct oxygen *chip, unsigned int codec,
105 u8 reg, u8 value)
106{
107 /* maps ALSA channel pair number to SPI output */
108 static const u8 codec_spi_map[4] = {
Clemens Ladisch7113e952008-01-14 08:55:03 +0100109 0, 1, 2, 4
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100110 };
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200111 struct generic_data *data = chip->model_data;
112
Clemens Ladischc2353a02008-01-18 09:17:53 +0100113 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100114 OXYGEN_SPI_DATA_LENGTH_2 |
Clemens Ladisch2ea85982008-01-30 08:38:30 +0100115 OXYGEN_SPI_CLOCK_160 |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100116 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
Clemens Ladischc2353a02008-01-18 09:17:53 +0100117 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100118 AK4396_WRITE | (reg << 8) | value);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200119 data->ak4396_regs[codec][reg] = value;
120}
121
122static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
123 u8 reg, u8 value)
124{
125 struct generic_data *data = chip->model_data;
126
127 if (value != data->ak4396_regs[codec][reg])
128 ak4396_write(chip, codec, reg, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100129}
130
131static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
132{
Clemens Ladische58aee92008-05-13 09:20:51 +0200133 struct generic_data *data = chip->model_data;
134
Clemens Ladischc2353a02008-01-18 09:17:53 +0100135 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100136 OXYGEN_SPI_DATA_LENGTH_2 |
Clemens Ladisch2ea85982008-01-30 08:38:30 +0100137 OXYGEN_SPI_CLOCK_160 |
Clemens Ladischc2353a02008-01-18 09:17:53 +0100138 (3 << OXYGEN_SPI_CODEC_SHIFT) |
139 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100140 (reg << 9) | value);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200141 if (reg < ARRAY_SIZE(data->wm8785_regs))
142 data->wm8785_regs[reg] = value;
Clemens Ladischbbbfb552008-05-13 09:21:48 +0200143}
144
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200145static void ak4396_registers_init(struct oxygen *chip)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100146{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100147 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100148 unsigned int i;
149
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100150 for (i = 0; i < 4; ++i) {
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200151 ak4396_write(chip, i, AK4396_CONTROL_1,
152 AK4396_DIF_24_MSB | AK4396_RSTN);
153 ak4396_write(chip, i, AK4396_CONTROL_2,
154 data->ak4396_regs[0][AK4396_CONTROL_2]);
155 ak4396_write(chip, i, AK4396_CONTROL_3,
156 AK4396_PCM);
157 ak4396_write(chip, i, AK4396_LCH_ATT,
158 chip->dac_volume[i * 2]);
159 ak4396_write(chip, i, AK4396_RCH_ATT,
160 chip->dac_volume[i * 2 + 1]);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100161 }
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200162}
163
164static void ak4396_init(struct oxygen *chip)
165{
166 struct generic_data *data = chip->model_data;
167
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200168 data->ak4396_regs[0][AK4396_CONTROL_2] =
169 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200170 ak4396_registers_init(chip);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100171 snd_component_add(chip->card, "AK4396");
172}
173
174static void ak5385_init(struct oxygen *chip)
175{
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100176 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
177 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100178 snd_component_add(chip->card, "AK5385");
179}
180
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200181static void wm8785_registers_init(struct oxygen *chip)
182{
183 struct generic_data *data = chip->model_data;
184
185 wm8785_write(chip, WM8785_R7, 0);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200186 wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200187}
188
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100189static void wm8785_init(struct oxygen *chip)
190{
Clemens Ladische58aee92008-05-13 09:20:51 +0200191 struct generic_data *data = chip->model_data;
192
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200193 data->wm8785_regs[0] =
194 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200195 wm8785_registers_init(chip);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100196 snd_component_add(chip->card, "WM8785");
197}
198
199static void generic_init(struct oxygen *chip)
200{
201 ak4396_init(chip);
202 wm8785_init(chip);
203}
204
205static void meridian_init(struct oxygen *chip)
206{
207 ak4396_init(chip);
208 ak5385_init(chip);
209}
210
Clemens Ladisch873591d2009-03-09 09:12:55 +0100211static void claro_enable_hp(struct oxygen *chip)
212{
213 msleep(300);
214 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
215 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
216}
217
218static void claro_init(struct oxygen *chip)
219{
220 ak4396_init(chip);
221 wm8785_init(chip);
222 claro_enable_hp(chip);
223}
224
225static void claro_halo_init(struct oxygen *chip)
Clemens Ladischd91b4242009-02-20 09:31:14 +0100226{
227 ak4396_init(chip);
228 ak5385_init(chip);
Clemens Ladisch873591d2009-03-09 09:12:55 +0100229 claro_enable_hp(chip);
Clemens Ladischd91b4242009-02-20 09:31:14 +0100230}
231
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100232static void generic_cleanup(struct oxygen *chip)
233{
234}
235
Clemens Ladisch873591d2009-03-09 09:12:55 +0100236static void claro_disable_hp(struct oxygen *chip)
237{
238 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
239}
240
241static void claro_cleanup(struct oxygen *chip)
242{
243 claro_disable_hp(chip);
244}
245
246static void claro_suspend(struct oxygen *chip)
247{
248 claro_disable_hp(chip);
249}
250
Clemens Ladisch4a4bc532008-05-13 09:24:39 +0200251static void generic_resume(struct oxygen *chip)
252{
253 ak4396_registers_init(chip);
254 wm8785_registers_init(chip);
255}
256
Clemens Ladischc2bc4ff2008-09-22 09:05:29 +0200257static void meridian_resume(struct oxygen *chip)
258{
259 ak4396_registers_init(chip);
260}
261
Clemens Ladisch873591d2009-03-09 09:12:55 +0100262static void claro_resume(struct oxygen *chip)
Clemens Ladischd91b4242009-02-20 09:31:14 +0100263{
264 ak4396_registers_init(chip);
Clemens Ladisch873591d2009-03-09 09:12:55 +0100265 claro_enable_hp(chip);
Clemens Ladischd91b4242009-02-20 09:31:14 +0100266}
267
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100268static void set_ak4396_params(struct oxygen *chip,
269 struct snd_pcm_hw_params *params)
270{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100271 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100272 unsigned int i;
273 u8 value;
274
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200275 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100276 if (params_rate(params) <= 54000)
277 value |= AK4396_DFS_NORMAL;
Clemens Ladisch236c4922008-01-28 08:32:58 +0100278 else if (params_rate(params) <= 108000)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100279 value |= AK4396_DFS_DOUBLE;
280 else
281 value |= AK4396_DFS_QUAD;
Clemens Ladischdf91bc22008-08-29 13:08:34 +0200282
283 msleep(1); /* wait for the new MCLK to become stable */
284
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200285 if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
286 for (i = 0; i < 4; ++i) {
287 ak4396_write(chip, i, AK4396_CONTROL_1,
288 AK4396_DIF_24_MSB);
289 ak4396_write(chip, i, AK4396_CONTROL_2, value);
290 ak4396_write(chip, i, AK4396_CONTROL_1,
291 AK4396_DIF_24_MSB | AK4396_RSTN);
292 }
293 }
294}
295
296static void update_ak4396_volume(struct oxygen *chip)
297{
298 unsigned int i;
299
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100300 for (i = 0; i < 4; ++i) {
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200301 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
302 chip->dac_volume[i * 2]);
303 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
304 chip->dac_volume[i * 2 + 1]);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100305 }
306}
307
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100308static void update_ak4396_mute(struct oxygen *chip)
309{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100310 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100311 unsigned int i;
312 u8 value;
313
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200314 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100315 if (chip->dac_mute)
316 value |= AK4396_SMUTE;
317 for (i = 0; i < 4; ++i)
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200318 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100319}
320
321static void set_wm8785_params(struct oxygen *chip,
322 struct snd_pcm_hw_params *params)
323{
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200324 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100325 unsigned int value;
326
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100327 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
Clemens Ladisch71e22a42008-01-21 08:50:51 +0100328 if (params_rate(params) <= 48000)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100329 value |= WM8785_OSR_SINGLE;
Clemens Ladisch71e22a42008-01-21 08:50:51 +0100330 else if (params_rate(params) <= 96000)
331 value |= WM8785_OSR_DOUBLE;
332 else
333 value |= WM8785_OSR_QUAD;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200334 if (value != data->wm8785_regs[0]) {
335 wm8785_write(chip, WM8785_R7, 0);
336 wm8785_write(chip, WM8785_R0, value);
337 }
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100338}
339
340static void set_ak5385_params(struct oxygen *chip,
341 struct snd_pcm_hw_params *params)
342{
343 unsigned int value;
344
345 if (params_rate(params) <= 54000)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100346 value = GPIO_AK5385_DFS_NORMAL;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100347 else if (params_rate(params) <= 108000)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100348 value = GPIO_AK5385_DFS_DOUBLE;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100349 else
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100350 value = GPIO_AK5385_DFS_QUAD;
351 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
352 value, GPIO_AK5385_DFS_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100353}
354
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200355static int rolloff_info(struct snd_kcontrol *ctl,
356 struct snd_ctl_elem_info *info)
357{
358 static const char *const names[2] = {
359 "Sharp Roll-off", "Slow Roll-off"
360 };
361
362 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
363 info->count = 1;
364 info->value.enumerated.items = 2;
365 if (info->value.enumerated.item >= 2)
366 info->value.enumerated.item = 1;
367 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
368 return 0;
369}
370
371static int rolloff_get(struct snd_kcontrol *ctl,
372 struct snd_ctl_elem_value *value)
373{
374 struct oxygen *chip = ctl->private_data;
375 struct generic_data *data = chip->model_data;
376
377 value->value.enumerated.item[0] =
378 (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
379 return 0;
380}
381
382static int rolloff_put(struct snd_kcontrol *ctl,
383 struct snd_ctl_elem_value *value)
384{
385 struct oxygen *chip = ctl->private_data;
386 struct generic_data *data = chip->model_data;
387 unsigned int i;
388 int changed;
389 u8 reg;
390
391 mutex_lock(&chip->mutex);
392 reg = data->ak4396_regs[0][AK4396_CONTROL_2];
393 if (value->value.enumerated.item[0])
394 reg |= AK4396_SLOW;
395 else
396 reg &= ~AK4396_SLOW;
397 changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
398 if (changed) {
399 for (i = 0; i < 4; ++i)
400 ak4396_write(chip, i, AK4396_CONTROL_2, reg);
401 }
402 mutex_unlock(&chip->mutex);
403 return changed;
404}
405
406static const struct snd_kcontrol_new rolloff_control = {
407 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
408 .name = "DAC Filter Playback Enum",
409 .info = rolloff_info,
410 .get = rolloff_get,
411 .put = rolloff_put,
412};
413
414static int generic_mixer_init(struct oxygen *chip)
415{
416 return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
417}
418
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100419static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
420
421static const struct oxygen_model model_generic = {
422 .shortname = "C-Media CMI8788",
423 .longname = "C-Media Oxygen HD Audio",
424 .chip = "CMI8788",
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100425 .init = generic_init,
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200426 .mixer_init = generic_mixer_init,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100427 .cleanup = generic_cleanup,
Clemens Ladisch4a4bc532008-05-13 09:24:39 +0200428 .resume = generic_resume,
Clemens Ladisch76ffe1e2009-09-28 11:20:11 +0200429 .get_i2s_mclk = oxygen_default_i2s_mclk,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100430 .set_dac_params = set_ak4396_params,
431 .set_adc_params = set_wm8785_params,
432 .update_dac_volume = update_ak4396_volume,
433 .update_dac_mute = update_ak4396_mute,
Clemens Ladisch4972a172008-04-16 09:15:45 +0200434 .dac_tlv = ak4396_db_scale,
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100435 .model_data_size = sizeof(struct generic_data),
Clemens Ladischd76596b2008-09-22 09:02:08 +0200436 .device_config = PLAYBACK_0_TO_I2S |
437 PLAYBACK_1_TO_SPDIF |
438 PLAYBACK_2_TO_AC97_1 |
439 CAPTURE_0_FROM_I2S_1 |
440 CAPTURE_1_FROM_SPDIF |
441 CAPTURE_2_FROM_AC97_1,
Clemens Ladisch976cd622008-01-25 08:37:49 +0100442 .dac_channels = 8,
Clemens Ladisch193e8132008-04-16 09:13:36 +0200443 .dac_volume_min = 0,
444 .dac_volume_max = 255,
Clemens Ladisch87eedd22008-03-19 08:20:13 +0100445 .function_flags = OXYGEN_FUNCTION_SPI |
446 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
Clemens Ladisch05855ba2008-01-17 09:05:09 +0100447 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
448 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100449};
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100450
Clemens Ladisch30459d72009-02-19 08:42:44 +0100451static int __devinit get_oxygen_model(struct oxygen *chip,
452 const struct pci_device_id *id)
453{
454 chip->model = model_generic;
455 switch (id->driver_data) {
456 case MODEL_MERIDIAN:
457 chip->model.init = meridian_init;
458 chip->model.resume = meridian_resume;
459 chip->model.set_adc_params = set_ak5385_params;
460 chip->model.device_config = PLAYBACK_0_TO_I2S |
461 PLAYBACK_1_TO_SPDIF |
462 CAPTURE_0_FROM_I2S_2 |
463 CAPTURE_1_FROM_SPDIF;
464 break;
Clemens Ladisch873591d2009-03-09 09:12:55 +0100465 case MODEL_CLARO:
466 chip->model.init = claro_init;
467 chip->model.cleanup = claro_cleanup;
468 chip->model.suspend = claro_suspend;
469 chip->model.resume = claro_resume;
470 break;
471 case MODEL_CLARO_HALO:
472 chip->model.init = claro_halo_init;
473 chip->model.cleanup = claro_cleanup;
474 chip->model.suspend = claro_suspend;
475 chip->model.resume = claro_resume;
Clemens Ladischd91b4242009-02-20 09:31:14 +0100476 chip->model.set_adc_params = set_ak5385_params;
477 break;
Clemens Ladisch30459d72009-02-19 08:42:44 +0100478 }
479 if (id->driver_data == MODEL_MERIDIAN ||
Clemens Ladisch873591d2009-03-09 09:12:55 +0100480 id->driver_data == MODEL_CLARO_HALO) {
Clemens Ladisch30459d72009-02-19 08:42:44 +0100481 chip->model.misc_flags = OXYGEN_MISC_MIDI;
482 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
483 }
484 return 0;
485}
486
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100487static int __devinit generic_oxygen_probe(struct pci_dev *pci,
488 const struct pci_device_id *pci_id)
489{
490 static int dev;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100491 int err;
492
493 if (dev >= SNDRV_CARDS)
494 return -ENODEV;
495 if (!enable[dev]) {
496 ++dev;
497 return -ENOENT;
498 }
Clemens Ladischbb718582009-02-19 08:37:13 +0100499 err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
Clemens Ladisch30459d72009-02-19 08:42:44 +0100500 oxygen_ids, get_oxygen_model);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100501 if (err >= 0)
502 ++dev;
503 return err;
504}
505
506static struct pci_driver oxygen_driver = {
507 .name = "CMI8788",
508 .id_table = oxygen_ids,
509 .probe = generic_oxygen_probe,
510 .remove = __devexit_p(oxygen_pci_remove),
Clemens Ladisch4a4bc532008-05-13 09:24:39 +0200511#ifdef CONFIG_PM
512 .suspend = oxygen_pci_suspend,
513 .resume = oxygen_pci_resume,
514#endif
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100515};
516
517static int __init alsa_card_oxygen_init(void)
518{
519 return pci_register_driver(&oxygen_driver);
520}
521
522static void __exit alsa_card_oxygen_exit(void)
523{
524 pci_unregister_driver(&oxygen_driver);
525}
526
527module_init(alsa_card_oxygen_init)
528module_exit(alsa_card_oxygen_exit)