Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 14 | |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/mutex.h> |
| 22 | #include <linux/types.h> |
| 23 | #include <linux/hwmon.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/debugfs.h> |
| 26 | #include <linux/spmi.h> |
| 27 | #include <linux/of_irq.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/completion.h> |
| 30 | #include <linux/hwmon-sysfs.h> |
| 31 | #include <linux/qpnp/qpnp-adc.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | |
| 34 | /* QPNP VADC register definition */ |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 35 | #define QPNP_VADC_REVISION1 0x0 |
| 36 | #define QPNP_VADC_REVISION2 0x1 |
| 37 | #define QPNP_VADC_REVISION3 0x2 |
| 38 | #define QPNP_VADC_REVISION4 0x3 |
| 39 | #define QPNP_VADC_PERPH_TYPE 0x4 |
| 40 | #define QPNP_VADC_PERH_SUBTYPE 0x5 |
| 41 | |
| 42 | #define QPNP_VADC_SUPPORTED_REVISION2 1 |
| 43 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 44 | #define QPNP_VADC_STATUS1 0x8 |
| 45 | #define QPNP_VADC_STATUS1_OP_MODE 4 |
| 46 | #define QPNP_VADC_STATUS1_MEAS_INTERVAL_EN_STS BIT(2) |
| 47 | #define QPNP_VADC_STATUS1_REQ_STS BIT(1) |
| 48 | #define QPNP_VADC_STATUS1_EOC BIT(0) |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 49 | #define QPNP_VADC_STATUS1_REQ_STS_EOC_MASK 0x3 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 50 | #define QPNP_VADC_STATUS2 0x9 |
| 51 | #define QPNP_VADC_STATUS2_CONV_SEQ_STATE 6 |
| 52 | #define QPNP_VADC_STATUS2_FIFO_NOT_EMPTY_FLAG BIT(1) |
| 53 | #define QPNP_VADC_STATUS2_CONV_SEQ_TIMEOUT_STS BIT(0) |
| 54 | #define QPNP_VADC_STATUS2_CONV_SEQ_STATE_SHIFT 4 |
| 55 | #define QPNP_VADC_CONV_TIMEOUT_ERR 2 |
| 56 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 57 | #define QPNP_VADC_MODE_CTL 0x40 |
| 58 | #define QPNP_VADC_OP_MODE_SHIFT 4 |
| 59 | #define QPNP_VADC_VREF_XO_THM_FORCE BIT(2) |
| 60 | #define QPNP_VADC_AMUX_TRIM_EN BIT(1) |
| 61 | #define QPNP_VADC_ADC_TRIM_EN BIT(0) |
| 62 | #define QPNP_VADC_EN_CTL1 0x46 |
| 63 | #define QPNP_VADC_ADC_EN BIT(7) |
| 64 | #define QPNP_VADC_ADC_CH_SEL_CTL 0x48 |
| 65 | #define QPNP_VADC_ADC_DIG_PARAM 0x50 |
| 66 | #define QPNP_VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT 3 |
| 67 | #define QPNP_VADC_HW_SETTLE_DELAY 0x51 |
| 68 | #define QPNP_VADC_CONV_REQ 0x52 |
| 69 | #define QPNP_VADC_CONV_REQ_SET BIT(7) |
| 70 | #define QPNP_VADC_CONV_SEQ_CTL 0x54 |
| 71 | #define QPNP_VADC_CONV_SEQ_HOLDOFF_SHIFT 4 |
| 72 | #define QPNP_VADC_CONV_SEQ_TRIG_CTL 0x55 |
| 73 | #define QPNP_VADC_CONV_SEQ_FALLING_EDGE 0x0 |
| 74 | #define QPNP_VADC_CONV_SEQ_RISING_EDGE 0x1 |
| 75 | #define QPNP_VADC_CONV_SEQ_EDGE_SHIFT 7 |
| 76 | #define QPNP_VADC_FAST_AVG_CTL 0x5a |
| 77 | |
| 78 | #define QPNP_VADC_M0_LOW_THR_LSB 0x5c |
| 79 | #define QPNP_VADC_M0_LOW_THR_MSB 0x5d |
| 80 | #define QPNP_VADC_M0_HIGH_THR_LSB 0x5e |
| 81 | #define QPNP_VADC_M0_HIGH_THR_MSB 0x5f |
| 82 | #define QPNP_VADC_M1_LOW_THR_LSB 0x69 |
| 83 | #define QPNP_VADC_M1_LOW_THR_MSB 0x6a |
| 84 | #define QPNP_VADC_M1_HIGH_THR_LSB 0x6b |
| 85 | #define QPNP_VADC_M1_HIGH_THR_MSB 0x6c |
| 86 | |
| 87 | #define QPNP_VADC_DATA0 0x60 |
| 88 | #define QPNP_VADC_DATA1 0x61 |
| 89 | #define QPNP_VADC_CONV_TIMEOUT_ERR 2 |
| 90 | #define QPNP_VADC_CONV_TIME_MIN 2000 |
| 91 | #define QPNP_VADC_CONV_TIME_MAX 2100 |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 92 | #define QPNP_ADC_COMPLETION_TIMEOUT HZ |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 93 | #define QPNP_VADC_ERR_COUNT 5 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 94 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 95 | struct qpnp_vadc_drv { |
| 96 | struct qpnp_adc_drv *adc; |
| 97 | struct dentry *dent; |
| 98 | struct device *vadc_hwmon; |
| 99 | bool vadc_init_calib; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 100 | bool vadc_initialized; |
| 101 | int max_channels_available; |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 102 | bool vadc_iadc_sync_lock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 103 | struct sensor_device_attribute sens_attr[0]; |
| 104 | }; |
| 105 | |
| 106 | struct qpnp_vadc_drv *qpnp_vadc; |
| 107 | |
| 108 | static struct qpnp_vadc_scale_fn vadc_scale_fn[] = { |
| 109 | [SCALE_DEFAULT] = {qpnp_adc_scale_default}, |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 110 | [SCALE_BATT_THERM] = {qpnp_adc_scale_batt_therm}, |
| 111 | [SCALE_PMIC_THERM] = {qpnp_adc_scale_pmic_therm}, |
| 112 | [SCALE_XOTHERM] = {qpnp_adc_tdkntcg_therm}, |
Siddartha Mohanadoss | e77edf1 | 2012-09-13 14:26:32 -0700 | [diff] [blame] | 113 | [SCALE_THERM_100K_PULLUP] = {qpnp_adc_scale_therm_pu2}, |
| 114 | [SCALE_THERM_150K_PULLUP] = {qpnp_adc_scale_therm_pu1}, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | static int32_t qpnp_vadc_read_reg(int16_t reg, u8 *data) |
| 118 | { |
| 119 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 120 | int rc; |
| 121 | |
| 122 | rc = spmi_ext_register_readl(vadc->adc->spmi->ctrl, vadc->adc->slave, |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 123 | (vadc->adc->offset + reg), data, 1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 124 | if (rc < 0) { |
| 125 | pr_err("qpnp adc read reg %d failed with %d\n", reg, rc); |
| 126 | return rc; |
| 127 | } |
| 128 | |
| 129 | return 0; |
| 130 | } |
| 131 | |
| 132 | static int32_t qpnp_vadc_write_reg(int16_t reg, u8 data) |
| 133 | { |
| 134 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 135 | int rc; |
| 136 | u8 *buf; |
| 137 | |
| 138 | buf = &data; |
| 139 | |
| 140 | rc = spmi_ext_register_writel(vadc->adc->spmi->ctrl, vadc->adc->slave, |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 141 | (vadc->adc->offset + reg), buf, 1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 142 | if (rc < 0) { |
| 143 | pr_err("qpnp adc write reg %d failed with %d\n", reg, rc); |
| 144 | return rc; |
| 145 | } |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 150 | static int32_t qpnp_vadc_enable(bool state) |
| 151 | { |
| 152 | int rc = 0; |
| 153 | u8 data = 0; |
| 154 | |
| 155 | data = QPNP_VADC_ADC_EN; |
| 156 | if (state) { |
| 157 | rc = qpnp_vadc_write_reg(QPNP_VADC_EN_CTL1, |
| 158 | data); |
| 159 | if (rc < 0) { |
| 160 | pr_err("VADC enable failed\n"); |
| 161 | return rc; |
| 162 | } |
| 163 | } else { |
| 164 | rc = qpnp_vadc_write_reg(QPNP_VADC_EN_CTL1, |
| 165 | (~data & QPNP_VADC_ADC_EN)); |
| 166 | if (rc < 0) { |
| 167 | pr_err("VADC disable failed\n"); |
| 168 | return rc; |
| 169 | } |
| 170 | } |
| 171 | |
| 172 | return 0; |
| 173 | } |
| 174 | |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 175 | static int32_t qpnp_vadc_status_debug(void) |
| 176 | { |
| 177 | int rc = 0; |
| 178 | u8 mode = 0, status1 = 0, chan = 0, dig = 0, en = 0, status2 = 0; |
| 179 | |
| 180 | rc = qpnp_vadc_read_reg(QPNP_VADC_MODE_CTL, &mode); |
| 181 | if (rc < 0) { |
| 182 | pr_err("mode ctl register read failed with %d\n", rc); |
| 183 | return rc; |
| 184 | } |
| 185 | |
| 186 | rc = qpnp_vadc_read_reg(QPNP_VADC_ADC_DIG_PARAM, &dig); |
| 187 | if (rc < 0) { |
| 188 | pr_err("digital param read failed with %d\n", rc); |
| 189 | return rc; |
| 190 | } |
| 191 | |
| 192 | rc = qpnp_vadc_read_reg(QPNP_VADC_ADC_CH_SEL_CTL, &chan); |
| 193 | if (rc < 0) { |
| 194 | pr_err("channel read failed with %d\n", rc); |
| 195 | return rc; |
| 196 | } |
| 197 | |
| 198 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 199 | if (rc < 0) { |
| 200 | pr_err("status1 read failed with %d\n", rc); |
| 201 | return rc; |
| 202 | } |
| 203 | |
| 204 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS2, &status2); |
| 205 | if (rc < 0) { |
| 206 | pr_err("status2 read failed with %d\n", rc); |
| 207 | return rc; |
| 208 | } |
| 209 | |
| 210 | rc = qpnp_vadc_read_reg(QPNP_VADC_EN_CTL1, &en); |
| 211 | if (rc < 0) { |
| 212 | pr_err("en read failed with %d\n", rc); |
| 213 | return rc; |
| 214 | } |
| 215 | |
| 216 | pr_err("EOC not set - status1/2:%x/%x, dig:%x, ch:%x, mode:%x, en:%x\n", |
| 217 | status1, status2, dig, chan, mode, en); |
| 218 | |
| 219 | rc = qpnp_vadc_enable(false); |
| 220 | if (rc < 0) { |
| 221 | pr_err("VADC disable failed with %d\n", rc); |
| 222 | return rc; |
| 223 | } |
| 224 | |
| 225 | return 0; |
| 226 | } |
Siddartha Mohanadoss | 8dbb5c2 | 2012-12-11 14:50:45 -0800 | [diff] [blame] | 227 | static int32_t qpnp_vadc_configure( |
Siddartha Mohanadoss | c4a6af1 | 2012-07-13 18:50:12 -0700 | [diff] [blame] | 228 | struct qpnp_adc_amux_properties *chan_prop) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 229 | { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 230 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 231 | u8 decimation = 0, conv_sequence = 0, conv_sequence_trig = 0; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 232 | u8 mode_ctrl = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 233 | int rc = 0; |
| 234 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 235 | /* Mode selection */ |
Siddartha Mohanadoss | 429b449 | 2012-12-11 13:29:58 -0800 | [diff] [blame] | 236 | mode_ctrl |= ((chan_prop->mode_sel << QPNP_VADC_OP_MODE_SHIFT) | |
| 237 | (QPNP_VADC_ADC_TRIM_EN | QPNP_VADC_AMUX_TRIM_EN)); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 238 | rc = qpnp_vadc_write_reg(QPNP_VADC_MODE_CTL, mode_ctrl); |
| 239 | if (rc < 0) { |
| 240 | pr_err("Mode configure write error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 241 | return rc; |
| 242 | } |
| 243 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 244 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 245 | /* Channel selection */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 246 | rc = qpnp_vadc_write_reg(QPNP_VADC_ADC_CH_SEL_CTL, |
| 247 | chan_prop->amux_channel); |
| 248 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 249 | pr_err("Channel configure error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 250 | return rc; |
| 251 | } |
| 252 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 253 | /* Digital parameter setup */ |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 254 | decimation = chan_prop->decimation << |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 255 | QPNP_VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT; |
| 256 | rc = qpnp_vadc_write_reg(QPNP_VADC_ADC_DIG_PARAM, decimation); |
| 257 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 258 | pr_err("Digital parameter configure write error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 259 | return rc; |
| 260 | } |
| 261 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 262 | /* HW settling time delay */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 263 | rc = qpnp_vadc_write_reg(QPNP_VADC_HW_SETTLE_DELAY, |
| 264 | chan_prop->hw_settle_time); |
| 265 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 266 | pr_err("HW settling time setup error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 267 | return rc; |
| 268 | } |
| 269 | |
| 270 | if (chan_prop->mode_sel == (ADC_OP_NORMAL_MODE << |
| 271 | QPNP_VADC_OP_MODE_SHIFT)) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 272 | /* Normal measurement mode */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 273 | rc = qpnp_vadc_write_reg(QPNP_VADC_FAST_AVG_CTL, |
| 274 | chan_prop->fast_avg_setup); |
| 275 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 276 | pr_err("Fast averaging configure error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 277 | return rc; |
| 278 | } |
| 279 | } else if (chan_prop->mode_sel == (ADC_OP_CONVERSION_SEQUENCER << |
| 280 | QPNP_VADC_OP_MODE_SHIFT)) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 281 | /* Conversion sequence mode */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 282 | conv_sequence = ((ADC_SEQ_HOLD_100US << |
| 283 | QPNP_VADC_CONV_SEQ_HOLDOFF_SHIFT) | |
| 284 | ADC_CONV_SEQ_TIMEOUT_5MS); |
| 285 | rc = qpnp_vadc_write_reg(QPNP_VADC_CONV_SEQ_CTL, |
| 286 | conv_sequence); |
| 287 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 288 | pr_err("Conversion sequence error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 289 | return rc; |
| 290 | } |
| 291 | |
| 292 | conv_sequence_trig = ((QPNP_VADC_CONV_SEQ_RISING_EDGE << |
| 293 | QPNP_VADC_CONV_SEQ_EDGE_SHIFT) | |
| 294 | chan_prop->trigger_channel); |
| 295 | rc = qpnp_vadc_write_reg(QPNP_VADC_CONV_SEQ_TRIG_CTL, |
| 296 | conv_sequence_trig); |
| 297 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 298 | pr_err("Conversion trigger error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 299 | return rc; |
| 300 | } |
| 301 | } |
| 302 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 303 | INIT_COMPLETION(vadc->adc->adc_rslt_completion); |
| 304 | |
| 305 | rc = qpnp_vadc_enable(true); |
| 306 | if (rc) |
| 307 | return rc; |
| 308 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 309 | if (!vadc->vadc_iadc_sync_lock) { |
| 310 | /* Request conversion */ |
| 311 | rc = qpnp_vadc_write_reg(QPNP_VADC_CONV_REQ, |
| 312 | QPNP_VADC_CONV_REQ_SET); |
| 313 | if (rc < 0) { |
| 314 | pr_err("Request conversion failed\n"); |
| 315 | return rc; |
| 316 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 317 | } |
| 318 | |
| 319 | return 0; |
| 320 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 321 | |
| 322 | static int32_t qpnp_vadc_read_conversion_result(int32_t *data) |
| 323 | { |
| 324 | uint8_t rslt_lsb, rslt_msb; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 325 | int rc = 0, status = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 326 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 327 | status = qpnp_vadc_read_reg(QPNP_VADC_DATA0, &rslt_lsb); |
| 328 | if (status < 0) { |
| 329 | pr_err("qpnp adc result read failed for data0\n"); |
| 330 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 331 | } |
| 332 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 333 | status = qpnp_vadc_read_reg(QPNP_VADC_DATA1, &rslt_msb); |
| 334 | if (status < 0) { |
| 335 | pr_err("qpnp adc result read failed for data1\n"); |
| 336 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | *data = (rslt_msb << 8) | rslt_lsb; |
| 340 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 341 | status = qpnp_vadc_check_result(data); |
| 342 | if (status < 0) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 343 | pr_err("VADC data check failed\n"); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 344 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 345 | } |
| 346 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 347 | fail: |
| 348 | rc = qpnp_vadc_enable(false); |
| 349 | if (rc) |
| 350 | return rc; |
| 351 | |
| 352 | return status; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 353 | } |
| 354 | |
| 355 | static int32_t qpnp_vadc_read_status(int mode_sel) |
| 356 | { |
| 357 | u8 status1, status2, status2_conv_seq_state; |
| 358 | u8 status_err = QPNP_VADC_CONV_TIMEOUT_ERR; |
| 359 | int rc; |
| 360 | |
| 361 | switch (mode_sel) { |
| 362 | case (ADC_OP_CONVERSION_SEQUENCER << QPNP_VADC_OP_MODE_SHIFT): |
| 363 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 364 | if (rc) { |
| 365 | pr_err("qpnp_vadc read mask interrupt failed\n"); |
| 366 | return rc; |
| 367 | } |
| 368 | |
| 369 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS2, &status2); |
| 370 | if (rc) { |
| 371 | pr_err("qpnp_vadc read mask interrupt failed\n"); |
| 372 | return rc; |
| 373 | } |
| 374 | |
| 375 | if (!(status2 & ~QPNP_VADC_STATUS2_CONV_SEQ_TIMEOUT_STS) && |
| 376 | (status1 & (~QPNP_VADC_STATUS1_REQ_STS | |
| 377 | QPNP_VADC_STATUS1_EOC))) { |
| 378 | rc = status_err; |
| 379 | return rc; |
| 380 | } |
| 381 | |
| 382 | status2_conv_seq_state = status2 >> |
| 383 | QPNP_VADC_STATUS2_CONV_SEQ_STATE_SHIFT; |
| 384 | if (status2_conv_seq_state != ADC_CONV_SEQ_IDLE) { |
| 385 | pr_err("qpnp vadc seq error with status %d\n", |
| 386 | status2); |
| 387 | rc = -EINVAL; |
| 388 | return rc; |
| 389 | } |
| 390 | } |
| 391 | |
| 392 | return 0; |
| 393 | } |
| 394 | |
| 395 | static void qpnp_vadc_work(struct work_struct *work) |
| 396 | { |
| 397 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 398 | |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 399 | if (!vadc || !vadc->vadc_initialized) |
| 400 | return; |
| 401 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 402 | complete(&vadc->adc->adc_rslt_completion); |
| 403 | |
| 404 | return; |
| 405 | } |
| 406 | DECLARE_WORK(trigger_completion_work, qpnp_vadc_work); |
| 407 | |
| 408 | static irqreturn_t qpnp_vadc_isr(int irq, void *dev_id) |
| 409 | { |
| 410 | schedule_work(&trigger_completion_work); |
| 411 | |
| 412 | return IRQ_HANDLED; |
| 413 | } |
| 414 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 415 | static int32_t qpnp_vadc_version_check(void) |
| 416 | { |
| 417 | uint8_t revision; |
| 418 | int rc; |
| 419 | |
| 420 | rc = qpnp_vadc_read_reg(QPNP_VADC_REVISION2, &revision); |
| 421 | if (rc < 0) { |
| 422 | pr_err("qpnp adc result read failed with %d\n", rc); |
| 423 | return rc; |
| 424 | } |
| 425 | |
| 426 | if (revision < QPNP_VADC_SUPPORTED_REVISION2) { |
| 427 | pr_err("VADC Version not supported\n"); |
| 428 | return -EINVAL; |
| 429 | } |
| 430 | |
| 431 | return 0; |
| 432 | } |
| 433 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 434 | static uint32_t qpnp_vadc_calib_device(void) |
| 435 | { |
| 436 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | c4a6af1 | 2012-07-13 18:50:12 -0700 | [diff] [blame] | 437 | struct qpnp_adc_amux_properties conv; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 438 | int rc, calib_read_1, calib_read_2, count = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 439 | u8 status1 = 0; |
| 440 | |
| 441 | conv.amux_channel = REF_125V; |
| 442 | conv.decimation = DECIMATION_TYPE2; |
| 443 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 444 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 445 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 446 | |
| 447 | rc = qpnp_vadc_configure(&conv); |
| 448 | if (rc) { |
| 449 | pr_err("qpnp_vadc configure failed with %d\n", rc); |
| 450 | goto calib_fail; |
| 451 | } |
| 452 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 453 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 454 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 455 | if (rc < 0) |
| 456 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 457 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 458 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 459 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 460 | count++; |
| 461 | if (count > QPNP_VADC_ERR_COUNT) { |
| 462 | rc = -ENODEV; |
| 463 | goto calib_fail; |
| 464 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | rc = qpnp_vadc_read_conversion_result(&calib_read_1); |
| 468 | if (rc) { |
| 469 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 470 | goto calib_fail; |
| 471 | } |
| 472 | |
| 473 | conv.amux_channel = REF_625MV; |
| 474 | conv.decimation = DECIMATION_TYPE2; |
| 475 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 476 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 477 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 478 | rc = qpnp_vadc_configure(&conv); |
| 479 | if (rc) { |
| 480 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 481 | goto calib_fail; |
| 482 | } |
| 483 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 484 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 485 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 486 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 487 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 488 | if (rc < 0) |
| 489 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 490 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 491 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 492 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 493 | count++; |
| 494 | if (count > QPNP_VADC_ERR_COUNT) { |
| 495 | rc = -ENODEV; |
| 496 | goto calib_fail; |
| 497 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 498 | } |
| 499 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 500 | rc = qpnp_vadc_read_conversion_result(&calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 501 | if (rc) { |
| 502 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 503 | goto calib_fail; |
| 504 | } |
| 505 | |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 506 | pr_debug("absolute reference raw: 625mV:0x%x 1.25V:0x%x\n", |
| 507 | calib_read_1, calib_read_2); |
| 508 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 509 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy = |
| 510 | (calib_read_1 - calib_read_2); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 511 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 512 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dx |
| 513 | = QPNP_ADC_625_UV; |
| 514 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_vref = |
| 515 | calib_read_1; |
| 516 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_gnd = |
| 517 | calib_read_2; |
| 518 | /* Ratiometric Calibration */ |
| 519 | conv.amux_channel = VDD_VADC; |
| 520 | conv.decimation = DECIMATION_TYPE2; |
| 521 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 522 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 523 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 524 | rc = qpnp_vadc_configure(&conv); |
| 525 | if (rc) { |
| 526 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 527 | goto calib_fail; |
| 528 | } |
| 529 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 530 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 531 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 532 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 533 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 534 | if (rc < 0) |
| 535 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 536 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 537 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 538 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 539 | count++; |
| 540 | if (count > QPNP_VADC_ERR_COUNT) { |
| 541 | rc = -ENODEV; |
| 542 | goto calib_fail; |
| 543 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 544 | } |
| 545 | |
| 546 | rc = qpnp_vadc_read_conversion_result(&calib_read_1); |
| 547 | if (rc) { |
| 548 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 549 | goto calib_fail; |
| 550 | } |
| 551 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 552 | conv.amux_channel = GND_REF; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 553 | conv.decimation = DECIMATION_TYPE2; |
| 554 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 555 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 556 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 557 | rc = qpnp_vadc_configure(&conv); |
| 558 | if (rc) { |
| 559 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 560 | goto calib_fail; |
| 561 | } |
| 562 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 563 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 564 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 565 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 566 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 567 | if (rc < 0) |
| 568 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 569 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 570 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 571 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame^] | 572 | count++; |
| 573 | if (count > QPNP_VADC_ERR_COUNT) { |
| 574 | rc = -ENODEV; |
| 575 | goto calib_fail; |
| 576 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 577 | } |
| 578 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 579 | rc = qpnp_vadc_read_conversion_result(&calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 580 | if (rc) { |
| 581 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 582 | goto calib_fail; |
| 583 | } |
| 584 | |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 585 | pr_debug("ratiometric reference raw: VDD:0x%x GND:0x%x\n", |
| 586 | calib_read_1, calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 587 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy = |
| 588 | (calib_read_1 - calib_read_2); |
| 589 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx = |
| 590 | vadc->adc->adc_prop->adc_vdd_reference; |
| 591 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_vref = |
| 592 | calib_read_1; |
| 593 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_gnd = |
| 594 | calib_read_2; |
| 595 | |
| 596 | calib_fail: |
| 597 | return rc; |
| 598 | } |
| 599 | |
Siddartha Mohanadoss | d0f4fd1 | 2012-11-20 16:28:40 -0800 | [diff] [blame] | 600 | int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_linear_graph *param, |
| 601 | enum qpnp_adc_calib_type calib_type) |
| 602 | { |
| 603 | |
| 604 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 605 | |
| 606 | switch (calib_type) { |
| 607 | case CALIB_RATIOMETRIC: |
| 608 | param->dy = |
| 609 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy; |
| 610 | param->dx = |
| 611 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx; |
| 612 | param->adc_vref = vadc->adc->adc_prop->adc_vdd_reference; |
| 613 | param->adc_gnd = |
| 614 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_gnd; |
| 615 | break; |
| 616 | case CALIB_ABSOLUTE: |
| 617 | param->dy = |
| 618 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy; |
| 619 | param->dx = |
| 620 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dx; |
| 621 | param->adc_vref = vadc->adc->adc_prop->adc_vdd_reference; |
| 622 | param->adc_gnd = |
| 623 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_gnd; |
| 624 | break; |
| 625 | default: |
| 626 | return -EINVAL; |
| 627 | } |
| 628 | |
| 629 | return 0; |
| 630 | } |
| 631 | EXPORT_SYMBOL(qpnp_get_vadc_gain_and_offset); |
| 632 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 633 | int32_t qpnp_vadc_is_ready(void) |
| 634 | { |
| 635 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 636 | |
| 637 | if (!vadc || !vadc->vadc_initialized) |
| 638 | return -EPROBE_DEFER; |
| 639 | else |
| 640 | return 0; |
| 641 | } |
| 642 | EXPORT_SYMBOL(qpnp_vadc_is_ready); |
| 643 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 644 | int32_t qpnp_vadc_conv_seq_request(enum qpnp_vadc_trigger trigger_channel, |
| 645 | enum qpnp_vadc_channels channel, |
| 646 | struct qpnp_vadc_result *result) |
| 647 | { |
| 648 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 649 | int rc = 0, scale_type, amux_prescaling, dt_index = 0; |
| 650 | |
| 651 | if (!vadc || !vadc->vadc_initialized) |
| 652 | return -EPROBE_DEFER; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 653 | |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 654 | mutex_lock(&vadc->adc->adc_lock); |
| 655 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 656 | if (!vadc->vadc_init_calib) { |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 657 | rc = qpnp_vadc_version_check(); |
| 658 | if (rc) |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 659 | goto fail_unlock; |
| 660 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 661 | rc = qpnp_vadc_calib_device(); |
| 662 | if (rc) { |
| 663 | pr_err("Calibration failed\n"); |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 664 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 665 | } else |
| 666 | vadc->vadc_init_calib = true; |
| 667 | } |
| 668 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 669 | vadc->adc->amux_prop->amux_channel = channel; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 670 | |
Siddartha Mohanadoss | 7126ce8 | 2012-12-11 14:33:11 -0800 | [diff] [blame] | 671 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 672 | != channel) && (dt_index < vadc->max_channels_available)) |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 673 | dt_index++; |
| 674 | |
Siddartha Mohanadoss | 7126ce8 | 2012-12-11 14:33:11 -0800 | [diff] [blame] | 675 | if (dt_index >= vadc->max_channels_available) { |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 676 | pr_err("not a valid VADC channel\n"); |
| 677 | rc = -EINVAL; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 678 | goto fail_unlock; |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 679 | } |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 680 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 681 | vadc->adc->amux_prop->decimation = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 682 | vadc->adc->adc_channels[dt_index].adc_decimation; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 683 | vadc->adc->amux_prop->hw_settle_time = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 684 | vadc->adc->adc_channels[dt_index].hw_settle_time; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 685 | vadc->adc->amux_prop->fast_avg_setup = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 686 | vadc->adc->adc_channels[dt_index].fast_avg_setup; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 687 | |
| 688 | if (trigger_channel < ADC_SEQ_NONE) |
| 689 | vadc->adc->amux_prop->mode_sel = (ADC_OP_CONVERSION_SEQUENCER |
| 690 | << QPNP_VADC_OP_MODE_SHIFT); |
| 691 | else if (trigger_channel == ADC_SEQ_NONE) |
| 692 | vadc->adc->amux_prop->mode_sel = (ADC_OP_NORMAL_MODE |
| 693 | << QPNP_VADC_OP_MODE_SHIFT); |
| 694 | else { |
| 695 | pr_err("Invalid trigger channel:%d\n", trigger_channel); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 696 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 697 | } |
| 698 | |
| 699 | vadc->adc->amux_prop->trigger_channel = trigger_channel; |
| 700 | |
| 701 | rc = qpnp_vadc_configure(vadc->adc->amux_prop); |
| 702 | if (rc) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 703 | pr_err("qpnp vadc configure failed with %d\n", rc); |
| 704 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 705 | } |
| 706 | |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 707 | rc = wait_for_completion_timeout(&vadc->adc->adc_rslt_completion, |
| 708 | QPNP_ADC_COMPLETION_TIMEOUT); |
| 709 | if (!rc) { |
| 710 | u8 status1 = 0; |
| 711 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 712 | if (rc < 0) |
| 713 | goto fail_unlock; |
| 714 | status1 &= (QPNP_VADC_STATUS1_REQ_STS | QPNP_VADC_STATUS1_EOC); |
| 715 | if (status1 == QPNP_VADC_STATUS1_EOC) |
| 716 | pr_debug("End of conversion status set\n"); |
| 717 | else { |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 718 | rc = qpnp_vadc_status_debug(); |
| 719 | if (rc < 0) |
| 720 | pr_err("VADC disable failed\n"); |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 721 | rc = -EINVAL; |
| 722 | goto fail_unlock; |
| 723 | } |
| 724 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 725 | |
| 726 | if (trigger_channel < ADC_SEQ_NONE) { |
| 727 | rc = qpnp_vadc_read_status(vadc->adc->amux_prop->mode_sel); |
| 728 | if (rc) |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 729 | pr_debug("Conversion sequence timed out - %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 730 | } |
| 731 | |
| 732 | rc = qpnp_vadc_read_conversion_result(&result->adc_code); |
| 733 | if (rc) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 734 | pr_err("qpnp vadc read adc code failed with %d\n", rc); |
| 735 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 736 | } |
| 737 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 738 | amux_prescaling = |
| 739 | vadc->adc->adc_channels[dt_index].chan_path_prescaling; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 740 | |
| 741 | vadc->adc->amux_prop->chan_prop->offset_gain_numerator = |
| 742 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].num; |
| 743 | vadc->adc->amux_prop->chan_prop->offset_gain_denominator = |
| 744 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].den; |
| 745 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 746 | scale_type = vadc->adc->adc_channels[dt_index].adc_scale_fn; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 747 | if (scale_type >= SCALE_NONE) { |
| 748 | rc = -EBADF; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 749 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 750 | } |
| 751 | |
| 752 | vadc_scale_fn[scale_type].chan(result->adc_code, |
| 753 | vadc->adc->adc_prop, vadc->adc->amux_prop->chan_prop, result); |
| 754 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 755 | fail_unlock: |
| 756 | mutex_unlock(&vadc->adc->adc_lock); |
| 757 | |
| 758 | return rc; |
| 759 | } |
| 760 | EXPORT_SYMBOL(qpnp_vadc_conv_seq_request); |
| 761 | |
| 762 | int32_t qpnp_vadc_read(enum qpnp_vadc_channels channel, |
| 763 | struct qpnp_vadc_result *result) |
| 764 | { |
| 765 | return qpnp_vadc_conv_seq_request(ADC_SEQ_NONE, |
| 766 | channel, result); |
| 767 | } |
Siddartha Mohanadoss | 271d00f | 2013-03-26 18:24:14 -0700 | [diff] [blame] | 768 | EXPORT_SYMBOL(qpnp_vadc_read); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 769 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 770 | static void qpnp_vadc_lock(void) |
| 771 | { |
| 772 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 773 | |
| 774 | mutex_lock(&vadc->adc->adc_lock); |
| 775 | } |
| 776 | |
| 777 | static void qpnp_vadc_unlock(void) |
| 778 | { |
| 779 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 780 | |
| 781 | mutex_unlock(&vadc->adc->adc_lock); |
| 782 | } |
| 783 | |
| 784 | int32_t qpnp_vadc_iadc_sync_request(enum qpnp_vadc_channels channel) |
| 785 | { |
| 786 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 787 | int rc = 0, dt_index = 0; |
| 788 | |
| 789 | if (!vadc || !vadc->vadc_initialized) |
| 790 | return -EPROBE_DEFER; |
| 791 | |
| 792 | qpnp_vadc_lock(); |
| 793 | |
| 794 | if (!vadc->vadc_init_calib) { |
| 795 | rc = qpnp_vadc_version_check(); |
| 796 | if (rc) |
| 797 | goto fail; |
| 798 | |
| 799 | rc = qpnp_vadc_calib_device(); |
| 800 | if (rc) { |
| 801 | pr_err("Calibration failed\n"); |
| 802 | goto fail; |
| 803 | } else |
| 804 | vadc->vadc_init_calib = true; |
| 805 | } |
| 806 | |
| 807 | vadc->adc->amux_prop->amux_channel = channel; |
| 808 | |
| 809 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 810 | != channel) && (dt_index < vadc->max_channels_available)) |
| 811 | dt_index++; |
| 812 | |
| 813 | if (dt_index >= vadc->max_channels_available) { |
| 814 | pr_err("not a valid VADC channel\n"); |
| 815 | rc = -EINVAL; |
| 816 | goto fail; |
| 817 | } |
| 818 | |
| 819 | vadc->adc->amux_prop->decimation = |
| 820 | vadc->adc->adc_channels[dt_index].adc_decimation; |
| 821 | vadc->adc->amux_prop->hw_settle_time = |
| 822 | vadc->adc->adc_channels[dt_index].hw_settle_time; |
| 823 | vadc->adc->amux_prop->fast_avg_setup = |
| 824 | vadc->adc->adc_channels[dt_index].fast_avg_setup; |
| 825 | vadc->adc->amux_prop->mode_sel = (ADC_OP_NORMAL_MODE |
| 826 | << QPNP_VADC_OP_MODE_SHIFT); |
| 827 | vadc->vadc_iadc_sync_lock = true; |
| 828 | |
| 829 | rc = qpnp_vadc_configure(vadc->adc->amux_prop); |
| 830 | if (rc) { |
| 831 | pr_err("qpnp vadc configure failed with %d\n", rc); |
| 832 | goto fail; |
| 833 | } |
| 834 | |
| 835 | return rc; |
| 836 | fail: |
| 837 | vadc->vadc_iadc_sync_lock = false; |
| 838 | qpnp_vadc_unlock(); |
| 839 | return rc; |
| 840 | } |
| 841 | EXPORT_SYMBOL(qpnp_vadc_iadc_sync_request); |
| 842 | |
| 843 | int32_t qpnp_vadc_iadc_sync_complete_request(enum qpnp_vadc_channels channel, |
| 844 | struct qpnp_vadc_result *result) |
| 845 | { |
| 846 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 847 | int rc = 0, scale_type, amux_prescaling, dt_index = 0; |
| 848 | |
| 849 | vadc->adc->amux_prop->amux_channel = channel; |
| 850 | |
| 851 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 852 | != channel) && (dt_index < vadc->max_channels_available)) |
| 853 | dt_index++; |
| 854 | |
| 855 | rc = qpnp_vadc_read_conversion_result(&result->adc_code); |
| 856 | if (rc) { |
| 857 | pr_err("qpnp vadc read adc code failed with %d\n", rc); |
| 858 | goto fail; |
| 859 | } |
| 860 | |
| 861 | amux_prescaling = |
| 862 | vadc->adc->adc_channels[dt_index].chan_path_prescaling; |
| 863 | |
| 864 | vadc->adc->amux_prop->chan_prop->offset_gain_numerator = |
| 865 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].num; |
| 866 | vadc->adc->amux_prop->chan_prop->offset_gain_denominator = |
| 867 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].den; |
| 868 | |
| 869 | scale_type = vadc->adc->adc_channels[dt_index].adc_scale_fn; |
| 870 | if (scale_type >= SCALE_NONE) { |
| 871 | rc = -EBADF; |
| 872 | goto fail; |
| 873 | } |
| 874 | |
| 875 | vadc_scale_fn[scale_type].chan(result->adc_code, |
| 876 | vadc->adc->adc_prop, vadc->adc->amux_prop->chan_prop, result); |
| 877 | |
| 878 | fail: |
| 879 | vadc->vadc_iadc_sync_lock = false; |
| 880 | qpnp_vadc_unlock(); |
| 881 | return rc; |
| 882 | } |
| 883 | EXPORT_SYMBOL(qpnp_vadc_iadc_sync_complete_request); |
| 884 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 885 | static ssize_t qpnp_adc_show(struct device *dev, |
| 886 | struct device_attribute *devattr, char *buf) |
| 887 | { |
| 888 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
| 889 | struct qpnp_vadc_result result; |
| 890 | int rc = -1; |
| 891 | |
| 892 | rc = qpnp_vadc_read(attr->index, &result); |
| 893 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 894 | if (rc) { |
| 895 | pr_err("VADC read error with %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 896 | return 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 897 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 898 | |
| 899 | return snprintf(buf, QPNP_ADC_HWMON_NAME_LENGTH, |
| 900 | "Result:%lld Raw:%d\n", result.physical, result.adc_code); |
| 901 | } |
| 902 | |
| 903 | static struct sensor_device_attribute qpnp_adc_attr = |
| 904 | SENSOR_ATTR(NULL, S_IRUGO, qpnp_adc_show, NULL, 0); |
| 905 | |
| 906 | static int32_t qpnp_vadc_init_hwmon(struct spmi_device *spmi) |
| 907 | { |
| 908 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 909 | struct device_node *child; |
| 910 | struct device_node *node = spmi->dev.of_node; |
| 911 | int rc = 0, i = 0, channel; |
| 912 | |
| 913 | for_each_child_of_node(node, child) { |
| 914 | channel = vadc->adc->adc_channels[i].channel_num; |
| 915 | qpnp_adc_attr.index = vadc->adc->adc_channels[i].channel_num; |
| 916 | qpnp_adc_attr.dev_attr.attr.name = |
| 917 | vadc->adc->adc_channels[i].name; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 918 | memcpy(&vadc->sens_attr[i], &qpnp_adc_attr, |
| 919 | sizeof(qpnp_adc_attr)); |
Stephen Boyd | d733796 | 2012-10-30 11:10:46 -0700 | [diff] [blame] | 920 | sysfs_attr_init(&vadc->sens_attr[i].dev_attr.attr); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 921 | rc = device_create_file(&spmi->dev, |
| 922 | &vadc->sens_attr[i].dev_attr); |
| 923 | if (rc) { |
| 924 | dev_err(&spmi->dev, |
| 925 | "device_create_file failed for dev %s\n", |
| 926 | vadc->adc->adc_channels[i].name); |
| 927 | goto hwmon_err_sens; |
| 928 | } |
| 929 | i++; |
| 930 | } |
| 931 | |
| 932 | return 0; |
| 933 | hwmon_err_sens: |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 934 | pr_err("Init HWMON failed for qpnp_adc with %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 935 | return rc; |
| 936 | } |
| 937 | |
| 938 | static int __devinit qpnp_vadc_probe(struct spmi_device *spmi) |
| 939 | { |
| 940 | struct qpnp_vadc_drv *vadc; |
| 941 | struct qpnp_adc_drv *adc_qpnp; |
| 942 | struct device_node *node = spmi->dev.of_node; |
| 943 | struct device_node *child; |
| 944 | int rc, count_adc_channel_list = 0; |
| 945 | |
| 946 | if (!node) |
| 947 | return -EINVAL; |
| 948 | |
| 949 | if (qpnp_vadc) { |
| 950 | pr_err("VADC already in use\n"); |
| 951 | return -EBUSY; |
| 952 | } |
| 953 | |
| 954 | for_each_child_of_node(node, child) |
| 955 | count_adc_channel_list++; |
| 956 | |
| 957 | if (!count_adc_channel_list) { |
| 958 | pr_err("No channel listing\n"); |
| 959 | return -EINVAL; |
| 960 | } |
| 961 | |
| 962 | vadc = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_vadc_drv) + |
| 963 | (sizeof(struct sensor_device_attribute) * |
| 964 | count_adc_channel_list), GFP_KERNEL); |
| 965 | if (!vadc) { |
| 966 | dev_err(&spmi->dev, "Unable to allocate memory\n"); |
| 967 | return -ENOMEM; |
| 968 | } |
| 969 | |
| 970 | adc_qpnp = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_adc_drv), |
| 971 | GFP_KERNEL); |
| 972 | if (!adc_qpnp) { |
| 973 | dev_err(&spmi->dev, "Unable to allocate memory\n"); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 974 | rc = -ENOMEM; |
| 975 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 976 | } |
| 977 | |
| 978 | vadc->adc = adc_qpnp; |
| 979 | |
| 980 | rc = qpnp_adc_get_devicetree_data(spmi, vadc->adc); |
| 981 | if (rc) { |
| 982 | dev_err(&spmi->dev, "failed to read device tree\n"); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 983 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 984 | } |
| 985 | |
Siddartha Mohanadoss | 1210995 | 2012-11-20 14:57:51 -0800 | [diff] [blame] | 986 | rc = devm_request_irq(&spmi->dev, vadc->adc->adc_irq_eoc, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 987 | qpnp_vadc_isr, IRQF_TRIGGER_RISING, |
| 988 | "qpnp_vadc_interrupt", vadc); |
| 989 | if (rc) { |
| 990 | dev_err(&spmi->dev, |
| 991 | "failed to request adc irq with error %d\n", rc); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 992 | goto fail; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 993 | } else { |
Siddartha Mohanadoss | 1210995 | 2012-11-20 14:57:51 -0800 | [diff] [blame] | 994 | enable_irq_wake(vadc->adc->adc_irq_eoc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 995 | } |
| 996 | |
| 997 | qpnp_vadc = vadc; |
| 998 | dev_set_drvdata(&spmi->dev, vadc); |
| 999 | rc = qpnp_vadc_init_hwmon(spmi); |
| 1000 | if (rc) { |
| 1001 | dev_err(&spmi->dev, "failed to initialize qpnp hwmon adc\n"); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1002 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1003 | } |
| 1004 | vadc->vadc_hwmon = hwmon_device_register(&vadc->adc->spmi->dev); |
| 1005 | vadc->vadc_init_calib = false; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1006 | vadc->max_channels_available = count_adc_channel_list; |
Siddartha Mohanadoss | 0ee2812 | 2012-11-01 10:35:01 -0700 | [diff] [blame] | 1007 | vadc->vadc_initialized = true; |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1008 | vadc->vadc_iadc_sync_lock = false; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1009 | |
| 1010 | return 0; |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1011 | fail: |
| 1012 | qpnp_vadc = NULL; |
| 1013 | return rc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1014 | } |
| 1015 | |
| 1016 | static int __devexit qpnp_vadc_remove(struct spmi_device *spmi) |
| 1017 | { |
| 1018 | struct qpnp_vadc_drv *vadc = dev_get_drvdata(&spmi->dev); |
| 1019 | struct device_node *node = spmi->dev.of_node; |
| 1020 | struct device_node *child; |
| 1021 | int i = 0; |
| 1022 | |
| 1023 | for_each_child_of_node(node, child) { |
| 1024 | device_remove_file(&spmi->dev, |
| 1025 | &vadc->sens_attr[i].dev_attr); |
| 1026 | i++; |
| 1027 | } |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1028 | vadc->vadc_initialized = false; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1029 | dev_set_drvdata(&spmi->dev, NULL); |
| 1030 | |
| 1031 | return 0; |
| 1032 | } |
| 1033 | |
| 1034 | static const struct of_device_id qpnp_vadc_match_table[] = { |
| 1035 | { .compatible = "qcom,qpnp-vadc", |
| 1036 | }, |
| 1037 | {} |
| 1038 | }; |
| 1039 | |
| 1040 | static struct spmi_driver qpnp_vadc_driver = { |
| 1041 | .driver = { |
| 1042 | .name = "qcom,qpnp-vadc", |
| 1043 | .of_match_table = qpnp_vadc_match_table, |
| 1044 | }, |
| 1045 | .probe = qpnp_vadc_probe, |
| 1046 | .remove = qpnp_vadc_remove, |
| 1047 | }; |
| 1048 | |
| 1049 | static int __init qpnp_vadc_init(void) |
| 1050 | { |
| 1051 | return spmi_driver_register(&qpnp_vadc_driver); |
| 1052 | } |
| 1053 | module_init(qpnp_vadc_init); |
| 1054 | |
| 1055 | static void __exit qpnp_vadc_exit(void) |
| 1056 | { |
| 1057 | spmi_driver_unregister(&qpnp_vadc_driver); |
| 1058 | } |
| 1059 | module_exit(qpnp_vadc_exit); |
| 1060 | |
| 1061 | MODULE_DESCRIPTION("QPNP PMIC Voltage ADC driver"); |
| 1062 | MODULE_LICENSE("GPL v2"); |