blob: e177de47e3e0fa4bf55a4388b734da72e00a43ab [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070024static char *dev_info = "ath9k";
25
26MODULE_AUTHOR("Atheros Communications");
27MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
28MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
29MODULE_LICENSE("Dual BSD/GPL");
30
31static struct pci_device_id ath_pci_id_table[] __devinitdata = {
32 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
33 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
34 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
37 { 0 }
38};
39
40static int ath_get_channel(struct ath_softc *sc,
41 struct ieee80211_channel *chan)
42{
43 int i;
44
45 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
46 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
47 return i;
48 }
49
50 return -1;
51}
52
53static u32 ath_get_extchanmode(struct ath_softc *sc,
54 struct ieee80211_channel *chan)
55{
56 u32 chanmode = 0;
57 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
58 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
59
60 switch (chan->band) {
61 case IEEE80211_BAND_2GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020062 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070063 (tx_chan_width == ATH9K_HT_MACMODE_20))
64 chanmode = CHANNEL_G_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020065 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070066 (tx_chan_width == ATH9K_HT_MACMODE_2040))
67 chanmode = CHANNEL_G_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020068 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070069 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40MINUS;
71 break;
72 case IEEE80211_BAND_5GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020073 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070074 (tx_chan_width == ATH9K_HT_MACMODE_20))
75 chanmode = CHANNEL_A_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020076 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070077 (tx_chan_width == ATH9K_HT_MACMODE_2040))
78 chanmode = CHANNEL_A_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020079 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070080 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40MINUS;
82 break;
83 default:
84 break;
85 }
86
87 return chanmode;
88}
89
90
91static int ath_setkey_tkip(struct ath_softc *sc,
92 struct ieee80211_key_conf *key,
93 struct ath9k_keyval *hk,
94 const u8 *addr)
95{
96 u8 *key_rxmic = NULL;
97 u8 *key_txmic = NULL;
98
99 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
100 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
101
102 if (addr == NULL) {
103 /* Group key installation */
104 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
105 return ath_keyset(sc, key->keyidx, hk, addr);
106 }
107 if (!sc->sc_splitmic) {
108 /*
109 * data key goes at first index,
110 * the hal handles the MIC keys at index+64.
111 */
112 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
113 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
114 return ath_keyset(sc, key->keyidx, hk, addr);
115 }
116 /*
117 * TX key goes at first index, RX key at +32.
118 * The hal handles the MIC keys at index+64.
119 */
120 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
121 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
122 /* Txmic entry failed. No need to proceed further */
123 DPRINTF(sc, ATH_DBG_KEYCACHE,
124 "%s Setting TX MIC Key Failed\n", __func__);
125 return 0;
126 }
127
128 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
129 /* XXX delete tx key on failure? */
130 return ath_keyset(sc, key->keyidx+32, hk, addr);
131}
132
133static int ath_key_config(struct ath_softc *sc,
134 const u8 *addr,
135 struct ieee80211_key_conf *key)
136{
137 struct ieee80211_vif *vif;
138 struct ath9k_keyval hk;
139 const u8 *mac = NULL;
140 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200141 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700142
143 memset(&hk, 0, sizeof(hk));
144
145 switch (key->alg) {
146 case ALG_WEP:
147 hk.kv_type = ATH9K_CIPHER_WEP;
148 break;
149 case ALG_TKIP:
150 hk.kv_type = ATH9K_CIPHER_TKIP;
151 break;
152 case ALG_CCMP:
153 hk.kv_type = ATH9K_CIPHER_AES_CCM;
154 break;
155 default:
156 return -EINVAL;
157 }
158
159 hk.kv_len = key->keylen;
160 memcpy(hk.kv_val, key->key, key->keylen);
161
162 if (!sc->sc_vaps[0])
163 return -EIO;
164
Sujith5640b082008-10-29 10:16:06 +0530165 vif = sc->sc_vaps[0];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700166 opmode = vif->type;
167
168 /*
169 * Strategy:
170 * For _M_STA mc tx, we will not setup a key at all since we never
171 * tx mc.
172 * _M_STA mc rx, we will use the keyID.
173 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
174 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
175 * peer node. BUT we will plumb a cleartext key so that we can do
176 * perSta default key table lookup in software.
177 */
178 if (is_broadcast_ether_addr(addr)) {
179 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200180 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700181 /* default key: could be group WPA key
182 * or could be static WEP key */
183 mac = NULL;
184 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200185 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700186 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200187 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700188 break;
189 default:
190 ASSERT(0);
191 break;
192 }
193 } else {
194 mac = addr;
195 }
196
197 if (key->alg == ALG_TKIP)
198 ret = ath_setkey_tkip(sc, key, &hk, mac);
199 else
200 ret = ath_keyset(sc, key->keyidx, &hk, mac);
201
202 if (!ret)
203 return -EIO;
204
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700205 return 0;
206}
207
208static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
209{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700210 int freeslot;
211
Sujithff9b6622008-08-14 13:27:16 +0530212 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700213 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700214}
215
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200216static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700217{
Sujith60653672008-08-14 13:28:02 +0530218#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
219#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700220
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200221 ht_info->ht_supported = true;
222 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
223 IEEE80211_HT_CAP_SM_PS |
224 IEEE80211_HT_CAP_SGI_40 |
225 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700226
Sujith60653672008-08-14 13:28:02 +0530227 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
228 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200229 /* set up supported mcs set */
230 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
231 ht_info->mcs.rx_mask[0] = 0xff;
232 ht_info->mcs.rx_mask[1] = 0xff;
233 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700234}
235
236static int ath_rate2idx(struct ath_softc *sc, int rate)
237{
238 int i = 0, cur_band, n_rates;
239 struct ieee80211_hw *hw = sc->hw;
240
241 cur_band = hw->conf.channel->band;
242 n_rates = sc->sbands[cur_band].n_bitrates;
243
244 for (i = 0; i < n_rates; i++) {
245 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
246 break;
247 }
248
249 /*
250 * NB:mac80211 validates rx rate index against the supported legacy rate
251 * index only (should be done against ht rates also), return the highest
252 * legacy rate index for rx rate which does not match any one of the
253 * supported basic and extended rates to make mac80211 happy.
254 * The following hack will be cleaned up once the issue with
255 * the rx rate index validation in mac80211 is fixed.
256 */
257 if (i == n_rates)
258 return n_rates - 1;
259 return i;
260}
261
262static void ath9k_rx_prepare(struct ath_softc *sc,
263 struct sk_buff *skb,
264 struct ath_recv_status *status,
265 struct ieee80211_rx_status *rx_status)
266{
267 struct ieee80211_hw *hw = sc->hw;
268 struct ieee80211_channel *curchan = hw->conf.channel;
269
270 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
271
272 rx_status->mactime = status->tsf;
273 rx_status->band = curchan->band;
274 rx_status->freq = curchan->center_freq;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700275 rx_status->noise = sc->sc_ani.sc_noise_floor;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700276 rx_status->signal = rx_status->noise + status->rssi;
277 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
278 rx_status->antenna = status->antenna;
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700279
Luis R. Rodriguezc49d1542008-10-13 14:08:09 -0700280 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
281 * scheme can be used here but it requires tables of SNR/throughput for
282 * each possible mode used. */
283 rx_status->qual = status->rssi * 100 / 45;
284
285 /* rssi can be more than 45 though, anything above that
286 * should be considered at 100% */
287 if (rx_status->qual > 100)
288 rx_status->qual = 100;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700289
290 if (status->flags & ATH_RX_MIC_ERROR)
291 rx_status->flag |= RX_FLAG_MMIC_ERROR;
292 if (status->flags & ATH_RX_FCS_ERROR)
293 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
294
295 rx_status->flag |= RX_FLAG_TSFT;
296}
297
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530298static void ath9k_ht_conf(struct ath_softc *sc,
299 struct ieee80211_bss_conf *bss_conf)
300{
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530301 struct ath_ht_info *ht_info = &sc->sc_ht_info;
302
Johannes Bergae5eb022008-10-14 16:58:37 +0200303 if (sc->hw->conf.ht.enabled) {
304 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530305
Johannes Bergae5eb022008-10-14 16:58:37 +0200306 if (bss_conf->ht.width_40_ok)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530307 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
308 else
309 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
310
311 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530312 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530313}
314
315static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530316 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530317 struct ieee80211_bss_conf *bss_conf)
318{
319 struct ieee80211_hw *hw = sc->hw;
320 struct ieee80211_channel *curchan = hw->conf.channel;
Sujith5640b082008-10-29 10:16:06 +0530321 struct ath_vap *avp = (void *)vif->drv_priv;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530322 int pos;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530323
324 if (bss_conf->assoc) {
325 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
326 __func__,
327 bss_conf->aid);
328
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530329 /* New association, store aid */
330 if (avp->av_opmode == ATH9K_M_STA) {
331 sc->sc_curaid = bss_conf->aid;
332 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
333 sc->sc_curaid);
334 }
335
336 /* Configure the beacon */
337 ath_beacon_config(sc, 0);
338 sc->sc_flags |= SC_OP_BEACONS;
339
340 /* Reset rssi stats */
341 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
342 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
343 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
344 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
345
346 /* Update chainmask */
Johannes Bergae5eb022008-10-14 16:58:37 +0200347 ath_update_chainmask(sc, hw->conf.ht.enabled);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530348
349 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -0700350 "%s: bssid %pM aid 0x%x\n",
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530351 __func__,
Johannes Berge1749612008-10-27 15:59:26 -0700352 sc->sc_curbssid, sc->sc_curaid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530353
354 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
355 __func__,
356 curchan->center_freq);
357
358 pos = ath_get_channel(sc, curchan);
359 if (pos == -1) {
360 DPRINTF(sc, ATH_DBG_FATAL,
361 "%s: Invalid channel\n", __func__);
362 return;
363 }
364
Johannes Bergae5eb022008-10-14 16:58:37 +0200365 if (hw->conf.ht.enabled)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530366 sc->sc_ah->ah_channels[pos].chanmode =
367 ath_get_extchanmode(sc, curchan);
368 else
369 sc->sc_ah->ah_channels[pos].chanmode =
370 (curchan->band == IEEE80211_BAND_2GHZ) ?
371 CHANNEL_G : CHANNEL_A;
372
373 /* set h/w channel */
374 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
375 DPRINTF(sc, ATH_DBG_FATAL,
376 "%s: Unable to set channel\n",
377 __func__);
378
379 ath_rate_newstate(sc, avp);
380 /* Update ratectrl about the new state */
381 ath_rc_node_update(hw, avp->rc_node);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700382
383 /* Start ANI */
384 mod_timer(&sc->sc_ani.timer,
385 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
386
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530387 } else {
388 DPRINTF(sc, ATH_DBG_CONFIG,
389 "%s: Bss Info DISSOC\n", __func__);
390 sc->sc_curaid = 0;
391 }
392}
393
394void ath_get_beaconconfig(struct ath_softc *sc,
395 int if_id,
396 struct ath_beacon_config *conf)
397{
398 struct ieee80211_hw *hw = sc->hw;
399
400 /* fill in beacon config data */
401
402 conf->beacon_interval = hw->conf.beacon_int;
403 conf->listen_interval = 100;
404 conf->dtim_count = 1;
405 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
406}
407
408void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
Sujith528f0c62008-10-29 10:14:26 +0530409 struct ath_xmit_status *tx_status)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530410{
411 struct ieee80211_hw *hw = sc->hw;
412 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
413
414 DPRINTF(sc, ATH_DBG_XMIT,
415 "%s: TX complete: skb: %p\n", __func__, skb);
416
Johannes Berge6a98542008-10-21 12:40:02 +0200417 ieee80211_tx_info_clear_status(tx_info);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530418 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
419 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
Johannes Berge6a98542008-10-21 12:40:02 +0200420 /* free driver's private data area of tx_info, XXX: HACK! */
421 if (tx_info->control.vif != NULL)
422 kfree(tx_info->control.vif);
423 tx_info->control.vif = NULL;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530424 }
425
426 if (tx_status->flags & ATH_TX_BAR) {
427 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
428 tx_status->flags &= ~ATH_TX_BAR;
429 }
430
Johannes Berge6a98542008-10-21 12:40:02 +0200431 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530432 /* Frame was ACKed */
433 tx_info->flags |= IEEE80211_TX_STAT_ACK;
434 }
435
Johannes Berge6a98542008-10-21 12:40:02 +0200436 tx_info->status.rates[0].count = tx_status->retries + 1;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530437
438 ieee80211_tx_status(hw, skb);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530439}
440
441int _ath_rx_indicate(struct ath_softc *sc,
442 struct sk_buff *skb,
443 struct ath_recv_status *status,
444 u16 keyix)
445{
446 struct ieee80211_hw *hw = sc->hw;
447 struct ath_node *an = NULL;
448 struct ieee80211_rx_status rx_status;
449 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
450 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
451 int padsize;
452 enum ATH_RX_TYPE st;
453
454 /* see if any padding is done by the hw and remove it */
455 if (hdrlen & 3) {
456 padsize = hdrlen % 4;
457 memmove(skb->data + padsize, skb->data, hdrlen);
458 skb_pull(skb, padsize);
459 }
460
461 /* Prepare rx status */
462 ath9k_rx_prepare(sc, skb, status, &rx_status);
463
464 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
465 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
466 rx_status.flag |= RX_FLAG_DECRYPTED;
467 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
468 && !(status->flags & ATH_RX_DECRYPT_ERROR)
469 && skb->len >= hdrlen + 4) {
470 keyix = skb->data[hdrlen + 3] >> 6;
471
472 if (test_bit(keyix, sc->sc_keymap))
473 rx_status.flag |= RX_FLAG_DECRYPTED;
474 }
475
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530476 if (an) {
477 ath_rx_input(sc, an,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530478 skb, status, &st);
479 }
480 if (!an || (st != ATH_RX_CONSUMED))
481 __ieee80211_rx(hw, skb, &rx_status);
482
483 return 0;
484}
485
Sujith102e0572008-10-29 10:15:16 +0530486int ath_rx_subframe(struct ath_node *an, struct sk_buff *skb,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530487 struct ath_recv_status *status)
488{
489 struct ath_softc *sc = an->an_sc;
490 struct ieee80211_hw *hw = sc->hw;
491 struct ieee80211_rx_status rx_status;
492
493 /* Prepare rx status */
494 ath9k_rx_prepare(sc, skb, status, &rx_status);
495 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
496 rx_status.flag |= RX_FLAG_DECRYPTED;
497
498 __ieee80211_rx(hw, skb, &rx_status);
499
500 return 0;
501}
502
503/********************************/
504/* LED functions */
505/********************************/
506
507static void ath_led_brightness(struct led_classdev *led_cdev,
508 enum led_brightness brightness)
509{
510 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
511 struct ath_softc *sc = led->sc;
512
513 switch (brightness) {
514 case LED_OFF:
515 if (led->led_type == ATH_LED_ASSOC ||
516 led->led_type == ATH_LED_RADIO)
517 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
518 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
519 (led->led_type == ATH_LED_RADIO) ? 1 :
520 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
521 break;
522 case LED_FULL:
523 if (led->led_type == ATH_LED_ASSOC)
524 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
525 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
526 break;
527 default:
528 break;
529 }
530}
531
532static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
533 char *trigger)
534{
535 int ret;
536
537 led->sc = sc;
538 led->led_cdev.name = led->name;
539 led->led_cdev.default_trigger = trigger;
540 led->led_cdev.brightness_set = ath_led_brightness;
541
542 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
543 if (ret)
544 DPRINTF(sc, ATH_DBG_FATAL,
545 "Failed to register led:%s", led->name);
546 else
547 led->registered = 1;
548 return ret;
549}
550
551static void ath_unregister_led(struct ath_led *led)
552{
553 if (led->registered) {
554 led_classdev_unregister(&led->led_cdev);
555 led->registered = 0;
556 }
557}
558
559static void ath_deinit_leds(struct ath_softc *sc)
560{
561 ath_unregister_led(&sc->assoc_led);
562 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
563 ath_unregister_led(&sc->tx_led);
564 ath_unregister_led(&sc->rx_led);
565 ath_unregister_led(&sc->radio_led);
566 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
567}
568
569static void ath_init_leds(struct ath_softc *sc)
570{
571 char *trigger;
572 int ret;
573
574 /* Configure gpio 1 for output */
575 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
576 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
577 /* LED off, active low */
578 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
579
580 trigger = ieee80211_get_radio_led_name(sc->hw);
581 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
582 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
583 ret = ath_register_led(sc, &sc->radio_led, trigger);
584 sc->radio_led.led_type = ATH_LED_RADIO;
585 if (ret)
586 goto fail;
587
588 trigger = ieee80211_get_assoc_led_name(sc->hw);
589 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
590 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
591 ret = ath_register_led(sc, &sc->assoc_led, trigger);
592 sc->assoc_led.led_type = ATH_LED_ASSOC;
593 if (ret)
594 goto fail;
595
596 trigger = ieee80211_get_tx_led_name(sc->hw);
597 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
598 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
599 ret = ath_register_led(sc, &sc->tx_led, trigger);
600 sc->tx_led.led_type = ATH_LED_TX;
601 if (ret)
602 goto fail;
603
604 trigger = ieee80211_get_rx_led_name(sc->hw);
605 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
606 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
607 ret = ath_register_led(sc, &sc->rx_led, trigger);
608 sc->rx_led.led_type = ATH_LED_RX;
609 if (ret)
610 goto fail;
611
612 return;
613
614fail:
615 ath_deinit_leds(sc);
616}
617
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530618#ifdef CONFIG_RFKILL
Sujith9c84b792008-10-29 10:17:13 +0530619
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530620/*******************/
621/* Rfkill */
622/*******************/
623
624static void ath_radio_enable(struct ath_softc *sc)
625{
626 struct ath_hal *ah = sc->sc_ah;
627 int status;
628
629 spin_lock_bh(&sc->sc_resetlock);
630 if (!ath9k_hw_reset(ah, ah->ah_curchan,
631 sc->sc_ht_info.tx_chan_width,
632 sc->sc_tx_chainmask,
633 sc->sc_rx_chainmask,
634 sc->sc_ht_extprotspacing,
635 false, &status)) {
636 DPRINTF(sc, ATH_DBG_FATAL,
637 "%s: unable to reset channel %u (%uMhz) "
638 "flags 0x%x hal status %u\n", __func__,
639 ath9k_hw_mhz2ieee(ah,
640 ah->ah_curchan->channel,
641 ah->ah_curchan->channelFlags),
642 ah->ah_curchan->channel,
643 ah->ah_curchan->channelFlags, status);
644 }
645 spin_unlock_bh(&sc->sc_resetlock);
646
647 ath_update_txpow(sc);
648 if (ath_startrecv(sc) != 0) {
649 DPRINTF(sc, ATH_DBG_FATAL,
650 "%s: unable to restart recv logic\n", __func__);
651 return;
652 }
653
654 if (sc->sc_flags & SC_OP_BEACONS)
655 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
656
657 /* Re-Enable interrupts */
658 ath9k_hw_set_interrupts(ah, sc->sc_imask);
659
660 /* Enable LED */
661 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
662 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
663 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
664
665 ieee80211_wake_queues(sc->hw);
666}
667
668static void ath_radio_disable(struct ath_softc *sc)
669{
670 struct ath_hal *ah = sc->sc_ah;
671 int status;
672
673
674 ieee80211_stop_queues(sc->hw);
675
676 /* Disable LED */
677 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
678 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
679
680 /* Disable interrupts */
681 ath9k_hw_set_interrupts(ah, 0);
682
683 ath_draintxq(sc, false); /* clear pending tx frames */
684 ath_stoprecv(sc); /* turn off frame recv */
685 ath_flushrecv(sc); /* flush recv queue */
686
687 spin_lock_bh(&sc->sc_resetlock);
688 if (!ath9k_hw_reset(ah, ah->ah_curchan,
689 sc->sc_ht_info.tx_chan_width,
690 sc->sc_tx_chainmask,
691 sc->sc_rx_chainmask,
692 sc->sc_ht_extprotspacing,
693 false, &status)) {
694 DPRINTF(sc, ATH_DBG_FATAL,
695 "%s: unable to reset channel %u (%uMhz) "
696 "flags 0x%x hal status %u\n", __func__,
697 ath9k_hw_mhz2ieee(ah,
698 ah->ah_curchan->channel,
699 ah->ah_curchan->channelFlags),
700 ah->ah_curchan->channel,
701 ah->ah_curchan->channelFlags, status);
702 }
703 spin_unlock_bh(&sc->sc_resetlock);
704
705 ath9k_hw_phy_disable(ah);
706 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
707}
708
709static bool ath_is_rfkill_set(struct ath_softc *sc)
710{
711 struct ath_hal *ah = sc->sc_ah;
712
713 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
714 ah->ah_rfkill_polarity;
715}
716
717/* h/w rfkill poll function */
718static void ath_rfkill_poll(struct work_struct *work)
719{
720 struct ath_softc *sc = container_of(work, struct ath_softc,
721 rf_kill.rfkill_poll.work);
722 bool radio_on;
723
724 if (sc->sc_flags & SC_OP_INVALID)
725 return;
726
727 radio_on = !ath_is_rfkill_set(sc);
728
729 /*
730 * enable/disable radio only when there is a
731 * state change in RF switch
732 */
733 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
734 enum rfkill_state state;
735
736 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
737 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
738 : RFKILL_STATE_HARD_BLOCKED;
739 } else if (radio_on) {
740 ath_radio_enable(sc);
741 state = RFKILL_STATE_UNBLOCKED;
742 } else {
743 ath_radio_disable(sc);
744 state = RFKILL_STATE_HARD_BLOCKED;
745 }
746
747 if (state == RFKILL_STATE_HARD_BLOCKED)
748 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
749 else
750 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
751
752 rfkill_force_state(sc->rf_kill.rfkill, state);
753 }
754
755 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
756 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
757}
758
759/* s/w rfkill handler */
760static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
761{
762 struct ath_softc *sc = data;
763
764 switch (state) {
765 case RFKILL_STATE_SOFT_BLOCKED:
766 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
767 SC_OP_RFKILL_SW_BLOCKED)))
768 ath_radio_disable(sc);
769 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
770 return 0;
771 case RFKILL_STATE_UNBLOCKED:
772 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
773 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
774 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
775 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
776 "radio as it is disabled by h/w \n");
777 return -EPERM;
778 }
779 ath_radio_enable(sc);
780 }
781 return 0;
782 default:
783 return -EINVAL;
784 }
785}
786
787/* Init s/w rfkill */
788static int ath_init_sw_rfkill(struct ath_softc *sc)
789{
790 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
791 RFKILL_TYPE_WLAN);
792 if (!sc->rf_kill.rfkill) {
793 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
794 return -ENOMEM;
795 }
796
797 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
798 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
799 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
800 sc->rf_kill.rfkill->data = sc;
801 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
802 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
803 sc->rf_kill.rfkill->user_claim_unsupported = 1;
804
805 return 0;
806}
807
808/* Deinitialize rfkill */
809static void ath_deinit_rfkill(struct ath_softc *sc)
810{
811 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
812 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
813
814 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
815 rfkill_unregister(sc->rf_kill.rfkill);
816 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
817 sc->rf_kill.rfkill = NULL;
818 }
819}
Sujith9c84b792008-10-29 10:17:13 +0530820
821static int ath_start_rfkill_poll(struct ath_softc *sc)
822{
823 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
824 queue_delayed_work(sc->hw->workqueue,
825 &sc->rf_kill.rfkill_poll, 0);
826
827 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
828 if (rfkill_register(sc->rf_kill.rfkill)) {
829 DPRINTF(sc, ATH_DBG_FATAL,
830 "Unable to register rfkill\n");
831 rfkill_free(sc->rf_kill.rfkill);
832
833 /* Deinitialize the device */
834 if (sc->pdev->irq)
835 free_irq(sc->pdev->irq, sc);
836 ath_detach(sc);
837 pci_iounmap(sc->pdev, sc->mem);
838 pci_release_region(sc->pdev, 0);
839 pci_disable_device(sc->pdev);
840 ieee80211_free_hw(hw);
841 return -EIO;
842 } else {
843 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
844 }
845 }
846
847 return 0;
848}
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530849#endif /* CONFIG_RFKILL */
850
Sujith9c84b792008-10-29 10:17:13 +0530851static void ath_detach(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530852{
853 struct ieee80211_hw *hw = sc->hw;
Sujith9c84b792008-10-29 10:17:13 +0530854 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530855
856 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
857
Sujith9c84b792008-10-29 10:17:13 +0530858 ieee80211_unregister_hw(hw);
859
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530860 ath_deinit_leds(sc);
861
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530862#ifdef CONFIG_RFKILL
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530863 ath_deinit_rfkill(sc);
864#endif
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530865 ath_rate_control_unregister();
Sujith9c84b792008-10-29 10:17:13 +0530866 ath_rate_detach(sc->sc_rc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530867
868 ath_rx_cleanup(sc);
869 ath_tx_cleanup(sc);
870
Sujith9c84b792008-10-29 10:17:13 +0530871 tasklet_kill(&sc->intr_tq);
872 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530873
Sujith9c84b792008-10-29 10:17:13 +0530874 if (!(sc->sc_flags & SC_OP_INVALID))
875 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530876
Sujith9c84b792008-10-29 10:17:13 +0530877 /* cleanup tx queues */
878 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
879 if (ATH_TXQ_SETUP(sc, i))
880 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
881
882 ath9k_hw_detach(sc->sc_ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530883}
884
Sujith9c84b792008-10-29 10:17:13 +0530885static int ath_attach(u16 devid, struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530886{
887 struct ieee80211_hw *hw = sc->hw;
888 int error = 0;
889
890 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
891
892 error = ath_init(devid, sc);
893 if (error != 0)
894 return error;
895
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530896 /* get mac address from hardware and set in mac80211 */
897
898 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
899
Sujith9c84b792008-10-29 10:17:13 +0530900 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
901 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
902 IEEE80211_HW_SIGNAL_DBM |
903 IEEE80211_HW_AMPDU_AGGREGATION;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530904
Sujith9c84b792008-10-29 10:17:13 +0530905 hw->wiphy->interface_modes =
906 BIT(NL80211_IFTYPE_AP) |
907 BIT(NL80211_IFTYPE_STATION) |
908 BIT(NL80211_IFTYPE_ADHOC);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530909
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530910 hw->queues = 4;
Sujith528f0c62008-10-29 10:14:26 +0530911 hw->sta_data_size = sizeof(struct ath_node);
Sujith5640b082008-10-29 10:16:06 +0530912 hw->vif_data_size = sizeof(struct ath_vap);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530913
914 /* Register rate control */
915 hw->rate_control_algorithm = "ath9k_rate_control";
916 error = ath_rate_control_register();
917 if (error != 0) {
918 DPRINTF(sc, ATH_DBG_FATAL,
919 "%s: Unable to register rate control "
920 "algorithm:%d\n", __func__, error);
921 ath_rate_control_unregister();
922 goto bad;
923 }
924
Sujith9c84b792008-10-29 10:17:13 +0530925 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
926 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
927 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
928 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
929 }
930
931 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
932 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
933 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
934 &sc->sbands[IEEE80211_BAND_5GHZ];
935
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530936 error = ieee80211_register_hw(hw);
937 if (error != 0) {
938 ath_rate_control_unregister();
939 goto bad;
940 }
941
942 /* Initialize LED control */
943 ath_init_leds(sc);
944
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530945#ifdef CONFIG_RFKILL
946 /* Initialze h/w Rfkill */
947 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
948 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
949
950 /* Initialize s/w rfkill */
951 if (ath_init_sw_rfkill(sc))
952 goto detach;
953#endif
954
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530955 /* initialize tx/rx engine */
956
957 error = ath_tx_init(sc, ATH_TXBUF);
958 if (error != 0)
959 goto detach;
960
961 error = ath_rx_init(sc, ATH_RXBUF);
962 if (error != 0)
963 goto detach;
964
965 return 0;
966detach:
967 ath_detach(sc);
968bad:
969 return error;
970}
971
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700972static int ath9k_start(struct ieee80211_hw *hw)
973{
974 struct ath_softc *sc = hw->priv;
975 struct ieee80211_channel *curchan = hw->conf.channel;
976 int error = 0, pos;
977
978 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
979 "initial channel: %d MHz\n", __func__, curchan->center_freq);
980
Sujith7f959032008-10-29 10:18:39 +0530981 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
982
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700983 /* setup initial channel */
984
985 pos = ath_get_channel(sc, curchan);
986 if (pos == -1) {
987 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530988 error = -EINVAL;
989 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700990 }
991
992 sc->sc_ah->ah_channels[pos].chanmode =
993 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
994
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700995 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
996 if (error) {
997 DPRINTF(sc, ATH_DBG_FATAL,
998 "%s: Unable to complete ath_open\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530999 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001000 }
1001
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301002#ifdef CONFIG_RFKILL
Sujith9c84b792008-10-29 10:17:13 +05301003 error = ath_start_rfkill_poll(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301004#endif
1005
Sujith9c84b792008-10-29 10:17:13 +05301006exit:
1007 return error;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001008}
1009
1010static int ath9k_tx(struct ieee80211_hw *hw,
1011 struct sk_buff *skb)
1012{
Jouni Malinen147583c2008-08-11 14:01:50 +03001013 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Sujith528f0c62008-10-29 10:14:26 +05301014 struct ath_softc *sc = hw->priv;
1015 struct ath_tx_control txctl;
1016 int hdrlen, padsize;
1017
1018 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +03001019
1020 /*
1021 * As a temporary workaround, assign seq# here; this will likely need
1022 * to be cleaned up to work better with Beacon transmission and virtual
1023 * BSSes.
1024 */
1025 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1026 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1027 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1028 sc->seq_no += 0x10;
1029 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1030 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1031 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001032
1033 /* Add the padding after the header if this is not already done */
1034 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1035 if (hdrlen & 3) {
1036 padsize = hdrlen % 4;
1037 if (skb_headroom(skb) < padsize)
1038 return -1;
1039 skb_push(skb, padsize);
1040 memmove(skb->data, skb->data + padsize, hdrlen);
1041 }
1042
Sujith528f0c62008-10-29 10:14:26 +05301043 /* Check if a tx queue is available */
1044
1045 txctl.txq = ath_test_get_txq(sc, skb);
1046 if (!txctl.txq)
1047 goto exit;
1048
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001049 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1050 __func__,
1051 skb);
1052
Sujith528f0c62008-10-29 10:14:26 +05301053 if (ath_tx_start(sc, skb, &txctl) != 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001054 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
Sujith528f0c62008-10-29 10:14:26 +05301055 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001056 }
1057
1058 return 0;
Sujith528f0c62008-10-29 10:14:26 +05301059exit:
1060 dev_kfree_skb_any(skb);
1061 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001062}
1063
1064static void ath9k_stop(struct ieee80211_hw *hw)
1065{
1066 struct ath_softc *sc = hw->priv;
Sujith9c84b792008-10-29 10:17:13 +05301067
1068 if (sc->sc_flags & SC_OP_INVALID) {
1069 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
1070 return;
1071 }
1072
1073 ath_stop(sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001074
1075 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001076}
1077
1078static int ath9k_add_interface(struct ieee80211_hw *hw,
1079 struct ieee80211_if_init_conf *conf)
1080{
1081 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301082 struct ath_vap *avp = (void *)conf->vif->drv_priv;
1083 int ic_opmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001084
1085 /* Support only vap for now */
1086
1087 if (sc->sc_nvaps)
1088 return -ENOBUFS;
1089
1090 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001091 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001092 ic_opmode = ATH9K_M_STA;
1093 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001094 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001095 ic_opmode = ATH9K_M_IBSS;
1096 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02001097 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001098 ic_opmode = ATH9K_M_HOSTAP;
1099 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001100 default:
1101 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001102 "%s: Interface type %d not yet supported\n",
1103 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001104 return -EOPNOTSUPP;
1105 }
1106
1107 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1108 __func__,
1109 ic_opmode);
1110
Sujith5640b082008-10-29 10:16:06 +05301111 /* Set the VAP opmode */
1112 avp->av_opmode = ic_opmode;
1113 avp->av_bslot = -1;
1114
1115 if (ic_opmode == ATH9K_M_HOSTAP)
1116 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1117
1118 sc->sc_vaps[0] = conf->vif;
1119 sc->sc_nvaps++;
1120
1121 /* Set the device opmode */
1122 sc->sc_ah->ah_opmode = ic_opmode;
1123
1124 /* default VAP configuration */
1125 avp->av_config.av_fixed_rateset = IEEE80211_FIXED_RATE_NONE;
1126 avp->av_config.av_fixed_retryset = 0x03030303;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001127
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001128 if (conf->type == NL80211_IFTYPE_AP) {
1129 /* TODO: is this a suitable place to start ANI for AP mode? */
1130 /* Start ANI */
1131 mod_timer(&sc->sc_ani.timer,
1132 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1133 }
1134
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001135 return 0;
1136}
1137
1138static void ath9k_remove_interface(struct ieee80211_hw *hw,
1139 struct ieee80211_if_init_conf *conf)
1140{
1141 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301142 struct ath_vap *avp = (void *)conf->vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001143
1144 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1145
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001146#ifdef CONFIG_SLOW_ANT_DIV
1147 ath_slow_ant_div_stop(&sc->sc_antdiv);
1148#endif
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001149 /* Stop ANI */
1150 del_timer_sync(&sc->sc_ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001151
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001152 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301153 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1154 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001155 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1156 ath_beacon_return(sc, avp);
1157 }
1158
Sujith672840a2008-08-11 14:05:08 +05301159 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001160
Sujith5640b082008-10-29 10:16:06 +05301161 sc->sc_vaps[0] = NULL;
1162 sc->sc_nvaps--;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001163}
1164
Johannes Berge8975582008-10-09 12:18:51 +02001165static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001166{
1167 struct ath_softc *sc = hw->priv;
1168 struct ieee80211_channel *curchan = hw->conf.channel;
Johannes Berge8975582008-10-09 12:18:51 +02001169 struct ieee80211_conf *conf = &hw->conf;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001170 int pos;
1171
1172 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1173 __func__,
1174 curchan->center_freq);
1175
Johannes Bergae5eb022008-10-14 16:58:37 +02001176 /* Update chainmask */
1177 ath_update_chainmask(sc, conf->ht.enabled);
1178
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001179 pos = ath_get_channel(sc, curchan);
1180 if (pos == -1) {
1181 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1182 return -EINVAL;
1183 }
1184
1185 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301186 (curchan->band == IEEE80211_BAND_2GHZ) ?
1187 CHANNEL_G : CHANNEL_A;
1188
Johannes Bergae5eb022008-10-14 16:58:37 +02001189 if (sc->sc_curaid && hw->conf.ht.enabled)
Sujith86b89ee2008-08-07 10:54:57 +05301190 sc->sc_ah->ah_channels[pos].chanmode =
1191 ath_get_extchanmode(sc, curchan);
1192
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07001193 if (changed & IEEE80211_CONF_CHANGE_POWER)
1194 sc->sc_config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001195
1196 /* set h/w channel */
1197 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1198 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1199 __func__);
1200
1201 return 0;
1202}
1203
1204static int ath9k_config_interface(struct ieee80211_hw *hw,
1205 struct ieee80211_vif *vif,
1206 struct ieee80211_if_conf *conf)
1207{
1208 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001209 struct ath_hal *ah = sc->sc_ah;
Sujith5640b082008-10-29 10:16:06 +05301210 struct ath_vap *avp = (void *)vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001211 u32 rfilt = 0;
1212 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001213
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001214 /* TODO: Need to decide which hw opmode to use for multi-interface
1215 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001216 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001217 ah->ah_opmode != ATH9K_M_HOSTAP) {
1218 ah->ah_opmode = ATH9K_M_HOSTAP;
1219 ath9k_hw_setopmode(ah);
1220 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1221 /* Request full reset to get hw opmode changed properly */
1222 sc->sc_flags |= SC_OP_FULL_RESET;
1223 }
1224
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001225 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1226 !is_zero_ether_addr(conf->bssid)) {
1227 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001228 case NL80211_IFTYPE_STATION:
1229 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001230 /* Update ratectrl about the new state */
1231 ath_rate_newstate(sc, avp);
1232
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001233 /* Set BSSID */
1234 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1235 sc->sc_curaid = 0;
1236 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1237 sc->sc_curaid);
1238
1239 /* Set aggregation protection mode parameters */
1240 sc->sc_config.ath_aggr_prot = 0;
1241
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001242 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -07001243 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001244 __func__, rfilt,
Johannes Berge1749612008-10-27 15:59:26 -07001245 sc->sc_curbssid, sc->sc_curaid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001246
1247 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301248 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001249
1250 break;
1251 default:
1252 break;
1253 }
1254 }
1255
1256 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001257 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1258 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001259 /*
1260 * Allocate and setup the beacon frame.
1261 *
1262 * Stop any previous beacon DMA. This may be
1263 * necessary, for example, when an ibss merge
1264 * causes reconfiguration; we may be called
1265 * with beacon transmission active.
1266 */
1267 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1268
1269 error = ath_beacon_alloc(sc, 0);
1270 if (error != 0)
1271 return error;
1272
1273 ath_beacon_sync(sc, 0);
1274 }
1275
1276 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Sujith5640b082008-10-29 10:16:06 +05301277 if ((avp->av_opmode != ATH9K_M_STA)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001278 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1279 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1280 ath9k_hw_keysetmac(sc->sc_ah,
1281 (u16)i,
1282 sc->sc_curbssid);
1283 }
1284
1285 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001286 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001287 ath_update_chainmask(sc, 0);
1288
1289 return 0;
1290}
1291
1292#define SUPPORTED_FILTERS \
1293 (FIF_PROMISC_IN_BSS | \
1294 FIF_ALLMULTI | \
1295 FIF_CONTROL | \
1296 FIF_OTHER_BSS | \
1297 FIF_BCN_PRBRESP_PROMISC | \
1298 FIF_FCSFAIL)
1299
Sujith7dcfdcd2008-08-11 14:03:13 +05301300/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001301static void ath9k_configure_filter(struct ieee80211_hw *hw,
1302 unsigned int changed_flags,
1303 unsigned int *total_flags,
1304 int mc_count,
1305 struct dev_mc_list *mclist)
1306{
1307 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301308 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001309
1310 changed_flags &= SUPPORTED_FILTERS;
1311 *total_flags &= SUPPORTED_FILTERS;
1312
Sujith7dcfdcd2008-08-11 14:03:13 +05301313 sc->rx_filter = *total_flags;
1314 rfilt = ath_calcrxfilter(sc);
1315 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1316
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001317 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1318 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301319 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001320 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301321
1322 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1323 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001324}
1325
1326static void ath9k_sta_notify(struct ieee80211_hw *hw,
1327 struct ieee80211_vif *vif,
1328 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001329 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001330{
1331 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001332
1333 switch (cmd) {
1334 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05301335 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001336 break;
1337 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05301338 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001339 break;
1340 default:
1341 break;
1342 }
1343}
1344
1345static int ath9k_conf_tx(struct ieee80211_hw *hw,
1346 u16 queue,
1347 const struct ieee80211_tx_queue_params *params)
1348{
1349 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301350 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001351 int ret = 0, qnum;
1352
1353 if (queue >= WME_NUM_AC)
1354 return 0;
1355
1356 qi.tqi_aifs = params->aifs;
1357 qi.tqi_cwmin = params->cw_min;
1358 qi.tqi_cwmax = params->cw_max;
1359 qi.tqi_burstTime = params->txop;
1360 qnum = ath_get_hal_qnum(queue, sc);
1361
1362 DPRINTF(sc, ATH_DBG_CONFIG,
1363 "%s: Configure tx [queue/halq] [%d/%d], "
1364 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1365 __func__,
1366 queue,
1367 qnum,
1368 params->aifs,
1369 params->cw_min,
1370 params->cw_max,
1371 params->txop);
1372
1373 ret = ath_txq_update(sc, qnum, &qi);
1374 if (ret)
1375 DPRINTF(sc, ATH_DBG_FATAL,
1376 "%s: TXQ Update failed\n", __func__);
1377
1378 return ret;
1379}
1380
1381static int ath9k_set_key(struct ieee80211_hw *hw,
1382 enum set_key_cmd cmd,
1383 const u8 *local_addr,
1384 const u8 *addr,
1385 struct ieee80211_key_conf *key)
1386{
1387 struct ath_softc *sc = hw->priv;
1388 int ret = 0;
1389
1390 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1391
1392 switch (cmd) {
1393 case SET_KEY:
1394 ret = ath_key_config(sc, addr, key);
1395 if (!ret) {
1396 set_bit(key->keyidx, sc->sc_keymap);
1397 key->hw_key_idx = key->keyidx;
1398 /* push IV and Michael MIC generation to stack */
1399 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301400 if (key->alg == ALG_TKIP)
1401 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001402 }
1403 break;
1404 case DISABLE_KEY:
1405 ath_key_delete(sc, key);
1406 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001407 break;
1408 default:
1409 ret = -EINVAL;
1410 }
1411
1412 return ret;
1413}
1414
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001415static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1416 struct ieee80211_vif *vif,
1417 struct ieee80211_bss_conf *bss_conf,
1418 u32 changed)
1419{
1420 struct ath_softc *sc = hw->priv;
1421
1422 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1423 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1424 __func__,
1425 bss_conf->use_short_preamble);
1426 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301427 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001428 else
Sujith672840a2008-08-11 14:05:08 +05301429 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001430 }
1431
1432 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1433 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1434 __func__,
1435 bss_conf->use_cts_prot);
1436 if (bss_conf->use_cts_prot &&
1437 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301438 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001439 else
Sujith672840a2008-08-11 14:05:08 +05301440 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001441 }
1442
1443 if (changed & BSS_CHANGED_HT) {
Johannes Bergae5eb022008-10-14 16:58:37 +02001444 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1445 __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001446 ath9k_ht_conf(sc, bss_conf);
1447 }
1448
1449 if (changed & BSS_CHANGED_ASSOC) {
1450 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1451 __func__,
1452 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05301453 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001454 }
1455}
1456
1457static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1458{
1459 u64 tsf;
1460 struct ath_softc *sc = hw->priv;
1461 struct ath_hal *ah = sc->sc_ah;
1462
1463 tsf = ath9k_hw_gettsf64(ah);
1464
1465 return tsf;
1466}
1467
1468static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1469{
1470 struct ath_softc *sc = hw->priv;
1471 struct ath_hal *ah = sc->sc_ah;
1472
1473 ath9k_hw_reset_tsf(ah);
1474}
1475
1476static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1477 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001478 struct ieee80211_sta *sta,
1479 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001480{
1481 struct ath_softc *sc = hw->priv;
1482 int ret = 0;
1483
1484 switch (action) {
1485 case IEEE80211_AMPDU_RX_START:
Sujithb5aa9bf2008-10-29 10:13:31 +05301486 ret = ath_rx_aggr_start(sc, sta, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001487 if (ret < 0)
1488 DPRINTF(sc, ATH_DBG_FATAL,
1489 "%s: Unable to start RX aggregation\n",
1490 __func__);
1491 break;
1492 case IEEE80211_AMPDU_RX_STOP:
Sujithb5aa9bf2008-10-29 10:13:31 +05301493 ret = ath_rx_aggr_stop(sc, sta, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001494 if (ret < 0)
1495 DPRINTF(sc, ATH_DBG_FATAL,
1496 "%s: Unable to stop RX aggregation\n",
1497 __func__);
1498 break;
1499 case IEEE80211_AMPDU_TX_START:
Sujithb5aa9bf2008-10-29 10:13:31 +05301500 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001501 if (ret < 0)
1502 DPRINTF(sc, ATH_DBG_FATAL,
1503 "%s: Unable to start TX aggregation\n",
1504 __func__);
1505 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001506 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001507 break;
1508 case IEEE80211_AMPDU_TX_STOP:
Sujithb5aa9bf2008-10-29 10:13:31 +05301509 ret = ath_tx_aggr_stop(sc, sta, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001510 if (ret < 0)
1511 DPRINTF(sc, ATH_DBG_FATAL,
1512 "%s: Unable to stop TX aggregation\n",
1513 __func__);
1514
Johannes Berg17741cd2008-09-11 00:02:02 +02001515 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001516 break;
1517 default:
1518 DPRINTF(sc, ATH_DBG_FATAL,
1519 "%s: Unknown AMPDU action\n", __func__);
1520 }
1521
1522 return ret;
1523}
1524
Johannes Berg4233df62008-10-13 13:35:05 +02001525static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1526{
1527 return -EOPNOTSUPP;
1528}
1529
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001530static struct ieee80211_ops ath9k_ops = {
1531 .tx = ath9k_tx,
1532 .start = ath9k_start,
1533 .stop = ath9k_stop,
1534 .add_interface = ath9k_add_interface,
1535 .remove_interface = ath9k_remove_interface,
1536 .config = ath9k_config,
1537 .config_interface = ath9k_config_interface,
1538 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001539 .sta_notify = ath9k_sta_notify,
1540 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001541 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001542 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001543 .get_tsf = ath9k_get_tsf,
1544 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02001545 .ampdu_action = ath9k_ampdu_action,
1546 .set_frag_threshold = ath9k_no_fragmentation,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001547};
1548
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001549static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1550{
1551 void __iomem *mem;
1552 struct ath_softc *sc;
1553 struct ieee80211_hw *hw;
1554 const char *athname;
1555 u8 csz;
1556 u32 val;
1557 int ret = 0;
1558
1559 if (pci_enable_device(pdev))
1560 return -EIO;
1561
1562 /* XXX 32-bit addressing only */
1563 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1564 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1565 ret = -ENODEV;
1566 goto bad;
1567 }
1568
1569 /*
1570 * Cache line size is used to size and align various
1571 * structures used to communicate with the hardware.
1572 */
1573 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1574 if (csz == 0) {
1575 /*
1576 * Linux 2.4.18 (at least) writes the cache line size
1577 * register as a 16-bit wide register which is wrong.
1578 * We must have this setup properly for rx buffer
1579 * DMA to work so force a reasonable value here if it
1580 * comes up zero.
1581 */
1582 csz = L1_CACHE_BYTES / sizeof(u32);
1583 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1584 }
1585 /*
1586 * The default setting of latency timer yields poor results,
1587 * set it to the value used by other systems. It may be worth
1588 * tweaking this setting more.
1589 */
1590 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1591
1592 pci_set_master(pdev);
1593
1594 /*
1595 * Disable the RETRY_TIMEOUT register (0x41) to keep
1596 * PCI Tx retries from interfering with C3 CPU state.
1597 */
1598 pci_read_config_dword(pdev, 0x40, &val);
1599 if ((val & 0x0000ff00) != 0)
1600 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1601
1602 ret = pci_request_region(pdev, 0, "ath9k");
1603 if (ret) {
1604 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1605 ret = -ENODEV;
1606 goto bad;
1607 }
1608
1609 mem = pci_iomap(pdev, 0, 0);
1610 if (!mem) {
1611 printk(KERN_ERR "PCI memory map error\n") ;
1612 ret = -EIO;
1613 goto bad1;
1614 }
1615
1616 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1617 if (hw == NULL) {
1618 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1619 goto bad2;
1620 }
1621
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001622 SET_IEEE80211_DEV(hw, &pdev->dev);
1623 pci_set_drvdata(pdev, hw);
1624
1625 sc = hw->priv;
1626 sc->hw = hw;
1627 sc->pdev = pdev;
1628 sc->mem = mem;
1629
1630 if (ath_attach(id->device, sc) != 0) {
1631 ret = -ENODEV;
1632 goto bad3;
1633 }
1634
1635 /* setup interrupt service routine */
1636
1637 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1638 printk(KERN_ERR "%s: request_irq failed\n",
1639 wiphy_name(hw->wiphy));
1640 ret = -EIO;
1641 goto bad4;
1642 }
1643
1644 athname = ath9k_hw_probe(id->vendor, id->device);
1645
1646 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1647 wiphy_name(hw->wiphy),
1648 athname ? athname : "Atheros ???",
1649 (unsigned long)mem, pdev->irq);
1650
1651 return 0;
1652bad4:
1653 ath_detach(sc);
1654bad3:
1655 ieee80211_free_hw(hw);
1656bad2:
1657 pci_iounmap(pdev, mem);
1658bad1:
1659 pci_release_region(pdev, 0);
1660bad:
1661 pci_disable_device(pdev);
1662 return ret;
1663}
1664
1665static void ath_pci_remove(struct pci_dev *pdev)
1666{
1667 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1668 struct ath_softc *sc = hw->priv;
1669
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001670 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +05301671 if (pdev->irq)
1672 free_irq(pdev->irq, sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001673 pci_iounmap(pdev, sc->mem);
1674 pci_release_region(pdev, 0);
1675 pci_disable_device(pdev);
1676 ieee80211_free_hw(hw);
1677}
1678
1679#ifdef CONFIG_PM
1680
1681static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1682{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301683 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1684 struct ath_softc *sc = hw->priv;
1685
1686 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301687
1688#ifdef CONFIG_RFKILL
1689 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1690 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1691#endif
1692
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001693 pci_save_state(pdev);
1694 pci_disable_device(pdev);
1695 pci_set_power_state(pdev, 3);
1696
1697 return 0;
1698}
1699
1700static int ath_pci_resume(struct pci_dev *pdev)
1701{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301702 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1703 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001704 u32 val;
1705 int err;
1706
1707 err = pci_enable_device(pdev);
1708 if (err)
1709 return err;
1710 pci_restore_state(pdev);
1711 /*
1712 * Suspend/Resume resets the PCI configuration space, so we have to
1713 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1714 * PCI Tx retries from interfering with C3 CPU state
1715 */
1716 pci_read_config_dword(pdev, 0x40, &val);
1717 if ((val & 0x0000ff00) != 0)
1718 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1719
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301720 /* Enable LED */
1721 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1722 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1723 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1724
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301725#ifdef CONFIG_RFKILL
1726 /*
1727 * check the h/w rfkill state on resume
1728 * and start the rfkill poll timer
1729 */
1730 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1731 queue_delayed_work(sc->hw->workqueue,
1732 &sc->rf_kill.rfkill_poll, 0);
1733#endif
1734
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001735 return 0;
1736}
1737
1738#endif /* CONFIG_PM */
1739
1740MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1741
1742static struct pci_driver ath_pci_driver = {
1743 .name = "ath9k",
1744 .id_table = ath_pci_id_table,
1745 .probe = ath_pci_probe,
1746 .remove = ath_pci_remove,
1747#ifdef CONFIG_PM
1748 .suspend = ath_pci_suspend,
1749 .resume = ath_pci_resume,
1750#endif /* CONFIG_PM */
1751};
1752
1753static int __init init_ath_pci(void)
1754{
1755 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1756
1757 if (pci_register_driver(&ath_pci_driver) < 0) {
1758 printk(KERN_ERR
1759 "ath_pci: No devices found, driver not installed.\n");
1760 pci_unregister_driver(&ath_pci_driver);
1761 return -ENODEV;
1762 }
1763
1764 return 0;
1765}
1766module_init(init_ath_pci);
1767
1768static void __exit exit_ath_pci(void)
1769{
1770 pci_unregister_driver(&ath_pci_driver);
1771 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1772}
1773module_exit(exit_ath_pci);