blob: 947364c15f69b1b8bc0c2a865c1d46a47b435479 [file] [log] [blame]
Pushkar Joshi70210812012-12-15 19:01:39 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Rohit Vaswani3fc60342012-04-23 18:55:15 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
Rohit Vaswani3fc60342012-04-23 18:55:15 -070013/include/ "skeleton.dtsi"
14
15/ {
16 model = "Qualcomm MSM 9625";
17 compatible = "qcom,msm9625";
18 interrupt-parent = <&intc>;
19
Gilad Avidov0697ea62013-02-11 16:46:38 -070020 aliases {
21 spi0 = &spi_0;
22 };
23
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070024 soc: soc { };
25};
26
27/include/ "msm9625-ion.dtsi"
28/include/ "msm9625-pm.dtsi"
29/include/ "msm9625-coresight.dtsi"
30/include/ "msm9625-smp2p.dtsi"
31
32&soc {
33 #address-cells = <1>;
34 #size-cells = <1>;
35 ranges;
36
Rohit Vaswani3fc60342012-04-23 18:55:15 -070037 intc: interrupt-controller@F9000000 {
38 compatible = "qcom,msm-qgic2";
39 interrupt-controller;
40 #interrupt-cells = <3>;
41 reg = <0xF9000000 0x1000>,
42 <0xF9002000 0x1000>;
43 };
44
Abhimanyu Kapur490d20c2012-06-22 17:34:20 -070045 l2: cache-controller@f9040000 {
46 compatible = "arm,pl310-cache";
47 reg = <0xf9040000 0x1000>;
Abhimanyu Kapur490d20c2012-06-22 17:34:20 -070048 cache-unified;
49 cache-level = <2>;
50 };
51
Rohit Vaswani3fc60342012-04-23 18:55:15 -070052 msmgpio: gpio@fd510000 {
53 compatible = "qcom,msm-gpio";
Rohit Vaswanib1cc4932012-07-23 21:30:11 -070054 gpio-controller;
55 #gpio-cells = <2>;
Rohit Vaswani3fc60342012-04-23 18:55:15 -070056 interrupt-controller;
57 #interrupt-cells = <2>;
58 reg = <0xfd510000 0x4000>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080059 ngpio = <76>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080060 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080061 qcom,direct-connect-irqs = <8>;
Rohit Vaswani3fc60342012-04-23 18:55:15 -070062 };
63
Abhimanyu Kapur28d0e102013-03-08 19:52:14 -080064 qcom,mpm2-sleep-counter@fc4a3000 {
65 compatible = "qcom,mpm2-sleep-counter";
66 reg = <0xfc4a3000 0x1000>;
67 clock-frequency = <32768>;
68 };
69
Stephen Boyda3e219f2013-04-10 14:06:56 -070070 timer@f9020000 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74 compatible = "arm,armv7-timer-mem";
75 reg = <0xf9020000 0x1000>;
76 clock-frequency = <19200000>;
77
78 frame@f9021000 {
79 frame-number = <0>;
80 interrupts = <0 7 0x4>,
81 <0 6 0x4>;
82 reg = <0xf9021000 0x1000>,
83 <0xf9022000 0x1000>;
84 };
85
86 frame@f9023000 {
87 frame-number = <1>;
88 interrupts = <0 8 0x4>;
89 reg = <0xf9023000 0x1000>;
90 status = "disabled";
91 };
92
93 frame@f9024000 {
94 frame-number = <2>;
95 interrupts = <0 9 0x4>;
96 reg = <0xf9024000 0x1000>;
97 status = "disabled";
98 };
99
100 frame@f9025000 {
101 frame-number = <3>;
102 interrupts = <0 10 0x4>;
103 reg = <0xf9025000 0x1000>;
104 status = "disabled";
105 };
106
107 frame@f9026000 {
108 frame-number = <4>;
109 interrupts = <0 11 0x4>;
110 reg = <0xf9026000 0x1000>;
111 status = "disabled";
112 };
113
114 frame@f9027000 {
115 frame-number = <5>;
116 interrupts = <0 12 0x4>;
117 reg = <0xf9027000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9028000 {
122 frame-number = <6>;
123 interrupts = <0 13 0x4>;
124 reg = <0xf9028000 0x1000>;
125 status = "disabled";
126 };
127
128 frame@f9029000 {
129 frame-number = <7>;
130 interrupts = <0 14 0x4>;
131 reg = <0xf9029000 0x1000>;
132 status = "disabled";
133 };
134 };
135
Yan He3cb97ba2012-05-13 16:45:24 -0700136 qcom,sps@f9980000 {
137 compatible = "qcom,msm_sps";
138 reg = <0xf9984000 0x15000>,
139 <0xf9999000 0xb000>,
Yan He6f9ae712012-09-20 12:55:47 -0700140 <0xfe803000 0x4800>;
Yan He3cb97ba2012-05-13 16:45:24 -0700141 interrupts = <0 94 0>;
142 qcom,device-type = <2>;
143 };
144
Jin Hong8d328582012-05-01 15:45:29 -0700145 serial@f991f000 {
146 compatible = "qcom,msm-lsuart-v14";
147 reg = <0xf991f000 0x1000>;
148 interrupts = <0 109 0>;
149 };
Sahitya Tummala9ba4b282012-06-19 11:41:51 +0530150
Jack Phama01e9c12012-09-25 21:37:03 -0700151 usb@f9a55000 {
152 compatible = "qcom,hsusb-otg";
153 reg = <0xf9a55000 0x400>;
154 interrupts = <0 134 0 0 140 0>;
155 interrupt-names = "core_irq", "async_irq";
156 HSUSB_VDDCX-supply = <&pm8019_l12>;
157 HSUSB_1p8-supply = <&pm8019_l2>;
158 HSUSB_3p3-supply = <&pm8019_l4>;
David Collins84d39b22012-11-01 14:40:08 -0700159 vbus_otg-supply = <&usb_vbus>;
Jack Phama01e9c12012-09-25 21:37:03 -0700160
161 qcom,hsusb-otg-phy-type = <2>;
Amit Blay0d353532013-01-22 18:09:51 +0200162 qcom,hsusb-otg-mode = <3>;
Jack Phama01e9c12012-09-25 21:37:03 -0700163 qcom,hsusb-otg-otg-control = <1>;
164 qcom,hsusb-otg-disable-reset;
Ido Shayevitz9f953c12013-01-13 13:36:30 +0200165 qcom,hsusb-otg-lpm-on-dev-suspend;
Ido Shayevitz0f2942d2013-01-13 13:59:48 +0200166 qcom,hsusb-otg-clk-always-on-workaround;
Lena Salmanabde35d2013-04-25 15:29:43 +0300167 qcom,hsusb-otg-delay-lpm-hndshk-on-disconnect;
Ido Shayevitz57101762013-01-18 10:06:24 +0200168
169 qcom,msm-bus,name = "usb2";
170 qcom,msm-bus,num-cases = <2>;
Ido Shayevitz57101762013-01-18 10:06:24 +0200171 qcom,msm-bus,num-paths = <1>;
172 qcom,msm-bus,vectors-KBps =
173 <87 512 0 0>,
174 <87 512 40000 640000>;
Jack Phama01e9c12012-09-25 21:37:03 -0700175 };
176
Manu Gautam3c598392013-03-22 16:59:10 +0530177 hsic_host: hsic@f9a15000 {
Ofir Cohenb1d52612012-11-14 09:37:38 +0200178 compatible = "qcom,hsic-host";
179 reg = <0xf9a15000 0x400>;
Ido Shayevitzfafb1b12013-02-18 18:10:05 +0200180 interrupts = <0 136 0>, <0 148 0>;
181 interrupt-names = "core_irq", "async_irq";
Ofir Cohenb1d52612012-11-14 09:37:38 +0200182 HSIC_VDDCX-supply = <&pm8019_l12>;
183 HSIC_GDSC-supply = <&gdsc_usb_hsic>;
Ido Shayevitz57101762013-01-18 10:06:24 +0200184
185 qcom,msm-bus,name = "hsic";
186 qcom,msm-bus,num-cases = <2>;
Ido Shayevitz57101762013-01-18 10:06:24 +0200187 qcom,msm-bus,num-paths = <1>;
188 qcom,msm-bus,vectors-KBps =
189 <85 512 0 0>,
190 <85 512 40000 640000>;
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200191 qcom,pool-64-bit-align;
192 qcom,enable-hbm;
Ido Shayevitzdd664972013-04-28 20:08:50 +0300193 hsic,consider-ipa-handshake;
Amit Blay4be8e1a2013-05-28 09:51:07 +0300194 qcom,ahb-async-bridge-bypass;
Ofir Cohenb1d52612012-11-14 09:37:38 +0200195 };
196
Jack Phamd61ff562012-11-21 19:25:53 +0200197 qcom,usbbam@f9a44000 {
198 compatible = "qcom,usb-bam-msm";
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200199 reg = <0xf9a44000 0x11000>,
200 <0xf9a04000 0x11000>;
201 reg-names = "hsusb", "hsic";
202 interrupts = <0 135 0 0 255 0>;
203 interrupt-names = "hsusb", "hsic";
Jack Phamd61ff562012-11-21 19:25:53 +0200204 qcom,usb-bam-num-pipes = <16>;
205 qcom,ignore-core-reset-ack;
repo syncb0ca7512013-01-16 19:37:44 +0200206 qcom,disable-clk-gating;
Jack Phamd61ff562012-11-21 19:25:53 +0200207
208 qcom,pipe0 {
Shimrit Malichidbf43d72013-03-16 03:32:27 +0200209 label = "hsusb-ipa-out-0";
Lena Salman192db732013-03-19 14:43:52 +0200210 qcom,usb-bam-mem-type = <2>;
Shimrit Malichidbf43d72013-03-16 03:32:27 +0200211 qcom,bam-type = <1>;
212 qcom,dir = <0>;
213 qcom,pipe-num = <0>;
214 qcom,peer-bam = <2>;
Jack Phamd61ff562012-11-21 19:25:53 +0200215 qcom,src-bam-physical-address = <0xf9a44000>;
216 qcom,src-bam-pipe-index = <1>;
Lena Salman192db732013-03-19 14:43:52 +0200217 qcom,data-fifo-size = <0x8000>;
218 qcom,descriptor-fifo-size = <0x2000>;
Lena Salmanabde35d2013-04-25 15:29:43 +0300219 qcom,reset-bam-on-connect;
Jack Phamd61ff562012-11-21 19:25:53 +0200220 };
Jack Phamd61ff562012-11-21 19:25:53 +0200221 qcom,pipe1 {
Shimrit Malichidbf43d72013-03-16 03:32:27 +0200222 label = "hsusb-ipa-in-0";
Lena Salman192db732013-03-19 14:43:52 +0200223 qcom,usb-bam-mem-type = <2>;
Shimrit Malichidbf43d72013-03-16 03:32:27 +0200224 qcom,bam-type = <1>;
225 qcom,dir = <1>;
226 qcom,pipe-num = <0>;
227 qcom,peer-bam = <2>;
Jack Phamd61ff562012-11-21 19:25:53 +0200228 qcom,dst-bam-physical-address = <0xf9a44000>;
229 qcom,dst-bam-pipe-index = <0>;
Lena Salman192db732013-03-19 14:43:52 +0200230 qcom,data-fifo-size = <0x8000>;
231 qcom,descriptor-fifo-size = <0x2000>;
Lena Salmanabde35d2013-04-25 15:29:43 +0300232 qcom,reset-bam-on-connect;
Jack Phamd61ff562012-11-21 19:25:53 +0200233 };
Anna Perel6ac1fa92013-01-24 22:08:06 +0200234 qcom,pipe2 {
Shimrit Malichidbf43d72013-03-16 03:32:27 +0200235 label = "hsusb-qdss-in-0";
Anna Perel6ac1fa92013-01-24 22:08:06 +0200236 qcom,usb-bam-mem-type = <0>;
Shimrit Malichidbf43d72013-03-16 03:32:27 +0200237 qcom,bam-type = <1>;
238 qcom,dir = <1>;
239 qcom,pipe-num = <0>;
240 qcom,peer-bam = <1>;
Anna Perel6ac1fa92013-01-24 22:08:06 +0200241 qcom,src-bam-physical-address = <0xfc37c000>;
242 qcom,src-bam-pipe-index = <0>;
243 qcom,dst-bam-physical-address = <0xf9a44000>;
244 qcom,dst-bam-pipe-index = <2>;
245 qcom,data-fifo-offset = <0x4100>;
246 qcom,data-fifo-size = <0x400>;
247 qcom,descriptor-fifo-offset = <0x4000>;
248 qcom,descriptor-fifo-size = <0x400>;
249 };
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200250 qcom,pipe3 {
251 label = "hsic-ipa-in-0";
252 qcom,usb-bam-mem-type = <2>;
253 qcom,bam-type = <2>;
254 qcom,dir = <1>;
255 qcom,pipe-num = <0>;
256 qcom,peer-bam = <2>;
257 qcom,dst-bam-physical-address = <0xf9a04000>;
258 qcom,dst-bam-pipe-index = <3>;
Prashanth Bhattaaa8fa222013-05-31 11:06:10 -0700259 qcom,data-fifo-size = <0xF800>;
260 qcom,descriptor-fifo-size = <0x3A58>;
Ido Shayevitz21b89cb2013-03-22 01:02:59 +0200261 qcom,reset-bam-on-connect;
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200262 };
263 qcom,pipe4 {
264 label = "hsic-ipa-in-1";
265 qcom,bam-type = <2>;
266 qcom,dir = <1>;
267 qcom,pipe-num = <1>;
268 qcom,peer-bam = <2>;
269 qcom,usb-bam-mem-type = <2>;
270 qcom,dst-bam-physical-address = <0xf9a04000>;
271 qcom,dst-bam-pipe-index = <4>;
Prashanth Bhattaaa8fa222013-05-31 11:06:10 -0700272 qcom,data-fifo-size = <0xF800>;
273 qcom,descriptor-fifo-size = <0x3A58>;
Ido Shayevitz21b89cb2013-03-22 01:02:59 +0200274 qcom,reset-bam-on-connect;
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200275 };
276 qcom,pipe5 {
277 label = "hsic-ipa-in-2";
278 qcom,usb-bam-mem-type = <2>;
279 qcom,bam-type = <2>;
280 qcom,dir = <1>;
281 qcom,pipe-num = <2>;
282 qcom,peer-bam = <2>;
283 qcom,dst-bam-physical-address = <0xf9a04000>;
284 qcom,dst-bam-pipe-index = <5>;
Prashanth Bhattaaa8fa222013-05-31 11:06:10 -0700285 qcom,data-fifo-size = <0xF800>;
286 qcom,descriptor-fifo-size = <0x3A58>;
Ido Shayevitz21b89cb2013-03-22 01:02:59 +0200287 qcom,reset-bam-on-connect;
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200288 };
289 qcom,pipe6 {
290 label = "hsic-ipa-in-3";
291 qcom,usb-bam-mem-type = <2>;
292 qcom,bam-type = <2>;
293 qcom,dir = <1>;
294 qcom,pipe-num = <3>;
295 qcom,peer-bam = <2>;
296 qcom,dst-bam-physical-address = <0xf9a04000>;
297 qcom,dst-bam-pipe-index = <6>;
Prashanth Bhattaaa8fa222013-05-31 11:06:10 -0700298 qcom,data-fifo-size = <0xF800>;
299 qcom,descriptor-fifo-size = <0x3A58>;
Ido Shayevitz21b89cb2013-03-22 01:02:59 +0200300 qcom,reset-bam-on-connect;
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200301 };
302 qcom,pipe7 {
303 label = "hsic-ipa-out-0";
304 qcom,usb-bam-mem-type = <2>;
305 qcom,bam-type = <2>;
306 qcom,dir = <0>;
307 qcom,pipe-num = <0>;
308 qcom,peer-bam = <2>;
309 qcom,src-bam-physical-address = <0xf9a04000>;
310 qcom,src-bam-pipe-index = <7>;
Prashanth Bhattaadfabf42013-05-22 22:55:25 -0700311 qcom,data-fifo-size = <0xDFE>;
312 qcom,descriptor-fifo-size = <0xB30>;
Ido Shayevitz21b89cb2013-03-22 01:02:59 +0200313 qcom,reset-bam-on-connect;
Shimrit Malichi9e840e32013-03-14 20:45:16 +0200314 };
Jack Phamd61ff562012-11-21 19:25:53 +0200315 };
316
Sahitya Tummala9ba4b282012-06-19 11:41:51 +0530317 qcom,nand@f9ac0000 {
318 compatible = "qcom,msm-nand";
319 reg = <0xf9ac0000 0x1000>,
320 <0xf9ac4000 0x8000>;
321 reg-names = "nand_phys",
322 "bam_phys";
323 interrupts = <0 247 0>;
324 interrupt-names = "bam_irq";
325 };
Rohit Vaswani0045df42012-06-29 16:21:48 -0700326
Gilad Avidov0697ea62013-02-11 16:46:38 -0700327 spi_0: spi@f9924000 {
Rohit Vaswani0045df42012-06-29 16:21:48 -0700328 compatible = "qcom,spi-qup-v2";
Gilad Avidov09c78ec2012-10-18 09:34:35 -0600329 reg = <0xf9924000 0x1000>;
330 interrupts = <0 96 0>;
331 spi-max-frequency = <25000000>;
Rohit Vaswani0045df42012-06-29 16:21:48 -0700332 #address-cells = <1>;
333 #size-cells = <0>;
Gilad Avidov09c78ec2012-10-18 09:34:35 -0600334 gpios = <&msmgpio 7 0>, /* CLK */
335 <&msmgpio 5 0>, /* MISO */
336 <&msmgpio 4 0>; /* MOSI */
Rohit Vaswani0045df42012-06-29 16:21:48 -0700337
Gilad Avidov09c78ec2012-10-18 09:34:35 -0600338 cs-gpios = <&msmgpio 6 0>;
Rohit Vaswani0045df42012-06-29 16:21:48 -0700339
340 ethernet-switch@0 {
341 compatible = "simtec,ks8851";
342 reg = <0>;
343 interrupt-parent = <&msmgpio>;
344 interrupts = <75 0>;
Gilad Avidov09c78ec2012-10-18 09:34:35 -0600345 spi-max-frequency = <4800000>;
Rohit Vaswani0045df42012-06-29 16:21:48 -0700346 };
347 };
Hanumant Singh6c4bf062012-09-06 15:51:10 -0700348
349 qcom,wdt@f9017000 {
350 compatible = "qcom,msm-watchdog";
351 reg = <0xf9017000 0x1000>;
352 interrupts = <1 2 0>, <1 1 0>;
353 qcom,bark-time = <11000>;
354 qcom,pet-time = <10000>;
Hanumant Singh6c4bf062012-09-06 15:51:10 -0700355 };
Kenneth Heitkec2642402012-09-18 18:56:47 -0600356
Girish Mahadevanc65a7112012-09-19 11:15:56 -0600357 rpm_bus: qcom,rpm-smd {
358 compatible = "qcom,rpm-smd";
359 rpm-channel-name = "rpm_requests";
360 rpm-channel-type = <15>; /* SMD_APPS_RPM */
361 };
362
Kenneth Heitkec2642402012-09-18 18:56:47 -0600363 spmi_bus: qcom,spmi@fc4c0000 {
364 cell-index = <0>;
365 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700366 reg-names = "core", "intr", "cnfg";
Kenneth Heitkec2642402012-09-18 18:56:47 -0600367 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700368 <0Xfc4cb000 0x1000>,
369 <0Xfc4ca000 0x1000>;
Kenneth Heitkec2642402012-09-18 18:56:47 -0600370 /* 190,ee0_krait_hlos_spmi_periph_irq */
371 /* 187,channel_0_krait_hlos_trans_done_irq */
372 interrupts = <0 190 0 0 187 0>;
373 qcom,pmic-arb-ee = <0>;
374 qcom,pmic-arb-channel = <0>;
Kenneth Heitkec2642402012-09-18 18:56:47 -0600375 };
Kenneth Heitkef92a8c72012-10-10 17:15:05 -0600376
377 i2c@f9925000 {
378 cell-index = <3>;
379 compatible = "qcom,i2c-qup";
380 reg = <0xf9925000 0x1000>;
381 #address-cells = <1>;
382 #size-cells = <0>;
383 reg-names = "qup_phys_addr";
384 interrupts = <0 97 0>;
385 interrupt-names = "qup_err_intr";
386 qcom,i2c-bus-freq = <100000>;
387 qcom,i2c-src-freq = <24000000>;
388 };
Oluwafemi Adeyemibbbcc6e2012-09-14 17:24:26 -0700389
390 sdcc2: qcom,sdcc@f98a4000 {
391 cell-index = <2>; /* SDC2 SD card slot */
392 compatible = "qcom,msm-sdcc";
393 reg = <0xf98a4000 0x800>,
394 <0xf98a4800 0x100>,
395 <0xf9884000 0x7000>;
396 reg-names = "core_mem", "dml_mem", "bam_mem";
397
398 vdd-supply = <&ext_2p95v>;
399
400 vdd-io-supply = <&pm8019_l13>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700401 qcom,vdd-io-always-on;
402 qcom,vdd-io-lpm-sup;
403 qcom,vdd-io-voltage-level = <1800000 2950000>;
404 qcom,vdd-io-current-level = <6 22000>;
Oluwafemi Adeyemibbbcc6e2012-09-14 17:24:26 -0700405
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700406 qcom,pad-pull-on = <0x0 0x3 0x3>;
407 qcom,pad-pull-off = <0x0 0x3 0x3>;
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700408 qcom,pad-drv-on = <0x4 0x4 0x4>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700409 qcom,pad-drv-off = <0x0 0x0 0x0>;
Oluwafemi Adeyemibbbcc6e2012-09-14 17:24:26 -0700410
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700411 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
412 qcom,sup-voltages = <2950 2950>;
413 qcom,bus-width = <4>;
414 qcom,xpc;
415 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
416 qcom,current-limit = <800>;
Oluwafemi Adeyemibbbcc6e2012-09-14 17:24:26 -0700417
418 interrupt-parent = <&sdcc2>;
419 #address-cells = <0>;
420 interrupts = <0 1 2>;
421 #interrupt-cells = <1>;
422 interrupt-map-mask = <0xffffffff>;
423 interrupt-map = <0 &intc 0 125 0
424 1 &intc 0 220 0
425 2 &msmgpio 66 0x3>;
426 interrupt-names = "core_irq", "bam_irq", "status_irq";
427 cd-gpios = <&msmgpio 66 0>;
428 };
Oluwafemi Adeyemi4926a9e2012-09-14 17:39:59 -0700429
430 sdcc3: qcom,sdcc@f9864000 {
431 cell-index = <3>; /* SDC3 SDIO slot */
432 compatible = "qcom,msm-sdcc";
433 reg = <0xf9864000 0x800>,
434 <0xf9864800 0x100>,
435 <0xf9844000 0x7000>;
436 reg-names = "core_mem", "dml_mem", "bam_mem";
437 interrupts = <0 127 0>, <0 223 0>;
438 interrupt-names = "core_irq", "bam_irq";
439
440 gpios = <&msmgpio 25 0>,
441 <&msmgpio 24 0>,
442 <&msmgpio 16 0>,
443 <&msmgpio 17 0>,
444 <&msmgpio 18 0>,
445 <&msmgpio 19 0>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700446 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
Oluwafemi Adeyemi4926a9e2012-09-14 17:39:59 -0700447
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700448 qcom,clk-rates = <400000 25000000 50000000 100000000>;
449 qcom,sup-voltages = <2950 2950>;
450 qcom,bus-width = <4>;
451 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Oluwafemi Adeyemi4926a9e2012-09-14 17:39:59 -0700452 };
Jeff Hugocdcb8aa2012-10-16 13:41:20 -0600453
Ravi Gummadidalaedae2002013-02-06 12:13:59 -0800454 ipa_hw: qcom,ipa@fd4c0000 {
Talel Atias49196392012-11-20 19:20:14 +0200455 compatible = "qcom,ipa";
456 reg = <0xfd4c0000 0x26000>,
Vladislav Mordohovich4028f802013-03-04 15:16:31 +0200457 <0xfd4c4000 0x14818>,
458 <0xfc834000 0x7000>;
459 reg-names = "ipa-base", "bam-base", "a2-bam-base";
Talel Atias49196392012-11-20 19:20:14 +0200460 interrupts = <0 252 0>,
Vladislav Mordohovich4028f802013-03-04 15:16:31 +0200461 <0 253 0>,
462 <0 29 1>;
463 interrupt-names = "ipa-irq", "bam-irq", "a2-bam-irq";
Talel Atias49196392012-11-20 19:20:14 +0200464
465 qcom,pipe1 {
466 label = "a2-to-ipa";
467 qcom,src-bam-physical-address = <0xfc834000>;
468 qcom,ipa-bam-mem-type = <0>;
469 qcom,src-bam-pipe-index = <1>;
470 qcom,dst-bam-physical-address = <0xfd4c0000>;
471 qcom,dst-bam-pipe-index = <6>;
472 qcom,data-fifo-offset = <0x1000>;
473 qcom,data-fifo-size = <0xd00>;
474 qcom,descriptor-fifo-offset = <0x1d00>;
475 qcom,descriptor-fifo-size = <0x300>;
476 };
477
478 qcom,pipe2 {
479 label = "ipa-to-a2";
480 qcom,src-bam-physical-address = <0xfd4c0000>;
481 qcom,ipa-bam-mem-type = <0>;
482 qcom,src-bam-pipe-index = <7>;
483 qcom,dst-bam-physical-address = <0xfc834000>;
484 qcom,dst-bam-pipe-index = <0>;
485 qcom,data-fifo-offset = <0x00>;
486 qcom,data-fifo-size = <0xd00>;
487 qcom,descriptor-fifo-offset = <0xd00>;
488 qcom,descriptor-fifo-size = <0x300>;
489 };
490 };
491
Tianyi Gouf6ffa872012-10-22 14:22:58 -0700492 qcom,acpuclk@f9010000 {
493 compatible = "qcom,acpuclk-9625";
494 reg = <0xf9010008 0x10>,
495 <0xf9008004 0x4>;
496 reg-names = "rcg_base", "pwr_base";
497 a5_cpu-supply = <&pm8019_l10_corner_ao>;
498 a5_mem-supply = <&pm8019_l12_ao>;
499 };
Tianyi Gou343bd932012-10-29 11:03:03 -0700500
501 gdsc_usb_hsic: qcom,gdsc@fc400404 {
502 compatible = "qcom,gdsc";
503 reg = <0xfc400404 0x4>;
504 regulator-name = "gdsc_usb_hsic";
505 };
Siddartha Mohanadoss650af6b2012-10-25 20:09:11 -0700506
507 tsens@fc4a8000 {
508 compatible = "qcom,msm-tsens";
509 reg = <0xfc4a8000 0x2000>,
510 <0xfc4b8000 0x1000>;
511 reg-names = "tsens_physical", "tsens_eeprom_physical";
512 interrupts = <0 184 0>;
513 qcom,sensors = <5>;
514 qcom,slope = <3200 3200 3200 3200 3200>;
Siddartha Mohanadoss3f8cd142013-02-06 17:24:33 -0800515 qcom,calib-mode = "fuse_map1";
Siddartha Mohanadoss650af6b2012-10-25 20:09:11 -0700516 };
Hariprasad Dhalinarasimhae9ad1da2012-11-14 18:21:56 -0800517
518 qcom,msm-rng@f9bff000 {
519 compatible = "qcom,msm-rng";
520 reg = <0xf9bff000 0x200>;
521 qcom,msm-rng-iface-clk;
Venkat Sudhir49965c72012-10-23 14:06:10 -0700522 };
523
524 wcd9xxx_intc: wcd9xxx-irq {
525 compatible = "qcom,wcd9xxx-irq";
526 interrupt-controller;
527 #interrupt-cells = <1>;
528 interrupt-parent = <&msmgpio>;
529 interrupts = <20 0>;
530 interrupt-names = "cdc-int";
531 };
532
533 i2c@f9925000 {
534 cell-index = <3>;
535 compatible = "qcom,i2c-qup";
536 reg = <0xf9925000 0x1000>;
537 #address-cells = <1>;
538 #size-cells = <0>;
539 reg-names = "qup_phys_addr";
540 interrupts = <0 97 0>;
541 interrupt-names = "qup_err_intr";
542 qcom,i2c-bus-freq = <100000>;
543 qcom,i2c-src-freq = <24000000>;
544
545 wcd9xxx_codec@0d{
546 compatible = "qcom,wcd9xxx-i2c";
547 reg = <0x0d>;
548 qcom,cdc-reset-gpio = <&msmgpio 22 0>;
549 interrupt-parent = <&wcd9xxx_intc>;
550 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28>;
551 cdc-vdd-buck-supply = <&pm8019_l11>;
552 qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
553 qcom,cdc-vdd-buck-current = <25000>;
554
555 cdc-vdd-tx-h-supply = <&pm8019_l11>;
556 qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
557 qcom,cdc-vdd-tx-h-current = <25000>;
558
559 cdc-vdd-rx-h-supply = <&pm8019_l11>;
560 qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
561 qcom,cdc-vdd-rx-h-current = <25000>;
562
563 cdc-vddpx-1-supply = <&pm8019_l11>;
564 qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
565 qcom,cdc-vddpx-1-current = <10000>;
566
567 cdc-vdd-a-1p2v-supply = <&pm8019_l9>;
568 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
569 qcom,cdc-vdd-a-1p2v-current = <10000>;
570
571 cdc-vddcx-1-supply = <&pm8019_l9>;
572 qcom,cdc-vddcx-1-voltage = <1200000 1200000>;
573 qcom,cdc-vddcx-1-current = <10000>;
574
575 cdc-vddcx-2-supply = <&pm8019_l9>;
576 qcom,cdc-vddcx-2-voltage = <1200000 1200000>;
577 qcom,cdc-vddcx-2-current = <10000>;
578
Joonwoo Park73239212013-04-10 15:11:06 -0700579 qcom,cdc-static-supplies = "cdc-vdd-buck",
580 "cdc-vdd-tx-h",
581 "cdc-vdd-rx-h",
582 "cdc-vddpx-1",
583 "cdc-vdd-a-1p2v",
584 "cdc-vddcx-1",
585 "cdc-vddcx-2";
586
Venkat Sudhir49965c72012-10-23 14:06:10 -0700587 qcom,cdc-micbias-ldoh-v = <0x3>;
588 qcom,cdc-micbias-cfilt1-mv = <1800>;
589 qcom,cdc-micbias-cfilt2-mv = <2700>;
590 qcom,cdc-micbias-cfilt3-mv = <1800>;
591 qcom,cdc-micbias1-cfilt-sel = <0x0>;
592 qcom,cdc-micbias2-cfilt-sel = <0x1>;
593 qcom,cdc-micbias3-cfilt-sel = <0x2>;
594 qcom,cdc-micbias4-cfilt-sel = <0x2>;
Venkat Sudhira50a3762012-11-26 12:12:15 -0800595 qcom,cdc-mclk-clk-rate = <12288000>;
Venkat Sudhir49965c72012-10-23 14:06:10 -0700596 };
597
598 wcd9xxx_codec@77{
599 compatible = "qcom,wcd9xxx-i2c";
600 reg = <0x77>;
601 };
602
603 wcd9xxx_codec@66{
604 compatible = "qcom,wcd9xxx-i2c";
605 reg = <0x66>;
606 };
607
608 wcd9xxx_codec@55{
609 compatible = "qcom,wcd9xxx-i2c";
610 reg = <0x55>;
611 };
612 };
613
614 sound {
615 compatible = "qcom,mdm9625-audio-taiko";
616 qcom,model = "mdm9625-taiko-i2s-snd-card";
617
618 qcom,audio-routing =
619 "RX_BIAS", "MCLK",
620 "LDO_H", "MCLK",
621 "Ext Spk Bottom Pos", "LINEOUT1",
622 "Ext Spk Bottom Neg", "LINEOUT3",
623 "Ext Spk Top Pos", "LINEOUT2",
624 "Ext Spk Top Neg", "LINEOUT4",
625 "AMIC1", "MIC BIAS1 External",
626 "MIC BIAS1 External", "Handset Mic",
627 "AMIC2", "MIC BIAS2 External",
628 "MIC BIAS2 External", "Headset Mic",
629 "AMIC3", "MIC BIAS3 Internal1",
630 "MIC BIAS3 Internal1", "ANCRight Headset Mic",
631 "AMIC4", "MIC BIAS1 Internal2",
632 "MIC BIAS1 Internal2", "ANCLeft Headset Mic",
633 "DMIC1", "MIC BIAS1 External",
634 "MIC BIAS1 External", "Digital Mic1",
635 "DMIC2", "MIC BIAS1 External",
636 "MIC BIAS1 External", "Digital Mic2",
637 "DMIC3", "MIC BIAS3 External",
638 "MIC BIAS3 External", "Digital Mic3",
639 "DMIC4", "MIC BIAS3 External",
640 "MIC BIAS3 External", "Digital Mic4",
641 "DMIC5", "MIC BIAS4 External",
642 "MIC BIAS4 External", "Digital Mic5",
643 "DMIC6", "MIC BIAS4 External",
644 "MIC BIAS4 External", "Digital Mic6";
645 qcom,taiko-mclk-clk-freq = <12288000>;
Venkat Sudhir459d6f52012-12-04 12:00:13 -0800646 prim-i2s-gpio-ws = <&msmgpio 12 0>;
647 prim-i2s-gpio-din = <&msmgpio 13 0>;
648 prim-i2s-gpio-dout = <&msmgpio 14 0>;
649 prim-i2s-gpio-sclk = <&msmgpio 15 0>;
650 prim-i2s-gpio-mclk = <&msmgpio 71 0>;
Venkat Sudhir49965c72012-10-23 14:06:10 -0700651 };
652
653 qcom,msm-adsp-loader {
654 compatible = "qcom,adsp-loader";
Venkat Sudhir480db8a2012-11-09 15:31:50 -0800655 qcom,adsp-state = <2>;
Venkat Sudhir49965c72012-10-23 14:06:10 -0700656 };
657
658 qcom,msm-pcm {
659 compatible = "qcom,msm-pcm-dsp";
Venkat Sudhir3f88b092013-02-28 16:28:37 -0800660 qcom,msm-pcm-dsp-id = <0>;
Venkat Sudhir49965c72012-10-23 14:06:10 -0700661 };
662
663 qcom,msm-pcm-routing {
664 compatible = "qcom,msm-pcm-routing";
665 };
666
667 qcom,msm-compr-dsp {
668 compatible = "qcom,msm-compr-dsp";
669 };
670
671 qcom,msm-voip-dsp {
672 compatible = "qcom,msm-voip-dsp";
673 };
674
675 qcom,msm-pcm-voice {
676 compatible = "qcom,msm-pcm-voice";
677 };
678
Venkat Sudhire26f8c42013-01-14 16:53:35 -0800679 qcom,msm-stub-codec {
680 compatible = "qcom,msm-stub-codec";
681 };
682
Venkat Sudhir49965c72012-10-23 14:06:10 -0700683 qcom,msm-dai-fe {
684 compatible = "qcom,msm-dai-fe";
685 };
686
687 qcom,msm-pcm-afe {
688 compatible = "qcom,msm-pcm-afe";
689 };
690
691 qcom,msm-pcm-hostless {
692 compatible = "qcom,msm-pcm-hostless";
693 };
694
Venkat Sudhire26f8c42013-01-14 16:53:35 -0800695 qcom,msm-dai-q6 {
696 compatible = "qcom,msm-dai-q6";
697 qcom,msm-dai-q6-be-afe-pcm-rx {
698 compatible = "qcom,msm-dai-q6-dev";
699 qcom,msm-dai-q6-dev-id = <224>;
700 };
701
702 qcom,msm-dai-q6-be-afe-pcm-tx {
703 compatible = "qcom,msm-dai-q6-dev";
704 qcom,msm-dai-q6-dev-id = <225>;
705 };
706
707 qcom,msm-dai-q6-afe-proxy-rx {
708 compatible = "qcom,msm-dai-q6-dev";
709 qcom,msm-dai-q6-dev-id = <241>;
710 };
711
712 qcom,msm-dai-q6-afe-proxy-tx {
713 compatible = "qcom,msm-dai-q6-dev";
714 qcom,msm-dai-q6-dev-id = <240>;
715 };
716 };
Venkat Sudhire8320292013-01-17 13:45:15 -0800717 qcom,msm-pcm-dtmf {
718 compatible = "qcom,msm-pcm-dtmf";
719 };
720
721 qcom,msm-dai-stub {
722 compatible = "qcom,msm-dai-stub";
723 };
724
725 qcom,msm-stub-codec {
726 compatible = "qcom,msm-stub-codec";
727 };
Venkat Sudhire26f8c42013-01-14 16:53:35 -0800728
Prashanth Reddyf9536572013-02-13 12:17:08 -0800729 qcom,msm-auxpcm {
730 compatible = "qcom,msm-auxpcm-resource";
731 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
732 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
733 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
734 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
735 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
736 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
737 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
738 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
739
740 qcom,msm-auxpcm-rx {
741 qcom,msm-auxpcm-dev-id = <4106>;
742 compatible = "qcom,msm-auxpcm-dev";
743 };
744
745 qcom,msm-auxpcm-tx {
746 qcom,msm-auxpcm-dev-id = <4107>;
747 compatible = "qcom,msm-auxpcm-dev";
748 };
749 };
750
Venkat Sudhir49965c72012-10-23 14:06:10 -0700751 qcom,msm-dai-mi2s {
752 compatible = "qcom,msm-dai-mi2s";
753 qcom,msm-dai-q6-mi2s-prim {
754 compatible = "qcom,msm-dai-q6-mi2s";
755 qcom,msm-dai-q6-mi2s-dev-id = <0>;
756 qcom,msm-mi2s-rx-lines = <2>;
757 qcom,msm-mi2s-tx-lines = <1>;
758 };
759 };
760
761 qcom,msm-dai-q6 {
762 compatible = "qcom,msm-dai-q6";
763 };
Vikram Mulukutla7f4ed0d2012-11-05 15:26:51 -0800764
765 qcom,mss {
766 compatible = "qcom,pil-q6v5-mss";
767 interrupts = <0 24 1>;
Seemanta Duttaf9458c92013-05-08 19:53:29 -0700768 qcom,is-not-loadable;
Seemanta Dutta519dfd12013-01-22 17:34:36 -0800769
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800770 /* GPIO inputs from mss */
Seemanta Dutta519dfd12013-01-22 17:34:36 -0800771 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800772 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800773 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta519dfd12013-01-22 17:34:36 -0800774
775 /* GPIO output to mss */
776 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla7f4ed0d2012-11-05 15:26:51 -0800777 };
Jeff Hugo27a6cf02012-11-29 15:46:50 -0700778
Jeff Hugo065585c2013-04-18 17:30:41 -0600779 qcom,smem@0 {
Jeff Hugo27a6cf02012-11-29 15:46:50 -0700780 compatible = "qcom,smem";
Jeff Hugo065585c2013-04-18 17:30:41 -0600781 reg = <0x0 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800782 <0xf9011000 0x1000>,
Jeff Hugo27a6cf02012-11-29 15:46:50 -0700783 <0xfc428000 0x4000>;
784 reg-names = "smem", "irq-reg-base", "aux-mem1";
785
786 qcom,smd-modem {
787 compatible = "qcom,smd";
788 qcom,smd-edge = <0>;
789 qcom,smd-irq-offset = <0x8>;
790 qcom,smd-irq-bitmask = <0x1000>;
791 qcom,pil-string = "modem";
792 interrupts = <0 25 1>;
793 };
794
795 qcom,smsm-modem {
796 compatible = "qcom,smsm";
797 qcom,smsm-edge = <0>;
798 qcom,smsm-irq-offset = <0x8>;
799 qcom,smsm-irq-bitmask = <0x2000>;
800 interrupts = <0 26 1>;
801 };
802
803 qcom,smd-adsp {
804 compatible = "qcom,smd";
805 qcom,smd-edge = <1>;
806 qcom,smd-irq-offset = <0x8>;
807 qcom,smd-irq-bitmask = <0x100>;
808 qcom,pil-string = "adsp";
809 interrupts = <0 156 1>;
810 };
811
812 qcom,smsm-adsp {
813 compatible = "qcom,smsm";
814 qcom,smsm-edge = <1>;
815 qcom,smsm-irq-offset = <0x8>;
816 qcom,smsm-irq-bitmask = <0x200>;
817 interrupts = <0 157 1>;
818 };
819
820 qcom,smd-rpm {
821 compatible = "qcom,smd";
822 qcom,smd-edge = <15>;
823 qcom,smd-irq-offset = <0x8>;
824 qcom,smd-irq-bitmask = <0x1>;
825 interrupts = <0 168 1>;
826 qcom,irq-no-suspend;
827 };
828 };
Hariprasad Dhalinarasimhaf4a5b0c2012-11-21 17:49:19 -0800829
830 qcom,qcedev@fd400000 {
831 compatible = "qcom,qcedev";
832 reg = <0xfd400000 0x20000>,
833 <0xfd404000 0x8000>;
834 reg-names = "crypto-base","crypto-bam-base";
835 interrupts = <0 207 0>;
836 qcom,bam-pipe-pair = <1>;
837 };
838
839 qcom,qcrypto@fd440000 {
840 compatible = "qcom,qcrypto";
841 reg = <0xfd400000 0x20000>,
842 <0xfd404000 0x8000>;
843 reg-names = "crypto-base","crypto-bam-base";
844 interrupts = <0 207 0>;
845 qcom,bam-pipe-pair = <2>;
846 };
847
Pushkar Joshi70210812012-12-15 19:01:39 -0800848 jtag_mm: jtagmm@fc332000 {
849 compatible = "qcom,jtag-mm";
850 reg = <0xfc332000 0x1000>,
851 <0xfc330000 0x1000>;
852 reg-names = "etm-base","debug-base";
853 };
Pushkar Joshi30306d32013-01-16 17:00:26 -0800854
855 qcom,msm-rtb {
856 compatible = "qcom,msm-rtb";
857 qcom,memory-reservation-type = "EBI1";
858 qcom,memory-reservation-size = <0x1000>; /* 4K EBI1 buffer */
859 };
Neeti Desai2036e122012-11-30 14:24:13 -0800860
861 qcom,msm-mem-hole {
862 compatible = "qcom,msm-mem-hole";
863 qcom,memblock-remove = <0x1f00000 0x5700000>; /* Address and Size of Hole */
864 };
865
Jeff Hugo96766e22013-03-06 13:52:37 -0700866 sfpb_spinlock: qcom,ipc-spinlock@fd484000 {
867 compatible = "qcom,ipc-spinlock-sfpb";
Jeff Hugo86a55b22013-03-14 14:51:30 -0600868 reg = <0xfd484000 0x400>;
869 qcom,num-locks = <8>;
Jeff Hugo96766e22013-03-06 13:52:37 -0700870 };
871
872 ldrex_spinlock: qcom,ipc-spinlock@fa00000 {
873 compatible = "qcom,ipc-spinlock-ldrex";
874 reg = <0xfa00000 0x200000>;
875 status = "disable";
876 };
877
Ashwin Chaugule50d59892013-03-12 12:58:51 -0400878 cpu-pmu {
879 compatible = "arm,cortex-a5-pmu";
880 qcom,irq-is-percpu;
881 interrupts = <1 7 0x00>;
882 };
883
884 l2-pmu {
885 compatible = "qcom,l2-pmu";
886 interrupts = <0 1 0>;
887 };
888
Rohit Vaswani3fc60342012-04-23 18:55:15 -0700889};
David Collinsa2b73f22012-09-13 17:32:16 -0700890
David Collins722a6512012-09-14 11:09:18 -0700891/include/ "msm-pm8019-rpm-regulator.dtsi"
David Collinsa2b73f22012-09-13 17:32:16 -0700892/include/ "msm-pm8019.dtsi"
David Collins56b41122012-09-24 17:09:23 -0700893/include/ "msm9625-regulator.dtsi"
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700894
895&pm8019_vadc {
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800896 chan@31 {
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700897 label = "batt_id_therm";
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800898 reg = <0x31>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700899 qcom,decimation = <0>;
900 qcom,pre-div-channel-scaling = <0>;
901 qcom,calibration-type = "ratiometric";
902 qcom,scale-function = <0>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800903 qcom,hw-settle-time = <2>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700904 qcom,fast-avg-setup = <0>;
905 };
906
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800907 chan@33 {
Siddartha Mohanadossa1be91a2013-04-05 10:28:33 -0700908 label = "pa_therm0";
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800909 reg = <0x33>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700910 qcom,decimation = <0>;
911 qcom,pre-div-channel-scaling = <0>;
912 qcom,calibration-type = "ratiometric";
913 qcom,scale-function = <2>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800914 qcom,hw-settle-time = <2>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700915 qcom,fast-avg-setup = <0>;
916 };
917
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800918 chan@34 {
Siddartha Mohanadossa1be91a2013-04-05 10:28:33 -0700919 label = "pa_therm1";
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800920 reg = <0x34>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700921 qcom,decimation = <0>;
922 qcom,pre-div-channel-scaling = <0>;
923 qcom,calibration-type = "ratiometric";
924 qcom,scale-function = <2>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800925 qcom,hw-settle-time = <2>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700926 qcom,fast-avg-setup = <0>;
927 };
928
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800929 chan@32 {
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700930 label = "xo_therm";
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800931 reg = <0x32>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700932 qcom,decimation = <0>;
933 qcom,pre-div-channel-scaling = <0>;
934 qcom,calibration-type = "ratiometric";
935 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800936 qcom,hw-settle-time = <2>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700937 qcom,fast-avg-setup = <0>;
938 };
939
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800940 chan@3c {
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700941 label = "xo_therm_amux";
Siddartha Mohanadoss96be0a02012-12-07 14:38:48 -0800942 reg = <0x3c>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700943 qcom,decimation = <0>;
944 qcom,pre-div-channel-scaling = <0>;
945 qcom,calibration-type = "ratiometric";
946 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800947 qcom,hw-settle-time = <2>;
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700948 qcom,fast-avg-setup = <0>;
949 };
Siddartha Mohanadoss402db842013-04-03 21:24:49 -0700950
951 chan@13 {
952 label = "case_therm";
953 reg = <0x13>;
954 qcom,decimation = <0>;
955 qcom,pre-div-channel-scaling = <0>;
956 qcom,calibration-type = "ratiometric";
957 qcom,scale-function = <2>;
958 qcom,hw-settle-time = <2>;
959 qcom,fast-avg-setup = <0>;
960 };
961
962 chan@15 {
963 label = "ambient_therm";
964 reg = <0x15>;
965 qcom,decimation = <0>;
966 qcom,pre-div-channel-scaling = <0>;
967 qcom,calibration-type = "ratiometric";
968 qcom,scale-function = <2>;
969 qcom,hw-settle-time = <2>;
970 qcom,fast-avg-setup = <0>;
971 };
Siddartha Mohanadossc47fcce2012-09-25 17:21:50 -0700972};
Siddartha Mohanadoss6dec7cee32013-05-02 10:02:51 -0700973
974&pm8019_adc_tm {
975 /* Channel Node */
976 chan@33 {
977 label = "pa_therm0";
978 reg = <0x33>;
979 qcom,decimation = <0>;
980 qcom,pre-div-channel-scaling = <0>;
981 qcom,calibration-type = "ratiometric";
982 qcom,scale-function = <2>;
983 qcom,hw-settle-time = <2>;
984 qcom,fast-avg-setup = <0>;
985 qcom,btm-channel-number = <0x48>;
986 qcom,thermal-node;
987 };
988
989 chan@34 {
990 label = "pa_therm1";
991 reg = <0x34>;
992 qcom,decimation = <0>;
993 qcom,pre-div-channel-scaling = <0>;
994 qcom,calibration-type = "ratiometric";
995 qcom,scale-function = <2>;
996 qcom,hw-settle-time = <2>;
997 qcom,fast-avg-setup = <0>;
998 qcom,btm-channel-number = <0x68>;
999 qcom,thermal-node;
1000 };
1001};