blob: 90e629f276f3714f1c014b1ec5a15742eb7db779 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujithcee075a2009-03-13 09:07:23 +05302 * Copyright (c) 2008-2009 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Sujith394cf0a2009-02-09 13:26:54 +053017#include "ath9k.h"
Luis R. Rodriguezb622a722010-04-15 17:39:28 -040018#include "ar9003_mac.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070019
20#define BITS_PER_BYTE 8
21#define OFDM_PLCP_BITS 22
22#define HT_RC_2_MCS(_rc) ((_rc) & 0x0f)
23#define HT_RC_2_STREAMS(_rc) ((((_rc) & 0x78) >> 3) + 1)
24#define L_STF 8
25#define L_LTF 8
26#define L_SIG 4
27#define HT_SIG 8
28#define HT_STF 4
29#define HT_LTF(_ns) (4 * (_ns))
30#define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
31#define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
32#define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
33#define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
34
35#define OFDM_SIFS_TIME 16
36
37static u32 bits_per_symbol[][2] = {
38 /* 20MHz 40MHz */
39 { 26, 54 }, /* 0: BPSK */
40 { 52, 108 }, /* 1: QPSK 1/2 */
41 { 78, 162 }, /* 2: QPSK 3/4 */
42 { 104, 216 }, /* 3: 16-QAM 1/2 */
43 { 156, 324 }, /* 4: 16-QAM 3/4 */
44 { 208, 432 }, /* 5: 64-QAM 2/3 */
45 { 234, 486 }, /* 6: 64-QAM 3/4 */
46 { 260, 540 }, /* 7: 64-QAM 5/6 */
47 { 52, 108 }, /* 8: BPSK */
48 { 104, 216 }, /* 9: QPSK 1/2 */
49 { 156, 324 }, /* 10: QPSK 3/4 */
50 { 208, 432 }, /* 11: 16-QAM 1/2 */
51 { 312, 648 }, /* 12: 16-QAM 3/4 */
52 { 416, 864 }, /* 13: 64-QAM 2/3 */
53 { 468, 972 }, /* 14: 64-QAM 3/4 */
54 { 520, 1080 }, /* 15: 64-QAM 5/6 */
55};
56
57#define IS_HT_RATE(_rate) ((_rate) & 0x80)
58
Sujithc37452b2009-03-09 09:31:57 +053059static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
60 struct ath_atx_tid *tid,
61 struct list_head *bf_head);
Sujithe8324352009-01-16 21:38:42 +053062static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
Felix Fietkaudb1a0522010-03-29 20:07:11 -070063 struct ath_txq *txq, struct list_head *bf_q,
64 struct ath_tx_status *ts, int txok, int sendbar);
Sujithe8324352009-01-16 21:38:42 +053065static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
66 struct list_head *head);
67static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf);
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +053068static int ath_tx_num_badfrms(struct ath_softc *sc, struct ath_buf *bf,
Felix Fietkaudb1a0522010-03-29 20:07:11 -070069 struct ath_tx_status *ts, int txok);
70static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts,
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +053071 int nbad, int txok, bool update_rc);
Sujithe8324352009-01-16 21:38:42 +053072
Felix Fietkau545750d2009-11-23 22:21:01 +010073enum {
74 MCS_DEFAULT,
75 MCS_HT40,
76 MCS_HT40_SGI,
77};
78
79static int ath_max_4ms_framelen[3][16] = {
80 [MCS_DEFAULT] = {
81 3216, 6434, 9650, 12868, 19304, 25740, 28956, 32180,
82 6430, 12860, 19300, 25736, 38600, 51472, 57890, 64320,
83 },
84 [MCS_HT40] = {
85 6684, 13368, 20052, 26738, 40104, 53476, 60156, 66840,
86 13360, 26720, 40080, 53440, 80160, 106880, 120240, 133600,
87 },
88 [MCS_HT40_SGI] = {
89 /* TODO: Only MCS 7 and 15 updated, recalculate the rest */
90 6684, 13368, 20052, 26738, 40104, 53476, 60156, 74200,
91 13360, 26720, 40080, 53440, 80160, 106880, 120240, 148400,
92 }
93};
94
Sujithe8324352009-01-16 21:38:42 +053095/*********************/
96/* Aggregation logic */
97/*********************/
98
Sujithe8324352009-01-16 21:38:42 +053099static void ath_tx_queue_tid(struct ath_txq *txq, struct ath_atx_tid *tid)
100{
101 struct ath_atx_ac *ac = tid->ac;
102
103 if (tid->paused)
104 return;
105
106 if (tid->sched)
107 return;
108
109 tid->sched = true;
110 list_add_tail(&tid->list, &ac->tid_q);
111
112 if (ac->sched)
113 return;
114
115 ac->sched = true;
116 list_add_tail(&ac->list, &txq->axq_acq);
117}
118
119static void ath_tx_pause_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
120{
121 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
122
123 spin_lock_bh(&txq->axq_lock);
124 tid->paused++;
125 spin_unlock_bh(&txq->axq_lock);
126}
127
128static void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
129{
130 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
131
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -0700132 BUG_ON(tid->paused <= 0);
Sujithe8324352009-01-16 21:38:42 +0530133 spin_lock_bh(&txq->axq_lock);
134
135 tid->paused--;
136
137 if (tid->paused > 0)
138 goto unlock;
139
140 if (list_empty(&tid->buf_q))
141 goto unlock;
142
143 ath_tx_queue_tid(txq, tid);
144 ath_txq_schedule(sc, txq);
145unlock:
146 spin_unlock_bh(&txq->axq_lock);
147}
148
149static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
150{
151 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
152 struct ath_buf *bf;
153 struct list_head bf_head;
154 INIT_LIST_HEAD(&bf_head);
155
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -0700156 BUG_ON(tid->paused <= 0);
Sujithe8324352009-01-16 21:38:42 +0530157 spin_lock_bh(&txq->axq_lock);
158
159 tid->paused--;
160
161 if (tid->paused > 0) {
162 spin_unlock_bh(&txq->axq_lock);
163 return;
164 }
165
166 while (!list_empty(&tid->buf_q)) {
167 bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -0700168 BUG_ON(bf_isretried(bf));
Sujithd43f30152009-01-16 21:38:53 +0530169 list_move_tail(&bf->list, &bf_head);
Sujithc37452b2009-03-09 09:31:57 +0530170 ath_tx_send_ht_normal(sc, txq, tid, &bf_head);
Sujithe8324352009-01-16 21:38:42 +0530171 }
172
173 spin_unlock_bh(&txq->axq_lock);
174}
175
176static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
177 int seqno)
178{
179 int index, cindex;
180
181 index = ATH_BA_INDEX(tid->seq_start, seqno);
182 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
183
184 tid->tx_buf[cindex] = NULL;
185
186 while (tid->baw_head != tid->baw_tail && !tid->tx_buf[tid->baw_head]) {
187 INCR(tid->seq_start, IEEE80211_SEQ_MAX);
188 INCR(tid->baw_head, ATH_TID_MAX_BUFS);
189 }
190}
191
192static void ath_tx_addto_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
193 struct ath_buf *bf)
194{
195 int index, cindex;
196
197 if (bf_isretried(bf))
198 return;
199
200 index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno);
201 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
202
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -0700203 BUG_ON(tid->tx_buf[cindex] != NULL);
Sujithe8324352009-01-16 21:38:42 +0530204 tid->tx_buf[cindex] = bf;
205
206 if (index >= ((tid->baw_tail - tid->baw_head) &
207 (ATH_TID_MAX_BUFS - 1))) {
208 tid->baw_tail = cindex;
209 INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
210 }
211}
212
213/*
214 * TODO: For frame(s) that are in the retry state, we will reuse the
215 * sequence number(s) without setting the retry bit. The
216 * alternative is to give up on these and BAR the receiver's window
217 * forward.
218 */
219static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq,
220 struct ath_atx_tid *tid)
221
222{
223 struct ath_buf *bf;
224 struct list_head bf_head;
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700225 struct ath_tx_status ts;
226
227 memset(&ts, 0, sizeof(ts));
Sujithe8324352009-01-16 21:38:42 +0530228 INIT_LIST_HEAD(&bf_head);
229
230 for (;;) {
231 if (list_empty(&tid->buf_q))
232 break;
Sujithe8324352009-01-16 21:38:42 +0530233
Sujithd43f30152009-01-16 21:38:53 +0530234 bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
235 list_move_tail(&bf->list, &bf_head);
Sujithe8324352009-01-16 21:38:42 +0530236
237 if (bf_isretried(bf))
238 ath_tx_update_baw(sc, tid, bf->bf_seqno);
239
240 spin_unlock(&txq->axq_lock);
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700241 ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
Sujithe8324352009-01-16 21:38:42 +0530242 spin_lock(&txq->axq_lock);
243 }
244
245 tid->seq_next = tid->seq_start;
246 tid->baw_tail = tid->baw_head;
247}
248
Sujithfec247c2009-07-27 12:08:16 +0530249static void ath_tx_set_retry(struct ath_softc *sc, struct ath_txq *txq,
250 struct ath_buf *bf)
Sujithe8324352009-01-16 21:38:42 +0530251{
252 struct sk_buff *skb;
253 struct ieee80211_hdr *hdr;
254
255 bf->bf_state.bf_type |= BUF_RETRY;
256 bf->bf_retries++;
Sujithfec247c2009-07-27 12:08:16 +0530257 TX_STAT_INC(txq->axq_qnum, a_retries);
Sujithe8324352009-01-16 21:38:42 +0530258
259 skb = bf->bf_mpdu;
260 hdr = (struct ieee80211_hdr *)skb->data;
261 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
262}
263
Sujithd43f30152009-01-16 21:38:53 +0530264static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf)
265{
266 struct ath_buf *tbf;
267
268 spin_lock_bh(&sc->tx.txbuflock);
Vasanthakumar Thiagarajan8a460972009-06-10 17:50:09 +0530269 if (WARN_ON(list_empty(&sc->tx.txbuf))) {
270 spin_unlock_bh(&sc->tx.txbuflock);
271 return NULL;
272 }
Sujithd43f30152009-01-16 21:38:53 +0530273 tbf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list);
274 list_del(&tbf->list);
275 spin_unlock_bh(&sc->tx.txbuflock);
276
277 ATH_TXBUF_RESET(tbf);
278
Felix Fietkau827e69b2009-11-15 23:09:25 +0100279 tbf->aphy = bf->aphy;
Sujithd43f30152009-01-16 21:38:53 +0530280 tbf->bf_mpdu = bf->bf_mpdu;
281 tbf->bf_buf_addr = bf->bf_buf_addr;
Vasanthakumar Thiagarajand826c832010-04-15 17:38:45 -0400282 memcpy(tbf->bf_desc, bf->bf_desc, sc->sc_ah->caps.tx_desc_len);
Sujithd43f30152009-01-16 21:38:53 +0530283 tbf->bf_state = bf->bf_state;
284 tbf->bf_dmacontext = bf->bf_dmacontext;
285
286 return tbf;
287}
288
289static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
290 struct ath_buf *bf, struct list_head *bf_q,
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700291 struct ath_tx_status *ts, int txok)
Sujithe8324352009-01-16 21:38:42 +0530292{
293 struct ath_node *an = NULL;
294 struct sk_buff *skb;
Sujith1286ec62009-01-27 13:30:37 +0530295 struct ieee80211_sta *sta;
Luis R. Rodriguez76d5a9e2009-11-02 16:08:34 -0800296 struct ieee80211_hw *hw;
Sujith1286ec62009-01-27 13:30:37 +0530297 struct ieee80211_hdr *hdr;
Luis R. Rodriguez76d5a9e2009-11-02 16:08:34 -0800298 struct ieee80211_tx_info *tx_info;
Sujithe8324352009-01-16 21:38:42 +0530299 struct ath_atx_tid *tid = NULL;
Sujithd43f30152009-01-16 21:38:53 +0530300 struct ath_buf *bf_next, *bf_last = bf->bf_lastbf;
Sujithe8324352009-01-16 21:38:42 +0530301 struct list_head bf_head, bf_pending;
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +0530302 u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0;
Sujithe8324352009-01-16 21:38:42 +0530303 u32 ba[WME_BA_BMP_SIZE >> 5];
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +0530304 int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0;
305 bool rc_update = true;
Sujithe8324352009-01-16 21:38:42 +0530306
Sujitha22be222009-03-30 15:28:36 +0530307 skb = bf->bf_mpdu;
Sujith1286ec62009-01-27 13:30:37 +0530308 hdr = (struct ieee80211_hdr *)skb->data;
Sujithe8324352009-01-16 21:38:42 +0530309
Luis R. Rodriguez76d5a9e2009-11-02 16:08:34 -0800310 tx_info = IEEE80211_SKB_CB(skb);
Felix Fietkau827e69b2009-11-15 23:09:25 +0100311 hw = bf->aphy->hw;
Luis R. Rodriguez76d5a9e2009-11-02 16:08:34 -0800312
Sujith1286ec62009-01-27 13:30:37 +0530313 rcu_read_lock();
314
Johannes Berg5ed176e2009-11-04 14:42:28 +0100315 /* XXX: use ieee80211_find_sta! */
Luis R. Rodriguez76d5a9e2009-11-02 16:08:34 -0800316 sta = ieee80211_find_sta_by_hw(hw, hdr->addr1);
Sujith1286ec62009-01-27 13:30:37 +0530317 if (!sta) {
318 rcu_read_unlock();
319 return;
Sujithe8324352009-01-16 21:38:42 +0530320 }
321
Sujith1286ec62009-01-27 13:30:37 +0530322 an = (struct ath_node *)sta->drv_priv;
323 tid = ATH_AN_2_TID(an, bf->bf_tidno);
324
Sujithe8324352009-01-16 21:38:42 +0530325 isaggr = bf_isaggr(bf);
Sujithd43f30152009-01-16 21:38:53 +0530326 memset(ba, 0, WME_BA_BMP_SIZE >> 3);
Sujithe8324352009-01-16 21:38:42 +0530327
Sujithd43f30152009-01-16 21:38:53 +0530328 if (isaggr && txok) {
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700329 if (ts->ts_flags & ATH9K_TX_BA) {
330 seq_st = ts->ts_seqnum;
331 memcpy(ba, &ts->ba_low, WME_BA_BMP_SIZE >> 3);
Sujithe8324352009-01-16 21:38:42 +0530332 } else {
Sujithd43f30152009-01-16 21:38:53 +0530333 /*
334 * AR5416 can become deaf/mute when BA
335 * issue happens. Chip needs to be reset.
336 * But AP code may have sychronization issues
337 * when perform internal reset in this routine.
338 * Only enable reset in STA mode for now.
339 */
Sujith2660b812009-02-09 13:27:26 +0530340 if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION)
Sujithd43f30152009-01-16 21:38:53 +0530341 needreset = 1;
Sujithe8324352009-01-16 21:38:42 +0530342 }
343 }
344
345 INIT_LIST_HEAD(&bf_pending);
346 INIT_LIST_HEAD(&bf_head);
347
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700348 nbad = ath_tx_num_badfrms(sc, bf, ts, txok);
Sujithe8324352009-01-16 21:38:42 +0530349 while (bf) {
350 txfail = txpending = 0;
351 bf_next = bf->bf_next;
352
353 if (ATH_BA_ISSET(ba, ATH_BA_INDEX(seq_st, bf->bf_seqno))) {
354 /* transmit completion, subframe is
355 * acked by block ack */
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +0530356 acked_cnt++;
Sujithe8324352009-01-16 21:38:42 +0530357 } else if (!isaggr && txok) {
358 /* transmit completion */
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +0530359 acked_cnt++;
Sujithe8324352009-01-16 21:38:42 +0530360 } else {
Sujithe8324352009-01-16 21:38:42 +0530361 if (!(tid->state & AGGR_CLEANUP) &&
Vasanthakumar Thiagarajan6d913f72010-04-15 17:38:46 -0400362 !bf_last->bf_tx_aborted) {
Sujithe8324352009-01-16 21:38:42 +0530363 if (bf->bf_retries < ATH_MAX_SW_RETRIES) {
Sujithfec247c2009-07-27 12:08:16 +0530364 ath_tx_set_retry(sc, txq, bf);
Sujithe8324352009-01-16 21:38:42 +0530365 txpending = 1;
366 } else {
367 bf->bf_state.bf_type |= BUF_XRETRY;
368 txfail = 1;
369 sendbar = 1;
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +0530370 txfail_cnt++;
Sujithe8324352009-01-16 21:38:42 +0530371 }
372 } else {
373 /*
374 * cleanup in progress, just fail
375 * the un-acked sub-frames
376 */
377 txfail = 1;
378 }
379 }
380
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -0400381 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
382 bf_next == NULL) {
Vasanthakumar Thiagarajancbfe89c2009-06-24 18:58:47 +0530383 /*
384 * Make sure the last desc is reclaimed if it
385 * not a holding desc.
386 */
387 if (!bf_last->bf_stale)
388 list_move_tail(&bf->list, &bf_head);
389 else
390 INIT_LIST_HEAD(&bf_head);
Sujithe8324352009-01-16 21:38:42 +0530391 } else {
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -0700392 BUG_ON(list_empty(bf_q));
Sujithd43f30152009-01-16 21:38:53 +0530393 list_move_tail(&bf->list, &bf_head);
Sujithe8324352009-01-16 21:38:42 +0530394 }
395
396 if (!txpending) {
397 /*
398 * complete the acked-ones/xretried ones; update
399 * block-ack window
400 */
401 spin_lock_bh(&txq->axq_lock);
402 ath_tx_update_baw(sc, tid, bf->bf_seqno);
403 spin_unlock_bh(&txq->axq_lock);
404
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +0530405 if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) {
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700406 ath_tx_rc_status(bf, ts, nbad, txok, true);
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +0530407 rc_update = false;
408 } else {
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700409 ath_tx_rc_status(bf, ts, nbad, txok, false);
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +0530410 }
411
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700412 ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
413 !txfail, sendbar);
Sujithe8324352009-01-16 21:38:42 +0530414 } else {
Sujithd43f30152009-01-16 21:38:53 +0530415 /* retry the un-acked ones */
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -0400416 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
417 if (bf->bf_next == NULL && bf_last->bf_stale) {
418 struct ath_buf *tbf;
Sujithe8324352009-01-16 21:38:42 +0530419
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -0400420 tbf = ath_clone_txbuf(sc, bf_last);
421 /*
422 * Update tx baw and complete the
423 * frame with failed status if we
424 * run out of tx buf.
425 */
426 if (!tbf) {
427 spin_lock_bh(&txq->axq_lock);
428 ath_tx_update_baw(sc, tid,
429 bf->bf_seqno);
430 spin_unlock_bh(&txq->axq_lock);
Vasanthakumar Thiagarajanc41d92d2009-07-14 20:17:11 -0400431
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -0400432 bf->bf_state.bf_type |=
433 BUF_XRETRY;
434 ath_tx_rc_status(bf, ts, nbad,
435 0, false);
436 ath_tx_complete_buf(sc, bf, txq,
437 &bf_head,
438 ts, 0, 0);
439 break;
440 }
441
442 ath9k_hw_cleartxdesc(sc->sc_ah,
443 tbf->bf_desc);
444 list_add_tail(&tbf->list, &bf_head);
445 } else {
446 /*
447 * Clear descriptor status words for
448 * software retry
449 */
450 ath9k_hw_cleartxdesc(sc->sc_ah,
451 bf->bf_desc);
Vasanthakumar Thiagarajanc41d92d2009-07-14 20:17:11 -0400452 }
Sujithe8324352009-01-16 21:38:42 +0530453 }
454
455 /*
456 * Put this buffer to the temporary pending
457 * queue to retain ordering
458 */
459 list_splice_tail_init(&bf_head, &bf_pending);
460 }
461
462 bf = bf_next;
463 }
464
465 if (tid->state & AGGR_CLEANUP) {
Sujithe8324352009-01-16 21:38:42 +0530466 if (tid->baw_head == tid->baw_tail) {
467 tid->state &= ~AGGR_ADDBA_COMPLETE;
Sujithe8324352009-01-16 21:38:42 +0530468 tid->state &= ~AGGR_CLEANUP;
469
470 /* send buffered frames as singles */
471 ath_tx_flush_tid(sc, tid);
Sujithd43f30152009-01-16 21:38:53 +0530472 }
Sujith1286ec62009-01-27 13:30:37 +0530473 rcu_read_unlock();
Sujithe8324352009-01-16 21:38:42 +0530474 return;
475 }
476
Sujithd43f30152009-01-16 21:38:53 +0530477 /* prepend un-acked frames to the beginning of the pending frame queue */
Sujithe8324352009-01-16 21:38:42 +0530478 if (!list_empty(&bf_pending)) {
479 spin_lock_bh(&txq->axq_lock);
480 list_splice(&bf_pending, &tid->buf_q);
481 ath_tx_queue_tid(txq, tid);
482 spin_unlock_bh(&txq->axq_lock);
483 }
484
Sujith1286ec62009-01-27 13:30:37 +0530485 rcu_read_unlock();
486
Sujithe8324352009-01-16 21:38:42 +0530487 if (needreset)
488 ath_reset(sc, false);
Sujithe8324352009-01-16 21:38:42 +0530489}
490
491static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
492 struct ath_atx_tid *tid)
493{
Sujithe8324352009-01-16 21:38:42 +0530494 struct sk_buff *skb;
495 struct ieee80211_tx_info *tx_info;
496 struct ieee80211_tx_rate *rates;
Sujithd43f30152009-01-16 21:38:53 +0530497 u32 max_4ms_framelen, frmlen;
Sujith4ef70842009-07-23 15:32:41 +0530498 u16 aggr_limit, legacy = 0;
Sujithe8324352009-01-16 21:38:42 +0530499 int i;
500
Sujitha22be222009-03-30 15:28:36 +0530501 skb = bf->bf_mpdu;
Sujithe8324352009-01-16 21:38:42 +0530502 tx_info = IEEE80211_SKB_CB(skb);
503 rates = tx_info->control.rates;
Sujithe8324352009-01-16 21:38:42 +0530504
505 /*
506 * Find the lowest frame length among the rate series that will have a
507 * 4ms transmit duration.
508 * TODO - TXOP limit needs to be considered.
509 */
510 max_4ms_framelen = ATH_AMPDU_LIMIT_MAX;
511
512 for (i = 0; i < 4; i++) {
513 if (rates[i].count) {
Felix Fietkau545750d2009-11-23 22:21:01 +0100514 int modeidx;
515 if (!(rates[i].flags & IEEE80211_TX_RC_MCS)) {
Sujithe8324352009-01-16 21:38:42 +0530516 legacy = 1;
517 break;
518 }
519
Felix Fietkau545750d2009-11-23 22:21:01 +0100520 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
521 modeidx = MCS_HT40_SGI;
522 else if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
523 modeidx = MCS_HT40;
524 else
525 modeidx = MCS_DEFAULT;
526
527 frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
Sujithd43f30152009-01-16 21:38:53 +0530528 max_4ms_framelen = min(max_4ms_framelen, frmlen);
Sujithe8324352009-01-16 21:38:42 +0530529 }
530 }
531
532 /*
533 * limit aggregate size by the minimum rate if rate selected is
534 * not a probe rate, if rate selected is a probe rate then
535 * avoid aggregation of this packet.
536 */
537 if (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE || legacy)
538 return 0;
539
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +0530540 if (sc->sc_flags & SC_OP_BT_PRIORITY_DETECTED)
541 aggr_limit = min((max_4ms_framelen * 3) / 8,
542 (u32)ATH_AMPDU_LIMIT_MAX);
543 else
544 aggr_limit = min(max_4ms_framelen,
545 (u32)ATH_AMPDU_LIMIT_MAX);
Sujithe8324352009-01-16 21:38:42 +0530546
547 /*
548 * h/w can accept aggregates upto 16 bit lengths (65535).
549 * The IE, however can hold upto 65536, which shows up here
550 * as zero. Ignore 65536 since we are constrained by hw.
551 */
Sujith4ef70842009-07-23 15:32:41 +0530552 if (tid->an->maxampdu)
553 aggr_limit = min(aggr_limit, tid->an->maxampdu);
Sujithe8324352009-01-16 21:38:42 +0530554
555 return aggr_limit;
556}
557
558/*
Sujithd43f30152009-01-16 21:38:53 +0530559 * Returns the number of delimiters to be added to
Sujithe8324352009-01-16 21:38:42 +0530560 * meet the minimum required mpdudensity.
Sujithe8324352009-01-16 21:38:42 +0530561 */
562static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
563 struct ath_buf *bf, u16 frmlen)
564{
Sujithe8324352009-01-16 21:38:42 +0530565 struct sk_buff *skb = bf->bf_mpdu;
566 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
Sujith4ef70842009-07-23 15:32:41 +0530567 u32 nsymbits, nsymbols;
Sujithe8324352009-01-16 21:38:42 +0530568 u16 minlen;
Felix Fietkau545750d2009-11-23 22:21:01 +0100569 u8 flags, rix;
Sujithe8324352009-01-16 21:38:42 +0530570 int width, half_gi, ndelim, mindelim;
571
572 /* Select standard number of delimiters based on frame length alone */
573 ndelim = ATH_AGGR_GET_NDELIM(frmlen);
574
575 /*
576 * If encryption enabled, hardware requires some more padding between
577 * subframes.
578 * TODO - this could be improved to be dependent on the rate.
579 * The hardware can keep up at lower rates, but not higher rates
580 */
581 if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR)
582 ndelim += ATH_AGGR_ENCRYPTDELIM;
583
584 /*
585 * Convert desired mpdu density from microeconds to bytes based
586 * on highest rate in rate series (i.e. first rate) to determine
587 * required minimum length for subframe. Take into account
588 * whether high rate is 20 or 40Mhz and half or full GI.
Sujith4ef70842009-07-23 15:32:41 +0530589 *
Sujithe8324352009-01-16 21:38:42 +0530590 * If there is no mpdu density restriction, no further calculation
591 * is needed.
592 */
Sujith4ef70842009-07-23 15:32:41 +0530593
594 if (tid->an->mpdudensity == 0)
Sujithe8324352009-01-16 21:38:42 +0530595 return ndelim;
596
597 rix = tx_info->control.rates[0].idx;
598 flags = tx_info->control.rates[0].flags;
Sujithe8324352009-01-16 21:38:42 +0530599 width = (flags & IEEE80211_TX_RC_40_MHZ_WIDTH) ? 1 : 0;
600 half_gi = (flags & IEEE80211_TX_RC_SHORT_GI) ? 1 : 0;
601
602 if (half_gi)
Sujith4ef70842009-07-23 15:32:41 +0530603 nsymbols = NUM_SYMBOLS_PER_USEC_HALFGI(tid->an->mpdudensity);
Sujithe8324352009-01-16 21:38:42 +0530604 else
Sujith4ef70842009-07-23 15:32:41 +0530605 nsymbols = NUM_SYMBOLS_PER_USEC(tid->an->mpdudensity);
Sujithe8324352009-01-16 21:38:42 +0530606
607 if (nsymbols == 0)
608 nsymbols = 1;
609
Felix Fietkau545750d2009-11-23 22:21:01 +0100610 nsymbits = bits_per_symbol[rix][width];
Sujithe8324352009-01-16 21:38:42 +0530611 minlen = (nsymbols * nsymbits) / BITS_PER_BYTE;
612
Sujithe8324352009-01-16 21:38:42 +0530613 if (frmlen < minlen) {
Sujithe8324352009-01-16 21:38:42 +0530614 mindelim = (minlen - frmlen) / ATH_AGGR_DELIM_SZ;
615 ndelim = max(mindelim, ndelim);
616 }
617
618 return ndelim;
619}
620
621static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
Sujithfec247c2009-07-27 12:08:16 +0530622 struct ath_txq *txq,
Sujithd43f30152009-01-16 21:38:53 +0530623 struct ath_atx_tid *tid,
624 struct list_head *bf_q)
Sujithe8324352009-01-16 21:38:42 +0530625{
626#define PADBYTES(_len) ((4 - ((_len) % 4)) % 4)
Sujithd43f30152009-01-16 21:38:53 +0530627 struct ath_buf *bf, *bf_first, *bf_prev = NULL;
628 int rl = 0, nframes = 0, ndelim, prev_al = 0;
Sujithe8324352009-01-16 21:38:42 +0530629 u16 aggr_limit = 0, al = 0, bpad = 0,
630 al_delta, h_baw = tid->baw_size / 2;
631 enum ATH_AGGR_STATUS status = ATH_AGGR_DONE;
Sujithe8324352009-01-16 21:38:42 +0530632
633 bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list);
634
635 do {
636 bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
637
Sujithd43f30152009-01-16 21:38:53 +0530638 /* do not step over block-ack window */
Sujithe8324352009-01-16 21:38:42 +0530639 if (!BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno)) {
640 status = ATH_AGGR_BAW_CLOSED;
641 break;
642 }
643
644 if (!rl) {
645 aggr_limit = ath_lookup_rate(sc, bf, tid);
646 rl = 1;
647 }
648
Sujithd43f30152009-01-16 21:38:53 +0530649 /* do not exceed aggregation limit */
Sujithe8324352009-01-16 21:38:42 +0530650 al_delta = ATH_AGGR_DELIM_SZ + bf->bf_frmlen;
651
Sujithd43f30152009-01-16 21:38:53 +0530652 if (nframes &&
653 (aggr_limit < (al + bpad + al_delta + prev_al))) {
Sujithe8324352009-01-16 21:38:42 +0530654 status = ATH_AGGR_LIMITED;
655 break;
656 }
657
Sujithd43f30152009-01-16 21:38:53 +0530658 /* do not exceed subframe limit */
659 if (nframes >= min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) {
Sujithe8324352009-01-16 21:38:42 +0530660 status = ATH_AGGR_LIMITED;
661 break;
662 }
Sujithd43f30152009-01-16 21:38:53 +0530663 nframes++;
Sujithe8324352009-01-16 21:38:42 +0530664
Sujithd43f30152009-01-16 21:38:53 +0530665 /* add padding for previous frame to aggregation length */
Sujithe8324352009-01-16 21:38:42 +0530666 al += bpad + al_delta;
667
668 /*
669 * Get the delimiters needed to meet the MPDU
670 * density for this node.
671 */
672 ndelim = ath_compute_num_delims(sc, tid, bf_first, bf->bf_frmlen);
Sujithe8324352009-01-16 21:38:42 +0530673 bpad = PADBYTES(al_delta) + (ndelim << 2);
674
675 bf->bf_next = NULL;
Vasanthakumar Thiagarajan87d5efb2010-04-15 17:38:43 -0400676 ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0);
Sujithe8324352009-01-16 21:38:42 +0530677
Sujithd43f30152009-01-16 21:38:53 +0530678 /* link buffers of this frame to the aggregate */
Sujithe8324352009-01-16 21:38:42 +0530679 ath_tx_addto_baw(sc, tid, bf);
Sujithd43f30152009-01-16 21:38:53 +0530680 ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim);
681 list_move_tail(&bf->list, bf_q);
Sujithe8324352009-01-16 21:38:42 +0530682 if (bf_prev) {
683 bf_prev->bf_next = bf;
Vasanthakumar Thiagarajan87d5efb2010-04-15 17:38:43 -0400684 ath9k_hw_set_desc_link(sc->sc_ah, bf_prev->bf_desc,
685 bf->bf_daddr);
Sujithe8324352009-01-16 21:38:42 +0530686 }
687 bf_prev = bf;
Sujithfec247c2009-07-27 12:08:16 +0530688
Sujithe8324352009-01-16 21:38:42 +0530689 } while (!list_empty(&tid->buf_q));
690
691 bf_first->bf_al = al;
692 bf_first->bf_nframes = nframes;
Sujithd43f30152009-01-16 21:38:53 +0530693
Sujithe8324352009-01-16 21:38:42 +0530694 return status;
695#undef PADBYTES
696}
697
698static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
699 struct ath_atx_tid *tid)
700{
Sujithd43f30152009-01-16 21:38:53 +0530701 struct ath_buf *bf;
Sujithe8324352009-01-16 21:38:42 +0530702 enum ATH_AGGR_STATUS status;
703 struct list_head bf_q;
Sujithe8324352009-01-16 21:38:42 +0530704
705 do {
706 if (list_empty(&tid->buf_q))
707 return;
708
709 INIT_LIST_HEAD(&bf_q);
710
Sujithfec247c2009-07-27 12:08:16 +0530711 status = ath_tx_form_aggr(sc, txq, tid, &bf_q);
Sujithe8324352009-01-16 21:38:42 +0530712
713 /*
Sujithd43f30152009-01-16 21:38:53 +0530714 * no frames picked up to be aggregated;
715 * block-ack window is not open.
Sujithe8324352009-01-16 21:38:42 +0530716 */
717 if (list_empty(&bf_q))
718 break;
719
720 bf = list_first_entry(&bf_q, struct ath_buf, list);
Sujithd43f30152009-01-16 21:38:53 +0530721 bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list);
Sujithe8324352009-01-16 21:38:42 +0530722
Sujithd43f30152009-01-16 21:38:53 +0530723 /* if only one frame, send as non-aggregate */
Sujithe8324352009-01-16 21:38:42 +0530724 if (bf->bf_nframes == 1) {
Sujithe8324352009-01-16 21:38:42 +0530725 bf->bf_state.bf_type &= ~BUF_AGGR;
Sujithd43f30152009-01-16 21:38:53 +0530726 ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc);
Sujithe8324352009-01-16 21:38:42 +0530727 ath_buf_set_rate(sc, bf);
728 ath_tx_txqaddbuf(sc, txq, &bf_q);
729 continue;
730 }
731
Sujithd43f30152009-01-16 21:38:53 +0530732 /* setup first desc of aggregate */
Sujithe8324352009-01-16 21:38:42 +0530733 bf->bf_state.bf_type |= BUF_AGGR;
734 ath_buf_set_rate(sc, bf);
735 ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al);
736
Sujithd43f30152009-01-16 21:38:53 +0530737 /* anchor last desc of aggregate */
738 ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc);
Sujithe8324352009-01-16 21:38:42 +0530739
Sujithe8324352009-01-16 21:38:42 +0530740 ath_tx_txqaddbuf(sc, txq, &bf_q);
Sujithfec247c2009-07-27 12:08:16 +0530741 TX_STAT_INC(txq->axq_qnum, a_aggr);
Sujithe8324352009-01-16 21:38:42 +0530742
743 } while (txq->axq_depth < ATH_AGGR_MIN_QDEPTH &&
744 status != ATH_AGGR_BAW_CLOSED);
745}
746
Sujithf83da962009-07-23 15:32:37 +0530747void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
748 u16 tid, u16 *ssn)
Sujithe8324352009-01-16 21:38:42 +0530749{
750 struct ath_atx_tid *txtid;
751 struct ath_node *an;
752
753 an = (struct ath_node *)sta->drv_priv;
Sujithf83da962009-07-23 15:32:37 +0530754 txtid = ATH_AN_2_TID(an, tid);
755 txtid->state |= AGGR_ADDBA_PROGRESS;
756 ath_tx_pause_tid(sc, txtid);
757 *ssn = txtid->seq_start;
Sujithe8324352009-01-16 21:38:42 +0530758}
759
Sujithf83da962009-07-23 15:32:37 +0530760void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid)
Sujithe8324352009-01-16 21:38:42 +0530761{
762 struct ath_node *an = (struct ath_node *)sta->drv_priv;
763 struct ath_atx_tid *txtid = ATH_AN_2_TID(an, tid);
764 struct ath_txq *txq = &sc->tx.txq[txtid->ac->qnum];
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700765 struct ath_tx_status ts;
Sujithe8324352009-01-16 21:38:42 +0530766 struct ath_buf *bf;
767 struct list_head bf_head;
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700768
769 memset(&ts, 0, sizeof(ts));
Sujithe8324352009-01-16 21:38:42 +0530770 INIT_LIST_HEAD(&bf_head);
771
772 if (txtid->state & AGGR_CLEANUP)
Sujithf83da962009-07-23 15:32:37 +0530773 return;
Sujithe8324352009-01-16 21:38:42 +0530774
775 if (!(txtid->state & AGGR_ADDBA_COMPLETE)) {
Vasanthakumar Thiagarajan5eae6592009-06-09 15:28:21 +0530776 txtid->state &= ~AGGR_ADDBA_PROGRESS;
Sujithf83da962009-07-23 15:32:37 +0530777 return;
Sujithe8324352009-01-16 21:38:42 +0530778 }
779
780 ath_tx_pause_tid(sc, txtid);
781
782 /* drop all software retried frames and mark this TID */
783 spin_lock_bh(&txq->axq_lock);
784 while (!list_empty(&txtid->buf_q)) {
785 bf = list_first_entry(&txtid->buf_q, struct ath_buf, list);
786 if (!bf_isretried(bf)) {
787 /*
788 * NB: it's based on the assumption that
789 * software retried frame will always stay
790 * at the head of software queue.
791 */
792 break;
793 }
Sujithd43f30152009-01-16 21:38:53 +0530794 list_move_tail(&bf->list, &bf_head);
Sujithe8324352009-01-16 21:38:42 +0530795 ath_tx_update_baw(sc, txtid, bf->bf_seqno);
Felix Fietkaudb1a0522010-03-29 20:07:11 -0700796 ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
Sujithe8324352009-01-16 21:38:42 +0530797 }
Sujithd43f30152009-01-16 21:38:53 +0530798 spin_unlock_bh(&txq->axq_lock);
Sujithe8324352009-01-16 21:38:42 +0530799
800 if (txtid->baw_head != txtid->baw_tail) {
Sujithe8324352009-01-16 21:38:42 +0530801 txtid->state |= AGGR_CLEANUP;
802 } else {
803 txtid->state &= ~AGGR_ADDBA_COMPLETE;
Sujithe8324352009-01-16 21:38:42 +0530804 ath_tx_flush_tid(sc, txtid);
805 }
Sujithe8324352009-01-16 21:38:42 +0530806}
807
808void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid)
809{
810 struct ath_atx_tid *txtid;
811 struct ath_node *an;
812
813 an = (struct ath_node *)sta->drv_priv;
814
815 if (sc->sc_flags & SC_OP_TXAGGR) {
816 txtid = ATH_AN_2_TID(an, tid);
817 txtid->baw_size =
818 IEEE80211_MIN_AMPDU_BUF << sta->ht_cap.ampdu_factor;
819 txtid->state |= AGGR_ADDBA_COMPLETE;
820 txtid->state &= ~AGGR_ADDBA_PROGRESS;
821 ath_tx_resume_tid(sc, txtid);
822 }
823}
824
825bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno)
826{
827 struct ath_atx_tid *txtid;
828
829 if (!(sc->sc_flags & SC_OP_TXAGGR))
830 return false;
831
832 txtid = ATH_AN_2_TID(an, tidno);
833
Vasanthakumar Thiagarajanc3d8f022009-06-10 17:50:08 +0530834 if (!(txtid->state & (AGGR_ADDBA_COMPLETE | AGGR_ADDBA_PROGRESS)))
Sujithe8324352009-01-16 21:38:42 +0530835 return true;
Sujithe8324352009-01-16 21:38:42 +0530836 return false;
837}
838
839/********************/
840/* Queue Management */
841/********************/
842
Sujithe8324352009-01-16 21:38:42 +0530843static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
844 struct ath_txq *txq)
845{
846 struct ath_atx_ac *ac, *ac_tmp;
847 struct ath_atx_tid *tid, *tid_tmp;
848
849 list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
850 list_del(&ac->list);
851 ac->sched = false;
852 list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
853 list_del(&tid->list);
854 tid->sched = false;
855 ath_tid_drain(sc, txq, tid);
856 }
857 }
858}
859
860struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
861{
Sujithcbe61d82009-02-09 13:27:12 +0530862 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700863 struct ath_common *common = ath9k_hw_common(ah);
Sujithe8324352009-01-16 21:38:42 +0530864 struct ath9k_tx_queue_info qi;
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -0400865 int qnum, i;
Sujithe8324352009-01-16 21:38:42 +0530866
867 memset(&qi, 0, sizeof(qi));
868 qi.tqi_subtype = subtype;
869 qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT;
870 qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT;
871 qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT;
872 qi.tqi_physCompBuf = 0;
873
874 /*
875 * Enable interrupts only for EOL and DESC conditions.
876 * We mark tx descriptors to receive a DESC interrupt
877 * when a tx queue gets deep; otherwise waiting for the
878 * EOL to reap descriptors. Note that this is done to
879 * reduce interrupt load and this only defers reaping
880 * descriptors, never transmitting frames. Aside from
881 * reducing interrupts this also permits more concurrency.
882 * The only potential downside is if the tx queue backs
883 * up in which case the top half of the kernel may backup
884 * due to a lack of tx descriptors.
885 *
886 * The UAPSD queue is an exception, since we take a desc-
887 * based intr on the EOSP frames.
888 */
889 if (qtype == ATH9K_TX_QUEUE_UAPSD)
890 qi.tqi_qflags = TXQ_FLAG_TXDESCINT_ENABLE;
891 else
892 qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE |
893 TXQ_FLAG_TXDESCINT_ENABLE;
894 qnum = ath9k_hw_setuptxqueue(ah, qtype, &qi);
895 if (qnum == -1) {
896 /*
897 * NB: don't print a message, this happens
898 * normally on parts with too few tx queues
899 */
900 return NULL;
901 }
902 if (qnum >= ARRAY_SIZE(sc->tx.txq)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700903 ath_print(common, ATH_DBG_FATAL,
904 "qnum %u out of range, max %u!\n",
905 qnum, (unsigned int)ARRAY_SIZE(sc->tx.txq));
Sujithe8324352009-01-16 21:38:42 +0530906 ath9k_hw_releasetxqueue(ah, qnum);
907 return NULL;
908 }
909 if (!ATH_TXQ_SETUP(sc, qnum)) {
910 struct ath_txq *txq = &sc->tx.txq[qnum];
911
912 txq->axq_qnum = qnum;
913 txq->axq_link = NULL;
914 INIT_LIST_HEAD(&txq->axq_q);
915 INIT_LIST_HEAD(&txq->axq_acq);
916 spin_lock_init(&txq->axq_lock);
917 txq->axq_depth = 0;
Senthil Balasubramanian164ace32009-07-14 20:17:09 -0400918 txq->axq_tx_inprogress = false;
Sujithe8324352009-01-16 21:38:42 +0530919 sc->tx.txqsetup |= 1<<qnum;
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -0400920
921 txq->txq_headidx = txq->txq_tailidx = 0;
922 for (i = 0; i < ATH_TXFIFO_DEPTH; i++)
923 INIT_LIST_HEAD(&txq->txq_fifo[i]);
924 INIT_LIST_HEAD(&txq->txq_fifo_pending);
Sujithe8324352009-01-16 21:38:42 +0530925 }
926 return &sc->tx.txq[qnum];
927}
928
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +0530929int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype)
Sujithe8324352009-01-16 21:38:42 +0530930{
931 int qnum;
932
933 switch (qtype) {
934 case ATH9K_TX_QUEUE_DATA:
935 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700936 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
937 "HAL AC %u out of range, max %zu!\n",
938 haltype, ARRAY_SIZE(sc->tx.hwq_map));
Sujithe8324352009-01-16 21:38:42 +0530939 return -1;
940 }
941 qnum = sc->tx.hwq_map[haltype];
942 break;
943 case ATH9K_TX_QUEUE_BEACON:
944 qnum = sc->beacon.beaconq;
945 break;
946 case ATH9K_TX_QUEUE_CAB:
947 qnum = sc->beacon.cabq->axq_qnum;
948 break;
949 default:
950 qnum = -1;
951 }
952 return qnum;
953}
954
955struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb)
956{
957 struct ath_txq *txq = NULL;
Luis R. Rodriguezf52de032009-11-02 17:09:12 -0800958 u16 skb_queue = skb_get_queue_mapping(skb);
Sujithe8324352009-01-16 21:38:42 +0530959 int qnum;
960
Luis R. Rodriguezf52de032009-11-02 17:09:12 -0800961 qnum = ath_get_hal_qnum(skb_queue, sc);
Sujithe8324352009-01-16 21:38:42 +0530962 txq = &sc->tx.txq[qnum];
963
964 spin_lock_bh(&txq->axq_lock);
965
966 if (txq->axq_depth >= (ATH_TXBUF - 20)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700967 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_XMIT,
968 "TX queue: %d is full, depth: %d\n",
969 qnum, txq->axq_depth);
Luis R. Rodriguezf52de032009-11-02 17:09:12 -0800970 ath_mac80211_stop_queue(sc, skb_queue);
Sujithe8324352009-01-16 21:38:42 +0530971 txq->stopped = 1;
972 spin_unlock_bh(&txq->axq_lock);
973 return NULL;
974 }
975
976 spin_unlock_bh(&txq->axq_lock);
977
978 return txq;
979}
980
981int ath_txq_update(struct ath_softc *sc, int qnum,
982 struct ath9k_tx_queue_info *qinfo)
983{
Sujithcbe61d82009-02-09 13:27:12 +0530984 struct ath_hw *ah = sc->sc_ah;
Sujithe8324352009-01-16 21:38:42 +0530985 int error = 0;
986 struct ath9k_tx_queue_info qi;
987
988 if (qnum == sc->beacon.beaconq) {
989 /*
990 * XXX: for beacon queue, we just save the parameter.
991 * It will be picked up by ath_beaconq_config when
992 * it's necessary.
993 */
994 sc->beacon.beacon_qi = *qinfo;
995 return 0;
996 }
997
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -0700998 BUG_ON(sc->tx.txq[qnum].axq_qnum != qnum);
Sujithe8324352009-01-16 21:38:42 +0530999
1000 ath9k_hw_get_txq_props(ah, qnum, &qi);
1001 qi.tqi_aifs = qinfo->tqi_aifs;
1002 qi.tqi_cwmin = qinfo->tqi_cwmin;
1003 qi.tqi_cwmax = qinfo->tqi_cwmax;
1004 qi.tqi_burstTime = qinfo->tqi_burstTime;
1005 qi.tqi_readyTime = qinfo->tqi_readyTime;
1006
1007 if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001008 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1009 "Unable to update hardware queue %u!\n", qnum);
Sujithe8324352009-01-16 21:38:42 +05301010 error = -EIO;
1011 } else {
1012 ath9k_hw_resettxqueue(ah, qnum);
1013 }
1014
1015 return error;
1016}
1017
1018int ath_cabq_update(struct ath_softc *sc)
1019{
1020 struct ath9k_tx_queue_info qi;
1021 int qnum = sc->beacon.cabq->axq_qnum;
Sujithe8324352009-01-16 21:38:42 +05301022
1023 ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi);
1024 /*
1025 * Ensure the readytime % is within the bounds.
1026 */
Sujith17d79042009-02-09 13:27:03 +05301027 if (sc->config.cabqReadytime < ATH9K_READY_TIME_LO_BOUND)
1028 sc->config.cabqReadytime = ATH9K_READY_TIME_LO_BOUND;
1029 else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND)
1030 sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND;
Sujithe8324352009-01-16 21:38:42 +05301031
Johannes Berg57c4d7b2009-04-23 16:10:04 +02001032 qi.tqi_readyTime = (sc->beacon_interval *
Sujithfdbf7332009-02-17 15:36:35 +05301033 sc->config.cabqReadytime) / 100;
Sujithe8324352009-01-16 21:38:42 +05301034 ath_txq_update(sc, qnum, &qi);
1035
1036 return 0;
1037}
1038
Sujith043a0402009-01-16 21:38:47 +05301039/*
1040 * Drain a given TX queue (could be Beacon or Data)
1041 *
1042 * This assumes output has been stopped and
1043 * we do not need to block ath_tx_tasklet.
1044 */
1045void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
Sujithe8324352009-01-16 21:38:42 +05301046{
1047 struct ath_buf *bf, *lastbf;
1048 struct list_head bf_head;
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001049 struct ath_tx_status ts;
1050
1051 memset(&ts, 0, sizeof(ts));
Sujithe8324352009-01-16 21:38:42 +05301052 INIT_LIST_HEAD(&bf_head);
1053
Sujithe8324352009-01-16 21:38:42 +05301054 for (;;) {
1055 spin_lock_bh(&txq->axq_lock);
1056
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001057 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
1058 if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) {
1059 txq->txq_headidx = txq->txq_tailidx = 0;
1060 spin_unlock_bh(&txq->axq_lock);
1061 break;
1062 } else {
1063 bf = list_first_entry(&txq->txq_fifo[txq->txq_tailidx],
1064 struct ath_buf, list);
1065 }
1066 } else {
1067 if (list_empty(&txq->axq_q)) {
1068 txq->axq_link = NULL;
1069 spin_unlock_bh(&txq->axq_lock);
1070 break;
1071 }
1072 bf = list_first_entry(&txq->axq_q, struct ath_buf,
1073 list);
Sujithe8324352009-01-16 21:38:42 +05301074
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001075 if (bf->bf_stale) {
1076 list_del(&bf->list);
1077 spin_unlock_bh(&txq->axq_lock);
Sujithe8324352009-01-16 21:38:42 +05301078
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001079 spin_lock_bh(&sc->tx.txbuflock);
1080 list_add_tail(&bf->list, &sc->tx.txbuf);
1081 spin_unlock_bh(&sc->tx.txbuflock);
1082 continue;
1083 }
Sujithe8324352009-01-16 21:38:42 +05301084 }
1085
1086 lastbf = bf->bf_lastbf;
Vasanthakumar Thiagarajan6d913f72010-04-15 17:38:46 -04001087 if (!retry_tx)
1088 lastbf->bf_tx_aborted = true;
Sujithe8324352009-01-16 21:38:42 +05301089
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001090 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
1091 list_cut_position(&bf_head,
1092 &txq->txq_fifo[txq->txq_tailidx],
1093 &lastbf->list);
1094 INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH);
1095 } else {
1096 /* remove ath_buf's of the same mpdu from txq */
1097 list_cut_position(&bf_head, &txq->axq_q, &lastbf->list);
1098 }
1099
Sujithe8324352009-01-16 21:38:42 +05301100 txq->axq_depth--;
1101
1102 spin_unlock_bh(&txq->axq_lock);
1103
1104 if (bf_isampdu(bf))
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001105 ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0);
Sujithe8324352009-01-16 21:38:42 +05301106 else
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001107 ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
Sujithe8324352009-01-16 21:38:42 +05301108 }
1109
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04001110 spin_lock_bh(&txq->axq_lock);
1111 txq->axq_tx_inprogress = false;
1112 spin_unlock_bh(&txq->axq_lock);
1113
Sujithe8324352009-01-16 21:38:42 +05301114 /* flush any pending frames if aggregation is enabled */
1115 if (sc->sc_flags & SC_OP_TXAGGR) {
1116 if (!retry_tx) {
1117 spin_lock_bh(&txq->axq_lock);
1118 ath_txq_drain_pending_buffers(sc, txq);
1119 spin_unlock_bh(&txq->axq_lock);
1120 }
1121 }
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001122
1123 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
1124 spin_lock_bh(&txq->axq_lock);
1125 while (!list_empty(&txq->txq_fifo_pending)) {
1126 bf = list_first_entry(&txq->txq_fifo_pending,
1127 struct ath_buf, list);
1128 list_cut_position(&bf_head,
1129 &txq->txq_fifo_pending,
1130 &bf->bf_lastbf->list);
1131 spin_unlock_bh(&txq->axq_lock);
1132
1133 if (bf_isampdu(bf))
1134 ath_tx_complete_aggr(sc, txq, bf, &bf_head,
1135 &ts, 0);
1136 else
1137 ath_tx_complete_buf(sc, bf, txq, &bf_head,
1138 &ts, 0, 0);
1139 spin_lock_bh(&txq->axq_lock);
1140 }
1141 spin_unlock_bh(&txq->axq_lock);
1142 }
Sujithe8324352009-01-16 21:38:42 +05301143}
1144
Sujith043a0402009-01-16 21:38:47 +05301145void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
1146{
Sujithcbe61d82009-02-09 13:27:12 +05301147 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001148 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith043a0402009-01-16 21:38:47 +05301149 struct ath_txq *txq;
1150 int i, npend = 0;
1151
1152 if (sc->sc_flags & SC_OP_INVALID)
1153 return;
1154
1155 /* Stop beacon queue */
1156 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1157
1158 /* Stop data queues */
1159 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1160 if (ATH_TXQ_SETUP(sc, i)) {
1161 txq = &sc->tx.txq[i];
1162 ath9k_hw_stoptxdma(ah, txq->axq_qnum);
1163 npend += ath9k_hw_numtxpending(ah, txq->axq_qnum);
1164 }
1165 }
1166
1167 if (npend) {
1168 int r;
1169
Sujithe8009e92009-12-14 14:57:08 +05301170 ath_print(common, ATH_DBG_FATAL,
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001171 "Unable to stop TxDMA. Reset HAL!\n");
Sujith043a0402009-01-16 21:38:47 +05301172
1173 spin_lock_bh(&sc->sc_resetlock);
Sujithe8009e92009-12-14 14:57:08 +05301174 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
Sujith043a0402009-01-16 21:38:47 +05301175 if (r)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001176 ath_print(common, ATH_DBG_FATAL,
1177 "Unable to reset hardware; reset status %d\n",
1178 r);
Sujith043a0402009-01-16 21:38:47 +05301179 spin_unlock_bh(&sc->sc_resetlock);
1180 }
1181
1182 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1183 if (ATH_TXQ_SETUP(sc, i))
1184 ath_draintxq(sc, &sc->tx.txq[i], retry_tx);
1185 }
1186}
1187
Sujithe8324352009-01-16 21:38:42 +05301188void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
1189{
1190 ath9k_hw_releasetxqueue(sc->sc_ah, txq->axq_qnum);
1191 sc->tx.txqsetup &= ~(1<<txq->axq_qnum);
1192}
1193
Sujithe8324352009-01-16 21:38:42 +05301194void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
1195{
1196 struct ath_atx_ac *ac;
1197 struct ath_atx_tid *tid;
1198
1199 if (list_empty(&txq->axq_acq))
1200 return;
1201
1202 ac = list_first_entry(&txq->axq_acq, struct ath_atx_ac, list);
1203 list_del(&ac->list);
1204 ac->sched = false;
1205
1206 do {
1207 if (list_empty(&ac->tid_q))
1208 return;
1209
1210 tid = list_first_entry(&ac->tid_q, struct ath_atx_tid, list);
1211 list_del(&tid->list);
1212 tid->sched = false;
1213
1214 if (tid->paused)
1215 continue;
1216
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04001217 ath_tx_sched_aggr(sc, txq, tid);
Sujithe8324352009-01-16 21:38:42 +05301218
1219 /*
1220 * add tid to round-robin queue if more frames
1221 * are pending for the tid
1222 */
1223 if (!list_empty(&tid->buf_q))
1224 ath_tx_queue_tid(txq, tid);
1225
1226 break;
1227 } while (!list_empty(&ac->tid_q));
1228
1229 if (!list_empty(&ac->tid_q)) {
1230 if (!ac->sched) {
1231 ac->sched = true;
1232 list_add_tail(&ac->list, &txq->axq_acq);
1233 }
1234 }
1235}
1236
1237int ath_tx_setup(struct ath_softc *sc, int haltype)
1238{
1239 struct ath_txq *txq;
1240
1241 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001242 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1243 "HAL AC %u out of range, max %zu!\n",
Sujithe8324352009-01-16 21:38:42 +05301244 haltype, ARRAY_SIZE(sc->tx.hwq_map));
1245 return 0;
1246 }
1247 txq = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, haltype);
1248 if (txq != NULL) {
1249 sc->tx.hwq_map[haltype] = txq->axq_qnum;
1250 return 1;
1251 } else
1252 return 0;
1253}
1254
1255/***********/
1256/* TX, DMA */
1257/***********/
1258
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001259/*
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001260 * Insert a chain of ath_buf (descriptors) on a txq and
1261 * assume the descriptors are already chained together by caller.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001262 */
Sujith102e0572008-10-29 10:15:16 +05301263static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
1264 struct list_head *head)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001265{
Sujithcbe61d82009-02-09 13:27:12 +05301266 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001267 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001268 struct ath_buf *bf;
Sujith102e0572008-10-29 10:15:16 +05301269
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001270 /*
1271 * Insert the frame on the outbound list and
1272 * pass it on to the hardware.
1273 */
1274
1275 if (list_empty(head))
1276 return;
1277
1278 bf = list_first_entry(head, struct ath_buf, list);
1279
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001280 ath_print(common, ATH_DBG_QUEUE,
1281 "qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001282
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001283 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
1284 if (txq->axq_depth >= ATH_TXFIFO_DEPTH) {
1285 list_splice_tail_init(head, &txq->txq_fifo_pending);
1286 return;
1287 }
1288 if (!list_empty(&txq->txq_fifo[txq->txq_headidx]))
1289 ath_print(common, ATH_DBG_XMIT,
1290 "Initializing tx fifo %d which "
1291 "is non-empty\n",
1292 txq->txq_headidx);
1293 INIT_LIST_HEAD(&txq->txq_fifo[txq->txq_headidx]);
1294 list_splice_init(head, &txq->txq_fifo[txq->txq_headidx]);
1295 INCR(txq->txq_headidx, ATH_TXFIFO_DEPTH);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001296 ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001297 ath_print(common, ATH_DBG_XMIT,
1298 "TXDP[%u] = %llx (%p)\n",
1299 txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001300 } else {
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001301 list_splice_tail_init(head, &txq->axq_q);
1302
1303 if (txq->axq_link == NULL) {
1304 ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
1305 ath_print(common, ATH_DBG_XMIT,
1306 "TXDP[%u] = %llx (%p)\n",
1307 txq->axq_qnum, ito64(bf->bf_daddr),
1308 bf->bf_desc);
1309 } else {
1310 *txq->axq_link = bf->bf_daddr;
1311 ath_print(common, ATH_DBG_XMIT,
1312 "link[%u] (%p)=%llx (%p)\n",
1313 txq->axq_qnum, txq->axq_link,
1314 ito64(bf->bf_daddr), bf->bf_desc);
1315 }
1316 ath9k_hw_get_desc_link(ah, bf->bf_lastbf->bf_desc,
1317 &txq->axq_link);
1318 ath9k_hw_txstart(ah, txq->axq_qnum);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001319 }
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04001320 txq->axq_depth++;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001321}
1322
Sujithe8324352009-01-16 21:38:42 +05301323static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
Sujithc4288392008-11-18 09:09:30 +05301324{
Sujithe8324352009-01-16 21:38:42 +05301325 struct ath_buf *bf = NULL;
Sujithc4288392008-11-18 09:09:30 +05301326
Sujithe8324352009-01-16 21:38:42 +05301327 spin_lock_bh(&sc->tx.txbuflock);
Sujithc4288392008-11-18 09:09:30 +05301328
Sujithe8324352009-01-16 21:38:42 +05301329 if (unlikely(list_empty(&sc->tx.txbuf))) {
1330 spin_unlock_bh(&sc->tx.txbuflock);
1331 return NULL;
Sujithc4288392008-11-18 09:09:30 +05301332 }
1333
Sujithe8324352009-01-16 21:38:42 +05301334 bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list);
1335 list_del(&bf->list);
Sujithc4288392008-11-18 09:09:30 +05301336
Sujithe8324352009-01-16 21:38:42 +05301337 spin_unlock_bh(&sc->tx.txbuflock);
Sujithc4288392008-11-18 09:09:30 +05301338
Sujithe8324352009-01-16 21:38:42 +05301339 return bf;
1340}
Sujithc4288392008-11-18 09:09:30 +05301341
Sujithe8324352009-01-16 21:38:42 +05301342static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
1343 struct list_head *bf_head,
1344 struct ath_tx_control *txctl)
1345{
1346 struct ath_buf *bf;
1347
Sujithe8324352009-01-16 21:38:42 +05301348 bf = list_first_entry(bf_head, struct ath_buf, list);
1349 bf->bf_state.bf_type |= BUF_AMPDU;
Sujithfec247c2009-07-27 12:08:16 +05301350 TX_STAT_INC(txctl->txq->axq_qnum, a_queued);
Sujithe8324352009-01-16 21:38:42 +05301351
1352 /*
1353 * Do not queue to h/w when any of the following conditions is true:
1354 * - there are pending frames in software queue
1355 * - the TID is currently paused for ADDBA/BAR request
1356 * - seqno is not within block-ack window
1357 * - h/w queue depth exceeds low water mark
1358 */
1359 if (!list_empty(&tid->buf_q) || tid->paused ||
1360 !BAW_WITHIN(tid->seq_start, tid->baw_size, bf->bf_seqno) ||
1361 txctl->txq->axq_depth >= ATH_AGGR_MIN_QDEPTH) {
Jouni Malinenf7a276a2008-12-15 16:02:04 +02001362 /*
Sujithe8324352009-01-16 21:38:42 +05301363 * Add this frame to software queue for scheduling later
1364 * for aggregation.
Jouni Malinenf7a276a2008-12-15 16:02:04 +02001365 */
Sujithd43f30152009-01-16 21:38:53 +05301366 list_move_tail(&bf->list, &tid->buf_q);
Sujithe8324352009-01-16 21:38:42 +05301367 ath_tx_queue_tid(txctl->txq, tid);
1368 return;
Jouni Malinenf7a276a2008-12-15 16:02:04 +02001369 }
1370
Sujithe8324352009-01-16 21:38:42 +05301371 /* Add sub-frame to BAW */
1372 ath_tx_addto_baw(sc, tid, bf);
1373
1374 /* Queue to h/w without aggregation */
1375 bf->bf_nframes = 1;
Sujithd43f30152009-01-16 21:38:53 +05301376 bf->bf_lastbf = bf;
Sujithe8324352009-01-16 21:38:42 +05301377 ath_buf_set_rate(sc, bf);
1378 ath_tx_txqaddbuf(sc, txctl->txq, bf_head);
Sujithc4288392008-11-18 09:09:30 +05301379}
1380
Sujithc37452b2009-03-09 09:31:57 +05301381static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
1382 struct ath_atx_tid *tid,
1383 struct list_head *bf_head)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001384{
Sujithe8324352009-01-16 21:38:42 +05301385 struct ath_buf *bf;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001386
Sujithe8324352009-01-16 21:38:42 +05301387 bf = list_first_entry(bf_head, struct ath_buf, list);
1388 bf->bf_state.bf_type &= ~BUF_AMPDU;
1389
1390 /* update starting sequence number for subsequent ADDBA request */
1391 INCR(tid->seq_start, IEEE80211_SEQ_MAX);
1392
1393 bf->bf_nframes = 1;
Sujithd43f30152009-01-16 21:38:53 +05301394 bf->bf_lastbf = bf;
Sujithe8324352009-01-16 21:38:42 +05301395 ath_buf_set_rate(sc, bf);
1396 ath_tx_txqaddbuf(sc, txq, bf_head);
Sujithfec247c2009-07-27 12:08:16 +05301397 TX_STAT_INC(txq->axq_qnum, queued);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001398}
1399
Sujithc37452b2009-03-09 09:31:57 +05301400static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
1401 struct list_head *bf_head)
1402{
1403 struct ath_buf *bf;
1404
1405 bf = list_first_entry(bf_head, struct ath_buf, list);
1406
1407 bf->bf_lastbf = bf;
1408 bf->bf_nframes = 1;
1409 ath_buf_set_rate(sc, bf);
1410 ath_tx_txqaddbuf(sc, txq, bf_head);
Sujithfec247c2009-07-27 12:08:16 +05301411 TX_STAT_INC(txq->axq_qnum, queued);
Sujithc37452b2009-03-09 09:31:57 +05301412}
1413
Sujith528f0c62008-10-29 10:14:26 +05301414static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001415{
Sujith528f0c62008-10-29 10:14:26 +05301416 struct ieee80211_hdr *hdr;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001417 enum ath9k_pkt_type htype;
1418 __le16 fc;
1419
Sujith528f0c62008-10-29 10:14:26 +05301420 hdr = (struct ieee80211_hdr *)skb->data;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001421 fc = hdr->frame_control;
1422
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001423 if (ieee80211_is_beacon(fc))
1424 htype = ATH9K_PKT_TYPE_BEACON;
1425 else if (ieee80211_is_probe_resp(fc))
1426 htype = ATH9K_PKT_TYPE_PROBE_RESP;
1427 else if (ieee80211_is_atim(fc))
1428 htype = ATH9K_PKT_TYPE_ATIM;
1429 else if (ieee80211_is_pspoll(fc))
1430 htype = ATH9K_PKT_TYPE_PSPOLL;
1431 else
1432 htype = ATH9K_PKT_TYPE_NORMAL;
1433
1434 return htype;
1435}
1436
Sujith528f0c62008-10-29 10:14:26 +05301437static int get_hw_crypto_keytype(struct sk_buff *skb)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001438{
Sujith528f0c62008-10-29 10:14:26 +05301439 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1440
1441 if (tx_info->control.hw_key) {
1442 if (tx_info->control.hw_key->alg == ALG_WEP)
1443 return ATH9K_KEY_TYPE_WEP;
1444 else if (tx_info->control.hw_key->alg == ALG_TKIP)
1445 return ATH9K_KEY_TYPE_TKIP;
1446 else if (tx_info->control.hw_key->alg == ALG_CCMP)
1447 return ATH9K_KEY_TYPE_AES;
1448 }
1449
1450 return ATH9K_KEY_TYPE_CLEAR;
1451}
1452
Sujith528f0c62008-10-29 10:14:26 +05301453static void assign_aggr_tid_seqno(struct sk_buff *skb,
1454 struct ath_buf *bf)
1455{
1456 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1457 struct ieee80211_hdr *hdr;
1458 struct ath_node *an;
1459 struct ath_atx_tid *tid;
1460 __le16 fc;
1461 u8 *qc;
1462
1463 if (!tx_info->control.sta)
1464 return;
1465
1466 an = (struct ath_node *)tx_info->control.sta->drv_priv;
1467 hdr = (struct ieee80211_hdr *)skb->data;
1468 fc = hdr->frame_control;
1469
Sujith528f0c62008-10-29 10:14:26 +05301470 if (ieee80211_is_data_qos(fc)) {
1471 qc = ieee80211_get_qos_ctl(hdr);
1472 bf->bf_tidno = qc[0] & 0xf;
Sujith98deeea2008-08-11 14:05:46 +05301473 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001474
Sujithe8324352009-01-16 21:38:42 +05301475 /*
1476 * For HT capable stations, we save tidno for later use.
Senthil Balasubramaniand3a1db12008-12-22 16:31:58 +05301477 * We also override seqno set by upper layer with the one
1478 * in tx aggregation state.
Senthil Balasubramaniand3a1db12008-12-22 16:31:58 +05301479 */
1480 tid = ATH_AN_2_TID(an, bf->bf_tidno);
Sujith17b182e2009-12-14 14:56:56 +05301481 hdr->seq_ctrl = cpu_to_le16(tid->seq_next << IEEE80211_SEQ_SEQ_SHIFT);
Senthil Balasubramaniand3a1db12008-12-22 16:31:58 +05301482 bf->bf_seqno = tid->seq_next;
1483 INCR(tid->seq_next, IEEE80211_SEQ_MAX);
Sujith528f0c62008-10-29 10:14:26 +05301484}
1485
Luis R. Rodriguezb0a33442010-04-15 17:39:39 -04001486static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc)
Sujith528f0c62008-10-29 10:14:26 +05301487{
1488 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1489 int flags = 0;
1490
1491 flags |= ATH9K_TXDESC_CLRDMASK; /* needed for crypto errors */
1492 flags |= ATH9K_TXDESC_INTREQ;
1493
1494 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
1495 flags |= ATH9K_TXDESC_NOACK;
Sujith528f0c62008-10-29 10:14:26 +05301496
Luis R. Rodriguezb0a33442010-04-15 17:39:39 -04001497 if (use_ldpc)
1498 flags |= ATH9K_TXDESC_LDPC;
1499
Sujith528f0c62008-10-29 10:14:26 +05301500 return flags;
1501}
1502
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001503/*
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001504 * rix - rate index
1505 * pktlen - total bytes (delims + data + fcs + pads + pad delims)
1506 * width - 0 for 20 MHz, 1 for 40 MHz
1507 * half_gi - to use 4us v/s 3.6 us for symbol time
1508 */
Sujith102e0572008-10-29 10:15:16 +05301509static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
1510 int width, int half_gi, bool shortPreamble)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001511{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001512 u32 nbits, nsymbits, duration, nsymbols;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001513 int streams, pktlen;
1514
Sujithcd3d39a2008-08-11 14:03:34 +05301515 pktlen = bf_isaggr(bf) ? bf->bf_al : bf->bf_frmlen;
Sujithe63835b2008-11-18 09:07:53 +05301516
1517 /* find number of symbols: PLCP + data */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001518 nbits = (pktlen << 3) + OFDM_PLCP_BITS;
Felix Fietkau545750d2009-11-23 22:21:01 +01001519 nsymbits = bits_per_symbol[rix][width];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001520 nsymbols = (nbits + nsymbits - 1) / nsymbits;
1521
1522 if (!half_gi)
1523 duration = SYMBOL_TIME(nsymbols);
1524 else
1525 duration = SYMBOL_TIME_HALFGI(nsymbols);
1526
Sujithe63835b2008-11-18 09:07:53 +05301527 /* addup duration for legacy/ht training and signal fields */
Felix Fietkau545750d2009-11-23 22:21:01 +01001528 streams = HT_RC_2_STREAMS(rix);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001529 duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
Sujith102e0572008-10-29 10:15:16 +05301530
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001531 return duration;
1532}
1533
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001534static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
1535{
Luis R. Rodriguez43c27612009-09-13 21:07:07 -07001536 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001537 struct ath9k_11n_rate_series series[4];
Sujith528f0c62008-10-29 10:14:26 +05301538 struct sk_buff *skb;
1539 struct ieee80211_tx_info *tx_info;
Sujitha8efee42008-11-18 09:07:30 +05301540 struct ieee80211_tx_rate *rates;
Felix Fietkau545750d2009-11-23 22:21:01 +01001541 const struct ieee80211_rate *rate;
Sujith254ad0f2009-02-04 08:10:19 +05301542 struct ieee80211_hdr *hdr;
Sujithc89424d2009-01-30 14:29:28 +05301543 int i, flags = 0;
1544 u8 rix = 0, ctsrate = 0;
Sujith254ad0f2009-02-04 08:10:19 +05301545 bool is_pspoll;
Sujithe63835b2008-11-18 09:07:53 +05301546
1547 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
Sujith528f0c62008-10-29 10:14:26 +05301548
Sujitha22be222009-03-30 15:28:36 +05301549 skb = bf->bf_mpdu;
Sujith528f0c62008-10-29 10:14:26 +05301550 tx_info = IEEE80211_SKB_CB(skb);
Sujithe63835b2008-11-18 09:07:53 +05301551 rates = tx_info->control.rates;
Sujith254ad0f2009-02-04 08:10:19 +05301552 hdr = (struct ieee80211_hdr *)skb->data;
1553 is_pspoll = ieee80211_is_pspoll(hdr->frame_control);
Sujith528f0c62008-10-29 10:14:26 +05301554
Sujithc89424d2009-01-30 14:29:28 +05301555 /*
1556 * We check if Short Preamble is needed for the CTS rate by
1557 * checking the BSS's global flag.
1558 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
1559 */
Felix Fietkau545750d2009-11-23 22:21:01 +01001560 rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
1561 ctsrate = rate->hw_value;
Sujithc89424d2009-01-30 14:29:28 +05301562 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
Felix Fietkau545750d2009-11-23 22:21:01 +01001563 ctsrate |= rate->hw_value_short;
Luis R. Rodriguez96742252008-12-23 15:58:38 -08001564
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001565 for (i = 0; i < 4; i++) {
Felix Fietkau545750d2009-11-23 22:21:01 +01001566 bool is_40, is_sgi, is_sp;
1567 int phy;
1568
Sujithe63835b2008-11-18 09:07:53 +05301569 if (!rates[i].count || (rates[i].idx < 0))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001570 continue;
1571
Sujitha8efee42008-11-18 09:07:30 +05301572 rix = rates[i].idx;
Sujitha8efee42008-11-18 09:07:30 +05301573 series[i].Tries = rates[i].count;
Luis R. Rodriguez43c27612009-09-13 21:07:07 -07001574 series[i].ChSel = common->tx_chainmask;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001575
Felix Fietkau27032052010-01-17 21:08:50 +01001576 if ((sc->config.ath_aggr_prot && bf_isaggr(bf)) ||
1577 (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS)) {
Sujithc89424d2009-01-30 14:29:28 +05301578 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
Felix Fietkau27032052010-01-17 21:08:50 +01001579 flags |= ATH9K_TXDESC_RTSENA;
1580 } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
1581 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
1582 flags |= ATH9K_TXDESC_CTSENA;
1583 }
1584
Sujithc89424d2009-01-30 14:29:28 +05301585 if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
1586 series[i].RateFlags |= ATH9K_RATESERIES_2040;
1587 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
1588 series[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001589
Felix Fietkau545750d2009-11-23 22:21:01 +01001590 is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
1591 is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
1592 is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
1593
1594 if (rates[i].flags & IEEE80211_TX_RC_MCS) {
1595 /* MCS rates */
1596 series[i].Rate = rix | 0x80;
1597 series[i].PktDuration = ath_pkt_duration(sc, rix, bf,
1598 is_40, is_sgi, is_sp);
1599 continue;
1600 }
1601
1602 /* legcay rates */
1603 if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
1604 !(rate->flags & IEEE80211_RATE_ERP_G))
1605 phy = WLAN_RC_PHY_CCK;
1606 else
1607 phy = WLAN_RC_PHY_OFDM;
1608
1609 rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
1610 series[i].Rate = rate->hw_value;
1611 if (rate->hw_value_short) {
1612 if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
1613 series[i].Rate |= rate->hw_value_short;
1614 } else {
1615 is_sp = false;
1616 }
1617
1618 series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
1619 phy, rate->bitrate * 100, bf->bf_frmlen, rix, is_sp);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001620 }
1621
Felix Fietkau27032052010-01-17 21:08:50 +01001622 /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
1623 if (bf_isaggr(bf) && (bf->bf_al > sc->sc_ah->caps.rts_aggr_limit))
1624 flags &= ~ATH9K_TXDESC_RTSENA;
1625
1626 /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
1627 if (flags & ATH9K_TXDESC_RTSENA)
1628 flags &= ~ATH9K_TXDESC_CTSENA;
1629
Sujithe63835b2008-11-18 09:07:53 +05301630 /* set dur_update_en for l-sig computation except for PS-Poll frames */
Sujithc89424d2009-01-30 14:29:28 +05301631 ath9k_hw_set11n_ratescenario(sc->sc_ah, bf->bf_desc,
1632 bf->bf_lastbf->bf_desc,
Sujith254ad0f2009-02-04 08:10:19 +05301633 !is_pspoll, ctsrate,
Sujithc89424d2009-01-30 14:29:28 +05301634 0, series, 4, flags);
Sujith102e0572008-10-29 10:15:16 +05301635
Sujith17d79042009-02-09 13:27:03 +05301636 if (sc->config.ath_aggr_prot && flags)
Sujithc89424d2009-01-30 14:29:28 +05301637 ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001638}
1639
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001640static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
Sujithe8324352009-01-16 21:38:42 +05301641 struct sk_buff *skb,
1642 struct ath_tx_control *txctl)
1643{
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001644 struct ath_wiphy *aphy = hw->priv;
1645 struct ath_softc *sc = aphy->sc;
Sujithe8324352009-01-16 21:38:42 +05301646 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1647 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Sujithe8324352009-01-16 21:38:42 +05301648 int hdrlen;
1649 __le16 fc;
Benoit Papillault1bc14882009-11-24 15:49:18 +01001650 int padpos, padsize;
Luis R. Rodriguezb0a33442010-04-15 17:39:39 -04001651 bool use_ldpc = false;
Sujithe8324352009-01-16 21:38:42 +05301652
Felix Fietkau827e69b2009-11-15 23:09:25 +01001653 tx_info->pad[0] = 0;
1654 switch (txctl->frame_type) {
Pavel Roskinc81494d2010-03-31 18:05:25 -04001655 case ATH9K_IFT_NOT_INTERNAL:
Felix Fietkau827e69b2009-11-15 23:09:25 +01001656 break;
Pavel Roskinc81494d2010-03-31 18:05:25 -04001657 case ATH9K_IFT_PAUSE:
Felix Fietkau827e69b2009-11-15 23:09:25 +01001658 tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_PAUSE;
1659 /* fall through */
Pavel Roskinc81494d2010-03-31 18:05:25 -04001660 case ATH9K_IFT_UNPAUSE:
Felix Fietkau827e69b2009-11-15 23:09:25 +01001661 tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_INTERNAL;
1662 break;
1663 }
Sujithe8324352009-01-16 21:38:42 +05301664 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1665 fc = hdr->frame_control;
1666
1667 ATH_TXBUF_RESET(bf);
1668
Felix Fietkau827e69b2009-11-15 23:09:25 +01001669 bf->aphy = aphy;
Benoit Papillault1bc14882009-11-24 15:49:18 +01001670 bf->bf_frmlen = skb->len + FCS_LEN;
1671 /* Remove the padding size from bf_frmlen, if any */
1672 padpos = ath9k_cmn_padpos(hdr->frame_control);
1673 padsize = padpos & 3;
1674 if (padsize && skb->len>padpos+padsize) {
1675 bf->bf_frmlen -= padsize;
1676 }
Sujithe8324352009-01-16 21:38:42 +05301677
Luis R. Rodriguezb0a33442010-04-15 17:39:39 -04001678 if (conf_is_ht(&hw->conf)) {
Sujithc656bbb2009-01-16 21:38:56 +05301679 bf->bf_state.bf_type |= BUF_HT;
Luis R. Rodriguezb0a33442010-04-15 17:39:39 -04001680 if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
1681 use_ldpc = true;
1682 }
Sujithe8324352009-01-16 21:38:42 +05301683
Luis R. Rodriguezb0a33442010-04-15 17:39:39 -04001684 bf->bf_flags = setup_tx_flags(skb, use_ldpc);
Sujithe8324352009-01-16 21:38:42 +05301685
1686 bf->bf_keytype = get_hw_crypto_keytype(skb);
Sujithe8324352009-01-16 21:38:42 +05301687 if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR) {
1688 bf->bf_frmlen += tx_info->control.hw_key->icv_len;
1689 bf->bf_keyix = tx_info->control.hw_key->hw_key_idx;
1690 } else {
1691 bf->bf_keyix = ATH9K_TXKEYIX_INVALID;
1692 }
1693
Sujith17b182e2009-12-14 14:56:56 +05301694 if (ieee80211_is_data_qos(fc) && bf_isht(bf) &&
1695 (sc->sc_flags & SC_OP_TXAGGR))
Sujithe8324352009-01-16 21:38:42 +05301696 assign_aggr_tid_seqno(skb, bf);
1697
1698 bf->bf_mpdu = skb;
1699
1700 bf->bf_dmacontext = dma_map_single(sc->dev, skb->data,
1701 skb->len, DMA_TO_DEVICE);
1702 if (unlikely(dma_mapping_error(sc->dev, bf->bf_dmacontext))) {
1703 bf->bf_mpdu = NULL;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001704 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1705 "dma_mapping_error() on TX\n");
Sujithe8324352009-01-16 21:38:42 +05301706 return -ENOMEM;
1707 }
1708
1709 bf->bf_buf_addr = bf->bf_dmacontext;
Luis R. Rodrigueze7824a52009-11-24 02:53:25 -05001710
1711 /* tag if this is a nullfunc frame to enable PS when AP acks it */
1712 if (ieee80211_is_nullfunc(fc) && ieee80211_has_pm(fc)) {
1713 bf->bf_isnullfunc = true;
Sujith1b04b932010-01-08 10:36:05 +05301714 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
Luis R. Rodrigueze7824a52009-11-24 02:53:25 -05001715 } else
1716 bf->bf_isnullfunc = false;
1717
Sujithe8324352009-01-16 21:38:42 +05301718 return 0;
1719}
1720
1721/* FIXME: tx power */
1722static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
1723 struct ath_tx_control *txctl)
1724{
Sujitha22be222009-03-30 15:28:36 +05301725 struct sk_buff *skb = bf->bf_mpdu;
Sujithe8324352009-01-16 21:38:42 +05301726 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
Sujithc37452b2009-03-09 09:31:57 +05301727 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Sujithe8324352009-01-16 21:38:42 +05301728 struct ath_node *an = NULL;
1729 struct list_head bf_head;
1730 struct ath_desc *ds;
1731 struct ath_atx_tid *tid;
Sujithcbe61d82009-02-09 13:27:12 +05301732 struct ath_hw *ah = sc->sc_ah;
Sujithe8324352009-01-16 21:38:42 +05301733 int frm_type;
Sujithc37452b2009-03-09 09:31:57 +05301734 __le16 fc;
Sujithe8324352009-01-16 21:38:42 +05301735
1736 frm_type = get_hw_packet_type(skb);
Sujithc37452b2009-03-09 09:31:57 +05301737 fc = hdr->frame_control;
Sujithe8324352009-01-16 21:38:42 +05301738
1739 INIT_LIST_HEAD(&bf_head);
1740 list_add_tail(&bf->list, &bf_head);
1741
1742 ds = bf->bf_desc;
Vasanthakumar Thiagarajan87d5efb2010-04-15 17:38:43 -04001743 ath9k_hw_set_desc_link(ah, ds, 0);
Sujithe8324352009-01-16 21:38:42 +05301744
1745 ath9k_hw_set11n_txdesc(ah, ds, bf->bf_frmlen, frm_type, MAX_RATE_POWER,
1746 bf->bf_keyix, bf->bf_keytype, bf->bf_flags);
1747
1748 ath9k_hw_filltxdesc(ah, ds,
1749 skb->len, /* segment length */
1750 true, /* first segment */
1751 true, /* last segment */
Vasanthakumar Thiagarajan3f3a1c82010-04-15 17:38:42 -04001752 ds, /* first descriptor */
Vasanthakumar Thiagarajancc610ac02010-04-15 17:39:26 -04001753 bf->bf_buf_addr,
1754 txctl->txq->axq_qnum);
Sujithe8324352009-01-16 21:38:42 +05301755
Sujithe8324352009-01-16 21:38:42 +05301756 spin_lock_bh(&txctl->txq->axq_lock);
1757
1758 if (bf_isht(bf) && (sc->sc_flags & SC_OP_TXAGGR) &&
1759 tx_info->control.sta) {
1760 an = (struct ath_node *)tx_info->control.sta->drv_priv;
1761 tid = ATH_AN_2_TID(an, bf->bf_tidno);
1762
Sujithc37452b2009-03-09 09:31:57 +05301763 if (!ieee80211_is_data_qos(fc)) {
1764 ath_tx_send_normal(sc, txctl->txq, &bf_head);
1765 goto tx_done;
1766 }
1767
Felix Fietkau4fdec032010-03-12 04:02:43 +01001768 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
Sujithe8324352009-01-16 21:38:42 +05301769 /*
1770 * Try aggregation if it's a unicast data frame
1771 * and the destination is HT capable.
1772 */
1773 ath_tx_send_ampdu(sc, tid, &bf_head, txctl);
1774 } else {
1775 /*
1776 * Send this frame as regular when ADDBA
1777 * exchange is neither complete nor pending.
1778 */
Sujithc37452b2009-03-09 09:31:57 +05301779 ath_tx_send_ht_normal(sc, txctl->txq,
1780 tid, &bf_head);
Sujithe8324352009-01-16 21:38:42 +05301781 }
1782 } else {
Sujithc37452b2009-03-09 09:31:57 +05301783 ath_tx_send_normal(sc, txctl->txq, &bf_head);
Sujithe8324352009-01-16 21:38:42 +05301784 }
1785
Sujithc37452b2009-03-09 09:31:57 +05301786tx_done:
Sujithe8324352009-01-16 21:38:42 +05301787 spin_unlock_bh(&txctl->txq->axq_lock);
1788}
1789
1790/* Upon failure caller should free skb */
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001791int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
Sujithe8324352009-01-16 21:38:42 +05301792 struct ath_tx_control *txctl)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001793{
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001794 struct ath_wiphy *aphy = hw->priv;
1795 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001796 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001797 struct ath_buf *bf;
Sujithe8324352009-01-16 21:38:42 +05301798 int r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001799
Sujithe8324352009-01-16 21:38:42 +05301800 bf = ath_tx_get_buffer(sc);
1801 if (!bf) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001802 ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n");
Sujithe8324352009-01-16 21:38:42 +05301803 return -1;
1804 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001805
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001806 r = ath_tx_setup_buffer(hw, bf, skb, txctl);
Sujithe8324352009-01-16 21:38:42 +05301807 if (unlikely(r)) {
1808 struct ath_txq *txq = txctl->txq;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001809
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001810 ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001811
Sujithe8324352009-01-16 21:38:42 +05301812 /* upon ath_tx_processq() this TX queue will be resumed, we
1813 * guarantee this will happen by knowing beforehand that
1814 * we will at least have to run TX completionon one buffer
1815 * on the queue */
1816 spin_lock_bh(&txq->axq_lock);
Sujithf7a99e42009-02-17 15:36:33 +05301817 if (sc->tx.txq[txq->axq_qnum].axq_depth > 1) {
Luis R. Rodriguezf52de032009-11-02 17:09:12 -08001818 ath_mac80211_stop_queue(sc, skb_get_queue_mapping(skb));
Sujithe8324352009-01-16 21:38:42 +05301819 txq->stopped = 1;
1820 }
1821 spin_unlock_bh(&txq->axq_lock);
1822
1823 spin_lock_bh(&sc->tx.txbuflock);
1824 list_add_tail(&bf->list, &sc->tx.txbuf);
1825 spin_unlock_bh(&sc->tx.txbuflock);
1826
1827 return r;
1828 }
1829
1830 ath_tx_start_dma(sc, bf, txctl);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001831
1832 return 0;
1833}
1834
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001835void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001836{
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001837 struct ath_wiphy *aphy = hw->priv;
1838 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001839 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Benoit Papillault4d91f9f2009-12-12 00:22:35 +01001840 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1841 int padpos, padsize;
Sujithe8324352009-01-16 21:38:42 +05301842 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1843 struct ath_tx_control txctl;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001844
Sujithe8324352009-01-16 21:38:42 +05301845 memset(&txctl, 0, sizeof(struct ath_tx_control));
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001846
Sujithe8324352009-01-16 21:38:42 +05301847 /*
1848 * As a temporary workaround, assign seq# here; this will likely need
1849 * to be cleaned up to work better with Beacon transmission and virtual
1850 * BSSes.
1851 */
1852 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
Sujithe8324352009-01-16 21:38:42 +05301853 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1854 sc->tx.seq_no += 0x10;
1855 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1856 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001857 }
1858
Sujithe8324352009-01-16 21:38:42 +05301859 /* Add the padding after the header if this is not already done */
Benoit Papillault4d91f9f2009-12-12 00:22:35 +01001860 padpos = ath9k_cmn_padpos(hdr->frame_control);
1861 padsize = padpos & 3;
1862 if (padsize && skb->len>padpos) {
Sujithe8324352009-01-16 21:38:42 +05301863 if (skb_headroom(skb) < padsize) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001864 ath_print(common, ATH_DBG_XMIT,
1865 "TX CABQ padding failed\n");
Sujithe8324352009-01-16 21:38:42 +05301866 dev_kfree_skb_any(skb);
1867 return;
1868 }
1869 skb_push(skb, padsize);
Benoit Papillault4d91f9f2009-12-12 00:22:35 +01001870 memmove(skb->data, skb->data + padsize, padpos);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001871 }
1872
Sujithe8324352009-01-16 21:38:42 +05301873 txctl.txq = sc->beacon.cabq;
1874
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001875 ath_print(common, ATH_DBG_XMIT,
1876 "transmitting CABQ packet, skb: %p\n", skb);
Sujithe8324352009-01-16 21:38:42 +05301877
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001878 if (ath_tx_start(hw, skb, &txctl) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001879 ath_print(common, ATH_DBG_XMIT, "CABQ TX failed\n");
Sujithe8324352009-01-16 21:38:42 +05301880 goto exit;
1881 }
1882
1883 return;
1884exit:
1885 dev_kfree_skb_any(skb);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001886}
1887
Sujithe8324352009-01-16 21:38:42 +05301888/*****************/
1889/* TX Completion */
1890/*****************/
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001891
Sujithe8324352009-01-16 21:38:42 +05301892static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
Felix Fietkau827e69b2009-11-15 23:09:25 +01001893 struct ath_wiphy *aphy, int tx_flags)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001894{
Sujithe8324352009-01-16 21:38:42 +05301895 struct ieee80211_hw *hw = sc->hw;
1896 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001897 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Benoit Papillault4d91f9f2009-12-12 00:22:35 +01001898 struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data;
1899 int padpos, padsize;
Sujithe8324352009-01-16 21:38:42 +05301900
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001901 ath_print(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb);
Sujithe8324352009-01-16 21:38:42 +05301902
Felix Fietkau827e69b2009-11-15 23:09:25 +01001903 if (aphy)
1904 hw = aphy->hw;
Sujithe8324352009-01-16 21:38:42 +05301905
Vasanthakumar Thiagarajan6b2c4032009-03-20 15:27:50 +05301906 if (tx_flags & ATH_TX_BAR)
Sujithe8324352009-01-16 21:38:42 +05301907 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
Sujithe8324352009-01-16 21:38:42 +05301908
Vasanthakumar Thiagarajan6b2c4032009-03-20 15:27:50 +05301909 if (!(tx_flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
Sujithe8324352009-01-16 21:38:42 +05301910 /* Frame was ACKed */
1911 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1912 }
1913
Benoit Papillault4d91f9f2009-12-12 00:22:35 +01001914 padpos = ath9k_cmn_padpos(hdr->frame_control);
1915 padsize = padpos & 3;
1916 if (padsize && skb->len>padpos+padsize) {
Sujithe8324352009-01-16 21:38:42 +05301917 /*
1918 * Remove MAC header padding before giving the frame back to
1919 * mac80211.
1920 */
Benoit Papillault4d91f9f2009-12-12 00:22:35 +01001921 memmove(skb->data + padsize, skb->data, padpos);
Sujithe8324352009-01-16 21:38:42 +05301922 skb_pull(skb, padsize);
1923 }
1924
Sujith1b04b932010-01-08 10:36:05 +05301925 if (sc->ps_flags & PS_WAIT_FOR_TX_ACK) {
1926 sc->ps_flags &= ~PS_WAIT_FOR_TX_ACK;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001927 ath_print(common, ATH_DBG_PS,
1928 "Going back to sleep after having "
Pavel Roskinf643e512010-01-29 17:22:12 -05001929 "received TX status (0x%lx)\n",
Sujith1b04b932010-01-08 10:36:05 +05301930 sc->ps_flags & (PS_WAIT_FOR_BEACON |
1931 PS_WAIT_FOR_CAB |
1932 PS_WAIT_FOR_PSPOLL_DATA |
1933 PS_WAIT_FOR_TX_ACK));
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03001934 }
1935
Felix Fietkau827e69b2009-11-15 23:09:25 +01001936 if (unlikely(tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_INTERNAL))
Jouni Malinenf0ed85c2009-03-03 19:23:31 +02001937 ath9k_tx_status(hw, skb);
Felix Fietkau827e69b2009-11-15 23:09:25 +01001938 else
1939 ieee80211_tx_status(hw, skb);
Sujithe8324352009-01-16 21:38:42 +05301940}
1941
1942static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001943 struct ath_txq *txq, struct list_head *bf_q,
1944 struct ath_tx_status *ts, int txok, int sendbar)
Sujithe8324352009-01-16 21:38:42 +05301945{
1946 struct sk_buff *skb = bf->bf_mpdu;
Sujithe8324352009-01-16 21:38:42 +05301947 unsigned long flags;
Vasanthakumar Thiagarajan6b2c4032009-03-20 15:27:50 +05301948 int tx_flags = 0;
Sujithe8324352009-01-16 21:38:42 +05301949
Sujithe8324352009-01-16 21:38:42 +05301950 if (sendbar)
Vasanthakumar Thiagarajan6b2c4032009-03-20 15:27:50 +05301951 tx_flags = ATH_TX_BAR;
Sujithe8324352009-01-16 21:38:42 +05301952
1953 if (!txok) {
Vasanthakumar Thiagarajan6b2c4032009-03-20 15:27:50 +05301954 tx_flags |= ATH_TX_ERROR;
Sujithe8324352009-01-16 21:38:42 +05301955
1956 if (bf_isxretried(bf))
Vasanthakumar Thiagarajan6b2c4032009-03-20 15:27:50 +05301957 tx_flags |= ATH_TX_XRETRY;
Sujithe8324352009-01-16 21:38:42 +05301958 }
1959
1960 dma_unmap_single(sc->dev, bf->bf_dmacontext, skb->len, DMA_TO_DEVICE);
Felix Fietkau827e69b2009-11-15 23:09:25 +01001961 ath_tx_complete(sc, skb, bf->aphy, tx_flags);
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001962 ath_debug_stat_tx(sc, txq, bf, ts);
Sujithe8324352009-01-16 21:38:42 +05301963
1964 /*
1965 * Return the list of ath_buf of this mpdu to free queue
1966 */
1967 spin_lock_irqsave(&sc->tx.txbuflock, flags);
1968 list_splice_tail_init(bf_q, &sc->tx.txbuf);
1969 spin_unlock_irqrestore(&sc->tx.txbuflock, flags);
1970}
1971
1972static int ath_tx_num_badfrms(struct ath_softc *sc, struct ath_buf *bf,
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001973 struct ath_tx_status *ts, int txok)
Sujithe8324352009-01-16 21:38:42 +05301974{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001975 u16 seq_st = 0;
1976 u32 ba[WME_BA_BMP_SIZE >> 5];
Sujithe8324352009-01-16 21:38:42 +05301977 int ba_index;
1978 int nbad = 0;
1979 int isaggr = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001980
Vasanthakumar Thiagarajan6d913f72010-04-15 17:38:46 -04001981 if (bf->bf_tx_aborted)
Sujithe8324352009-01-16 21:38:42 +05301982 return 0;
Sujith528f0c62008-10-29 10:14:26 +05301983
Sujithcd3d39a2008-08-11 14:03:34 +05301984 isaggr = bf_isaggr(bf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001985 if (isaggr) {
Felix Fietkaudb1a0522010-03-29 20:07:11 -07001986 seq_st = ts->ts_seqnum;
1987 memcpy(ba, &ts->ba_low, WME_BA_BMP_SIZE >> 3);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001988 }
1989
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001990 while (bf) {
Sujithe8324352009-01-16 21:38:42 +05301991 ba_index = ATH_BA_INDEX(seq_st, bf->bf_seqno);
1992 if (!txok || (isaggr && !ATH_BA_ISSET(ba, ba_index)))
1993 nbad++;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001994
Sujithe8324352009-01-16 21:38:42 +05301995 bf = bf->bf_next;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001996 }
1997
Sujithe8324352009-01-16 21:38:42 +05301998 return nbad;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001999}
2000
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002001static void ath_tx_rc_status(struct ath_buf *bf, struct ath_tx_status *ts,
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302002 int nbad, int txok, bool update_rc)
Sujithc4288392008-11-18 09:09:30 +05302003{
Sujitha22be222009-03-30 15:28:36 +05302004 struct sk_buff *skb = bf->bf_mpdu;
Sujith254ad0f2009-02-04 08:10:19 +05302005 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Sujithc4288392008-11-18 09:09:30 +05302006 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
Felix Fietkau827e69b2009-11-15 23:09:25 +01002007 struct ieee80211_hw *hw = bf->aphy->hw;
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302008 u8 i, tx_rateindex;
Sujithc4288392008-11-18 09:09:30 +05302009
Sujith95e4acb2009-03-13 08:56:09 +05302010 if (txok)
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002011 tx_info->status.ack_signal = ts->ts_rssi;
Sujith95e4acb2009-03-13 08:56:09 +05302012
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002013 tx_rateindex = ts->ts_rateindex;
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302014 WARN_ON(tx_rateindex >= hw->max_rates);
2015
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002016 if (ts->ts_status & ATH9K_TXERR_FILT)
Sujithc4288392008-11-18 09:09:30 +05302017 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
Felix Fietkaud9698472010-03-01 13:32:11 +01002018 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc)
2019 tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
Sujithc4288392008-11-18 09:09:30 +05302020
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002021 if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 &&
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302022 (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) {
Sujith254ad0f2009-02-04 08:10:19 +05302023 if (ieee80211_is_data(hdr->frame_control)) {
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002024 if (ts->ts_flags &
Felix Fietkau827e69b2009-11-15 23:09:25 +01002025 (ATH9K_TX_DATA_UNDERRUN | ATH9K_TX_DELIM_UNDERRUN))
2026 tx_info->pad[0] |= ATH_TX_INFO_UNDERRUN;
Felix Fietkaudb1a0522010-03-29 20:07:11 -07002027 if ((ts->ts_status & ATH9K_TXERR_XRETRY) ||
2028 (ts->ts_status & ATH9K_TXERR_FIFO))
Felix Fietkau827e69b2009-11-15 23:09:25 +01002029 tx_info->pad[0] |= ATH_TX_INFO_XRETRY;
2030 tx_info->status.ampdu_len = bf->bf_nframes;
2031 tx_info->status.ampdu_ack_len = bf->bf_nframes - nbad;
Sujithc4288392008-11-18 09:09:30 +05302032 }
2033 }
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302034
Felix Fietkau545750d2009-11-23 22:21:01 +01002035 for (i = tx_rateindex + 1; i < hw->max_rates; i++) {
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302036 tx_info->status.rates[i].count = 0;
Felix Fietkau545750d2009-11-23 22:21:01 +01002037 tx_info->status.rates[i].idx = -1;
2038 }
Vasanthakumar Thiagarajan8a92e2e2009-03-20 15:27:49 +05302039
2040 tx_info->status.rates[tx_rateindex].count = bf->bf_retries + 1;
Sujithc4288392008-11-18 09:09:30 +05302041}
2042
Sujith059d8062009-01-16 21:38:49 +05302043static void ath_wake_mac80211_queue(struct ath_softc *sc, struct ath_txq *txq)
2044{
2045 int qnum;
2046
2047 spin_lock_bh(&txq->axq_lock);
2048 if (txq->stopped &&
Sujithf7a99e42009-02-17 15:36:33 +05302049 sc->tx.txq[txq->axq_qnum].axq_depth <= (ATH_TXBUF - 20)) {
Sujith059d8062009-01-16 21:38:49 +05302050 qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc);
2051 if (qnum != -1) {
Luis R. Rodriguezf52de032009-11-02 17:09:12 -08002052 ath_mac80211_start_queue(sc, qnum);
Sujith059d8062009-01-16 21:38:49 +05302053 txq->stopped = 0;
2054 }
2055 }
2056 spin_unlock_bh(&txq->axq_lock);
2057}
2058
Sujithc4288392008-11-18 09:09:30 +05302059static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002060{
Sujithcbe61d82009-02-09 13:27:12 +05302061 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002062 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002063 struct ath_buf *bf, *lastbf, *bf_held = NULL;
2064 struct list_head bf_head;
Sujithc4288392008-11-18 09:09:30 +05302065 struct ath_desc *ds;
Felix Fietkau29bffa92010-03-29 20:14:23 -07002066 struct ath_tx_status ts;
Vasanthakumar Thiagarajan0934af22009-03-18 20:22:00 +05302067 int txok;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002068 int status;
2069
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002070 ath_print(common, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n",
2071 txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum),
2072 txq->axq_link);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002073
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002074 for (;;) {
2075 spin_lock_bh(&txq->axq_lock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002076 if (list_empty(&txq->axq_q)) {
2077 txq->axq_link = NULL;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002078 spin_unlock_bh(&txq->axq_lock);
2079 break;
2080 }
2081 bf = list_first_entry(&txq->axq_q, struct ath_buf, list);
2082
2083 /*
2084 * There is a race condition that a BH gets scheduled
2085 * after sw writes TxE and before hw re-load the last
2086 * descriptor to get the newly chained one.
2087 * Software must keep the last DONE descriptor as a
2088 * holding descriptor - software does so by marking
2089 * it with the STALE flag.
2090 */
2091 bf_held = NULL;
Sujitha119cc42009-03-30 15:28:38 +05302092 if (bf->bf_stale) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002093 bf_held = bf;
2094 if (list_is_last(&bf_held->list, &txq->axq_q)) {
Sujith6ef9b132009-01-16 21:38:51 +05302095 spin_unlock_bh(&txq->axq_lock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002096 break;
2097 } else {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002098 bf = list_entry(bf_held->list.next,
Sujith6ef9b132009-01-16 21:38:51 +05302099 struct ath_buf, list);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002100 }
2101 }
2102
2103 lastbf = bf->bf_lastbf;
Sujithe8324352009-01-16 21:38:42 +05302104 ds = lastbf->bf_desc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002105
Felix Fietkau29bffa92010-03-29 20:14:23 -07002106 memset(&ts, 0, sizeof(ts));
2107 status = ath9k_hw_txprocdesc(ah, ds, &ts);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002108 if (status == -EINPROGRESS) {
2109 spin_unlock_bh(&txq->axq_lock);
2110 break;
2111 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002112
2113 /*
Luis R. Rodrigueze7824a52009-11-24 02:53:25 -05002114 * We now know the nullfunc frame has been ACKed so we
2115 * can disable RX.
2116 */
2117 if (bf->bf_isnullfunc &&
Felix Fietkau29bffa92010-03-29 20:14:23 -07002118 (ts.ts_status & ATH9K_TX_ACKED)) {
Senthil Balasubramanian3f7c5c12010-02-03 22:51:13 +05302119 if ((sc->ps_flags & PS_ENABLED))
2120 ath9k_enable_ps(sc);
2121 else
Sujith1b04b932010-01-08 10:36:05 +05302122 sc->ps_flags |= PS_NULLFUNC_COMPLETED;
Luis R. Rodrigueze7824a52009-11-24 02:53:25 -05002123 }
2124
2125 /*
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002126 * Remove ath_buf's of the same transmit unit from txq,
2127 * however leave the last descriptor back as the holding
2128 * descriptor for hw.
2129 */
Sujitha119cc42009-03-30 15:28:38 +05302130 lastbf->bf_stale = true;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002131 INIT_LIST_HEAD(&bf_head);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002132 if (!list_is_singular(&lastbf->list))
2133 list_cut_position(&bf_head,
2134 &txq->axq_q, lastbf->list.prev);
2135
2136 txq->axq_depth--;
Felix Fietkau29bffa92010-03-29 20:14:23 -07002137 txok = !(ts.ts_status & ATH9K_TXERR_MASK);
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002138 txq->axq_tx_inprogress = false;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002139 spin_unlock_bh(&txq->axq_lock);
2140
2141 if (bf_held) {
Sujithb77f4832008-12-07 21:44:03 +05302142 spin_lock_bh(&sc->tx.txbuflock);
Sujith6ef9b132009-01-16 21:38:51 +05302143 list_move_tail(&bf_held->list, &sc->tx.txbuf);
Sujithb77f4832008-12-07 21:44:03 +05302144 spin_unlock_bh(&sc->tx.txbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002145 }
2146
Sujithcd3d39a2008-08-11 14:03:34 +05302147 if (!bf_isampdu(bf)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002148 /*
2149 * This frame is sent out as a single frame.
2150 * Use hardware retry status for this frame.
2151 */
Felix Fietkau29bffa92010-03-29 20:14:23 -07002152 bf->bf_retries = ts.ts_longretry;
2153 if (ts.ts_status & ATH9K_TXERR_XRETRY)
Sujithcd3d39a2008-08-11 14:03:34 +05302154 bf->bf_state.bf_type |= BUF_XRETRY;
Felix Fietkau29bffa92010-03-29 20:14:23 -07002155 ath_tx_rc_status(bf, &ts, 0, txok, true);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002156 }
Johannes Berge6a98542008-10-21 12:40:02 +02002157
Sujithcd3d39a2008-08-11 14:03:34 +05302158 if (bf_isampdu(bf))
Felix Fietkau29bffa92010-03-29 20:14:23 -07002159 ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, txok);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002160 else
Felix Fietkau29bffa92010-03-29 20:14:23 -07002161 ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, txok, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002162
Sujith059d8062009-01-16 21:38:49 +05302163 ath_wake_mac80211_queue(sc, txq);
2164
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002165 spin_lock_bh(&txq->axq_lock);
Sujith672840a2008-08-11 14:05:08 +05302166 if (sc->sc_flags & SC_OP_TXAGGR)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002167 ath_txq_schedule(sc, txq);
2168 spin_unlock_bh(&txq->axq_lock);
2169 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002170}
2171
Sujith305fe472009-07-23 15:32:29 +05302172static void ath_tx_complete_poll_work(struct work_struct *work)
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002173{
2174 struct ath_softc *sc = container_of(work, struct ath_softc,
2175 tx_complete_work.work);
2176 struct ath_txq *txq;
2177 int i;
2178 bool needreset = false;
2179
2180 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
2181 if (ATH_TXQ_SETUP(sc, i)) {
2182 txq = &sc->tx.txq[i];
2183 spin_lock_bh(&txq->axq_lock);
2184 if (txq->axq_depth) {
2185 if (txq->axq_tx_inprogress) {
2186 needreset = true;
2187 spin_unlock_bh(&txq->axq_lock);
2188 break;
2189 } else {
2190 txq->axq_tx_inprogress = true;
2191 }
2192 }
2193 spin_unlock_bh(&txq->axq_lock);
2194 }
2195
2196 if (needreset) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002197 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
2198 "tx hung, resetting the chip\n");
Sujith332c5562009-10-09 09:51:28 +05302199 ath9k_ps_wakeup(sc);
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002200 ath_reset(sc, false);
Sujith332c5562009-10-09 09:51:28 +05302201 ath9k_ps_restore(sc);
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002202 }
2203
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04002204 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002205 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
2206}
2207
2208
Sujithe8324352009-01-16 21:38:42 +05302209
2210void ath_tx_tasklet(struct ath_softc *sc)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002211{
Sujithe8324352009-01-16 21:38:42 +05302212 int i;
2213 u32 qcumask = ((1 << ATH9K_NUM_TX_QUEUES) - 1);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002214
Sujithe8324352009-01-16 21:38:42 +05302215 ath9k_hw_gettxintrtxqs(sc->sc_ah, &qcumask);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002216
2217 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
Sujithe8324352009-01-16 21:38:42 +05302218 if (ATH_TXQ_SETUP(sc, i) && (qcumask & (1 << i)))
2219 ath_tx_processq(sc, &sc->tx.txq[i]);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002220 }
2221}
2222
Vasanthakumar Thiagarajane5003242010-04-15 17:39:36 -04002223void ath_tx_edma_tasklet(struct ath_softc *sc)
2224{
2225 struct ath_tx_status txs;
2226 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2227 struct ath_hw *ah = sc->sc_ah;
2228 struct ath_txq *txq;
2229 struct ath_buf *bf, *lastbf;
2230 struct list_head bf_head;
2231 int status;
2232 int txok;
2233
2234 for (;;) {
2235 status = ath9k_hw_txprocdesc(ah, NULL, (void *)&txs);
2236 if (status == -EINPROGRESS)
2237 break;
2238 if (status == -EIO) {
2239 ath_print(common, ATH_DBG_XMIT,
2240 "Error processing tx status\n");
2241 break;
2242 }
2243
2244 /* Skip beacon completions */
2245 if (txs.qid == sc->beacon.beaconq)
2246 continue;
2247
2248 txq = &sc->tx.txq[txs.qid];
2249
2250 spin_lock_bh(&txq->axq_lock);
2251 if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) {
2252 spin_unlock_bh(&txq->axq_lock);
2253 return;
2254 }
2255
2256 bf = list_first_entry(&txq->txq_fifo[txq->txq_tailidx],
2257 struct ath_buf, list);
2258 lastbf = bf->bf_lastbf;
2259
2260 INIT_LIST_HEAD(&bf_head);
2261 list_cut_position(&bf_head, &txq->txq_fifo[txq->txq_tailidx],
2262 &lastbf->list);
2263 INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH);
2264 txq->axq_depth--;
2265 txq->axq_tx_inprogress = false;
2266 spin_unlock_bh(&txq->axq_lock);
2267
2268 txok = !(txs.ts_status & ATH9K_TXERR_MASK);
2269
2270 if (!bf_isampdu(bf)) {
2271 bf->bf_retries = txs.ts_longretry;
2272 if (txs.ts_status & ATH9K_TXERR_XRETRY)
2273 bf->bf_state.bf_type |= BUF_XRETRY;
2274 ath_tx_rc_status(bf, &txs, 0, txok, true);
2275 }
2276
2277 if (bf_isampdu(bf))
2278 ath_tx_complete_aggr(sc, txq, bf, &bf_head, &txs, txok);
2279 else
2280 ath_tx_complete_buf(sc, bf, txq, &bf_head,
2281 &txs, txok, 0);
2282
2283 spin_lock_bh(&txq->axq_lock);
2284 if (!list_empty(&txq->txq_fifo_pending)) {
2285 INIT_LIST_HEAD(&bf_head);
2286 bf = list_first_entry(&txq->txq_fifo_pending,
2287 struct ath_buf, list);
2288 list_cut_position(&bf_head, &txq->txq_fifo_pending,
2289 &bf->bf_lastbf->list);
2290 ath_tx_txqaddbuf(sc, txq, &bf_head);
2291 } else if (sc->sc_flags & SC_OP_TXAGGR)
2292 ath_txq_schedule(sc, txq);
2293 spin_unlock_bh(&txq->axq_lock);
2294 }
2295}
2296
Sujithe8324352009-01-16 21:38:42 +05302297/*****************/
2298/* Init, Cleanup */
2299/*****************/
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002300
Vasanthakumar Thiagarajan5088c2f2010-04-15 17:39:34 -04002301static int ath_txstatus_setup(struct ath_softc *sc, int size)
2302{
2303 struct ath_descdma *dd = &sc->txsdma;
2304 u8 txs_len = sc->sc_ah->caps.txs_len;
2305
2306 dd->dd_desc_len = size * txs_len;
2307 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
2308 &dd->dd_desc_paddr, GFP_KERNEL);
2309 if (!dd->dd_desc)
2310 return -ENOMEM;
2311
2312 return 0;
2313}
2314
2315static int ath_tx_edma_init(struct ath_softc *sc)
2316{
2317 int err;
2318
2319 err = ath_txstatus_setup(sc, ATH_TXSTATUS_RING_SIZE);
2320 if (!err)
2321 ath9k_hw_setup_statusring(sc->sc_ah, sc->txsdma.dd_desc,
2322 sc->txsdma.dd_desc_paddr,
2323 ATH_TXSTATUS_RING_SIZE);
2324
2325 return err;
2326}
2327
2328static void ath_tx_edma_cleanup(struct ath_softc *sc)
2329{
2330 struct ath_descdma *dd = &sc->txsdma;
2331
2332 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
2333 dd->dd_desc_paddr);
2334}
2335
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002336int ath_tx_init(struct ath_softc *sc, int nbufs)
2337{
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002338 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002339 int error = 0;
2340
Sujith797fe5c2009-03-30 15:28:45 +05302341 spin_lock_init(&sc->tx.txbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002342
Sujith797fe5c2009-03-30 15:28:45 +05302343 error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf,
Vasanthakumar Thiagarajan4adfcde2010-04-15 17:39:33 -04002344 "tx", nbufs, 1, 1);
Sujith797fe5c2009-03-30 15:28:45 +05302345 if (error != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002346 ath_print(common, ATH_DBG_FATAL,
2347 "Failed to allocate tx descriptors: %d\n", error);
Sujith797fe5c2009-03-30 15:28:45 +05302348 goto err;
2349 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002350
Sujith797fe5c2009-03-30 15:28:45 +05302351 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
Vasanthakumar Thiagarajan5088c2f2010-04-15 17:39:34 -04002352 "beacon", ATH_BCBUF, 1, 1);
Sujith797fe5c2009-03-30 15:28:45 +05302353 if (error != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002354 ath_print(common, ATH_DBG_FATAL,
2355 "Failed to allocate beacon descriptors: %d\n", error);
Sujith797fe5c2009-03-30 15:28:45 +05302356 goto err;
2357 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002358
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002359 INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work);
2360
Vasanthakumar Thiagarajan5088c2f2010-04-15 17:39:34 -04002361 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
2362 error = ath_tx_edma_init(sc);
2363 if (error)
2364 goto err;
2365 }
2366
Sujith797fe5c2009-03-30 15:28:45 +05302367err:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002368 if (error != 0)
2369 ath_tx_cleanup(sc);
2370
2371 return error;
2372}
2373
Sujith797fe5c2009-03-30 15:28:45 +05302374void ath_tx_cleanup(struct ath_softc *sc)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002375{
Sujithb77f4832008-12-07 21:44:03 +05302376 if (sc->beacon.bdma.dd_desc_len != 0)
2377 ath_descdma_cleanup(sc, &sc->beacon.bdma, &sc->beacon.bbuf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002378
Sujithb77f4832008-12-07 21:44:03 +05302379 if (sc->tx.txdma.dd_desc_len != 0)
2380 ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf);
Vasanthakumar Thiagarajan5088c2f2010-04-15 17:39:34 -04002381
2382 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
2383 ath_tx_edma_cleanup(sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002384}
2385
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002386void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2387{
Sujithc5170162008-10-29 10:13:59 +05302388 struct ath_atx_tid *tid;
2389 struct ath_atx_ac *ac;
2390 int tidno, acno;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002391
Sujith8ee5afb2008-12-07 21:43:36 +05302392 for (tidno = 0, tid = &an->tid[tidno];
Sujithc5170162008-10-29 10:13:59 +05302393 tidno < WME_NUM_TID;
2394 tidno++, tid++) {
2395 tid->an = an;
2396 tid->tidno = tidno;
2397 tid->seq_start = tid->seq_next = 0;
2398 tid->baw_size = WME_MAX_BA;
2399 tid->baw_head = tid->baw_tail = 0;
2400 tid->sched = false;
Sujithe8324352009-01-16 21:38:42 +05302401 tid->paused = false;
Sujitha37c2c72008-10-29 10:15:40 +05302402 tid->state &= ~AGGR_CLEANUP;
Sujithc5170162008-10-29 10:13:59 +05302403 INIT_LIST_HEAD(&tid->buf_q);
Sujithc5170162008-10-29 10:13:59 +05302404 acno = TID_TO_WME_AC(tidno);
Sujith8ee5afb2008-12-07 21:43:36 +05302405 tid->ac = &an->ac[acno];
Sujitha37c2c72008-10-29 10:15:40 +05302406 tid->state &= ~AGGR_ADDBA_COMPLETE;
2407 tid->state &= ~AGGR_ADDBA_PROGRESS;
Sujithc5170162008-10-29 10:13:59 +05302408 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002409
Sujith8ee5afb2008-12-07 21:43:36 +05302410 for (acno = 0, ac = &an->ac[acno];
Sujithc5170162008-10-29 10:13:59 +05302411 acno < WME_NUM_AC; acno++, ac++) {
2412 ac->sched = false;
2413 INIT_LIST_HEAD(&ac->tid_q);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002414
Sujithc5170162008-10-29 10:13:59 +05302415 switch (acno) {
2416 case WME_AC_BE:
2417 ac->qnum = ath_tx_get_qnum(sc,
2418 ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
2419 break;
2420 case WME_AC_BK:
2421 ac->qnum = ath_tx_get_qnum(sc,
2422 ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BK);
2423 break;
2424 case WME_AC_VI:
2425 ac->qnum = ath_tx_get_qnum(sc,
2426 ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VI);
2427 break;
2428 case WME_AC_VO:
2429 ac->qnum = ath_tx_get_qnum(sc,
2430 ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VO);
2431 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002432 }
2433 }
2434}
2435
Sujithb5aa9bf2008-10-29 10:13:31 +05302436void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002437{
2438 int i;
2439 struct ath_atx_ac *ac, *ac_tmp;
2440 struct ath_atx_tid *tid, *tid_tmp;
2441 struct ath_txq *txq;
Sujithe8324352009-01-16 21:38:42 +05302442
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002443 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2444 if (ATH_TXQ_SETUP(sc, i)) {
Sujithb77f4832008-12-07 21:44:03 +05302445 txq = &sc->tx.txq[i];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002446
Ming Leia9f042c2010-02-28 00:56:24 +08002447 spin_lock_bh(&txq->axq_lock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002448
2449 list_for_each_entry_safe(ac,
2450 ac_tmp, &txq->axq_acq, list) {
2451 tid = list_first_entry(&ac->tid_q,
2452 struct ath_atx_tid, list);
2453 if (tid && tid->an != an)
2454 continue;
2455 list_del(&ac->list);
2456 ac->sched = false;
2457
2458 list_for_each_entry_safe(tid,
2459 tid_tmp, &ac->tid_q, list) {
2460 list_del(&tid->list);
2461 tid->sched = false;
Sujithb5aa9bf2008-10-29 10:13:31 +05302462 ath_tid_drain(sc, txq, tid);
Sujitha37c2c72008-10-29 10:15:40 +05302463 tid->state &= ~AGGR_ADDBA_COMPLETE;
Sujitha37c2c72008-10-29 10:15:40 +05302464 tid->state &= ~AGGR_CLEANUP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002465 }
2466 }
2467
Ming Leia9f042c2010-02-28 00:56:24 +08002468 spin_unlock_bh(&txq->axq_lock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002469 }
2470 }
2471}