blob: 39fd5440a2480b3598b2ee1d9cb51ece3617e218 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Tomas Winkler82b9a122008-03-04 18:09:30 -080049#include "iwl-3945-core.h"
Zhu Yib481de92007-09-25 17:54:57 -070050#include "iwl-3945.h"
51#include "iwl-helpers.h"
52
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080053#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080054u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070055#endif
56
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080057static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080059
Zhu Yib481de92007-09-25 17:54:57 -070060/******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080067static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080070static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080071int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
73int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070074
75/*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80#define DRV_DESCRIPTION \
81"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080083#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070084#define VD "d"
85#else
86#define VD
87#endif
88
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080089#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070090#define VS "s"
91#else
92#define VS
93#endif
94
Reinette Chatreb9e0b442008-02-08 16:39:11 -080095#define IWLWIFI_VERSION "1.2.26k" VD VS
Zhu Yib481de92007-09-25 17:54:57 -070096#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
97#define DRV_VERSION IWLWIFI_VERSION
98
Zhu Yib481de92007-09-25 17:54:57 -070099
100MODULE_DESCRIPTION(DRV_DESCRIPTION);
101MODULE_VERSION(DRV_VERSION);
102MODULE_AUTHOR(DRV_COPYRIGHT);
103MODULE_LICENSE("GPL");
104
Christoph Hellwig416e1432007-10-25 17:15:49 +0800105static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700106{
107 u16 fc = le16_to_cpu(hdr->frame_control);
108 int hdr_len = ieee80211_get_hdrlen(fc);
109
110 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
111 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
112 return NULL;
113}
114
Johannes Berg8318d782008-01-24 19:38:38 +0100115static const struct ieee80211_supported_band *iwl3945_get_band(
116 struct iwl3945_priv *priv, enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -0700117{
Johannes Berg8318d782008-01-24 19:38:38 +0100118 return priv->hw->wiphy->bands[band];
Zhu Yib481de92007-09-25 17:54:57 -0700119}
120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800121static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700122{
123 /* Single white space is for Linksys APs */
124 if (essid_len == 1 && essid[0] == ' ')
125 return 1;
126
127 /* Otherwise, if the entire essid is 0, we assume it is hidden */
128 while (essid_len) {
129 essid_len--;
130 if (essid[essid_len] != '\0')
131 return 0;
132 }
133
134 return 1;
135}
136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800137static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700138{
139 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
140 const char *s = essid;
141 char *d = escaped;
142
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800143 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700144 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
145 return escaped;
146 }
147
148 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
149 while (essid_len--) {
150 if (*s == '\0') {
151 *d++ = '\\';
152 *d++ = '0';
153 s++;
154 } else
155 *d++ = *s++;
156 }
157 *d = '\0';
158 return escaped;
159}
160
Zhu Yib481de92007-09-25 17:54:57 -0700161/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
162 * DMA services
163 *
164 * Theory of operation
165 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800166 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
167 * of buffer descriptors, each of which points to one or more data buffers for
168 * the device to read from or fill. Driver and device exchange status of each
169 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
170 * entries in each circular buffer, to protect against confusing empty and full
171 * queue states.
172 *
173 * The device reads or writes the data in the queues via the device's several
174 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700175 *
176 * For Tx queue, there are low mark and high mark limits. If, after queuing
177 * the packet for Tx, free space become < low mark, Tx queue stopped. When
178 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
179 * Tx queue resumed.
180 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800181 * The 3945 operates with six queues: One receive queue, one transmit queue
182 * (#4) for sending commands to the device firmware, and four transmit queues
183 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700184 ***************************************************/
185
Tomas Winklerc54b6792008-03-06 17:36:53 -0800186int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700187{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800188 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700189
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800190 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700191 s -= q->n_bd;
192
193 if (s <= 0)
194 s += q->n_window;
195 /* keep some reserve to not confuse empty and full situations */
196 s -= 2;
197 if (s < 0)
198 s = 0;
199 return s;
200}
201
Tomas Winklerc54b6792008-03-06 17:36:53 -0800202int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700203{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800204 return q->write_ptr > q->read_ptr ?
205 (i >= q->read_ptr && i < q->write_ptr) :
206 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700207}
208
Tomas Winklerc54b6792008-03-06 17:36:53 -0800209
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800210static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700211{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800212 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700213 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800214 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700215
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800216 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700217 return index & (q->n_window - 1);
218}
219
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800220/**
221 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
222 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800223static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700224 int count, int slots_num, u32 id)
225{
226 q->n_bd = count;
227 q->n_window = slots_num;
228 q->id = id;
229
Tomas Winklerc54b6792008-03-06 17:36:53 -0800230 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
231 * and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700232 BUG_ON(!is_power_of_2(count));
233
234 /* slots_num must be power-of-two size, otherwise
235 * get_cmd_index is broken. */
236 BUG_ON(!is_power_of_2(slots_num));
237
238 q->low_mark = q->n_window / 4;
239 if (q->low_mark < 4)
240 q->low_mark = 4;
241
242 q->high_mark = q->n_window / 8;
243 if (q->high_mark < 2)
244 q->high_mark = 2;
245
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800246 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700247
248 return 0;
249}
250
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800251/**
252 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
253 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800254static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
255 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700256{
257 struct pci_dev *dev = priv->pci_dev;
258
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800259 /* Driver private data, only for Tx (not command) queues,
260 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700261 if (id != IWL_CMD_QUEUE_NUM) {
262 txq->txb = kmalloc(sizeof(txq->txb[0]) *
263 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
264 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800265 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700266 "structures failed\n");
267 goto error;
268 }
269 } else
270 txq->txb = NULL;
271
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800272 /* Circular buffer of transmit frame descriptors (TFDs),
273 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700274 txq->bd = pci_alloc_consistent(dev,
275 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
276 &txq->q.dma_addr);
277
278 if (!txq->bd) {
279 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
280 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
281 goto error;
282 }
283 txq->q.id = id;
284
285 return 0;
286
287 error:
288 if (txq->txb) {
289 kfree(txq->txb);
290 txq->txb = NULL;
291 }
292
293 return -ENOMEM;
294}
295
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800296/**
297 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
298 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800299int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
300 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700301{
302 struct pci_dev *dev = priv->pci_dev;
303 int len;
304 int rc = 0;
305
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800306 /*
307 * Alloc buffer array for commands (Tx or other types of commands).
308 * For the command queue (#4), allocate command space + one big
309 * command for scan, since scan command is very huge; the system will
310 * not have two scans at the same time, so only one is needed.
311 * For data Tx queues (all other queues), no super-size command
312 * space is needed.
313 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800314 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700315 if (txq_id == IWL_CMD_QUEUE_NUM)
316 len += IWL_MAX_SCAN_SIZE;
317 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
318 if (!txq->cmd)
319 return -ENOMEM;
320
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800321 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800322 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700323 if (rc) {
324 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
325
326 return -ENOMEM;
327 }
328 txq->need_update = 0;
329
330 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Tomas Winklerc54b6792008-03-06 17:36:53 -0800331 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700332 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800333
334 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800335 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700336
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800337 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800338 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700339
340 return 0;
341}
342
343/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800344 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700345 * @txq: Transmit queue to deallocate.
346 *
347 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800348 * Free all buffers.
349 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700350 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800351void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700352{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800353 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700354 struct pci_dev *dev = priv->pci_dev;
355 int len;
356
357 if (q->n_bd == 0)
358 return;
359
360 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800361 for (; q->write_ptr != q->read_ptr;
Tomas Winklerc54b6792008-03-06 17:36:53 -0800362 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800363 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800365 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700366 if (q->id == IWL_CMD_QUEUE_NUM)
367 len += IWL_MAX_SCAN_SIZE;
368
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800369 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700370 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
371
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800372 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700373 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800374 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700375 txq->q.n_bd, txq->bd, txq->q.dma_addr);
376
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800377 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700378 if (txq->txb) {
379 kfree(txq->txb);
380 txq->txb = NULL;
381 }
382
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800383 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700384 memset(txq, 0, sizeof(*txq));
385}
386
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800387const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700388
389/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800390 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700391 * the functionality provided here
392 */
393
394/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800395#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800396/**
397 * iwl3945_remove_station - Remove driver's knowledge of station.
398 *
399 * NOTE: This does not remove station from device's station table.
400 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800401static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700402{
403 int index = IWL_INVALID_STATION;
404 int i;
405 unsigned long flags;
406
407 spin_lock_irqsave(&priv->sta_lock, flags);
408
409 if (is_ap)
410 index = IWL_AP_ID;
411 else if (is_broadcast_ether_addr(addr))
412 index = priv->hw_setting.bcast_sta_id;
413 else
414 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
415 if (priv->stations[i].used &&
416 !compare_ether_addr(priv->stations[i].sta.sta.addr,
417 addr)) {
418 index = i;
419 break;
420 }
421
422 if (unlikely(index == IWL_INVALID_STATION))
423 goto out;
424
425 if (priv->stations[index].used) {
426 priv->stations[index].used = 0;
427 priv->num_stations--;
428 }
429
430 BUG_ON(priv->num_stations < 0);
431
432out:
433 spin_unlock_irqrestore(&priv->sta_lock, flags);
434 return 0;
435}
Zhu Yi556f8db2007-09-27 11:27:33 +0800436#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800437
438/**
439 * iwl3945_clear_stations_table - Clear the driver's station table
440 *
441 * NOTE: This does not clear or otherwise alter the device's station table.
442 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800443static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700444{
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 priv->num_stations = 0;
450 memset(priv->stations, 0, sizeof(priv->stations));
451
452 spin_unlock_irqrestore(&priv->sta_lock, flags);
453}
454
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800455/**
456 * iwl3945_add_station - Add station to station tables in driver and device
457 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800458u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700459{
460 int i;
461 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800462 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700463 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700464 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800465 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700466
467 spin_lock_irqsave(&priv->sta_lock, flags_spin);
468 if (is_ap)
469 index = IWL_AP_ID;
470 else if (is_broadcast_ether_addr(addr))
471 index = priv->hw_setting.bcast_sta_id;
472 else
473 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
474 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
475 addr)) {
476 index = i;
477 break;
478 }
479
480 if (!priv->stations[i].used &&
481 index == IWL_INVALID_STATION)
482 index = i;
483 }
484
Ian Schram01ebd062007-10-25 17:15:22 +0800485 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700486 since they have different meaning */
487 if (unlikely(index == IWL_INVALID_STATION)) {
488 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
489 return index;
490 }
491
492 if (priv->stations[index].used &&
493 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
494 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
495 return index;
496 }
497
Joe Perches0795af52007-10-03 17:59:30 -0700498 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700499 station = &priv->stations[index];
500 station->used = 1;
501 priv->num_stations++;
502
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800503 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800504 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700505 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
506 station->sta.mode = 0;
507 station->sta.sta.sta_id = index;
508 station->sta.station_flags = 0;
509
Johannes Berg8318d782008-01-24 19:38:38 +0100510 if (priv->band == IEEE80211_BAND_5GHZ)
Tomas Winkler69946332007-10-25 17:15:27 +0800511 rate = IWL_RATE_6M_PLCP;
512 else
513 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800514
515 /* Turn on both antennas for the station... */
516 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800517 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800518 station->current_rate.rate_n_flags =
519 le16_to_cpu(station->sta.rate_n_flags);
520
Zhu Yib481de92007-09-25 17:54:57 -0700521 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800522
523 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800524 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700525 return index;
526
527}
528
529/*************** DRIVER STATUS FUNCTIONS *****/
530
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800531static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700532{
533 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
534 * set but EXIT_PENDING is not */
535 return test_bit(STATUS_READY, &priv->status) &&
536 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
537 !test_bit(STATUS_EXIT_PENDING, &priv->status);
538}
539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800540static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700541{
542 return test_bit(STATUS_ALIVE, &priv->status);
543}
544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800545static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700546{
547 return test_bit(STATUS_INIT, &priv->status);
548}
549
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800550static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700551{
552 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
553 test_bit(STATUS_RF_KILL_SW, &priv->status);
554}
555
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800556static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700557{
558
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800559 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700560 return 0;
561
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800562 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700563}
564
565/*************** HOST COMMAND QUEUE FUNCTIONS *****/
566
567#define IWL_CMD(x) case x : return #x
568
569static const char *get_cmd_string(u8 cmd)
570{
571 switch (cmd) {
572 IWL_CMD(REPLY_ALIVE);
573 IWL_CMD(REPLY_ERROR);
574 IWL_CMD(REPLY_RXON);
575 IWL_CMD(REPLY_RXON_ASSOC);
576 IWL_CMD(REPLY_QOS_PARAM);
577 IWL_CMD(REPLY_RXON_TIMING);
578 IWL_CMD(REPLY_ADD_STA);
579 IWL_CMD(REPLY_REMOVE_STA);
580 IWL_CMD(REPLY_REMOVE_ALL_STA);
581 IWL_CMD(REPLY_3945_RX);
582 IWL_CMD(REPLY_TX);
583 IWL_CMD(REPLY_RATE_SCALE);
584 IWL_CMD(REPLY_LEDS_CMD);
585 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
586 IWL_CMD(RADAR_NOTIFICATION);
587 IWL_CMD(REPLY_QUIET_CMD);
588 IWL_CMD(REPLY_CHANNEL_SWITCH);
589 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
590 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
591 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
592 IWL_CMD(POWER_TABLE_CMD);
593 IWL_CMD(PM_SLEEP_NOTIFICATION);
594 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
595 IWL_CMD(REPLY_SCAN_CMD);
596 IWL_CMD(REPLY_SCAN_ABORT_CMD);
597 IWL_CMD(SCAN_START_NOTIFICATION);
598 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
599 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
600 IWL_CMD(BEACON_NOTIFICATION);
601 IWL_CMD(REPLY_TX_BEACON);
602 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
603 IWL_CMD(QUIET_NOTIFICATION);
604 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
605 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
606 IWL_CMD(REPLY_BT_CONFIG);
607 IWL_CMD(REPLY_STATISTICS_CMD);
608 IWL_CMD(STATISTICS_NOTIFICATION);
609 IWL_CMD(REPLY_CARD_STATE_CMD);
610 IWL_CMD(CARD_STATE_NOTIFICATION);
611 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
612 default:
613 return "UNKNOWN";
614
615 }
616}
617
618#define HOST_COMPLETE_TIMEOUT (HZ / 2)
619
620/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800621 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700622 * @priv: device private data point
623 * @cmd: a point to the ucode command structure
624 *
625 * The function returns < 0 values to indicate the operation is
626 * failed. On success, it turns the index (> 0) of command in the
627 * command queue.
628 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800629static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700630{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800631 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
632 struct iwl3945_queue *q = &txq->q;
633 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700634 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800635 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700636 u32 idx;
637 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
638 dma_addr_t phys_addr;
639 int pad;
640 u16 count;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
Gregory Greenmanc342a1b2008-02-06 11:20:40 -0800650
651 if (iwl3945_is_rfkill(priv)) {
652 IWL_DEBUG_INFO("Not sending command - RF KILL");
653 return -EIO;
654 }
655
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800656 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700657 IWL_ERROR("No space for Tx\n");
658 return -ENOSPC;
659 }
660
661 spin_lock_irqsave(&priv->hcmd_lock, flags);
662
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800663 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700664 memset(tfd, 0, sizeof(*tfd));
665
666 control_flags = (u32 *) tfd;
667
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800668 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700669 out_cmd = &txq->cmd[idx];
670
671 out_cmd->hdr.cmd = cmd->id;
672 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
673 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
674
675 /* At this point, the out_cmd now has all of the incoming cmd
676 * information */
677
678 out_cmd->hdr.flags = 0;
679 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800680 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700681 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
682 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
683
684 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800685 offsetof(struct iwl3945_cmd, hdr);
686 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700687
688 pad = U32_PAD(cmd->len);
689 count = TFD_CTL_COUNT_GET(*control_flags);
690 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
691
692 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
693 "%d bytes at %d[%d]:%d\n",
694 get_cmd_string(out_cmd->hdr.cmd),
695 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800696 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700697
698 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800699
700 /* Increment and update queue's write index */
Tomas Winklerc54b6792008-03-06 17:36:53 -0800701 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800702 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700703
704 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
705 return ret ? ret : idx;
706}
707
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800708static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700709{
710 int ret;
711
712 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
713
714 /* An asynchronous command can not expect an SKB to be set. */
715 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
716
717 /* An asynchronous command MUST have a callback. */
718 BUG_ON(!cmd->meta.u.callback);
719
720 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
721 return -EBUSY;
722
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800723 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700724 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800725 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700726 get_cmd_string(cmd->id), ret);
727 return ret;
728 }
729 return 0;
730}
731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800732static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700733{
734 int cmd_idx;
735 int ret;
736 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
737
738 BUG_ON(cmd->meta.flags & CMD_ASYNC);
739
740 /* A synchronous command can not have a callback set. */
741 BUG_ON(cmd->meta.u.callback != NULL);
742
743 if (atomic_xchg(&entry, 1)) {
744 IWL_ERROR("Error sending %s: Already sending a host command\n",
745 get_cmd_string(cmd->id));
746 return -EBUSY;
747 }
748
749 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
750
751 if (cmd->meta.flags & CMD_WANT_SKB)
752 cmd->meta.source = &cmd->meta;
753
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800754 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700755 if (cmd_idx < 0) {
756 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700758 get_cmd_string(cmd->id), ret);
759 goto out;
760 }
761
762 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
763 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
764 HOST_COMPLETE_TIMEOUT);
765 if (!ret) {
766 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
767 IWL_ERROR("Error sending %s: time out after %dms.\n",
768 get_cmd_string(cmd->id),
769 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
770
771 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
772 ret = -ETIMEDOUT;
773 goto cancel;
774 }
775 }
776
777 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
778 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
779 get_cmd_string(cmd->id));
780 ret = -ECANCELED;
781 goto fail;
782 }
783 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
784 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
785 get_cmd_string(cmd->id));
786 ret = -EIO;
787 goto fail;
788 }
789 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
790 IWL_ERROR("Error: Response NULL in '%s'\n",
791 get_cmd_string(cmd->id));
792 ret = -EIO;
793 goto out;
794 }
795
796 ret = 0;
797 goto out;
798
799cancel:
800 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800801 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700802
803 /* Cancel the CMD_WANT_SKB flag for the cmd in the
804 * TX cmd queue. Otherwise in case the cmd comes
805 * in later, it will possibly set an invalid
806 * address (cmd->meta.source). */
807 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
808 qcmd->meta.flags &= ~CMD_WANT_SKB;
809 }
810fail:
811 if (cmd->meta.u.skb) {
812 dev_kfree_skb_any(cmd->meta.u.skb);
813 cmd->meta.u.skb = NULL;
814 }
815out:
816 atomic_set(&entry, 0);
817 return ret;
818}
819
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800820int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700821{
Zhu Yib481de92007-09-25 17:54:57 -0700822 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800823 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800825 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700826}
827
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800828int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700829{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800830 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700831 .id = id,
832 .len = len,
833 .data = data,
834 };
835
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800836 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700837}
838
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800839static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700840{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800841 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700842 .id = id,
843 .len = sizeof(val),
844 .data = &val,
845 };
846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800847 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700848}
849
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800850int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700851{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800852 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700853}
854
855/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800856 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Johannes Berg8318d782008-01-24 19:38:38 +0100857 * @band: 2.4 or 5 GHz band
858 * @channel: Any channel valid for the requested band
Zhu Yib481de92007-09-25 17:54:57 -0700859
Johannes Berg8318d782008-01-24 19:38:38 +0100860 * In addition to setting the staging RXON, priv->band is also set.
Zhu Yib481de92007-09-25 17:54:57 -0700861 *
862 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
Johannes Berg8318d782008-01-24 19:38:38 +0100863 * in the staging RXON flag structure based on the band
Zhu Yib481de92007-09-25 17:54:57 -0700864 */
Johannes Berg8318d782008-01-24 19:38:38 +0100865static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
866 enum ieee80211_band band,
867 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700868{
Johannes Berg8318d782008-01-24 19:38:38 +0100869 if (!iwl3945_get_channel_info(priv, band, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700870 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
Johannes Berg8318d782008-01-24 19:38:38 +0100871 channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700872 return -EINVAL;
873 }
874
875 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
Johannes Berg8318d782008-01-24 19:38:38 +0100876 (priv->band == band))
Zhu Yib481de92007-09-25 17:54:57 -0700877 return 0;
878
879 priv->staging_rxon.channel = cpu_to_le16(channel);
Johannes Berg8318d782008-01-24 19:38:38 +0100880 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -0700881 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
882 else
883 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
884
Johannes Berg8318d782008-01-24 19:38:38 +0100885 priv->band = band;
Zhu Yib481de92007-09-25 17:54:57 -0700886
Johannes Berg8318d782008-01-24 19:38:38 +0100887 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700888
889 return 0;
890}
891
892/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800893 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700894 *
895 * NOTE: This is really only useful during development and can eventually
896 * be #ifdef'd out once the driver is stable and folks aren't actively
897 * making changes
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700900{
901 int error = 0;
902 int counter = 1;
903
904 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
905 error |= le32_to_cpu(rxon->flags &
906 (RXON_FLG_TGJ_NARROW_BAND_MSK |
907 RXON_FLG_RADAR_DETECT_MSK));
908 if (error)
909 IWL_WARNING("check 24G fields %d | %d\n",
910 counter++, error);
911 } else {
912 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
913 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
914 if (error)
915 IWL_WARNING("check 52 fields %d | %d\n",
916 counter++, error);
917 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
918 if (error)
919 IWL_WARNING("check 52 CCK %d | %d\n",
920 counter++, error);
921 }
922 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
923 if (error)
924 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
925
926 /* make sure basic rates 6Mbps and 1Mbps are supported */
927 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
928 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
929 if (error)
930 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
931
932 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
933 if (error)
934 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
935
936 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
937 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
938 if (error)
939 IWL_WARNING("check CCK and short slot %d | %d\n",
940 counter++, error);
941
942 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
943 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
944 if (error)
945 IWL_WARNING("check CCK & auto detect %d | %d\n",
946 counter++, error);
947
948 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
949 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
950 if (error)
951 IWL_WARNING("check TGG and auto detect %d | %d\n",
952 counter++, error);
953
954 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
955 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
956 RXON_FLG_ANT_A_MSK)) == 0);
957 if (error)
958 IWL_WARNING("check antenna %d %d\n", counter++, error);
959
960 if (error)
961 IWL_WARNING("Tuning to channel %d\n",
962 le16_to_cpu(rxon->channel));
963
964 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800965 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700966 return -1;
967 }
968 return 0;
969}
970
971/**
Ben Cahill9fbab512007-11-29 11:09:47 +0800972 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +0800973 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -0700974 *
Ben Cahill9fbab512007-11-29 11:09:47 +0800975 * If the RXON structure is changing enough to require a new tune,
976 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
977 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -0700978 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800979static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700980{
981
982 /* These items are only settable from the full RXON command */
983 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
984 compare_ether_addr(priv->staging_rxon.bssid_addr,
985 priv->active_rxon.bssid_addr) ||
986 compare_ether_addr(priv->staging_rxon.node_addr,
987 priv->active_rxon.node_addr) ||
988 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
989 priv->active_rxon.wlap_bssid_addr) ||
990 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
991 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
992 (priv->staging_rxon.air_propagation !=
993 priv->active_rxon.air_propagation) ||
994 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
995 return 1;
996
997 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
998 * be updated with the RXON_ASSOC command -- however only some
999 * flag transitions are allowed using RXON_ASSOC */
1000
1001 /* Check if we are not switching bands */
1002 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1003 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1004 return 1;
1005
1006 /* Check if we are switching association toggle */
1007 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1008 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1009 return 1;
1010
1011 return 0;
1012}
1013
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001014static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001015{
1016 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001017 struct iwl3945_rx_packet *res = NULL;
1018 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1019 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001020 .id = REPLY_RXON_ASSOC,
1021 .len = sizeof(rxon_assoc),
1022 .meta.flags = CMD_WANT_SKB,
1023 .data = &rxon_assoc,
1024 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001025 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1026 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001027
1028 if ((rxon1->flags == rxon2->flags) &&
1029 (rxon1->filter_flags == rxon2->filter_flags) &&
1030 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1031 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1032 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1033 return 0;
1034 }
1035
1036 rxon_assoc.flags = priv->staging_rxon.flags;
1037 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1038 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1039 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1040 rxon_assoc.reserved = 0;
1041
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001042 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001043 if (rc)
1044 return rc;
1045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001046 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001047 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1048 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1049 rc = -EIO;
1050 }
1051
1052 priv->alloc_rxb_skb--;
1053 dev_kfree_skb_any(cmd.meta.u.skb);
1054
1055 return rc;
1056}
1057
1058/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001059 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001060 *
Ian Schram01ebd062007-10-25 17:15:22 +08001061 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001062 * the active_rxon structure is updated with the new data. This
1063 * function correctly transitions out of the RXON_ASSOC_MSK state if
1064 * a HW tune is required based on the RXON structure changes.
1065 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001066static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001067{
1068 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001069 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001070 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001071 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001072
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001073 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001074 return -1;
1075
1076 /* always get timestamp with Rx frame */
1077 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1078
1079 /* select antenna */
1080 priv->staging_rxon.flags &=
1081 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1082 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001084 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001085 if (rc) {
1086 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1087 return -EINVAL;
1088 }
1089
1090 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001091 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001092 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001093 if (!iwl3945_full_rxon_required(priv)) {
1094 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001095 if (rc) {
1096 IWL_ERROR("Error setting RXON_ASSOC "
1097 "configuration (%d).\n", rc);
1098 return rc;
1099 }
1100
1101 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102
1103 return 0;
1104 }
1105
1106 /* If we are currently associated and the new config requires
1107 * an RXON_ASSOC and the new config wants the associated mask enabled,
1108 * we must clear the associated from the active configuration
1109 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001110 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001111 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1112 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1113 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001115 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1116 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001117 &priv->active_rxon);
1118
1119 /* If the mask clearing failed then we set
1120 * active_rxon back to what it was previously */
1121 if (rc) {
1122 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1123 IWL_ERROR("Error clearing ASSOC_MSK on current "
1124 "configuration (%d).\n", rc);
1125 return rc;
1126 }
Zhu Yib481de92007-09-25 17:54:57 -07001127 }
1128
1129 IWL_DEBUG_INFO("Sending RXON\n"
1130 "* with%s RXON_FILTER_ASSOC_MSK\n"
1131 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001132 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001133 ((priv->staging_rxon.filter_flags &
1134 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1135 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001136 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001137
1138 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001139 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1140 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001141 if (rc) {
1142 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1143 return rc;
1144 }
1145
1146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1147
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001148 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001149
Zhu Yib481de92007-09-25 17:54:57 -07001150 /* If we issue a new RXON command which required a tune then we must
1151 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001152 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001153 if (rc) {
1154 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1155 return rc;
1156 }
1157
1158 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001159 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001160 IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1162 return -EIO;
1163 }
1164
1165 /* If we have set the ASSOC_MSK and we are in BSS mode then
1166 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001167 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001168 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001169 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001170 == IWL_INVALID_STATION) {
1171 IWL_ERROR("Error adding AP address for transmit.\n");
1172 return -EIO;
1173 }
1174
Johannes Berg8318d782008-01-24 19:38:38 +01001175 /* Init the hardware's rate fallback order based on the band */
Zhu Yib481de92007-09-25 17:54:57 -07001176 rc = iwl3945_init_hw_rate_table(priv);
1177 if (rc) {
1178 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1179 return -EIO;
1180 }
1181
1182 return 0;
1183}
1184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001185static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001186{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001187 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001188 .flags = 3,
1189 .lead_time = 0xAA,
1190 .max_kill = 1,
1191 .kill_ack_mask = 0,
1192 .kill_cts_mask = 0,
1193 };
1194
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001195 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1196 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001197}
1198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001200{
1201 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001202 struct iwl3945_rx_packet *res;
1203 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001204 .id = REPLY_SCAN_ABORT_CMD,
1205 .meta.flags = CMD_WANT_SKB,
1206 };
1207
1208 /* If there isn't a scan actively going on in the hardware
1209 * then we are in between scan bands and not actually
1210 * actively scanning, so don't send the abort command */
1211 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1212 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1213 return 0;
1214 }
1215
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001216 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001217 if (rc) {
1218 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1219 return rc;
1220 }
1221
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001222 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001223 if (res->u.status != CAN_ABORT_STATUS) {
1224 /* The scan abort will return 1 for success or
1225 * 2 for "failure". A failure condition can be
1226 * due to simply not being in an active scan which
1227 * can occur if we send the scan abort before we
1228 * the microcode has notified us that a scan is
1229 * completed. */
1230 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1231 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1232 clear_bit(STATUS_SCAN_HW, &priv->status);
1233 }
1234
1235 dev_kfree_skb_any(cmd.meta.u.skb);
1236
1237 return rc;
1238}
1239
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001240static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1241 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001242 struct sk_buff *skb)
1243{
1244 return 1;
1245}
1246
1247/*
1248 * CARD_STATE_CMD
1249 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001250 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001251 *
1252 * When in the 'enable' state the card operates as normal.
1253 * When in the 'disable' state, the card enters into a low power mode.
1254 * When in the 'halt' state, the card is shut down and must be fully
1255 * restarted to come back on.
1256 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001257static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001258{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001259 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001260 .id = REPLY_CARD_STATE_CMD,
1261 .len = sizeof(u32),
1262 .data = &flags,
1263 .meta.flags = meta_flag,
1264 };
1265
1266 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001267 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001269 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001270}
1271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001272static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1273 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001274{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001275 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001276
1277 if (!skb) {
1278 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1279 return 1;
1280 }
1281
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001282 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001283 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1284 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1285 res->hdr.flags);
1286 return 1;
1287 }
1288
1289 switch (res->u.add_sta.status) {
1290 case ADD_STA_SUCCESS_MSK:
1291 break;
1292 default:
1293 break;
1294 }
1295
1296 /* We didn't cache the SKB; let the caller free it */
1297 return 1;
1298}
1299
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300int iwl3945_send_add_station(struct iwl3945_priv *priv,
1301 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001302{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001304 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001305 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001306 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001307 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001308 .meta.flags = flags,
1309 .data = sta,
1310 };
1311
1312 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001313 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001314 else
1315 cmd.meta.flags |= CMD_WANT_SKB;
1316
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001317 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001318
1319 if (rc || (flags & CMD_ASYNC))
1320 return rc;
1321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001322 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001323 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1324 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1325 res->hdr.flags);
1326 rc = -EIO;
1327 }
1328
1329 if (rc == 0) {
1330 switch (res->u.add_sta.status) {
1331 case ADD_STA_SUCCESS_MSK:
1332 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1333 break;
1334 default:
1335 rc = -EIO;
1336 IWL_WARNING("REPLY_ADD_STA failed\n");
1337 break;
1338 }
1339 }
1340
1341 priv->alloc_rxb_skb--;
1342 dev_kfree_skb_any(cmd.meta.u.skb);
1343
1344 return rc;
1345}
1346
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001347static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001348 struct ieee80211_key_conf *keyconf,
1349 u8 sta_id)
1350{
1351 unsigned long flags;
1352 __le16 key_flags = 0;
1353
1354 switch (keyconf->alg) {
1355 case ALG_CCMP:
1356 key_flags |= STA_KEY_FLG_CCMP;
1357 key_flags |= cpu_to_le16(
1358 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1359 key_flags &= ~STA_KEY_FLG_INVALID;
1360 break;
1361 case ALG_TKIP:
1362 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001363 default:
1364 return -EINVAL;
1365 }
1366 spin_lock_irqsave(&priv->sta_lock, flags);
1367 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1368 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1369 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1370 keyconf->keylen);
1371
1372 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1373 keyconf->keylen);
1374 priv->stations[sta_id].sta.key.key_flags = key_flags;
1375 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1376 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1377
1378 spin_unlock_irqrestore(&priv->sta_lock, flags);
1379
1380 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001381 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001382 return 0;
1383}
1384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001385static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001386{
1387 unsigned long flags;
1388
1389 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001390 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1391 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001392 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1393 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1394 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1395 spin_unlock_irqrestore(&priv->sta_lock, flags);
1396
1397 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001398 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001399 return 0;
1400}
1401
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001402static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001403{
1404 struct list_head *element;
1405
1406 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1407 priv->frames_count);
1408
1409 while (!list_empty(&priv->free_frames)) {
1410 element = priv->free_frames.next;
1411 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001412 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001413 priv->frames_count--;
1414 }
1415
1416 if (priv->frames_count) {
1417 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1418 priv->frames_count);
1419 priv->frames_count = 0;
1420 }
1421}
1422
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001424{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001425 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001426 struct list_head *element;
1427 if (list_empty(&priv->free_frames)) {
1428 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1429 if (!frame) {
1430 IWL_ERROR("Could not allocate frame!\n");
1431 return NULL;
1432 }
1433
1434 priv->frames_count++;
1435 return frame;
1436 }
1437
1438 element = priv->free_frames.next;
1439 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001440 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001441}
1442
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001443static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001444{
1445 memset(frame, 0, sizeof(*frame));
1446 list_add(&frame->list, &priv->free_frames);
1447}
1448
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001449unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001450 struct ieee80211_hdr *hdr,
1451 const u8 *dest, int left)
1452{
1453
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001454 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001455 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1456 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1457 return 0;
1458
1459 if (priv->ibss_beacon->len > left)
1460 return 0;
1461
1462 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1463
1464 return priv->ibss_beacon->len;
1465}
1466
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001467static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001468{
1469 u8 i;
1470
1471 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001472 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001473 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001474 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001475 }
1476
1477 return IWL_RATE_INVALID;
1478}
1479
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001480static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001482 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001483 unsigned int frame_size;
1484 int rc;
1485 u8 rate;
1486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001487 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001488
1489 if (!frame) {
1490 IWL_ERROR("Could not obtain free frame buffer for beacon "
1491 "command.\n");
1492 return -ENOMEM;
1493 }
1494
1495 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001496 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001497 0xFF0);
1498 if (rate == IWL_INVALID_RATE)
1499 rate = IWL_RATE_6M_PLCP;
1500 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001501 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001502 if (rate == IWL_INVALID_RATE)
1503 rate = IWL_RATE_1M_PLCP;
1504 }
1505
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001506 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001507
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001508 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001509 &frame->u.cmd[0]);
1510
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001511 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001512
1513 return rc;
1514}
1515
1516/******************************************************************************
1517 *
1518 * EEPROM related functions
1519 *
1520 ******************************************************************************/
1521
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001522static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001523{
1524 memcpy(mac, priv->eeprom.mac_address, 6);
1525}
1526
Reinette Chatre74a3a252008-01-23 10:15:19 -08001527/*
1528 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1529 * embedded controller) as EEPROM reader; each read is a series of pulses
1530 * to/from the EEPROM chip, not a single event, so even reads could conflict
1531 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1532 * simply claims ownership, which should be safe when this function is called
1533 * (i.e. before loading uCode!).
1534 */
1535static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1536{
1537 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1538 return 0;
1539}
1540
Zhu Yib481de92007-09-25 17:54:57 -07001541/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001542 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001543 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001544 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001545 *
1546 * NOTE: This routine uses the non-debug IO access functions.
1547 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001548int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001549{
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001550 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001551 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001552 u32 r;
1553 int sz = sizeof(priv->eeprom);
1554 int rc;
1555 int i;
1556 u16 addr;
1557
1558 /* The EEPROM structure has several padding buffers within it
1559 * and when adding new EEPROM maps is subject to programmer errors
1560 * which may be very difficult to identify without explicitly
1561 * checking the resulting size of the eeprom map. */
1562 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1563
1564 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1565 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1566 return -ENOENT;
1567 }
1568
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001569 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001570 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001571 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001572 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001573 return -ENOENT;
1574 }
1575
1576 /* eeprom is an array of 16bit values */
1577 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001578 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1579 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001580
1581 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1582 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001583 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001584 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1585 break;
1586 udelay(IWL_EEPROM_ACCESS_DELAY);
1587 }
1588
1589 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1590 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1591 return -ETIMEDOUT;
1592 }
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001593 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
Zhu Yib481de92007-09-25 17:54:57 -07001594 }
1595
1596 return 0;
1597}
1598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001600{
1601 if (priv->hw_setting.shared_virt)
1602 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001603 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001604 priv->hw_setting.shared_virt,
1605 priv->hw_setting.shared_phys);
1606}
1607
1608/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001609 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001610 *
1611 * return : set the bit for each supported rate insert in ie
1612 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001613static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001614 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001615{
1616 u16 ret_rates = 0, bit;
1617 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001618 u8 *cnt = ie;
1619 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001620
1621 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1622 if (bit & supported_rate) {
1623 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001624 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001625 ((bit & basic_rate) ? 0x80 : 0x00);
1626 (*cnt)++;
1627 (*left)--;
1628 if ((*left <= 0) ||
1629 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001630 break;
1631 }
1632 }
1633
1634 return ret_rates;
1635}
1636
1637/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001638 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001639 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001640static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001641 struct ieee80211_mgmt *frame,
1642 int left, int is_direct)
1643{
1644 int len = 0;
1645 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001646 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001647
1648 /* Make sure there is enough space for the probe request,
1649 * two mandatory IEs and the data */
1650 left -= 24;
1651 if (left < 0)
1652 return 0;
1653 len += 24;
1654
1655 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001656 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001657 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001658 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001659 frame->seq_ctrl = 0;
1660
1661 /* fill in our indirect SSID IE */
1662 /* ...next IE... */
1663
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
1667 len += 2;
1668 pos = &(frame->u.probe_req.variable[0]);
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = 0;
1671
1672 /* fill in our direct SSID IE... */
1673 if (is_direct) {
1674 /* ...next IE... */
1675 left -= 2 + priv->essid_len;
1676 if (left < 0)
1677 return 0;
1678 /* ... fill it in... */
1679 *pos++ = WLAN_EID_SSID;
1680 *pos++ = priv->essid_len;
1681 memcpy(pos, priv->essid, priv->essid_len);
1682 pos += priv->essid_len;
1683 len += 2 + priv->essid_len;
1684 }
1685
1686 /* fill in supported rate */
1687 /* ...next IE... */
1688 left -= 2;
1689 if (left < 0)
1690 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001691
Zhu Yib481de92007-09-25 17:54:57 -07001692 /* ... fill it in... */
1693 *pos++ = WLAN_EID_SUPP_RATES;
1694 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001695
1696 priv->active_rate = priv->rates_mask;
1697 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001698 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1699
Tomas Winklerc7c46672007-10-18 02:04:15 +02001700 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001701 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001702 priv->active_rate_basic, &left);
1703 active_rates &= ~ret_rates;
1704
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001705 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001706 priv->active_rate_basic, &left);
1707 active_rates &= ~ret_rates;
1708
Zhu Yib481de92007-09-25 17:54:57 -07001709 len += 2 + *pos;
1710 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001711 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001712 goto fill_end;
1713
1714 /* fill in supported extended rate */
1715 /* ...next IE... */
1716 left -= 2;
1717 if (left < 0)
1718 return 0;
1719 /* ... fill it in... */
1720 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1721 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001722 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001723 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001724 if (*pos > 0)
1725 len += 2 + *pos;
1726
1727 fill_end:
1728 return (u16)len;
1729}
1730
1731/*
1732 * QoS support
1733*/
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001734static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1735 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001736{
1737
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001738 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1739 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001740}
1741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001742static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001743{
1744 u16 cw_min = 15;
1745 u16 cw_max = 1023;
1746 u8 aifs = 2;
1747 u8 is_legacy = 0;
1748 unsigned long flags;
1749 int i;
1750
1751 spin_lock_irqsave(&priv->lock, flags);
1752 priv->qos_data.qos_active = 0;
1753
1754 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1755 if (priv->qos_data.qos_enable)
1756 priv->qos_data.qos_active = 1;
1757 if (!(priv->active_rate & 0xfff0)) {
1758 cw_min = 31;
1759 is_legacy = 1;
1760 }
1761 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1762 if (priv->qos_data.qos_enable)
1763 priv->qos_data.qos_active = 1;
1764 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1765 cw_min = 31;
1766 is_legacy = 1;
1767 }
1768
1769 if (priv->qos_data.qos_active)
1770 aifs = 3;
1771
1772 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1773 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1774 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1775 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1776 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1777
1778 if (priv->qos_data.qos_active) {
1779 i = 1;
1780 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1781 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1782 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1784 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1785
1786 i = 2;
1787 priv->qos_data.def_qos_parm.ac[i].cw_min =
1788 cpu_to_le16((cw_min + 1) / 2 - 1);
1789 priv->qos_data.def_qos_parm.ac[i].cw_max =
1790 cpu_to_le16(cw_max);
1791 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1792 if (is_legacy)
1793 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1794 cpu_to_le16(6016);
1795 else
1796 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1797 cpu_to_le16(3008);
1798 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1799
1800 i = 3;
1801 priv->qos_data.def_qos_parm.ac[i].cw_min =
1802 cpu_to_le16((cw_min + 1) / 4 - 1);
1803 priv->qos_data.def_qos_parm.ac[i].cw_max =
1804 cpu_to_le16((cw_max + 1) / 2 - 1);
1805 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1806 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1807 if (is_legacy)
1808 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1809 cpu_to_le16(3264);
1810 else
1811 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1812 cpu_to_le16(1504);
1813 } else {
1814 for (i = 1; i < 4; i++) {
1815 priv->qos_data.def_qos_parm.ac[i].cw_min =
1816 cpu_to_le16(cw_min);
1817 priv->qos_data.def_qos_parm.ac[i].cw_max =
1818 cpu_to_le16(cw_max);
1819 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1820 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1821 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1822 }
1823 }
1824 IWL_DEBUG_QOS("set QoS to default \n");
1825
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827}
1828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001829static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07001830{
1831 unsigned long flags;
1832
Zhu Yib481de92007-09-25 17:54:57 -07001833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1834 return;
1835
1836 if (!priv->qos_data.qos_enable)
1837 return;
1838
1839 spin_lock_irqsave(&priv->lock, flags);
1840 priv->qos_data.def_qos_parm.qos_flags = 0;
1841
1842 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1843 !priv->qos_data.qos_cap.q_AP.txop_request)
1844 priv->qos_data.def_qos_parm.qos_flags |=
1845 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1846
1847 if (priv->qos_data.qos_active)
1848 priv->qos_data.def_qos_parm.qos_flags |=
1849 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1850
1851 spin_unlock_irqrestore(&priv->lock, flags);
1852
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001853 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07001854 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1855 priv->qos_data.qos_active);
1856
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001857 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001858 &(priv->qos_data.def_qos_parm));
1859 }
1860}
1861
Zhu Yib481de92007-09-25 17:54:57 -07001862/*
1863 * Power management (not Tx power!) functions
1864 */
1865#define MSEC_TO_USEC 1024
1866
1867#define NOSLP __constant_cpu_to_le32(0)
1868#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1869#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877/* default power management (not Tx power) table values */
1878/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886};
1887
1888/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001889static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900};
1901
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001902int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001903{
1904 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001905 struct iwl3945_power_mgr *pow_data;
1906 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07001907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001925 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939}
1940
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001941static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1942 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001943{
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001947 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07001948 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001949 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07001950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07001963
1964#ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970#endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003}
2004
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002005static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002006{
John W. Linville9a62f732007-11-15 16:27:36 -05002007 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002008 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002009 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002010
2011 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002012 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002026 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002029
2030 if (final_mode == IWL_POWER_MODE_CAM)
2031 clear_bit(STATUS_POWER_PMI, &priv->status);
2032 else
2033 set_bit(STATUS_POWER_PMI, &priv->status);
2034
2035 return rc;
2036}
2037
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002038int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002039{
2040 /* Filter incoming packets to determine if they are targeted toward
2041 * this network, discarding packets coming from ourselves */
2042 switch (priv->iw_mode) {
2043 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2044 /* packets from our adapter are dropped (echo) */
2045 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2046 return 0;
2047 /* {broad,multi}cast packets to our IBSS go through */
2048 if (is_multicast_ether_addr(header->addr1))
2049 return !compare_ether_addr(header->addr3, priv->bssid);
2050 /* packets to our adapter go through */
2051 return !compare_ether_addr(header->addr1, priv->mac_addr);
2052 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2053 /* packets from our adapter are dropped (echo) */
2054 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2055 return 0;
2056 /* {broad,multi}cast packets to our BSS go through */
2057 if (is_multicast_ether_addr(header->addr1))
2058 return !compare_ether_addr(header->addr2, priv->bssid);
2059 /* packets to our adapter go through */
2060 return !compare_ether_addr(header->addr1, priv->mac_addr);
2061 }
2062
2063 return 1;
2064}
2065
2066#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2067
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002068static const char *iwl3945_get_tx_fail_reason(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07002069{
2070 switch (status & TX_STATUS_MSK) {
2071 case TX_STATUS_SUCCESS:
2072 return "SUCCESS";
2073 TX_STATUS_ENTRY(SHORT_LIMIT);
2074 TX_STATUS_ENTRY(LONG_LIMIT);
2075 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2076 TX_STATUS_ENTRY(MGMNT_ABORT);
2077 TX_STATUS_ENTRY(NEXT_FRAG);
2078 TX_STATUS_ENTRY(LIFE_EXPIRE);
2079 TX_STATUS_ENTRY(DEST_PS);
2080 TX_STATUS_ENTRY(ABORTED);
2081 TX_STATUS_ENTRY(BT_RETRY);
2082 TX_STATUS_ENTRY(STA_INVALID);
2083 TX_STATUS_ENTRY(FRAG_DROPPED);
2084 TX_STATUS_ENTRY(TID_DISABLE);
2085 TX_STATUS_ENTRY(FRAME_FLUSHED);
2086 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2087 TX_STATUS_ENTRY(TX_LOCKED);
2088 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2089 }
2090
2091 return "UNKNOWN";
2092}
2093
2094/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002095 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002096 *
2097 * NOTE: priv->mutex is not required before calling this function
2098 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002099static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002100{
2101 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2102 clear_bit(STATUS_SCANNING, &priv->status);
2103 return 0;
2104 }
2105
2106 if (test_bit(STATUS_SCANNING, &priv->status)) {
2107 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2108 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2109 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2110 queue_work(priv->workqueue, &priv->abort_scan);
2111
2112 } else
2113 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2114
2115 return test_bit(STATUS_SCANNING, &priv->status);
2116 }
2117
2118 return 0;
2119}
2120
2121/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002122 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002123 * @ms: amount of time to wait (in milliseconds) for scan to abort
2124 *
2125 * NOTE: priv->mutex must be held before calling this function
2126 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002127static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002128{
2129 unsigned long now = jiffies;
2130 int ret;
2131
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002132 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002133 if (ret && ms) {
2134 mutex_unlock(&priv->mutex);
2135 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2136 test_bit(STATUS_SCANNING, &priv->status))
2137 msleep(1);
2138 mutex_lock(&priv->mutex);
2139
2140 return test_bit(STATUS_SCANNING, &priv->status);
2141 }
2142
2143 return ret;
2144}
2145
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002146static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002147{
2148 /* Reset ieee stats */
2149
2150 /* We don't reset the net_device_stats (ieee->stats) on
2151 * re-association */
2152
2153 priv->last_seq_num = -1;
2154 priv->last_frag_num = -1;
2155 priv->last_packet_time = 0;
2156
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002157 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002158}
2159
2160#define MAX_UCODE_BEACON_INTERVAL 1024
2161#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2162
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002163static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002164{
2165 u16 new_val = 0;
2166 u16 beacon_factor = 0;
2167
2168 beacon_factor =
2169 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2170 / MAX_UCODE_BEACON_INTERVAL;
2171 new_val = beacon_val / beacon_factor;
2172
2173 return cpu_to_le16(new_val);
2174}
2175
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002176static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002177{
2178 u64 interval_tm_unit;
2179 u64 tsf, result;
2180 unsigned long flags;
2181 struct ieee80211_conf *conf = NULL;
2182 u16 beacon_int = 0;
2183
2184 conf = ieee80211_get_hw_conf(priv->hw);
2185
2186 spin_lock_irqsave(&priv->lock, flags);
2187 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2188 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2189
2190 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2191
2192 tsf = priv->timestamp1;
2193 tsf = ((tsf << 32) | priv->timestamp0);
2194
2195 beacon_int = priv->beacon_int;
2196 spin_unlock_irqrestore(&priv->lock, flags);
2197
2198 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2199 if (beacon_int == 0) {
2200 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2201 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2202 } else {
2203 priv->rxon_timing.beacon_interval =
2204 cpu_to_le16(beacon_int);
2205 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002206 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002207 le16_to_cpu(priv->rxon_timing.beacon_interval));
2208 }
2209
2210 priv->rxon_timing.atim_window = 0;
2211 } else {
2212 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002213 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002214 /* TODO: we need to get atim_window from upper stack
2215 * for now we set to 0 */
2216 priv->rxon_timing.atim_window = 0;
2217 }
2218
2219 interval_tm_unit =
2220 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2221 result = do_div(tsf, interval_tm_unit);
2222 priv->rxon_timing.beacon_init_val =
2223 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2224
2225 IWL_DEBUG_ASSOC
2226 ("beacon interval %d beacon timer %d beacon tim %d\n",
2227 le16_to_cpu(priv->rxon_timing.beacon_interval),
2228 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2229 le16_to_cpu(priv->rxon_timing.atim_window));
2230}
2231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002232static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002233{
2234 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2235 IWL_ERROR("APs don't scan.\n");
2236 return 0;
2237 }
2238
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002239 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002240 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2241 return -EIO;
2242 }
2243
2244 if (test_bit(STATUS_SCANNING, &priv->status)) {
2245 IWL_DEBUG_SCAN("Scan already in progress.\n");
2246 return -EAGAIN;
2247 }
2248
2249 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2250 IWL_DEBUG_SCAN("Scan request while abort pending. "
2251 "Queuing.\n");
2252 return -EAGAIN;
2253 }
2254
2255 IWL_DEBUG_INFO("Starting scan...\n");
2256 priv->scan_bands = 2;
2257 set_bit(STATUS_SCANNING, &priv->status);
2258 priv->scan_start = jiffies;
2259 priv->scan_pass_start = priv->scan_start;
2260
2261 queue_work(priv->workqueue, &priv->request_scan);
2262
2263 return 0;
2264}
2265
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002266static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002267{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002268 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002269
2270 if (hw_decrypt)
2271 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2272 else
2273 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2274
2275 return 0;
2276}
2277
Johannes Berg8318d782008-01-24 19:38:38 +01002278static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2279 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07002280{
Johannes Berg8318d782008-01-24 19:38:38 +01002281 if (band == IEEE80211_BAND_5GHZ) {
Zhu Yib481de92007-09-25 17:54:57 -07002282 priv->staging_rxon.flags &=
2283 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2284 | RXON_FLG_CCK_MSK);
2285 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2286 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002287 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002288 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2289 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2290 else
2291 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2292
2293 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2294 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2295
2296 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2297 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2298 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2299 }
2300}
2301
2302/*
Ian Schram01ebd062007-10-25 17:15:22 +08002303 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002304 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002305static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002306{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002307 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002308
2309 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2310
2311 switch (priv->iw_mode) {
2312 case IEEE80211_IF_TYPE_AP:
2313 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2314 break;
2315
2316 case IEEE80211_IF_TYPE_STA:
2317 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2318 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2319 break;
2320
2321 case IEEE80211_IF_TYPE_IBSS:
2322 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2323 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2324 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2325 RXON_FILTER_ACCEPT_GRP_MSK;
2326 break;
2327
2328 case IEEE80211_IF_TYPE_MNTR:
2329 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2330 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2331 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2332 break;
2333 }
2334
2335#if 0
2336 /* TODO: Figure out when short_preamble would be set and cache from
2337 * that */
2338 if (!hw_to_local(priv->hw)->short_preamble)
2339 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2340 else
2341 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2342#endif
2343
Johannes Berg8318d782008-01-24 19:38:38 +01002344 ch_info = iwl3945_get_channel_info(priv, priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002345 le16_to_cpu(priv->staging_rxon.channel));
2346
2347 if (!ch_info)
2348 ch_info = &priv->channel_info[0];
2349
2350 /*
2351 * in some case A channels are all non IBSS
2352 * in this case force B/G channel
2353 */
2354 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2355 !(is_channel_ibss(ch_info)))
2356 ch_info = &priv->channel_info[0];
2357
2358 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2359 if (is_channel_a_band(ch_info))
Johannes Berg8318d782008-01-24 19:38:38 +01002360 priv->band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002361 else
Johannes Berg8318d782008-01-24 19:38:38 +01002362 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002363
Johannes Berg8318d782008-01-24 19:38:38 +01002364 iwl3945_set_flags_for_phymode(priv, priv->band);
Zhu Yib481de92007-09-25 17:54:57 -07002365
2366 priv->staging_rxon.ofdm_basic_rates =
2367 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2368 priv->staging_rxon.cck_basic_rates =
2369 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2370}
2371
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002372static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002373{
Zhu Yib481de92007-09-25 17:54:57 -07002374 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002375 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002376
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002377 ch_info = iwl3945_get_channel_info(priv,
Johannes Berg8318d782008-01-24 19:38:38 +01002378 priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002379 le16_to_cpu(priv->staging_rxon.channel));
2380
2381 if (!ch_info || !is_channel_ibss(ch_info)) {
2382 IWL_ERROR("channel %d not IBSS channel\n",
2383 le16_to_cpu(priv->staging_rxon.channel));
2384 return -EINVAL;
2385 }
2386 }
2387
Zhu Yib481de92007-09-25 17:54:57 -07002388 priv->iw_mode = mode;
2389
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002390 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002391 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2392
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002393 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002394
Mohamed Abbasfde35712007-11-29 11:10:15 +08002395 /* dont commit rxon if rf-kill is on*/
2396 if (!iwl3945_is_ready_rf(priv))
2397 return -EAGAIN;
2398
2399 cancel_delayed_work(&priv->scan_check);
2400 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2401 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2402 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2403 return -EAGAIN;
2404 }
2405
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002406 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002407
2408 return 0;
2409}
2410
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002411static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002412 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002413 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002414 struct sk_buff *skb_frag,
2415 int last_frag)
2416{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002417 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002418
2419 switch (keyinfo->alg) {
2420 case ALG_CCMP:
2421 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2422 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2423 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2424 break;
2425
2426 case ALG_TKIP:
2427#if 0
2428 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2429
2430 if (last_frag)
2431 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2432 8);
2433 else
2434 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2435#endif
2436 break;
2437
2438 case ALG_WEP:
2439 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2440 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2441
2442 if (keyinfo->keylen == 13)
2443 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2444
2445 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2446
2447 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2448 "with key %d\n", ctl->key_idx);
2449 break;
2450
Zhu Yib481de92007-09-25 17:54:57 -07002451 default:
2452 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2453 break;
2454 }
2455}
2456
2457/*
2458 * handle build REPLY_TX command notification.
2459 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002460static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2461 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002462 struct ieee80211_tx_control *ctrl,
2463 struct ieee80211_hdr *hdr,
2464 int is_unicast, u8 std_id)
2465{
2466 __le16 *qc;
2467 u16 fc = le16_to_cpu(hdr->frame_control);
2468 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2469
2470 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2471 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2472 tx_flags |= TX_CMD_FLG_ACK_MSK;
2473 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2474 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2475 if (ieee80211_is_probe_response(fc) &&
2476 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2477 tx_flags |= TX_CMD_FLG_TSF_MSK;
2478 } else {
2479 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2480 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2481 }
2482
2483 cmd->cmd.tx.sta_id = std_id;
2484 if (ieee80211_get_morefrag(hdr))
2485 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2486
2487 qc = ieee80211_get_qos_ctrl(hdr);
2488 if (qc) {
2489 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2490 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2491 } else
2492 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2493
2494 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2495 tx_flags |= TX_CMD_FLG_RTS_MSK;
2496 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2497 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2498 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2499 tx_flags |= TX_CMD_FLG_CTS_MSK;
2500 }
2501
2502 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2503 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2504
2505 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2506 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2507 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2508 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002509 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002510 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002511 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002512 } else
2513 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2514
2515 cmd->cmd.tx.driver_txop = 0;
2516 cmd->cmd.tx.tx_flags = tx_flags;
2517 cmd->cmd.tx.next_frame_len = 0;
2518}
2519
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002520/**
2521 * iwl3945_get_sta_id - Find station's index within station table
2522 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002523static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002524{
2525 int sta_id;
2526 u16 fc = le16_to_cpu(hdr->frame_control);
2527
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002528 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002529 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2530 is_multicast_ether_addr(hdr->addr1))
2531 return priv->hw_setting.bcast_sta_id;
2532
2533 switch (priv->iw_mode) {
2534
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002535 /* If we are a client station in a BSS network, use the special
2536 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002537 case IEEE80211_IF_TYPE_STA:
2538 return IWL_AP_ID;
2539
2540 /* If we are an AP, then find the station, or use BCAST */
2541 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002542 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002543 if (sta_id != IWL_INVALID_STATION)
2544 return sta_id;
2545 return priv->hw_setting.bcast_sta_id;
2546
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002547 /* If this frame is going out to an IBSS network, find the station,
2548 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002549 case IEEE80211_IF_TYPE_IBSS: {
2550 DECLARE_MAC_BUF(mac);
2551
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002552 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002554 if (sta_id != IWL_INVALID_STATION)
2555 return sta_id;
2556
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002557 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002558
2559 if (sta_id != IWL_INVALID_STATION)
2560 return sta_id;
2561
Joe Perches0795af52007-10-03 17:59:30 -07002562 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002563 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002564 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002565 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002566 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002567 }
Zhu Yib481de92007-09-25 17:54:57 -07002568 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002569 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002570 return priv->hw_setting.bcast_sta_id;
2571 }
2572}
2573
2574/*
2575 * start REPLY_TX command process
2576 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002577static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002578 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2579{
2580 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002581 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002582 u32 *control_flags;
2583 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002584 struct iwl3945_tx_queue *txq = NULL;
2585 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002586 dma_addr_t phys_addr;
2587 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002588 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002589 u16 len, idx, len_org;
2590 u8 id, hdr_len, unicast;
2591 u8 sta_id;
2592 u16 seq_number = 0;
2593 u16 fc;
2594 __le16 *qc;
2595 u8 wait_write_ptr = 0;
2596 unsigned long flags;
2597 int rc;
2598
2599 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002600 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002601 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2602 goto drop_unlock;
2603 }
2604
Johannes Berg32bfd352007-12-19 01:31:26 +01002605 if (!priv->vif) {
2606 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002607 goto drop_unlock;
2608 }
2609
Johannes Berg8318d782008-01-24 19:38:38 +01002610 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
Zhu Yib481de92007-09-25 17:54:57 -07002611 IWL_ERROR("ERROR: No TX rate available.\n");
2612 goto drop_unlock;
2613 }
2614
2615 unicast = !is_multicast_ether_addr(hdr->addr1);
2616 id = 0;
2617
2618 fc = le16_to_cpu(hdr->frame_control);
2619
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002620#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002621 if (ieee80211_is_auth(fc))
2622 IWL_DEBUG_TX("Sending AUTH frame\n");
2623 else if (ieee80211_is_assoc_request(fc))
2624 IWL_DEBUG_TX("Sending ASSOC frame\n");
2625 else if (ieee80211_is_reassoc_request(fc))
2626 IWL_DEBUG_TX("Sending REASSOC frame\n");
2627#endif
2628
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002629 /* drop all data frame if we are not associated */
Reinette Chatrea6477242008-02-14 10:40:28 -08002630 if ((!iwl3945_is_associated(priv) ||
2631 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
Zhu Yib481de92007-09-25 17:54:57 -07002632 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002633 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002634 goto drop_unlock;
2635 }
2636
2637 spin_unlock_irqrestore(&priv->lock, flags);
2638
2639 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002640
2641 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002642 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002643 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002644 DECLARE_MAC_BUF(mac);
2645
2646 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2647 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002648 goto drop;
2649 }
2650
2651 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2652
2653 qc = ieee80211_get_qos_ctrl(hdr);
2654 if (qc) {
2655 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2656 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2657 IEEE80211_SCTL_SEQ;
2658 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2659 (hdr->seq_ctrl &
2660 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2661 seq_number += 0x10;
2662 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002663
2664 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002665 txq = &priv->txq[txq_id];
2666 q = &txq->q;
2667
2668 spin_lock_irqsave(&priv->lock, flags);
2669
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002670 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002671 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002672 memset(tfd, 0, sizeof(*tfd));
2673 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002674 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002675
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002676 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002677 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002678 txq->txb[q->write_ptr].skb[0] = skb;
2679 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002680 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002681
2682 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002683 out_cmd = &txq->cmd[idx];
2684 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2685 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002686
2687 /*
2688 * Set up the Tx-command (not MAC!) header.
2689 * Store the chosen Tx queue and TFD index within the sequence field;
2690 * after Tx, uCode's Tx response will return this value so driver can
2691 * locate the frame within the tx queue and do post-tx processing.
2692 */
Zhu Yib481de92007-09-25 17:54:57 -07002693 out_cmd->hdr.cmd = REPLY_TX;
2694 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002695 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002696
2697 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002698 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2699
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002700 /*
2701 * Use the first empty entry in this queue's command buffer array
2702 * to contain the Tx command and MAC header concatenated together
2703 * (payload data will be in another buffer).
2704 * Size of this varies, due to varying MAC header length.
2705 * If end is not dword aligned, we'll have 2 extra bytes at the end
2706 * of the MAC header (device reads on dword boundaries).
2707 * We'll tell device about this padding later.
2708 */
Zhu Yib481de92007-09-25 17:54:57 -07002709 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002710 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002711
2712 len_org = len;
2713 len = (len + 3) & ~3;
2714
2715 if (len_org != len)
2716 len_org = 1;
2717 else
2718 len_org = 0;
2719
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002720 /* Physical address of this Tx command's header (not MAC header!),
2721 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002722 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2723 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002724
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002725 /* Add buffer containing Tx command and MAC(!) header to TFD's
2726 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002727 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002728
2729 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002730 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002731
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002732 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2733 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002734 len = skb->len - hdr_len;
2735 if (len) {
2736 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2737 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002738 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002739 }
2740
Zhu Yib481de92007-09-25 17:54:57 -07002741 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002742 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002743 *control_flags = TFD_CTL_COUNT_SET(1);
2744 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002745 /* Else use 2 buffers.
2746 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002747 *control_flags = TFD_CTL_COUNT_SET(2) |
2748 TFD_CTL_PAD_SET(U32_PAD(len));
2749
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002750 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002751 len = (u16)skb->len;
2752 out_cmd->cmd.tx.len = cpu_to_le16(len);
2753
2754 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002755 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002756
2757 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002758 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002759
2760 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2761 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2762
2763 if (!ieee80211_get_morefrag(hdr)) {
2764 txq->need_update = 1;
2765 if (qc) {
2766 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2767 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2768 }
2769 } else {
2770 wait_write_ptr = 1;
2771 txq->need_update = 0;
2772 }
2773
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002774 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002775 sizeof(out_cmd->cmd.tx));
2776
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002777 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002778 ieee80211_get_hdrlen(fc));
2779
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002780 /* Tell device the write index *just past* this latest filled TFD */
Tomas Winklerc54b6792008-03-06 17:36:53 -08002781 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002782 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002783 spin_unlock_irqrestore(&priv->lock, flags);
2784
2785 if (rc)
2786 return rc;
2787
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002788 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002789 && priv->mac80211_registered) {
2790 if (wait_write_ptr) {
2791 spin_lock_irqsave(&priv->lock, flags);
2792 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002793 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002794 spin_unlock_irqrestore(&priv->lock, flags);
2795 }
2796
2797 ieee80211_stop_queue(priv->hw, ctl->queue);
2798 }
2799
2800 return 0;
2801
2802drop_unlock:
2803 spin_unlock_irqrestore(&priv->lock, flags);
2804drop:
2805 return -1;
2806}
2807
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002808static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002809{
Johannes Berg8318d782008-01-24 19:38:38 +01002810 const struct ieee80211_supported_band *sband = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002811 struct ieee80211_rate *rate;
2812 int i;
2813
Johannes Berg8318d782008-01-24 19:38:38 +01002814 sband = iwl3945_get_band(priv, priv->band);
2815 if (!sband) {
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002816 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2817 return;
2818 }
Zhu Yib481de92007-09-25 17:54:57 -07002819
2820 priv->active_rate = 0;
2821 priv->active_rate_basic = 0;
2822
Johannes Berg8318d782008-01-24 19:38:38 +01002823 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2824 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
Zhu Yib481de92007-09-25 17:54:57 -07002825
Johannes Berg8318d782008-01-24 19:38:38 +01002826 for (i = 0; i < sband->n_bitrates; i++) {
2827 rate = &sband->bitrates[i];
2828 if ((rate->hw_value < IWL_RATE_COUNT) &&
2829 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2830 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2831 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2832 priv->active_rate |= (1 << rate->hw_value);
2833 }
Zhu Yib481de92007-09-25 17:54:57 -07002834 }
2835
2836 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2837 priv->active_rate, priv->active_rate_basic);
2838
2839 /*
2840 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2841 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2842 * OFDM
2843 */
2844 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2845 priv->staging_rxon.cck_basic_rates =
2846 ((priv->active_rate_basic &
2847 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2848 else
2849 priv->staging_rxon.cck_basic_rates =
2850 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2851
2852 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2853 priv->staging_rxon.ofdm_basic_rates =
2854 ((priv->active_rate_basic &
2855 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2856 IWL_FIRST_OFDM_RATE) & 0xFF;
2857 else
2858 priv->staging_rxon.ofdm_basic_rates =
2859 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2860}
2861
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002862static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07002863{
2864 unsigned long flags;
2865
2866 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2867 return;
2868
2869 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2870 disable_radio ? "OFF" : "ON");
2871
2872 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002873 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002874 /* FIXME: This is a workaround for AP */
2875 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2876 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002877 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07002878 CSR_UCODE_SW_BIT_RFKILL);
2879 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002880 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002881 set_bit(STATUS_RF_KILL_SW, &priv->status);
2882 }
2883 return;
2884 }
2885
2886 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002887 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07002888
2889 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2890 spin_unlock_irqrestore(&priv->lock, flags);
2891
2892 /* wake up ucode */
2893 msleep(10);
2894
2895 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002896 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2897 if (!iwl3945_grab_nic_access(priv))
2898 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002899 spin_unlock_irqrestore(&priv->lock, flags);
2900
2901 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2902 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2903 "disabled by HW switch\n");
2904 return;
2905 }
2906
2907 queue_work(priv->workqueue, &priv->restart);
2908 return;
2909}
2910
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002911void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07002912 u32 decrypt_res, struct ieee80211_rx_status *stats)
2913{
2914 u16 fc =
2915 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2916
2917 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2918 return;
2919
2920 if (!(fc & IEEE80211_FCTL_PROTECTED))
2921 return;
2922
2923 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2924 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2925 case RX_RES_STATUS_SEC_TYPE_TKIP:
2926 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2927 RX_RES_STATUS_BAD_ICV_MIC)
2928 stats->flag |= RX_FLAG_MMIC_ERROR;
2929 case RX_RES_STATUS_SEC_TYPE_WEP:
2930 case RX_RES_STATUS_SEC_TYPE_CCMP:
2931 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2932 RX_RES_STATUS_DECRYPT_OK) {
2933 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2934 stats->flag |= RX_FLAG_DECRYPTED;
2935 }
2936 break;
2937
2938 default:
2939 break;
2940 }
2941}
2942
Zhu Yib481de92007-09-25 17:54:57 -07002943#define IWL_PACKET_RETRY_TIME HZ
2944
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002945int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002946{
2947 u16 sc = le16_to_cpu(header->seq_ctrl);
2948 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2949 u16 frag = sc & IEEE80211_SCTL_FRAG;
2950 u16 *last_seq, *last_frag;
2951 unsigned long *last_time;
2952
2953 switch (priv->iw_mode) {
2954 case IEEE80211_IF_TYPE_IBSS:{
2955 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002956 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002957 u8 *mac = header->addr2;
2958 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2959
2960 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002961 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07002962 if (!compare_ether_addr(entry->mac, mac))
2963 break;
2964 }
2965 if (p == &priv->ibss_mac_hash[index]) {
2966 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2967 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08002968 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07002969 return 0;
2970 }
2971 memcpy(entry->mac, mac, ETH_ALEN);
2972 entry->seq_num = seq;
2973 entry->frag_num = frag;
2974 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08002975 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07002976 return 0;
2977 }
2978 last_seq = &entry->seq_num;
2979 last_frag = &entry->frag_num;
2980 last_time = &entry->packet_time;
2981 break;
2982 }
2983 case IEEE80211_IF_TYPE_STA:
2984 last_seq = &priv->last_seq_num;
2985 last_frag = &priv->last_frag_num;
2986 last_time = &priv->last_packet_time;
2987 break;
2988 default:
2989 return 0;
2990 }
2991 if ((*last_seq == seq) &&
2992 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2993 if (*last_frag == frag)
2994 goto drop;
2995 if (*last_frag + 1 != frag)
2996 /* out-of-order fragment */
2997 goto drop;
2998 } else
2999 *last_seq = seq;
3000
3001 *last_frag = frag;
3002 *last_time = jiffies;
3003 return 0;
3004
3005 drop:
3006 return 1;
3007}
3008
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003009#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07003010
3011#include "iwl-spectrum.h"
3012
3013#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3014#define BEACON_TIME_MASK_HIGH 0xFF000000
3015#define TIME_UNIT 1024
3016
3017/*
3018 * extended beacon time format
3019 * time in usec will be changed into a 32-bit value in 8:24 format
3020 * the high 1 byte is the beacon counts
3021 * the lower 3 bytes is the time in usec within one beacon interval
3022 */
3023
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003024static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003025{
3026 u32 quot;
3027 u32 rem;
3028 u32 interval = beacon_interval * 1024;
3029
3030 if (!interval || !usec)
3031 return 0;
3032
3033 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3034 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3035
3036 return (quot << 24) + rem;
3037}
3038
3039/* base is usually what we get from ucode with each received frame,
3040 * the same as HW timer counter counting down
3041 */
3042
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003043static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003044{
3045 u32 base_low = base & BEACON_TIME_MASK_LOW;
3046 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3047 u32 interval = beacon_interval * TIME_UNIT;
3048 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3049 (addon & BEACON_TIME_MASK_HIGH);
3050
3051 if (base_low > addon_low)
3052 res += base_low - addon_low;
3053 else if (base_low < addon_low) {
3054 res += interval + base_low - addon_low;
3055 res += (1 << 24);
3056 } else
3057 res += (1 << 24);
3058
3059 return cpu_to_le32(res);
3060}
3061
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003062static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003063 struct ieee80211_measurement_params *params,
3064 u8 type)
3065{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003066 struct iwl3945_spectrum_cmd spectrum;
3067 struct iwl3945_rx_packet *res;
3068 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003069 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3070 .data = (void *)&spectrum,
3071 .meta.flags = CMD_WANT_SKB,
3072 };
3073 u32 add_time = le64_to_cpu(params->start_time);
3074 int rc;
3075 int spectrum_resp_status;
3076 int duration = le16_to_cpu(params->duration);
3077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003078 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003079 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003080 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003081 le64_to_cpu(params->start_time) - priv->last_tsf,
3082 le16_to_cpu(priv->rxon_timing.beacon_interval));
3083
3084 memset(&spectrum, 0, sizeof(spectrum));
3085
3086 spectrum.channel_count = cpu_to_le16(1);
3087 spectrum.flags =
3088 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3089 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3090 cmd.len = sizeof(spectrum);
3091 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3092
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003093 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003094 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003095 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003096 add_time,
3097 le16_to_cpu(priv->rxon_timing.beacon_interval));
3098 else
3099 spectrum.start_time = 0;
3100
3101 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3102 spectrum.channels[0].channel = params->channel;
3103 spectrum.channels[0].type = type;
3104 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3105 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3106 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3107
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003108 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003109 if (rc)
3110 return rc;
3111
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003112 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003113 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3114 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3115 rc = -EIO;
3116 }
3117
3118 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3119 switch (spectrum_resp_status) {
3120 case 0: /* Command will be handled */
3121 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003122 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3123 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003124 priv->measurement_status &= ~MEASUREMENT_READY;
3125 }
3126 priv->measurement_status |= MEASUREMENT_ACTIVE;
3127 rc = 0;
3128 break;
3129
3130 case 1: /* Command will not be handled */
3131 rc = -EAGAIN;
3132 break;
3133 }
3134
3135 dev_kfree_skb_any(cmd.meta.u.skb);
3136
3137 return rc;
3138}
3139#endif
3140
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003141static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3142 struct iwl3945_tx_info *tx_sta)
Zhu Yib481de92007-09-25 17:54:57 -07003143{
3144
3145 tx_sta->status.ack_signal = 0;
3146 tx_sta->status.excessive_retries = 0;
3147 tx_sta->status.queue_length = 0;
3148 tx_sta->status.queue_number = 0;
3149
3150 if (in_interrupt())
3151 ieee80211_tx_status_irqsafe(priv->hw,
3152 tx_sta->skb[0], &(tx_sta->status));
3153 else
3154 ieee80211_tx_status(priv->hw,
3155 tx_sta->skb[0], &(tx_sta->status));
3156
3157 tx_sta->skb[0] = NULL;
3158}
3159
3160/**
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003161 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
Zhu Yib481de92007-09-25 17:54:57 -07003162 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003163 * When FW advances 'R' index, all entries between old and new 'R' index
3164 * need to be reclaimed. As result, some free space forms. If there is
3165 * enough free space (> low mark), wake the stack that feeds us.
Zhu Yib481de92007-09-25 17:54:57 -07003166 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003167static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
Zhu Yib481de92007-09-25 17:54:57 -07003168{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003169 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3170 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -07003171 int nfreed = 0;
3172
Tomas Winklerc54b6792008-03-06 17:36:53 -08003173 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
Zhu Yib481de92007-09-25 17:54:57 -07003174 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3175 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003176 index, q->n_bd, q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003177 return 0;
3178 }
3179
Tomas Winklerc54b6792008-03-06 17:36:53 -08003180 for (index = iwl_queue_inc_wrap(index, q->n_bd);
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003181 q->read_ptr != index;
Tomas Winklerc54b6792008-03-06 17:36:53 -08003182 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Zhu Yib481de92007-09-25 17:54:57 -07003183 if (txq_id != IWL_CMD_QUEUE_NUM) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003184 iwl3945_txstatus_to_ieee(priv,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003185 &(txq->txb[txq->q.read_ptr]));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003186 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07003187 } else if (nfreed > 1) {
3188 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003189 q->write_ptr, q->read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003190 queue_work(priv->workqueue, &priv->restart);
3191 }
3192 nfreed++;
3193 }
3194
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003195 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
Zhu Yib481de92007-09-25 17:54:57 -07003196 (txq_id != IWL_CMD_QUEUE_NUM) &&
3197 priv->mac80211_registered)
3198 ieee80211_wake_queue(priv->hw, txq_id);
3199
3200
3201 return nfreed;
3202}
3203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003204static int iwl3945_is_tx_success(u32 status)
Zhu Yib481de92007-09-25 17:54:57 -07003205{
3206 return (status & 0xFF) == 0x1;
3207}
3208
3209/******************************************************************************
3210 *
3211 * Generic RX handler implementations
3212 *
3213 ******************************************************************************/
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003214/**
3215 * iwl3945_rx_reply_tx - Handle Tx response
3216 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003217static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3218 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003219{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003220 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003221 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3222 int txq_id = SEQ_TO_QUEUE(sequence);
3223 int index = SEQ_TO_INDEX(sequence);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003224 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
Zhu Yib481de92007-09-25 17:54:57 -07003225 struct ieee80211_tx_status *tx_status;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003226 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Zhu Yib481de92007-09-25 17:54:57 -07003227 u32 status = le32_to_cpu(tx_resp->status);
3228
Tomas Winklerc54b6792008-03-06 17:36:53 -08003229 if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
Zhu Yib481de92007-09-25 17:54:57 -07003230 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3231 "is out of range [0-%d] %d %d\n", txq_id,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003232 index, txq->q.n_bd, txq->q.write_ptr,
3233 txq->q.read_ptr);
Zhu Yib481de92007-09-25 17:54:57 -07003234 return;
3235 }
3236
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003237 tx_status = &(txq->txb[txq->q.read_ptr].status);
Zhu Yib481de92007-09-25 17:54:57 -07003238
3239 tx_status->retry_count = tx_resp->failure_frame;
3240 tx_status->queue_number = status;
3241 tx_status->queue_length = tx_resp->bt_kill_count;
3242 tx_status->queue_length |= tx_resp->failure_rts;
3243
3244 tx_status->flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003245 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
Zhu Yib481de92007-09-25 17:54:57 -07003246
Zhu Yib481de92007-09-25 17:54:57 -07003247 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003248 txq_id, iwl3945_get_tx_fail_reason(status), status,
Zhu Yib481de92007-09-25 17:54:57 -07003249 tx_resp->rate, tx_resp->failure_frame);
3250
3251 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3252 if (index != -1)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003253 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003254
3255 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3256 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3257}
3258
3259
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003260static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3261 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003262{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003263 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3264 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003265 struct delayed_work *pwork;
3266
3267 palive = &pkt->u.alive_frame;
3268
3269 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3270 "0x%01X 0x%01X\n",
3271 palive->is_valid, palive->ver_type,
3272 palive->ver_subtype);
3273
3274 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3275 IWL_DEBUG_INFO("Initialization Alive received.\n");
3276 memcpy(&priv->card_alive_init,
3277 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003278 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003279 pwork = &priv->init_alive_start;
3280 } else {
3281 IWL_DEBUG_INFO("Runtime Alive received.\n");
3282 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003283 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003284 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003285 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003286 }
3287
3288 /* We delay the ALIVE response by 5ms to
3289 * give the HW RF Kill time to activate... */
3290 if (palive->is_valid == UCODE_VALID_OK)
3291 queue_delayed_work(priv->workqueue, pwork,
3292 msecs_to_jiffies(5));
3293 else
3294 IWL_WARNING("uCode did not respond OK.\n");
3295}
3296
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003297static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3298 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003299{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003300 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003301
3302 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3303 return;
3304}
3305
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003306static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3307 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003308{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003309 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003310
3311 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3312 "seq 0x%04X ser 0x%08X\n",
3313 le32_to_cpu(pkt->u.err_resp.error_type),
3314 get_cmd_string(pkt->u.err_resp.cmd_id),
3315 pkt->u.err_resp.cmd_id,
3316 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3317 le32_to_cpu(pkt->u.err_resp.error_info));
3318}
3319
3320#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003322static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003323{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003324 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3325 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3326 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003327 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3328 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3329 rxon->channel = csa->channel;
3330 priv->staging_rxon.channel = csa->channel;
3331}
3332
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003333static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3334 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003335{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003336#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003337 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3338 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003339
3340 if (!report->state) {
3341 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3342 "Spectrum Measure Notification: Start\n");
3343 return;
3344 }
3345
3346 memcpy(&priv->measure_report, report, sizeof(*report));
3347 priv->measurement_status |= MEASUREMENT_READY;
3348#endif
3349}
3350
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003351static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3352 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003353{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003354#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003355 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3356 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003357 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3358 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3359#endif
3360}
3361
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003362static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3363 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003364{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003365 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003366 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3367 "notification for %s:\n",
3368 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003369 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003370}
3371
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003372static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003373{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003374 struct iwl3945_priv *priv =
3375 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003376 struct sk_buff *beacon;
3377
3378 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berg32bfd352007-12-19 01:31:26 +01003379 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07003380
3381 if (!beacon) {
3382 IWL_ERROR("update beacon failed\n");
3383 return;
3384 }
3385
3386 mutex_lock(&priv->mutex);
3387 /* new beacon skb is allocated every time; dispose previous.*/
3388 if (priv->ibss_beacon)
3389 dev_kfree_skb(priv->ibss_beacon);
3390
3391 priv->ibss_beacon = beacon;
3392 mutex_unlock(&priv->mutex);
3393
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003394 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003395}
3396
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003397static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3398 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003399{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003400#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003401 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3402 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003403 u8 rate = beacon->beacon_notify_hdr.rate;
3404
3405 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3406 "tsf %d %d rate %d\n",
3407 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3408 beacon->beacon_notify_hdr.failure_frame,
3409 le32_to_cpu(beacon->ibss_mgr_status),
3410 le32_to_cpu(beacon->high_tsf),
3411 le32_to_cpu(beacon->low_tsf), rate);
3412#endif
3413
3414 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3415 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3416 queue_work(priv->workqueue, &priv->beacon_update);
3417}
3418
3419/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003420static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3421 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003422{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003423#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003424 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3425 struct iwl3945_scanreq_notification *notif =
3426 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003427
3428 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3429#endif
3430}
3431
3432/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003433static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3434 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003435{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003436 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3437 struct iwl3945_scanstart_notification *notif =
3438 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003439 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3440 IWL_DEBUG_SCAN("Scan start: "
3441 "%d [802.11%s] "
3442 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3443 notif->channel,
3444 notif->band ? "bg" : "a",
3445 notif->tsf_high,
3446 notif->tsf_low, notif->status, notif->beacon_timer);
3447}
3448
3449/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003450static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3451 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003452{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003453 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3454 struct iwl3945_scanresults_notification *notif =
3455 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003456
3457 IWL_DEBUG_SCAN("Scan ch.res: "
3458 "%d [802.11%s] "
3459 "(TSF: 0x%08X:%08X) - %d "
3460 "elapsed=%lu usec (%dms since last)\n",
3461 notif->channel,
3462 notif->band ? "bg" : "a",
3463 le32_to_cpu(notif->tsf_high),
3464 le32_to_cpu(notif->tsf_low),
3465 le32_to_cpu(notif->statistics[0]),
3466 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3467 jiffies_to_msecs(elapsed_jiffies
3468 (priv->last_scan_jiffies, jiffies)));
3469
3470 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003471 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003472}
3473
3474/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003475static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3476 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003477{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003478 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3479 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003480
3481 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3482 scan_notif->scanned_channels,
3483 scan_notif->tsf_low,
3484 scan_notif->tsf_high, scan_notif->status);
3485
3486 /* The HW is no longer scanning */
3487 clear_bit(STATUS_SCAN_HW, &priv->status);
3488
3489 /* The scan completion notification came in, so kill that timer... */
3490 cancel_delayed_work(&priv->scan_check);
3491
3492 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3493 (priv->scan_bands == 2) ? "2.4" : "5.2",
3494 jiffies_to_msecs(elapsed_jiffies
3495 (priv->scan_pass_start, jiffies)));
3496
3497 /* Remove this scanned band from the list
3498 * of pending bands to scan */
3499 priv->scan_bands--;
3500
3501 /* If a request to abort was given, or the scan did not succeed
3502 * then we reset the scan state machine and terminate,
3503 * re-queuing another scan if one has been requested */
3504 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3505 IWL_DEBUG_INFO("Aborted scan completed.\n");
3506 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3507 } else {
3508 /* If there are more bands on this scan pass reschedule */
3509 if (priv->scan_bands > 0)
3510 goto reschedule;
3511 }
3512
3513 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003514 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003515 IWL_DEBUG_INFO("Setting scan to off\n");
3516
3517 clear_bit(STATUS_SCANNING, &priv->status);
3518
3519 IWL_DEBUG_INFO("Scan took %dms\n",
3520 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3521
3522 queue_work(priv->workqueue, &priv->scan_completed);
3523
3524 return;
3525
3526reschedule:
3527 priv->scan_pass_start = jiffies;
3528 queue_work(priv->workqueue, &priv->request_scan);
3529}
3530
3531/* Handle notification from uCode that card's power state is changing
3532 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003533static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3534 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003535{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003536 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003537 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3538 unsigned long status = priv->status;
3539
3540 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3541 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3542 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3543
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003544 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003545 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3546
3547 if (flags & HW_CARD_DISABLED)
3548 set_bit(STATUS_RF_KILL_HW, &priv->status);
3549 else
3550 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3551
3552
3553 if (flags & SW_CARD_DISABLED)
3554 set_bit(STATUS_RF_KILL_SW, &priv->status);
3555 else
3556 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3557
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003558 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003559
3560 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3561 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3562 (test_bit(STATUS_RF_KILL_SW, &status) !=
3563 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3564 queue_work(priv->workqueue, &priv->rf_kill);
3565 else
3566 wake_up_interruptible(&priv->wait_command_queue);
3567}
3568
3569/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003570 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003571 *
3572 * Setup the RX handlers for each of the reply types sent from the uCode
3573 * to the host.
3574 *
3575 * This function chains into the hardware specific files for them to setup
3576 * any hardware specific handlers as well.
3577 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003578static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003579{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003580 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3581 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3582 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3583 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003584 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003585 iwl3945_rx_spectrum_measure_notif;
3586 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003587 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003588 iwl3945_rx_pm_debug_statistics_notif;
3589 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003590
Ben Cahill9fbab512007-11-29 11:09:47 +08003591 /*
3592 * The same handler is used for both the REPLY to a discrete
3593 * statistics request from the host as well as for the periodic
3594 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003595 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003596 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3597 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003599 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3600 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003601 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003602 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003603 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003604 iwl3945_rx_scan_complete_notif;
3605 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3606 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07003607
Ben Cahill9fbab512007-11-29 11:09:47 +08003608 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003609 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003610}
3611
3612/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003613 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003614 * @rxb: Rx buffer to reclaim
3615 *
3616 * If an Rx buffer has an async callback associated with it the callback
3617 * will be executed. The attached skb (if present) will only be freed
3618 * if the callback returns 1
3619 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003620static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3621 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003622{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003623 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003624 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3625 int txq_id = SEQ_TO_QUEUE(sequence);
3626 int index = SEQ_TO_INDEX(sequence);
3627 int huge = sequence & SEQ_HUGE_FRAME;
3628 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003629 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003630
3631 /* If a Tx command is being handled and it isn't in the actual
3632 * command queue then there a command routing bug has been introduced
3633 * in the queue management code. */
3634 if (txq_id != IWL_CMD_QUEUE_NUM)
3635 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3636 txq_id, pkt->hdr.cmd);
3637 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3638
3639 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3640 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3641
3642 /* Input error checking is done when commands are added to queue. */
3643 if (cmd->meta.flags & CMD_WANT_SKB) {
3644 cmd->meta.source->u.skb = rxb->skb;
3645 rxb->skb = NULL;
3646 } else if (cmd->meta.u.callback &&
3647 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3648 rxb->skb = NULL;
3649
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003650 iwl3945_tx_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003651
3652 if (!(cmd->meta.flags & CMD_ASYNC)) {
3653 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3654 wake_up_interruptible(&priv->wait_command_queue);
3655 }
3656}
3657
3658/************************** RX-FUNCTIONS ****************************/
3659/*
3660 * Rx theory of operation
3661 *
3662 * The host allocates 32 DMA target addresses and passes the host address
3663 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3664 * 0 to 31
3665 *
3666 * Rx Queue Indexes
3667 * The host/firmware share two index registers for managing the Rx buffers.
3668 *
3669 * The READ index maps to the first position that the firmware may be writing
3670 * to -- the driver can read up to (but not including) this position and get
3671 * good data.
3672 * The READ index is managed by the firmware once the card is enabled.
3673 *
3674 * The WRITE index maps to the last position the driver has read from -- the
3675 * position preceding WRITE is the last slot the firmware can place a packet.
3676 *
3677 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3678 * WRITE = READ.
3679 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003680 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003681 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3682 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003683 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003684 * and fire the RX interrupt. The driver can then query the READ index and
3685 * process as many packets as possible, moving the WRITE index forward as it
3686 * resets the Rx queue buffers with new memory.
3687 *
3688 * The management in the driver is as follows:
3689 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3690 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003691 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003692 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003693 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3694 * 'processed' and 'read' driver indexes as well)
3695 * + A received packet is processed and handed to the kernel network stack,
3696 * detached from the iwl->rxq. The driver 'processed' index is updated.
3697 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3698 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3699 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3700 * were enough free buffers and RX_STALLED is set it is cleared.
3701 *
3702 *
3703 * Driver sequence:
3704 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003705 * iwl3945_rx_queue_alloc() Allocates rx_free
3706 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003707 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003708 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003709 * queue, updates firmware pointers, and updates
3710 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003711 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003712 *
3713 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003714 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003715 * READ INDEX, detaching the SKB from the pool.
3716 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003717 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003718 * slots.
3719 * ...
3720 *
3721 */
3722
3723/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003724 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003725 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003726static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003727{
3728 int s = q->read - q->write;
3729 if (s <= 0)
3730 s += RX_QUEUE_SIZE;
3731 /* keep some buffer to not confuse full and empty queue */
3732 s -= 2;
3733 if (s < 0)
3734 s = 0;
3735 return s;
3736}
3737
3738/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003739 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003740 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003741int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003742{
3743 u32 reg = 0;
3744 int rc = 0;
3745 unsigned long flags;
3746
3747 spin_lock_irqsave(&q->lock, flags);
3748
3749 if (q->need_update == 0)
3750 goto exit_unlock;
3751
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003752 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003753 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003754 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003755
3756 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003757 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003758 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3759 goto exit_unlock;
3760 }
3761
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003762 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003763 if (rc)
3764 goto exit_unlock;
3765
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003766 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003767 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003768 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003769 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003770
3771 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003772 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003773 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003774 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003775
3776
3777 q->need_update = 0;
3778
3779 exit_unlock:
3780 spin_unlock_irqrestore(&q->lock, flags);
3781 return rc;
3782}
3783
3784/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003785 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003786 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003787static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003788 dma_addr_t dma_addr)
3789{
3790 return cpu_to_le32((u32)dma_addr);
3791}
3792
3793/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003794 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003795 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003796 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003797 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003798 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003799 *
3800 * This moves the 'write' index forward to catch up with 'processed', and
3801 * also updates the memory address in the firmware to reference the new
3802 * target buffer.
3803 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003804static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003805{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003806 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003807 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003808 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003809 unsigned long flags;
3810 int write, rc;
3811
3812 spin_lock_irqsave(&rxq->lock, flags);
3813 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003814 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003815 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003816 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003817 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003818 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003819
3820 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003821 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003822 rxq->queue[rxq->write] = rxb;
3823 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3824 rxq->free_count--;
3825 }
3826 spin_unlock_irqrestore(&rxq->lock, flags);
3827 /* If the pre-allocated buffer pool is dropping low, schedule to
3828 * refill it */
3829 if (rxq->free_count <= RX_LOW_WATERMARK)
3830 queue_work(priv->workqueue, &priv->rx_replenish);
3831
3832
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003833 /* If we've added more space for the firmware to place data, tell it.
3834 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07003835 if ((write != (rxq->write & ~0x7))
3836 || (abs(rxq->write - rxq->read) > 7)) {
3837 spin_lock_irqsave(&rxq->lock, flags);
3838 rxq->need_update = 1;
3839 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003840 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07003841 if (rc)
3842 return rc;
3843 }
3844
3845 return 0;
3846}
3847
3848/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003849 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07003850 *
3851 * When moving to rx_free an SKB is allocated for the slot.
3852 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003853 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08003854 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07003855 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003856static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003857{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003858 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003859 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003860 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003861 unsigned long flags;
3862 spin_lock_irqsave(&rxq->lock, flags);
3863 while (!list_empty(&rxq->rx_used)) {
3864 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003865 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003866
3867 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07003868 rxb->skb =
3869 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3870 if (!rxb->skb) {
3871 if (net_ratelimit())
3872 printk(KERN_CRIT DRV_NAME
3873 ": Can not allocate SKB buffers\n");
3874 /* We don't reschedule replenish work here -- we will
3875 * call the restock method and if it still needs
3876 * more buffers it will schedule replenish */
3877 break;
3878 }
Zhu Yi12342c42007-12-20 11:27:32 +08003879
3880 /* If radiotap head is required, reserve some headroom here.
3881 * The physical head count is a variable rx_stats->phy_count.
3882 * We reserve 4 bytes here. Plus these extra bytes, the
3883 * headroom of the physical head should be enough for the
3884 * radiotap head that iwl3945 supported. See iwl3945_rt.
3885 */
3886 skb_reserve(rxb->skb, 4);
3887
Zhu Yib481de92007-09-25 17:54:57 -07003888 priv->alloc_rxb_skb++;
3889 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003890
3891 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07003892 rxb->dma_addr =
3893 pci_map_single(priv->pci_dev, rxb->skb->data,
3894 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3895 list_add_tail(&rxb->list, &rxq->rx_free);
3896 rxq->free_count++;
3897 }
3898 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003899}
3900
3901/*
3902 * this should be called while priv->lock is locked
3903 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02003904static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003905{
3906 struct iwl3945_priv *priv = data;
3907
3908 iwl3945_rx_allocate(priv);
3909 iwl3945_rx_queue_restock(priv);
3910}
3911
3912
3913void iwl3945_rx_replenish(void *data)
3914{
3915 struct iwl3945_priv *priv = data;
3916 unsigned long flags;
3917
3918 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003919
3920 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003921 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003922 spin_unlock_irqrestore(&priv->lock, flags);
3923}
3924
3925/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08003926 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07003927 * This free routine walks the list of POOL entries and if SKB is set to
3928 * non NULL it is unmapped and freed
3929 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003930static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003931{
3932 int i;
3933 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3934 if (rxq->pool[i].skb != NULL) {
3935 pci_unmap_single(priv->pci_dev,
3936 rxq->pool[i].dma_addr,
3937 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3938 dev_kfree_skb(rxq->pool[i].skb);
3939 }
3940 }
3941
3942 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3943 rxq->dma_addr);
3944 rxq->bd = NULL;
3945}
3946
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003947int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003948{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003949 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003950 struct pci_dev *dev = priv->pci_dev;
3951 int i;
3952
3953 spin_lock_init(&rxq->lock);
3954 INIT_LIST_HEAD(&rxq->rx_free);
3955 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003956
3957 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07003958 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3959 if (!rxq->bd)
3960 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003961
Zhu Yib481de92007-09-25 17:54:57 -07003962 /* Fill the rx_used queue with _all_ of the Rx buffers */
3963 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3964 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003965
Zhu Yib481de92007-09-25 17:54:57 -07003966 /* Set us so that we have processed and used all buffers, but have
3967 * not restocked the Rx queue with fresh buffers */
3968 rxq->read = rxq->write = 0;
3969 rxq->free_count = 0;
3970 rxq->need_update = 0;
3971 return 0;
3972}
3973
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003974void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003975{
3976 unsigned long flags;
3977 int i;
3978 spin_lock_irqsave(&rxq->lock, flags);
3979 INIT_LIST_HEAD(&rxq->rx_free);
3980 INIT_LIST_HEAD(&rxq->rx_used);
3981 /* Fill the rx_used queue with _all_ of the Rx buffers */
3982 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3983 /* In the reset function, these buffers may have been allocated
3984 * to an SKB, so we need to unmap and free potential storage */
3985 if (rxq->pool[i].skb != NULL) {
3986 pci_unmap_single(priv->pci_dev,
3987 rxq->pool[i].dma_addr,
3988 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3989 priv->alloc_rxb_skb--;
3990 dev_kfree_skb(rxq->pool[i].skb);
3991 rxq->pool[i].skb = NULL;
3992 }
3993 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3994 }
3995
3996 /* Set us so that we have processed and used all buffers, but have
3997 * not restocked the Rx queue with fresh buffers */
3998 rxq->read = rxq->write = 0;
3999 rxq->free_count = 0;
4000 spin_unlock_irqrestore(&rxq->lock, flags);
4001}
4002
4003/* Convert linear signal-to-noise ratio into dB */
4004static u8 ratio2dB[100] = {
4005/* 0 1 2 3 4 5 6 7 8 9 */
4006 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4007 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4008 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4009 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4010 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4011 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4012 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4013 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4014 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4015 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4016};
4017
4018/* Calculates a relative dB value from a ratio of linear
4019 * (i.e. not dB) signal levels.
4020 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004021int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07004022{
Adrian Bunk221c80c2008-02-02 23:19:01 +02004023 /* 1000:1 or higher just report as 60 dB */
4024 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07004025 return 60;
4026
Adrian Bunk221c80c2008-02-02 23:19:01 +02004027 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07004028 * add 20 dB to make up for divide by 10 */
Adrian Bunk221c80c2008-02-02 23:19:01 +02004029 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07004030 return (20 + (int)ratio2dB[sig_ratio/10]);
4031
4032 /* We shouldn't see this */
4033 if (sig_ratio < 1)
4034 return 0;
4035
4036 /* Use table for ratios 1:1 - 99:1 */
4037 return (int)ratio2dB[sig_ratio];
4038}
4039
4040#define PERFECT_RSSI (-20) /* dBm */
4041#define WORST_RSSI (-95) /* dBm */
4042#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4043
4044/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4045 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4046 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004047int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07004048{
4049 int sig_qual;
4050 int degradation = PERFECT_RSSI - rssi_dbm;
4051
4052 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4053 * as indicator; formula is (signal dbm - noise dbm).
4054 * SNR at or above 40 is a great signal (100%).
4055 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4056 * Weakest usable signal is usually 10 - 15 dB SNR. */
4057 if (noise_dbm) {
4058 if (rssi_dbm - noise_dbm >= 40)
4059 return 100;
4060 else if (rssi_dbm < noise_dbm)
4061 return 0;
4062 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4063
4064 /* Else use just the signal level.
4065 * This formula is a least squares fit of data points collected and
4066 * compared with a reference system that had a percentage (%) display
4067 * for signal quality. */
4068 } else
4069 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4070 (15 * RSSI_RANGE + 62 * degradation)) /
4071 (RSSI_RANGE * RSSI_RANGE);
4072
4073 if (sig_qual > 100)
4074 sig_qual = 100;
4075 else if (sig_qual < 1)
4076 sig_qual = 0;
4077
4078 return sig_qual;
4079}
4080
4081/**
Ben Cahill9fbab512007-11-29 11:09:47 +08004082 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07004083 *
4084 * Uses the priv->rx_handlers callback function array to invoke
4085 * the appropriate handlers, including command responses,
4086 * frame-received notifications, and other notifications.
4087 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004088static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004089{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004090 struct iwl3945_rx_mem_buffer *rxb;
4091 struct iwl3945_rx_packet *pkt;
4092 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07004093 u32 r, i;
4094 int reclaim;
4095 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004096 u8 fill_rx = 0;
Mohamed Abbasd68ab682008-02-07 13:16:33 -08004097 u32 count = 8;
Zhu Yib481de92007-09-25 17:54:57 -07004098
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004099 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4100 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004101 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004102 i = rxq->read;
4103
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004104 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4105 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07004106 /* Rx interrupt, but nothing sent from uCode */
4107 if (i == r)
4108 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4109
4110 while (i != r) {
4111 rxb = rxq->queue[i];
4112
Ben Cahill9fbab512007-11-29 11:09:47 +08004113 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07004114 * then a bug has been introduced in the queue refilling
4115 * routines -- catch it here */
4116 BUG_ON(rxb == NULL);
4117
4118 rxq->queue[i] = NULL;
4119
4120 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4121 IWL_RX_BUF_SIZE,
4122 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004123 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004124
4125 /* Reclaim a command buffer only if this packet is a response
4126 * to a (driver-originated) command.
4127 * If the packet (e.g. Rx frame) originated from uCode,
4128 * there is no command buffer to reclaim.
4129 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4130 * but apparently a few don't get set; catch them here. */
4131 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4132 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4133 (pkt->hdr.cmd != REPLY_TX);
4134
4135 /* Based on type of command response or notification,
4136 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004137 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004138 if (priv->rx_handlers[pkt->hdr.cmd]) {
4139 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4140 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4141 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4142 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4143 } else {
4144 /* No handling needed */
4145 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4146 "r %d i %d No handler needed for %s, 0x%02x\n",
4147 r, i, get_cmd_string(pkt->hdr.cmd),
4148 pkt->hdr.cmd);
4149 }
4150
4151 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004152 /* Invoke any callbacks, transfer the skb to caller, and
4153 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004154 * as we reclaim the driver command queue */
4155 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004156 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004157 else
4158 IWL_WARNING("Claim null rxb?\n");
4159 }
4160
4161 /* For now we just don't re-use anything. We can tweak this
4162 * later to try and re-use notification packets and SKBs that
4163 * fail to Rx correctly */
4164 if (rxb->skb != NULL) {
4165 priv->alloc_rxb_skb--;
4166 dev_kfree_skb_any(rxb->skb);
4167 rxb->skb = NULL;
4168 }
4169
4170 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4171 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4172 spin_lock_irqsave(&rxq->lock, flags);
4173 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4174 spin_unlock_irqrestore(&rxq->lock, flags);
4175 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004176 /* If there are a lot of unused frames,
4177 * restock the Rx queue so ucode won't assert. */
4178 if (fill_rx) {
4179 count++;
4180 if (count >= 8) {
4181 priv->rxq.read = i;
4182 __iwl3945_rx_replenish(priv);
4183 count = 0;
4184 }
4185 }
Zhu Yib481de92007-09-25 17:54:57 -07004186 }
4187
4188 /* Backtrack one entry */
4189 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004190 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004191}
4192
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004193/**
4194 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4195 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004196static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4197 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004198{
4199 u32 reg = 0;
4200 int rc = 0;
4201 int txq_id = txq->q.id;
4202
4203 if (txq->need_update == 0)
4204 return rc;
4205
4206 /* if we're trying to save power */
4207 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4208 /* wake up nic if it's powered down ...
4209 * uCode will wake up, and interrupt us again, so next
4210 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004211 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004212
4213 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4214 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004215 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004216 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4217 return rc;
4218 }
4219
4220 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004221 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004222 if (rc)
4223 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004224 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004225 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004226 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004227
4228 /* else not in power-save mode, uCode will never sleep when we're
4229 * trying to tx (during RFKILL, we're not trying to tx). */
4230 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004231 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004232 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004233
4234 txq->need_update = 0;
4235
4236 return rc;
4237}
4238
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004239#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004240static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004241{
Joe Perches0795af52007-10-03 17:59:30 -07004242 DECLARE_MAC_BUF(mac);
4243
Zhu Yib481de92007-09-25 17:54:57 -07004244 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004245 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004246 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4247 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4248 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4249 le32_to_cpu(rxon->filter_flags));
4250 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4251 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4252 rxon->ofdm_basic_rates);
4253 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004254 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4255 print_mac(mac, rxon->node_addr));
4256 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4257 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004258 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4259}
4260#endif
4261
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004262static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004263{
4264 IWL_DEBUG_ISR("Enabling interrupts\n");
4265 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004266 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004267}
4268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004269static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004270{
4271 clear_bit(STATUS_INT_ENABLED, &priv->status);
4272
4273 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004274 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004275
4276 /* acknowledge/clear/reset any interrupts still pending
4277 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004278 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4279 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004280 IWL_DEBUG_ISR("Disabled interrupts\n");
4281}
4282
4283static const char *desc_lookup(int i)
4284{
4285 switch (i) {
4286 case 1:
4287 return "FAIL";
4288 case 2:
4289 return "BAD_PARAM";
4290 case 3:
4291 return "BAD_CHECKSUM";
4292 case 4:
4293 return "NMI_INTERRUPT";
4294 case 5:
4295 return "SYSASSERT";
4296 case 6:
4297 return "FATAL_ERROR";
4298 }
4299
4300 return "UNKNOWN";
4301}
4302
4303#define ERROR_START_OFFSET (1 * sizeof(u32))
4304#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4305
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004306static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004307{
4308 u32 i;
4309 u32 desc, time, count, base, data1;
4310 u32 blink1, blink2, ilink1, ilink2;
4311 int rc;
4312
4313 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4314
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004315 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004316 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4317 return;
4318 }
4319
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004320 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004321 if (rc) {
4322 IWL_WARNING("Can not read from adapter at this time.\n");
4323 return;
4324 }
4325
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004326 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004327
4328 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4329 IWL_ERROR("Start IWL Error Log Dump:\n");
Tomas Winkler2acae162008-03-02 01:25:59 +02004330 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
Zhu Yib481de92007-09-25 17:54:57 -07004331 }
4332
4333 IWL_ERROR("Desc Time asrtPC blink2 "
4334 "ilink1 nmiPC Line\n");
4335 for (i = ERROR_START_OFFSET;
4336 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4337 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004338 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004339 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004340 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004341 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004342 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004343 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004344 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004345 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004346 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004347 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004348 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004349 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004350 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004351
4352 IWL_ERROR
4353 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4354 desc_lookup(desc), desc, time, blink1, blink2,
4355 ilink1, ilink2, data1);
4356 }
4357
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004358 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004359
4360}
4361
Ben Cahillf58177b2007-11-29 11:09:43 +08004362#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004363
4364/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004365 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004366 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004367 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004368 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004369static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004370 u32 num_events, u32 mode)
4371{
4372 u32 i;
4373 u32 base; /* SRAM byte address of event log header */
4374 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4375 u32 ptr; /* SRAM byte address of log data */
4376 u32 ev, time, data; /* event log data */
4377
4378 if (num_events == 0)
4379 return;
4380
4381 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4382
4383 if (mode == 0)
4384 event_size = 2 * sizeof(u32);
4385 else
4386 event_size = 3 * sizeof(u32);
4387
4388 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4389
4390 /* "time" is actually "data" for mode 0 (no timestamp).
4391 * place event id # at far right for easier visual parsing. */
4392 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004393 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004394 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004395 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004396 ptr += sizeof(u32);
4397 if (mode == 0)
4398 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4399 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004400 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004401 ptr += sizeof(u32);
4402 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4403 }
4404 }
4405}
4406
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004407static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004408{
4409 int rc;
4410 u32 base; /* SRAM byte address of event log header */
4411 u32 capacity; /* event log capacity in # entries */
4412 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4413 u32 num_wraps; /* # times uCode wrapped to top of log */
4414 u32 next_entry; /* index of next entry to be written by uCode */
4415 u32 size; /* # entries that we'll print */
4416
4417 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004418 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004419 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4420 return;
4421 }
4422
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004423 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004424 if (rc) {
4425 IWL_WARNING("Can not read from adapter at this time.\n");
4426 return;
4427 }
4428
4429 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004430 capacity = iwl3945_read_targ_mem(priv, base);
4431 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4432 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4433 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004434
4435 size = num_wraps ? capacity : next_entry;
4436
4437 /* bail out if nothing in log */
4438 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004439 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004440 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004441 return;
4442 }
4443
Zhu Yi583fab32007-09-27 11:27:30 +08004444 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004445 size, num_wraps);
4446
4447 /* if uCode has wrapped back to top of log, start at the oldest entry,
4448 * i.e the next one that uCode would fill. */
4449 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004450 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004451 capacity - next_entry, mode);
4452
4453 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004454 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004455
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004456 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004457}
4458
4459/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004460 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004461 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004462static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004463{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004464 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004465 set_bit(STATUS_FW_ERROR, &priv->status);
4466
4467 /* Cancel currently queued command. */
4468 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4469
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004470#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004471 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4472 iwl3945_dump_nic_error_log(priv);
4473 iwl3945_dump_nic_event_log(priv);
4474 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004475 }
4476#endif
4477
4478 wake_up_interruptible(&priv->wait_command_queue);
4479
4480 /* Keep the restart process from trying to send host
4481 * commands by clearing the INIT status bit */
4482 clear_bit(STATUS_READY, &priv->status);
4483
4484 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4485 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4486 "Restarting adapter due to uCode error.\n");
4487
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004488 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004489 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4490 sizeof(priv->recovery_rxon));
4491 priv->error_recovering = 1;
4492 }
4493 queue_work(priv->workqueue, &priv->restart);
4494 }
4495}
4496
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004497static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004498{
4499 unsigned long flags;
4500
4501 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4502 sizeof(priv->staging_rxon));
4503 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004504 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004505
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004506 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004507
4508 spin_lock_irqsave(&priv->lock, flags);
4509 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4510 priv->error_recovering = 0;
4511 spin_unlock_irqrestore(&priv->lock, flags);
4512}
4513
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004514static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004515{
4516 u32 inta, handled = 0;
4517 u32 inta_fh;
4518 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004519#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004520 u32 inta_mask;
4521#endif
4522
4523 spin_lock_irqsave(&priv->lock, flags);
4524
4525 /* Ack/clear/reset pending uCode interrupts.
4526 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4527 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004528 inta = iwl3945_read32(priv, CSR_INT);
4529 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004530
4531 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4532 * Any new interrupts that happen after this, either while we're
4533 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004534 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4535 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004536
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004537#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004538 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004539 /* just for debug */
4540 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004541 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4542 inta, inta_mask, inta_fh);
4543 }
4544#endif
4545
4546 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4547 * atomic, make sure that inta covers all the interrupts that
4548 * we've discovered, even if FH interrupt came in just after
4549 * reading CSR_INT. */
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004550 if (inta_fh & CSR39_FH_INT_RX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004551 inta |= CSR_INT_BIT_FH_RX;
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004552 if (inta_fh & CSR39_FH_INT_TX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004553 inta |= CSR_INT_BIT_FH_TX;
4554
4555 /* Now service all interrupt bits discovered above. */
4556 if (inta & CSR_INT_BIT_HW_ERR) {
4557 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4558
4559 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004560 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004561
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004562 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004563
4564 handled |= CSR_INT_BIT_HW_ERR;
4565
4566 spin_unlock_irqrestore(&priv->lock, flags);
4567
4568 return;
4569 }
4570
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004571#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004572 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004573 /* NIC fires this, but we don't use it, redundant with WAKEUP */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004574 if (inta & CSR_INT_BIT_SCD)
4575 IWL_DEBUG_ISR("Scheduler finished to transmit "
4576 "the frame/frames.\n");
Zhu Yib481de92007-09-25 17:54:57 -07004577
4578 /* Alive notification via Rx interrupt will do the real work */
4579 if (inta & CSR_INT_BIT_ALIVE)
4580 IWL_DEBUG_ISR("Alive interrupt\n");
4581 }
4582#endif
4583 /* Safely ignore these bits for debug checks below */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004584 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
Zhu Yib481de92007-09-25 17:54:57 -07004585
4586 /* HW RF KILL switch toggled (4965 only) */
4587 if (inta & CSR_INT_BIT_RF_KILL) {
4588 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004589 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004590 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4591 hw_rf_kill = 1;
4592
4593 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4594 "RF_KILL bit toggled to %s.\n",
4595 hw_rf_kill ? "disable radio":"enable radio");
4596
4597 /* Queue restart only if RF_KILL switch was set to "kill"
4598 * when we loaded driver, and is now set to "enable".
4599 * After we're Alive, RF_KILL gets handled by
Reinette Chatre32304552008-02-15 14:34:37 -08004600 * iwl3945_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004601 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4602 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004603 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004604 }
Zhu Yib481de92007-09-25 17:54:57 -07004605
4606 handled |= CSR_INT_BIT_RF_KILL;
4607 }
4608
4609 /* Chip got too hot and stopped itself (4965 only) */
4610 if (inta & CSR_INT_BIT_CT_KILL) {
4611 IWL_ERROR("Microcode CT kill error detected.\n");
4612 handled |= CSR_INT_BIT_CT_KILL;
4613 }
4614
4615 /* Error detected by uCode */
4616 if (inta & CSR_INT_BIT_SW_ERR) {
4617 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4618 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004619 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004620 handled |= CSR_INT_BIT_SW_ERR;
4621 }
4622
4623 /* uCode wakes up after power-down sleep */
4624 if (inta & CSR_INT_BIT_WAKEUP) {
4625 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004626 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4627 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4628 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4629 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4630 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4631 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4632 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004633
4634 handled |= CSR_INT_BIT_WAKEUP;
4635 }
4636
4637 /* All uCode command responses, including Tx command responses,
4638 * Rx "responses" (frame-received notification), and other
4639 * notifications from uCode come through here*/
4640 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004641 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004642 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4643 }
4644
4645 if (inta & CSR_INT_BIT_FH_TX) {
4646 IWL_DEBUG_ISR("Tx interrupt\n");
4647
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004648 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4649 if (!iwl3945_grab_nic_access(priv)) {
4650 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004651 FH_TCSR_CREDIT
4652 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004653 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004654 }
4655 handled |= CSR_INT_BIT_FH_TX;
4656 }
4657
4658 if (inta & ~handled)
4659 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4660
4661 if (inta & ~CSR_INI_SET_MASK) {
4662 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4663 inta & ~CSR_INI_SET_MASK);
4664 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4665 }
4666
4667 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004668 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004669
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004670#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004671 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4672 inta = iwl3945_read32(priv, CSR_INT);
4673 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4674 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004675 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4676 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4677 }
4678#endif
4679 spin_unlock_irqrestore(&priv->lock, flags);
4680}
4681
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004682static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004683{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004684 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004685 u32 inta, inta_mask;
4686 u32 inta_fh;
4687 if (!priv)
4688 return IRQ_NONE;
4689
4690 spin_lock(&priv->lock);
4691
4692 /* Disable (but don't clear!) interrupts here to avoid
4693 * back-to-back ISRs and sporadic interrupts from our NIC.
4694 * If we have something to service, the tasklet will re-enable ints.
4695 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004696 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4697 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004698
4699 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004700 inta = iwl3945_read32(priv, CSR_INT);
4701 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004702
4703 /* Ignore interrupt if there's nothing in NIC to service.
4704 * This may be due to IRQ shared with another device,
4705 * or due to sporadic interrupts thrown from our NIC. */
4706 if (!inta && !inta_fh) {
4707 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4708 goto none;
4709 }
4710
4711 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4712 /* Hardware disappeared */
4713 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004714 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004715 }
4716
4717 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4718 inta, inta_mask, inta_fh);
4719
Joonwoo Park25c03d82008-01-23 10:15:20 -08004720 inta &= ~CSR_INT_BIT_SCD;
4721
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004722 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004723 if (likely(inta || inta_fh))
4724 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004725unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004726 spin_unlock(&priv->lock);
4727
4728 return IRQ_HANDLED;
4729
4730 none:
4731 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004732 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004733 spin_unlock(&priv->lock);
4734 return IRQ_NONE;
4735}
4736
4737/************************** EEPROM BANDS ****************************
4738 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004739 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004740 * EEPROM contents to the specific channel number supported for each
4741 * band.
4742 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004743 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004744 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4745 * The specific geography and calibration information for that channel
4746 * is contained in the eeprom map itself.
4747 *
4748 * During init, we copy the eeprom information and channel map
4749 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4750 *
4751 * channel_map_24/52 provides the index in the channel_info array for a
4752 * given channel. We have to have two separate maps as there is channel
4753 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4754 * band_2
4755 *
4756 * A value of 0xff stored in the channel_map indicates that the channel
4757 * is not supported by the hardware at all.
4758 *
4759 * A value of 0xfe in the channel_map indicates that the channel is not
4760 * valid for Tx with the current hardware. This means that
4761 * while the system can tune and receive on a given channel, it may not
4762 * be able to associate or transmit any frames on that
4763 * channel. There is no corresponding channel information for that
4764 * entry.
4765 *
4766 *********************************************************************/
4767
4768/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004769static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004770 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4771};
4772
4773/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004774static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004775 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4776};
4777
Ben Cahill9fbab512007-11-29 11:09:47 +08004778static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004779 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4780};
4781
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004782static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004783 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4784};
4785
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004786static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004787 145, 149, 153, 157, 161, 165
4788};
4789
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004790static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004791 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004792 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004793 **eeprom_ch_info,
4794 const u8 **eeprom_ch_index)
4795{
4796 switch (band) {
4797 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004798 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004799 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004800 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004801 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004802 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004803 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004804 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004805 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004806 break;
4807 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004808 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004809 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004810 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004811 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004812 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004813 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004814 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004815 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004816 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004817 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004818 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004819 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004820 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07004821 break;
4822 default:
4823 BUG();
4824 return;
4825 }
4826}
4827
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004828/**
4829 * iwl3945_get_channel_info - Find driver's private channel info
4830 *
4831 * Based on band and channel number.
4832 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004833const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01004834 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07004835{
4836 int i;
4837
Johannes Berg8318d782008-01-24 19:38:38 +01004838 switch (band) {
4839 case IEEE80211_BAND_5GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004840 for (i = 14; i < priv->channel_count; i++) {
4841 if (priv->channel_info[i].channel == channel)
4842 return &priv->channel_info[i];
4843 }
4844 break;
4845
Johannes Berg8318d782008-01-24 19:38:38 +01004846 case IEEE80211_BAND_2GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004847 if (channel >= 1 && channel <= 14)
4848 return &priv->channel_info[channel - 1];
4849 break;
Johannes Berg8318d782008-01-24 19:38:38 +01004850 case IEEE80211_NUM_BANDS:
4851 WARN_ON(1);
Zhu Yib481de92007-09-25 17:54:57 -07004852 }
4853
4854 return NULL;
4855}
4856
4857#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4858 ? # x " " : "")
4859
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004860/**
4861 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4862 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004863static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004864{
4865 int eeprom_ch_count = 0;
4866 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004867 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07004868 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004869 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004870
4871 if (priv->channel_count) {
4872 IWL_DEBUG_INFO("Channel map already initialized.\n");
4873 return 0;
4874 }
4875
4876 if (priv->eeprom.version < 0x2f) {
4877 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4878 priv->eeprom.version);
4879 return -EINVAL;
4880 }
4881
4882 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4883
4884 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004885 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4886 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4887 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4888 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4889 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004890
4891 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4892
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004893 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07004894 priv->channel_count, GFP_KERNEL);
4895 if (!priv->channel_info) {
4896 IWL_ERROR("Could not allocate channel_info\n");
4897 priv->channel_count = 0;
4898 return -ENOMEM;
4899 }
4900
4901 ch_info = priv->channel_info;
4902
4903 /* Loop through the 5 EEPROM bands adding them in order to the
4904 * channel map we maintain (that contains additional information than
4905 * what just in the EEPROM) */
4906 for (band = 1; band <= 5; band++) {
4907
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004908 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07004909 &eeprom_ch_info, &eeprom_ch_index);
4910
4911 /* Loop through each band adding each of the channels */
4912 for (ch = 0; ch < eeprom_ch_count; ch++) {
4913 ch_info->channel = eeprom_ch_index[ch];
Johannes Berg8318d782008-01-24 19:38:38 +01004914 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4915 IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07004916
4917 /* permanently store EEPROM's channel regulatory flags
4918 * and max power in channel info database. */
4919 ch_info->eeprom = eeprom_ch_info[ch];
4920
4921 /* Copy the run-time flags so they are there even on
4922 * invalid channels */
4923 ch_info->flags = eeprom_ch_info[ch].flags;
4924
4925 if (!(is_channel_valid(ch_info))) {
4926 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4927 "No traffic\n",
4928 ch_info->channel,
4929 ch_info->flags,
4930 is_channel_a_band(ch_info) ?
4931 "5.2" : "2.4");
4932 ch_info++;
4933 continue;
4934 }
4935
4936 /* Initialize regulatory-based run-time data */
4937 ch_info->max_power_avg = ch_info->curr_txpow =
4938 eeprom_ch_info[ch].max_power_avg;
4939 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4940 ch_info->min_power = 0;
4941
Tomas Winkler8211ef72008-03-02 01:36:04 +02004942 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
Zhu Yib481de92007-09-25 17:54:57 -07004943 " %ddBm): Ad-Hoc %ssupported\n",
4944 ch_info->channel,
4945 is_channel_a_band(ch_info) ?
4946 "5.2" : "2.4",
Tomas Winkler8211ef72008-03-02 01:36:04 +02004947 CHECK_AND_PRINT(VALID),
Zhu Yib481de92007-09-25 17:54:57 -07004948 CHECK_AND_PRINT(IBSS),
4949 CHECK_AND_PRINT(ACTIVE),
4950 CHECK_AND_PRINT(RADAR),
4951 CHECK_AND_PRINT(WIDE),
4952 CHECK_AND_PRINT(NARROW),
4953 CHECK_AND_PRINT(DFS),
4954 eeprom_ch_info[ch].flags,
4955 eeprom_ch_info[ch].max_power_avg,
4956 ((eeprom_ch_info[ch].
4957 flags & EEPROM_CHANNEL_IBSS)
4958 && !(eeprom_ch_info[ch].
4959 flags & EEPROM_CHANNEL_RADAR))
4960 ? "" : "not ");
4961
4962 /* Set the user_txpower_limit to the highest power
4963 * supported by any channel */
4964 if (eeprom_ch_info[ch].max_power_avg >
4965 priv->user_txpower_limit)
4966 priv->user_txpower_limit =
4967 eeprom_ch_info[ch].max_power_avg;
4968
4969 ch_info++;
4970 }
4971 }
4972
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004973 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07004974 if (iwl3945_txpower_set_from_eeprom(priv))
4975 return -EIO;
4976
4977 return 0;
4978}
4979
Reinette Chatre849e0dc2008-01-23 10:15:18 -08004980/*
4981 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4982 */
4983static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4984{
4985 kfree(priv->channel_info);
4986 priv->channel_count = 0;
4987}
4988
Zhu Yib481de92007-09-25 17:54:57 -07004989/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4990 * sending probe req. This should be set long enough to hear probe responses
4991 * from more than one AP. */
4992#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4993#define IWL_ACTIVE_DWELL_TIME_52 (10)
4994
4995/* For faster active scanning, scan will move to the next channel if fewer than
4996 * PLCP_QUIET_THRESH packets are heard on this channel within
4997 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4998 * time if it's a quiet channel (nothing responded to our probe, and there's
4999 * no other traffic).
5000 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5001#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5002#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5003
5004/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5005 * Must be set longer than active dwell time.
5006 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5007#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5008#define IWL_PASSIVE_DWELL_TIME_52 (10)
5009#define IWL_PASSIVE_DWELL_BASE (100)
5010#define IWL_CHANNEL_TUNE_TIME 5
5011
Johannes Berg8318d782008-01-24 19:38:38 +01005012static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
5013 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07005014{
Johannes Berg8318d782008-01-24 19:38:38 +01005015 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07005016 return IWL_ACTIVE_DWELL_TIME_52;
5017 else
5018 return IWL_ACTIVE_DWELL_TIME_24;
5019}
5020
Johannes Berg8318d782008-01-24 19:38:38 +01005021static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
5022 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07005023{
Johannes Berg8318d782008-01-24 19:38:38 +01005024 u16 active = iwl3945_get_active_dwell_time(priv, band);
5025 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07005026 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5027 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5028
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005029 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005030 /* If we're associated, we clamp the maximum passive
5031 * dwell time to be 98% of the beacon interval (minus
5032 * 2 * channel tune time) */
5033 passive = priv->beacon_int;
5034 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5035 passive = IWL_PASSIVE_DWELL_BASE;
5036 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5037 }
5038
5039 if (passive <= active)
5040 passive = active + 1;
5041
5042 return passive;
5043}
5044
Johannes Berg8318d782008-01-24 19:38:38 +01005045static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
5046 enum ieee80211_band band,
Zhu Yib481de92007-09-25 17:54:57 -07005047 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005048 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07005049{
5050 const struct ieee80211_channel *channels = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01005051 const struct ieee80211_supported_band *sband;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005052 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07005053 u16 passive_dwell = 0;
5054 u16 active_dwell = 0;
5055 int added, i;
5056
Johannes Berg8318d782008-01-24 19:38:38 +01005057 sband = iwl3945_get_band(priv, band);
5058 if (!sband)
Zhu Yib481de92007-09-25 17:54:57 -07005059 return 0;
5060
Johannes Berg8318d782008-01-24 19:38:38 +01005061 channels = sband->channels;
Zhu Yib481de92007-09-25 17:54:57 -07005062
Johannes Berg8318d782008-01-24 19:38:38 +01005063 active_dwell = iwl3945_get_active_dwell_time(priv, band);
5064 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
Zhu Yib481de92007-09-25 17:54:57 -07005065
Johannes Berg8318d782008-01-24 19:38:38 +01005066 for (i = 0, added = 0; i < sband->n_channels; i++) {
5067 if (channels[i].hw_value ==
Zhu Yib481de92007-09-25 17:54:57 -07005068 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005069 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005070 IWL_DEBUG_SCAN
5071 ("Skipping current channel %d\n",
5072 le16_to_cpu(priv->active_rxon.channel));
5073 continue;
5074 }
5075 } else if (priv->only_active_channel)
5076 continue;
5077
Johannes Berg8318d782008-01-24 19:38:38 +01005078 scan_ch->channel = channels[i].hw_value;
Zhu Yib481de92007-09-25 17:54:57 -07005079
Johannes Berg8318d782008-01-24 19:38:38 +01005080 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07005081 if (!is_channel_valid(ch_info)) {
5082 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5083 scan_ch->channel);
5084 continue;
5085 }
5086
5087 if (!is_active || is_channel_passive(ch_info) ||
Johannes Berg8318d782008-01-24 19:38:38 +01005088 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
Zhu Yib481de92007-09-25 17:54:57 -07005089 scan_ch->type = 0; /* passive */
5090 else
5091 scan_ch->type = 1; /* active */
5092
5093 if (scan_ch->type & 1)
5094 scan_ch->type |= (direct_mask << 1);
5095
5096 if (is_channel_narrow(ch_info))
5097 scan_ch->type |= (1 << 7);
5098
5099 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5100 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5101
Ben Cahill9fbab512007-11-29 11:09:47 +08005102 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07005103 scan_ch->tpc.dsp_atten = 110;
5104 /* scan_pwr_info->tpc.dsp_atten; */
5105
5106 /*scan_pwr_info->tpc.tx_gain; */
Johannes Berg8318d782008-01-24 19:38:38 +01005107 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07005108 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5109 else {
5110 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5111 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08005112 * power level:
Reinette Chatre8a1b0242008-01-14 17:46:25 -08005113 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005114 */
5115 }
5116
5117 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5118 scan_ch->channel,
5119 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5120 (scan_ch->type & 1) ?
5121 active_dwell : passive_dwell);
5122
5123 scan_ch++;
5124 added++;
5125 }
5126
5127 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5128 return added;
5129}
5130
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005131static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005132 struct ieee80211_rate *rates)
5133{
5134 int i;
5135
5136 for (i = 0; i < IWL_RATE_COUNT; i++) {
Johannes Berg8318d782008-01-24 19:38:38 +01005137 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5138 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5139 rates[i].hw_value_short = i;
5140 rates[i].flags = 0;
5141 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
Zhu Yib481de92007-09-25 17:54:57 -07005142 /*
Johannes Berg8318d782008-01-24 19:38:38 +01005143 * If CCK != 1M then set short preamble rate flag.
Zhu Yib481de92007-09-25 17:54:57 -07005144 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005145 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Johannes Berg8318d782008-01-24 19:38:38 +01005146 0 : IEEE80211_RATE_SHORT_PREAMBLE;
Zhu Yib481de92007-09-25 17:54:57 -07005147 }
Zhu Yib481de92007-09-25 17:54:57 -07005148 }
5149}
5150
5151/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005152 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005153 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005154static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005155{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005156 struct iwl3945_channel_info *ch;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005157 struct ieee80211_supported_band *sband;
Zhu Yib481de92007-09-25 17:54:57 -07005158 struct ieee80211_channel *channels;
5159 struct ieee80211_channel *geo_ch;
5160 struct ieee80211_rate *rates;
5161 int i = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005162
Johannes Berg8318d782008-01-24 19:38:38 +01005163 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5164 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
Zhu Yib481de92007-09-25 17:54:57 -07005165 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5166 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5167 return 0;
5168 }
5169
Zhu Yib481de92007-09-25 17:54:57 -07005170 channels = kzalloc(sizeof(struct ieee80211_channel) *
5171 priv->channel_count, GFP_KERNEL);
Johannes Berg8318d782008-01-24 19:38:38 +01005172 if (!channels)
Zhu Yib481de92007-09-25 17:54:57 -07005173 return -ENOMEM;
Zhu Yib481de92007-09-25 17:54:57 -07005174
Tomas Winkler8211ef72008-03-02 01:36:04 +02005175 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
Zhu Yib481de92007-09-25 17:54:57 -07005176 GFP_KERNEL);
5177 if (!rates) {
Zhu Yib481de92007-09-25 17:54:57 -07005178 kfree(channels);
5179 return -ENOMEM;
5180 }
5181
Zhu Yib481de92007-09-25 17:54:57 -07005182 /* 5.2GHz channels start after the 2.4GHz channels */
Tomas Winkler8211ef72008-03-02 01:36:04 +02005183 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5184 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5185 /* just OFDM */
5186 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5187 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
Zhu Yib481de92007-09-25 17:54:57 -07005188
Tomas Winkler8211ef72008-03-02 01:36:04 +02005189 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5190 sband->channels = channels;
5191 /* OFDM & CCK */
5192 sband->bitrates = rates;
5193 sband->n_bitrates = IWL_RATE_COUNT;
Zhu Yib481de92007-09-25 17:54:57 -07005194
5195 priv->ieee_channels = channels;
5196 priv->ieee_rates = rates;
5197
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005198 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005199
Tomas Winkler8211ef72008-03-02 01:36:04 +02005200 for (i = 0; i < priv->channel_count; i++) {
Zhu Yib481de92007-09-25 17:54:57 -07005201 ch = &priv->channel_info[i];
5202
Tomas Winkler8211ef72008-03-02 01:36:04 +02005203 /* FIXME: might be removed if scan is OK*/
5204 if (!is_channel_valid(ch))
Zhu Yib481de92007-09-25 17:54:57 -07005205 continue;
Zhu Yib481de92007-09-25 17:54:57 -07005206
5207 if (is_channel_a_band(ch))
Tomas Winkler8211ef72008-03-02 01:36:04 +02005208 sband = &priv->bands[IEEE80211_BAND_5GHZ];
Johannes Berg8318d782008-01-24 19:38:38 +01005209 else
Tomas Winkler8211ef72008-03-02 01:36:04 +02005210 sband = &priv->bands[IEEE80211_BAND_2GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005211
Tomas Winkler8211ef72008-03-02 01:36:04 +02005212 geo_ch = &sband->channels[sband->n_channels++];
5213
5214 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
Johannes Berg8318d782008-01-24 19:38:38 +01005215 geo_ch->max_power = ch->max_power_avg;
5216 geo_ch->max_antenna_gain = 0xff;
Mohamed Abbas7b723042008-01-31 21:46:40 -08005217 geo_ch->hw_value = ch->channel;
Zhu Yib481de92007-09-25 17:54:57 -07005218
5219 if (is_channel_valid(ch)) {
Johannes Berg8318d782008-01-24 19:38:38 +01005220 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5221 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
Zhu Yib481de92007-09-25 17:54:57 -07005222
Johannes Berg8318d782008-01-24 19:38:38 +01005223 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5224 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07005225
5226 if (ch->flags & EEPROM_CHANNEL_RADAR)
Johannes Berg8318d782008-01-24 19:38:38 +01005227 geo_ch->flags |= IEEE80211_CHAN_RADAR;
Zhu Yib481de92007-09-25 17:54:57 -07005228
5229 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5230 priv->max_channel_txpower_limit =
5231 ch->max_power_avg;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005232 } else {
Johannes Berg8318d782008-01-24 19:38:38 +01005233 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005234 }
5235
5236 /* Save flags for reg domain usage */
5237 geo_ch->orig_flags = geo_ch->flags;
5238
5239 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5240 ch->channel, geo_ch->center_freq,
5241 is_channel_a_band(ch) ? "5.2" : "2.4",
5242 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5243 "restricted" : "valid",
5244 geo_ch->flags);
Zhu Yib481de92007-09-25 17:54:57 -07005245 }
5246
Tomas Winkler82b9a122008-03-04 18:09:30 -08005247 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5248 priv->cfg->sku & IWL_SKU_A) {
Zhu Yib481de92007-09-25 17:54:57 -07005249 printk(KERN_INFO DRV_NAME
5250 ": Incorrectly detected BG card as ABG. Please send "
5251 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5252 priv->pci_dev->device, priv->pci_dev->subsystem_device);
Tomas Winkler82b9a122008-03-04 18:09:30 -08005253 priv->cfg->sku &= ~IWL_SKU_A;
Zhu Yib481de92007-09-25 17:54:57 -07005254 }
5255
5256 printk(KERN_INFO DRV_NAME
5257 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
Johannes Berg8318d782008-01-24 19:38:38 +01005258 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5259 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
Zhu Yib481de92007-09-25 17:54:57 -07005260
Johannes Berg8318d782008-01-24 19:38:38 +01005261 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5262 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005263
Zhu Yib481de92007-09-25 17:54:57 -07005264 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5265
5266 return 0;
5267}
5268
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005269/*
5270 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5271 */
5272static void iwl3945_free_geos(struct iwl3945_priv *priv)
5273{
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005274 kfree(priv->ieee_channels);
5275 kfree(priv->ieee_rates);
5276 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5277}
5278
Zhu Yib481de92007-09-25 17:54:57 -07005279/******************************************************************************
5280 *
5281 * uCode download functions
5282 *
5283 ******************************************************************************/
5284
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005285static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005286{
Tomas Winkler98c92212008-01-14 17:46:20 -08005287 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5288 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5289 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5290 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5291 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5292 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005293}
5294
5295/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005296 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005297 * looking at all data.
5298 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005299static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005300{
5301 u32 val;
5302 u32 save_len = len;
5303 int rc = 0;
5304 u32 errcnt;
5305
5306 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005308 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005309 if (rc)
5310 return rc;
5311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005312 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005313
5314 errcnt = 0;
5315 for (; len > 0; len -= sizeof(u32), image++) {
5316 /* read data comes through single port, auto-incr addr */
5317 /* NOTE: Use the debugless read so we don't flood kernel log
5318 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005319 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005320 if (val != le32_to_cpu(*image)) {
5321 IWL_ERROR("uCode INST section is invalid at "
5322 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5323 save_len - len, val, le32_to_cpu(*image));
5324 rc = -EIO;
5325 errcnt++;
5326 if (errcnt >= 20)
5327 break;
5328 }
5329 }
5330
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005331 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005332
5333 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005334 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005335
5336 return rc;
5337}
5338
5339
5340/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005341 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005342 * using sample data 100 bytes apart. If these sample points are good,
5343 * it's a pretty good bet that everything between them is good, too.
5344 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005345static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005346{
5347 u32 val;
5348 int rc = 0;
5349 u32 errcnt = 0;
5350 u32 i;
5351
5352 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5353
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005354 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005355 if (rc)
5356 return rc;
5357
5358 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5359 /* read data comes through single port, auto-incr addr */
5360 /* NOTE: Use the debugless read so we don't flood kernel log
5361 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005362 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005363 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005364 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005365 if (val != le32_to_cpu(*image)) {
5366#if 0 /* Enable this if you want to see details */
5367 IWL_ERROR("uCode INST section is invalid at "
5368 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5369 i, val, *image);
5370#endif
5371 rc = -EIO;
5372 errcnt++;
5373 if (errcnt >= 3)
5374 break;
5375 }
5376 }
5377
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005378 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005379
5380 return rc;
5381}
5382
5383
5384/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005385 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005386 * and verify its contents
5387 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005388static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005389{
5390 __le32 *image;
5391 u32 len;
5392 int rc = 0;
5393
5394 /* Try bootstrap */
5395 image = (__le32 *)priv->ucode_boot.v_addr;
5396 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005397 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005398 if (rc == 0) {
5399 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5400 return 0;
5401 }
5402
5403 /* Try initialize */
5404 image = (__le32 *)priv->ucode_init.v_addr;
5405 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005406 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005407 if (rc == 0) {
5408 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5409 return 0;
5410 }
5411
5412 /* Try runtime/protocol */
5413 image = (__le32 *)priv->ucode_code.v_addr;
5414 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005415 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005416 if (rc == 0) {
5417 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5418 return 0;
5419 }
5420
5421 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5422
Ben Cahill9fbab512007-11-29 11:09:47 +08005423 /* Since nothing seems to match, show first several data entries in
5424 * instruction SRAM, so maybe visual inspection will give a clue.
5425 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005426 image = (__le32 *)priv->ucode_boot.v_addr;
5427 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005428 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005429
5430 return rc;
5431}
5432
5433
5434/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005435static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005436{
5437 __le32 *image = priv->ucode_boot.v_addr;
5438 u32 len = priv->ucode_boot.len;
5439 u32 reg;
5440 u32 val;
5441
5442 IWL_DEBUG_INFO("Begin verify bsm\n");
5443
5444 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005445 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005446 for (reg = BSM_SRAM_LOWER_BOUND;
5447 reg < BSM_SRAM_LOWER_BOUND + len;
5448 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005449 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005450 if (val != le32_to_cpu(*image)) {
5451 IWL_ERROR("BSM uCode verification failed at "
5452 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5453 BSM_SRAM_LOWER_BOUND,
5454 reg - BSM_SRAM_LOWER_BOUND, len,
5455 val, le32_to_cpu(*image));
5456 return -EIO;
5457 }
5458 }
5459
5460 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5461
5462 return 0;
5463}
5464
5465/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005466 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005467 *
5468 * BSM operation:
5469 *
5470 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5471 * in special SRAM that does not power down during RFKILL. When powering back
5472 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5473 * the bootstrap program into the on-board processor, and starts it.
5474 *
5475 * The bootstrap program loads (via DMA) instructions and data for a new
5476 * program from host DRAM locations indicated by the host driver in the
5477 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5478 * automatically.
5479 *
5480 * When initializing the NIC, the host driver points the BSM to the
5481 * "initialize" uCode image. This uCode sets up some internal data, then
5482 * notifies host via "initialize alive" that it is complete.
5483 *
5484 * The host then replaces the BSM_DRAM_* pointer values to point to the
5485 * normal runtime uCode instructions and a backup uCode data cache buffer
5486 * (filled initially with starting data values for the on-board processor),
5487 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5488 * which begins normal operation.
5489 *
5490 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5491 * the backup data cache in DRAM before SRAM is powered down.
5492 *
5493 * When powering back up, the BSM loads the bootstrap program. This reloads
5494 * the runtime uCode instructions and the backup data cache into SRAM,
5495 * and re-launches the runtime uCode from where it left off.
5496 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005497static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005498{
5499 __le32 *image = priv->ucode_boot.v_addr;
5500 u32 len = priv->ucode_boot.len;
5501 dma_addr_t pinst;
5502 dma_addr_t pdata;
5503 u32 inst_len;
5504 u32 data_len;
5505 int rc;
5506 int i;
5507 u32 done;
5508 u32 reg_offset;
5509
5510 IWL_DEBUG_INFO("Begin load bsm\n");
5511
5512 /* make sure bootstrap program is no larger than BSM's SRAM size */
5513 if (len > IWL_MAX_BSM_SIZE)
5514 return -EINVAL;
5515
5516 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005517 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005518 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005519 * after the "initialize" uCode has run, to point to
5520 * runtime/protocol instructions and backup data cache. */
5521 pinst = priv->ucode_init.p_addr;
5522 pdata = priv->ucode_init_data.p_addr;
5523 inst_len = priv->ucode_init.len;
5524 data_len = priv->ucode_init_data.len;
5525
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005526 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005527 if (rc)
5528 return rc;
5529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005530 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5531 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5532 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5533 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005534
5535 /* Fill BSM memory with bootstrap instructions */
5536 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5537 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5538 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005539 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005540 le32_to_cpu(*image));
5541
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005542 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005543 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005544 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005545 return rc;
5546 }
5547
5548 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005549 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5550 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005551 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005552 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005553
5554 /* Load bootstrap code into instruction SRAM now,
5555 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005556 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005557 BSM_WR_CTRL_REG_BIT_START);
5558
5559 /* Wait for load of bootstrap uCode to finish */
5560 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005561 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005562 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5563 break;
5564 udelay(10);
5565 }
5566 if (i < 100)
5567 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5568 else {
5569 IWL_ERROR("BSM write did not complete!\n");
5570 return -EIO;
5571 }
5572
5573 /* Enable future boot loads whenever power management unit triggers it
5574 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005575 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005576 BSM_WR_CTRL_REG_BIT_START_EN);
5577
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005578 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005579
5580 return 0;
5581}
5582
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005583static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005584{
5585 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005586 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005587}
5588
5589/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005590 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005591 *
5592 * Copy into buffers for card to fetch via bus-mastering
5593 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005594static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005595{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005596 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005597 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005598 const struct firmware *ucode_raw;
5599 /* firmware file name contains uCode/driver compatibility version */
Tomas Winkler4bf775cd2008-03-04 18:09:31 -08005600 const char *name = priv->cfg->fw_name;
Zhu Yib481de92007-09-25 17:54:57 -07005601 u8 *src;
5602 size_t len;
5603 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5604
5605 /* Ask kernel firmware_class module to get the boot firmware off disk.
5606 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005607 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5608 if (ret < 0) {
5609 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5610 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005611 goto error;
5612 }
5613
5614 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5615 name, ucode_raw->size);
5616
5617 /* Make sure that we got at least our header! */
5618 if (ucode_raw->size < sizeof(*ucode)) {
5619 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005620 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005621 goto err_release;
5622 }
5623
5624 /* Data from ucode file: header followed by uCode images */
5625 ucode = (void *)ucode_raw->data;
5626
5627 ver = le32_to_cpu(ucode->ver);
5628 inst_size = le32_to_cpu(ucode->inst_size);
5629 data_size = le32_to_cpu(ucode->data_size);
5630 init_size = le32_to_cpu(ucode->init_size);
5631 init_data_size = le32_to_cpu(ucode->init_data_size);
5632 boot_size = le32_to_cpu(ucode->boot_size);
5633
5634 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005635 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5636 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5637 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5638 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5639 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005640
5641 /* Verify size of file vs. image size info in file's header */
5642 if (ucode_raw->size < sizeof(*ucode) +
5643 inst_size + data_size + init_size +
5644 init_data_size + boot_size) {
5645
5646 IWL_DEBUG_INFO("uCode file size %d too small\n",
5647 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005648 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005649 goto err_release;
5650 }
5651
5652 /* Verify that uCode images will fit in card's SRAM */
5653 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005654 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5655 inst_size);
5656 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005657 goto err_release;
5658 }
5659
5660 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005661 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5662 data_size);
5663 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005664 goto err_release;
5665 }
5666 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005667 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5668 init_size);
5669 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005670 goto err_release;
5671 }
5672 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005673 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5674 init_data_size);
5675 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005676 goto err_release;
5677 }
5678 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005679 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5680 boot_size);
5681 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005682 goto err_release;
5683 }
5684
5685 /* Allocate ucode buffers for card's bus-master loading ... */
5686
5687 /* Runtime instructions and 2 copies of data:
5688 * 1) unmodified from disk
5689 * 2) backup cache for save/restore during power-downs */
5690 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005691 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005692
5693 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005694 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005695
5696 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005697 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005698
5699 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005700 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005701 goto err_pci_alloc;
5702
Tomas Winkler90e759d2007-11-29 11:09:41 +08005703 /* Initialization instructions and data */
5704 if (init_size && init_data_size) {
5705 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005706 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005707
5708 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005709 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005710
5711 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5712 goto err_pci_alloc;
5713 }
5714
5715 /* Bootstrap (instructions only, no data) */
5716 if (boot_size) {
5717 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005718 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005719
5720 if (!priv->ucode_boot.v_addr)
5721 goto err_pci_alloc;
5722 }
5723
Zhu Yib481de92007-09-25 17:54:57 -07005724 /* Copy images into buffers for card's bus-master reads ... */
5725
5726 /* Runtime instructions (first block of data in file) */
5727 src = &ucode->data[0];
5728 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005729 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005730 memcpy(priv->ucode_code.v_addr, src, len);
5731 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5732 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5733
5734 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005735 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005736 src = &ucode->data[inst_size];
5737 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005738 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005739 memcpy(priv->ucode_data.v_addr, src, len);
5740 memcpy(priv->ucode_data_backup.v_addr, src, len);
5741
5742 /* Initialization instructions (3rd block) */
5743 if (init_size) {
5744 src = &ucode->data[inst_size + data_size];
5745 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005746 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5747 len);
Zhu Yib481de92007-09-25 17:54:57 -07005748 memcpy(priv->ucode_init.v_addr, src, len);
5749 }
5750
5751 /* Initialization data (4th block) */
5752 if (init_data_size) {
5753 src = &ucode->data[inst_size + data_size + init_size];
5754 len = priv->ucode_init_data.len;
5755 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5756 (int)len);
5757 memcpy(priv->ucode_init_data.v_addr, src, len);
5758 }
5759
5760 /* Bootstrap instructions (5th block) */
5761 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5762 len = priv->ucode_boot.len;
5763 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5764 (int)len);
5765 memcpy(priv->ucode_boot.v_addr, src, len);
5766
5767 /* We have our copies now, allow OS release its copies */
5768 release_firmware(ucode_raw);
5769 return 0;
5770
5771 err_pci_alloc:
5772 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005773 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005774 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005775
5776 err_release:
5777 release_firmware(ucode_raw);
5778
5779 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005780 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005781}
5782
5783
5784/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005785 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005786 *
5787 * Tell initialization uCode where to find runtime uCode.
5788 *
5789 * BSM registers initially contain pointers to initialization uCode.
5790 * We need to replace them to load runtime uCode inst and data,
5791 * and to save runtime data when powering down.
5792 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005793static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005794{
5795 dma_addr_t pinst;
5796 dma_addr_t pdata;
5797 int rc = 0;
5798 unsigned long flags;
5799
5800 /* bits 31:0 for 3945 */
5801 pinst = priv->ucode_code.p_addr;
5802 pdata = priv->ucode_data_backup.p_addr;
5803
5804 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005805 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005806 if (rc) {
5807 spin_unlock_irqrestore(&priv->lock, flags);
5808 return rc;
5809 }
5810
5811 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005812 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5813 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5814 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005815 priv->ucode_data.len);
5816
5817 /* Inst bytecount must be last to set up, bit 31 signals uCode
5818 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005819 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005820 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5821
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005822 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005823
5824 spin_unlock_irqrestore(&priv->lock, flags);
5825
5826 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5827
5828 return rc;
5829}
5830
5831/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005832 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005833 *
5834 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5835 *
Zhu Yib481de92007-09-25 17:54:57 -07005836 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08005837 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005838static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005839{
5840 /* Check alive response for "valid" sign from uCode */
5841 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5842 /* We had an error bringing up the hardware, so take it
5843 * all the way back down so we can try again */
5844 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5845 goto restart;
5846 }
5847
5848 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5849 * This is a paranoid check, because we would not have gotten the
5850 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005851 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005852 /* Runtime instruction load was bad;
5853 * take it all the way back down so we can try again */
5854 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5855 goto restart;
5856 }
5857
5858 /* Send pointers to protocol/runtime uCode image ... init code will
5859 * load and launch runtime uCode, which will send us another "Alive"
5860 * notification. */
5861 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005862 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005863 /* Runtime instruction load won't happen;
5864 * take it all the way back down so we can try again */
5865 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5866 goto restart;
5867 }
5868 return;
5869
5870 restart:
5871 queue_work(priv->workqueue, &priv->restart);
5872}
5873
5874
5875/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005876 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005877 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005878 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07005879 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005880static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005881{
5882 int rc = 0;
5883 int thermal_spin = 0;
5884 u32 rfkill;
5885
5886 IWL_DEBUG_INFO("Runtime Alive received.\n");
5887
5888 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5889 /* We had an error bringing up the hardware, so take it
5890 * all the way back down so we can try again */
5891 IWL_DEBUG_INFO("Alive failed.\n");
5892 goto restart;
5893 }
5894
5895 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5896 * This is a paranoid check, because we would not have gotten the
5897 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005898 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005899 /* Runtime instruction load was bad;
5900 * take it all the way back down so we can try again */
5901 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5902 goto restart;
5903 }
5904
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005905 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005906
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005907 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005908 if (rc) {
5909 IWL_WARNING("Can not read rfkill status from adapter\n");
5910 return;
5911 }
5912
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005913 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005914 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005915 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005916
5917 if (rfkill & 0x1) {
5918 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5919 /* if rfkill is not on, then wait for thermal
5920 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005921 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07005922 thermal_spin++;
5923 udelay(10);
5924 }
5925
5926 if (thermal_spin)
5927 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5928 thermal_spin * 10);
5929 } else
5930 set_bit(STATUS_RF_KILL_HW, &priv->status);
5931
Ben Cahill9fbab512007-11-29 11:09:47 +08005932 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07005933 set_bit(STATUS_ALIVE, &priv->status);
5934
5935 /* Clear out the uCode error bit if it is set */
5936 clear_bit(STATUS_FW_ERROR, &priv->status);
5937
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005938 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07005939 return;
5940
Zhu Yi5a669262008-01-14 17:46:18 -08005941 ieee80211_start_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07005942
5943 priv->active_rate = priv->rates_mask;
5944 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5945
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005946 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07005947
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005948 if (iwl3945_is_associated(priv)) {
5949 struct iwl3945_rxon_cmd *active_rxon =
5950 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07005951
5952 memcpy(&priv->staging_rxon, &priv->active_rxon,
5953 sizeof(priv->staging_rxon));
5954 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5955 } else {
5956 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005957 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005958 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5959 }
5960
Ben Cahill9fbab512007-11-29 11:09:47 +08005961 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005962 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005963
5964 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005965 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005966
5967 /* At this point, the NIC is initialized and operational */
5968 priv->notif_missed_beacons = 0;
5969 set_bit(STATUS_READY, &priv->status);
5970
5971 iwl3945_reg_txpower_periodic(priv);
5972
5973 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Zhu Yi5a669262008-01-14 17:46:18 -08005974 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07005975
5976 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005977 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005978
5979 return;
5980
5981 restart:
5982 queue_work(priv->workqueue, &priv->restart);
5983}
5984
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005985static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07005986
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005987static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005988{
5989 unsigned long flags;
5990 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5991 struct ieee80211_conf *conf = NULL;
5992
5993 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5994
5995 conf = ieee80211_get_hw_conf(priv->hw);
5996
5997 if (!exit_pending)
5998 set_bit(STATUS_EXIT_PENDING, &priv->status);
5999
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006000 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006001
6002 /* Unblock any waiting calls */
6003 wake_up_interruptible_all(&priv->wait_command_queue);
6004
Zhu Yib481de92007-09-25 17:54:57 -07006005 /* Wipe out the EXIT_PENDING status bit if we are not actually
6006 * exiting the module */
6007 if (!exit_pending)
6008 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6009
6010 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006011 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07006012
6013 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006014 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006015
6016 if (priv->mac80211_registered)
6017 ieee80211_stop_queues(priv->hw);
6018
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006019 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07006020 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006021 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006022 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6023 STATUS_RF_KILL_HW |
6024 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6025 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08006026 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6027 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07006028 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6029 STATUS_IN_SUSPEND;
6030 goto exit;
6031 }
6032
6033 /* ...otherwise clear out all the status bits but the RF Kill and
6034 * SUSPEND bits and continue taking the NIC down. */
6035 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6036 STATUS_RF_KILL_HW |
6037 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6038 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08006039 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6040 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07006041 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6042 STATUS_IN_SUSPEND |
6043 test_bit(STATUS_FW_ERROR, &priv->status) <<
6044 STATUS_FW_ERROR;
6045
6046 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006047 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07006048 spin_unlock_irqrestore(&priv->lock, flags);
6049
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006050 iwl3945_hw_txq_ctx_stop(priv);
6051 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006052
6053 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006054 if (!iwl3945_grab_nic_access(priv)) {
6055 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07006056 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006057 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006058 }
6059 spin_unlock_irqrestore(&priv->lock, flags);
6060
6061 udelay(5);
6062
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006063 iwl3945_hw_nic_stop_master(priv);
6064 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6065 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006066
6067 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006068 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07006069
6070 if (priv->ibss_beacon)
6071 dev_kfree_skb(priv->ibss_beacon);
6072 priv->ibss_beacon = NULL;
6073
6074 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006075 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006076}
6077
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006078static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006079{
6080 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006081 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006082 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08006083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006084 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006085}
6086
6087#define MAX_HW_RESTARTS 5
6088
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006089static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006090{
6091 int rc, i;
6092
6093 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6094 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6095 return -EIO;
6096 }
6097
6098 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6099 IWL_WARNING("Radio disabled by SW RF kill (module "
6100 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08006101 return -ENODEV;
6102 }
6103
Reinette Chatree903fbd2008-01-30 22:05:15 -08006104 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6105 IWL_ERROR("ucode not available for device bringup\n");
6106 return -EIO;
6107 }
6108
Zhu Yie655b9f2008-01-24 02:19:38 -08006109 /* If platform's RF_KILL switch is NOT set to KILL */
6110 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6111 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6112 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6113 else {
6114 set_bit(STATUS_RF_KILL_HW, &priv->status);
6115 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6116 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6117 return -ENODEV;
6118 }
Zhu Yib481de92007-09-25 17:54:57 -07006119 }
6120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006121 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006122
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006123 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006124 if (rc) {
6125 IWL_ERROR("Unable to int nic\n");
6126 return rc;
6127 }
6128
6129 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006130 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6131 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006132 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6133
6134 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006135 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6136 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006137
6138 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006139 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6140 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006141
6142 /* Copy original ucode data image from disk into backup cache.
6143 * This will be used to initialize the on-board processor's
6144 * data SRAM for a clean start when the runtime program first loads. */
6145 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a669262008-01-14 17:46:18 -08006146 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006147
Zhu Yie655b9f2008-01-24 02:19:38 -08006148 /* We return success when we resume from suspend and rf_kill is on. */
6149 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6150 return 0;
6151
Zhu Yib481de92007-09-25 17:54:57 -07006152 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6153
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006154 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006155
6156 /* load bootstrap state machine,
6157 * load bootstrap program into processor's memory,
6158 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006159 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006160
6161 if (rc) {
6162 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6163 continue;
6164 }
6165
6166 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006167 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006168
Zhu Yib481de92007-09-25 17:54:57 -07006169 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6170
6171 return 0;
6172 }
6173
6174 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006175 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006176
6177 /* tried to restart and config the device for as long as our
6178 * patience could withstand */
6179 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6180 return -EIO;
6181}
6182
6183
6184/*****************************************************************************
6185 *
6186 * Workqueue callbacks
6187 *
6188 *****************************************************************************/
6189
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006190static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006191{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006192 struct iwl3945_priv *priv =
6193 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006194
6195 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6196 return;
6197
6198 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006199 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006200 mutex_unlock(&priv->mutex);
6201}
6202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006203static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006204{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006205 struct iwl3945_priv *priv =
6206 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006207
6208 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6209 return;
6210
6211 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006212 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006213 mutex_unlock(&priv->mutex);
6214}
6215
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006216static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006217{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006218 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006219
6220 wake_up_interruptible(&priv->wait_command_queue);
6221
6222 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6223 return;
6224
6225 mutex_lock(&priv->mutex);
6226
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006227 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006228 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6229 "HW and/or SW RF Kill no longer active, restarting "
6230 "device\n");
6231 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6232 queue_work(priv->workqueue, &priv->restart);
6233 } else {
6234
6235 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6236 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6237 "disabled by SW switch\n");
6238 else
6239 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6240 "Kill switch must be turned off for "
6241 "wireless networking to work.\n");
6242 }
6243 mutex_unlock(&priv->mutex);
6244}
6245
6246#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6247
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006248static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006249{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006250 struct iwl3945_priv *priv =
6251 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006252
6253 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6254 return;
6255
6256 mutex_lock(&priv->mutex);
6257 if (test_bit(STATUS_SCANNING, &priv->status) ||
6258 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6259 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6260 "Scan completion watchdog resetting adapter (%dms)\n",
6261 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006262
Zhu Yib481de92007-09-25 17:54:57 -07006263 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006264 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006265 }
6266 mutex_unlock(&priv->mutex);
6267}
6268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006269static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006270{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006271 struct iwl3945_priv *priv =
6272 container_of(data, struct iwl3945_priv, request_scan);
6273 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006274 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006275 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006276 .meta.flags = CMD_SIZE_HUGE,
6277 };
6278 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006279 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006280 struct ieee80211_conf *conf = NULL;
6281 u8 direct_mask;
Johannes Berg8318d782008-01-24 19:38:38 +01006282 enum ieee80211_band band;
Zhu Yib481de92007-09-25 17:54:57 -07006283
6284 conf = ieee80211_get_hw_conf(priv->hw);
6285
6286 mutex_lock(&priv->mutex);
6287
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006288 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006289 IWL_WARNING("request scan called when driver not ready.\n");
6290 goto done;
6291 }
6292
6293 /* Make sure the scan wasn't cancelled before this queued work
6294 * was given the chance to run... */
6295 if (!test_bit(STATUS_SCANNING, &priv->status))
6296 goto done;
6297
6298 /* This should never be called or scheduled if there is currently
6299 * a scan active in the hardware. */
6300 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6301 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6302 "Ignoring second request.\n");
6303 rc = -EIO;
6304 goto done;
6305 }
6306
6307 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6308 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6309 goto done;
6310 }
6311
6312 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6313 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6314 goto done;
6315 }
6316
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006317 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006318 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6319 goto done;
6320 }
6321
6322 if (!test_bit(STATUS_READY, &priv->status)) {
6323 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6324 goto done;
6325 }
6326
6327 if (!priv->scan_bands) {
6328 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6329 goto done;
6330 }
6331
6332 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006333 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006334 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6335 if (!priv->scan) {
6336 rc = -ENOMEM;
6337 goto done;
6338 }
6339 }
6340 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006341 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006342
6343 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6344 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6345
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006346 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006347 u16 interval = 0;
6348 u32 extra;
6349 u32 suspend_time = 100;
6350 u32 scan_suspend_time = 100;
6351 unsigned long flags;
6352
6353 IWL_DEBUG_INFO("Scanning while associated...\n");
6354
6355 spin_lock_irqsave(&priv->lock, flags);
6356 interval = priv->beacon_int;
6357 spin_unlock_irqrestore(&priv->lock, flags);
6358
6359 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006360 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006361 if (!interval)
6362 interval = suspend_time;
6363 /*
6364 * suspend time format:
6365 * 0-19: beacon interval in usec (time before exec.)
6366 * 20-23: 0
6367 * 24-31: number of beacons (suspend between channels)
6368 */
6369
6370 extra = (suspend_time / interval) << 24;
6371 scan_suspend_time = 0xFF0FFFFF &
6372 (extra | ((suspend_time % interval) * 1024));
6373
6374 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6375 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6376 scan_suspend_time, interval);
6377 }
6378
6379 /* We should add the ability for user to lock to PASSIVE ONLY */
6380 if (priv->one_direct_scan) {
6381 IWL_DEBUG_SCAN
6382 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006383 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006384 priv->direct_ssid_len));
6385 scan->direct_scan[0].id = WLAN_EID_SSID;
6386 scan->direct_scan[0].len = priv->direct_ssid_len;
6387 memcpy(scan->direct_scan[0].ssid,
6388 priv->direct_ssid, priv->direct_ssid_len);
6389 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006390 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006391 scan->direct_scan[0].id = WLAN_EID_SSID;
6392 scan->direct_scan[0].len = priv->essid_len;
6393 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6394 direct_mask = 1;
6395 } else
6396 direct_mask = 0;
6397
6398 /* We don't build a direct scan probe request; the uCode will do
6399 * that based on the direct_mask added to each channel entry */
6400 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006401 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Cyrill Gorcunov18904f52008-01-26 19:09:36 +03006402 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
Zhu Yib481de92007-09-25 17:54:57 -07006403 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6404 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6405 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6406
6407 /* flags + rate selection */
6408
6409 switch (priv->scan_bands) {
6410 case 2:
6411 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6412 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6413 scan->good_CRC_th = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01006414 band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006415 break;
6416
6417 case 1:
6418 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6419 scan->good_CRC_th = IWL_GOOD_CRC_TH;
Johannes Berg8318d782008-01-24 19:38:38 +01006420 band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006421 break;
6422
6423 default:
6424 IWL_WARNING("Invalid scan band count\n");
6425 goto done;
6426 }
6427
6428 /* select Rx antennas */
6429 scan->flags |= iwl3945_get_antenna_flags(priv);
6430
6431 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6432 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6433
6434 if (direct_mask)
6435 IWL_DEBUG_SCAN
6436 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006437 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006438 else
6439 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6440
6441 scan->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006442 iwl3945_get_channels_for_scan(
Johannes Berg8318d782008-01-24 19:38:38 +01006443 priv, band, 1, /* active */
Zhu Yib481de92007-09-25 17:54:57 -07006444 direct_mask,
6445 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6446
6447 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006448 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006449 cmd.data = scan;
6450 scan->len = cpu_to_le16(cmd.len);
6451
6452 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006453 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006454 if (rc)
6455 goto done;
6456
6457 queue_delayed_work(priv->workqueue, &priv->scan_check,
6458 IWL_SCAN_CHECK_WATCHDOG);
6459
6460 mutex_unlock(&priv->mutex);
6461 return;
6462
6463 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006464 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006465 queue_work(priv->workqueue, &priv->scan_completed);
6466 mutex_unlock(&priv->mutex);
6467}
6468
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006469static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006470{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006471 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006472
6473 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6474 return;
6475
6476 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006477 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006478 mutex_unlock(&priv->mutex);
6479}
6480
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006481static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006482{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006483 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006484
6485 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6486 return;
6487
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006488 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006489 queue_work(priv->workqueue, &priv->up);
6490}
6491
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006492static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006493{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006494 struct iwl3945_priv *priv =
6495 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006496
6497 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6498 return;
6499
6500 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006501 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006502 mutex_unlock(&priv->mutex);
6503}
6504
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006505#define IWL_DELAY_NEXT_SCAN (HZ*2)
6506
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006507static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006508{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006509 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006510 post_associate.work);
6511
6512 int rc = 0;
6513 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006514 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006515
6516 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6517 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6518 return;
6519 }
6520
6521
Joe Perches0795af52007-10-03 17:59:30 -07006522 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6523 priv->assoc_id,
6524 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006525
6526 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6527 return;
6528
6529 mutex_lock(&priv->mutex);
6530
Johannes Berg32bfd352007-12-19 01:31:26 +01006531 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006532 mutex_unlock(&priv->mutex);
6533 return;
6534 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006535 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006536
Zhu Yib481de92007-09-25 17:54:57 -07006537 conf = ieee80211_get_hw_conf(priv->hw);
6538
6539 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006540 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006541
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006542 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6543 iwl3945_setup_rxon_timing(priv);
6544 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006545 sizeof(priv->rxon_timing), &priv->rxon_timing);
6546 if (rc)
6547 IWL_WARNING("REPLY_RXON_TIMING failed - "
6548 "Attempting to continue.\n");
6549
6550 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6551
6552 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6553
6554 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6555 priv->assoc_id, priv->beacon_int);
6556
6557 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6558 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6559 else
6560 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6561
6562 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6563 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6564 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6565 else
6566 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6567
6568 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6569 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6570
6571 }
6572
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006573 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006574
6575 switch (priv->iw_mode) {
6576 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006577 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006578 break;
6579
6580 case IEEE80211_IF_TYPE_IBSS:
6581
6582 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006583 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006584
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006585 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6586 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006587 iwl3945_sync_sta(priv, IWL_STA_ID,
Johannes Berg8318d782008-01-24 19:38:38 +01006588 (priv->band == IEEE80211_BAND_5GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07006589 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6590 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006591 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6592 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006593
6594 break;
6595
6596 default:
6597 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006598 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006599 break;
6600 }
6601
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006602 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006603
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006604 iwl3945_activate_qos(priv, 0);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08006605
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006606 /* we have just associated, don't start scan too early */
6607 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006608 mutex_unlock(&priv->mutex);
6609}
6610
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006611static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006612{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006613 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006614
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006615 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006616 return;
6617
6618 mutex_lock(&priv->mutex);
6619
6620 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006621 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006622
6623 mutex_unlock(&priv->mutex);
6624}
6625
Zhu Yi76bb77e2007-11-22 10:53:22 +08006626static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6627
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006628static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006629{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006630 struct iwl3945_priv *priv =
6631 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006632
6633 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6634
6635 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6636 return;
6637
Zhu Yia0646472007-12-20 14:10:01 +08006638 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6639 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006640
Zhu Yib481de92007-09-25 17:54:57 -07006641 ieee80211_scan_completed(priv->hw);
6642
6643 /* Since setting the TXPOWER may have been deferred while
6644 * performing the scan, fire one off */
6645 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006646 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006647 mutex_unlock(&priv->mutex);
6648}
6649
6650/*****************************************************************************
6651 *
6652 * mac80211 entry point functions
6653 *
6654 *****************************************************************************/
6655
Zhu Yi5a669262008-01-14 17:46:18 -08006656#define UCODE_READY_TIMEOUT (2 * HZ)
6657
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006658static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006659{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006660 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a669262008-01-14 17:46:18 -08006661 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006662
6663 IWL_DEBUG_MAC80211("enter\n");
6664
Zhu Yi5a669262008-01-14 17:46:18 -08006665 if (pci_enable_device(priv->pci_dev)) {
6666 IWL_ERROR("Fail to pci_enable_device\n");
6667 return -ENODEV;
6668 }
6669 pci_restore_state(priv->pci_dev);
6670 pci_enable_msi(priv->pci_dev);
6671
6672 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6673 DRV_NAME, priv);
6674 if (ret) {
6675 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6676 goto out_disable_msi;
6677 }
6678
Zhu Yib481de92007-09-25 17:54:57 -07006679 /* we should be verifying the device is ready to be opened */
6680 mutex_lock(&priv->mutex);
6681
Zhu Yi5a669262008-01-14 17:46:18 -08006682 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6683 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6684 * ucode filename and max sizes are card-specific. */
6685
6686 if (!priv->ucode_code.len) {
6687 ret = iwl3945_read_ucode(priv);
6688 if (ret) {
6689 IWL_ERROR("Could not read microcode: %d\n", ret);
6690 mutex_unlock(&priv->mutex);
6691 goto out_release_irq;
6692 }
6693 }
6694
Zhu Yie655b9f2008-01-24 02:19:38 -08006695 ret = __iwl3945_up(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08006696
Zhu Yib481de92007-09-25 17:54:57 -07006697 mutex_unlock(&priv->mutex);
Zhu Yi5a669262008-01-14 17:46:18 -08006698
Zhu Yie655b9f2008-01-24 02:19:38 -08006699 if (ret)
6700 goto out_release_irq;
6701
6702 IWL_DEBUG_INFO("Start UP work.\n");
6703
6704 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6705 return 0;
6706
Zhu Yi5a669262008-01-14 17:46:18 -08006707 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6708 * mac80211 will not be run successfully. */
6709 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6710 test_bit(STATUS_READY, &priv->status),
6711 UCODE_READY_TIMEOUT);
6712 if (!ret) {
6713 if (!test_bit(STATUS_READY, &priv->status)) {
6714 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6715 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6716 ret = -ETIMEDOUT;
6717 goto out_release_irq;
6718 }
6719 }
6720
Zhu Yie655b9f2008-01-24 02:19:38 -08006721 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006722 IWL_DEBUG_MAC80211("leave\n");
6723 return 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006724
6725out_release_irq:
6726 free_irq(priv->pci_dev->irq, priv);
6727out_disable_msi:
6728 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006729 pci_disable_device(priv->pci_dev);
6730 priv->is_open = 0;
6731 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a669262008-01-14 17:46:18 -08006732 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006733}
6734
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006735static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006736{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006737 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006738
6739 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006740
Zhu Yie655b9f2008-01-24 02:19:38 -08006741 if (!priv->is_open) {
6742 IWL_DEBUG_MAC80211("leave - skip\n");
6743 return;
6744 }
6745
Zhu Yib481de92007-09-25 17:54:57 -07006746 priv->is_open = 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006747
6748 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006749 /* stop mac, cancel any scan request and clear
6750 * RXON_FILTER_ASSOC_MSK BIT
6751 */
Zhu Yi5a669262008-01-14 17:46:18 -08006752 mutex_lock(&priv->mutex);
6753 iwl3945_scan_cancel_timeout(priv, 100);
6754 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006755 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006756 }
6757
Zhu Yi5a669262008-01-14 17:46:18 -08006758 iwl3945_down(priv);
6759
6760 flush_workqueue(priv->workqueue);
6761 free_irq(priv->pci_dev->irq, priv);
6762 pci_disable_msi(priv->pci_dev);
6763 pci_save_state(priv->pci_dev);
6764 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006765
Zhu Yib481de92007-09-25 17:54:57 -07006766 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006767}
6768
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006769static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07006770 struct ieee80211_tx_control *ctl)
6771{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006772 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006773
6774 IWL_DEBUG_MAC80211("enter\n");
6775
6776 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6777 IWL_DEBUG_MAC80211("leave - monitor\n");
6778 return -1;
6779 }
6780
6781 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
Johannes Berg8318d782008-01-24 19:38:38 +01006782 ctl->tx_rate->bitrate);
Zhu Yib481de92007-09-25 17:54:57 -07006783
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006784 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07006785 dev_kfree_skb_any(skb);
6786
6787 IWL_DEBUG_MAC80211("leave\n");
6788 return 0;
6789}
6790
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006791static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006792 struct ieee80211_if_init_conf *conf)
6793{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006794 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006795 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006796 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006797
Johannes Berg32bfd352007-12-19 01:31:26 +01006798 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006799
Johannes Berg32bfd352007-12-19 01:31:26 +01006800 if (priv->vif) {
6801 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02006802 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07006803 }
6804
6805 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01006806 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07006807
6808 spin_unlock_irqrestore(&priv->lock, flags);
6809
6810 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02006811
6812 if (conf->mac_addr) {
6813 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6814 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6815 }
6816
Zhu Yi5a669262008-01-14 17:46:18 -08006817 if (iwl3945_is_ready(priv))
6818 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006819
Zhu Yib481de92007-09-25 17:54:57 -07006820 mutex_unlock(&priv->mutex);
6821
Zhu Yi5a669262008-01-14 17:46:18 -08006822 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006823 return 0;
6824}
6825
6826/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006827 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07006828 *
6829 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6830 * be set inappropriately and the driver currently sets the hardware up to
6831 * use it whenever needed.
6832 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006833static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07006834{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006835 struct iwl3945_priv *priv = hw->priv;
6836 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07006837 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08006838 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07006839
6840 mutex_lock(&priv->mutex);
Johannes Berg8318d782008-01-24 19:38:38 +01006841 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006842
Zhu Yi12342c42007-12-20 11:27:32 +08006843 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6844
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006845 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006846 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006847 ret = -EIO;
6848 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006849 }
6850
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006851 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07006852 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08006853 IWL_DEBUG_MAC80211("leave - scanning\n");
6854 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006855 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08006856 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07006857 }
6858
6859 spin_lock_irqsave(&priv->lock, flags);
6860
Johannes Berg8318d782008-01-24 19:38:38 +01006861 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6862 conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006863 if (!is_channel_valid(ch_info)) {
6864 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
Johannes Berg8318d782008-01-24 19:38:38 +01006865 conf->channel->hw_value, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006866 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6867 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006868 ret = -EINVAL;
6869 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006870 }
6871
Johannes Berg8318d782008-01-24 19:38:38 +01006872 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006873
Johannes Berg8318d782008-01-24 19:38:38 +01006874 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006875
6876 /* The list of supported rates and rate mask can be different
6877 * for each phymode; since the phymode may have changed, reset
6878 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006879 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006880
6881 spin_unlock_irqrestore(&priv->lock, flags);
6882
6883#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6884 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006885 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006886 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006887 }
6888#endif
6889
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006890 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07006891
6892 if (!conf->radio_enabled) {
6893 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006894 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006895 }
6896
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006897 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006898 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006899 ret = -EIO;
6900 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006901 }
6902
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006903 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006904
6905 if (memcmp(&priv->active_rxon,
6906 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006907 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006908 else
6909 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6910
6911 IWL_DEBUG_MAC80211("leave\n");
6912
Zhu Yi76bb77e2007-11-22 10:53:22 +08006913out:
Zhu Yia0646472007-12-20 14:10:01 +08006914 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006915 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006916 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006917}
6918
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006919static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006920{
6921 int rc = 0;
6922
Maarten Lankhorstd986bcd2008-01-23 10:15:16 -08006923 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
Zhu Yib481de92007-09-25 17:54:57 -07006924 return;
6925
6926 /* The following should be done only at AP bring up */
6927 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6928
6929 /* RXON - unassoc (to set timing command) */
6930 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006931 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006932
6933 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006934 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6935 iwl3945_setup_rxon_timing(priv);
6936 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006937 sizeof(priv->rxon_timing), &priv->rxon_timing);
6938 if (rc)
6939 IWL_WARNING("REPLY_RXON_TIMING failed - "
6940 "Attempting to continue.\n");
6941
6942 /* FIXME: what should be the assoc_id for AP? */
6943 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6944 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6945 priv->staging_rxon.flags |=
6946 RXON_FLG_SHORT_PREAMBLE_MSK;
6947 else
6948 priv->staging_rxon.flags &=
6949 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6950
6951 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6952 if (priv->assoc_capability &
6953 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6954 priv->staging_rxon.flags |=
6955 RXON_FLG_SHORT_SLOT_MSK;
6956 else
6957 priv->staging_rxon.flags &=
6958 ~RXON_FLG_SHORT_SLOT_MSK;
6959
6960 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6961 priv->staging_rxon.flags &=
6962 ~RXON_FLG_SHORT_SLOT_MSK;
6963 }
6964 /* restore RXON assoc */
6965 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006966 iwl3945_commit_rxon(priv);
6967 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08006968 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006969 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006970
6971 /* FIXME - we need to add code here to detect a totally new
6972 * configuration, reset the AP, unassoc, rxon timing, assoc,
6973 * clear sta table, add BCAST sta... */
6974}
6975
Johannes Berg32bfd352007-12-19 01:31:26 +01006976static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6977 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07006978 struct ieee80211_if_conf *conf)
6979{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006980 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07006981 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006982 unsigned long flags;
6983 int rc;
6984
6985 if (conf == NULL)
6986 return -EIO;
6987
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006988 if (priv->vif != vif) {
6989 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6990 mutex_unlock(&priv->mutex);
6991 return 0;
6992 }
6993
Johannes Berg4150c572007-09-17 01:29:23 -04006994 /* XXX: this MUST use conf->mac_addr */
6995
Zhu Yib481de92007-09-25 17:54:57 -07006996 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6997 (!conf->beacon || !conf->ssid_len)) {
6998 IWL_DEBUG_MAC80211
6999 ("Leaving in AP mode because HostAPD is not ready.\n");
7000 return 0;
7001 }
7002
Zhu Yi5a669262008-01-14 17:46:18 -08007003 if (!iwl3945_is_alive(priv))
7004 return -EAGAIN;
7005
Zhu Yib481de92007-09-25 17:54:57 -07007006 mutex_lock(&priv->mutex);
7007
Zhu Yib481de92007-09-25 17:54:57 -07007008 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07007009 IWL_DEBUG_MAC80211("bssid: %s\n",
7010 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007011
Johannes Berg4150c572007-09-17 01:29:23 -04007012/*
7013 * very dubious code was here; the probe filtering flag is never set:
7014 *
Zhu Yib481de92007-09-25 17:54:57 -07007015 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7016 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04007017 */
Zhu Yib481de92007-09-25 17:54:57 -07007018
7019 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7020 if (!conf->bssid) {
7021 conf->bssid = priv->mac_addr;
7022 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07007023 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7024 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07007025 }
7026 if (priv->ibss_beacon)
7027 dev_kfree_skb(priv->ibss_beacon);
7028
7029 priv->ibss_beacon = conf->beacon;
7030 }
7031
Mohamed Abbasfde35712007-11-29 11:10:15 +08007032 if (iwl3945_is_rfkill(priv))
7033 goto done;
7034
Zhu Yib481de92007-09-25 17:54:57 -07007035 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7036 !is_multicast_ether_addr(conf->bssid)) {
7037 /* If there is currently a HW scan going on in the background
7038 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007039 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07007040 IWL_WARNING("Aborted scan still in progress "
7041 "after 100ms\n");
7042 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7043 mutex_unlock(&priv->mutex);
7044 return -EAGAIN;
7045 }
7046 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7047
7048 /* TODO: Audit driver for usage of these members and see
7049 * if mac80211 deprecates them (priv->bssid looks like it
7050 * shouldn't be there, but I haven't scanned the IBSS code
7051 * to verify) - jpk */
7052 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7053
7054 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007055 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007056 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007057 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007058 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007059 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08007060 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007061 }
7062
7063 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007064 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07007065 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007066 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007067 }
7068
Mohamed Abbasfde35712007-11-29 11:10:15 +08007069 done:
Zhu Yib481de92007-09-25 17:54:57 -07007070 spin_lock_irqsave(&priv->lock, flags);
7071 if (!conf->ssid_len)
7072 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7073 else
7074 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7075
7076 priv->essid_len = conf->ssid_len;
7077 spin_unlock_irqrestore(&priv->lock, flags);
7078
7079 IWL_DEBUG_MAC80211("leave\n");
7080 mutex_unlock(&priv->mutex);
7081
7082 return 0;
7083}
7084
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007085static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04007086 unsigned int changed_flags,
7087 unsigned int *total_flags,
7088 int mc_count, struct dev_addr_list *mc_list)
7089{
7090 /*
7091 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007092 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007093 */
7094 *total_flags = 0;
7095}
7096
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007097static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007098 struct ieee80211_if_init_conf *conf)
7099{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007100 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007101
7102 IWL_DEBUG_MAC80211("enter\n");
7103
7104 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007105
Mohamed Abbasfde35712007-11-29 11:10:15 +08007106 if (iwl3945_is_ready_rf(priv)) {
7107 iwl3945_scan_cancel_timeout(priv, 100);
7108 cancel_delayed_work(&priv->post_associate);
7109 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7110 iwl3945_commit_rxon(priv);
7111 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007112 if (priv->vif == conf->vif) {
7113 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007114 memset(priv->bssid, 0, ETH_ALEN);
7115 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7116 priv->essid_len = 0;
7117 }
7118 mutex_unlock(&priv->mutex);
7119
7120 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007121}
7122
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007123static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007124{
7125 int rc = 0;
7126 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007127 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007128
7129 IWL_DEBUG_MAC80211("enter\n");
7130
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007131 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007132 spin_lock_irqsave(&priv->lock, flags);
7133
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007134 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007135 rc = -EIO;
7136 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7137 goto out_unlock;
7138 }
7139
7140 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7141 rc = -EIO;
7142 IWL_ERROR("ERROR: APs don't scan\n");
7143 goto out_unlock;
7144 }
7145
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007146 /* we don't schedule scan within next_scan_jiffies period */
7147 if (priv->next_scan_jiffies &&
7148 time_after(priv->next_scan_jiffies, jiffies)) {
7149 rc = -EAGAIN;
7150 goto out_unlock;
7151 }
Zhu Yib481de92007-09-25 17:54:57 -07007152 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007153 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7154 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007155 rc = -EAGAIN;
7156 goto out_unlock;
7157 }
7158 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007159 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007160 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007161
7162 priv->one_direct_scan = 1;
7163 priv->direct_ssid_len = (u8)
7164 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7165 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007166 } else
7167 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007168
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007169 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007170
7171 IWL_DEBUG_MAC80211("leave\n");
7172
7173out_unlock:
7174 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007175 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007176
7177 return rc;
7178}
7179
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007180static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007181 const u8 *local_addr, const u8 *addr,
7182 struct ieee80211_key_conf *key)
7183{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007184 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007185 int rc = 0;
7186 u8 sta_id;
7187
7188 IWL_DEBUG_MAC80211("enter\n");
7189
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007190 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007191 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7192 return -EOPNOTSUPP;
7193 }
7194
7195 if (is_zero_ether_addr(addr))
7196 /* only support pairwise keys */
7197 return -EOPNOTSUPP;
7198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007199 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007200 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007201 DECLARE_MAC_BUF(mac);
7202
7203 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7204 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007205 return -EINVAL;
7206 }
7207
7208 mutex_lock(&priv->mutex);
7209
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007210 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007211
Zhu Yib481de92007-09-25 17:54:57 -07007212 switch (cmd) {
7213 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007214 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007215 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007216 iwl3945_set_rxon_hwcrypto(priv, 1);
7217 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007218 key->hw_key_idx = sta_id;
7219 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7220 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7221 }
7222 break;
7223 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007224 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007225 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007226 iwl3945_set_rxon_hwcrypto(priv, 0);
7227 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007228 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7229 }
7230 break;
7231 default:
7232 rc = -EINVAL;
7233 }
7234
7235 IWL_DEBUG_MAC80211("leave\n");
7236 mutex_unlock(&priv->mutex);
7237
7238 return rc;
7239}
7240
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007241static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007242 const struct ieee80211_tx_queue_params *params)
7243{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007244 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007245 unsigned long flags;
7246 int q;
Zhu Yib481de92007-09-25 17:54:57 -07007247
7248 IWL_DEBUG_MAC80211("enter\n");
7249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007250 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007251 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7252 return -EIO;
7253 }
7254
7255 if (queue >= AC_NUM) {
7256 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7257 return 0;
7258 }
7259
Zhu Yib481de92007-09-25 17:54:57 -07007260 if (!priv->qos_data.qos_enable) {
7261 priv->qos_data.qos_active = 0;
7262 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7263 return 0;
7264 }
7265 q = AC_NUM - 1 - queue;
7266
7267 spin_lock_irqsave(&priv->lock, flags);
7268
7269 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7270 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7271 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7272 priv->qos_data.def_qos_parm.ac[q].edca_txop =
Johannes Berg3330d7b2008-02-10 16:49:38 +01007273 cpu_to_le16((params->txop * 32));
Zhu Yib481de92007-09-25 17:54:57 -07007274
7275 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7276 priv->qos_data.qos_active = 1;
7277
7278 spin_unlock_irqrestore(&priv->lock, flags);
7279
7280 mutex_lock(&priv->mutex);
7281 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007282 iwl3945_activate_qos(priv, 1);
7283 else if (priv->assoc_id && iwl3945_is_associated(priv))
7284 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007285
7286 mutex_unlock(&priv->mutex);
7287
Zhu Yib481de92007-09-25 17:54:57 -07007288 IWL_DEBUG_MAC80211("leave\n");
7289 return 0;
7290}
7291
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007292static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007293 struct ieee80211_tx_queue_stats *stats)
7294{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007295 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007296 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007297 struct iwl3945_tx_queue *txq;
7298 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007299 unsigned long flags;
7300
7301 IWL_DEBUG_MAC80211("enter\n");
7302
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007303 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007304 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7305 return -EIO;
7306 }
7307
7308 spin_lock_irqsave(&priv->lock, flags);
7309
7310 for (i = 0; i < AC_NUM; i++) {
7311 txq = &priv->txq[i];
7312 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007313 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007314
7315 stats->data[i].len = q->n_window - avail;
7316 stats->data[i].limit = q->n_window - q->high_mark;
7317 stats->data[i].count = q->n_window;
7318
7319 }
7320 spin_unlock_irqrestore(&priv->lock, flags);
7321
7322 IWL_DEBUG_MAC80211("leave\n");
7323
7324 return 0;
7325}
7326
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007327static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007328 struct ieee80211_low_level_stats *stats)
7329{
7330 IWL_DEBUG_MAC80211("enter\n");
7331 IWL_DEBUG_MAC80211("leave\n");
7332
7333 return 0;
7334}
7335
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007336static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007337{
7338 IWL_DEBUG_MAC80211("enter\n");
7339 IWL_DEBUG_MAC80211("leave\n");
7340
7341 return 0;
7342}
7343
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007344static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007345{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007346 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007347 unsigned long flags;
7348
7349 mutex_lock(&priv->mutex);
7350 IWL_DEBUG_MAC80211("enter\n");
7351
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007352 iwl3945_reset_qos(priv);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08007353
Zhu Yib481de92007-09-25 17:54:57 -07007354 cancel_delayed_work(&priv->post_associate);
7355
7356 spin_lock_irqsave(&priv->lock, flags);
7357 priv->assoc_id = 0;
7358 priv->assoc_capability = 0;
7359 priv->call_post_assoc_from_beacon = 0;
7360
7361 /* new association get rid of ibss beacon skb */
7362 if (priv->ibss_beacon)
7363 dev_kfree_skb(priv->ibss_beacon);
7364
7365 priv->ibss_beacon = NULL;
7366
7367 priv->beacon_int = priv->hw->conf.beacon_int;
7368 priv->timestamp1 = 0;
7369 priv->timestamp0 = 0;
7370 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7371 priv->beacon_int = 0;
7372
7373 spin_unlock_irqrestore(&priv->lock, flags);
7374
Mohamed Abbasfde35712007-11-29 11:10:15 +08007375 if (!iwl3945_is_ready_rf(priv)) {
7376 IWL_DEBUG_MAC80211("leave - not ready\n");
7377 mutex_unlock(&priv->mutex);
7378 return;
7379 }
7380
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007381 /* we are restarting association process
7382 * clear RXON_FILTER_ASSOC_MSK bit
7383 */
7384 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007385 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007386 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007387 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007388 }
7389
Zhu Yib481de92007-09-25 17:54:57 -07007390 /* Per mac80211.h: This is only used in IBSS mode... */
7391 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007392
Zhu Yib481de92007-09-25 17:54:57 -07007393 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7394 mutex_unlock(&priv->mutex);
7395 return;
7396 }
7397
Zhu Yib481de92007-09-25 17:54:57 -07007398 priv->only_active_channel = 0;
7399
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007400 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007401
7402 mutex_unlock(&priv->mutex);
7403
7404 IWL_DEBUG_MAC80211("leave\n");
7405
7406}
7407
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007408static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007409 struct ieee80211_tx_control *control)
7410{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007411 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007412 unsigned long flags;
7413
7414 mutex_lock(&priv->mutex);
7415 IWL_DEBUG_MAC80211("enter\n");
7416
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007417 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007418 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7419 mutex_unlock(&priv->mutex);
7420 return -EIO;
7421 }
7422
7423 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7424 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7425 mutex_unlock(&priv->mutex);
7426 return -EIO;
7427 }
7428
7429 spin_lock_irqsave(&priv->lock, flags);
7430
7431 if (priv->ibss_beacon)
7432 dev_kfree_skb(priv->ibss_beacon);
7433
7434 priv->ibss_beacon = skb;
7435
7436 priv->assoc_id = 0;
7437
7438 IWL_DEBUG_MAC80211("leave\n");
7439 spin_unlock_irqrestore(&priv->lock, flags);
7440
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007441 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007442
7443 queue_work(priv->workqueue, &priv->post_associate.work);
7444
7445 mutex_unlock(&priv->mutex);
7446
7447 return 0;
7448}
7449
7450/*****************************************************************************
7451 *
7452 * sysfs attributes
7453 *
7454 *****************************************************************************/
7455
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007456#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007457
7458/*
7459 * The following adds a new attribute to the sysfs representation
7460 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7461 * used for controlling the debug level.
7462 *
7463 * See the level definitions in iwl for details.
7464 */
7465
7466static ssize_t show_debug_level(struct device_driver *d, char *buf)
7467{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007468 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007469}
7470static ssize_t store_debug_level(struct device_driver *d,
7471 const char *buf, size_t count)
7472{
7473 char *p = (char *)buf;
7474 u32 val;
7475
7476 val = simple_strtoul(p, &p, 0);
7477 if (p == buf)
7478 printk(KERN_INFO DRV_NAME
7479 ": %s is not in hex or decimal form.\n", buf);
7480 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007481 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007482
7483 return strnlen(buf, count);
7484}
7485
7486static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7487 show_debug_level, store_debug_level);
7488
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007489#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007490
7491static ssize_t show_rf_kill(struct device *d,
7492 struct device_attribute *attr, char *buf)
7493{
7494 /*
7495 * 0 - RF kill not enabled
7496 * 1 - SW based RF kill active (sysfs)
7497 * 2 - HW based RF kill active
7498 * 3 - Both HW and SW based RF kill active
7499 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007500 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007501 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7502 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7503
7504 return sprintf(buf, "%i\n", val);
7505}
7506
7507static ssize_t store_rf_kill(struct device *d,
7508 struct device_attribute *attr,
7509 const char *buf, size_t count)
7510{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007511 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007512
7513 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007514 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007515 mutex_unlock(&priv->mutex);
7516
7517 return count;
7518}
7519
7520static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7521
7522static ssize_t show_temperature(struct device *d,
7523 struct device_attribute *attr, char *buf)
7524{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007525 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007526
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007527 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007528 return -EAGAIN;
7529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007530 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007531}
7532
7533static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7534
7535static ssize_t show_rs_window(struct device *d,
7536 struct device_attribute *attr,
7537 char *buf)
7538{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007539 struct iwl3945_priv *priv = d->driver_data;
7540 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007541}
7542static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7543
7544static ssize_t show_tx_power(struct device *d,
7545 struct device_attribute *attr, char *buf)
7546{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007547 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007548 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7549}
7550
7551static ssize_t store_tx_power(struct device *d,
7552 struct device_attribute *attr,
7553 const char *buf, size_t count)
7554{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007555 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007556 char *p = (char *)buf;
7557 u32 val;
7558
7559 val = simple_strtoul(p, &p, 10);
7560 if (p == buf)
7561 printk(KERN_INFO DRV_NAME
7562 ": %s is not in decimal form.\n", buf);
7563 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007564 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007565
7566 return count;
7567}
7568
7569static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7570
7571static ssize_t show_flags(struct device *d,
7572 struct device_attribute *attr, char *buf)
7573{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007574 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007575
7576 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7577}
7578
7579static ssize_t store_flags(struct device *d,
7580 struct device_attribute *attr,
7581 const char *buf, size_t count)
7582{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007583 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007584 u32 flags = simple_strtoul(buf, NULL, 0);
7585
7586 mutex_lock(&priv->mutex);
7587 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7588 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007589 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007590 IWL_WARNING("Could not cancel scan.\n");
7591 else {
7592 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7593 flags);
7594 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007595 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007596 }
7597 }
7598 mutex_unlock(&priv->mutex);
7599
7600 return count;
7601}
7602
7603static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7604
7605static ssize_t show_filter_flags(struct device *d,
7606 struct device_attribute *attr, char *buf)
7607{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007608 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007609
7610 return sprintf(buf, "0x%04X\n",
7611 le32_to_cpu(priv->active_rxon.filter_flags));
7612}
7613
7614static ssize_t store_filter_flags(struct device *d,
7615 struct device_attribute *attr,
7616 const char *buf, size_t count)
7617{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007618 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007619 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7620
7621 mutex_lock(&priv->mutex);
7622 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7623 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007624 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007625 IWL_WARNING("Could not cancel scan.\n");
7626 else {
7627 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7628 "0x%04X\n", filter_flags);
7629 priv->staging_rxon.filter_flags =
7630 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007631 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007632 }
7633 }
7634 mutex_unlock(&priv->mutex);
7635
7636 return count;
7637}
7638
7639static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7640 store_filter_flags);
7641
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007642#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007643
7644static ssize_t show_measurement(struct device *d,
7645 struct device_attribute *attr, char *buf)
7646{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007647 struct iwl3945_priv *priv = dev_get_drvdata(d);
7648 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007649 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7650 u8 *data = (u8 *) & measure_report;
7651 unsigned long flags;
7652
7653 spin_lock_irqsave(&priv->lock, flags);
7654 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7655 spin_unlock_irqrestore(&priv->lock, flags);
7656 return 0;
7657 }
7658 memcpy(&measure_report, &priv->measure_report, size);
7659 priv->measurement_status = 0;
7660 spin_unlock_irqrestore(&priv->lock, flags);
7661
7662 while (size && (PAGE_SIZE - len)) {
7663 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7664 PAGE_SIZE - len, 1);
7665 len = strlen(buf);
7666 if (PAGE_SIZE - len)
7667 buf[len++] = '\n';
7668
7669 ofs += 16;
7670 size -= min(size, 16U);
7671 }
7672
7673 return len;
7674}
7675
7676static ssize_t store_measurement(struct device *d,
7677 struct device_attribute *attr,
7678 const char *buf, size_t count)
7679{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007680 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007681 struct ieee80211_measurement_params params = {
7682 .channel = le16_to_cpu(priv->active_rxon.channel),
7683 .start_time = cpu_to_le64(priv->last_tsf),
7684 .duration = cpu_to_le16(1),
7685 };
7686 u8 type = IWL_MEASURE_BASIC;
7687 u8 buffer[32];
7688 u8 channel;
7689
7690 if (count) {
7691 char *p = buffer;
7692 strncpy(buffer, buf, min(sizeof(buffer), count));
7693 channel = simple_strtoul(p, NULL, 0);
7694 if (channel)
7695 params.channel = channel;
7696
7697 p = buffer;
7698 while (*p && *p != ' ')
7699 p++;
7700 if (*p)
7701 type = simple_strtoul(p + 1, NULL, 0);
7702 }
7703
7704 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7705 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007706 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007707
7708 return count;
7709}
7710
7711static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7712 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007713#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007714
Zhu Yib481de92007-09-25 17:54:57 -07007715static ssize_t store_retry_rate(struct device *d,
7716 struct device_attribute *attr,
7717 const char *buf, size_t count)
7718{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007719 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007720
7721 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7722 if (priv->retry_rate <= 0)
7723 priv->retry_rate = 1;
7724
7725 return count;
7726}
7727
7728static ssize_t show_retry_rate(struct device *d,
7729 struct device_attribute *attr, char *buf)
7730{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007731 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007732 return sprintf(buf, "%d", priv->retry_rate);
7733}
7734
7735static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7736 store_retry_rate);
7737
7738static ssize_t store_power_level(struct device *d,
7739 struct device_attribute *attr,
7740 const char *buf, size_t count)
7741{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007742 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007743 int rc;
7744 int mode;
7745
7746 mode = simple_strtoul(buf, NULL, 0);
7747 mutex_lock(&priv->mutex);
7748
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007749 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007750 rc = -EAGAIN;
7751 goto out;
7752 }
7753
7754 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7755 mode = IWL_POWER_AC;
7756 else
7757 mode |= IWL_POWER_ENABLED;
7758
7759 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007760 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07007761 if (rc) {
7762 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7763 goto out;
7764 }
7765 priv->power_mode = mode;
7766 }
7767
7768 rc = count;
7769
7770 out:
7771 mutex_unlock(&priv->mutex);
7772 return rc;
7773}
7774
7775#define MAX_WX_STRING 80
7776
7777/* Values are in microsecond */
7778static const s32 timeout_duration[] = {
7779 350000,
7780 250000,
7781 75000,
7782 37000,
7783 25000,
7784};
7785static const s32 period_duration[] = {
7786 400000,
7787 700000,
7788 1000000,
7789 1000000,
7790 1000000
7791};
7792
7793static ssize_t show_power_level(struct device *d,
7794 struct device_attribute *attr, char *buf)
7795{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007796 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007797 int level = IWL_POWER_LEVEL(priv->power_mode);
7798 char *p = buf;
7799
7800 p += sprintf(p, "%d ", level);
7801 switch (level) {
7802 case IWL_POWER_MODE_CAM:
7803 case IWL_POWER_AC:
7804 p += sprintf(p, "(AC)");
7805 break;
7806 case IWL_POWER_BATTERY:
7807 p += sprintf(p, "(BATTERY)");
7808 break;
7809 default:
7810 p += sprintf(p,
7811 "(Timeout %dms, Period %dms)",
7812 timeout_duration[level - 1] / 1000,
7813 period_duration[level - 1] / 1000);
7814 }
7815
7816 if (!(priv->power_mode & IWL_POWER_ENABLED))
7817 p += sprintf(p, " OFF\n");
7818 else
7819 p += sprintf(p, " \n");
7820
7821 return (p - buf + 1);
7822
7823}
7824
7825static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7826 store_power_level);
7827
7828static ssize_t show_channels(struct device *d,
7829 struct device_attribute *attr, char *buf)
7830{
Johannes Berg8318d782008-01-24 19:38:38 +01007831 /* all this shit doesn't belong into sysfs anyway */
7832 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007833}
7834
7835static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7836
7837static ssize_t show_statistics(struct device *d,
7838 struct device_attribute *attr, char *buf)
7839{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007840 struct iwl3945_priv *priv = dev_get_drvdata(d);
7841 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07007842 u32 len = 0, ofs = 0;
7843 u8 *data = (u8 *) & priv->statistics;
7844 int rc = 0;
7845
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007846 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007847 return -EAGAIN;
7848
7849 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007850 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007851 mutex_unlock(&priv->mutex);
7852
7853 if (rc) {
7854 len = sprintf(buf,
7855 "Error sending statistics request: 0x%08X\n", rc);
7856 return len;
7857 }
7858
7859 while (size && (PAGE_SIZE - len)) {
7860 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7861 PAGE_SIZE - len, 1);
7862 len = strlen(buf);
7863 if (PAGE_SIZE - len)
7864 buf[len++] = '\n';
7865
7866 ofs += 16;
7867 size -= min(size, 16U);
7868 }
7869
7870 return len;
7871}
7872
7873static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7874
7875static ssize_t show_antenna(struct device *d,
7876 struct device_attribute *attr, char *buf)
7877{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007878 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007879
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007880 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007881 return -EAGAIN;
7882
7883 return sprintf(buf, "%d\n", priv->antenna);
7884}
7885
7886static ssize_t store_antenna(struct device *d,
7887 struct device_attribute *attr,
7888 const char *buf, size_t count)
7889{
7890 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007891 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007892
7893 if (count == 0)
7894 return 0;
7895
7896 if (sscanf(buf, "%1i", &ant) != 1) {
7897 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7898 return count;
7899 }
7900
7901 if ((ant >= 0) && (ant <= 2)) {
7902 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007903 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07007904 } else
7905 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7906
7907
7908 return count;
7909}
7910
7911static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7912
7913static ssize_t show_status(struct device *d,
7914 struct device_attribute *attr, char *buf)
7915{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007916 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7917 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007918 return -EAGAIN;
7919 return sprintf(buf, "0x%08x\n", (int)priv->status);
7920}
7921
7922static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7923
7924static ssize_t dump_error_log(struct device *d,
7925 struct device_attribute *attr,
7926 const char *buf, size_t count)
7927{
7928 char *p = (char *)buf;
7929
7930 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007931 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007932
7933 return strnlen(buf, count);
7934}
7935
7936static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7937
7938static ssize_t dump_event_log(struct device *d,
7939 struct device_attribute *attr,
7940 const char *buf, size_t count)
7941{
7942 char *p = (char *)buf;
7943
7944 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007945 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007946
7947 return strnlen(buf, count);
7948}
7949
7950static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7951
7952/*****************************************************************************
7953 *
7954 * driver setup and teardown
7955 *
7956 *****************************************************************************/
7957
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007958static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007959{
7960 priv->workqueue = create_workqueue(DRV_NAME);
7961
7962 init_waitqueue_head(&priv->wait_command_queue);
7963
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007964 INIT_WORK(&priv->up, iwl3945_bg_up);
7965 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7966 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7967 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7968 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7969 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7970 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7971 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7972 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7973 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7974 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7975 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07007976
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007977 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007978
7979 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007980 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07007981}
7982
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007983static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007984{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007985 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007986
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09007987 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07007988 cancel_delayed_work(&priv->scan_check);
7989 cancel_delayed_work(&priv->alive_start);
7990 cancel_delayed_work(&priv->post_associate);
7991 cancel_work_sync(&priv->beacon_update);
7992}
7993
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007994static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07007995 &dev_attr_antenna.attr,
7996 &dev_attr_channels.attr,
7997 &dev_attr_dump_errors.attr,
7998 &dev_attr_dump_events.attr,
7999 &dev_attr_flags.attr,
8000 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008001#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07008002 &dev_attr_measurement.attr,
8003#endif
8004 &dev_attr_power_level.attr,
Zhu Yib481de92007-09-25 17:54:57 -07008005 &dev_attr_retry_rate.attr,
8006 &dev_attr_rf_kill.attr,
8007 &dev_attr_rs_window.attr,
8008 &dev_attr_statistics.attr,
8009 &dev_attr_status.attr,
8010 &dev_attr_temperature.attr,
Zhu Yib481de92007-09-25 17:54:57 -07008011 &dev_attr_tx_power.attr,
8012
8013 NULL
8014};
8015
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008016static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07008017 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008018 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07008019};
8020
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008021static struct ieee80211_ops iwl3945_hw_ops = {
8022 .tx = iwl3945_mac_tx,
8023 .start = iwl3945_mac_start,
8024 .stop = iwl3945_mac_stop,
8025 .add_interface = iwl3945_mac_add_interface,
8026 .remove_interface = iwl3945_mac_remove_interface,
8027 .config = iwl3945_mac_config,
8028 .config_interface = iwl3945_mac_config_interface,
8029 .configure_filter = iwl3945_configure_filter,
8030 .set_key = iwl3945_mac_set_key,
8031 .get_stats = iwl3945_mac_get_stats,
8032 .get_tx_stats = iwl3945_mac_get_tx_stats,
8033 .conf_tx = iwl3945_mac_conf_tx,
8034 .get_tsf = iwl3945_mac_get_tsf,
8035 .reset_tsf = iwl3945_mac_reset_tsf,
8036 .beacon_update = iwl3945_mac_beacon_update,
8037 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07008038};
8039
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008040static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07008041{
8042 int err = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008043 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07008044 struct ieee80211_hw *hw;
Tomas Winkler82b9a122008-03-04 18:09:30 -08008045 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07008046 int i;
Zhu Yi5a669262008-01-14 17:46:18 -08008047 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07008048
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008049 /* Disabling hardware scan means that mac80211 will perform scans
8050 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008051 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07008052 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008053 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07008054 }
8055
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008056 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8057 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07008058 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8059 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8060 err = -EINVAL;
8061 goto out;
8062 }
8063
8064 /* mac80211 allocates memory for this device instance, including
8065 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008066 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07008067 if (hw == NULL) {
8068 IWL_ERROR("Can not allocate network device\n");
8069 err = -ENOMEM;
8070 goto out;
8071 }
8072 SET_IEEE80211_DEV(hw, &pdev->dev);
8073
Johannes Bergf51359a2007-10-28 14:53:36 +01008074 hw->rate_control_algorithm = "iwl-3945-rs";
8075
Zhu Yib481de92007-09-25 17:54:57 -07008076 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8077 priv = hw->priv;
8078 priv->hw = hw;
8079
8080 priv->pci_dev = pdev;
Tomas Winkler82b9a122008-03-04 18:09:30 -08008081 priv->cfg = cfg;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008082
8083 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008084 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008085#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008086 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008087 atomic_set(&priv->restrict_refcnt, 0);
8088#endif
8089 priv->retry_rate = 1;
8090
8091 priv->ibss_beacon = NULL;
8092
8093 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8094 * the range of signal quality values that we'll provide.
8095 * Negative values for level/noise indicate that we'll provide dBm.
8096 * For WE, at least, non-0 values here *enable* display of values
8097 * in app (iwconfig). */
8098 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8099 hw->max_noise = -20; /* noise level, negative indicates dBm */
8100 hw->max_signal = 100; /* link quality indication (%) */
8101
8102 /* Tell mac80211 our Tx characteristics */
8103 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8104
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008105 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008106 hw->queues = 4;
8107
8108 spin_lock_init(&priv->lock);
8109 spin_lock_init(&priv->power_data.lock);
8110 spin_lock_init(&priv->sta_lock);
8111 spin_lock_init(&priv->hcmd_lock);
8112
8113 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8114 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8115
8116 INIT_LIST_HEAD(&priv->free_frames);
8117
8118 mutex_init(&priv->mutex);
8119 if (pci_enable_device(pdev)) {
8120 err = -ENODEV;
8121 goto out_ieee80211_free_hw;
8122 }
8123
8124 pci_set_master(pdev);
8125
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008126 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008127 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008128
8129 priv->data_retry_limit = -1;
8130 priv->ieee_channels = NULL;
8131 priv->ieee_rates = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01008132 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07008133
8134 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8135 if (!err)
8136 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8137 if (err) {
8138 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8139 goto out_pci_disable_device;
8140 }
8141
8142 pci_set_drvdata(pdev, priv);
8143 err = pci_request_regions(pdev, DRV_NAME);
8144 if (err)
8145 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008146
Zhu Yib481de92007-09-25 17:54:57 -07008147 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8148 * PCI Tx retries from interfering with C3 CPU state */
8149 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008150
Zhu Yib481de92007-09-25 17:54:57 -07008151 priv->hw_base = pci_iomap(pdev, 0, 0);
8152 if (!priv->hw_base) {
8153 err = -ENODEV;
8154 goto out_pci_release_regions;
8155 }
8156
8157 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8158 (unsigned long long) pci_resource_len(pdev, 0));
8159 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8160
8161 /* Initialize module parameter values here */
8162
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008163 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008164 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008165 set_bit(STATUS_RF_KILL_SW, &priv->status);
8166 IWL_DEBUG_INFO("Radio disabled.\n");
8167 }
8168
8169 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8170
Zhu Yib481de92007-09-25 17:54:57 -07008171 printk(KERN_INFO DRV_NAME
Tomas Winkler82b9a122008-03-04 18:09:30 -08008172 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
Zhu Yib481de92007-09-25 17:54:57 -07008173
8174 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008175 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008176 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008177 goto out_iounmap;
8178 }
8179
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008180 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008181 priv->qos_data.qos_enable = 1;
8182
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008183 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008184
8185 priv->qos_data.qos_active = 0;
8186 priv->qos_data.qos_cap.val = 0;
Zhu Yib481de92007-09-25 17:54:57 -07008187
Johannes Berg8318d782008-01-24 19:38:38 +01008188 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008189 iwl3945_setup_deferred_work(priv);
8190 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008191
8192 priv->rates_mask = IWL_RATES_MASK;
8193 /* If power management is turned on, default to AC mode */
8194 priv->power_mode = IWL_POWER_AC;
8195 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8196
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008197 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008199 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008200 if (err) {
8201 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008202 goto out_release_irq;
8203 }
8204
Zhu Yi5a669262008-01-14 17:46:18 -08008205 /* nic init */
8206 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8207 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8208
8209 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8210 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8211 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8212 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8213 if (err < 0) {
8214 IWL_DEBUG_INFO("Failed to init the card\n");
8215 goto out_remove_sysfs;
8216 }
8217 /* Read the EEPROM */
8218 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008219 if (err) {
Zhu Yi5a669262008-01-14 17:46:18 -08008220 IWL_ERROR("Unable to init EEPROM\n");
8221 goto out_remove_sysfs;
8222 }
8223 /* MAC Address location in EEPROM same for 3945/4965 */
8224 get_eeprom_mac(priv, priv->mac_addr);
8225 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8226 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8227
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008228 err = iwl3945_init_channel_map(priv);
8229 if (err) {
8230 IWL_ERROR("initializing regulatory failed: %d\n", err);
8231 goto out_remove_sysfs;
8232 }
8233
8234 err = iwl3945_init_geos(priv);
8235 if (err) {
8236 IWL_ERROR("initializing geos failed: %d\n", err);
8237 goto out_free_channel_map;
8238 }
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008239
Zhu Yi5a669262008-01-14 17:46:18 -08008240 iwl3945_rate_control_register(priv->hw);
8241 err = ieee80211_register_hw(priv->hw);
8242 if (err) {
8243 IWL_ERROR("Failed to register network device (error %d)\n", err);
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008244 goto out_free_geos;
Zhu Yib481de92007-09-25 17:54:57 -07008245 }
8246
Zhu Yi5a669262008-01-14 17:46:18 -08008247 priv->hw->conf.beacon_int = 100;
8248 priv->mac80211_registered = 1;
8249 pci_save_state(pdev);
8250 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008251
8252 return 0;
8253
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008254 out_free_geos:
8255 iwl3945_free_geos(priv);
8256 out_free_channel_map:
8257 iwl3945_free_channel_map(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08008258 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008259 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008260
8261 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008262 destroy_workqueue(priv->workqueue);
8263 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008264 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008265
8266 out_iounmap:
8267 pci_iounmap(pdev, priv->hw_base);
8268 out_pci_release_regions:
8269 pci_release_regions(pdev);
8270 out_pci_disable_device:
8271 pci_disable_device(pdev);
8272 pci_set_drvdata(pdev, NULL);
8273 out_ieee80211_free_hw:
8274 ieee80211_free_hw(priv->hw);
8275 out:
8276 return err;
8277}
8278
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008279static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008280{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008281 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008282 struct list_head *p, *q;
8283 int i;
8284
8285 if (!priv)
8286 return;
8287
8288 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8289
Zhu Yib481de92007-09-25 17:54:57 -07008290 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008291
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008292 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008293
8294 /* Free MAC hash list for ADHOC */
8295 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8296 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8297 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008298 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008299 }
8300 }
8301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008302 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008303
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008304 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008305
8306 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008307 iwl3945_rx_queue_free(priv, &priv->rxq);
8308 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008309
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008310 iwl3945_unset_hw_setting(priv);
8311 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008312
8313 if (priv->mac80211_registered) {
8314 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008315 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008316 }
8317
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008318 /*netif_stop_queue(dev); */
8319 flush_workqueue(priv->workqueue);
8320
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008321 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008322 * priv->workqueue... so we can't take down the workqueue
8323 * until now... */
8324 destroy_workqueue(priv->workqueue);
8325 priv->workqueue = NULL;
8326
Zhu Yib481de92007-09-25 17:54:57 -07008327 pci_iounmap(pdev, priv->hw_base);
8328 pci_release_regions(pdev);
8329 pci_disable_device(pdev);
8330 pci_set_drvdata(pdev, NULL);
8331
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008332 iwl3945_free_channel_map(priv);
8333 iwl3945_free_geos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008334
8335 if (priv->ibss_beacon)
8336 dev_kfree_skb(priv->ibss_beacon);
8337
8338 ieee80211_free_hw(priv->hw);
8339}
8340
8341#ifdef CONFIG_PM
8342
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008343static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008344{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008345 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008346
Zhu Yie655b9f2008-01-24 02:19:38 -08008347 if (priv->is_open) {
8348 set_bit(STATUS_IN_SUSPEND, &priv->status);
8349 iwl3945_mac_stop(priv->hw);
8350 priv->is_open = 1;
8351 }
Zhu Yib481de92007-09-25 17:54:57 -07008352
Zhu Yib481de92007-09-25 17:54:57 -07008353 pci_set_power_state(pdev, PCI_D3hot);
8354
Zhu Yib481de92007-09-25 17:54:57 -07008355 return 0;
8356}
8357
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008358static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008359{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008360 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008361
Zhu Yib481de92007-09-25 17:54:57 -07008362 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008363
Zhu Yie655b9f2008-01-24 02:19:38 -08008364 if (priv->is_open)
8365 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008366
Zhu Yie655b9f2008-01-24 02:19:38 -08008367 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008368 return 0;
8369}
8370
8371#endif /* CONFIG_PM */
8372
8373/*****************************************************************************
8374 *
8375 * driver and module entry point
8376 *
8377 *****************************************************************************/
8378
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008379static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008380 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008381 .id_table = iwl3945_hw_card_ids,
8382 .probe = iwl3945_pci_probe,
8383 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008384#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008385 .suspend = iwl3945_pci_suspend,
8386 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008387#endif
8388};
8389
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008390static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008391{
8392
8393 int ret;
8394 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8395 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008396 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008397 if (ret) {
8398 IWL_ERROR("Unable to initialize PCI module\n");
8399 return ret;
8400 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008401#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008402 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008403 if (ret) {
8404 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008405 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008406 return ret;
8407 }
8408#endif
8409
8410 return ret;
8411}
8412
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008413static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008414{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008415#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008416 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008417#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008418 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008419}
8420
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008421module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008422MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008423module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008424MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008425module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008426MODULE_PARM_DESC(hwcrypto,
8427 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008428module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008429MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008430module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008431MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008433module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008434MODULE_PARM_DESC(queues_num, "number of hw queues.");
8435
8436/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008437module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008438MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8439
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008440module_exit(iwl3945_exit);
8441module_init(iwl3945_init);