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Pete Popove3ad1c22005-03-01 06:33:16 +00001/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
Sergei Shtylyovce28f942008-04-23 22:43:55 +040026
Pete Popove3ad1c22005-03-01 06:33:16 +000027#include <linux/init.h>
28#include <linux/sched.h>
Yoichi Yuasa25b31cb2007-10-15 19:11:24 +090029
30#include <au1000.h>
Yoichi Yuasa25b31cb2007-10-15 19:11:24 +090031#include <prom.h>
Pete Popove3ad1c22005-03-01 06:33:16 +000032
33#ifdef CONFIG_MIPS_PB1200
34#include <asm/mach-pb1x00/pb1200.h>
35#endif
36
37#ifdef CONFIG_MIPS_DB1200
38#include <asm/mach-db1x00/db1200.h>
Pete Popove3ad1c22005-03-01 06:33:16 +000039#endif
40
41extern void _board_init_irq(void);
Yoichi Yuasa0d02f072006-11-01 18:40:15 +090042extern void (*board_init_irq)(void);
Pete Popove3ad1c22005-03-01 06:33:16 +000043
Ralf Baechle49a89ef2007-10-11 23:46:15 +010044void board_reset(void)
Pete Popove3ad1c22005-03-01 06:33:16 +000045{
46 bcsr->resets = 0;
Pete Popov64abf642005-09-14 16:17:59 +000047 bcsr->system = 0;
Pete Popove3ad1c22005-03-01 06:33:16 +000048}
49
50void __init board_setup(void)
51{
52 char *argptr = NULL;
Pete Popove3ad1c22005-03-01 06:33:16 +000053
54#if 0
Ralf Baechlef5cd9f12007-11-01 12:22:53 +000055 {
56 u32 pin_func;
57
Pete Popove3ad1c22005-03-01 06:33:16 +000058 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
59 * but it is board specific code, so put it here.
60 */
61 pin_func = au_readl(SYS_PINFUNC);
62 au_sync();
63 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
64 au_writel(pin_func, SYS_PINFUNC);
65
66 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
67 au_sync();
Ralf Baechlef5cd9f12007-11-01 12:22:53 +000068 }
Pete Popove3ad1c22005-03-01 06:33:16 +000069#endif
70
Pete Popov64abf642005-09-14 16:17:59 +000071#if defined(CONFIG_I2C_AU1550)
Pete Popove3ad1c22005-03-01 06:33:16 +000072 {
73 u32 freq0, clksrc;
Ralf Baechlef5cd9f12007-11-01 12:22:53 +000074 u32 pin_func;
Pete Popove3ad1c22005-03-01 06:33:16 +000075
76 /* Select SMBUS in CPLD */
77 bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
78
79 pin_func = au_readl(SYS_PINFUNC);
80 au_sync();
81 pin_func &= ~(3<<17 | 1<<4);
82 /* Set GPIOs correctly */
83 pin_func |= 2<<17;
84 au_writel(pin_func, SYS_PINFUNC);
85 au_sync();
86
87 /* The i2c driver depends on 50Mhz clock */
88 freq0 = au_readl(SYS_FREQCTRL0);
89 au_sync();
90 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
91 freq0 |= (3<<SYS_FC_FRDIV1_BIT);
92 /* 396Mhz / (3+1)*2 == 49.5Mhz */
93 au_writel(freq0, SYS_FREQCTRL0);
94 au_sync();
95 freq0 |= SYS_FC_FE1;
96 au_writel(freq0, SYS_FREQCTRL0);
97 au_sync();
98
99 clksrc = au_readl(SYS_CLKSRC);
100 au_sync();
101 clksrc &= ~0x01f00000;
102 /* bit 22 is EXTCLK0 for PSC0 */
103 clksrc |= (0x3 << 22);
104 au_writel(clksrc, SYS_CLKSRC);
105 au_sync();
106 }
107#endif
108
109#ifdef CONFIG_FB_AU1200
110 argptr = prom_getcmdline();
111#ifdef CONFIG_MIPS_PB1200
Pete Popov64abf642005-09-14 16:17:59 +0000112 strcat(argptr, " video=au1200fb:panel:bs");
Pete Popove3ad1c22005-03-01 06:33:16 +0000113#endif
114#ifdef CONFIG_MIPS_DB1200
Pete Popov64abf642005-09-14 16:17:59 +0000115 strcat(argptr, " video=au1200fb:panel:bs");
Pete Popove3ad1c22005-03-01 06:33:16 +0000116#endif
117#endif
118
Pete Popove3ad1c22005-03-01 06:33:16 +0000119 /* The Pb1200 development board uses external MUX for PSC0 to
120 support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
121 */
Ralf Baechle6fec2e12007-07-13 06:33:09 +0100122#ifdef CONFIG_I2C_AU1550
Pete Popove3ad1c22005-03-01 06:33:16 +0000123 bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
124#endif
125 au_sync();
126
127#ifdef CONFIG_MIPS_PB1200
128 printk("AMD Alchemy Pb1200 Board\n");
129#endif
130#ifdef CONFIG_MIPS_DB1200
131 printk("AMD Alchemy Db1200 Board\n");
132#endif
Pete Popovebc7f122005-03-04 08:31:06 +0000133
Pete Popove3ad1c22005-03-01 06:33:16 +0000134 /* Setup Pb1200 External Interrupt Controller */
Yoichi Yuasa0d02f072006-11-01 18:40:15 +0900135 board_init_irq = _board_init_irq;
Pete Popove3ad1c22005-03-01 06:33:16 +0000136}
Pete Popov64abf642005-09-14 16:17:59 +0000137
138int
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100139board_au1200fb_panel(void)
Pete Popov64abf642005-09-14 16:17:59 +0000140{
141 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
142 int p;
143
144 p = bcsr->switches;
145 p >>= 8;
146 p &= 0x0F;
147 return p;
148}
149
150int
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100151board_au1200fb_panel_init(void)
Pete Popov64abf642005-09-14 16:17:59 +0000152{
153 /* Apply power */
154 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
155 bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
156 /*printk("board_au1200fb_panel_init()\n"); */
157 return 0;
158}
159
160int
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100161board_au1200fb_panel_shutdown(void)
Pete Popov64abf642005-09-14 16:17:59 +0000162{
163 /* Remove power */
164 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
165 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
166 /*printk("board_au1200fb_panel_shutdown()\n"); */
167 return 0;
168}
169