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Ben Dooksd58153d2007-07-22 16:07:09 +01001# arch/arm/plat-s3c/Kconfig
2#
3# Copyright 2007 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_S3C
8 bool
Ben Dooksa08ab632008-10-21 14:06:39 +01009 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
Ben Dooksbcae8ae2008-10-21 14:06:32 +010010 default y
Ben Dooksd58153d2007-07-22 16:07:09 +010011 select NO_IOPORT
12 help
13 Base platform code for any Samsung S3C device
14
Ben Dooksb2627582007-07-22 16:09:44 +010015# low-level serial option nodes
16
Russell Kingd83a12a2008-12-21 15:02:07 +000017if PLAT_S3C
18
Ben Dooksb2627582007-07-22 16:09:44 +010019config CPU_LLSERIAL_S3C2410_ONLY
20 bool
Ben Dooksb2627582007-07-22 16:09:44 +010021 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
22
23config CPU_LLSERIAL_S3C2440_ONLY
24 bool
Ben Dooksb2627582007-07-22 16:09:44 +010025 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
26
27config CPU_LLSERIAL_S3C2410
28 bool
Ben Dooksb2627582007-07-22 16:09:44 +010029 help
30 Selected if there is an S3C2410 (or register compatible) serial
31 low-level implementation needed
32
33config CPU_LLSERIAL_S3C2440
34 bool
Ben Dooksb2627582007-07-22 16:09:44 +010035 help
36 Selected if there is an S3C2440 (or register compatible) serial
37 low-level implementation needed
38
39# boot configurations
40
Ben Dooksd58153d2007-07-22 16:07:09 +010041comment "Boot options"
42
Ben Dooksa45f8262007-07-22 16:16:51 +010043config S3C_BOOT_WATCHDOG
44 bool "S3C Initialisation watchdog"
Russell Kingd83a12a2008-12-21 15:02:07 +000045 depends on S3C2410_WATCHDOG
Ben Dooksd58153d2007-07-22 16:07:09 +010046 help
47 Say y to enable the watchdog during the kernel decompression
48 stage. If the kernel fails to uncompress, then the watchdog
49 will trigger a reset and the system should restart.
50
Ben Dooksa45f8262007-07-22 16:16:51 +010051config S3C_BOOT_ERROR_RESET
52 bool "S3C Reboot on decompression error"
Ben Dooksd58153d2007-07-22 16:07:09 +010053 help
54 Say y here to use the watchdog to reset the system if the
55 kernel decompressor detects an error during decompression.
56
Ben Dookse7aa6f42008-12-02 19:34:52 +000057config S3C_BOOT_UART_FORCE_FIFO
58 bool "Force UART FIFO on during boot process"
Ben Dookse7aa6f42008-12-02 19:34:52 +000059 default y
60 help
61 Say Y here to force the UART FIFOs on during the kernel
62 uncompressor
63
Ben Dooksd58153d2007-07-22 16:07:09 +010064comment "Power management"
65
66config S3C2410_PM_DEBUG
67 bool "S3C2410 PM Suspend debug"
Russell Kingd83a12a2008-12-21 15:02:07 +000068 depends on PM
Ben Dooksd58153d2007-07-22 16:07:09 +010069 help
70 Say Y here if you want verbose debugging from the PM Suspend and
71 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
72 for more information.
73
Ben Dooksbd117bd2009-03-10 18:19:35 +000074config S3C_PM_DEBUG_LED_SMDK
75 bool "SMDK LED suspend/resume debugging"
76 depends on PM && (MACH_SMDK6410)
77 help
78 Say Y here to enable the use of the SMDK LEDs on the baseboard
79 for debugging of the state of the suspend and resume process.
80
81 Note, this currently only works for S3C64XX based SMDK boards.
82
Ben Dooksd58153d2007-07-22 16:07:09 +010083config S3C2410_PM_CHECK
84 bool "S3C2410 PM Suspend Memory CRC"
Russell Kingd83a12a2008-12-21 15:02:07 +000085 depends on PM && CRC32
Ben Dooksd58153d2007-07-22 16:07:09 +010086 help
87 Enable the PM code's memory area checksum over sleep. This option
88 will generate CRCs of all blocks of memory, and store them before
89 going to sleep. The blocks are then checked on resume for any
90 errors.
91
92 Note, this can take several seconds depending on memory size
93 and CPU speed.
94
95 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
96
97config S3C2410_PM_CHECK_CHUNKSIZE
98 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
Russell Kingd83a12a2008-12-21 15:02:07 +000099 depends on PM && S3C2410_PM_CHECK
Ben Dooksd58153d2007-07-22 16:07:09 +0100100 default 64
101 help
102 Set the chunksize in Kilobytes of the CRC for checking memory
103 corruption over suspend and resume. A smaller value will mean that
104 the CRC data block will take more memory, but wil identify any
105 faults with better precision.
106
107 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
108
Ben Dooksc7657842007-07-22 16:11:20 +0100109config S3C_LOWLEVEL_UART_PORT
110 int "S3C UART to use for low-level messages"
Ben Dooksd58153d2007-07-22 16:07:09 +0100111 default 0
112 help
113 Choice of which UART port to use for the low-level messages,
114 such as the `Uncompressing...` at start time. The value of
115 this configuration should be between zero and two. The port
116 must have been initialised by the boot-loader before use.
Ben Dooks5b323c72008-10-31 16:14:28 +0000117
Ben Dooksefd3a8e2008-10-31 16:14:30 +0000118# options for gpiolib support
119
120config S3C_GPIO_SPACE
121 int "Space between gpio banks"
122 default 0
123 help
124 Add a number of spare GPIO entries between each bank for debugging
125 purposes. This allows any problems where an counter overflows from
126 one bank to another to be caught, at the expense of using a little
127 more memory.
128
Ben Dooks8a53bdb2008-10-31 16:14:32 +0000129config S3C_GPIO_TRACK
130 bool
131 help
132 Internal configuration option to enable the s3c specific gpio
133 chip tracking if the platform requires it.
134
Ben Dooks21b23662008-10-31 16:14:34 +0000135config S3C_GPIO_PULL_UPDOWN
136 bool
137 help
138 Internal configuration to enable the correct GPIO pull helper
139
140config S3C_GPIO_PULL_DOWN
141 bool
142 help
143 Internal configuration to enable the correct GPIO pull helper
144
145config S3C_GPIO_PULL_UP
146 bool
147 help
148 Internal configuration to enable the correct GPIO pull helper
149
150config S3C_GPIO_CFG_S3C24XX
151 bool
152 help
153 Internal configuration to enable S3C24XX style GPIO configuration
154 functions.
155
156config S3C_GPIO_CFG_S3C64XX
157 bool
158 help
159 Internal configuration to enable S3C64XX style GPIO configuration
160 functions.
161
Ben Dooks97c1b142009-03-19 15:02:39 +0000162# DMA
163
164config S3C_DMA
165 bool
166 help
167 Internal configuration for S3C DMA core
168
Ben Dooks5b323c72008-10-31 16:14:28 +0000169# device definitions to compile in
170
171config S3C_DEV_HSMMC
172 bool
Ben Dooks5b323c72008-10-31 16:14:28 +0000173 help
174 Compile in platform device definitions for HSMMC code
Ben Dooksa2205cd2008-10-31 16:14:39 +0000175
176config S3C_DEV_HSMMC1
177 bool
Ben Dooksa2205cd2008-10-31 16:14:39 +0000178 help
179 Compile in platform device definitions for HSMMC channel 1
Ben Dooks1aba8342008-10-31 16:14:55 +0000180
181config S3C_DEV_I2C1
182 bool
Ben Dooks1aba8342008-10-31 16:14:55 +0000183 help
184 Compile in platform device definitions for I2C channel 1
Ben Dooks58435f72008-11-19 15:41:31 +0000185
186config S3C_DEV_FB
187 bool
Ben Dooks58435f72008-11-19 15:41:31 +0000188 help
189 Compile in platform device definition for framebuffer
Russell Kingd83a12a2008-12-21 15:02:07 +0000190
Ben Dookseca86552009-03-06 19:49:48 +0000191config S3C_DEV_USB_HOST
192 bool
193 help
194 Compile in platform device definition for USB host.
195
Ben Dooksf0e1fa72009-05-16 22:05:27 +0100196config S3C_DEV_USB_HSOTG
197 bool
198 help
199 Compile in platform device definition for USB high-speed OtG
200
Ben Dooksdb616eb2009-08-16 23:54:58 +0100201config S3C_DEV_NAND
202 bool
203 help
204 Compile in platform device definition for NAND controller
205
Russell Kingd83a12a2008-12-21 15:02:07 +0000206endif