blob: 2f929e8b2c4f6d6a0160aaf2fbe6383b2d86d751 [file] [log] [blame]
Daniel Walker2682fd32010-02-24 15:47:58 -08001/*
2 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Daniel Walker2682fd32010-02-24 15:47:58 -08004 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/gpio.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080019#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/input.h>
22#include <linux/io.h>
23#include <linux/delay.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#include <linux/bootmem.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080025#include <linux/power_supply.h>
26
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <mach/msm_memtypes.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080028#include <mach/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/flash.h>
33#include <asm/setup.h>
34#ifdef CONFIG_CACHE_L2X0
35#include <asm/hardware/cache-l2x0.h>
36#endif
37
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <asm/mach/mmc.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080039#include <mach/vreg.h>
40#include <mach/mpp.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080041#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042#include <mach/pmic.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080043#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070044#include <mach/msm_rpcrouter.h>
45#include <mach/msm_hsusb.h>
46#include <mach/rpc_hsusb.h>
47#include <mach/rpc_pmapp.h>
48#include <mach/msm_serial_hs.h>
49#include <mach/memory.h>
50#include <mach/msm_battery.h>
51#include <mach/rpc_server_handset.h>
52#include <mach/msm_tsif.h>
53#include <mach/socinfo.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080054
55#include <linux/mtd/nand.h>
56#include <linux/mtd/partitions.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <linux/i2c.h>
58#include <linux/android_pmem.h>
59#include <mach/camera.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080060
61#include "devices.h"
Daniel Walker2682fd32010-02-24 15:47:58 -080062#include "clock.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -070063#include "acpuclock.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include "msm-keypad-devices.h"
65#include "pm.h"
66
67#ifdef CONFIG_USB_ANDROID
68#include <linux/usb/android_composite.h>
69#endif
70
71#ifdef CONFIG_ARCH_MSM7X25
72#define MSM_PMEM_MDP_SIZE 0xb21000
73#define MSM_PMEM_ADSP_SIZE 0x97b000
74#define MSM_PMEM_AUDIO_SIZE 0x121000
75#define MSM_FB_SIZE 0x200000
76#define PMEM_KERNEL_EBI1_SIZE 0x64000
77#endif
78
79#ifdef CONFIG_ARCH_MSM7X27
80#define MSM_PMEM_MDP_SIZE 0x1B76000
81#define MSM_PMEM_ADSP_SIZE 0xC8A000
82#define MSM_PMEM_AUDIO_SIZE 0x5B000
83
84#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
85#define MSM_FB_SIZE 0x233000
86#else
87#define MSM_FB_SIZE 0x177000
88#endif
89
90#define PMEM_KERNEL_EBI1_SIZE 0x1C000
91#endif
Daniel Walker2682fd32010-02-24 15:47:58 -080092
93static struct resource smc91x_resources[] = {
94 [0] = {
95 .start = 0x9C004300,
96 .end = 0x9C0043ff,
97 .flags = IORESOURCE_MEM,
98 },
99 [1] = {
100 .start = MSM_GPIO_TO_INT(132),
101 .end = MSM_GPIO_TO_INT(132),
102 .flags = IORESOURCE_IRQ,
103 },
104};
105
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700106#ifdef CONFIG_USB_FUNCTION
107static struct usb_mass_storage_platform_data usb_mass_storage_pdata = {
108 .nluns = 0x02,
109 .buf_size = 16384,
110 .vendor = "GOOGLE",
111 .product = "Mass storage",
112 .release = 0xffff,
113};
114
115static struct platform_device mass_storage_device = {
116 .name = "usb_mass_storage",
117 .id = -1,
118 .dev = {
119 .platform_data = &usb_mass_storage_pdata,
120 },
121};
122#endif
123#ifdef CONFIG_USB_ANDROID
124static char *usb_functions_default[] = {
125 "diag",
126 "modem",
127 "nmea",
128 "rmnet",
129 "usb_mass_storage",
130};
131
132static char *usb_functions_default_adb[] = {
133 "diag",
134 "adb",
135 "modem",
136 "nmea",
137 "rmnet",
138 "usb_mass_storage",
139};
140
141static char *usb_functions_rndis[] = {
142 "rndis",
143};
144
145static char *usb_functions_rndis_adb[] = {
146 "rndis",
147 "adb",
148};
149
150static char *usb_functions_all[] = {
151#ifdef CONFIG_USB_ANDROID_RNDIS
152 "rndis",
153#endif
154#ifdef CONFIG_USB_ANDROID_DIAG
155 "diag",
156#endif
157 "adb",
158#ifdef CONFIG_USB_F_SERIAL
159 "modem",
160 "nmea",
161#endif
162#ifdef CONFIG_USB_ANDROID_RMNET
163 "rmnet",
164#endif
165 "usb_mass_storage",
166#ifdef CONFIG_USB_ANDROID_ACM
167 "acm",
168#endif
169};
170
171static struct android_usb_product usb_products[] = {
172 {
173 .product_id = 0x9026,
174 .num_functions = ARRAY_SIZE(usb_functions_default),
175 .functions = usb_functions_default,
176 },
177 {
178 .product_id = 0x9025,
179 .num_functions = ARRAY_SIZE(usb_functions_default_adb),
180 .functions = usb_functions_default_adb,
181 },
182 {
183 .product_id = 0xf00e,
184 .num_functions = ARRAY_SIZE(usb_functions_rndis),
185 .functions = usb_functions_rndis,
186 },
187 {
188 .product_id = 0x9024,
189 .num_functions = ARRAY_SIZE(usb_functions_rndis_adb),
190 .functions = usb_functions_rndis_adb,
191 },
192};
193
194static struct usb_mass_storage_platform_data mass_storage_pdata = {
195 .nluns = 1,
196 .vendor = "Qualcomm Incorporated",
197 .product = "Mass storage",
198 .release = 0x0100,
199 .can_stall = 1,
200};
201
202static struct platform_device usb_mass_storage_device = {
203 .name = "usb_mass_storage",
204 .id = -1,
205 .dev = {
206 .platform_data = &mass_storage_pdata,
207 },
208};
209
210static struct usb_ether_platform_data rndis_pdata = {
211 /* ethaddr is filled by board_serialno_setup */
212 .vendorID = 0x05C6,
213 .vendorDescr = "Qualcomm Incorporated",
214};
215
216static struct platform_device rndis_device = {
217 .name = "rndis",
218 .id = -1,
219 .dev = {
220 .platform_data = &rndis_pdata,
221 },
222};
223
224static struct android_usb_platform_data android_usb_pdata = {
225 .vendor_id = 0x05C6,
226 .product_id = 0x9026,
227 .version = 0x0100,
228 .product_name = "Qualcomm HSUSB Device",
229 .manufacturer_name = "Qualcomm Incorporated",
230 .num_products = ARRAY_SIZE(usb_products),
231 .products = usb_products,
232 .num_functions = ARRAY_SIZE(usb_functions_all),
233 .functions = usb_functions_all,
234 .serial_number = "1234567890ABCDEF",
235};
236
237static struct platform_device android_usb_device = {
238 .name = "android_usb",
239 .id = -1,
240 .dev = {
241 .platform_data = &android_usb_pdata,
242 },
243};
244
245static int __init board_serialno_setup(char *serialno)
246{
247 int i;
248 char *src = serialno;
249
250 /* create a fake MAC address from our serial number.
251 * first byte is 0x02 to signify locally administered.
252 */
253 rndis_pdata.ethaddr[0] = 0x02;
254 for (i = 0; *src; i++) {
255 /* XOR the USB serial across the remaining bytes */
256 rndis_pdata.ethaddr[i % (ETH_ALEN - 1) + 1] ^= *src++;
257 }
258
259 android_usb_pdata.serial_number = serialno;
260 return 1;
261}
262__setup("androidboot.serialno=", board_serialno_setup);
263#endif
264
Daniel Walker2682fd32010-02-24 15:47:58 -0800265static struct platform_device smc91x_device = {
266 .name = "smc91x",
267 .id = 0,
268 .num_resources = ARRAY_SIZE(smc91x_resources),
269 .resource = smc91x_resources,
270};
271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700272#ifdef CONFIG_USB_FUNCTION
273static struct usb_function_map usb_functions_map[] = {
274 {"diag", 0},
275 {"adb", 1},
276 {"modem", 2},
277 {"nmea", 3},
278 {"mass_storage", 4},
279 {"ethernet", 5},
280 {"rmnet", 6},
281};
282
283/* dynamic composition */
284static struct usb_composition usb_func_composition[] = {
285 {
286 .product_id = 0x9012,
287 .functions = 0x5, /* 0101 */
288 },
289
290 {
291 .product_id = 0x9013,
292 .functions = 0x15, /* 10101 */
293 },
294
295 {
296 .product_id = 0x9014,
297 .functions = 0x30, /* 110000 */
298 },
299
300 {
301 .product_id = 0x9016,
302 .functions = 0xD, /* 01101 */
303 },
304
305 {
306 .product_id = 0x9017,
307 .functions = 0x1D, /* 11101 */
308 },
309
310 {
311 .product_id = 0xF000,
312 .functions = 0x10, /* 10000 */
313 },
314
315 {
316 .product_id = 0xF009,
317 .functions = 0x20, /* 100000 */
318 },
319
320 {
321 .product_id = 0x9018,
322 .functions = 0x1F, /* 011111 */
323 },
324#ifdef CONFIG_USB_FUNCTION_RMNET
325 {
326 .product_id = 0x9021,
327 /* DIAG + RMNET */
328 .functions = 0x41,
329 },
330 {
331 .product_id = 0x9022,
332 /* DIAG + ADB + RMNET */
333 .functions = 0x43,
334 },
335#endif
336
337};
338
339static struct msm_hsusb_platform_data msm_hsusb_pdata = {
340 .version = 0x0100,
341 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM),
342 .vendor_id = 0x5c6,
343 .product_name = "Qualcomm HSUSB Device",
344 .serial_number = "1234567890ABCDEF",
345 .manufacturer_name = "Qualcomm Incorporated",
346 .compositions = usb_func_composition,
347 .num_compositions = ARRAY_SIZE(usb_func_composition),
348 .function_map = usb_functions_map,
349 .num_functions = ARRAY_SIZE(usb_functions_map),
350 .config_gpio = NULL,
351};
352#endif
353
354#ifdef CONFIG_USB_EHCI_MSM_72K
355static void msm_hsusb_vbus_power(unsigned phy_info, int on)
356{
357 if (on)
358 msm_hsusb_vbus_powerup();
359 else
360 msm_hsusb_vbus_shutdown();
361}
362
363static struct msm_usb_host_platform_data msm_usb_host_pdata = {
364 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM),
365};
366
367static void __init msm7x2x_init_host(void)
368{
369 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
370 return;
371
372 msm_add_host(0, &msm_usb_host_pdata);
373}
374#endif
375
376#ifdef CONFIG_USB_MSM_OTG_72K
377static int hsusb_rpc_connect(int connect)
378{
379 if (connect)
380 return msm_hsusb_rpc_connect();
381 else
382 return msm_hsusb_rpc_close();
383}
384#endif
385
386#ifdef CONFIG_USB_MSM_OTG_72K
387struct vreg *vreg_3p3;
388static int msm_hsusb_ldo_init(int init)
389{
390 if (init) {
391 /*
392 * PHY 3.3V analog domain(VDDA33) is powered up by
393 * an always enabled power supply (LP5900TL-3.3).
394 * USB VREG default source is VBUS line. Turning
395 * on USB VREG has a side effect on the USB suspend
396 * current. Hence USB VREG is explicitly turned
397 * off here.
398 */
399 vreg_3p3 = vreg_get(NULL, "usb");
400 if (IS_ERR(vreg_3p3))
401 return PTR_ERR(vreg_3p3);
402 vreg_enable(vreg_3p3);
403 vreg_disable(vreg_3p3);
404 vreg_put(vreg_3p3);
405 }
406
407 return 0;
408}
409
410static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
411{
412 int ret;
413
414 if (init) {
415 ret = msm_pm_app_rpc_init(callback);
416 } else {
417 msm_pm_app_rpc_deinit(callback);
418 ret = 0;
419 }
420 return ret;
421}
422
423static int msm_otg_rpc_phy_reset(void __iomem *regs)
424{
425 return msm_hsusb_phy_reset();
426}
427
428static struct msm_otg_platform_data msm_otg_pdata = {
429 .rpc_connect = hsusb_rpc_connect,
430 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
431 .chg_vbus_draw = hsusb_chg_vbus_draw,
432 .chg_connected = hsusb_chg_connected,
433 .chg_init = hsusb_chg_init,
434#ifdef CONFIG_USB_EHCI_MSM_72K
435 .vbus_power = msm_hsusb_vbus_power,
436#endif
437 .ldo_init = msm_hsusb_ldo_init,
438 .pclk_required_during_lpm = 1,
439 .pclk_src_name = "ebi1_usb_clk",
440};
441
442#ifdef CONFIG_USB_GADGET
443static struct msm_hsusb_gadget_platform_data msm_gadget_pdata;
444#endif
445#endif
446
447#define SND(desc, num) { .name = #desc, .id = num }
448static struct snd_endpoint snd_endpoints_list[] = {
449 SND(HANDSET, 0),
450 SND(MONO_HEADSET, 2),
451 SND(HEADSET, 3),
452 SND(SPEAKER, 6),
453 SND(TTY_HEADSET, 8),
454 SND(TTY_VCO, 9),
455 SND(TTY_HCO, 10),
456 SND(BT, 12),
457 SND(IN_S_SADC_OUT_HANDSET, 16),
458 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
459 SND(CURRENT, 27),
460};
461#undef SND
462
463static struct msm_snd_endpoints msm_device_snd_endpoints = {
464 .endpoints = snd_endpoints_list,
465 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
466};
467
468static struct platform_device msm_device_snd = {
469 .name = "msm_snd",
470 .id = -1,
471 .dev = {
472 .platform_data = &msm_device_snd_endpoints
473 },
474};
475
476#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
477 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
478 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
479 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
480 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
481 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
482#ifdef CONFIG_ARCH_MSM7X25
483#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
484 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
485 (1<<MSM_ADSP_CODEC_MP3))
486#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
487 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
488 (1<<MSM_ADSP_CODEC_MP3))
489#define DEC3_FORMAT 0
490#define DEC4_FORMAT 0
491#else
492#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
493 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
494 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
495 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
496 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
497 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
498#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
499 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
500 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
501 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
502 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
503 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
504#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
505 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
506 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
507 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
508 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
509 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
510#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
511#endif
512
513static unsigned int dec_concurrency_table[] = {
514 /* Audio LP */
515 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
516 0, 0, 0,
517
518 /* Concurrency 1 */
519 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
520 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
521 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
522 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
523 (DEC4_FORMAT),
524
525 /* Concurrency 2 */
526 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
527 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
528 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
529 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
530 (DEC4_FORMAT),
531
532 /* Concurrency 3 */
533 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
534 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
535 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
536 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
537 (DEC4_FORMAT),
538
539 /* Concurrency 4 */
540 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
541 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
542 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
543 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
544 (DEC4_FORMAT),
545
546 /* Concurrency 5 */
547 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
548 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
549 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
550 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
551 (DEC4_FORMAT),
552
553 /* Concurrency 6 */
554 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
555 0, 0, 0, 0,
556
557 /* Concurrency 7 */
558 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
559 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
560 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
561 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
562 (DEC4_FORMAT),
563};
564
565#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
566 .module_queueid = queueid, .module_decid = decid, \
567 .nr_codec_support = nr_codec}
568
569static struct msm_adspdec_info dec_info_list[] = {
570 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
571#ifdef CONFIG_ARCH_MSM7X25
572 DEC_INFO("AUDPLAY1TASK", 14, 1, 5), /* AudPlay1BitStreamCtrlQueue */
573 DEC_INFO("AUDPLAY2TASK", 15, 2, 5), /* AudPlay2BitStreamCtrlQueue */
574 DEC_INFO("AUDPLAY3TASK", 16, 3, 0), /* AudPlay3BitStreamCtrlQueue */
575 DEC_INFO("AUDPLAY4TASK", 17, 4, 0), /* AudPlay4BitStreamCtrlQueue */
576#else
577 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
578 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
579 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
580 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
581#endif
582};
583
584static struct msm_adspdec_database msm_device_adspdec_database = {
585 .num_dec = ARRAY_SIZE(dec_info_list),
586 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
587 ARRAY_SIZE(dec_info_list)),
588 .dec_concurrency_table = dec_concurrency_table,
589 .dec_info_list = dec_info_list,
590};
591
592static struct platform_device msm_device_adspdec = {
593 .name = "msm_adspdec",
594 .id = -1,
595 .dev = {
596 .platform_data = &msm_device_adspdec_database
597 },
598};
599
600static struct android_pmem_platform_data android_pmem_pdata = {
601 .name = "pmem",
602 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
603 .cached = 1,
604 .memory_type = MEMTYPE_EBI1,
605};
606
607static struct android_pmem_platform_data android_pmem_adsp_pdata = {
608 .name = "pmem_adsp",
609 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
610 .cached = 0,
611 .memory_type = MEMTYPE_EBI1,
612};
613
614static struct android_pmem_platform_data android_pmem_audio_pdata = {
615 .name = "pmem_audio",
616 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
617 .cached = 0,
618 .memory_type = MEMTYPE_EBI1,
619};
620
621static struct platform_device android_pmem_device = {
622 .name = "android_pmem",
623 .id = 0,
624 .dev = { .platform_data = &android_pmem_pdata },
625};
626
627static struct platform_device android_pmem_adsp_device = {
628 .name = "android_pmem",
629 .id = 1,
630 .dev = { .platform_data = &android_pmem_adsp_pdata },
631};
632
633static struct platform_device android_pmem_audio_device = {
634 .name = "android_pmem",
635 .id = 2,
636 .dev = { .platform_data = &android_pmem_audio_pdata },
637};
638
639static struct msm_handset_platform_data hs_platform_data = {
640 .hs_name = "7k_handset",
641 .pwr_key_delay_ms = 500, /* 0 will disable end key */
642};
643
644static struct platform_device hs_device = {
645 .name = "msm-handset",
646 .id = -1,
647 .dev = {
648 .platform_data = &hs_platform_data,
649 },
650};
651
652/* TSIF begin */
653#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
654
655#define TSIF_B_SYNC GPIO_CFG(87, 5, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
656#define TSIF_B_DATA GPIO_CFG(86, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
657#define TSIF_B_EN GPIO_CFG(85, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
658#define TSIF_B_CLK GPIO_CFG(84, 4, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
659
660static const struct msm_gpio tsif_gpios[] = {
661 { .gpio_cfg = TSIF_B_CLK, .label = "tsif_clk", },
662 { .gpio_cfg = TSIF_B_EN, .label = "tsif_en", },
663 { .gpio_cfg = TSIF_B_DATA, .label = "tsif_data", },
664 { .gpio_cfg = TSIF_B_SYNC, .label = "tsif_sync", },
665};
666
667static struct msm_tsif_platform_data tsif_platform_data = {
668 .num_gpios = ARRAY_SIZE(tsif_gpios),
669 .gpios = tsif_gpios,
670 .tsif_clk = "tsif_clk",
671 .tsif_pclk = "tsif_pclk",
672 .tsif_ref_clk = "tsif_ref_clk",
673};
674#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
675/* TSIF end */
676
677#define LCDC_CONFIG_PROC 21
678#define LCDC_UN_CONFIG_PROC 22
679#define LCDC_API_PROG 0x30000066
680#define LCDC_API_VERS 0x00010001
681
682#define GPIO_OUT_132 132
683#define GPIO_OUT_131 131
684#define GPIO_OUT_103 103
685#define GPIO_OUT_102 102
686#define GPIO_OUT_88 88
687
688static struct msm_rpc_endpoint *lcdc_ep;
689
690static int msm_fb_lcdc_config(int on)
691{
692 int rc = 0;
693 struct rpc_request_hdr hdr;
694
695 if (on)
696 pr_info("lcdc config\n");
697 else
698 pr_info("lcdc un-config\n");
699
700 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
701 if (IS_ERR(lcdc_ep)) {
702 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
703 __func__, PTR_ERR(lcdc_ep));
704 return -EINVAL;
705 }
706
707 rc = msm_rpc_call(lcdc_ep,
708 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
709 &hdr, sizeof(hdr),
710 5 * HZ);
711 if (rc)
712 printk(KERN_ERR
713 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
714
715 msm_rpc_close(lcdc_ep);
716 return rc;
717}
718
719static int gpio_array_num[] = {
720 GPIO_OUT_132, /* spi_clk */
721 GPIO_OUT_131, /* spi_cs */
722 GPIO_OUT_103, /* spi_sdi */
723 GPIO_OUT_102, /* spi_sdoi */
724 GPIO_OUT_88
725 };
726
727static void lcdc_gordon_gpio_init(void)
728{
729 if (gpio_request(GPIO_OUT_132, "spi_clk"))
730 pr_err("failed to request gpio spi_clk\n");
731 if (gpio_request(GPIO_OUT_131, "spi_cs"))
732 pr_err("failed to request gpio spi_cs\n");
733 if (gpio_request(GPIO_OUT_103, "spi_sdi"))
734 pr_err("failed to request gpio spi_sdi\n");
735 if (gpio_request(GPIO_OUT_102, "spi_sdoi"))
736 pr_err("failed to request gpio spi_sdoi\n");
737 if (gpio_request(GPIO_OUT_88, "gpio_dac"))
738 pr_err("failed to request gpio_dac\n");
739}
740
741static uint32_t lcdc_gpio_table[] = {
742 GPIO_CFG(GPIO_OUT_132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
743 GPIO_CFG(GPIO_OUT_131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
744 GPIO_CFG(GPIO_OUT_103, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
745 GPIO_CFG(GPIO_OUT_102, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
746 GPIO_CFG(GPIO_OUT_88, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
747};
748
749static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
750{
751 int n, rc;
752 for (n = 0; n < len; n++) {
753 rc = gpio_tlmm_config(table[n],
754 enable ? GPIO_CFG_ENABLE : GPIO_CFG_DISABLE);
755 if (rc) {
756 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
757 __func__, table[n], rc);
758 break;
759 }
760 }
761}
762
763static void lcdc_gordon_config_gpios(int enable)
764{
765 config_lcdc_gpio_table(lcdc_gpio_table,
766 ARRAY_SIZE(lcdc_gpio_table), enable);
767}
768
769static char *msm_fb_lcdc_vreg[] = {
770 "gp5"
771};
772
773static int msm_fb_lcdc_power_save(int on)
774{
775 struct vreg *vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
776 int i, rc = 0;
777
778 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
779 if (on) {
780 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
781 rc = vreg_enable(vreg[i]);
782 if (rc) {
783 printk(KERN_ERR "vreg_enable: %s vreg"
784 "operation failed \n",
785 msm_fb_lcdc_vreg[i]);
786 goto bail;
787 }
788 } else {
789 int tmp;
790 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
791 tmp = vreg_disable(vreg[i]);
792 if (tmp) {
793 printk(KERN_ERR "vreg_disable: %s vreg "
794 "operation failed \n",
795 msm_fb_lcdc_vreg[i]);
796 if (!rc)
797 rc = tmp;
798 }
799 tmp = gpio_tlmm_config(GPIO_CFG(GPIO_OUT_88, 0,
800 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
801 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
802 if (tmp) {
803 printk(KERN_ERR "gpio_tlmm_config failed\n");
804 if (!rc)
805 rc = tmp;
806 }
807 gpio_set_value(88, 0);
808 mdelay(15);
809 gpio_set_value(88, 1);
810 mdelay(15);
811 }
812 }
813
814 return rc;
815
816bail:
817 if (on) {
818 for (; i > 0; i--)
819 vreg_disable(vreg[i - 1]);
820 }
821
822 return rc;
823}
824static struct lcdc_platform_data lcdc_pdata = {
825 .lcdc_gpio_config = msm_fb_lcdc_config,
826 .lcdc_power_save = msm_fb_lcdc_power_save,
827};
828
829static struct msm_panel_common_pdata lcdc_gordon_panel_data = {
830 .panel_config_gpio = lcdc_gordon_config_gpios,
831 .gpio_num = gpio_array_num,
832};
833
834static struct platform_device lcdc_gordon_panel_device = {
835 .name = "lcdc_gordon_vga",
836 .id = 0,
837 .dev = {
838 .platform_data = &lcdc_gordon_panel_data,
839 }
840};
841
842static struct resource msm_fb_resources[] = {
843 {
844 .flags = IORESOURCE_DMA,
845 }
846};
847
848static int msm_fb_detect_panel(const char *name)
849{
850 int ret = -EPERM;
851
852 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
853 if (!strcmp(name, "lcdc_gordon_vga"))
854 ret = 0;
855 else
856 ret = -ENODEV;
857 }
858
859 return ret;
860}
861
862static struct msm_fb_platform_data msm_fb_pdata = {
863 .detect_client = msm_fb_detect_panel,
864 .mddi_prescan = 1,
865};
866
867static struct platform_device msm_fb_device = {
868 .name = "msm_fb",
869 .id = 0,
870 .num_resources = ARRAY_SIZE(msm_fb_resources),
871 .resource = msm_fb_resources,
872 .dev = {
873 .platform_data = &msm_fb_pdata,
874 }
875};
876
877#ifdef CONFIG_BT
878static struct platform_device msm_bt_power_device = {
879 .name = "bt_power",
880};
881
882enum {
883 BT_WAKE,
884 BT_RFR,
885 BT_CTS,
886 BT_RX,
887 BT_TX,
888 BT_PCM_DOUT,
889 BT_PCM_DIN,
890 BT_PCM_SYNC,
891 BT_PCM_CLK,
892 BT_HOST_WAKE,
893};
894
895static unsigned bt_config_power_on[] = {
896 GPIO_CFG(42, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* WAKE */
897 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* RFR */
898 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* CTS */
899 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Rx */
900 GPIO_CFG(46, 3, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Tx */
901 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DOUT */
902 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DIN */
903 GPIO_CFG(70, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_SYNC */
904 GPIO_CFG(71, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_CLK */
905 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* HOST_WAKE */
906};
907static unsigned bt_config_power_off[] = {
908 GPIO_CFG(42, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* WAKE */
909 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* RFR */
910 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* CTS */
911 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Rx */
912 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Tx */
913 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DOUT */
914 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DIN */
915 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_SYNC */
916 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_CLK */
917 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HOST_WAKE */
918};
919
920static int bluetooth_power(int on)
921{
922 struct vreg *vreg_bt;
923 int pin, rc;
924
925 printk(KERN_DEBUG "%s\n", __func__);
926
927 /* do not have vreg bt defined, gp6 is the same */
928 /* vreg_get parameter 1 (struct device *) is ignored */
929 vreg_bt = vreg_get(NULL, "gp6");
930
931 if (IS_ERR(vreg_bt)) {
932 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
933 __func__, PTR_ERR(vreg_bt));
934 return PTR_ERR(vreg_bt);
935 }
936
937 if (on) {
938 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++) {
939 rc = gpio_tlmm_config(bt_config_power_on[pin],
940 GPIO_CFG_ENABLE);
941 if (rc) {
942 printk(KERN_ERR
943 "%s: gpio_tlmm_config(%#x)=%d\n",
944 __func__, bt_config_power_on[pin], rc);
945 return -EIO;
946 }
947 }
948
949 /* units of mV, steps of 50 mV */
950 rc = vreg_set_level(vreg_bt, 2600);
951 if (rc) {
952 printk(KERN_ERR "%s: vreg set level failed (%d)\n",
953 __func__, rc);
954 return -EIO;
955 }
956 rc = vreg_enable(vreg_bt);
957 if (rc) {
958 printk(KERN_ERR "%s: vreg enable failed (%d)\n",
959 __func__, rc);
960 return -EIO;
961 }
962 } else {
963 rc = vreg_disable(vreg_bt);
964 if (rc) {
965 printk(KERN_ERR "%s: vreg disable failed (%d)\n",
966 __func__, rc);
967 return -EIO;
968 }
969 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++) {
970 rc = gpio_tlmm_config(bt_config_power_off[pin],
971 GPIO_CFG_ENABLE);
972 if (rc) {
973 printk(KERN_ERR
974 "%s: gpio_tlmm_config(%#x)=%d\n",
975 __func__, bt_config_power_off[pin], rc);
976 return -EIO;
977 }
978 }
979 }
980 return 0;
981}
982
983static void __init bt_power_init(void)
984{
985 msm_bt_power_device.dev.platform_data = &bluetooth_power;
986}
987#else
988#define bt_power_init(x) do {} while (0)
989#endif
990
991static struct platform_device msm_device_pmic_leds = {
992 .name = "pmic-leds",
993 .id = -1,
994};
995
996static struct resource bluesleep_resources[] = {
997 {
998 .name = "gpio_host_wake",
999 .start = 83,
1000 .end = 83,
1001 .flags = IORESOURCE_IO,
1002 },
1003 {
1004 .name = "gpio_ext_wake",
1005 .start = 42,
1006 .end = 42,
1007 .flags = IORESOURCE_IO,
1008 },
1009 {
1010 .name = "host_wake",
1011 .start = MSM_GPIO_TO_INT(83),
1012 .end = MSM_GPIO_TO_INT(83),
1013 .flags = IORESOURCE_IRQ,
1014 },
1015};
1016
1017static struct platform_device msm_bluesleep_device = {
1018 .name = "bluesleep",
1019 .id = -1,
1020 .num_resources = ARRAY_SIZE(bluesleep_resources),
1021 .resource = bluesleep_resources,
1022};
1023
1024static struct i2c_board_info i2c_devices[] = {
1025#ifdef CONFIG_MT9D112
1026 {
1027 I2C_BOARD_INFO("mt9d112", 0x78 >> 1),
1028 },
1029#endif
1030#ifdef CONFIG_S5K3E2FX
1031 {
1032 I2C_BOARD_INFO("s5k3e2fx", 0x20 >> 1),
1033 },
1034#endif
1035#ifdef CONFIG_MT9P012
1036 {
1037 I2C_BOARD_INFO("mt9p012", 0x6C >> 1),
1038 },
1039#endif
1040#ifdef CONFIG_MT9P012_KM
1041 {
1042 I2C_BOARD_INFO("mt9p012_km", 0x6C >> 2),
1043 },
1044#endif
1045#if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013)
1046 {
1047 I2C_BOARD_INFO("mt9t013", 0x6C),
1048 },
1049#endif
1050#ifdef CONFIG_VB6801
1051 {
1052 I2C_BOARD_INFO("vb6801", 0x20),
1053 },
1054#endif
1055};
1056
1057#ifdef CONFIG_MSM_CAMERA
1058static uint32_t camera_off_gpio_table[] = {
1059 /* parallel CAMERA interfaces */
1060 GPIO_CFG(0, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
1061 GPIO_CFG(1, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
1062 GPIO_CFG(2, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
1063 GPIO_CFG(3, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
1064 GPIO_CFG(4, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
1065 GPIO_CFG(5, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
1066 GPIO_CFG(6, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
1067 GPIO_CFG(7, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
1068 GPIO_CFG(8, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
1069 GPIO_CFG(9, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
1070 GPIO_CFG(10, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
1071 GPIO_CFG(11, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
1072 GPIO_CFG(12, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCLK */
1073 GPIO_CFG(13, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
1074 GPIO_CFG(14, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
1075 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* MCLK */
1076};
1077
1078static uint32_t camera_on_gpio_table[] = {
1079 /* parallel CAMERA interfaces */
1080 GPIO_CFG(0, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
1081 GPIO_CFG(1, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
1082 GPIO_CFG(2, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
1083 GPIO_CFG(3, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
1084 GPIO_CFG(4, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
1085 GPIO_CFG(5, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
1086 GPIO_CFG(6, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
1087 GPIO_CFG(7, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
1088 GPIO_CFG(8, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
1089 GPIO_CFG(9, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
1090 GPIO_CFG(10, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
1091 GPIO_CFG(11, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
1092 GPIO_CFG(12, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* PCLK */
1093 GPIO_CFG(13, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
1094 GPIO_CFG(14, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
1095 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* MCLK */
1096 };
1097
1098static void config_gpio_table(uint32_t *table, int len)
1099{
1100 int n, rc;
1101 for (n = 0; n < len; n++) {
1102 rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE);
1103 if (rc) {
1104 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
1105 __func__, table[n], rc);
1106 break;
1107 }
1108 }
1109}
1110
1111static struct vreg *vreg_gp2;
1112static struct vreg *vreg_gp3;
1113
1114static void msm_camera_vreg_config(int vreg_en)
1115{
1116 int rc;
1117
1118 if (vreg_gp2 == NULL) {
1119 vreg_gp2 = vreg_get(NULL, "gp2");
1120 if (IS_ERR(vreg_gp2)) {
1121 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
1122 __func__, "gp2", PTR_ERR(vreg_gp2));
1123 return;
1124 }
1125
1126 rc = vreg_set_level(vreg_gp2, 1800);
1127 if (rc) {
1128 printk(KERN_ERR "%s: GP2 set_level failed (%d)\n",
1129 __func__, rc);
1130 }
1131 }
1132
1133 if (vreg_gp3 == NULL) {
1134 vreg_gp3 = vreg_get(NULL, "gp3");
1135 if (IS_ERR(vreg_gp3)) {
1136 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
1137 __func__, "gp3", PTR_ERR(vreg_gp3));
1138 return;
1139 }
1140
1141 rc = vreg_set_level(vreg_gp3, 2850);
1142 if (rc) {
1143 printk(KERN_ERR "%s: GP3 set level failed (%d)\n",
1144 __func__, rc);
1145 }
1146 }
1147
1148 if (vreg_en) {
1149 rc = vreg_enable(vreg_gp2);
1150 if (rc) {
1151 printk(KERN_ERR "%s: GP2 enable failed (%d)\n",
1152 __func__, rc);
1153 }
1154
1155 rc = vreg_enable(vreg_gp3);
1156 if (rc) {
1157 printk(KERN_ERR "%s: GP3 enable failed (%d)\n",
1158 __func__, rc);
1159 }
1160 } else {
1161 rc = vreg_disable(vreg_gp2);
1162 if (rc) {
1163 printk(KERN_ERR "%s: GP2 disable failed (%d)\n",
1164 __func__, rc);
1165 }
1166
1167 rc = vreg_disable(vreg_gp3);
1168 if (rc) {
1169 printk(KERN_ERR "%s: GP3 disable failed (%d)\n",
1170 __func__, rc);
1171 }
1172 }
1173}
1174
1175static int config_camera_on_gpios(void)
1176{
1177 int vreg_en = 1;
1178
1179 if (machine_is_msm7x25_ffa() ||
1180 machine_is_msm7x27_ffa())
1181 msm_camera_vreg_config(vreg_en);
1182
1183 config_gpio_table(camera_on_gpio_table,
1184 ARRAY_SIZE(camera_on_gpio_table));
1185 return 0;
1186}
1187
1188static void config_camera_off_gpios(void)
1189{
1190 int vreg_en = 0;
1191
1192 if (machine_is_msm7x25_ffa() ||
1193 machine_is_msm7x27_ffa())
1194 msm_camera_vreg_config(vreg_en);
1195
1196 config_gpio_table(camera_off_gpio_table,
1197 ARRAY_SIZE(camera_off_gpio_table));
1198}
1199
1200static struct msm_camera_device_platform_data msm_camera_device_data = {
1201 .camera_gpio_on = config_camera_on_gpios,
1202 .camera_gpio_off = config_camera_off_gpios,
1203 .ioext.mdcphy = MSM_MDC_PHYS,
1204 .ioext.mdcsz = MSM_MDC_SIZE,
1205 .ioext.appphy = MSM_CLK_CTL_PHYS,
1206 .ioext.appsz = MSM_CLK_CTL_SIZE,
1207};
1208
1209int pmic_set_flash_led_current(enum pmic8058_leds id, unsigned mA)
1210{
1211 int rc;
1212 rc = pmic_flash_led_set_current(mA);
1213 return rc;
1214}
1215
1216static struct msm_camera_sensor_flash_src msm_flash_src = {
1217 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1218 ._fsrc.pmic_src.num_of_src = 1,
1219 ._fsrc.pmic_src.low_current = 30,
1220 ._fsrc.pmic_src.high_current = 100,
1221 ._fsrc.pmic_src.led_src_1 = 0,
1222 ._fsrc.pmic_src.led_src_2 = 0,
1223 ._fsrc.pmic_src.pmic_set_current = pmic_set_flash_led_current,
1224};
1225
1226#ifdef CONFIG_MT9D112
1227static struct msm_camera_sensor_flash_data flash_mt9d112 = {
1228 .flash_type = MSM_CAMERA_FLASH_LED,
1229 .flash_src = &msm_flash_src
1230};
1231
1232static struct msm_camera_sensor_info msm_camera_sensor_mt9d112_data = {
1233 .sensor_name = "mt9d112",
1234 .sensor_reset = 89,
1235 .sensor_pwd = 85,
1236 .vcm_pwd = 0,
1237 .vcm_enable = 0,
1238 .pdata = &msm_camera_device_data,
1239 .flash_data = &flash_mt9d112
1240};
1241
1242static struct platform_device msm_camera_sensor_mt9d112 = {
1243 .name = "msm_camera_mt9d112",
1244 .dev = {
1245 .platform_data = &msm_camera_sensor_mt9d112_data,
1246 },
1247};
1248#endif
1249
1250#ifdef CONFIG_S5K3E2FX
1251static struct msm_camera_sensor_flash_data flash_s5k3e2fx = {
1252 .flash_type = MSM_CAMERA_FLASH_LED,
1253 .flash_src = &msm_flash_src
1254};
1255
1256static struct msm_camera_sensor_info msm_camera_sensor_s5k3e2fx_data = {
1257 .sensor_name = "s5k3e2fx",
1258 .sensor_reset = 89,
1259 .sensor_pwd = 85,
1260 .vcm_pwd = 0,
1261 .vcm_enable = 0,
1262 .pdata = &msm_camera_device_data,
1263 .flash_data = &flash_s5k3e2fx
1264};
1265
1266static struct platform_device msm_camera_sensor_s5k3e2fx = {
1267 .name = "msm_camera_s5k3e2fx",
1268 .dev = {
1269 .platform_data = &msm_camera_sensor_s5k3e2fx_data,
1270 },
1271};
1272#endif
1273
1274#ifdef CONFIG_MT9P012
1275static struct msm_camera_sensor_flash_data flash_mt9p012 = {
1276 .flash_type = MSM_CAMERA_FLASH_LED,
1277 .flash_src = &msm_flash_src
1278};
1279
1280static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_data = {
1281 .sensor_name = "mt9p012",
1282 .sensor_reset = 89,
1283 .sensor_pwd = 85,
1284 .vcm_pwd = 88,
1285 .vcm_enable = 0,
1286 .pdata = &msm_camera_device_data,
1287 .flash_data = &flash_mt9p012
1288};
1289
1290static struct platform_device msm_camera_sensor_mt9p012 = {
1291 .name = "msm_camera_mt9p012",
1292 .dev = {
1293 .platform_data = &msm_camera_sensor_mt9p012_data,
1294 },
1295};
1296#endif
1297
1298#ifdef CONFIG_MT9P012_KM
1299static struct msm_camera_sensor_flash_data flash_mt9p012_km = {
1300 .flash_type = MSM_CAMERA_FLASH_LED,
1301 .flash_src = &msm_flash_src
1302};
1303
1304static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_km_data = {
1305 .sensor_name = "mt9p012_km",
1306 .sensor_reset = 89,
1307 .sensor_pwd = 85,
1308 .vcm_pwd = 88,
1309 .vcm_enable = 0,
1310 .pdata = &msm_camera_device_data,
1311 .flash_data = &flash_mt9p012_km
1312};
1313
1314static struct platform_device msm_camera_sensor_mt9p012_km = {
1315 .name = "msm_camera_mt9p012_km",
1316 .dev = {
1317 .platform_data = &msm_camera_sensor_mt9p012_km_data,
1318 },
1319};
1320#endif
1321
1322#ifdef CONFIG_MT9T013
1323static struct msm_camera_sensor_flash_data flash_mt9t013 = {
1324 .flash_type = MSM_CAMERA_FLASH_LED,
1325 .flash_src = &msm_flash_src
1326};
1327
1328static struct msm_camera_sensor_info msm_camera_sensor_mt9t013_data = {
1329 .sensor_name = "mt9t013",
1330 .sensor_reset = 89,
1331 .sensor_pwd = 85,
1332 .vcm_pwd = 0,
1333 .vcm_enable = 0,
1334 .pdata = &msm_camera_device_data,
1335 .flash_data = &flash_mt9t013
1336};
1337
1338static struct platform_device msm_camera_sensor_mt9t013 = {
1339 .name = "msm_camera_mt9t013",
1340 .dev = {
1341 .platform_data = &msm_camera_sensor_mt9t013_data,
1342 },
1343};
1344#endif
1345
1346#ifdef CONFIG_VB6801
1347static struct msm_camera_sensor_flash_data flash_vb6801 = {
1348 .flash_type = MSM_CAMERA_FLASH_LED,
1349 .flash_src = &msm_flash_src
1350};
1351
1352static struct msm_camera_sensor_info msm_camera_sensor_vb6801_data = {
1353 .sensor_name = "vb6801",
1354 .sensor_reset = 89,
1355 .sensor_pwd = 88,
1356 .vcm_pwd = 0,
1357 .vcm_enable = 0,
1358 .pdata = &msm_camera_device_data,
1359 .flash_data = &flash_vb6801
1360};
1361
1362static struct platform_device msm_camera_sensor_vb6801 = {
1363 .name = "msm_camera_vb6801",
1364 .dev = {
1365 .platform_data = &msm_camera_sensor_vb6801_data,
1366 },
1367};
1368#endif
1369#endif
1370
1371static u32 msm_calculate_batt_capacity(u32 current_voltage);
1372
1373static struct msm_psy_batt_pdata msm_psy_batt_data = {
1374 .voltage_min_design = 2800,
1375 .voltage_max_design = 4300,
1376 .avail_chg_sources = AC_CHG | USB_CHG ,
1377 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1378 .calculate_capacity = &msm_calculate_batt_capacity,
1379};
1380
1381static u32 msm_calculate_batt_capacity(u32 current_voltage)
1382{
1383 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1384 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1385
1386 return (current_voltage - low_voltage) * 100
1387 / (high_voltage - low_voltage);
1388}
1389
1390static struct platform_device msm_batt_device = {
1391 .name = "msm-battery",
1392 .id = -1,
1393 .dev.platform_data = &msm_psy_batt_data,
1394};
1395
1396
Daniel Walker2682fd32010-02-24 15:47:58 -08001397static struct platform_device *devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001398 &asoc_msm_pcm,
1399 &asoc_msm_dai0,
1400 &asoc_msm_dai1,
1401
Daniel Walker2682fd32010-02-24 15:47:58 -08001402 &msm_device_smd,
1403 &msm_device_dmov,
1404 &msm_device_nand,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001405
1406#ifdef CONFIG_USB_MSM_OTG_72K
1407 &msm_device_otg,
1408#ifdef CONFIG_USB_GADGET
1409 &msm_device_gadget_peripheral,
1410#endif
1411#endif
1412
1413#ifdef CONFIG_USB_FUNCTION
1414 &msm_device_hsusb_peripheral,
1415 &mass_storage_device,
1416#endif
1417
1418#ifdef CONFIG_USB_ANDROID
1419 &usb_mass_storage_device,
1420 &rndis_device,
1421#ifdef CONFIG_USB_ANDROID_DIAG
1422 &usb_diag_device,
1423#endif
1424#ifdef CONFIG_USB_F_SERIAL
1425 &usb_gadget_fserial_device,
1426#endif
1427 &android_usb_device,
1428#endif
1429 &msm_device_i2c,
Daniel Walker2682fd32010-02-24 15:47:58 -08001430 &smc91x_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001431 &msm_device_tssc,
1432 &android_pmem_device,
1433 &android_pmem_adsp_device,
1434 &android_pmem_audio_device,
1435 &msm_fb_device,
1436 &lcdc_gordon_panel_device,
1437 &msm_device_uart_dm1,
1438#ifdef CONFIG_BT
1439 &msm_bt_power_device,
1440#endif
1441 &msm_device_pmic_leds,
1442 &msm_device_snd,
1443 &msm_device_adspdec,
1444#ifdef CONFIG_MT9T013
1445 &msm_camera_sensor_mt9t013,
1446#endif
1447#ifdef CONFIG_MT9D112
1448 &msm_camera_sensor_mt9d112,
1449#endif
1450#ifdef CONFIG_S5K3E2FX
1451 &msm_camera_sensor_s5k3e2fx,
1452#endif
1453#ifdef CONFIG_MT9P012
1454 &msm_camera_sensor_mt9p012,
1455#endif
1456#ifdef CONFIG_MT9P012_KM
1457 &msm_camera_sensor_mt9p012_km,
1458#endif
1459#ifdef CONFIG_VB6801
1460 &msm_camera_sensor_vb6801,
1461#endif
1462 &msm_bluesleep_device,
1463#ifdef CONFIG_ARCH_MSM7X27
1464 &msm_kgsl_3d0,
1465#endif
1466#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1467 &msm_device_tsif,
1468#endif
1469 &hs_device,
1470 &msm_batt_device,
Daniel Walker2682fd32010-02-24 15:47:58 -08001471};
1472
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001473static struct msm_panel_common_pdata mdp_pdata = {
1474 .gpio = 97,
Ravishangar Kalyanam07ef7882011-08-09 15:50:48 -07001475 .mdp_rev = MDP_REV_30,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001476};
1477
1478static void __init msm_fb_add_devices(void)
1479{
1480 msm_fb_register_device("mdp", &mdp_pdata);
1481 msm_fb_register_device("pmdh", 0);
1482 msm_fb_register_device("lcdc", &lcdc_pdata);
1483}
1484
Daniel Walker2682fd32010-02-24 15:47:58 -08001485extern struct sys_timer msm_timer;
1486
1487static void __init msm7x2x_init_irq(void)
1488{
1489 msm_init_irq();
1490}
1491
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001492void msm_serial_debug_init(unsigned int base, int irq,
1493 struct device *clk_device, int signal_irq);
1494
1495#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1496 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1497 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1498 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1499
1500static unsigned long vreg_sts, gpio_sts;
1501static struct vreg *vreg_mmc;
1502static unsigned mpp_mmc = 2;
1503
1504struct sdcc_gpio {
1505 struct msm_gpio *cfg_data;
1506 uint32_t size;
1507 struct msm_gpio *sleep_cfg_data;
1508};
1509
1510static struct msm_gpio sdc1_cfg_data[] = {
1511 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_3"},
1512 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_2"},
1513 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_1"},
1514 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_0"},
1515 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_cmd"},
1516 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc1_clk"},
1517};
1518
1519static struct msm_gpio sdc2_cfg_data[] = {
1520 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc2_clk"},
1521 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_cmd"},
1522 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_3"},
1523 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_2"},
1524 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_1"},
1525 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_0"},
1526};
1527
1528static struct msm_gpio sdc2_sleep_cfg_data[] = {
1529 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_clk"},
1530 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_cmd"},
1531 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_3"},
1532 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_2"},
1533 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_1"},
1534 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_0"},
1535};
1536static struct msm_gpio sdc3_cfg_data[] = {
1537 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc3_clk"},
1538 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_cmd"},
1539 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_3"},
1540 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_2"},
1541 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_1"},
1542 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_0"},
1543};
1544
1545static struct msm_gpio sdc4_cfg_data[] = {
1546 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_3"},
1547 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_2"},
1548 {GPIO_CFG(21, 4, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_1"},
1549 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_cmd"},
1550 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_0"},
1551 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc4_clk"},
1552};
1553
1554static struct sdcc_gpio sdcc_cfg_data[] = {
1555 {
1556 .cfg_data = sdc1_cfg_data,
1557 .size = ARRAY_SIZE(sdc1_cfg_data),
1558 .sleep_cfg_data = NULL,
1559 },
1560 {
1561 .cfg_data = sdc2_cfg_data,
1562 .size = ARRAY_SIZE(sdc2_cfg_data),
1563 .sleep_cfg_data = sdc2_sleep_cfg_data,
1564 },
1565 {
1566 .cfg_data = sdc3_cfg_data,
1567 .size = ARRAY_SIZE(sdc3_cfg_data),
1568 .sleep_cfg_data = NULL,
1569 },
1570 {
1571 .cfg_data = sdc4_cfg_data,
1572 .size = ARRAY_SIZE(sdc4_cfg_data),
1573 .sleep_cfg_data = NULL,
1574 },
1575};
1576
1577static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1578{
1579 int rc = 0;
1580 struct sdcc_gpio *curr;
1581
1582 curr = &sdcc_cfg_data[dev_id - 1];
1583 if (!(test_bit(dev_id, &gpio_sts)^enable))
1584 return;
1585
1586 if (enable) {
1587 set_bit(dev_id, &gpio_sts);
1588 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1589 if (rc)
1590 printk(KERN_ERR "%s: Failed to turn on GPIOs for slot %d\n",
1591 __func__, dev_id);
1592 } else {
1593 clear_bit(dev_id, &gpio_sts);
1594 if (curr->sleep_cfg_data) {
1595 msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1596 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1597 return;
1598 }
1599 msm_gpios_disable_free(curr->cfg_data, curr->size);
1600 }
1601}
1602
1603static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1604{
1605 int rc = 0;
1606 struct platform_device *pdev;
1607
1608 pdev = container_of(dv, struct platform_device, dev);
1609 msm_sdcc_setup_gpio(pdev->id, !!vdd);
1610
1611 if (vdd == 0) {
1612 if (!vreg_sts)
1613 return 0;
1614
1615 clear_bit(pdev->id, &vreg_sts);
1616
1617 if (!vreg_sts) {
1618 if (machine_is_msm7x25_ffa() ||
1619 machine_is_msm7x27_ffa()) {
1620 rc = mpp_config_digital_out(mpp_mmc,
1621 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1622 MPP_DLOGIC_OUT_CTRL_LOW));
1623 } else
1624 rc = vreg_disable(vreg_mmc);
1625 if (rc)
1626 printk(KERN_ERR "%s: return val: %d \n",
1627 __func__, rc);
1628 }
1629 return 0;
1630 }
1631
1632 if (!vreg_sts) {
1633 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1634 rc = mpp_config_digital_out(mpp_mmc,
1635 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1636 MPP_DLOGIC_OUT_CTRL_HIGH));
1637 } else {
1638 rc = vreg_set_level(vreg_mmc, 2850);
1639 if (!rc)
1640 rc = vreg_enable(vreg_mmc);
1641 }
1642 if (rc)
1643 printk(KERN_ERR "%s: return val: %d \n",
1644 __func__, rc);
1645 }
1646 set_bit(pdev->id, &vreg_sts);
1647 return 0;
1648}
1649
1650#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1651static struct mmc_platform_data msm7x2x_sdc1_data = {
1652 .ocr_mask = MMC_VDD_28_29,
1653 .translate_vdd = msm_sdcc_setup_power,
1654 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1655 .msmsdcc_fmin = 144000,
1656 .msmsdcc_fmid = 24576000,
1657 .msmsdcc_fmax = 49152000,
1658 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001659};
1660#endif
1661
1662#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1663static struct mmc_platform_data msm7x2x_sdc2_data = {
1664 .ocr_mask = MMC_VDD_28_29,
1665 .translate_vdd = msm_sdcc_setup_power,
1666 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1667#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1668 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1669#endif
1670 .msmsdcc_fmin = 144000,
1671 .msmsdcc_fmid = 24576000,
1672 .msmsdcc_fmax = 49152000,
1673 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001674};
1675#endif
1676
1677#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1678static struct mmc_platform_data msm7x2x_sdc3_data = {
1679 .ocr_mask = MMC_VDD_28_29,
1680 .translate_vdd = msm_sdcc_setup_power,
1681 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1682 .msmsdcc_fmin = 144000,
1683 .msmsdcc_fmid = 24576000,
1684 .msmsdcc_fmax = 49152000,
1685 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001686};
1687#endif
1688
1689#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1690static struct mmc_platform_data msm7x2x_sdc4_data = {
1691 .ocr_mask = MMC_VDD_28_29,
1692 .translate_vdd = msm_sdcc_setup_power,
1693 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1694 .msmsdcc_fmin = 144000,
1695 .msmsdcc_fmid = 24576000,
1696 .msmsdcc_fmax = 49152000,
1697 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001698};
1699#endif
1700
1701static void __init msm7x2x_init_mmc(void)
1702{
1703 if (!machine_is_msm7x25_ffa() && !machine_is_msm7x27_ffa()) {
1704 vreg_mmc = vreg_get(NULL, "mmc");
1705 if (IS_ERR(vreg_mmc)) {
1706 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
1707 __func__, PTR_ERR(vreg_mmc));
1708 return;
1709 }
1710 }
1711
1712#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1713 msm_add_sdcc(1, &msm7x2x_sdc1_data);
1714#endif
1715
1716 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf() ||
1717 machine_is_msm7x27_ffa()) {
1718#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1719 msm_sdcc_setup_gpio(2, 1);
1720 msm_add_sdcc(2, &msm7x2x_sdc2_data);
1721#endif
1722 }
1723
1724 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf()) {
1725#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1726 msm_add_sdcc(3, &msm7x2x_sdc3_data);
1727#endif
1728#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1729 msm_add_sdcc(4, &msm7x2x_sdc4_data);
1730#endif
1731 }
1732}
1733#else
1734#define msm7x2x_init_mmc() do {} while (0)
1735#endif
1736
1737
1738static struct msm_pm_platform_data msm7x25_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1739 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 16000,
1740
1741 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 12000,
1742
1743 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 2000,
1744};
1745
1746static struct msm_pm_platform_data msm7x27_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1747 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1748 .idle_supported = 1,
1749 .suspend_supported = 1,
1750 .idle_enabled = 1,
1751 .suspend_enabled = 1,
1752 .latency = 16000,
1753 .residency = 20000,
1754 },
1755
1756 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1757 .idle_supported = 1,
1758 .suspend_supported = 1,
1759 .idle_enabled = 1,
1760 .suspend_enabled = 1,
1761 .latency = 12000,
1762 .residency = 20000,
1763 },
1764
1765 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1766 .idle_supported = 1,
1767 .suspend_supported = 1,
1768 .idle_enabled = 1,
1769 .suspend_enabled = 1,
1770 .latency = 2000,
1771 .residency = 0,
1772 },
1773};
1774
1775static void
1776msm_i2c_gpio_config(int iface, int config_type)
1777{
1778 int gpio_scl;
1779 int gpio_sda;
1780 if (iface) {
1781 gpio_scl = 95;
1782 gpio_sda = 96;
1783 } else {
1784 gpio_scl = 60;
1785 gpio_sda = 61;
1786 }
1787 if (config_type) {
1788 gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_CFG_INPUT,
1789 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1790 gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_CFG_INPUT,
1791 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1792 } else {
1793 gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_CFG_OUTPUT,
1794 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1795 gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_CFG_OUTPUT,
1796 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1797 }
1798}
1799
1800static struct msm_i2c_platform_data msm_i2c_pdata = {
1801 .clk_freq = 100000,
1802 .rmutex = 0,
1803 .pri_clk = 60,
1804 .pri_dat = 61,
1805 .aux_clk = 95,
1806 .aux_dat = 96,
1807 .msm_i2c_config_gpio = msm_i2c_gpio_config,
1808};
1809
1810static void __init msm_device_i2c_init(void)
1811{
1812 if (gpio_request(60, "i2c_pri_clk"))
1813 pr_err("failed to request gpio i2c_pri_clk\n");
1814 if (gpio_request(61, "i2c_pri_dat"))
1815 pr_err("failed to request gpio i2c_pri_dat\n");
1816 if (gpio_request(95, "i2c_sec_clk"))
1817 pr_err("failed to request gpio i2c_sec_clk\n");
1818 if (gpio_request(96, "i2c_sec_dat"))
1819 pr_err("failed to request gpio i2c_sec_dat\n");
1820
1821 if (cpu_is_msm7x27())
1822 msm_i2c_pdata.pm_lat =
1823 msm7x27_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1824 .latency;
1825 else
1826 msm_i2c_pdata.pm_lat =
1827 msm7x25_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1828 .latency;
1829
1830 msm_device_i2c.dev.platform_data = &msm_i2c_pdata;
1831}
1832
1833static void usb_mpp_init(void)
1834{
1835 unsigned rc;
1836 unsigned mpp_usb = 7;
1837
1838 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1839 rc = mpp_config_digital_out(mpp_usb,
1840 MPP_CFG(MPP_DLOGIC_LVL_VDD,
1841 MPP_DLOGIC_OUT_CTRL_HIGH));
1842 if (rc)
1843 pr_err("%s: configuring mpp pin"
1844 "to enable 3.3V LDO failed\n", __func__);
1845 }
1846}
1847
1848static void msm7x27_wlan_init(void)
1849{
1850 int rc = 0;
1851 /* TBD: if (machine_is_msm7x27_ffa_with_wcn1312()) */
1852 if (machine_is_msm7x27_ffa()) {
1853 rc = mpp_config_digital_out(3, MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1854 MPP_DLOGIC_OUT_CTRL_LOW));
1855 if (rc)
1856 printk(KERN_ERR "%s: return val: %d \n",
1857 __func__, rc);
1858 }
1859}
1860
Daniel Walker2682fd32010-02-24 15:47:58 -08001861static void __init msm7x2x_init(void)
1862{
Daniel Walker2682fd32010-02-24 15:47:58 -08001863
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864#ifdef CONFIG_ARCH_MSM7X25
1865 msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
1866#elif defined(CONFIG_ARCH_MSM7X27)
Stephen Boydbb600ae2011-08-02 20:11:40 -07001867 msm_clock_init(&msm7x27_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001868#endif
1869
1870#if defined(CONFIG_SMC91X)
Daniel Walker2682fd32010-02-24 15:47:58 -08001871 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1872 smc91x_resources[0].start = 0x98000300;
1873 smc91x_resources[0].end = 0x980003ff;
1874 smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
1875 smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
1876 if (gpio_tlmm_config(GPIO_CFG(85, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001877 GPIO_CFG_INPUT,
1878 GPIO_CFG_PULL_DOWN,
1879 GPIO_CFG_2MA),
1880 GPIO_CFG_ENABLE)) {
Daniel Walker2682fd32010-02-24 15:47:58 -08001881 printk(KERN_ERR
1882 "%s: Err: Config GPIO-85 INT\n",
1883 __func__);
1884 }
1885 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001886#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001887 if (cpu_is_msm7x27())
Matt Wagantallec57f062011-08-16 23:54:46 -07001888 acpuclk_init(&acpuclk_7x27_soc_data);
1889 else
1890 acpuclk_init(&acpuclk_7201_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001891
1892 usb_mpp_init();
1893
1894#ifdef CONFIG_USB_FUNCTION
1895 msm_hsusb_pdata.swfi_latency =
1896 msm7x27_pm_data
1897 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
1898
1899 msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata;
1900#endif
1901
1902#ifdef CONFIG_USB_MSM_OTG_72K
1903 msm_device_otg.dev.platform_data = &msm_otg_pdata;
1904 if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa()) {
1905 msm_otg_pdata.pemp_level =
1906 PRE_EMPHASIS_WITH_20_PERCENT;
1907 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1908 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_ENABLE;
1909 msm_otg_pdata.phy_reset = msm_otg_rpc_phy_reset;
1910 }
1911 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
1912 msm_otg_pdata.pemp_level =
1913 PRE_EMPHASIS_WITH_10_PERCENT;
1914 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1915 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_DISABLE;
1916 msm_otg_pdata.phy_reset_sig_inverted = 1;
1917 }
1918
1919#ifdef CONFIG_USB_GADGET
1920 msm_otg_pdata.swfi_latency =
1921 msm7x27_pm_data
1922 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
1923 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
1924 msm_gadget_pdata.is_phy_status_timer_on = 1;
1925#endif
1926#endif
1927#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1928 msm_device_tsif.dev.platform_data = &tsif_platform_data;
1929#endif
1930 platform_add_devices(msm_footswitch_devices,
1931 msm_num_footswitch_devices);
Daniel Walker2682fd32010-02-24 15:47:58 -08001932 platform_add_devices(devices, ARRAY_SIZE(devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001933#ifdef CONFIG_MSM_CAMERA
1934 config_camera_off_gpios(); /* might not be necessary */
1935#endif
1936 msm_device_i2c_init();
1937 i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
1938
1939#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
1940 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
1941 platform_device_register(&keypad_device_7k_ffa);
1942 else
1943 platform_device_register(&keypad_device_surf);
1944#endif
1945 lcdc_gordon_gpio_init();
1946 msm_fb_add_devices();
1947#ifdef CONFIG_USB_EHCI_MSM_72K
1948 msm7x2x_init_host();
1949#endif
1950 msm7x2x_init_mmc();
1951 bt_power_init();
1952
1953 if (cpu_is_msm7x27())
1954 msm_pm_set_platform_data(msm7x27_pm_data,
1955 ARRAY_SIZE(msm7x27_pm_data));
1956 else
1957 msm_pm_set_platform_data(msm7x25_pm_data,
1958 ARRAY_SIZE(msm7x25_pm_data));
1959 msm7x27_wlan_init();
1960}
1961
1962static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
1963static int __init pmem_kernel_ebi1_size_setup(char *p)
1964{
1965 pmem_kernel_ebi1_size = memparse(p, NULL);
1966 return 0;
1967}
1968early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
1969
1970static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1971static int __init pmem_mdp_size_setup(char *p)
1972{
1973 pmem_mdp_size = memparse(p, NULL);
1974 return 0;
1975}
1976early_param("pmem_mdp_size", pmem_mdp_size_setup);
1977
1978static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1979static int __init pmem_adsp_size_setup(char *p)
1980{
1981 pmem_adsp_size = memparse(p, NULL);
1982 return 0;
1983}
1984early_param("pmem_adsp_size", pmem_adsp_size_setup);
1985
1986static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
1987static int __init pmem_audio_size_setup(char *p)
1988{
1989 pmem_audio_size = memparse(p, NULL);
1990 return 0;
1991}
1992early_param("pmem_audio_size", pmem_audio_size_setup);
1993
1994static unsigned fb_size = MSM_FB_SIZE;
1995static int __init fb_size_setup(char *p)
1996{
1997 fb_size = memparse(p, NULL);
1998 return 0;
1999}
2000early_param("fb_size", fb_size_setup);
2001
2002static void __init msm_msm7x2x_allocate_memory_regions(void)
2003{
2004 void *addr;
2005 unsigned long size;
2006
2007 size = fb_size ? : MSM_FB_SIZE;
2008 addr = alloc_bootmem_align(size, 0x1000);
2009 msm_fb_resources[0].start = __pa(addr);
2010 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2011 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2012 size, addr, __pa(addr));
2013}
2014
2015static struct memtype_reserve msm7x27_reserve_table[] __initdata = {
2016 [MEMTYPE_SMI] = {
2017 },
2018 [MEMTYPE_EBI0] = {
2019 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2020 },
2021 [MEMTYPE_EBI1] = {
2022 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2023 },
2024};
2025
2026static void __init size_pmem_devices(void)
2027{
2028#ifdef CONFIG_ANDROID_PMEM
2029 android_pmem_adsp_pdata.size = pmem_adsp_size;
2030 android_pmem_pdata.size = pmem_mdp_size;
2031 android_pmem_audio_pdata.size = pmem_audio_size;
2032#endif
2033}
2034
2035static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2036{
2037 msm7x27_reserve_table[p->memory_type].size += p->size;
2038}
2039
2040static void __init reserve_pmem_memory(void)
2041{
2042#ifdef CONFIG_ANDROID_PMEM
2043 reserve_memory_for(&android_pmem_adsp_pdata);
2044 reserve_memory_for(&android_pmem_pdata);
2045 reserve_memory_for(&android_pmem_audio_pdata);
2046 msm7x27_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2047#endif
2048}
2049
2050static void __init msm7x27_calculate_reserve_sizes(void)
2051{
2052 size_pmem_devices();
2053 reserve_pmem_memory();
2054}
2055
2056static int msm7x27_paddr_to_memtype(unsigned int paddr)
2057{
2058 return MEMTYPE_EBI1;
2059}
2060
2061static struct reserve_info msm7x27_reserve_info __initdata = {
2062 .memtype_reserve_table = msm7x27_reserve_table,
2063 .calculate_reserve_sizes = msm7x27_calculate_reserve_sizes,
2064 .paddr_to_memtype = msm7x27_paddr_to_memtype,
2065};
2066
2067static void __init msm7x27_reserve(void)
2068{
2069 reserve_info = &msm7x27_reserve_info;
2070 msm_reserve();
2071}
2072
2073static void __init msm7x27_init_early(void)
2074{
2075 msm_msm7x2x_allocate_memory_regions();
Daniel Walker2682fd32010-02-24 15:47:58 -08002076}
2077
2078static void __init msm7x2x_map_io(void)
2079{
2080 msm_map_common_io();
Daniel Walker2682fd32010-02-24 15:47:58 -08002081
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002082 if (socinfo_init() < 0)
2083 BUG();
Daniel Walker2682fd32010-02-24 15:47:58 -08002084
2085#ifdef CONFIG_CACHE_L2X0
2086 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
2087 /* 7x27 has 256KB L2 cache:
2088 64Kb/Way and 4-Way Associativity;
Daniel Walker2682fd32010-02-24 15:47:58 -08002089 evmon/parity/share disabled. */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002090 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) > 1)
2091 || ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
2092 && (SOCINFO_VERSION_MINOR(socinfo_get_version()) >= 3)))
2093 /* R/W latency: 4 cycles; */
2094 l2x0_init(MSM_L2CC_BASE, 0x0006801B, 0xfe000000);
2095 else
2096 /* R/W latency: 3 cycles; */
2097 l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000);
Daniel Walker2682fd32010-02-24 15:47:58 -08002098 }
2099#endif
2100}
2101
2102MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00002103 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002104 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002105 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002106 .init_irq = msm7x2x_init_irq,
2107 .init_machine = msm7x2x_init,
2108 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002109 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002110MACHINE_END
2111
2112MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00002113 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002114 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002115 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002116 .init_irq = msm7x2x_init_irq,
2117 .init_machine = msm7x2x_init,
2118 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002119 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002120MACHINE_END
2121
2122MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00002123 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002124 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002125 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002126 .init_irq = msm7x2x_init_irq,
2127 .init_machine = msm7x2x_init,
2128 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002129 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002130MACHINE_END
2131
2132MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00002133 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002134 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002135 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002136 .init_irq = msm7x2x_init_irq,
2137 .init_machine = msm7x2x_init,
2138 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002139 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002140MACHINE_END