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gerrit-public.fairphone.software / fp2-dev / platform / dalvik / 30bc0d46ae730d78c42c39cfa56a59ba3025380b / . / vm / mterp / out / InterpC-armv7-a-neon.cpp
blob: 18ebfd377669189b44407f2ffef074f1df7acb82 [file] [log] [blame]
Carl Shapirocd8f5e72011-04-20 16:12:46 -0700[diff] [blame]1/*
2 * This file was generated automatically by gen-mterp.py for 'armv7-a-neon'.
3 *
4 * --> DO NOT EDIT <--
5 */
6
7/* File: c/header.cpp */
8/*
9 * Copyright (C) 2008 The Android Open Source Project
10 *
11 * Licensed under the Apache License, Version 2.0 (the "License");
12 * you may not use this file except in compliance with the License.
13 * You may obtain a copy of the License at
14 *
15 * http://www.apache.org/licenses/LICENSE-2.0
16 *
17 * Unless required by applicable law or agreed to in writing, software
18 * distributed under the License is distributed on an "AS IS" BASIS,
19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
20 * See the License for the specific language governing permissions and
21 * limitations under the License.
22 */
23
24/* common includes */
25#include "Dalvik.h"
26#include "interp/InterpDefs.h"
27#include "mterp/Mterp.h"
28#include <math.h> // needed for fmod, fmodf
29#include "mterp/common/FindInterface.h"
30
31/*
32 * Configuration defines. These affect the C implementations, i.e. the
33 * portable interpreter(s) and C stubs.
34 *
35 * Some defines are controlled by the Makefile, e.g.:
36 * WITH_INSTR_CHECKS
37 * WITH_TRACKREF_CHECKS
38 * EASY_GDB
39 * NDEBUG
40 */
41
42#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
43# define CHECK_BRANCH_OFFSETS
44# define CHECK_REGISTER_INDICES
45#endif
46
47/*
48 * Some architectures require 64-bit alignment for access to 64-bit data
49 * types. We can't just use pointers to copy 64-bit values out of our
50 * interpreted register set, because gcc may assume the pointer target is
51 * aligned and generate invalid code.
52 *
53 * There are two common approaches:
54 * (1) Use a union that defines a 32-bit pair and a 64-bit value.
55 * (2) Call memcpy().
56 *
57 * Depending upon what compiler you're using and what options are specified,
58 * one may be faster than the other. For example, the compiler might
59 * convert a memcpy() of 8 bytes into a series of instructions and omit
60 * the call. The union version could cause some strange side-effects,
61 * e.g. for a while ARM gcc thought it needed separate storage for each
62 * inlined instance, and generated instructions to zero out ~700 bytes of
63 * stack space at the top of the interpreter.
64 *
65 * The default is to use memcpy(). The current gcc for ARM seems to do
66 * better with the union.
67 */
68#if defined(__ARM_EABI__)
69# define NO_UNALIGN_64__UNION
70#endif
71
72
73//#define LOG_INSTR /* verbose debugging */
74/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
75
76/*
77 * Keep a tally of accesses to fields. Currently only works if full DEX
78 * optimization is disabled.
79 */
80#ifdef PROFILE_FIELD_ACCESS
81# define UPDATE_FIELD_GET(_field) { (_field)->gets++; }
82# define UPDATE_FIELD_PUT(_field) { (_field)->puts++; }
83#else
84# define UPDATE_FIELD_GET(_field) ((void)0)
85# define UPDATE_FIELD_PUT(_field) ((void)0)
86#endif
87
88/*
89 * Export another copy of the PC on every instruction; this is largely
90 * redundant with EXPORT_PC and the debugger code. This value can be
91 * compared against what we have stored on the stack with EXPORT_PC to
92 * help ensure that we aren't missing any export calls.
93 */
94#if WITH_EXTRA_GC_CHECKS > 1
95# define EXPORT_EXTRA_PC() (self->currentPc2 = pc)
96#else
97# define EXPORT_EXTRA_PC()
98#endif
99
100/*
101 * Adjust the program counter. "_offset" is a signed int, in 16-bit units.
102 *
103 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
104 *
105 * We don't advance the program counter until we finish an instruction or
106 * branch, because we do want to have to unroll the PC if there's an
107 * exception.
108 */
109#ifdef CHECK_BRANCH_OFFSETS
110# define ADJUST_PC(_offset) do { \
111 int myoff = _offset; /* deref only once */ \
112 if (pc + myoff < curMethod->insns || \
113 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
114 { \
115 char* desc; \
116 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
117 LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \
118 myoff, (int) (pc - curMethod->insns), \
119 curMethod->clazz->descriptor, curMethod->name, desc); \
120 free(desc); \
121 dvmAbort(); \
122 } \
123 pc += myoff; \
124 EXPORT_EXTRA_PC(); \
125 } while (false)
126#else
127# define ADJUST_PC(_offset) do { \
128 pc += _offset; \
129 EXPORT_EXTRA_PC(); \
130 } while (false)
131#endif
132
133/*
134 * If enabled, log instructions as we execute them.
135 */
136#ifdef LOG_INSTR
137# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
138# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
139# define ILOG(_level, ...) do { \
140 char debugStrBuf[128]; \
141 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
142 if (curMethod != NULL) \
143 LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \
144 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
145 else \
146 LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \
147 self->threadId, debugStrBuf); \
148 } while(false)
149void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
150# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
151static const char kSpacing[] = " ";
152#else
153# define ILOGD(...) ((void)0)
154# define ILOGV(...) ((void)0)
155# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
156#endif
157
158/* get a long from an array of u4 */
159static inline s8 getLongFromArray(const u4* ptr, int idx)
160{
161#if defined(NO_UNALIGN_64__UNION)
162 union { s8 ll; u4 parts[2]; } conv;
163
164 ptr += idx;
165 conv.parts[0] = ptr[0];
166 conv.parts[1] = ptr[1];
167 return conv.ll;
168#else
169 s8 val;
170 memcpy(&val, &ptr[idx], 8);
171 return val;
172#endif
173}
174
175/* store a long into an array of u4 */
176static inline void putLongToArray(u4* ptr, int idx, s8 val)
177{
178#if defined(NO_UNALIGN_64__UNION)
179 union { s8 ll; u4 parts[2]; } conv;
180
181 ptr += idx;
182 conv.ll = val;
183 ptr[0] = conv.parts[0];
184 ptr[1] = conv.parts[1];
185#else
186 memcpy(&ptr[idx], &val, 8);
187#endif
188}
189
190/* get a double from an array of u4 */
191static inline double getDoubleFromArray(const u4* ptr, int idx)
192{
193#if defined(NO_UNALIGN_64__UNION)
194 union { double d; u4 parts[2]; } conv;
195
196 ptr += idx;
197 conv.parts[0] = ptr[0];
198 conv.parts[1] = ptr[1];
199 return conv.d;
200#else
201 double dval;
202 memcpy(&dval, &ptr[idx], 8);
203 return dval;
204#endif
205}
206
207/* store a double into an array of u4 */
208static inline void putDoubleToArray(u4* ptr, int idx, double dval)
209{
210#if defined(NO_UNALIGN_64__UNION)
211 union { double d; u4 parts[2]; } conv;
212
213 ptr += idx;
214 conv.d = dval;
215 ptr[0] = conv.parts[0];
216 ptr[1] = conv.parts[1];
217#else
218 memcpy(&ptr[idx], &dval, 8);
219#endif
220}
221
222/*
223 * If enabled, validate the register number on every access. Otherwise,
224 * just do an array access.
225 *
226 * Assumes the existence of "u4* fp".
227 *
228 * "_idx" may be referenced more than once.
229 */
230#ifdef CHECK_REGISTER_INDICES
231# define GET_REGISTER(_idx) \
232 ( (_idx) < curMethod->registersSize ? \
233 (fp[(_idx)]) : (assert(!"bad reg"),1969) )
234# define SET_REGISTER(_idx, _val) \
235 ( (_idx) < curMethod->registersSize ? \
236 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
237# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
238# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
239# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
240# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
241# define GET_REGISTER_WIDE(_idx) \
242 ( (_idx) < curMethod->registersSize-1 ? \
243 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
244# define SET_REGISTER_WIDE(_idx, _val) \
245 ( (_idx) < curMethod->registersSize-1 ? \
246 putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) )
247# define GET_REGISTER_FLOAT(_idx) \
248 ( (_idx) < curMethod->registersSize ? \
249 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
250# define SET_REGISTER_FLOAT(_idx, _val) \
251 ( (_idx) < curMethod->registersSize ? \
252 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
253# define GET_REGISTER_DOUBLE(_idx) \
254 ( (_idx) < curMethod->registersSize-1 ? \
255 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
256# define SET_REGISTER_DOUBLE(_idx, _val) \
257 ( (_idx) < curMethod->registersSize-1 ? \
258 putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) )
259#else
260# define GET_REGISTER(_idx) (fp[(_idx)])
261# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
262# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
263# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
264# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
265# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
266# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
267# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
268# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
269# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
270# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
271# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
272#endif
273
274/*
275 * Get 16 bits from the specified offset of the program counter. We always
276 * want to load 16 bits at a time from the instruction stream -- it's more
277 * efficient than 8 and won't have the alignment problems that 32 might.
278 *
279 * Assumes existence of "const u2* pc".
280 */
281#define FETCH(_offset) (pc[(_offset)])
282
283/*
284 * Extract instruction byte from 16-bit fetch (_inst is a u2).
285 */
286#define INST_INST(_inst) ((_inst) & 0xff)
287
288/*
289 * Replace the opcode (used when handling breakpoints). _opcode is a u1.
290 */
291#define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode)
292
293/*
294 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
295 */
296#define INST_A(_inst) (((_inst) >> 8) & 0x0f)
297#define INST_B(_inst) ((_inst) >> 12)
298
299/*
300 * Get the 8-bit "vAA" 8-bit register index from the instruction word.
301 * (_inst is u2)
302 */
303#define INST_AA(_inst) ((_inst) >> 8)
304
305/*
306 * The current PC must be available to Throwable constructors, e.g.
307 * those created by the various exception throw routines, so that the
308 * exception stack trace can be generated correctly. If we don't do this,
309 * the offset within the current method won't be shown correctly. See the
310 * notes in Exception.c.
311 *
312 * This is also used to determine the address for precise GC.
313 *
314 * Assumes existence of "u4* fp" and "const u2* pc".
315 */
316#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
317
318/*
319 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the
320 * pc has already been exported to the stack.
321 *
322 * Perform additional checks on debug builds.
323 *
324 * Use this to check for NULL when the instruction handler calls into
325 * something that could throw an exception (so we have already called
326 * EXPORT_PC at the top).
327 */
328static inline bool checkForNull(Object* obj)
329{
330 if (obj == NULL) {
331 dvmThrowNullPointerException(NULL);
332 return false;
333 }
334#ifdef WITH_EXTRA_OBJECT_VALIDATION
335 if (!dvmIsValidObject(obj)) {
336 LOGE("Invalid object %p\n", obj);
337 dvmAbort();
338 }
339#endif
340#ifndef NDEBUG
341 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
342 /* probable heap corruption */
343 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
344 dvmAbort();
345 }
346#endif
347 return true;
348}
349
350/*
351 * Check to see if "obj" is NULL. If so, export the PC into the stack
352 * frame and throw an exception.
353 *
354 * Perform additional checks on debug builds.
355 *
356 * Use this to check for NULL when the instruction handler doesn't do
357 * anything else that can throw an exception.
358 */
359static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
360{
361 if (obj == NULL) {
362 EXPORT_PC();
363 dvmThrowNullPointerException(NULL);
364 return false;
365 }
366#ifdef WITH_EXTRA_OBJECT_VALIDATION
367 if (!dvmIsValidObject(obj)) {
368 LOGE("Invalid object %p\n", obj);
369 dvmAbort();
370 }
371#endif
372#ifndef NDEBUG
373 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
374 /* probable heap corruption */
375 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
376 dvmAbort();
377 }
378#endif
379 return true;
380}
381
382/* File: cstubs/stubdefs.cpp */
383/*
384 * In the C mterp stubs, "goto" is a function call followed immediately
385 * by a return.
386 */
387
388#define GOTO_TARGET_DECL(_target, ...) \
389 extern "C" void dvmMterp_##_target(Thread* self, ## __VA_ARGS__);
390
391/* (void)xxx to quiet unused variable compiler warnings. */
392#define GOTO_TARGET(_target, ...) \
393 void dvmMterp_##_target(Thread* self, ## __VA_ARGS__) { \
394 u2 ref, vsrc1, vsrc2, vdst; \
395 u2 inst = FETCH(0); \
396 const Method* methodToCall; \
397 StackSaveArea* debugSaveArea; \
398 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst; \
399 (void)methodToCall; (void)debugSaveArea;
400
401#define GOTO_TARGET_END }
402
403/*
404 * Redefine what used to be local variable accesses into Thread struct
405 * references. (These are undefined down in "footer.c".)
406 */
407#define retval self->retval
408#define pc self->interpSave.pc
buzbee30bc0d42011-04-22 10:27:14 -0700[diff] [blame^]409#define fp self->interpSave.curFrame
Carl Shapirocd8f5e72011-04-20 16:12:46 -0700[diff] [blame]410#define curMethod self->interpSave.method
411#define methodClassDex self->interpSave.methodClassDex
412#define debugTrackedRefStart self->interpSave.debugTrackedRefStart
413
414/* ugh */
415#define STUB_HACK(x) x
416#if defined(WITH_JIT)
417#define JIT_STUB_HACK(x) x
418#else
419#define JIT_STUB_HACK(x)
420#endif
421
422/*
423 * InterpSave's pc and fp must be valid when breaking out to a
424 * "Reportxxx" routine. Because the portable interpreter uses local
425 * variables for these, we must flush prior. Stubs, however, use
426 * the interpSave vars directly, so this is a nop for stubs.
427 */
428#define PC_FP_TO_SELF()
buzbee30bc0d42011-04-22 10:27:14 -0700[diff] [blame^]429#define PC_TO_SELF()
Carl Shapirocd8f5e72011-04-20 16:12:46 -0700[diff] [blame]430
431/*
432 * Opcode handler framing macros. Here, each opcode is a separate function
433 * that takes a "self" argument and returns void. We can't declare
434 * these "static" because they may be called from an assembly stub.
435 * (void)xxx to quiet unused variable compiler warnings.
436 */
437#define HANDLE_OPCODE(_op) \
438 extern "C" void dvmMterp_##_op(Thread* self); \
439 void dvmMterp_##_op(Thread* self) { \
440 u4 ref; \
441 u2 vsrc1, vsrc2, vdst; \
442 u2 inst = FETCH(0); \
443 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst;
444
445#define OP_END }
446
447/*
448 * Like the "portable" FINISH, but don't reload "inst", and return to caller
449 * when done. Further, debugger/profiler checks are handled
450 * before handler execution in mterp, so we don't do them here either.
451 */
452#if defined(WITH_JIT)
453#define FINISH(_offset) { \
454 ADJUST_PC(_offset); \
455 if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
456 dvmCheckJit(pc, self); \
457 } \
458 return; \
459 }
460#else
461#define FINISH(_offset) { \
462 ADJUST_PC(_offset); \
463 return; \
464 }
465#endif
466
467
468/*
469 * The "goto label" statements turn into function calls followed by
470 * return statements. Some of the functions take arguments, which in the
471 * portable interpreter are handled by assigning values to globals.
472 */
473
474#define GOTO_exceptionThrown() \
475 do { \
476 dvmMterp_exceptionThrown(self); \
477 return; \
478 } while(false)
479
480#define GOTO_returnFromMethod() \
481 do { \
482 dvmMterp_returnFromMethod(self); \
483 return; \
484 } while(false)
485
486#define GOTO_invoke(_target, _methodCallRange, _jumboFormat) \
487 do { \
488 dvmMterp_##_target(self, _methodCallRange, _jumboFormat); \
489 return; \
490 } while(false)
491
492#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \
493 do { \
494 dvmMterp_invokeMethod(self, _methodCallRange, _methodToCall, \
495 _vsrc1, _vdst); \
496 return; \
497 } while(false)
498
499/*
500 * As a special case, "goto bail" turns into a longjmp.
501 */
502#define GOTO_bail() \
503 dvmMterpStdBail(self, false);
504
505/*
506 * Periodically check for thread suspension.
507 *
508 * While we're at it, see if a debugger has attached or the profiler has
509 * started.
510 */
511#define PERIODIC_CHECKS(_pcadj) { \
512 if (dvmCheckSuspendQuick(self)) { \
513 EXPORT_PC(); /* need for precise GC */ \
514 dvmCheckSuspendPending(self); \
515 } \
516 }
517
518/* File: c/opcommon.cpp */
519/* forward declarations of goto targets */
520GOTO_TARGET_DECL(filledNewArray, bool methodCallRange, bool jumboFormat);
521GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange, bool jumboFormat);
522GOTO_TARGET_DECL(invokeSuper, bool methodCallRange, bool jumboFormat);
523GOTO_TARGET_DECL(invokeInterface, bool methodCallRange, bool jumboFormat);
524GOTO_TARGET_DECL(invokeDirect, bool methodCallRange, bool jumboFormat);
525GOTO_TARGET_DECL(invokeStatic, bool methodCallRange, bool jumboFormat);
526GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange, bool jumboFormat);
527GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange, bool jumboFormat);
528GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
529 u2 count, u2 regs);
530GOTO_TARGET_DECL(returnFromMethod);
531GOTO_TARGET_DECL(exceptionThrown);
532
533/*
534 * ===========================================================================
535 *
536 * What follows are opcode definitions shared between multiple opcodes with
537 * minor substitutions handled by the C pre-processor. These should probably
538 * use the mterp substitution mechanism instead, with the code here moved
539 * into common fragment files (like the asm "binop.S"), although it's hard
540 * to give up the C preprocessor in favor of the much simpler text subst.
541 *
542 * ===========================================================================
543 */
544
545#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
546 HANDLE_OPCODE(_opcode /*vA, vB*/) \
547 vdst = INST_A(inst); \
548 vsrc1 = INST_B(inst); \
549 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
550 SET_REGISTER##_totype(vdst, \
551 GET_REGISTER##_fromtype(vsrc1)); \
552 FINISH(1);
553
554#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
555 _tovtype, _tortype) \
556 HANDLE_OPCODE(_opcode /*vA, vB*/) \
557 { \
558 /* spec defines specific handling for +/- inf and NaN values */ \
559 _fromvtype val; \
560 _tovtype intMin, intMax, result; \
561 vdst = INST_A(inst); \
562 vsrc1 = INST_B(inst); \
563 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
564 val = GET_REGISTER##_fromrtype(vsrc1); \
565 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
566 intMax = ~intMin; \
567 result = (_tovtype) val; \
568 if (val >= intMax) /* +inf */ \
569 result = intMax; \
570 else if (val <= intMin) /* -inf */ \
571 result = intMin; \
572 else if (val != val) /* NaN */ \
573 result = 0; \
574 else \
575 result = (_tovtype) val; \
576 SET_REGISTER##_tortype(vdst, result); \
577 } \
578 FINISH(1);
579
580#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
581 HANDLE_OPCODE(_opcode /*vA, vB*/) \
582 vdst = INST_A(inst); \
583 vsrc1 = INST_B(inst); \
584 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
585 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
586 FINISH(1);
587
588/* NOTE: the comparison result is always a signed 4-byte integer */
589#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
590 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
591 { \
592 int result; \
593 u2 regs; \
594 _varType val1, val2; \
595 vdst = INST_AA(inst); \
596 regs = FETCH(1); \
597 vsrc1 = regs & 0xff; \
598 vsrc2 = regs >> 8; \
599 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
600 val1 = GET_REGISTER##_type(vsrc1); \
601 val2 = GET_REGISTER##_type(vsrc2); \
602 if (val1 == val2) \
603 result = 0; \
604 else if (val1 < val2) \
605 result = -1; \
606 else if (val1 > val2) \
607 result = 1; \
608 else \
609 result = (_nanVal); \
610 ILOGV("+ result=%d\n", result); \
611 SET_REGISTER(vdst, result); \
612 } \
613 FINISH(2);
614
615#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
616 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
617 vsrc1 = INST_A(inst); \
618 vsrc2 = INST_B(inst); \
619 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
620 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
621 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
622 branchOffset); \
623 ILOGV("> branch taken"); \
624 if (branchOffset < 0) \
625 PERIODIC_CHECKS(branchOffset); \
626 FINISH(branchOffset); \
627 } else { \
628 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
629 FINISH(2); \
630 }
631
632#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
633 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
634 vsrc1 = INST_AA(inst); \
635 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
636 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
637 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
638 ILOGV("> branch taken"); \
639 if (branchOffset < 0) \
640 PERIODIC_CHECKS(branchOffset); \
641 FINISH(branchOffset); \
642 } else { \
643 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
644 FINISH(2); \
645 }
646
647#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
648 HANDLE_OPCODE(_opcode /*vA, vB*/) \
649 vdst = INST_A(inst); \
650 vsrc1 = INST_B(inst); \
651 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
652 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
653 FINISH(1);
654
655#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
656 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
657 { \
658 u2 srcRegs; \
659 vdst = INST_AA(inst); \
660 srcRegs = FETCH(1); \
661 vsrc1 = srcRegs & 0xff; \
662 vsrc2 = srcRegs >> 8; \
663 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
664 if (_chkdiv != 0) { \
665 s4 firstVal, secondVal, result; \
666 firstVal = GET_REGISTER(vsrc1); \
667 secondVal = GET_REGISTER(vsrc2); \
668 if (secondVal == 0) { \
669 EXPORT_PC(); \
670 dvmThrowArithmeticException("divide by zero"); \
671 GOTO_exceptionThrown(); \
672 } \
673 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
674 if (_chkdiv == 1) \
675 result = firstVal; /* division */ \
676 else \
677 result = 0; /* remainder */ \
678 } else { \
679 result = firstVal _op secondVal; \
680 } \
681 SET_REGISTER(vdst, result); \
682 } else { \
683 /* non-div/rem case */ \
684 SET_REGISTER(vdst, \
685 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
686 } \
687 } \
688 FINISH(2);
689
690#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
691 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
692 { \
693 u2 srcRegs; \
694 vdst = INST_AA(inst); \
695 srcRegs = FETCH(1); \
696 vsrc1 = srcRegs & 0xff; \
697 vsrc2 = srcRegs >> 8; \
698 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
699 SET_REGISTER(vdst, \
700 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
701 } \
702 FINISH(2);
703
704#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
705 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
706 vdst = INST_A(inst); \
707 vsrc1 = INST_B(inst); \
708 vsrc2 = FETCH(1); \
709 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
710 (_opname), vdst, vsrc1, vsrc2); \
711 if (_chkdiv != 0) { \
712 s4 firstVal, result; \
713 firstVal = GET_REGISTER(vsrc1); \
714 if ((s2) vsrc2 == 0) { \
715 EXPORT_PC(); \
716 dvmThrowArithmeticException("divide by zero"); \
717 GOTO_exceptionThrown(); \
718 } \
719 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
720 /* won't generate /lit16 instr for this; check anyway */ \
721 if (_chkdiv == 1) \
722 result = firstVal; /* division */ \
723 else \
724 result = 0; /* remainder */ \
725 } else { \
726 result = firstVal _op (s2) vsrc2; \
727 } \
728 SET_REGISTER(vdst, result); \
729 } else { \
730 /* non-div/rem case */ \
731 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
732 } \
733 FINISH(2);
734
735#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
736 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
737 { \
738 u2 litInfo; \
739 vdst = INST_AA(inst); \
740 litInfo = FETCH(1); \
741 vsrc1 = litInfo & 0xff; \
742 vsrc2 = litInfo >> 8; /* constant */ \
743 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
744 (_opname), vdst, vsrc1, vsrc2); \
745 if (_chkdiv != 0) { \
746 s4 firstVal, result; \
747 firstVal = GET_REGISTER(vsrc1); \
748 if ((s1) vsrc2 == 0) { \
749 EXPORT_PC(); \
750 dvmThrowArithmeticException("divide by zero"); \
751 GOTO_exceptionThrown(); \
752 } \
753 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
754 if (_chkdiv == 1) \
755 result = firstVal; /* division */ \
756 else \
757 result = 0; /* remainder */ \
758 } else { \
759 result = firstVal _op ((s1) vsrc2); \
760 } \
761 SET_REGISTER(vdst, result); \
762 } else { \
763 SET_REGISTER(vdst, \
764 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
765 } \
766 } \
767 FINISH(2);
768
769#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
770 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
771 { \
772 u2 litInfo; \
773 vdst = INST_AA(inst); \
774 litInfo = FETCH(1); \
775 vsrc1 = litInfo & 0xff; \
776 vsrc2 = litInfo >> 8; /* constant */ \
777 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
778 (_opname), vdst, vsrc1, vsrc2); \
779 SET_REGISTER(vdst, \
780 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
781 } \
782 FINISH(2);
783
784#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
785 HANDLE_OPCODE(_opcode /*vA, vB*/) \
786 vdst = INST_A(inst); \
787 vsrc1 = INST_B(inst); \
788 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
789 if (_chkdiv != 0) { \
790 s4 firstVal, secondVal, result; \
791 firstVal = GET_REGISTER(vdst); \
792 secondVal = GET_REGISTER(vsrc1); \
793 if (secondVal == 0) { \
794 EXPORT_PC(); \
795 dvmThrowArithmeticException("divide by zero"); \
796 GOTO_exceptionThrown(); \
797 } \
798 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
799 if (_chkdiv == 1) \
800 result = firstVal; /* division */ \
801 else \
802 result = 0; /* remainder */ \
803 } else { \
804 result = firstVal _op secondVal; \
805 } \
806 SET_REGISTER(vdst, result); \
807 } else { \
808 SET_REGISTER(vdst, \
809 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
810 } \
811 FINISH(1);
812
813#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
814 HANDLE_OPCODE(_opcode /*vA, vB*/) \
815 vdst = INST_A(inst); \
816 vsrc1 = INST_B(inst); \
817 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
818 SET_REGISTER(vdst, \
819 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
820 FINISH(1);
821
822#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
823 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
824 { \
825 u2 srcRegs; \
826 vdst = INST_AA(inst); \
827 srcRegs = FETCH(1); \
828 vsrc1 = srcRegs & 0xff; \
829 vsrc2 = srcRegs >> 8; \
830 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
831 if (_chkdiv != 0) { \
832 s8 firstVal, secondVal, result; \
833 firstVal = GET_REGISTER_WIDE(vsrc1); \
834 secondVal = GET_REGISTER_WIDE(vsrc2); \
835 if (secondVal == 0LL) { \
836 EXPORT_PC(); \
837 dvmThrowArithmeticException("divide by zero"); \
838 GOTO_exceptionThrown(); \
839 } \
840 if ((u8)firstVal == 0x8000000000000000ULL && \
841 secondVal == -1LL) \
842 { \
843 if (_chkdiv == 1) \
844 result = firstVal; /* division */ \
845 else \
846 result = 0; /* remainder */ \
847 } else { \
848 result = firstVal _op secondVal; \
849 } \
850 SET_REGISTER_WIDE(vdst, result); \
851 } else { \
852 SET_REGISTER_WIDE(vdst, \
853 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
854 } \
855 } \
856 FINISH(2);
857
858#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
859 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
860 { \
861 u2 srcRegs; \
862 vdst = INST_AA(inst); \
863 srcRegs = FETCH(1); \
864 vsrc1 = srcRegs & 0xff; \
865 vsrc2 = srcRegs >> 8; \
866 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
867 SET_REGISTER_WIDE(vdst, \
868 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
869 } \
870 FINISH(2);
871
872#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
873 HANDLE_OPCODE(_opcode /*vA, vB*/) \
874 vdst = INST_A(inst); \
875 vsrc1 = INST_B(inst); \
876 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
877 if (_chkdiv != 0) { \
878 s8 firstVal, secondVal, result; \
879 firstVal = GET_REGISTER_WIDE(vdst); \
880 secondVal = GET_REGISTER_WIDE(vsrc1); \
881 if (secondVal == 0LL) { \
882 EXPORT_PC(); \
883 dvmThrowArithmeticException("divide by zero"); \
884 GOTO_exceptionThrown(); \
885 } \
886 if ((u8)firstVal == 0x8000000000000000ULL && \
887 secondVal == -1LL) \
888 { \
889 if (_chkdiv == 1) \
890 result = firstVal; /* division */ \
891 else \
892 result = 0; /* remainder */ \
893 } else { \
894 result = firstVal _op secondVal; \
895 } \
896 SET_REGISTER_WIDE(vdst, result); \
897 } else { \
898 SET_REGISTER_WIDE(vdst, \
899 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
900 } \
901 FINISH(1);
902
903#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
904 HANDLE_OPCODE(_opcode /*vA, vB*/) \
905 vdst = INST_A(inst); \
906 vsrc1 = INST_B(inst); \
907 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
908 SET_REGISTER_WIDE(vdst, \
909 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
910 FINISH(1);
911
912#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
913 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
914 { \
915 u2 srcRegs; \
916 vdst = INST_AA(inst); \
917 srcRegs = FETCH(1); \
918 vsrc1 = srcRegs & 0xff; \
919 vsrc2 = srcRegs >> 8; \
920 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
921 SET_REGISTER_FLOAT(vdst, \
922 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
923 } \
924 FINISH(2);
925
926#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
927 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
928 { \
929 u2 srcRegs; \
930 vdst = INST_AA(inst); \
931 srcRegs = FETCH(1); \
932 vsrc1 = srcRegs & 0xff; \
933 vsrc2 = srcRegs >> 8; \
934 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
935 SET_REGISTER_DOUBLE(vdst, \
936 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
937 } \
938 FINISH(2);
939
940#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
941 HANDLE_OPCODE(_opcode /*vA, vB*/) \
942 vdst = INST_A(inst); \
943 vsrc1 = INST_B(inst); \
944 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
945 SET_REGISTER_FLOAT(vdst, \
946 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
947 FINISH(1);
948
949#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
950 HANDLE_OPCODE(_opcode /*vA, vB*/) \
951 vdst = INST_A(inst); \
952 vsrc1 = INST_B(inst); \
953 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
954 SET_REGISTER_DOUBLE(vdst, \
955 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
956 FINISH(1);
957
958#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
959 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
960 { \
961 ArrayObject* arrayObj; \
962 u2 arrayInfo; \
963 EXPORT_PC(); \
964 vdst = INST_AA(inst); \
965 arrayInfo = FETCH(1); \
966 vsrc1 = arrayInfo & 0xff; /* array ptr */ \
967 vsrc2 = arrayInfo >> 8; /* index */ \
968 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
969 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
970 if (!checkForNull((Object*) arrayObj)) \
971 GOTO_exceptionThrown(); \
972 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
973 dvmThrowArrayIndexOutOfBoundsException( \
974 arrayObj->length, GET_REGISTER(vsrc2)); \
975 GOTO_exceptionThrown(); \
976 } \
977 SET_REGISTER##_regsize(vdst, \
978 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)]); \
979 ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
980 } \
981 FINISH(2);
982
983#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
984 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
985 { \
986 ArrayObject* arrayObj; \
987 u2 arrayInfo; \
988 EXPORT_PC(); \
989 vdst = INST_AA(inst); /* AA: source value */ \
990 arrayInfo = FETCH(1); \
991 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
992 vsrc2 = arrayInfo >> 8; /* CC: index */ \
993 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
994 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
995 if (!checkForNull((Object*) arrayObj)) \
996 GOTO_exceptionThrown(); \
997 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
998 dvmThrowArrayIndexOutOfBoundsException( \
999 arrayObj->length, GET_REGISTER(vsrc2)); \
1000 GOTO_exceptionThrown(); \
1001 } \
1002 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
1003 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)] = \
1004 GET_REGISTER##_regsize(vdst); \
1005 } \
1006 FINISH(2);
1007
1008/*
1009 * It's possible to get a bad value out of a field with sub-32-bit stores
1010 * because the -quick versions always operate on 32 bits. Consider:
1011 * short foo = -1 (sets a 32-bit register to 0xffffffff)
1012 * iput-quick foo (writes all 32 bits to the field)
1013 * short bar = 1 (sets a 32-bit register to 0x00000001)
1014 * iput-short (writes the low 16 bits to the field)
1015 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
1016 * This can only happen when optimized and non-optimized code has interleaved
1017 * access to the same field. This is unlikely but possible.
1018 *
1019 * The easiest way to fix this is to always read/write 32 bits at a time. On
1020 * a device with a 16-bit data bus this is sub-optimal. (The alternative
1021 * approach is to have sub-int versions of iget-quick, but now we're wasting
1022 * Dalvik instruction space and making it less likely that handler code will
1023 * already be in the CPU i-cache.)
1024 */
1025#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
1026 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1027 { \
1028 InstField* ifield; \
1029 Object* obj; \
1030 EXPORT_PC(); \
1031 vdst = INST_A(inst); \
1032 vsrc1 = INST_B(inst); /* object ptr */ \
1033 ref = FETCH(1); /* field ref */ \
1034 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1035 obj = (Object*) GET_REGISTER(vsrc1); \
1036 if (!checkForNull(obj)) \
1037 GOTO_exceptionThrown(); \
1038 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1039 if (ifield == NULL) { \
1040 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1041 if (ifield == NULL) \
1042 GOTO_exceptionThrown(); \
1043 } \
1044 SET_REGISTER##_regsize(vdst, \
1045 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1046 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1047 (u8) GET_REGISTER##_regsize(vdst)); \
1048 UPDATE_FIELD_GET(&ifield->field); \
1049 } \
1050 FINISH(2);
1051
1052#define HANDLE_IGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1053 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
1054 { \
1055 InstField* ifield; \
1056 Object* obj; \
1057 EXPORT_PC(); \
1058 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1059 vdst = FETCH(3); \
1060 vsrc1 = FETCH(4); /* object ptr */ \
1061 ILOGV("|iget%s/jumbo v%d,v%d,field@0x%08x", \
1062 (_opname), vdst, vsrc1, ref); \
1063 obj = (Object*) GET_REGISTER(vsrc1); \
1064 if (!checkForNull(obj)) \
1065 GOTO_exceptionThrown(); \
1066 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1067 if (ifield == NULL) { \
1068 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1069 if (ifield == NULL) \
1070 GOTO_exceptionThrown(); \
1071 } \
1072 SET_REGISTER##_regsize(vdst, \
1073 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1074 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1075 (u8) GET_REGISTER##_regsize(vdst)); \
1076 UPDATE_FIELD_GET(&ifield->field); \
1077 } \
1078 FINISH(5);
1079
1080#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1081 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1082 { \
1083 Object* obj; \
1084 vdst = INST_A(inst); \
1085 vsrc1 = INST_B(inst); /* object ptr */ \
1086 ref = FETCH(1); /* field offset */ \
1087 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
1088 (_opname), vdst, vsrc1, ref); \
1089 obj = (Object*) GET_REGISTER(vsrc1); \
1090 if (!checkForNullExportPC(obj, fp, pc)) \
1091 GOTO_exceptionThrown(); \
1092 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
1093 ILOGV("+ IGETQ %d=0x%08llx", ref, \
1094 (u8) GET_REGISTER##_regsize(vdst)); \
1095 } \
1096 FINISH(2);
1097
1098#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
1099 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1100 { \
1101 InstField* ifield; \
1102 Object* obj; \
1103 EXPORT_PC(); \
1104 vdst = INST_A(inst); \
1105 vsrc1 = INST_B(inst); /* object ptr */ \
1106 ref = FETCH(1); /* field ref */ \
1107 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1108 obj = (Object*) GET_REGISTER(vsrc1); \
1109 if (!checkForNull(obj)) \
1110 GOTO_exceptionThrown(); \
1111 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1112 if (ifield == NULL) { \
1113 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1114 if (ifield == NULL) \
1115 GOTO_exceptionThrown(); \
1116 } \
1117 dvmSetField##_ftype(obj, ifield->byteOffset, \
1118 GET_REGISTER##_regsize(vdst)); \
1119 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1120 (u8) GET_REGISTER##_regsize(vdst)); \
1121 UPDATE_FIELD_PUT(&ifield->field); \
1122 } \
1123 FINISH(2);
1124
1125#define HANDLE_IPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1126 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
1127 { \
1128 InstField* ifield; \
1129 Object* obj; \
1130 EXPORT_PC(); \
1131 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1132 vdst = FETCH(3); \
1133 vsrc1 = FETCH(4); /* object ptr */ \
1134 ILOGV("|iput%s/jumbo v%d,v%d,field@0x%08x", \
1135 (_opname), vdst, vsrc1, ref); \
1136 obj = (Object*) GET_REGISTER(vsrc1); \
1137 if (!checkForNull(obj)) \
1138 GOTO_exceptionThrown(); \
1139 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1140 if (ifield == NULL) { \
1141 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1142 if (ifield == NULL) \
1143 GOTO_exceptionThrown(); \
1144 } \
1145 dvmSetField##_ftype(obj, ifield->byteOffset, \
1146 GET_REGISTER##_regsize(vdst)); \
1147 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1148 (u8) GET_REGISTER##_regsize(vdst)); \
1149 UPDATE_FIELD_PUT(&ifield->field); \
1150 } \
1151 FINISH(5);
1152
1153#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1154 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1155 { \
1156 Object* obj; \
1157 vdst = INST_A(inst); \
1158 vsrc1 = INST_B(inst); /* object ptr */ \
1159 ref = FETCH(1); /* field offset */ \
1160 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
1161 (_opname), vdst, vsrc1, ref); \
1162 obj = (Object*) GET_REGISTER(vsrc1); \
1163 if (!checkForNullExportPC(obj, fp, pc)) \
1164 GOTO_exceptionThrown(); \
1165 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
1166 ILOGV("+ IPUTQ %d=0x%08llx", ref, \
1167 (u8) GET_REGISTER##_regsize(vdst)); \
1168 } \
1169 FINISH(2);
1170
1171/*
1172 * The JIT needs dvmDexGetResolvedField() to return non-null.
1173 * Because the portable interpreter is not involved with the JIT
1174 * and trace building, we only need the extra check here when this
1175 * code is massaged into a stub called from an assembly interpreter.
1176 * This is controlled by the JIT_STUB_HACK maco.
1177 */
1178
1179#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
1180 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1181 { \
1182 StaticField* sfield; \
1183 vdst = INST_AA(inst); \
1184 ref = FETCH(1); /* field ref */ \
1185 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1186 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1187 if (sfield == NULL) { \
1188 EXPORT_PC(); \
1189 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1190 if (sfield == NULL) \
1191 GOTO_exceptionThrown(); \
1192 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1193 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1194 } \
1195 } \
1196 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1197 ILOGV("+ SGET '%s'=0x%08llx", \
1198 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1199 UPDATE_FIELD_GET(&sfield->field); \
1200 } \
1201 FINISH(2);
1202
1203#define HANDLE_SGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1204 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
1205 { \
1206 StaticField* sfield; \
1207 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1208 vdst = FETCH(3); \
1209 ILOGV("|sget%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
1210 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1211 if (sfield == NULL) { \
1212 EXPORT_PC(); \
1213 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1214 if (sfield == NULL) \
1215 GOTO_exceptionThrown(); \
1216 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1217 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1218 } \
1219 } \
1220 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1221 ILOGV("+ SGET '%s'=0x%08llx", \
1222 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1223 UPDATE_FIELD_GET(&sfield->field); \
1224 } \
1225 FINISH(4);
1226
1227#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
1228 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1229 { \
1230 StaticField* sfield; \
1231 vdst = INST_AA(inst); \
1232 ref = FETCH(1); /* field ref */ \
1233 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1234 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1235 if (sfield == NULL) { \
1236 EXPORT_PC(); \
1237 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1238 if (sfield == NULL) \
1239 GOTO_exceptionThrown(); \
1240 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1241 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1242 } \
1243 } \
1244 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1245 ILOGV("+ SPUT '%s'=0x%08llx", \
1246 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1247 UPDATE_FIELD_PUT(&sfield->field); \
1248 } \
1249 FINISH(2);
1250
1251#define HANDLE_SPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1252 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
1253 { \
1254 StaticField* sfield; \
1255 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1256 vdst = FETCH(3); \
1257 ILOGV("|sput%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
1258 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1259 if (sfield == NULL) { \
1260 EXPORT_PC(); \
1261 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1262 if (sfield == NULL) \
1263 GOTO_exceptionThrown(); \
1264 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1265 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1266 } \
1267 } \
1268 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1269 ILOGV("+ SPUT '%s'=0x%08llx", \
1270 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1271 UPDATE_FIELD_PUT(&sfield->field); \
1272 } \
1273 FINISH(4);
1274
1275/* File: cstubs/enddefs.cpp */
1276
1277/* undefine "magic" name remapping */
1278#undef retval
1279#undef pc
1280#undef fp
1281#undef curMethod
1282#undef methodClassDex
1283#undef self
1284#undef debugTrackedRefStart
1285
1286/* File: armv5te/debug.cpp */
1287#include <inttypes.h>
1288
1289/*
1290 * Dump the fixed-purpose ARM registers, along with some other info.
1291 *
1292 * This function MUST be compiled in ARM mode -- THUMB will yield bogus
1293 * results.
1294 *
1295 * This will NOT preserve r0-r3/ip.
1296 */
1297void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3)
1298{
1299 register uint32_t rPC asm("r4");
1300 register uint32_t rFP asm("r5");
1301 register uint32_t rSELF asm("r6");
1302 register uint32_t rINST asm("r7");
1303 register uint32_t rIBASE asm("r8");
1304 register uint32_t r9 asm("r9");
1305 register uint32_t r10 asm("r10");
1306
1307 //extern char dvmAsmInstructionStart[];
1308
1309 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
1310 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1311 rPC, rFP, rSELF, rINST);
1312 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10);
1313
1314 //Thread* self = (Thread*) rSELF;
1315 //const Method* method = self->method;
1316 printf(" + self is %p\n", dvmThreadSelf());
1317 //printf(" + currently in %s.%s %s\n",
1318 // method->clazz->descriptor, method->name, method->shorty);
1319 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart);
1320 //printf(" + next handler for 0x%02x = %p\n",
1321 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64);
1322}
1323
1324/*
1325 * Dump the StackSaveArea for the specified frame pointer.
1326 */
1327void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea)
1328{
1329 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp);
1330 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea);
1331#ifdef EASY_GDB
1332 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n",
1333 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc,
1334 saveArea->method, saveArea->xtra.currentPc);
1335#else
1336 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n",
1337 saveArea->prevFrame, saveArea->savedPc,
1338 saveArea->method, saveArea->xtra.currentPc,
1339 *(u4*)fp);
1340#endif
1341}
1342
1343/*
1344 * Does the bulk of the work for common_printMethod().
1345 */
1346void dvmMterpPrintMethod(Method* method)
1347{
1348 /*
1349 * It is a direct (non-virtual) method if it is static, private,
1350 * or a constructor.
1351 */
1352 bool isDirect =
1353 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) ||
1354 (method->name[0] == '<');
1355
1356 char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
1357
1358 printf("<%c:%s.%s %s> ",
1359 isDirect ? 'D' : 'V',
1360 method->clazz->descriptor,
1361 method->name,
1362 desc);
1363
1364 free(desc);
1365}
1366