Jens Axboe | ebac465 | 2005-12-08 15:25:21 +0100 | [diff] [blame] | 1 | #ifndef ARCH_PPC_H |
| 2 | #define ARCH_PPH_H |
| 3 | |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 4 | #include <unistd.h> |
| 5 | #include <stdlib.h> |
| 6 | #include <sys/types.h> |
| 7 | #include <sys/wait.h> |
| 8 | |
Jens Axboe | cca8464 | 2011-10-07 12:47:57 +0200 | [diff] [blame] | 9 | #define FIO_ARCH (arch_ppc) |
Jens Axboe | ebac465 | 2005-12-08 15:25:21 +0100 | [diff] [blame] | 10 | |
| 11 | #ifndef __NR_ioprio_set |
| 12 | #define __NR_ioprio_set 273 |
| 13 | #define __NR_ioprio_get 274 |
| 14 | #endif |
| 15 | |
| 16 | #ifndef __NR_fadvise64 |
| 17 | #define __NR_fadvise64 233 |
| 18 | #endif |
| 19 | |
Jens Axboe | 8756e4d | 2006-05-27 20:24:53 +0200 | [diff] [blame] | 20 | #ifndef __NR_sys_splice |
| 21 | #define __NR_sys_splice 283 |
| 22 | #define __NR_sys_tee 284 |
| 23 | #define __NR_sys_vmsplice 285 |
| 24 | #endif |
| 25 | |
Jens Axboe | ebac465 | 2005-12-08 15:25:21 +0100 | [diff] [blame] | 26 | #define nop do { } while (0) |
| 27 | |
Jens Axboe | db6defc | 2007-12-11 08:55:53 +0100 | [diff] [blame] | 28 | #ifdef __powerpc64__ |
Jens Axboe | 44c47fe | 2008-06-04 14:31:25 +0200 | [diff] [blame] | 29 | #define read_barrier() __asm__ __volatile__ ("lwsync" : : : "memory") |
Jens Axboe | db6defc | 2007-12-11 08:55:53 +0100 | [diff] [blame] | 30 | #else |
Jens Axboe | 44c47fe | 2008-06-04 14:31:25 +0200 | [diff] [blame] | 31 | #define read_barrier() __asm__ __volatile__ ("sync" : : : "memory") |
Jens Axboe | db6defc | 2007-12-11 08:55:53 +0100 | [diff] [blame] | 32 | #endif |
| 33 | |
Jens Axboe | 44c47fe | 2008-06-04 14:31:25 +0200 | [diff] [blame] | 34 | #define write_barrier() __asm__ __volatile__ ("sync" : : : "memory") |
| 35 | |
Jens Axboe | 8f7e39d | 2008-06-01 19:45:10 +0200 | [diff] [blame] | 36 | static inline int __ilog2(unsigned long bitmask) |
| 37 | { |
| 38 | int lz; |
| 39 | |
| 40 | asm ("cntlzw %0,%1" : "=r" (lz) : "r" (bitmask)); |
| 41 | return 31 - lz; |
| 42 | } |
| 43 | |
| 44 | static inline int arch_ffz(unsigned long bitmask) |
| 45 | { |
| 46 | if ((bitmask = ~bitmask) == 0) |
| 47 | return 32; |
| 48 | return __ilog2(bitmask & -bitmask); |
| 49 | } |
Cigy Cyriac | 5f39d8f | 2010-08-10 19:18:11 -0400 | [diff] [blame] | 50 | |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 51 | static inline unsigned int mfspr(unsigned int reg) |
| 52 | { |
| 53 | unsigned int val; |
| 54 | |
| 55 | asm volatile("mfspr %0,%1": "=r" (val) : "K" (reg)); |
| 56 | return val; |
| 57 | } |
| 58 | |
| 59 | #define SPRN_TBRL 0x10C /* Time Base Register Lower */ |
| 60 | #define SPRN_TBRU 0x10D /* Time Base Register Upper */ |
| 61 | #define SPRN_ATBL 0x20E /* Alternate Time Base Lower */ |
| 62 | #define SPRN_ATBU 0x20F /* Alternate Time Base Upper */ |
| 63 | |
Cigy Cyriac | 5f39d8f | 2010-08-10 19:18:11 -0400 | [diff] [blame] | 64 | static inline unsigned long long get_cpu_clock(void) |
| 65 | { |
Jens Axboe | 2995607 | 2010-08-11 08:03:20 -0400 | [diff] [blame] | 66 | unsigned int tbl, tbu0, tbu1; |
| 67 | unsigned long long ret; |
Cigy Cyriac | 5f39d8f | 2010-08-10 19:18:11 -0400 | [diff] [blame] | 68 | |
Jens Axboe | 2995607 | 2010-08-11 08:03:20 -0400 | [diff] [blame] | 69 | do { |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 70 | if (arch_flags & ARCH_FLAG_1) { |
| 71 | tbu0 = mfspr(SPRN_ATBU); |
| 72 | tbl = mfspr(SPRN_ATBL); |
| 73 | tbu1 = mfspr(SPRN_ATBU); |
| 74 | } else { |
Steven Noonan | f2dc46a | 2013-02-28 20:08:06 +0100 | [diff] [blame^] | 75 | tbu0 = mfspr(SPRN_TBRU); |
| 76 | tbl = mfspr(SPRN_TBRL); |
| 77 | tbu1 = mfspr(SPRN_TBRU); |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 78 | } |
Jens Axboe | 2995607 | 2010-08-11 08:03:20 -0400 | [diff] [blame] | 79 | } while (tbu0 != tbu1); |
Cigy Cyriac | 5f39d8f | 2010-08-10 19:18:11 -0400 | [diff] [blame] | 80 | |
Jens Axboe | 2995607 | 2010-08-11 08:03:20 -0400 | [diff] [blame] | 81 | ret = (((unsigned long long)tbu0) << 32) | tbl; |
| 82 | return ret; |
Cigy Cyriac | 5f39d8f | 2010-08-10 19:18:11 -0400 | [diff] [blame] | 83 | } |
| 84 | |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 85 | static void atb_child(void) |
| 86 | { |
| 87 | arch_flags |= ARCH_FLAG_1; |
| 88 | get_cpu_clock(); |
| 89 | _exit(0); |
| 90 | } |
| 91 | |
| 92 | static void atb_clocktest(void) |
| 93 | { |
| 94 | pid_t pid; |
| 95 | |
| 96 | pid = fork(); |
| 97 | if (!pid) |
| 98 | atb_child(); |
Jens Axboe | 6244334 | 2013-02-26 16:11:49 +0100 | [diff] [blame] | 99 | else if (pid != -1) { |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 100 | int status; |
| 101 | |
Jens Axboe | 6244334 | 2013-02-26 16:11:49 +0100 | [diff] [blame] | 102 | pid = wait(&status); |
| 103 | if (pid == -1 || !WIFEXITED(status)) |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 104 | arch_flags &= ~ARCH_FLAG_1; |
| 105 | else |
| 106 | arch_flags |= ARCH_FLAG_1; |
| 107 | } |
| 108 | } |
| 109 | |
Jens Axboe | 1b745f5 | 2012-12-10 08:36:35 +0100 | [diff] [blame] | 110 | #define ARCH_HAVE_INIT |
| 111 | extern int tsc_reliable; |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 112 | |
Jens Axboe | 1b745f5 | 2012-12-10 08:36:35 +0100 | [diff] [blame] | 113 | static inline int arch_init(char *envp[]) |
| 114 | { |
| 115 | tsc_reliable = 1; |
Jens Axboe | 4247d1a | 2013-02-26 14:43:02 +0100 | [diff] [blame] | 116 | atb_clocktest(); |
Bruce Cran | d20b2ca | 2012-12-20 13:59:56 +0000 | [diff] [blame] | 117 | return 0; |
Jens Axboe | 1b745f5 | 2012-12-10 08:36:35 +0100 | [diff] [blame] | 118 | } |
| 119 | |
Jens Axboe | 8f7e39d | 2008-06-01 19:45:10 +0200 | [diff] [blame] | 120 | #define ARCH_HAVE_FFZ |
Cigy Cyriac | 5f39d8f | 2010-08-10 19:18:11 -0400 | [diff] [blame] | 121 | #define ARCH_HAVE_CPU_CLOCK |
Jens Axboe | 8f7e39d | 2008-06-01 19:45:10 +0200 | [diff] [blame] | 122 | |
Jens Axboe | ebac465 | 2005-12-08 15:25:21 +0100 | [diff] [blame] | 123 | #endif |