Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 1 | //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Chris Lattner and is distributed under the |
| 6 | // University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains a pass that splits the constant pool up into 'islands' |
| 11 | // which are scattered through-out the function. This is required due to the |
| 12 | // limited pc-relative displacements that ARM has. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #define DEBUG_TYPE "arm-cp-islands" |
| 17 | #include "ARM.h" |
| 18 | #include "ARMInstrInfo.h" |
| 19 | #include "llvm/CodeGen/MachineConstantPool.h" |
| 20 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 21 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 22 | #include "llvm/CodeGen/MachineJumpTableInfo.h" |
| 23 | #include "llvm/Target/TargetAsmInfo.h" |
| 24 | #include "llvm/Target/TargetData.h" |
| 25 | #include "llvm/Target/TargetMachine.h" |
| 26 | #include "llvm/Support/Compiler.h" |
| 27 | #include "llvm/Support/Debug.h" |
| 28 | #include "llvm/ADT/STLExtras.h" |
| 29 | #include "llvm/ADT/Statistic.h" |
| 30 | #include <iostream> |
| 31 | using namespace llvm; |
| 32 | |
| 33 | STATISTIC(NumSplit, "Number of uncond branches inserted"); |
| 34 | |
| 35 | namespace { |
| 36 | /// ARMConstantIslands - Due to limited pc-relative displacements, ARM |
| 37 | /// requires constant pool entries to be scattered among the instructions |
| 38 | /// inside a function. To do this, it completely ignores the normal LLVM |
| 39 | /// constant pool, instead, it places constants where-ever it feels like with |
| 40 | /// special instructions. |
| 41 | /// |
| 42 | /// The terminology used in this pass includes: |
| 43 | /// Islands - Clumps of constants placed in the function. |
| 44 | /// Water - Potential places where an island could be formed. |
| 45 | /// CPE - A constant pool entry that has been placed somewhere, which |
| 46 | /// tracks a list of users. |
| 47 | class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass { |
| 48 | /// NextUID - Assign unique ID's to CPE's. |
| 49 | unsigned NextUID; |
| 50 | |
| 51 | /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed |
| 52 | /// by MBB Number. |
| 53 | std::vector<unsigned> BBSizes; |
| 54 | |
| 55 | /// WaterList - A sorted list of basic blocks where islands could be placed |
| 56 | /// (i.e. blocks that don't fall through to the following block, due |
| 57 | /// to a return, unreachable, or unconditional branch). |
| 58 | std::vector<MachineBasicBlock*> WaterList; |
| 59 | |
| 60 | /// CPUser - One user of a constant pool, keeping the machine instruction |
| 61 | /// pointer, the constant pool being referenced, and the max displacement |
| 62 | /// allowed from the instruction to the CP. |
| 63 | struct CPUser { |
| 64 | MachineInstr *MI; |
| 65 | MachineInstr *CPEMI; |
| 66 | unsigned MaxDisp; |
| 67 | CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp) |
| 68 | : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {} |
| 69 | }; |
| 70 | |
| 71 | /// CPUsers - Keep track of all of the machine instructions that use various |
| 72 | /// constant pools and their max displacement. |
| 73 | std::vector<CPUser> CPUsers; |
| 74 | |
| 75 | const TargetInstrInfo *TII; |
| 76 | const TargetAsmInfo *TAI; |
| 77 | public: |
| 78 | virtual bool runOnMachineFunction(MachineFunction &Fn); |
| 79 | |
| 80 | virtual const char *getPassName() const { |
| 81 | return "ARM constant island placement pass"; |
| 82 | } |
| 83 | |
| 84 | private: |
| 85 | void DoInitialPlacement(MachineFunction &Fn, |
| 86 | std::vector<MachineInstr*> &CPEMIs); |
| 87 | void InitialFunctionScan(MachineFunction &Fn, |
| 88 | const std::vector<MachineInstr*> &CPEMIs); |
| 89 | void SplitBlockBeforeInstr(MachineInstr *MI); |
| 90 | bool HandleConstantPoolUser(MachineFunction &Fn, CPUser &U); |
| 91 | void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB); |
| 92 | |
| 93 | unsigned GetInstSize(MachineInstr *MI) const; |
| 94 | unsigned GetOffsetOf(MachineInstr *MI) const; |
| 95 | }; |
| 96 | } |
| 97 | |
| 98 | /// createARMLoadStoreOptimizationPass - returns an instance of the load / store |
| 99 | /// optimization pass. |
| 100 | FunctionPass *llvm::createARMConstantIslandPass() { |
| 101 | return new ARMConstantIslands(); |
| 102 | } |
| 103 | |
| 104 | bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) { |
| 105 | // If there are no constants, there is nothing to do. |
| 106 | MachineConstantPool &MCP = *Fn.getConstantPool(); |
| 107 | if (MCP.isEmpty()) return false; |
| 108 | |
| 109 | TII = Fn.getTarget().getInstrInfo(); |
| 110 | TAI = Fn.getTarget().getTargetAsmInfo(); |
| 111 | |
| 112 | // Renumber all of the machine basic blocks in the function, guaranteeing that |
| 113 | // the numbers agree with the position of the block in the function. |
| 114 | Fn.RenumberBlocks(); |
| 115 | |
| 116 | // Perform the initial placement of the constant pool entries. To start with, |
| 117 | // we put them all at the end of the function. |
| 118 | std::vector<MachineInstr*> CPEMIs; |
| 119 | DoInitialPlacement(Fn, CPEMIs); |
| 120 | |
| 121 | /// The next UID to take is the first unused one. |
| 122 | NextUID = CPEMIs.size(); |
| 123 | |
| 124 | // Do the initial scan of the function, building up information about the |
| 125 | // sizes of each block, the location of all the water, and finding all of the |
| 126 | // constant pool users. |
| 127 | InitialFunctionScan(Fn, CPEMIs); |
| 128 | CPEMIs.clear(); |
| 129 | |
| 130 | // Iteratively place constant pool entries until there is no change. |
| 131 | bool MadeChange; |
| 132 | do { |
| 133 | MadeChange = false; |
| 134 | for (unsigned i = 0, e = CPUsers.size(); i != e; ++i) |
| 135 | MadeChange |= HandleConstantPoolUser(Fn, CPUsers[i]); |
| 136 | } while (MadeChange); |
| 137 | |
| 138 | BBSizes.clear(); |
| 139 | WaterList.clear(); |
| 140 | CPUsers.clear(); |
| 141 | |
| 142 | return true; |
| 143 | } |
| 144 | |
| 145 | /// DoInitialPlacement - Perform the initial placement of the constant pool |
| 146 | /// entries. To start with, we put them all at the end of the function. |
| 147 | void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn, |
| 148 | std::vector<MachineInstr*> &CPEMIs){ |
| 149 | // Create the basic block to hold the CPE's. |
| 150 | MachineBasicBlock *BB = new MachineBasicBlock(); |
| 151 | Fn.getBasicBlockList().push_back(BB); |
| 152 | |
| 153 | // Add all of the constants from the constant pool to the end block, use an |
| 154 | // identity mapping of CPI's to CPE's. |
| 155 | const std::vector<MachineConstantPoolEntry> &CPs = |
| 156 | Fn.getConstantPool()->getConstants(); |
| 157 | |
| 158 | const TargetData &TD = *Fn.getTarget().getTargetData(); |
| 159 | for (unsigned i = 0, e = CPs.size(); i != e; ++i) { |
| 160 | unsigned Size = TD.getTypeSize(CPs[i].getType()); |
| 161 | // Verify that all constant pool entries are a multiple of 4 bytes. If not, |
| 162 | // we would have to pad them out or something so that instructions stay |
| 163 | // aligned. |
| 164 | assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!"); |
| 165 | MachineInstr *CPEMI = |
| 166 | BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY)) |
| 167 | .addImm(i).addConstantPoolIndex(i).addImm(Size); |
| 168 | CPEMIs.push_back(CPEMI); |
| 169 | DEBUG(std::cerr << "Moved CPI#" << i << " to end of function as #" |
| 170 | << i << "\n"); |
| 171 | } |
| 172 | } |
| 173 | |
| 174 | /// BBHasFallthrough - Return true of the specified basic block can fallthrough |
| 175 | /// into the block immediately after it. |
| 176 | static bool BBHasFallthrough(MachineBasicBlock *MBB) { |
| 177 | // Get the next machine basic block in the function. |
| 178 | MachineFunction::iterator MBBI = MBB; |
| 179 | if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function. |
| 180 | return false; |
| 181 | |
| 182 | MachineBasicBlock *NextBB = next(MBBI); |
| 183 | for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(), |
| 184 | E = MBB->succ_end(); I != E; ++I) |
| 185 | if (*I == NextBB) |
| 186 | return true; |
| 187 | |
| 188 | return false; |
| 189 | } |
| 190 | |
| 191 | /// InitialFunctionScan - Do the initial scan of the function, building up |
| 192 | /// information about the sizes of each block, the location of all the water, |
| 193 | /// and finding all of the constant pool users. |
| 194 | void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn, |
| 195 | const std::vector<MachineInstr*> &CPEMIs) { |
| 196 | for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end(); |
| 197 | MBBI != E; ++MBBI) { |
| 198 | MachineBasicBlock &MBB = *MBBI; |
| 199 | |
| 200 | // If this block doesn't fall through into the next MBB, then this is |
| 201 | // 'water' that a constant pool island could be placed. |
| 202 | if (!BBHasFallthrough(&MBB)) |
| 203 | WaterList.push_back(&MBB); |
| 204 | |
| 205 | unsigned MBBSize = 0; |
| 206 | for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); |
| 207 | I != E; ++I) { |
| 208 | // Add instruction size to MBBSize. |
| 209 | MBBSize += GetInstSize(I); |
| 210 | |
| 211 | // Scan the instructions for constant pool operands. |
| 212 | for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) |
| 213 | if (I->getOperand(op).isConstantPoolIndex()) { |
| 214 | // We found one. The addressing mode tells us the max displacement |
| 215 | // from the PC that this instruction permits. |
| 216 | unsigned MaxOffs = 0; |
| 217 | |
| 218 | // Basic size info comes from the TSFlags field. |
| 219 | unsigned TSFlags = I->getInstrDescriptor()->TSFlags; |
| 220 | switch (TSFlags & ARMII::AddrModeMask) { |
| 221 | default: |
| 222 | // Constant pool entries can reach anything. |
| 223 | if (I->getOpcode() == ARM::CONSTPOOL_ENTRY) |
| 224 | continue; |
| 225 | assert(0 && "Unknown addressing mode for CP reference!"); |
| 226 | case ARMII::AddrMode1: // AM1: 8 bits << 2 |
| 227 | MaxOffs = 1 << (8+2); // Taking the address of a CP entry. |
| 228 | break; |
| 229 | case ARMII::AddrMode2: |
| 230 | MaxOffs = 1 << 12; // +-offset_12 |
| 231 | break; |
| 232 | case ARMII::AddrMode3: |
| 233 | MaxOffs = 1 << 8; // +-offset_8 |
| 234 | break; |
| 235 | // addrmode4 has no immediate offset. |
| 236 | case ARMII::AddrMode5: |
| 237 | MaxOffs = 1 << (8+2); // +-(offset_8*4) |
| 238 | break; |
| 239 | case ARMII::AddrModeT1: |
| 240 | MaxOffs = 1 << 5; |
| 241 | break; |
| 242 | case ARMII::AddrModeT2: |
| 243 | MaxOffs = 1 << (5+1); |
| 244 | break; |
| 245 | case ARMII::AddrModeT4: |
| 246 | MaxOffs = 1 << (5+2); |
| 247 | break; |
Evan Cheng | 012f2d9 | 2007-01-24 08:53:17 +0000 | [diff] [blame^] | 248 | case ARMII::AddrModeTs: |
| 249 | MaxOffs = 1 << (8+2); |
| 250 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 251 | } |
| 252 | |
| 253 | // Remember that this is a user of a CP entry. |
| 254 | MachineInstr *CPEMI =CPEMIs[I->getOperand(op).getConstantPoolIndex()]; |
| 255 | CPUsers.push_back(CPUser(I, CPEMI, MaxOffs)); |
| 256 | |
| 257 | // Instructions can only use one CP entry, don't bother scanning the |
| 258 | // rest of the operands. |
| 259 | break; |
| 260 | } |
| 261 | } |
| 262 | BBSizes.push_back(MBBSize); |
| 263 | } |
| 264 | } |
| 265 | |
| 266 | /// FIXME: Works around a gcc miscompilation with -fstrict-aliasing |
| 267 | static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT, |
| 268 | unsigned JTI) DISABLE_INLINE; |
| 269 | static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT, |
| 270 | unsigned JTI) { |
| 271 | return JT[JTI].MBBs.size(); |
| 272 | } |
| 273 | |
| 274 | /// GetInstSize - Return the size of the specified MachineInstr. |
| 275 | /// |
| 276 | unsigned ARMConstantIslands::GetInstSize(MachineInstr *MI) const { |
| 277 | // Basic size info comes from the TSFlags field. |
| 278 | unsigned TSFlags = MI->getInstrDescriptor()->TSFlags; |
| 279 | |
| 280 | switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) { |
| 281 | default: |
| 282 | // If this machine instr is an inline asm, measure it. |
| 283 | if (MI->getOpcode() == ARM::INLINEASM) |
| 284 | return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName()); |
| 285 | assert(0 && "Unknown or unset size field for instr!"); |
| 286 | break; |
| 287 | case ARMII::Size8Bytes: return 8; // Arm instruction x 2. |
| 288 | case ARMII::Size4Bytes: return 4; // Arm instruction. |
| 289 | case ARMII::Size2Bytes: return 2; // Thumb instruction. |
| 290 | case ARMII::SizeSpecial: { |
| 291 | switch (MI->getOpcode()) { |
| 292 | case ARM::CONSTPOOL_ENTRY: |
| 293 | // If this machine instr is a constant pool entry, its size is recorded as |
| 294 | // operand #2. |
| 295 | return MI->getOperand(2).getImm(); |
| 296 | case ARM::BR_JTr: |
| 297 | case ARM::BR_JTm: |
| 298 | case ARM::BR_JTadd: { |
| 299 | // These are jumptable branches, i.e. a branch followed by an inlined |
| 300 | // jumptable. The size is 4 + 4 * number of entries. |
| 301 | unsigned JTI = MI->getOperand(MI->getNumOperands()-2).getJumpTableIndex(); |
| 302 | const MachineFunction *MF = MI->getParent()->getParent(); |
| 303 | MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); |
| 304 | const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); |
| 305 | assert(JTI < JT.size()); |
| 306 | return getNumJTEntries(JT, JTI) * 4 + 4; |
| 307 | } |
| 308 | default: |
| 309 | // Otherwise, pseudo-instruction sizes are zero. |
| 310 | return 0; |
| 311 | } |
| 312 | } |
| 313 | } |
| 314 | } |
| 315 | |
| 316 | /// GetOffsetOf - Return the current offset of the specified machine instruction |
| 317 | /// from the start of the function. This offset changes as stuff is moved |
| 318 | /// around inside the function. |
| 319 | unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const { |
| 320 | MachineBasicBlock *MBB = MI->getParent(); |
| 321 | |
| 322 | // The offset is composed of two things: the sum of the sizes of all MBB's |
| 323 | // before this instruction's block, and the offset from the start of the block |
| 324 | // it is in. |
| 325 | unsigned Offset = 0; |
| 326 | |
| 327 | // Sum block sizes before MBB. |
| 328 | for (unsigned BB = 0, e = MBB->getNumber(); BB != e; ++BB) |
| 329 | Offset += BBSizes[BB]; |
| 330 | |
| 331 | // Sum instructions before MI in MBB. |
| 332 | for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) { |
| 333 | assert(I != MBB->end() && "Didn't find MI in its own basic block?"); |
| 334 | if (&*I == MI) return Offset; |
| 335 | Offset += GetInstSize(I); |
| 336 | } |
| 337 | } |
| 338 | |
| 339 | /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB |
| 340 | /// ID. |
| 341 | static bool CompareMBBNumbers(const MachineBasicBlock *LHS, |
| 342 | const MachineBasicBlock *RHS) { |
| 343 | return LHS->getNumber() < RHS->getNumber(); |
| 344 | } |
| 345 | |
| 346 | /// UpdateForInsertedWaterBlock - When a block is newly inserted into the |
| 347 | /// machine function, it upsets all of the block numbers. Renumber the blocks |
| 348 | /// and update the arrays that parallel this numbering. |
| 349 | void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) { |
| 350 | // Renumber the MBB's to keep them consequtive. |
| 351 | NewBB->getParent()->RenumberBlocks(NewBB); |
| 352 | |
| 353 | // Insert a size into BBSizes to align it properly with the (newly |
| 354 | // renumbered) block numbers. |
| 355 | BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0); |
| 356 | |
| 357 | // Next, update WaterList. Specifically, we need to add NewMBB as having |
| 358 | // available water after it. |
| 359 | std::vector<MachineBasicBlock*>::iterator IP = |
| 360 | std::lower_bound(WaterList.begin(), WaterList.end(), NewBB, |
| 361 | CompareMBBNumbers); |
| 362 | WaterList.insert(IP, NewBB); |
| 363 | } |
| 364 | |
| 365 | |
| 366 | /// Split the basic block containing MI into two blocks, which are joined by |
| 367 | /// an unconditional branch. Update datastructures and renumber blocks to |
| 368 | /// account for this change. |
| 369 | void ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) { |
| 370 | MachineBasicBlock *OrigBB = MI->getParent(); |
| 371 | |
| 372 | // Create a new MBB for the code after the OrigBB. |
| 373 | MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock()); |
| 374 | MachineFunction::iterator MBBI = OrigBB; ++MBBI; |
| 375 | OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB); |
| 376 | |
| 377 | // Splice the instructions starting with MI over to NewBB. |
| 378 | NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); |
| 379 | |
| 380 | // Add an unconditional branch from OrigBB to NewBB. |
| 381 | BuildMI(OrigBB, TII->get(ARM::B)).addMBB(NewBB); |
| 382 | NumSplit++; |
| 383 | |
| 384 | // Update the CFG. All succs of OrigBB are now succs of NewBB. |
| 385 | while (!OrigBB->succ_empty()) { |
| 386 | MachineBasicBlock *Succ = *OrigBB->succ_begin(); |
| 387 | OrigBB->removeSuccessor(Succ); |
| 388 | NewBB->addSuccessor(Succ); |
| 389 | |
| 390 | // This pass should be run after register allocation, so there should be no |
| 391 | // PHI nodes to update. |
| 392 | assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI) |
| 393 | && "PHI nodes should be eliminated by now!"); |
| 394 | } |
| 395 | |
| 396 | // OrigBB branches to NewBB. |
| 397 | OrigBB->addSuccessor(NewBB); |
| 398 | |
| 399 | // Update internal data structures to account for the newly inserted MBB. |
| 400 | UpdateForInsertedWaterBlock(NewBB); |
| 401 | |
| 402 | // Figure out how large the first NewMBB is. |
| 403 | unsigned NewBBSize = 0; |
| 404 | for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end(); |
| 405 | I != E; ++I) |
| 406 | NewBBSize += GetInstSize(I); |
| 407 | |
| 408 | // Set the size of NewBB in BBSizes. |
| 409 | BBSizes[NewBB->getNumber()] = NewBBSize; |
| 410 | |
| 411 | // We removed instructions from UserMBB, subtract that off from its size. |
| 412 | // Add 4 to the block to count the unconditional branch we added to it. |
| 413 | BBSizes[OrigBB->getNumber()] -= NewBBSize-4; |
| 414 | } |
| 415 | |
| 416 | /// HandleConstantPoolUser - Analyze the specified user, checking to see if it |
| 417 | /// is out-of-range. If so, pick it up the constant pool value and move it some |
| 418 | /// place in-range. |
| 419 | bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, CPUser &U){ |
| 420 | MachineInstr *UserMI = U.MI; |
| 421 | MachineInstr *CPEMI = U.CPEMI; |
| 422 | |
| 423 | unsigned UserOffset = GetOffsetOf(UserMI); |
| 424 | unsigned CPEOffset = GetOffsetOf(CPEMI); |
| 425 | |
| 426 | DEBUG(std::cerr << "User of CPE#" << CPEMI->getOperand(0).getImm() |
| 427 | << " max delta=" << U.MaxDisp |
| 428 | << " at offset " << int(UserOffset-CPEOffset) << "\t" |
| 429 | << *UserMI); |
| 430 | |
| 431 | // Check to see if the CPE is already in-range. |
| 432 | if (UserOffset < CPEOffset) { |
| 433 | // User before the CPE. |
| 434 | if (CPEOffset-UserOffset <= U.MaxDisp) |
| 435 | return false; |
| 436 | } else { |
| 437 | if (UserOffset-CPEOffset <= U.MaxDisp) |
| 438 | return false; |
| 439 | } |
| 440 | |
| 441 | |
| 442 | // Solution guaranteed to work: split the user's MBB right before the user and |
| 443 | // insert a clone the CPE into the newly created water. |
| 444 | |
| 445 | // If the user isn't at the start of its MBB, or if there is a fall-through |
| 446 | // into the user's MBB, split the MBB before the User. |
| 447 | MachineBasicBlock *UserMBB = UserMI->getParent(); |
| 448 | if (&UserMBB->front() != UserMI || |
| 449 | UserMBB == &Fn.front() || // entry MBB of function. |
| 450 | BBHasFallthrough(prior(MachineFunction::iterator(UserMBB)))) { |
| 451 | // TODO: Search for the best place to split the code. In practice, using |
| 452 | // loop nesting information to insert these guys outside of loops would be |
| 453 | // sufficient. |
| 454 | SplitBlockBeforeInstr(UserMI); |
| 455 | |
| 456 | // UserMI's BB may have changed. |
| 457 | UserMBB = UserMI->getParent(); |
| 458 | } |
| 459 | |
| 460 | // Okay, we know we can put an island before UserMBB now, do it! |
| 461 | MachineBasicBlock *NewIsland = new MachineBasicBlock(); |
| 462 | Fn.getBasicBlockList().insert(UserMBB, NewIsland); |
| 463 | |
| 464 | // Update internal data structures to account for the newly inserted MBB. |
| 465 | UpdateForInsertedWaterBlock(NewIsland); |
| 466 | |
| 467 | // Now that we have an island to add the CPE to, clone the original CPE and |
| 468 | // add it to the island. |
| 469 | unsigned ID = NextUID++; |
| 470 | unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex(); |
| 471 | unsigned Size = CPEMI->getOperand(2).getImm(); |
| 472 | |
| 473 | // Build a new CPE for this user. |
| 474 | U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY)) |
| 475 | .addImm(ID).addConstantPoolIndex(CPI).addImm(Size); |
| 476 | |
| 477 | // Increase the size of the island block to account for the new entry. |
| 478 | BBSizes[NewIsland->getNumber()] += Size; |
| 479 | |
| 480 | // Finally, change the CPI in the instruction operand to be ID. |
| 481 | for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i) |
| 482 | if (UserMI->getOperand(i).isConstantPoolIndex()) { |
| 483 | UserMI->getOperand(i).setConstantPoolIndex(ID); |
| 484 | break; |
| 485 | } |
| 486 | |
| 487 | DEBUG(std::cerr << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" |
| 488 | << *UserMI); |
| 489 | |
| 490 | |
| 491 | return true; |
| 492 | } |
| 493 | |