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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
15// code as necessary.
16//
17//===----------------------------------------------------------------------===//
18
19#define DEBUG_TYPE "spiller"
20#include "VirtRegMap.h"
21#include "llvm/Function.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/SSARegMap.h"
25#include "llvm/Target/TargetMachine.h"
26#include "llvm/Target/TargetInstrInfo.h"
27#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
29#include "llvm/Support/Compiler.h"
30#include "llvm/ADT/BitVector.h"
31#include "llvm/ADT/Statistic.h"
32#include "llvm/ADT/STLExtras.h"
33#include "llvm/ADT/SmallSet.h"
34#include <algorithm>
35using namespace llvm;
36
37STATISTIC(NumSpills, "Number of register spills");
38STATISTIC(NumReMats, "Number of re-materialization");
39STATISTIC(NumStores, "Number of stores added");
40STATISTIC(NumLoads , "Number of loads added");
41STATISTIC(NumReused, "Number of values reused");
42STATISTIC(NumDSE , "Number of dead stores elided");
43STATISTIC(NumDCE , "Number of copies elided");
44
45namespace {
46 enum SpillerName { simple, local };
47
48 static cl::opt<SpillerName>
49 SpillerOpt("spiller",
50 cl::desc("Spiller to use: (default: local)"),
51 cl::Prefix,
52 cl::values(clEnumVal(simple, " simple spiller"),
53 clEnumVal(local, " local spiller"),
54 clEnumValEnd),
55 cl::init(local));
56}
57
58//===----------------------------------------------------------------------===//
59// VirtRegMap implementation
60//===----------------------------------------------------------------------===//
61
62VirtRegMap::VirtRegMap(MachineFunction &mf)
63 : TII(*mf.getTarget().getInstrInfo()), MF(mf),
64 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
Evan Cheng1204d172007-08-13 23:45:17 +000065 Virt2ReMatIdMap(NO_STACK_SLOT), ReMatMap(NULL),
Dan Gohmanf17a25c2007-07-18 16:29:46 +000066 ReMatId(MAX_STACK_SLOT+1) {
67 grow();
68}
69
70void VirtRegMap::grow() {
Evan Cheng1204d172007-08-13 23:45:17 +000071 unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg();
72 Virt2PhysMap.grow(LastVirtReg);
73 Virt2StackSlotMap.grow(LastVirtReg);
74 Virt2ReMatIdMap.grow(LastVirtReg);
75 ReMatMap.grow(LastVirtReg);
Dan Gohmanf17a25c2007-07-18 16:29:46 +000076}
77
78int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
79 assert(MRegisterInfo::isVirtualRegister(virtReg));
80 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
81 "attempt to assign stack slot to already spilled register");
82 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
83 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
84 RC->getAlignment());
85 Virt2StackSlotMap[virtReg] = frameIndex;
86 ++NumSpills;
87 return frameIndex;
88}
89
90void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
91 assert(MRegisterInfo::isVirtualRegister(virtReg));
92 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
93 "attempt to assign stack slot to already spilled register");
94 assert((frameIndex >= 0 ||
95 (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
96 "illegal fixed frame index");
97 Virt2StackSlotMap[virtReg] = frameIndex;
98}
99
100int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
101 assert(MRegisterInfo::isVirtualRegister(virtReg));
Evan Cheng1204d172007-08-13 23:45:17 +0000102 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000103 "attempt to assign re-mat id to already spilled register");
Evan Cheng1204d172007-08-13 23:45:17 +0000104 Virt2ReMatIdMap[virtReg] = ReMatId;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000105 return ReMatId++;
106}
107
Evan Cheng1204d172007-08-13 23:45:17 +0000108void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
109 assert(MRegisterInfo::isVirtualRegister(virtReg));
110 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
111 "attempt to assign re-mat id to already spilled register");
112 Virt2ReMatIdMap[virtReg] = id;
113}
114
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000115void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
116 unsigned OpNo, MachineInstr *NewMI) {
117 // Move previous memory references folded to new instruction.
118 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
119 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
120 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
121 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
122 MI2VirtMap.erase(I++);
123 }
124
125 ModRef MRInfo;
126 const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor();
127 if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 ||
128 TID->findTiedToSrcOperand(OpNo) != -1) {
129 // Folded a two-address operand.
130 MRInfo = isModRef;
131 } else if (OldMI->getOperand(OpNo).isDef()) {
132 MRInfo = isMod;
133 } else {
134 MRInfo = isRef;
135 }
136
137 // add new memory reference
138 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
139}
140
141void VirtRegMap::print(std::ostream &OS) const {
142 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
143
144 OS << "********** REGISTER MAP **********\n";
145 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
146 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
147 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
148 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
149
150 }
151
152 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
153 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
154 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
155 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
156 OS << '\n';
157}
158
159void VirtRegMap::dump() const {
160 print(DOUT);
161}
162
163
164//===----------------------------------------------------------------------===//
165// Simple Spiller Implementation
166//===----------------------------------------------------------------------===//
167
168Spiller::~Spiller() {}
169
170namespace {
171 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
172 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
173 };
174}
175
176bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
177 DOUT << "********** REWRITE MACHINE CODE **********\n";
178 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
179 const TargetMachine &TM = MF.getTarget();
180 const MRegisterInfo &MRI = *TM.getRegisterInfo();
181
182 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
183 // each vreg once (in the case where a spilled vreg is used by multiple
184 // operands). This is always smaller than the number of operands to the
185 // current machine instr, so it should be small.
186 std::vector<unsigned> LoadedRegs;
187
188 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
189 MBBI != E; ++MBBI) {
190 DOUT << MBBI->getBasicBlock()->getName() << ":\n";
191 MachineBasicBlock &MBB = *MBBI;
192 for (MachineBasicBlock::iterator MII = MBB.begin(),
193 E = MBB.end(); MII != E; ++MII) {
194 MachineInstr &MI = *MII;
195 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
196 MachineOperand &MO = MI.getOperand(i);
197 if (MO.isRegister() && MO.getReg())
198 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
199 unsigned VirtReg = MO.getReg();
200 unsigned PhysReg = VRM.getPhys(VirtReg);
Evan Cheng1204d172007-08-13 23:45:17 +0000201 if (!VRM.isAssignedReg(VirtReg)) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000202 int StackSlot = VRM.getStackSlot(VirtReg);
203 const TargetRegisterClass* RC =
204 MF.getSSARegMap()->getRegClass(VirtReg);
205
206 if (MO.isUse() &&
207 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
208 == LoadedRegs.end()) {
209 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
210 LoadedRegs.push_back(VirtReg);
211 ++NumLoads;
212 DOUT << '\t' << *prior(MII);
213 }
214
215 if (MO.isDef()) {
216 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
217 ++NumStores;
218 }
219 }
220 MF.setPhysRegUsed(PhysReg);
221 MI.getOperand(i).setReg(PhysReg);
222 } else {
223 MF.setPhysRegUsed(MO.getReg());
224 }
225 }
226
227 DOUT << '\t' << MI;
228 LoadedRegs.clear();
229 }
230 }
231 return true;
232}
233
234//===----------------------------------------------------------------------===//
235// Local Spiller Implementation
236//===----------------------------------------------------------------------===//
237
238namespace {
239 /// LocalSpiller - This spiller does a simple pass over the machine basic
240 /// block to attempt to keep spills in registers as much as possible for
241 /// blocks that have low register pressure (the vreg may be spilled due to
242 /// register pressure in other blocks).
243 class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
244 const MRegisterInfo *MRI;
245 const TargetInstrInfo *TII;
246 public:
247 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
248 MRI = MF.getTarget().getRegisterInfo();
249 TII = MF.getTarget().getInstrInfo();
250 DOUT << "\n**** Local spiller rewriting function '"
251 << MF.getFunction()->getName() << "':\n";
252
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000253 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
254 MBB != E; ++MBB)
Evan Cheng1204d172007-08-13 23:45:17 +0000255 RewriteMBB(*MBB, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000256 return true;
257 }
258 private:
Evan Cheng1204d172007-08-13 23:45:17 +0000259 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000260 };
261}
262
263/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
Evan Cheng1204d172007-08-13 23:45:17 +0000264/// top down, keep track of which spills slots or remat are available in each
265/// register.
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000266///
267/// Note that not all physregs are created equal here. In particular, some
268/// physregs are reloads that we are allowed to clobber or ignore at any time.
269/// Other physregs are values that the register allocated program is using that
270/// we cannot CHANGE, but we can read if we like. We keep track of this on a
Evan Cheng1204d172007-08-13 23:45:17 +0000271/// per-stack-slot / remat id basis as the low bit in the value of the
272/// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks
273/// this bit and addAvailable sets it if.
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000274namespace {
275class VISIBILITY_HIDDEN AvailableSpills {
276 const MRegisterInfo *MRI;
277 const TargetInstrInfo *TII;
278
Evan Cheng1204d172007-08-13 23:45:17 +0000279 // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
280 // or remat'ed virtual register values that are still available, due to being
281 // loaded or stored to, but not invalidated yet.
282 std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000283
Evan Cheng1204d172007-08-13 23:45:17 +0000284 // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
285 // indicating which stack slot values are currently held by a physreg. This
286 // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
287 // physreg is modified.
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000288 std::multimap<unsigned, int> PhysRegsAvailable;
289
290 void disallowClobberPhysRegOnly(unsigned PhysReg);
291
292 void ClobberPhysRegOnly(unsigned PhysReg);
293public:
294 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
295 : MRI(mri), TII(tii) {
296 }
297
298 const MRegisterInfo *getRegInfo() const { return MRI; }
299
Evan Cheng1204d172007-08-13 23:45:17 +0000300 /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
301 /// available in a physical register, return that PhysReg, otherwise
302 /// return 0.
303 unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
304 std::map<int, unsigned>::const_iterator I =
305 SpillSlotsOrReMatsAvailable.find(Slot);
306 if (I != SpillSlotsOrReMatsAvailable.end()) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000307 return I->second >> 1; // Remove the CanClobber bit.
308 }
309 return 0;
310 }
311
Evan Cheng1204d172007-08-13 23:45:17 +0000312 /// addAvailable - Mark that the specified stack slot / remat is available in
313 /// the specified physreg. If CanClobber is true, the physreg can be modified
314 /// at any time without changing the semantics of the program.
315 void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000316 bool CanClobber = true) {
317 // If this stack slot is thought to be available in some other physreg,
318 // remove its record.
Evan Cheng1204d172007-08-13 23:45:17 +0000319 ModifyStackSlotOrReMat(SlotOrReMat);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000320
Evan Cheng1204d172007-08-13 23:45:17 +0000321 PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
322 SpillSlotsOrReMatsAvailable[SlotOrReMat] = (Reg << 1) | (unsigned)CanClobber;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000323
Evan Cheng1204d172007-08-13 23:45:17 +0000324 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
325 DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000326 else
Evan Cheng1204d172007-08-13 23:45:17 +0000327 DOUT << "Remembering SS#" << SlotOrReMat;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000328 DOUT << " in physreg " << MRI->getName(Reg) << "\n";
329 }
330
331 /// canClobberPhysReg - Return true if the spiller is allowed to change the
332 /// value of the specified stackslot register if it desires. The specified
333 /// stack slot must be available in a physreg for this query to make sense.
Evan Cheng1204d172007-08-13 23:45:17 +0000334 bool canClobberPhysReg(int SlotOrReMat) const {
335 assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) && "Value not available!");
336 return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000337 }
338
339 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
340 /// stackslot register. The register is still available but is no longer
341 /// allowed to be modifed.
342 void disallowClobberPhysReg(unsigned PhysReg);
343
344 /// ClobberPhysReg - This is called when the specified physreg changes
345 /// value. We use this to invalidate any info about stuff we thing lives in
346 /// it and any of its aliases.
347 void ClobberPhysReg(unsigned PhysReg);
348
Evan Cheng1204d172007-08-13 23:45:17 +0000349 /// ModifyStackSlotOrReMat - This method is called when the value in a stack slot
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000350 /// changes. This removes information about which register the previous value
351 /// for this slot lives in (as the previous value is dead now).
Evan Cheng1204d172007-08-13 23:45:17 +0000352 void ModifyStackSlotOrReMat(int SlotOrReMat);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000353};
354}
355
356/// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
357/// stackslot register. The register is still available but is no longer
358/// allowed to be modifed.
359void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
360 std::multimap<unsigned, int>::iterator I =
361 PhysRegsAvailable.lower_bound(PhysReg);
362 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
Evan Cheng1204d172007-08-13 23:45:17 +0000363 int SlotOrReMat = I->second;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000364 I++;
Evan Cheng1204d172007-08-13 23:45:17 +0000365 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000366 "Bidirectional map mismatch!");
Evan Cheng1204d172007-08-13 23:45:17 +0000367 SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000368 DOUT << "PhysReg " << MRI->getName(PhysReg)
369 << " copied, it is available for use but can no longer be modified\n";
370 }
371}
372
373/// disallowClobberPhysReg - Unset the CanClobber bit of the specified
374/// stackslot register and its aliases. The register and its aliases may
375/// still available but is no longer allowed to be modifed.
376void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
377 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
378 disallowClobberPhysRegOnly(*AS);
379 disallowClobberPhysRegOnly(PhysReg);
380}
381
382/// ClobberPhysRegOnly - This is called when the specified physreg changes
383/// value. We use this to invalidate any info about stuff we thing lives in it.
384void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
385 std::multimap<unsigned, int>::iterator I =
386 PhysRegsAvailable.lower_bound(PhysReg);
387 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
Evan Cheng1204d172007-08-13 23:45:17 +0000388 int SlotOrReMat = I->second;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000389 PhysRegsAvailable.erase(I++);
Evan Cheng1204d172007-08-13 23:45:17 +0000390 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000391 "Bidirectional map mismatch!");
Evan Cheng1204d172007-08-13 23:45:17 +0000392 SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000393 DOUT << "PhysReg " << MRI->getName(PhysReg)
394 << " clobbered, invalidating ";
Evan Cheng1204d172007-08-13 23:45:17 +0000395 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
396 DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000397 else
Evan Cheng1204d172007-08-13 23:45:17 +0000398 DOUT << "SS#" << SlotOrReMat << "\n";
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000399 }
400}
401
402/// ClobberPhysReg - This is called when the specified physreg changes
403/// value. We use this to invalidate any info about stuff we thing lives in
404/// it and any of its aliases.
405void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
406 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
407 ClobberPhysRegOnly(*AS);
408 ClobberPhysRegOnly(PhysReg);
409}
410
Evan Cheng1204d172007-08-13 23:45:17 +0000411/// ModifyStackSlotOrReMat - This method is called when the value in a stack slot
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000412/// changes. This removes information about which register the previous value
413/// for this slot lives in (as the previous value is dead now).
Evan Cheng1204d172007-08-13 23:45:17 +0000414void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
415 std::map<int, unsigned>::iterator It = SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
416 if (It == SpillSlotsOrReMatsAvailable.end()) return;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000417 unsigned Reg = It->second >> 1;
Evan Cheng1204d172007-08-13 23:45:17 +0000418 SpillSlotsOrReMatsAvailable.erase(It);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000419
420 // This register may hold the value of multiple stack slots, only remove this
421 // stack slot from the set of values the register contains.
422 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
423 for (; ; ++I) {
424 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
425 "Map inverse broken!");
Evan Cheng1204d172007-08-13 23:45:17 +0000426 if (I->second == SlotOrReMat) break;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000427 }
428 PhysRegsAvailable.erase(I);
429}
430
431
432
433/// InvalidateKills - MI is going to be deleted. If any of its operands are
434/// marked kill, then invalidate the information.
435static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
436 std::vector<MachineOperand*> &KillOps) {
437 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
438 MachineOperand &MO = MI.getOperand(i);
439 if (!MO.isReg() || !MO.isUse() || !MO.isKill())
440 continue;
441 unsigned Reg = MO.getReg();
442 if (KillOps[Reg] == &MO) {
443 RegKills.reset(Reg);
444 KillOps[Reg] = NULL;
445 }
446 }
447}
448
449/// UpdateKills - Track and update kill info. If a MI reads a register that is
450/// marked kill, then it must be due to register reuse. Transfer the kill info
451/// over.
452static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
453 std::vector<MachineOperand*> &KillOps) {
454 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
455 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
456 MachineOperand &MO = MI.getOperand(i);
457 if (!MO.isReg() || !MO.isUse())
458 continue;
459 unsigned Reg = MO.getReg();
460 if (Reg == 0)
461 continue;
462
463 if (RegKills[Reg]) {
464 // That can't be right. Register is killed but not re-defined and it's
465 // being reused. Let's fix that.
466 KillOps[Reg]->unsetIsKill();
467 if (i < TID->numOperands &&
468 TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
469 // Unless it's a two-address operand, this is the new kill.
470 MO.setIsKill();
471 }
472
473 if (MO.isKill()) {
474 RegKills.set(Reg);
475 KillOps[Reg] = &MO;
476 }
477 }
478
479 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
480 const MachineOperand &MO = MI.getOperand(i);
481 if (!MO.isReg() || !MO.isDef())
482 continue;
483 unsigned Reg = MO.getReg();
484 RegKills.reset(Reg);
485 KillOps[Reg] = NULL;
486 }
487}
488
489
490// ReusedOp - For each reused operand, we keep track of a bit of information, in
491// case we need to rollback upon processing a new operand. See comments below.
492namespace {
493 struct ReusedOp {
494 // The MachineInstr operand that reused an available value.
495 unsigned Operand;
496
Evan Cheng1204d172007-08-13 23:45:17 +0000497 // StackSlotOrReMat - The spill slot or remat id of the value being reused.
498 unsigned StackSlotOrReMat;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000499
500 // PhysRegReused - The physical register the value was available in.
501 unsigned PhysRegReused;
502
503 // AssignedPhysReg - The physreg that was assigned for use by the reload.
504 unsigned AssignedPhysReg;
505
506 // VirtReg - The virtual register itself.
507 unsigned VirtReg;
508
509 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
510 unsigned vreg)
Evan Cheng1204d172007-08-13 23:45:17 +0000511 : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr), AssignedPhysReg(apr),
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000512 VirtReg(vreg) {}
513 };
514
515 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
516 /// is reused instead of reloaded.
517 class VISIBILITY_HIDDEN ReuseInfo {
518 MachineInstr &MI;
519 std::vector<ReusedOp> Reuses;
520 BitVector PhysRegsClobbered;
521 public:
522 ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
523 PhysRegsClobbered.resize(mri->getNumRegs());
524 }
525
526 bool hasReuses() const {
527 return !Reuses.empty();
528 }
529
530 /// addReuse - If we choose to reuse a virtual register that is already
531 /// available instead of reloading it, remember that we did so.
Evan Cheng1204d172007-08-13 23:45:17 +0000532 void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000533 unsigned PhysRegReused, unsigned AssignedPhysReg,
534 unsigned VirtReg) {
535 // If the reload is to the assigned register anyway, no undo will be
536 // required.
537 if (PhysRegReused == AssignedPhysReg) return;
538
539 // Otherwise, remember this.
Evan Cheng1204d172007-08-13 23:45:17 +0000540 Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000541 AssignedPhysReg, VirtReg));
542 }
543
544 void markClobbered(unsigned PhysReg) {
545 PhysRegsClobbered.set(PhysReg);
546 }
547
548 bool isClobbered(unsigned PhysReg) const {
549 return PhysRegsClobbered.test(PhysReg);
550 }
551
552 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
553 /// is some other operand that is using the specified register, either pick
554 /// a new register to use, or evict the previous reload and use this reg.
555 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
556 AvailableSpills &Spills,
557 std::map<int, MachineInstr*> &MaybeDeadStores,
558 SmallSet<unsigned, 8> &Rejected,
559 BitVector &RegKills,
Evan Cheng1204d172007-08-13 23:45:17 +0000560 std::vector<MachineOperand*> &KillOps,
561 VirtRegMap &VRM) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000562 if (Reuses.empty()) return PhysReg; // This is most often empty.
563
564 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
565 ReusedOp &Op = Reuses[ro];
566 // If we find some other reuse that was supposed to use this register
567 // exactly for its reload, we can change this reload to use ITS reload
568 // register. That is, unless its reload register has already been
569 // considered and subsequently rejected because it has also been reused
570 // by another operand.
571 if (Op.PhysRegReused == PhysReg &&
572 Rejected.count(Op.AssignedPhysReg) == 0) {
573 // Yup, use the reload register that we didn't use before.
574 unsigned NewReg = Op.AssignedPhysReg;
575 Rejected.insert(PhysReg);
576 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
Evan Cheng1204d172007-08-13 23:45:17 +0000577 RegKills, KillOps, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000578 } else {
579 // Otherwise, we might also have a problem if a previously reused
580 // value aliases the new register. If so, codegen the previous reload
581 // and use this one.
582 unsigned PRRU = Op.PhysRegReused;
583 const MRegisterInfo *MRI = Spills.getRegInfo();
584 if (MRI->areAliases(PRRU, PhysReg)) {
585 // Okay, we found out that an alias of a reused register
586 // was used. This isn't good because it means we have
587 // to undo a previous reuse.
588 MachineBasicBlock *MBB = MI->getParent();
589 const TargetRegisterClass *AliasRC =
590 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
591
592 // Copy Op out of the vector and remove it, we're going to insert an
593 // explicit load for it.
594 ReusedOp NewOp = Op;
595 Reuses.erase(Reuses.begin()+ro);
596
597 // Ok, we're going to try to reload the assigned physreg into the
598 // slot that we were supposed to in the first place. However, that
599 // register could hold a reuse. Check to see if it conflicts or
600 // would prefer us to use a different register.
601 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
602 MI, Spills, MaybeDeadStores,
Evan Cheng1204d172007-08-13 23:45:17 +0000603 Rejected, RegKills, KillOps, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000604
Evan Cheng1204d172007-08-13 23:45:17 +0000605 if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
606 MRI->reMaterialize(*MBB, MI, NewPhysReg,
607 VRM.getReMaterializedMI(NewOp.VirtReg));
608 ++NumReMats;
609 } else {
610 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
611 NewOp.StackSlotOrReMat, AliasRC);
612 ++NumLoads;
613 }
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000614 Spills.ClobberPhysReg(NewPhysReg);
615 Spills.ClobberPhysReg(NewOp.PhysRegReused);
616
617 // Any stores to this stack slot are not dead anymore.
Evan Cheng1204d172007-08-13 23:45:17 +0000618 MaybeDeadStores.erase(NewOp.StackSlotOrReMat);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000619
620 MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
621
Evan Cheng1204d172007-08-13 23:45:17 +0000622 Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000623 MachineBasicBlock::iterator MII = MI;
624 --MII;
625 UpdateKills(*MII, RegKills, KillOps);
626 DOUT << '\t' << *MII;
627
628 DOUT << "Reuse undone!\n";
629 --NumReused;
630
631 // Finally, PhysReg is now available, go ahead and use it.
632 return PhysReg;
633 }
634 }
635 }
636 return PhysReg;
637 }
638
639 /// GetRegForReload - Helper for the above GetRegForReload(). Add a
640 /// 'Rejected' set to remember which registers have been considered and
641 /// rejected for the reload. This avoids infinite looping in case like
642 /// this:
643 /// t1 := op t2, t3
644 /// t2 <- assigned r0 for use by the reload but ended up reuse r1
645 /// t3 <- assigned r1 for use by the reload but ended up reuse r0
646 /// t1 <- desires r1
647 /// sees r1 is taken by t2, tries t2's reload register r0
648 /// sees r0 is taken by t3, tries t3's reload register r1
649 /// sees r1 is taken by t2, tries t2's reload register r0 ...
650 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
651 AvailableSpills &Spills,
652 std::map<int, MachineInstr*> &MaybeDeadStores,
653 BitVector &RegKills,
Evan Cheng1204d172007-08-13 23:45:17 +0000654 std::vector<MachineOperand*> &KillOps,
655 VirtRegMap &VRM) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000656 SmallSet<unsigned, 8> Rejected;
657 return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
Evan Cheng1204d172007-08-13 23:45:17 +0000658 RegKills, KillOps, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000659 }
660 };
661}
662
663
664/// rewriteMBB - Keep track of which spills are available even after the
665/// register allocator is done with them. If possible, avoid reloading vregs.
Evan Cheng1204d172007-08-13 23:45:17 +0000666void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000667 DOUT << MBB.getBasicBlock()->getName() << ":\n";
668
669 // Spills - Keep track of which spilled values are available in physregs so
670 // that we can choose to reuse the physregs instead of emitting reloads.
671 AvailableSpills Spills(MRI, TII);
672
673 // MaybeDeadStores - When we need to write a value back into a stack slot,
674 // keep track of the inserted store. If the stack slot value is never read
675 // (because the value was used from some available register, for example), and
676 // subsequently stored to, the original store is dead. This map keeps track
677 // of inserted stores that are not used. If we see a subsequent store to the
678 // same stack slot, the original store is deleted.
679 std::map<int, MachineInstr*> MaybeDeadStores;
680
681 // Keep track of kill information.
682 BitVector RegKills(MRI->getNumRegs());
683 std::vector<MachineOperand*> KillOps;
684 KillOps.resize(MRI->getNumRegs(), NULL);
685
686 MachineFunction &MF = *MBB.getParent();
687 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
688 MII != E; ) {
689 MachineInstr &MI = *MII;
690 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
691 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
692
693 bool Erased = false;
694 bool BackTracked = false;
695
696 /// ReusedOperands - Keep track of operand reuse in case we need to undo
697 /// reuse.
698 ReuseInfo ReusedOperands(MI, MRI);
699
700 // Loop over all of the implicit defs, clearing them from our available
701 // sets.
702 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000703 if (TID->ImplicitDefs) {
704 const unsigned *ImpDef = TID->ImplicitDefs;
705 for ( ; *ImpDef; ++ImpDef) {
706 MF.setPhysRegUsed(*ImpDef);
707 ReusedOperands.markClobbered(*ImpDef);
708 Spills.ClobberPhysReg(*ImpDef);
709 }
710 }
711
712 // Process all of the spilled uses and all non spilled reg references.
713 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
714 MachineOperand &MO = MI.getOperand(i);
715 if (!MO.isRegister() || MO.getReg() == 0)
716 continue; // Ignore non-register operands.
717
718 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
719 // Ignore physregs for spilling, but remember that it is used by this
720 // function.
721 MF.setPhysRegUsed(MO.getReg());
722 ReusedOperands.markClobbered(MO.getReg());
723 continue;
724 }
725
726 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
727 "Not a virtual or a physical register?");
728
729 unsigned VirtReg = MO.getReg();
Evan Cheng1204d172007-08-13 23:45:17 +0000730 if (VRM.isAssignedReg(VirtReg)) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000731 // This virtual register was assigned a physreg!
732 unsigned Phys = VRM.getPhys(VirtReg);
733 MF.setPhysRegUsed(Phys);
734 if (MO.isDef())
735 ReusedOperands.markClobbered(Phys);
736 MI.getOperand(i).setReg(Phys);
737 continue;
738 }
739
740 // This virtual register is now known to be a spilled value.
741 if (!MO.isUse())
742 continue; // Handle defs in the loop below (handle use&def here though)
743
Evan Cheng1204d172007-08-13 23:45:17 +0000744 bool DoReMat = VRM.isReMaterialized(VirtReg);
745 int SSorRMId = DoReMat
746 ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000747 unsigned PhysReg;
748
749 // Check to see if this stack slot is available.
Evan Cheng1204d172007-08-13 23:45:17 +0000750 if ((PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId))) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000751 // This spilled operand might be part of a two-address operand. If this
752 // is the case, then changing it will necessarily require changing the
753 // def part of the instruction as well. However, in some cases, we
754 // aren't allowed to modify the reused register. If none of these cases
755 // apply, reuse it.
756 bool CanReuse = true;
757 int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
758 if (ti != -1 &&
759 MI.getOperand(ti).isReg() &&
760 MI.getOperand(ti).getReg() == VirtReg) {
761 // Okay, we have a two address operand. We can reuse this physreg as
762 // long as we are allowed to clobber the value and there isn't an
763 // earlier def that has already clobbered the physreg.
Evan Cheng1204d172007-08-13 23:45:17 +0000764 CanReuse = Spills.canClobberPhysReg(SSorRMId) &&
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000765 !ReusedOperands.isClobbered(PhysReg);
766 }
767
768 if (CanReuse) {
769 // If this stack slot value is already available, reuse it!
Evan Cheng1204d172007-08-13 23:45:17 +0000770 if (SSorRMId > VirtRegMap::MAX_STACK_SLOT)
771 DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000772 else
Evan Cheng1204d172007-08-13 23:45:17 +0000773 DOUT << "Reusing SS#" << SSorRMId;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000774 DOUT << " from physreg "
775 << MRI->getName(PhysReg) << " for vreg"
776 << VirtReg <<" instead of reloading into physreg "
777 << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
778 MI.getOperand(i).setReg(PhysReg);
779
780 // The only technical detail we have is that we don't know that
781 // PhysReg won't be clobbered by a reloaded stack slot that occurs
782 // later in the instruction. In particular, consider 'op V1, V2'.
783 // If V1 is available in physreg R0, we would choose to reuse it
784 // here, instead of reloading it into the register the allocator
785 // indicated (say R1). However, V2 might have to be reloaded
786 // later, and it might indicate that it needs to live in R0. When
787 // this occurs, we need to have information available that
788 // indicates it is safe to use R1 for the reload instead of R0.
789 //
790 // To further complicate matters, we might conflict with an alias,
791 // or R0 and R1 might not be compatible with each other. In this
792 // case, we actually insert a reload for V1 in R1, ensuring that
793 // we can get at R0 or its alias.
Evan Cheng1204d172007-08-13 23:45:17 +0000794 ReusedOperands.addReuse(i, SSorRMId, PhysReg,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000795 VRM.getPhys(VirtReg), VirtReg);
796 if (ti != -1)
797 // Only mark it clobbered if this is a use&def operand.
798 ReusedOperands.markClobbered(PhysReg);
799 ++NumReused;
800 continue;
801 }
802
803 // Otherwise we have a situation where we have a two-address instruction
804 // whose mod/ref operand needs to be reloaded. This reload is already
805 // available in some register "PhysReg", but if we used PhysReg as the
806 // operand to our 2-addr instruction, the instruction would modify
807 // PhysReg. This isn't cool if something later uses PhysReg and expects
808 // to get its initial value.
809 //
810 // To avoid this problem, and to avoid doing a load right after a store,
811 // we emit a copy from PhysReg into the designated register for this
812 // operand.
813 unsigned DesignatedReg = VRM.getPhys(VirtReg);
814 assert(DesignatedReg && "Must map virtreg to physreg!");
815
816 // Note that, if we reused a register for a previous operand, the
817 // register we want to reload into might not actually be
818 // available. If this occurs, use the register indicated by the
819 // reuser.
820 if (ReusedOperands.hasReuses())
821 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
Evan Cheng1204d172007-08-13 23:45:17 +0000822 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000823
824 // If the mapped designated register is actually the physreg we have
825 // incoming, we don't need to inserted a dead copy.
826 if (DesignatedReg == PhysReg) {
827 // If this stack slot value is already available, reuse it!
Evan Cheng1204d172007-08-13 23:45:17 +0000828 if (SSorRMId > VirtRegMap::MAX_STACK_SLOT)
829 DOUT << "Reusing RM#" << SSorRMId-VirtRegMap::MAX_STACK_SLOT-1;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000830 else
Evan Cheng1204d172007-08-13 23:45:17 +0000831 DOUT << "Reusing SS#" << SSorRMId;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000832 DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg"
833 << VirtReg
834 << " instead of reloading into same physreg.\n";
835 MI.getOperand(i).setReg(PhysReg);
836 ReusedOperands.markClobbered(PhysReg);
837 ++NumReused;
838 continue;
839 }
840
841 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
842 MF.setPhysRegUsed(DesignatedReg);
843 ReusedOperands.markClobbered(DesignatedReg);
844 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
845
846 MachineInstr *CopyMI = prior(MII);
847 UpdateKills(*CopyMI, RegKills, KillOps);
848
849 // This invalidates DesignatedReg.
850 Spills.ClobberPhysReg(DesignatedReg);
851
Evan Cheng1204d172007-08-13 23:45:17 +0000852 Spills.addAvailable(SSorRMId, &MI, DesignatedReg);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000853 MI.getOperand(i).setReg(DesignatedReg);
854 DOUT << '\t' << *prior(MII);
855 ++NumReused;
856 continue;
857 }
858
859 // Otherwise, reload it and remember that we have it.
860 PhysReg = VRM.getPhys(VirtReg);
861 assert(PhysReg && "Must map virtreg to physreg!");
862 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
863
864 // Note that, if we reused a register for a previous operand, the
865 // register we want to reload into might not actually be
866 // available. If this occurs, use the register indicated by the
867 // reuser.
868 if (ReusedOperands.hasReuses())
869 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
Evan Cheng1204d172007-08-13 23:45:17 +0000870 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000871
872 MF.setPhysRegUsed(PhysReg);
873 ReusedOperands.markClobbered(PhysReg);
Evan Cheng1204d172007-08-13 23:45:17 +0000874 if (DoReMat) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000875 MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
876 ++NumReMats;
877 } else {
Evan Cheng1204d172007-08-13 23:45:17 +0000878 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000879 ++NumLoads;
880 }
881 // This invalidates PhysReg.
882 Spills.ClobberPhysReg(PhysReg);
883
884 // Any stores to this stack slot are not dead anymore.
Evan Cheng1204d172007-08-13 23:45:17 +0000885 if (!DoReMat)
886 MaybeDeadStores.erase(SSorRMId);
887 Spills.addAvailable(SSorRMId, &MI, PhysReg);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000888 // Assumes this is the last use. IsKill will be unset if reg is reused
889 // unless it's a two-address operand.
890 if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
891 MI.getOperand(i).setIsKill();
892 MI.getOperand(i).setReg(PhysReg);
893 UpdateKills(*prior(MII), RegKills, KillOps);
894 DOUT << '\t' << *prior(MII);
895 }
896
897 DOUT << '\t' << MI;
898
899 // If we have folded references to memory operands, make sure we clear all
900 // physical registers that may contain the value of the spilled virtual
901 // register
902 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
903 DOUT << "Folded vreg: " << I->second.first << " MR: "
904 << I->second.second;
905 unsigned VirtReg = I->second.first;
906 VirtRegMap::ModRef MR = I->second.second;
Evan Cheng1204d172007-08-13 23:45:17 +0000907 if (VRM.isAssignedReg(VirtReg)) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000908 DOUT << ": No stack slot!\n";
909 continue;
910 }
911 int SS = VRM.getStackSlot(VirtReg);
912 DOUT << " - StackSlot: " << SS << "\n";
913
914 // If this folded instruction is just a use, check to see if it's a
915 // straight load from the virt reg slot.
916 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
917 int FrameIdx;
918 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
919 if (FrameIdx == SS) {
920 // If this spill slot is available, turn it into a copy (or nothing)
921 // instead of leaving it as a load!
Evan Cheng1204d172007-08-13 23:45:17 +0000922 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000923 DOUT << "Promoted Load To Copy: " << MI;
924 if (DestReg != InReg) {
925 MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
926 MF.getSSARegMap()->getRegClass(VirtReg));
927 // Revisit the copy so we make sure to notice the effects of the
928 // operation on the destreg (either needing to RA it if it's
929 // virtual or needing to clobber any values if it's physical).
930 NextMII = &MI;
931 --NextMII; // backtrack to the copy.
932 BackTracked = true;
933 } else
934 DOUT << "Removing now-noop copy: " << MI;
935
936 VRM.RemoveFromFoldedVirtMap(&MI);
937 MBB.erase(&MI);
938 Erased = true;
939 goto ProcessNextInst;
940 }
941 }
942 }
943 }
944
945 // If this reference is not a use, any previous store is now dead.
946 // Otherwise, the store to this stack slot is not dead anymore.
947 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
948 if (MDSI != MaybeDeadStores.end()) {
949 if (MR & VirtRegMap::isRef) // Previous store is not dead.
950 MaybeDeadStores.erase(MDSI);
951 else {
952 // If we get here, the store is dead, nuke it now.
953 assert(VirtRegMap::isMod && "Can't be modref!");
954 DOUT << "Removed dead store:\t" << *MDSI->second;
955 InvalidateKills(*MDSI->second, RegKills, KillOps);
956 MBB.erase(MDSI->second);
957 VRM.RemoveFromFoldedVirtMap(MDSI->second);
958 MaybeDeadStores.erase(MDSI);
959 ++NumDSE;
960 }
961 }
962
963 // If the spill slot value is available, and this is a new definition of
964 // the value, the value is not available anymore.
965 if (MR & VirtRegMap::isMod) {
966 // Notice that the value in this stack slot has been modified.
Evan Cheng1204d172007-08-13 23:45:17 +0000967 Spills.ModifyStackSlotOrReMat(SS);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000968
969 // If this is *just* a mod of the value, check to see if this is just a
970 // store to the spill slot (i.e. the spill got merged into the copy). If
971 // so, realize that the vreg is available now, and add the store to the
972 // MaybeDeadStore info.
973 int StackSlot;
974 if (!(MR & VirtRegMap::isRef)) {
975 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
976 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
977 "Src hasn't been allocated yet?");
978 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
979 // this as a potentially dead store in case there is a subsequent
980 // store into the stack slot without a read from it.
981 MaybeDeadStores[StackSlot] = &MI;
982
983 // If the stack slot value was previously available in some other
984 // register, change it now. Otherwise, make the register available,
985 // in PhysReg.
986 Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
987 }
988 }
989 }
990 }
991
992 // Process all of the spilled defs.
993 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
994 MachineOperand &MO = MI.getOperand(i);
995 if (MO.isRegister() && MO.getReg() && MO.isDef()) {
996 unsigned VirtReg = MO.getReg();
997
998 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
999 // Check to see if this is a noop copy. If so, eliminate the
1000 // instruction before considering the dest reg to be changed.
1001 unsigned Src, Dst;
1002 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1003 ++NumDCE;
1004 DOUT << "Removing now-noop copy: " << MI;
1005 MBB.erase(&MI);
1006 Erased = true;
1007 VRM.RemoveFromFoldedVirtMap(&MI);
1008 Spills.disallowClobberPhysReg(VirtReg);
1009 goto ProcessNextInst;
1010 }
1011
1012 // If it's not a no-op copy, it clobbers the value in the destreg.
1013 Spills.ClobberPhysReg(VirtReg);
1014 ReusedOperands.markClobbered(VirtReg);
1015
1016 // Check to see if this instruction is a load from a stack slot into
1017 // a register. If so, this provides the stack slot value in the reg.
1018 int FrameIdx;
1019 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1020 assert(DestReg == VirtReg && "Unknown load situation!");
1021
1022 // Otherwise, if it wasn't available, remember that it is now!
1023 Spills.addAvailable(FrameIdx, &MI, DestReg);
1024 goto ProcessNextInst;
1025 }
1026
1027 continue;
1028 }
1029
1030 // The only vregs left are stack slot definitions.
1031 int StackSlot = VRM.getStackSlot(VirtReg);
1032 const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg);
1033
1034 // If this def is part of a two-address operand, make sure to execute
1035 // the store from the correct physical register.
1036 unsigned PhysReg;
1037 int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
1038 if (TiedOp != -1)
1039 PhysReg = MI.getOperand(TiedOp).getReg();
1040 else {
1041 PhysReg = VRM.getPhys(VirtReg);
1042 if (ReusedOperands.isClobbered(PhysReg)) {
1043 // Another def has taken the assigned physreg. It must have been a
1044 // use&def which got it due to reuse. Undo the reuse!
1045 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
Evan Cheng1204d172007-08-13 23:45:17 +00001046 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
Dan Gohmanf17a25c2007-07-18 16:29:46 +00001047 }
1048 }
1049
1050 MF.setPhysRegUsed(PhysReg);
1051 ReusedOperands.markClobbered(PhysReg);
1052 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
1053 DOUT << "Store:\t" << *next(MII);
1054 MI.getOperand(i).setReg(PhysReg);
1055
1056 // If there is a dead store to this stack slot, nuke it now.
1057 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1058 if (LastStore) {
1059 DOUT << "Removed dead store:\t" << *LastStore;
1060 ++NumDSE;
1061 InvalidateKills(*LastStore, RegKills, KillOps);
1062 MBB.erase(LastStore);
1063 VRM.RemoveFromFoldedVirtMap(LastStore);
1064 }
1065 LastStore = next(MII);
1066
1067 // If the stack slot value was previously available in some other
1068 // register, change it now. Otherwise, make the register available,
1069 // in PhysReg.
Evan Cheng1204d172007-08-13 23:45:17 +00001070 Spills.ModifyStackSlotOrReMat(StackSlot);
Dan Gohmanf17a25c2007-07-18 16:29:46 +00001071 Spills.ClobberPhysReg(PhysReg);
1072 Spills.addAvailable(StackSlot, LastStore, PhysReg);
1073 ++NumStores;
1074
1075 // Check to see if this is a noop copy. If so, eliminate the
1076 // instruction before considering the dest reg to be changed.
1077 {
1078 unsigned Src, Dst;
1079 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1080 ++NumDCE;
1081 DOUT << "Removing now-noop copy: " << MI;
1082 MBB.erase(&MI);
1083 Erased = true;
1084 VRM.RemoveFromFoldedVirtMap(&MI);
1085 UpdateKills(*LastStore, RegKills, KillOps);
1086 goto ProcessNextInst;
1087 }
1088 }
1089 }
1090 }
1091 ProcessNextInst:
1092 if (!Erased && !BackTracked)
1093 for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1094 UpdateKills(*II, RegKills, KillOps);
1095 MII = NextMII;
1096 }
1097}
1098
1099
1100llvm::Spiller* llvm::createSpiller() {
1101 switch (SpillerOpt) {
1102 default: assert(0 && "Unreachable!");
1103 case local:
1104 return new LocalSpiller();
1105 case simple:
1106 return new SimpleSpiller();
1107 }
1108}