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Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +00001//===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +00007//
8//===----------------------------------------------------------------------===//
9//
Chris Lattner8c4d88d2004-09-30 01:54:45 +000010// This file implements a virtual register map. This maps virtual registers to
11// physical registers and virtual registers to stack slots. It is created and
12// updated by a register allocator and then used by a machine code rewriter that
13// adds spill code and rewrites virtual into physical register references.
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000014//
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_CODEGEN_VIRTREGMAP_H
18#define LLVM_CODEGEN_VIRTREGMAP_H
19
Owen Anderson49c8aa02009-03-13 05:55:11 +000020#include "llvm/CodeGen/MachineFunctionPass.h"
Dan Gohman6f0d0242008-02-10 18:45:23 +000021#include "llvm/Target/TargetRegisterInfo.h"
Chris Lattner94c002a2007-02-01 05:32:05 +000022#include "llvm/ADT/IndexedMap.h"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000023
24namespace llvm {
Chris Lattner8c4d88d2004-09-30 01:54:45 +000025 class MachineInstr;
David Greene7e231462007-08-07 16:34:05 +000026 class MachineFunction;
Evan Cheng90f95f82009-06-14 20:22:55 +000027 class MachineRegisterInfo;
Chris Lattner29268692006-09-05 02:12:02 +000028 class TargetInstrInfo;
Daniel Dunbar1cd1d982009-07-24 10:36:58 +000029 class raw_ostream;
Jakob Stoklund Olesenba05c012011-02-18 22:03:18 +000030 class SlotIndexes;
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000031
Owen Anderson49c8aa02009-03-13 05:55:11 +000032 class VirtRegMap : public MachineFunctionPass {
Chris Lattner8c4d88d2004-09-30 01:54:45 +000033 public:
Evan Cheng2638e1a2007-03-20 08:13:50 +000034 enum {
35 NO_PHYS_REG = 0,
Evan Cheng91935142007-04-04 07:40:01 +000036 NO_STACK_SLOT = (1L << 30)-1,
37 MAX_STACK_SLOT = (1L << 18)-1
Evan Cheng2638e1a2007-03-20 08:13:50 +000038 };
39
Chris Lattner8c4d88d2004-09-30 01:54:45 +000040 private:
Evan Cheng90f95f82009-06-14 20:22:55 +000041 MachineRegisterInfo *MRI;
Owen Anderson49c8aa02009-03-13 05:55:11 +000042 const TargetInstrInfo *TII;
Mike Stumpfe095f32009-05-04 18:40:41 +000043 const TargetRegisterInfo *TRI;
Owen Anderson49c8aa02009-03-13 05:55:11 +000044 MachineFunction *MF;
Mike Stumpfe095f32009-05-04 18:40:41 +000045
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +000046 /// Virt2PhysMap - This is a virtual to physical register
47 /// mapping. Each virtual register is required to have an entry in
48 /// it; even spilled virtual registers (the register mapped to a
49 /// spilled register is the temporary used to load it from the
50 /// stack).
Chris Lattner94c002a2007-02-01 05:32:05 +000051 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
Evan Cheng81a03822007-11-17 00:40:40 +000052
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +000053 /// Virt2StackSlotMap - This is virtual register to stack slot
54 /// mapping. Each spilled virtual register has an entry in it
55 /// which corresponds to the stack slot this register is spilled
56 /// at.
Chris Lattner94c002a2007-02-01 05:32:05 +000057 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
Evan Cheng81a03822007-11-17 00:40:40 +000058
Evan Cheng81a03822007-11-17 00:40:40 +000059 /// Virt2SplitMap - This is virtual register to splitted virtual register
60 /// mapping.
61 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
62
Jakob Stoklund Olesenb55e91e2010-11-16 00:41:01 +000063 /// createSpillSlot - Allocate a spill slot for RC from MFI.
64 unsigned createSpillSlot(const TargetRegisterClass *RC);
65
Chris Lattner8c4d88d2004-09-30 01:54:45 +000066 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
67 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
Alkis Evlogimenos79742872004-02-23 23:47:10 +000068
Chris Lattner8c4d88d2004-09-30 01:54:45 +000069 public:
Owen Anderson49c8aa02009-03-13 05:55:11 +000070 static char ID;
Owen Anderson90c579d2010-08-06 18:33:48 +000071 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
Jakob Stoklund Olesencb390642011-11-13 01:23:30 +000072 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
Owen Anderson49c8aa02009-03-13 05:55:11 +000073 virtual bool runOnMachineFunction(MachineFunction &MF);
74
75 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
76 AU.setPreservesAll();
77 MachineFunctionPass::getAnalysisUsage(AU);
78 }
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000079
Jakob Stoklund Olesenf0179002010-07-26 23:44:11 +000080 MachineFunction &getMachineFunction() const {
Jakob Stoklund Olesenc9672cb2010-12-10 18:36:02 +000081 assert(MF && "getMachineFunction called before runOnMachineFunction");
Jakob Stoklund Olesenf0179002010-07-26 23:44:11 +000082 return *MF;
83 }
84
Jakob Stoklund Olesenc9672cb2010-12-10 18:36:02 +000085 MachineRegisterInfo &getRegInfo() const { return *MRI; }
86 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
87
Chris Lattner8c4d88d2004-09-30 01:54:45 +000088 void grow();
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +000089
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +000090 /// @brief returns true if the specified virtual register is
91 /// mapped to a physical register
Chris Lattner8c4d88d2004-09-30 01:54:45 +000092 bool hasPhys(unsigned virtReg) const {
93 return getPhys(virtReg) != NO_PHYS_REG;
94 }
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +000095
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +000096 /// @brief returns the physical register mapped to the specified
97 /// virtual register
Chris Lattner8c4d88d2004-09-30 01:54:45 +000098 unsigned getPhys(unsigned virtReg) const {
Dan Gohman6f0d0242008-02-10 18:45:23 +000099 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +0000100 return Virt2PhysMap[virtReg];
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000101 }
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000102
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +0000103 /// @brief creates a mapping for the specified virtual register to
104 /// the specified physical register
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000105 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
Dan Gohman6f0d0242008-02-10 18:45:23 +0000106 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
107 TargetRegisterInfo::isPhysicalRegister(physReg));
Chris Lattner7f690e62004-09-30 02:15:18 +0000108 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000109 "attempt to assign physical register to already mapped "
110 "virtual register");
Chris Lattner7f690e62004-09-30 02:15:18 +0000111 Virt2PhysMap[virtReg] = physReg;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000112 }
113
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +0000114 /// @brief clears the specified virtual register's, physical
115 /// register mapping
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000116 void clearVirt(unsigned virtReg) {
Dan Gohman6f0d0242008-02-10 18:45:23 +0000117 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +0000118 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000119 "attempt to clear a not assigned virtual register");
Chris Lattner7f690e62004-09-30 02:15:18 +0000120 Virt2PhysMap[virtReg] = NO_PHYS_REG;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000121 }
122
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +0000123 /// @brief clears all virtual to physical register mappings
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000124 void clearAllVirt() {
Chris Lattner7f690e62004-09-30 02:15:18 +0000125 Virt2PhysMap.clear();
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000126 grow();
127 }
128
Evan Cheng90f95f82009-06-14 20:22:55 +0000129 /// @brief returns the register allocation preference.
130 unsigned getRegAllocPref(unsigned virtReg);
131
Jakob Stoklund Olesen51458ed2011-07-08 20:46:18 +0000132 /// @brief returns true if VirtReg is assigned to its preferred physreg.
133 bool hasPreferredPhys(unsigned VirtReg) {
134 return getPhys(VirtReg) == getRegAllocPref(VirtReg);
135 }
136
Evan Cheng81a03822007-11-17 00:40:40 +0000137 /// @brief records virtReg is a split live interval from SReg.
138 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
139 Virt2SplitMap[virtReg] = SReg;
140 }
141
142 /// @brief returns the live interval virtReg is split from.
Jakob Stoklund Olesene324f6e2011-02-18 22:35:20 +0000143 unsigned getPreSplitReg(unsigned virtReg) const {
Evan Cheng81a03822007-11-17 00:40:40 +0000144 return Virt2SplitMap[virtReg];
145 }
146
Jakob Stoklund Olesenfd389172011-02-19 00:38:43 +0000147 /// getOriginal - Return the original virtual register that VirtReg descends
148 /// from through splitting.
149 /// A register that was not created by splitting is its own original.
150 /// This operation is idempotent.
151 unsigned getOriginal(unsigned VirtReg) const {
152 unsigned Orig = getPreSplitReg(VirtReg);
153 return Orig ? Orig : VirtReg;
154 }
155
Dan Gohman39e33ac2008-03-12 20:50:04 +0000156 /// @brief returns true if the specified virtual register is not
Evan Cheng549f27d32007-08-13 23:45:17 +0000157 /// mapped to a stack slot or rematerialized.
158 bool isAssignedReg(unsigned virtReg) const {
Jakob Stoklund Olesen3cb0b0e2011-11-13 01:02:04 +0000159 if (getStackSlot(virtReg) == NO_STACK_SLOT)
Evan Cheng81a03822007-11-17 00:40:40 +0000160 return true;
161 // Split register can be assigned a physical register as well as a
162 // stack slot or remat id.
163 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000164 }
165
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +0000166 /// @brief returns the stack slot mapped to the specified virtual
167 /// register
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000168 int getStackSlot(unsigned virtReg) const {
Dan Gohman6f0d0242008-02-10 18:45:23 +0000169 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +0000170 return Virt2StackSlotMap[virtReg];
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000171 }
172
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +0000173 /// @brief create a mapping for the specifed virtual register to
174 /// the next available stack slot
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000175 int assignVirt2StackSlot(unsigned virtReg);
Alkis Evlogimenosc736b3a2004-10-01 00:35:07 +0000176 /// @brief create a mapping for the specified virtual register to
177 /// the specified stack slot
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000178 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
179
Jakob Stoklund Olesenba05c012011-02-18 22:03:18 +0000180 /// rewrite - Rewrite all instructions in MF to use only physical registers
181 /// by mapping all virtual register operands to their assigned physical
182 /// registers.
183 ///
184 /// @param Indexes Optionally remove deleted instructions from indexes.
185 void rewrite(SlotIndexes *Indexes);
186
Daniel Dunbar1cd1d982009-07-24 10:36:58 +0000187 void print(raw_ostream &OS, const Module* M = 0) const;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000188 void dump() const;
189 };
190
Daniel Dunbar1cd1d982009-07-24 10:36:58 +0000191 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
192 VRM.print(OS);
193 return OS;
194 }
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +0000195} // End llvm namespace
196
197#endif