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Scott Michela589a082007-12-03 23:14:43 +00001//===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
Scott Michela589a082007-12-03 23:14:43 +00005// This file was developed by a team from the Computer Systems Research
Scott Michel2466c372007-12-05 01:40:25 +00006// Department at The Aerospace Corporation and is distributed under the
7// University of Illinois Open Source License. See LICENSE.TXT for details.
Scott Michela589a082007-12-03 23:14:43 +00008//
Scott Michela589a082007-12-03 23:14:43 +00009//===----------------------------------------------------------------------===//
10//
11// This is the top level entry point for the STI Cell SPU target machine.
12//
13//===----------------------------------------------------------------------===//
14
15// Get the target-independent interfaces which we are implementing.
16//
17include "../Target.td"
18
19//===----------------------------------------------------------------------===//
20// Register File Description
21//===----------------------------------------------------------------------===//
22
23include "SPURegisterInfo.td"
24
25//===----------------------------------------------------------------------===//
26// Instruction formats, instructions
27//===----------------------------------------------------------------------===//
28
29include "SPUNodes.td"
30include "SPUOperands.td"
31include "SPUSchedule.td"
32include "SPUInstrFormats.td"
33include "SPUInstrInfo.td"
34
35//===----------------------------------------------------------------------===//
36// Subtarget features:
37//===----------------------------------------------------------------------===//
38
39def DefaultProc: SubtargetFeature<"", "ProcDirective", "SPU::DEFAULT_PROC", "">;
40def LargeMemFeature:
41 SubtargetFeature<"large_mem","UseLargeMem", "true",
42 "Use large (>256) LSA memory addressing [default = false]">;
43
44def SPURev0 : Processor<"v0", SPUItineraries, [DefaultProc]>;
45
46//===----------------------------------------------------------------------===//
47// Calling convention:
48//===----------------------------------------------------------------------===//
49
50include "SPUCallingConv.td"
51
52// Target:
53
54def SPUInstrInfo : InstrInfo {
55 let isLittleEndianEncoding = 1;
56}
57
58def SPU : Target {
59 let InstructionSet = SPUInstrInfo;
60}