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Anton Korobeynikove1676012010-04-07 18:22:11 +00001//=- ARMScheduleA8.td - ARM Cortex-A8 Scheduling Definitions -*- tablegen -*-=//
Jim Grosbache9e3f202010-06-28 04:27:01 +00002//
Anton Korobeynikove1676012010-04-07 18:22:11 +00003// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jim Grosbache9e3f202010-06-28 04:27:01 +00007//
Anton Korobeynikove1676012010-04-07 18:22:11 +00008//===----------------------------------------------------------------------===//
9//
10// This file defines the itinerary class data for the ARM Cortex A8 processors.
11//
12//===----------------------------------------------------------------------===//
13
14//
15// Scheduling information derived from "Cortex-A8 Technical Reference Manual".
Anton Korobeynikov928eb492010-04-18 20:31:01 +000016// Functional Units.
Anton Korobeynikov928eb492010-04-18 20:31:01 +000017def A8_Pipe0 : FuncUnit; // pipeline 0
18def A8_Pipe1 : FuncUnit; // pipeline 1
Evan Chengd2ca8132010-10-09 01:03:04 +000019def A8_LSPipe : FuncUnit; // Load / store pipeline
Anton Korobeynikov928eb492010-04-18 20:31:01 +000020def A8_NPipe : FuncUnit; // NEON ALU/MUL pipe
21def A8_NLSPipe : FuncUnit; // NEON LS pipe
Anton Korobeynikove1676012010-04-07 18:22:11 +000022//
Anton Korobeynikov928eb492010-04-18 20:31:01 +000023// Dual issue pipeline represented by A8_Pipe0 | A8_Pipe1
Anton Korobeynikove1676012010-04-07 18:22:11 +000024//
Anton Korobeynikov928eb492010-04-18 20:31:01 +000025def CortexA8Itineraries : ProcessorItineraries<
Evan Chengd2ca8132010-10-09 01:03:04 +000026 [A8_Pipe0, A8_Pipe1, A8_LSPipe, A8_NPipe, A8_NLSPipe],
Evan Cheng63d66ee2010-09-28 23:50:49 +000027 [], [
Anton Korobeynikove1676012010-04-07 18:22:11 +000028 // Two fully-pipelined integer ALU pipelines
29 //
30 // No operand cycles
Anton Korobeynikov928eb492010-04-18 20:31:01 +000031 InstrItinData<IIC_iALUx , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +000032 //
33 // Binary Instructions that produce a result
Jim Grosbache9e3f202010-06-28 04:27:01 +000034 InstrItinData<IIC_iALUi ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
35 InstrItinData<IIC_iALUr ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 2]>,
36 InstrItinData<IIC_iALUsi,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1]>,
Evan Cheng3881cb72010-09-29 22:42:35 +000037 InstrItinData<IIC_iALUsir,[InstrStage<1,[A8_Pipe0, A8_Pipe1]>], [2, 1, 2]>,
Jim Grosbache9e3f202010-06-28 04:27:01 +000038 InstrItinData<IIC_iALUsr,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +000039 //
Evan Cheng7e1bf302010-09-29 00:27:46 +000040 // Bitwise Instructions that produce a result
41 InstrItinData<IIC_iBITi ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
42 InstrItinData<IIC_iBITr ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 2]>,
43 InstrItinData<IIC_iBITsi,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1]>,
44 InstrItinData<IIC_iBITsr,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1, 1]>,
45 //
Anton Korobeynikove1676012010-04-07 18:22:11 +000046 // Unary Instructions that produce a result
Jim Grosbache9e3f202010-06-28 04:27:01 +000047 InstrItinData<IIC_iUNAr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
48 InstrItinData<IIC_iUNAsi, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +000049 //
Evan Cheng576a3962010-09-25 00:49:35 +000050 // Zero and sign extension instructions
51 InstrItinData<IIC_iEXTr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1]>,
52 InstrItinData<IIC_iEXTAr, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1]>,
Evan Cheng7e1bf302010-09-29 00:27:46 +000053 InstrItinData<IIC_iEXTAsr,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>],[2, 2, 1, 1]>,
Evan Cheng576a3962010-09-25 00:49:35 +000054 //
Anton Korobeynikove1676012010-04-07 18:22:11 +000055 // Compare instructions
Jim Grosbache9e3f202010-06-28 04:27:01 +000056 InstrItinData<IIC_iCMPi , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2]>,
57 InstrItinData<IIC_iCMPr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
58 InstrItinData<IIC_iCMPsi, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1]>,
59 InstrItinData<IIC_iCMPsr, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +000060 //
Evan Cheng5d42c562010-09-29 00:49:25 +000061 // Test instructions
62 InstrItinData<IIC_iTSTi , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2]>,
63 InstrItinData<IIC_iTSTr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
64 InstrItinData<IIC_iTSTsi, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1]>,
65 InstrItinData<IIC_iTSTsr, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1, 1]>,
66 //
Anton Korobeynikove1676012010-04-07 18:22:11 +000067 // Move instructions, unconditional
Jim Grosbache9e3f202010-06-28 04:27:01 +000068 InstrItinData<IIC_iMOVi , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1]>,
69 InstrItinData<IIC_iMOVr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1]>,
70 InstrItinData<IIC_iMOVsi, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1]>,
71 InstrItinData<IIC_iMOVsr, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1, 1]>,
Evan Cheng5d42c562010-09-29 00:49:25 +000072 InstrItinData<IIC_iMOVix2,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
73 InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2]>,
Evan Cheng9fe20092011-01-20 08:34:58 +000074 InstrItinData<IIC_iMOVix2addpc,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
75 InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
76 InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [3]>,
77 InstrItinData<IIC_iMOVix2ld,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
78 InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
79 InstrStage<1, [A8_LSPipe]>], [5]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +000080 //
81 // Move instructions, conditional
Jim Grosbache9e3f202010-06-28 04:27:01 +000082 InstrItinData<IIC_iCMOVi , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2]>,
83 InstrItinData<IIC_iCMOVr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1]>,
84 InstrItinData<IIC_iCMOVsi, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1]>,
85 InstrItinData<IIC_iCMOVsr, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 1, 1]>,
Evan Chengc47f7d62010-11-13 05:14:20 +000086 InstrItinData<IIC_iCMOVix2,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
87 InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [3, 1]>,
Evan Cheng5d42c562010-09-29 00:49:25 +000088 //
89 // MVN instructions
90 InstrItinData<IIC_iMVNi , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1]>,
91 InstrItinData<IIC_iMVNr , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1]>,
92 InstrItinData<IIC_iMVNsi, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1]>,
93 InstrItinData<IIC_iMVNsr, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [1, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +000094
95 // Integer multiply pipeline
96 // Result written in E5, but that is relative to the last cycle of multicycle,
97 // so we use 6 for those cases
98 //
Anton Korobeynikov928eb492010-04-18 20:31:01 +000099 InstrItinData<IIC_iMUL16 , [InstrStage<1, [A8_Pipe0]>], [5, 1, 1]>,
Evan Cheng8ae6ffa2010-10-09 01:15:04 +0000100 InstrItinData<IIC_iMAC16 , [InstrStage<2, [A8_Pipe0]>], [6, 1, 1, 4]>,
101 InstrItinData<IIC_iMUL32 , [InstrStage<2, [A8_Pipe0]>], [6, 1, 1]>,
102 InstrItinData<IIC_iMAC32 , [InstrStage<2, [A8_Pipe0]>], [6, 1, 1, 4]>,
103 InstrItinData<IIC_iMUL64 , [InstrStage<3, [A8_Pipe0]>], [6, 6, 1, 1]>,
104 InstrItinData<IIC_iMAC64 , [InstrStage<3, [A8_Pipe0]>], [6, 6, 1, 1]>,
Jim Grosbache9e3f202010-06-28 04:27:01 +0000105
Anton Korobeynikove1676012010-04-07 18:22:11 +0000106 // Integer load pipeline
107 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000108 // Immediate offset
Evan Cheng41957f62010-11-03 00:40:22 +0000109 InstrItinData<IIC_iLoad_i , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000110 InstrStage<1, [A8_LSPipe]>], [3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000111 InstrItinData<IIC_iLoad_bh_i, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000112 InstrStage<1, [A8_LSPipe]>], [3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000113 InstrItinData<IIC_iLoad_d_i, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000114 InstrStage<1, [A8_LSPipe]>], [3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000115 //
116 // Register offset
Evan Cheng41957f62010-11-03 00:40:22 +0000117 InstrItinData<IIC_iLoad_r , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000118 InstrStage<1, [A8_LSPipe]>], [3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000119 InstrItinData<IIC_iLoad_bh_r, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000120 InstrStage<1, [A8_LSPipe]>], [3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000121 InstrItinData<IIC_iLoad_d_r , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000122 InstrStage<1, [A8_LSPipe]>], [3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000123 //
124 // Scaled register offset, issues over 2 cycles
Evan Chengd2ca8132010-10-09 01:03:04 +0000125 // FIXME: lsl by 2 takes 1 cycle.
Evan Cheng41957f62010-11-03 00:40:22 +0000126 InstrItinData<IIC_iLoad_si , [InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000127 InstrStage<1, [A8_LSPipe]>], [4, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000128 InstrItinData<IIC_iLoad_bh_si,[InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000129 InstrStage<1, [A8_LSPipe]>], [4, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000130 //
131 // Immediate offset with update
Evan Cheng41957f62010-11-03 00:40:22 +0000132 InstrItinData<IIC_iLoad_iu , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000133 InstrStage<1, [A8_LSPipe]>], [3, 2, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000134 InstrItinData<IIC_iLoad_bh_iu,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000135 InstrStage<1, [A8_LSPipe]>], [3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000136 //
137 // Register offset with update
Evan Cheng41957f62010-11-03 00:40:22 +0000138 InstrItinData<IIC_iLoad_ru , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000139 InstrStage<1, [A8_LSPipe]>], [3, 2, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000140 InstrItinData<IIC_iLoad_bh_ru,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000141 InstrStage<1, [A8_LSPipe]>], [3, 2, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000142 InstrItinData<IIC_iLoad_d_ru, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000143 InstrStage<1, [A8_LSPipe]>], [3, 2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000144 //
145 // Scaled register offset with update, issues over 2 cycles
Evan Cheng41957f62010-11-03 00:40:22 +0000146 InstrItinData<IIC_iLoad_siu , [InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
147 InstrStage<2, [A8_LSPipe]>], [4, 3, 1, 1]>,
148 InstrItinData<IIC_iLoad_bh_siu,[InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
149 InstrStage<2, [A8_LSPipe]>], [4, 3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000150 //
Evan Chengd2ca8132010-10-09 01:03:04 +0000151 // Load multiple, def is the 5th operand. Pipeline 0 only.
152 // FIXME: A8_LSPipe cycle time is dynamic, this assumes 3 to 4 registers.
Evan Cheng41957f62010-11-03 00:40:22 +0000153 InstrItinData<IIC_iLoad_m , [InstrStage<2, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000154 InstrStage<2, [A8_LSPipe]>], [1, 1, 1, 1, 3]>,
Evan Chenga0792de2010-10-06 06:27:31 +0000155 //
156 // Load multiple + update, defs are the 1st and 5th operands.
Evan Cheng41957f62010-11-03 00:40:22 +0000157 InstrItinData<IIC_iLoad_mu , [InstrStage<3, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000158 InstrStage<3, [A8_LSPipe]>], [2, 1, 1, 1, 3]>,
Evan Cheng7602acb2010-09-08 22:57:08 +0000159 //
160 // Load multiple plus branch
Evan Cheng41957f62010-11-03 00:40:22 +0000161 InstrItinData<IIC_iLoad_mBr, [InstrStage<3, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000162 InstrStage<3, [A8_LSPipe]>,
Evan Chenga0792de2010-10-06 06:27:31 +0000163 InstrStage<1, [A8_Pipe0, A8_Pipe1]>],
164 [1, 2, 1, 1, 3]>,
165 //
166 // Pop, def is the 3rd operand.
Evan Cheng41957f62010-11-03 00:40:22 +0000167 InstrItinData<IIC_iPop , [InstrStage<3, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000168 InstrStage<3, [A8_LSPipe]>], [1, 1, 3]>,
Evan Chenga0792de2010-10-06 06:27:31 +0000169 //
170 // Push, def is the 3th operand.
Evan Cheng41957f62010-11-03 00:40:22 +0000171 InstrItinData<IIC_iPop_Br, [InstrStage<3, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000172 InstrStage<3, [A8_LSPipe]>,
Evan Chenga0792de2010-10-06 06:27:31 +0000173 InstrStage<1, [A8_Pipe0, A8_Pipe1]>],
174 [1, 1, 3]>,
Evan Cheng7602acb2010-09-08 22:57:08 +0000175
Evan Chengbd30ce42010-09-24 22:41:41 +0000176 //
177 // iLoadi + iALUr for t2LDRpci_pic.
Evan Cheng41957f62010-11-03 00:40:22 +0000178 InstrItinData<IIC_iLoadiALU, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000179 InstrStage<1, [A8_LSPipe]>,
Evan Chengbd30ce42010-09-24 22:41:41 +0000180 InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [4, 1]>,
181
182
Anton Korobeynikove1676012010-04-07 18:22:11 +0000183 // Integer store pipeline
184 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000185 // Immediate offset
Evan Cheng41957f62010-11-03 00:40:22 +0000186 InstrItinData<IIC_iStore_i , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000187 InstrStage<1, [A8_LSPipe]>], [3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000188 InstrItinData<IIC_iStore_bh_i,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000189 InstrStage<1, [A8_LSPipe]>], [3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000190 InstrItinData<IIC_iStore_d_i, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000191 InstrStage<1, [A8_LSPipe]>], [3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000192 //
193 // Register offset
Evan Cheng41957f62010-11-03 00:40:22 +0000194 InstrItinData<IIC_iStore_r , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000195 InstrStage<1, [A8_LSPipe]>], [3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000196 InstrItinData<IIC_iStore_bh_r,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000197 InstrStage<1, [A8_LSPipe]>], [3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000198 InstrItinData<IIC_iStore_d_r, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000199 InstrStage<1, [A8_LSPipe]>], [3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000200 //
201 // Scaled register offset, issues over 2 cycles
Evan Cheng41957f62010-11-03 00:40:22 +0000202 InstrItinData<IIC_iStore_si , [InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000203 InstrStage<2, [A8_LSPipe]>], [3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000204 InstrItinData<IIC_iStore_bh_si,[InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000205 InstrStage<2, [A8_LSPipe]>], [3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000206 //
207 // Immediate offset with update
Evan Cheng41957f62010-11-03 00:40:22 +0000208 InstrItinData<IIC_iStore_iu , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000209 InstrStage<1, [A8_LSPipe]>], [2, 3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000210 InstrItinData<IIC_iStore_bh_iu,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000211 InstrStage<1, [A8_LSPipe]>], [2, 3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000212 //
213 // Register offset with update
Evan Cheng41957f62010-11-03 00:40:22 +0000214 InstrItinData<IIC_iStore_ru , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000215 InstrStage<1, [A8_LSPipe]>], [2, 3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000216 InstrItinData<IIC_iStore_bh_ru,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000217 InstrStage<1, [A8_LSPipe]>], [2, 3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000218 InstrItinData<IIC_iStore_d_ru, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000219 InstrStage<1, [A8_LSPipe]>], [2, 3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000220 //
221 // Scaled register offset with update, issues over 2 cycles
Evan Cheng41957f62010-11-03 00:40:22 +0000222 InstrItinData<IIC_iStore_siu, [InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000223 InstrStage<2, [A8_LSPipe]>], [3, 3, 1, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000224 InstrItinData<IIC_iStore_bh_siu,[InstrStage<2, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000225 InstrStage<2, [A8_LSPipe]>], [3, 3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000226 //
Evan Chengd2ca8132010-10-09 01:03:04 +0000227 // Store multiple. Pipeline 0 only.
228 // FIXME: A8_LSPipe cycle time is dynamic, this assumes 3 to 4 registers.
Evan Cheng41957f62010-11-03 00:40:22 +0000229 InstrItinData<IIC_iStore_m , [InstrStage<2, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000230 InstrStage<2, [A8_LSPipe]>]>,
Evan Chenga0792de2010-10-06 06:27:31 +0000231 //
232 // Store multiple + update
Evan Cheng41957f62010-11-03 00:40:22 +0000233 InstrItinData<IIC_iStore_mu, [InstrStage<2, [A8_Pipe0], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000234 InstrStage<2, [A8_LSPipe]>], [2]>,
Jim Grosbache9e3f202010-06-28 04:27:01 +0000235
Evan Chengdfed19f2010-11-03 06:34:55 +0000236 //
237 // Preload
238 InstrItinData<IIC_Preload, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>,
239
Anton Korobeynikove1676012010-04-07 18:22:11 +0000240 // Branch
241 //
242 // no delay slots, so the latency of a branch is unimportant
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000243 InstrItinData<IIC_Br , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000244
245 // VFP
246 // Issue through integer pipeline, and execute in NEON unit. We assume
247 // RunFast mode so that NFP pipeline is used for single-precision when
248 // possible.
249 //
250 // FP Special Register to Integer Register File Move
Evan Cheng41957f62010-11-03 00:40:22 +0000251 InstrItinData<IIC_fpSTAT , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chenge09206d2010-10-29 23:16:55 +0000252 InstrStage<1, [A8_NLSPipe]>], [20]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000253 //
254 // Single-precision FP Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000255 InstrItinData<IIC_fpUNA32 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000256 InstrStage<1, [A8_NPipe]>], [7, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000257 //
258 // Double-precision FP Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000259 InstrItinData<IIC_fpUNA64 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000260 InstrStage<4, [A8_NPipe], 0>,
261 InstrStage<4, [A8_NLSPipe]>], [4, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000262 //
263 // Single-precision FP Compare
Evan Cheng41957f62010-11-03 00:40:22 +0000264 InstrItinData<IIC_fpCMP32 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000265 InstrStage<1, [A8_NPipe]>], [1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000266 //
267 // Double-precision FP Compare
Evan Cheng41957f62010-11-03 00:40:22 +0000268 InstrItinData<IIC_fpCMP64 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000269 InstrStage<4, [A8_NPipe], 0>,
270 InstrStage<4, [A8_NLSPipe]>], [4, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000271 //
272 // Single to Double FP Convert
Evan Cheng41957f62010-11-03 00:40:22 +0000273 InstrItinData<IIC_fpCVTSD , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000274 InstrStage<7, [A8_NPipe], 0>,
275 InstrStage<7, [A8_NLSPipe]>], [7, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000276 //
277 // Double to Single FP Convert
Evan Cheng41957f62010-11-03 00:40:22 +0000278 InstrItinData<IIC_fpCVTDS , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000279 InstrStage<5, [A8_NPipe], 0>,
280 InstrStage<5, [A8_NLSPipe]>], [5, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000281 //
282 // Single-Precision FP to Integer Convert
Evan Cheng41957f62010-11-03 00:40:22 +0000283 InstrItinData<IIC_fpCVTSI , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000284 InstrStage<1, [A8_NPipe]>], [7, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000285 //
286 // Double-Precision FP to Integer Convert
Evan Cheng41957f62010-11-03 00:40:22 +0000287 InstrItinData<IIC_fpCVTDI , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000288 InstrStage<8, [A8_NPipe], 0>,
289 InstrStage<8, [A8_NLSPipe]>], [8, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000290 //
291 // Integer to Single-Precision FP Convert
Evan Cheng41957f62010-11-03 00:40:22 +0000292 InstrItinData<IIC_fpCVTIS , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000293 InstrStage<1, [A8_NPipe]>], [7, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000294 //
295 // Integer to Double-Precision FP Convert
Evan Cheng41957f62010-11-03 00:40:22 +0000296 InstrItinData<IIC_fpCVTID , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000297 InstrStage<8, [A8_NPipe], 0>,
298 InstrStage<8, [A8_NLSPipe]>], [8, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000299 //
300 // Single-precision FP ALU
Evan Cheng41957f62010-11-03 00:40:22 +0000301 InstrItinData<IIC_fpALU32 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000302 InstrStage<1, [A8_NPipe]>], [7, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000303 //
304 // Double-precision FP ALU
Evan Cheng41957f62010-11-03 00:40:22 +0000305 InstrItinData<IIC_fpALU64 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000306 InstrStage<9, [A8_NPipe], 0>,
307 InstrStage<9, [A8_NLSPipe]>], [9, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000308 //
309 // Single-precision FP Multiply
Evan Cheng41957f62010-11-03 00:40:22 +0000310 InstrItinData<IIC_fpMUL32 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000311 InstrStage<1, [A8_NPipe]>], [7, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000312 //
313 // Double-precision FP Multiply
Evan Cheng41957f62010-11-03 00:40:22 +0000314 InstrItinData<IIC_fpMUL64 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000315 InstrStage<11, [A8_NPipe], 0>,
316 InstrStage<11, [A8_NLSPipe]>], [11, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000317 //
318 // Single-precision FP MAC
Evan Cheng41957f62010-11-03 00:40:22 +0000319 InstrItinData<IIC_fpMAC32 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000320 InstrStage<1, [A8_NPipe]>], [7, 2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000321 //
322 // Double-precision FP MAC
Evan Cheng41957f62010-11-03 00:40:22 +0000323 InstrItinData<IIC_fpMAC64 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000324 InstrStage<19, [A8_NPipe], 0>,
325 InstrStage<19, [A8_NLSPipe]>], [19, 2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000326 //
327 // Single-precision FP DIV
Evan Cheng41957f62010-11-03 00:40:22 +0000328 InstrItinData<IIC_fpDIV32 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000329 InstrStage<20, [A8_NPipe], 0>,
330 InstrStage<20, [A8_NLSPipe]>], [20, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000331 //
332 // Double-precision FP DIV
Evan Cheng41957f62010-11-03 00:40:22 +0000333 InstrItinData<IIC_fpDIV64 , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000334 InstrStage<29, [A8_NPipe], 0>,
335 InstrStage<29, [A8_NLSPipe]>], [29, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000336 //
337 // Single-precision FP SQRT
Evan Cheng41957f62010-11-03 00:40:22 +0000338 InstrItinData<IIC_fpSQRT32, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000339 InstrStage<19, [A8_NPipe], 0>,
340 InstrStage<19, [A8_NLSPipe]>], [19, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000341 //
342 // Double-precision FP SQRT
Evan Cheng41957f62010-11-03 00:40:22 +0000343 InstrItinData<IIC_fpSQRT64, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000344 InstrStage<29, [A8_NPipe], 0>,
345 InstrStage<29, [A8_NLSPipe]>], [29, 1]>,
Andrew Trick5b7a8252010-10-21 03:40:16 +0000346
347 //
348 // Integer to Single-precision Move
Evan Cheng41957f62010-11-03 00:40:22 +0000349 InstrItinData<IIC_fpMOVIS, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Andrew Trick5b7a8252010-10-21 03:40:16 +0000350 InstrStage<1, [A8_NPipe]>],
351 [2, 1]>,
352 //
353 // Integer to Double-precision Move
Evan Cheng41957f62010-11-03 00:40:22 +0000354 InstrItinData<IIC_fpMOVID, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Andrew Trick5b7a8252010-10-21 03:40:16 +0000355 InstrStage<1, [A8_NPipe]>],
356 [2, 1, 1]>,
357 //
358 // Single-precision to Integer Move
Evan Cheng41957f62010-11-03 00:40:22 +0000359 InstrItinData<IIC_fpMOVSI, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Andrew Trick5b7a8252010-10-21 03:40:16 +0000360 InstrStage<1, [A8_NPipe]>],
361 [20, 1]>,
362 //
363 // Double-precision to Integer Move
Evan Cheng41957f62010-11-03 00:40:22 +0000364 InstrItinData<IIC_fpMOVDI, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Andrew Trick5b7a8252010-10-21 03:40:16 +0000365 InstrStage<1, [A8_NPipe]>],
366 [20, 20, 1]>,
367
Anton Korobeynikove1676012010-04-07 18:22:11 +0000368 //
369 // Single-precision FP Load
Evan Cheng41957f62010-11-03 00:40:22 +0000370 InstrItinData<IIC_fpLoad32, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
371 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000372 InstrStage<1, [A8_LSPipe]>],
Evan Chengdf9da6a2010-10-01 21:40:30 +0000373 [2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000374 //
375 // Double-precision FP Load
Evan Cheng41957f62010-11-03 00:40:22 +0000376 InstrItinData<IIC_fpLoad64, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
377 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000378 InstrStage<1, [A8_LSPipe]>],
Evan Chengdf9da6a2010-10-01 21:40:30 +0000379 [2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000380 //
381 // FP Load Multiple
Evan Chengd2ca8132010-10-09 01:03:04 +0000382 // FIXME: A8_LSPipe cycle time is dynamic, this assumes 3 to 4 registers.
Evan Cheng41957f62010-11-03 00:40:22 +0000383 InstrItinData<IIC_fpLoad_m, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
384 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000385 InstrStage<1, [A8_LSPipe]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000386 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000387 InstrStage<1, [A8_LSPipe]>], [1, 1, 1, 2]>,
Evan Cheng5a50cee2010-10-07 01:50:48 +0000388 //
389 // FP Load Multiple + update
Evan Cheng41957f62010-11-03 00:40:22 +0000390 InstrItinData<IIC_fpLoad_mu,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
391 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000392 InstrStage<1, [A8_LSPipe]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000393 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000394 InstrStage<1, [A8_LSPipe]>], [2, 1, 1, 1, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000395 //
396 // Single-precision FP Store
Evan Cheng41957f62010-11-03 00:40:22 +0000397 InstrItinData<IIC_fpStore32,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
398 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000399 InstrStage<1, [A8_LSPipe]>],
Evan Chengdf9da6a2010-10-01 21:40:30 +0000400 [1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000401 //
402 // Double-precision FP Store
Evan Cheng41957f62010-11-03 00:40:22 +0000403 InstrItinData<IIC_fpStore64,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
404 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000405 InstrStage<1, [A8_LSPipe]>],
Evan Chengdf9da6a2010-10-01 21:40:30 +0000406 [1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000407 //
408 // FP Store Multiple
Evan Cheng41957f62010-11-03 00:40:22 +0000409 InstrItinData<IIC_fpStore_m,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
410 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000411 InstrStage<1, [A8_LSPipe]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000412 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000413 InstrStage<1, [A8_LSPipe]>], [1, 1, 1, 1]>,
Evan Cheng5a50cee2010-10-07 01:50:48 +0000414 //
415 // FP Store Multiple + update
Evan Cheng41957f62010-11-03 00:40:22 +0000416 InstrItinData<IIC_fpStore_mu,[InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
417 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000418 InstrStage<1, [A8_LSPipe]>,
Evan Cheng41957f62010-11-03 00:40:22 +0000419 InstrStage<1, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000420 InstrStage<1, [A8_LSPipe]>], [2, 1, 1, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000421
422 // NEON
423 // Issue through integer pipeline, and execute in NEON unit.
424 //
425 // VLD1
Evan Cheng41957f62010-11-03 00:40:22 +0000426 InstrItinData<IIC_VLD1, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
427 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000428 InstrStage<2, [A8_LSPipe]>],
429 [2, 1]>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000430 // VLD1x2
Evan Cheng41957f62010-11-03 00:40:22 +0000431 InstrItinData<IIC_VLD1x2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
432 InstrStage<2, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000433 InstrStage<2, [A8_LSPipe]>],
434 [2, 2, 1]>,
435 //
436 // VLD1x3
Evan Cheng41957f62010-11-03 00:40:22 +0000437 InstrItinData<IIC_VLD1x3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
438 InstrStage<3, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000439 InstrStage<3, [A8_LSPipe]>],
440 [2, 2, 3, 1]>,
441 //
442 // VLD1x4
Evan Cheng41957f62010-11-03 00:40:22 +0000443 InstrItinData<IIC_VLD1x4, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
444 InstrStage<3, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000445 InstrStage<3, [A8_LSPipe]>],
446 [2, 2, 3, 3, 1]>,
447 //
448 // VLD1u
Evan Cheng41957f62010-11-03 00:40:22 +0000449 InstrItinData<IIC_VLD1u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
450 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000451 InstrStage<2, [A8_LSPipe]>],
Evan Chengd2ca8132010-10-09 01:03:04 +0000452 [2, 2, 1]>,
453 //
454 // VLD1x2u
Evan Cheng41957f62010-11-03 00:40:22 +0000455 InstrItinData<IIC_VLD1x2u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
456 InstrStage<2, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000457 InstrStage<2, [A8_LSPipe]>],
458 [2, 2, 2, 1]>,
459 //
460 // VLD1x3u
Evan Cheng41957f62010-11-03 00:40:22 +0000461 InstrItinData<IIC_VLD1x3u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
462 InstrStage<3, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000463 InstrStage<3, [A8_LSPipe]>],
464 [2, 2, 3, 2, 1]>,
465 //
466 // VLD1x4u
Evan Cheng41957f62010-11-03 00:40:22 +0000467 InstrItinData<IIC_VLD1x4u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
468 InstrStage<3, [A8_NLSPipe], 0>,
Evan Chengd2ca8132010-10-09 01:03:04 +0000469 InstrStage<3, [A8_LSPipe]>],
470 [2, 2, 3, 3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000471 //
Bob Wilsonb796bbb2010-11-01 22:04:05 +0000472 // VLD1ln
473 InstrItinData<IIC_VLD1ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
Bob Wilson8d412942010-11-27 06:35:09 +0000474 InstrStage<3, [A8_NLSPipe], 0>,
Bob Wilsonb796bbb2010-11-01 22:04:05 +0000475 InstrStage<3, [A8_LSPipe]>],
476 [3, 1, 1, 1]>,
477 //
478 // VLD1lnu
479 InstrItinData<IIC_VLD1lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
Bob Wilson8d412942010-11-27 06:35:09 +0000480 InstrStage<3, [A8_NLSPipe], 0>,
Bob Wilsonb796bbb2010-11-01 22:04:05 +0000481 InstrStage<3, [A8_LSPipe]>],
482 [3, 2, 1, 1, 1, 1]>,
483 //
Bob Wilson2a0e9742010-11-27 06:35:16 +0000484 // VLD1dup
485 InstrItinData<IIC_VLD1dup, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
486 InstrStage<2, [A8_NLSPipe], 0>,
487 InstrStage<2, [A8_LSPipe]>],
488 [2, 1]>,
489 //
490 // VLD1dupu
491 InstrItinData<IIC_VLD1dupu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
492 InstrStage<2, [A8_NLSPipe], 0>,
493 InstrStage<2, [A8_LSPipe]>],
494 [2, 2, 1, 1]>,
495 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000496 // VLD2
Evan Cheng41957f62010-11-03 00:40:22 +0000497 InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
498 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000499 InstrStage<2, [A8_LSPipe]>],
Evan Cheng40bb6832010-10-09 01:26:12 +0000500 [2, 2, 1]>,
501 //
502 // VLD2x2
Evan Cheng41957f62010-11-03 00:40:22 +0000503 InstrItinData<IIC_VLD2x2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
504 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng40bb6832010-10-09 01:26:12 +0000505 InstrStage<3, [A8_LSPipe]>],
506 [2, 2, 3, 3, 1]>,
507 //
508 // VLD2ln
Evan Cheng41957f62010-11-03 00:40:22 +0000509 InstrItinData<IIC_VLD2ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
510 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng40bb6832010-10-09 01:26:12 +0000511 InstrStage<3, [A8_LSPipe]>],
512 [3, 3, 1, 1, 1, 1]>,
513 //
514 // VLD2u
Evan Cheng41957f62010-11-03 00:40:22 +0000515 InstrItinData<IIC_VLD2u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
516 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000517 InstrStage<2, [A8_LSPipe]>],
Evan Cheng40bb6832010-10-09 01:26:12 +0000518 [2, 2, 2, 1, 1, 1]>,
519 //
520 // VLD2x2u
Evan Cheng41957f62010-11-03 00:40:22 +0000521 InstrItinData<IIC_VLD2x2u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
522 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng40bb6832010-10-09 01:26:12 +0000523 InstrStage<3, [A8_LSPipe]>],
524 [2, 2, 3, 3, 2, 1]>,
525 //
526 // VLD2lnu
Evan Cheng41957f62010-11-03 00:40:22 +0000527 InstrItinData<IIC_VLD2lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
528 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng40bb6832010-10-09 01:26:12 +0000529 InstrStage<3, [A8_LSPipe]>],
530 [3, 3, 2, 1, 1, 1, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000531 //
Bob Wilsonb1dfa7a2010-11-28 06:51:26 +0000532 // VLD2dup
533 InstrItinData<IIC_VLD2dup, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
534 InstrStage<2, [A8_NLSPipe], 0>,
535 InstrStage<2, [A8_LSPipe]>],
Bob Wilson2fcda632010-11-29 19:35:23 +0000536 [2, 2, 1]>,
Bob Wilsonb1dfa7a2010-11-28 06:51:26 +0000537 //
538 // VLD2dupu
539 InstrItinData<IIC_VLD2dupu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
540 InstrStage<2, [A8_NLSPipe], 0>,
541 InstrStage<2, [A8_LSPipe]>],
Bob Wilson2fcda632010-11-29 19:35:23 +0000542 [2, 2, 2, 1, 1]>,
Bob Wilsonb1dfa7a2010-11-28 06:51:26 +0000543 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000544 // VLD3
Evan Cheng41957f62010-11-03 00:40:22 +0000545 InstrItinData<IIC_VLD3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
546 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng84f69e82010-10-09 01:45:34 +0000547 InstrStage<4, [A8_LSPipe]>],
548 [3, 3, 4, 1]>,
549 //
550 // VLD3ln
Evan Cheng41957f62010-11-03 00:40:22 +0000551 InstrItinData<IIC_VLD3ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
552 InstrStage<5, [A8_NLSPipe], 0>,
Evan Cheng84f69e82010-10-09 01:45:34 +0000553 InstrStage<5, [A8_LSPipe]>],
554 [4, 4, 5, 1, 1, 1, 1, 2]>,
555 //
556 // VLD3u
Evan Cheng41957f62010-11-03 00:40:22 +0000557 InstrItinData<IIC_VLD3u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
558 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng84f69e82010-10-09 01:45:34 +0000559 InstrStage<4, [A8_LSPipe]>],
560 [3, 3, 4, 2, 1]>,
561 //
562 // VLD3lnu
Evan Cheng41957f62010-11-03 00:40:22 +0000563 InstrItinData<IIC_VLD3lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
564 InstrStage<5, [A8_NLSPipe], 0>,
Evan Cheng84f69e82010-10-09 01:45:34 +0000565 InstrStage<5, [A8_LSPipe]>],
566 [4, 4, 5, 2, 1, 1, 1, 1, 1, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000567 //
Bob Wilson86c6d802010-11-29 19:35:29 +0000568 // VLD3dup
569 InstrItinData<IIC_VLD3dup, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
570 InstrStage<3, [A8_NLSPipe], 0>,
571 InstrStage<3, [A8_LSPipe]>],
572 [2, 2, 3, 1]>,
573 //
574 // VLD3dupu
575 InstrItinData<IIC_VLD3dupu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
576 InstrStage<3, [A8_NLSPipe], 0>,
577 InstrStage<3, [A8_LSPipe]>],
578 [2, 2, 3, 2, 1, 1]>,
579 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000580 // VLD4
Evan Cheng41957f62010-11-03 00:40:22 +0000581 InstrItinData<IIC_VLD4, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
582 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng10dc63f2010-10-09 04:07:58 +0000583 InstrStage<4, [A8_LSPipe]>],
584 [3, 3, 4, 4, 1]>,
585 //
586 // VLD4ln
Evan Cheng41957f62010-11-03 00:40:22 +0000587 InstrItinData<IIC_VLD4ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
588 InstrStage<5, [A8_NLSPipe], 0>,
Evan Cheng10dc63f2010-10-09 04:07:58 +0000589 InstrStage<5, [A8_LSPipe]>],
590 [4, 4, 5, 5, 1, 1, 1, 1, 2, 2]>,
591 //
592 // VLD4u
Evan Cheng41957f62010-11-03 00:40:22 +0000593 InstrItinData<IIC_VLD4u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
594 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng10dc63f2010-10-09 04:07:58 +0000595 InstrStage<4, [A8_LSPipe]>],
596 [3, 3, 4, 4, 2, 1]>,
597 //
598 // VLD4lnu
Evan Cheng41957f62010-11-03 00:40:22 +0000599 InstrItinData<IIC_VLD4lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
600 InstrStage<5, [A8_NLSPipe], 0>,
Evan Cheng10dc63f2010-10-09 04:07:58 +0000601 InstrStage<5, [A8_LSPipe]>],
602 [4, 4, 5, 5, 2, 1, 1, 1, 1, 1, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000603 //
Bob Wilson6c4c9822010-11-30 00:00:35 +0000604 // VLD4dup
605 InstrItinData<IIC_VLD4dup, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
606 InstrStage<3, [A8_NLSPipe], 0>,
607 InstrStage<3, [A8_LSPipe]>],
608 [2, 2, 3, 3, 1]>,
609 //
610 // VLD4dupu
611 InstrItinData<IIC_VLD4dupu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
612 InstrStage<3, [A8_NLSPipe], 0>,
613 InstrStage<3, [A8_LSPipe]>],
614 [2, 2, 3, 3, 2, 1, 1]>,
615 //
Evan Cheng60ff8792010-10-11 22:03:18 +0000616 // VST1
Evan Cheng41957f62010-11-03 00:40:22 +0000617 InstrItinData<IIC_VST1, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
618 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000619 InstrStage<2, [A8_LSPipe]>],
620 [1, 1, 1]>,
621 //
622 // VST1x2
Evan Cheng41957f62010-11-03 00:40:22 +0000623 InstrItinData<IIC_VST1x2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
624 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000625 InstrStage<2, [A8_LSPipe]>],
626 [1, 1, 1, 1]>,
627 //
628 // VST1x3
Evan Cheng41957f62010-11-03 00:40:22 +0000629 InstrItinData<IIC_VST1x3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
630 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000631 InstrStage<3, [A8_LSPipe]>],
632 [1, 1, 1, 1, 2]>,
633 //
634 // VST1x4
Evan Cheng41957f62010-11-03 00:40:22 +0000635 InstrItinData<IIC_VST1x4, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
636 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000637 InstrStage<3, [A8_LSPipe]>],
638 [1, 1, 1, 1, 2, 2]>,
639 //
640 // VST1u
Evan Cheng41957f62010-11-03 00:40:22 +0000641 InstrItinData<IIC_VST1u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
642 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000643 InstrStage<2, [A8_LSPipe]>],
644 [2, 1, 1, 1, 1]>,
645 //
646 // VST1x2u
Evan Cheng41957f62010-11-03 00:40:22 +0000647 InstrItinData<IIC_VST1x2u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
648 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000649 InstrStage<2, [A8_LSPipe]>],
650 [2, 1, 1, 1, 1, 1]>,
651 //
652 // VST1x3u
Evan Cheng41957f62010-11-03 00:40:22 +0000653 InstrItinData<IIC_VST1x3u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
654 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000655 InstrStage<3, [A8_LSPipe]>],
656 [2, 1, 1, 1, 1, 1, 2]>,
657 //
658 // VST1x4u
Evan Cheng41957f62010-11-03 00:40:22 +0000659 InstrItinData<IIC_VST1x4u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
660 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000661 InstrStage<3, [A8_LSPipe]>],
662 [2, 1, 1, 1, 1, 1, 2, 2]>,
663 //
Bob Wilsond0c6bc22010-11-02 21:18:25 +0000664 // VST1ln
665 InstrItinData<IIC_VST1ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
Bob Wilson8d412942010-11-27 06:35:09 +0000666 InstrStage<2, [A8_NLSPipe], 0>,
Bob Wilsond0c6bc22010-11-02 21:18:25 +0000667 InstrStage<2, [A8_LSPipe]>],
668 [1, 1, 1]>,
669 //
670 // VST1lnu
671 InstrItinData<IIC_VST1lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
Bob Wilson8d412942010-11-27 06:35:09 +0000672 InstrStage<2, [A8_NLSPipe], 0>,
Bob Wilsond0c6bc22010-11-02 21:18:25 +0000673 InstrStage<2, [A8_LSPipe]>],
674 [2, 1, 1, 1, 1]>,
675 //
Evan Cheng60ff8792010-10-11 22:03:18 +0000676 // VST2
Evan Cheng41957f62010-11-03 00:40:22 +0000677 InstrItinData<IIC_VST2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
678 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000679 InstrStage<2, [A8_LSPipe]>],
680 [1, 1, 1, 1]>,
681 //
682 // VST2x2
Evan Cheng41957f62010-11-03 00:40:22 +0000683 InstrItinData<IIC_VST2x2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
684 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000685 InstrStage<4, [A8_LSPipe]>],
686 [1, 1, 1, 1, 2, 2]>,
687 //
688 // VST2u
Evan Cheng41957f62010-11-03 00:40:22 +0000689 InstrItinData<IIC_VST2u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
690 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000691 InstrStage<2, [A8_LSPipe]>],
692 [2, 1, 1, 1, 1, 1]>,
693 //
694 // VST2x2u
Evan Cheng41957f62010-11-03 00:40:22 +0000695 InstrItinData<IIC_VST2x2u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
696 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000697 InstrStage<4, [A8_LSPipe]>],
698 [2, 1, 1, 1, 1, 1, 2, 2]>,
699 //
700 // VST2ln
Evan Cheng41957f62010-11-03 00:40:22 +0000701 InstrItinData<IIC_VST2ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
702 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000703 InstrStage<2, [A8_LSPipe]>],
704 [1, 1, 1, 1]>,
705 //
706 // VST2lnu
Evan Cheng41957f62010-11-03 00:40:22 +0000707 InstrItinData<IIC_VST2lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
708 InstrStage<2, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000709 InstrStage<2, [A8_LSPipe]>],
710 [2, 1, 1, 1, 1, 1]>,
711 //
712 // VST3
Evan Cheng41957f62010-11-03 00:40:22 +0000713 InstrItinData<IIC_VST3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
714 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000715 InstrStage<3, [A8_LSPipe]>],
716 [1, 1, 1, 1, 2]>,
717 //
718 // VST3u
Evan Cheng41957f62010-11-03 00:40:22 +0000719 InstrItinData<IIC_VST3u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
720 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000721 InstrStage<3, [A8_LSPipe]>],
722 [2, 1, 1, 1, 1, 1, 2]>,
723 //
724 // VST3ln
Evan Cheng41957f62010-11-03 00:40:22 +0000725 InstrItinData<IIC_VST3ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
726 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000727 InstrStage<3, [A8_LSPipe]>],
728 [1, 1, 1, 1, 2]>,
729 //
730 // VST3lnu
Evan Cheng41957f62010-11-03 00:40:22 +0000731 InstrItinData<IIC_VST3lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
732 InstrStage<3, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000733 InstrStage<3, [A8_LSPipe]>],
734 [2, 1, 1, 1, 1, 1, 2]>,
735 //
736 // VST4
Evan Cheng41957f62010-11-03 00:40:22 +0000737 InstrItinData<IIC_VST4, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
738 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000739 InstrStage<4, [A8_LSPipe]>],
740 [1, 1, 1, 1, 2, 2]>,
741 //
742 // VST4u
Evan Cheng41957f62010-11-03 00:40:22 +0000743 InstrItinData<IIC_VST4u, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
744 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000745 InstrStage<4, [A8_LSPipe]>],
746 [2, 1, 1, 1, 1, 1, 2, 2]>,
747 //
748 // VST4ln
Evan Cheng41957f62010-11-03 00:40:22 +0000749 InstrItinData<IIC_VST4ln, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
750 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000751 InstrStage<4, [A8_LSPipe]>],
752 [1, 1, 1, 1, 2, 2]>,
753 //
754 // VST4lnu
Evan Cheng41957f62010-11-03 00:40:22 +0000755 InstrItinData<IIC_VST4lnu, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
756 InstrStage<4, [A8_NLSPipe], 0>,
Evan Cheng60ff8792010-10-11 22:03:18 +0000757 InstrStage<4, [A8_LSPipe]>],
758 [2, 1, 1, 1, 1, 1, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000759 //
760 // Double-register FP Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000761 InstrItinData<IIC_VUNAD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000762 InstrStage<1, [A8_NPipe]>], [5, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000763 //
764 // Quad-register FP Unary
765 // Result written in N5, but that is relative to the last cycle of multicycle,
766 // so we use 6 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000767 InstrItinData<IIC_VUNAQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000768 InstrStage<2, [A8_NPipe]>], [6, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000769 //
770 // Double-register FP Binary
Evan Cheng41957f62010-11-03 00:40:22 +0000771 InstrItinData<IIC_VBIND, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000772 InstrStage<1, [A8_NPipe]>], [5, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000773 //
Evan Cheng08cec1e2010-10-11 23:41:41 +0000774 // VPADD, etc.
Evan Cheng41957f62010-11-03 00:40:22 +0000775 InstrItinData<IIC_VPBIND, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Cheng08cec1e2010-10-11 23:41:41 +0000776 InstrStage<1, [A8_NPipe]>], [5, 2, 2]>,
777 //
778 // Double-register FP VMUL
Evan Cheng41957f62010-11-03 00:40:22 +0000779 InstrItinData<IIC_VFMULD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Cheng08cec1e2010-10-11 23:41:41 +0000780 InstrStage<1, [A8_NPipe]>], [5, 2, 1]>,
781
782 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000783 // Quad-register FP Binary
784 // Result written in N5, but that is relative to the last cycle of multicycle,
785 // so we use 6 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000786 InstrItinData<IIC_VBINQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000787 InstrStage<2, [A8_NPipe]>], [6, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000788 //
Evan Cheng08cec1e2010-10-11 23:41:41 +0000789 // Quad-register FP VMUL
Evan Cheng41957f62010-11-03 00:40:22 +0000790 InstrItinData<IIC_VFMULQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Cheng08cec1e2010-10-11 23:41:41 +0000791 InstrStage<1, [A8_NPipe]>], [6, 2, 1]>,
792 //
Evan Chengcae6a122010-10-01 20:50:58 +0000793 // Move
Evan Cheng41957f62010-11-03 00:40:22 +0000794 InstrItinData<IIC_VMOV, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengcae6a122010-10-01 20:50:58 +0000795 InstrStage<1, [A8_NPipe]>], [1, 1]>,
796 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000797 // Move Immediate
Evan Cheng41957f62010-11-03 00:40:22 +0000798 InstrItinData<IIC_VMOVImm, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000799 InstrStage<1, [A8_NPipe]>], [3]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000800 //
801 // Double-register Permute Move
Evan Cheng41957f62010-11-03 00:40:22 +0000802 InstrItinData<IIC_VMOVD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000803 InstrStage<1, [A8_NLSPipe]>], [2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000804 //
805 // Quad-register Permute Move
806 // Result written in N2, but that is relative to the last cycle of multicycle,
807 // so we use 3 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000808 InstrItinData<IIC_VMOVQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000809 InstrStage<2, [A8_NLSPipe]>], [3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000810 //
811 // Integer to Single-precision Move
Evan Cheng41957f62010-11-03 00:40:22 +0000812 InstrItinData<IIC_VMOVIS , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000813 InstrStage<1, [A8_NLSPipe]>], [2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000814 //
815 // Integer to Double-precision Move
Evan Cheng41957f62010-11-03 00:40:22 +0000816 InstrItinData<IIC_VMOVID , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000817 InstrStage<1, [A8_NLSPipe]>], [2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000818 //
819 // Single-precision to Integer Move
Evan Cheng41957f62010-11-03 00:40:22 +0000820 InstrItinData<IIC_VMOVSI , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000821 InstrStage<1, [A8_NLSPipe]>], [20, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000822 //
823 // Double-precision to Integer Move
Evan Cheng41957f62010-11-03 00:40:22 +0000824 InstrItinData<IIC_VMOVDI , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000825 InstrStage<1, [A8_NLSPipe]>], [20, 20, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000826 //
827 // Integer to Lane Move
Evan Cheng41957f62010-11-03 00:40:22 +0000828 InstrItinData<IIC_VMOVISL , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000829 InstrStage<2, [A8_NLSPipe]>], [3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000830 //
Evan Chengcae6a122010-10-01 20:50:58 +0000831 // Vector narrow move
Evan Cheng41957f62010-11-03 00:40:22 +0000832 InstrItinData<IIC_VMOVN , [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Evan Chengef0ccad2010-10-01 21:48:06 +0000833 InstrStage<1, [A8_NPipe]>], [2, 1]>,
Evan Chengcae6a122010-10-01 20:50:58 +0000834 //
Anton Korobeynikove1676012010-04-07 18:22:11 +0000835 // Double-register Permute
Evan Cheng41957f62010-11-03 00:40:22 +0000836 InstrItinData<IIC_VPERMD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000837 InstrStage<1, [A8_NLSPipe]>], [2, 2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000838 //
839 // Quad-register Permute
840 // Result written in N2, but that is relative to the last cycle of multicycle,
841 // so we use 3 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000842 InstrItinData<IIC_VPERMQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000843 InstrStage<2, [A8_NLSPipe]>], [3, 3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000844 //
845 // Quad-register Permute (3 cycle issue)
846 // Result written in N2, but that is relative to the last cycle of multicycle,
847 // so we use 4 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000848 InstrItinData<IIC_VPERMQ3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000849 InstrStage<1, [A8_NLSPipe]>,
850 InstrStage<1, [A8_NPipe], 0>,
851 InstrStage<2, [A8_NLSPipe]>], [4, 4, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000852 //
853 // Double-register FP Multiple-Accumulate
Evan Cheng41957f62010-11-03 00:40:22 +0000854 InstrItinData<IIC_VMACD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000855 InstrStage<1, [A8_NPipe]>], [9, 3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000856 //
857 // Quad-register FP Multiple-Accumulate
858 // Result written in N9, but that is relative to the last cycle of multicycle,
859 // so we use 10 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000860 InstrItinData<IIC_VMACQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000861 InstrStage<2, [A8_NPipe]>], [10, 3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000862 //
863 // Double-register Reciprical Step
Evan Cheng41957f62010-11-03 00:40:22 +0000864 InstrItinData<IIC_VRECSD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000865 InstrStage<1, [A8_NPipe]>], [9, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000866 //
867 // Quad-register Reciprical Step
Evan Cheng41957f62010-11-03 00:40:22 +0000868 InstrItinData<IIC_VRECSQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000869 InstrStage<2, [A8_NPipe]>], [10, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000870 //
871 // Double-register Integer Count
Evan Cheng41957f62010-11-03 00:40:22 +0000872 InstrItinData<IIC_VCNTiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000873 InstrStage<1, [A8_NPipe]>], [3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000874 //
875 // Quad-register Integer Count
876 // Result written in N3, but that is relative to the last cycle of multicycle,
877 // so we use 4 for those cases
Evan Cheng41957f62010-11-03 00:40:22 +0000878 InstrItinData<IIC_VCNTiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000879 InstrStage<2, [A8_NPipe]>], [4, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000880 //
881 // Double-register Integer Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000882 InstrItinData<IIC_VUNAiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000883 InstrStage<1, [A8_NPipe]>], [4, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000884 //
885 // Quad-register Integer Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000886 InstrItinData<IIC_VUNAiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000887 InstrStage<1, [A8_NPipe]>], [4, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000888 //
889 // Double-register Integer Q-Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000890 InstrItinData<IIC_VQUNAiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000891 InstrStage<1, [A8_NPipe]>], [4, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000892 //
893 // Quad-register Integer CountQ-Unary
Evan Cheng41957f62010-11-03 00:40:22 +0000894 InstrItinData<IIC_VQUNAiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000895 InstrStage<1, [A8_NPipe]>], [4, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000896 //
897 // Double-register Integer Binary
Evan Cheng41957f62010-11-03 00:40:22 +0000898 InstrItinData<IIC_VBINiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000899 InstrStage<1, [A8_NPipe]>], [3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000900 //
901 // Quad-register Integer Binary
Evan Cheng41957f62010-11-03 00:40:22 +0000902 InstrItinData<IIC_VBINiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000903 InstrStage<1, [A8_NPipe]>], [3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000904 //
905 // Double-register Integer Binary (4 cycle)
Evan Cheng41957f62010-11-03 00:40:22 +0000906 InstrItinData<IIC_VBINi4D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000907 InstrStage<1, [A8_NPipe]>], [4, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000908 //
909 // Quad-register Integer Binary (4 cycle)
Evan Cheng41957f62010-11-03 00:40:22 +0000910 InstrItinData<IIC_VBINi4Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000911 InstrStage<1, [A8_NPipe]>], [4, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000912
913 //
914 // Double-register Integer Subtract
Evan Cheng41957f62010-11-03 00:40:22 +0000915 InstrItinData<IIC_VSUBiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000916 InstrStage<1, [A8_NPipe]>], [3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000917 //
918 // Quad-register Integer Subtract
Evan Cheng41957f62010-11-03 00:40:22 +0000919 InstrItinData<IIC_VSUBiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000920 InstrStage<1, [A8_NPipe]>], [3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000921 //
922 // Double-register Integer Subtract
Evan Cheng41957f62010-11-03 00:40:22 +0000923 InstrItinData<IIC_VSUBi4D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000924 InstrStage<1, [A8_NPipe]>], [4, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000925 //
926 // Quad-register Integer Subtract
Evan Cheng41957f62010-11-03 00:40:22 +0000927 InstrItinData<IIC_VSUBi4Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000928 InstrStage<1, [A8_NPipe]>], [4, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000929 //
930 // Double-register Integer Shift
Evan Cheng41957f62010-11-03 00:40:22 +0000931 InstrItinData<IIC_VSHLiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000932 InstrStage<1, [A8_NPipe]>], [3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000933 //
934 // Quad-register Integer Shift
Evan Cheng41957f62010-11-03 00:40:22 +0000935 InstrItinData<IIC_VSHLiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000936 InstrStage<2, [A8_NPipe]>], [4, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000937 //
938 // Double-register Integer Shift (4 cycle)
Evan Cheng41957f62010-11-03 00:40:22 +0000939 InstrItinData<IIC_VSHLi4D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000940 InstrStage<1, [A8_NPipe]>], [4, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000941 //
942 // Quad-register Integer Shift (4 cycle)
Evan Cheng41957f62010-11-03 00:40:22 +0000943 InstrItinData<IIC_VSHLi4Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000944 InstrStage<2, [A8_NPipe]>], [5, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000945 //
946 // Double-register Integer Pair Add Long
Evan Cheng41957f62010-11-03 00:40:22 +0000947 InstrItinData<IIC_VPALiD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000948 InstrStage<1, [A8_NPipe]>], [6, 3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000949 //
950 // Quad-register Integer Pair Add Long
Evan Cheng41957f62010-11-03 00:40:22 +0000951 InstrItinData<IIC_VPALiQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000952 InstrStage<2, [A8_NPipe]>], [7, 3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000953 //
954 // Double-register Absolute Difference and Accumulate
Evan Cheng41957f62010-11-03 00:40:22 +0000955 InstrItinData<IIC_VABAD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000956 InstrStage<1, [A8_NPipe]>], [6, 3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000957 //
958 // Quad-register Absolute Difference and Accumulate
Evan Cheng41957f62010-11-03 00:40:22 +0000959 InstrItinData<IIC_VABAQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000960 InstrStage<2, [A8_NPipe]>], [6, 3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000961
962 //
963 // Double-register Integer Multiply (.8, .16)
Evan Cheng41957f62010-11-03 00:40:22 +0000964 InstrItinData<IIC_VMULi16D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000965 InstrStage<1, [A8_NPipe]>], [6, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000966 //
967 // Double-register Integer Multiply (.32)
Evan Cheng41957f62010-11-03 00:40:22 +0000968 InstrItinData<IIC_VMULi32D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000969 InstrStage<2, [A8_NPipe]>], [7, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000970 //
971 // Quad-register Integer Multiply (.8, .16)
Evan Cheng41957f62010-11-03 00:40:22 +0000972 InstrItinData<IIC_VMULi16Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000973 InstrStage<2, [A8_NPipe]>], [7, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000974 //
975 // Quad-register Integer Multiply (.32)
Evan Cheng41957f62010-11-03 00:40:22 +0000976 InstrItinData<IIC_VMULi32Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000977 InstrStage<1, [A8_NPipe]>,
978 InstrStage<2, [A8_NLSPipe], 0>,
979 InstrStage<3, [A8_NPipe]>], [9, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000980 //
981 // Double-register Integer Multiply-Accumulate (.8, .16)
Evan Cheng41957f62010-11-03 00:40:22 +0000982 InstrItinData<IIC_VMACi16D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000983 InstrStage<1, [A8_NPipe]>], [6, 3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000984 //
985 // Double-register Integer Multiply-Accumulate (.32)
Evan Cheng41957f62010-11-03 00:40:22 +0000986 InstrItinData<IIC_VMACi32D, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000987 InstrStage<2, [A8_NPipe]>], [7, 3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000988 //
989 // Quad-register Integer Multiply-Accumulate (.8, .16)
Evan Cheng41957f62010-11-03 00:40:22 +0000990 InstrItinData<IIC_VMACi16Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000991 InstrStage<2, [A8_NPipe]>], [7, 3, 2, 2]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000992 //
993 // Quad-register Integer Multiply-Accumulate (.32)
Evan Cheng41957f62010-11-03 00:40:22 +0000994 InstrItinData<IIC_VMACi32Q, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +0000995 InstrStage<1, [A8_NPipe]>,
996 InstrStage<2, [A8_NLSPipe], 0>,
997 InstrStage<3, [A8_NPipe]>], [9, 3, 2, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +0000998 //
999 // Double-register VEXT
Evan Cheng41957f62010-11-03 00:40:22 +00001000 InstrItinData<IIC_VEXTD, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001001 InstrStage<1, [A8_NLSPipe]>], [2, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +00001002 //
1003 // Quad-register VEXT
Evan Cheng41957f62010-11-03 00:40:22 +00001004 InstrItinData<IIC_VEXTQ, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001005 InstrStage<2, [A8_NLSPipe]>], [3, 1, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +00001006 //
1007 // VTB
Evan Cheng41957f62010-11-03 00:40:22 +00001008 InstrItinData<IIC_VTB1, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001009 InstrStage<2, [A8_NLSPipe]>], [3, 2, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +00001010 InstrItinData<IIC_VTB2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001011 InstrStage<2, [A8_NLSPipe]>], [3, 2, 2, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +00001012 InstrItinData<IIC_VTB3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001013 InstrStage<1, [A8_NLSPipe]>,
1014 InstrStage<1, [A8_NPipe], 0>,
1015 InstrStage<2, [A8_NLSPipe]>], [4, 2, 2, 3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +00001016 InstrItinData<IIC_VTB4, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001017 InstrStage<1, [A8_NLSPipe]>,
1018 InstrStage<1, [A8_NPipe], 0>,
Jim Grosbache9e3f202010-06-28 04:27:01 +00001019 InstrStage<2, [A8_NLSPipe]>],[4, 2, 2, 3, 3, 1]>,
Anton Korobeynikove1676012010-04-07 18:22:11 +00001020 //
1021 // VTBX
Evan Cheng41957f62010-11-03 00:40:22 +00001022 InstrItinData<IIC_VTBX1, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001023 InstrStage<2, [A8_NLSPipe]>], [3, 1, 2, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +00001024 InstrItinData<IIC_VTBX2, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001025 InstrStage<2, [A8_NLSPipe]>], [3, 1, 2, 2, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +00001026 InstrItinData<IIC_VTBX3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001027 InstrStage<1, [A8_NLSPipe]>,
1028 InstrStage<1, [A8_NPipe], 0>,
Jim Grosbache9e3f202010-06-28 04:27:01 +00001029 InstrStage<2, [A8_NLSPipe]>],[4, 1, 2, 2, 3, 1]>,
Evan Cheng41957f62010-11-03 00:40:22 +00001030 InstrItinData<IIC_VTBX4, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>,
Anton Korobeynikov928eb492010-04-18 20:31:01 +00001031 InstrStage<1, [A8_NLSPipe]>,
1032 InstrStage<1, [A8_NPipe], 0>,
Jim Grosbache9e3f202010-06-28 04:27:01 +00001033 InstrStage<2, [A8_NLSPipe]>], [4, 1, 2, 2, 3, 3, 1]>
Anton Korobeynikove1676012010-04-07 18:22:11 +00001034]>;