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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 34c4485b7479a12b5ef1cb15d27e96277e8a499a / . / test / CodeGen / MBlaze / shift.ll
blob: 99f0519c020c04ffa5785a9eb0173649e907daeb [file] [log] [blame]
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]1; Ensure that shifts are lowered to loops when the barrel shifter unit is
2; not available in the hardware and that loops are not used when the
3; barrel shifter unit is available in the hardware.
4;
5; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
6; RUN: llc < %s -march=mblaze -mattr=+barrel | FileCheck -check-prefix=SHT %s
7
8define i8 @test_i8(i8 %a, i8 %b) {
9 ; FUN: test_i8:
10 ; SHT: test_i8:
11
12 %tmp.1 = shl i8 %a, %b
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]13 ; FUN: andi
14 ; FUN: add
15 ; FUN: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]16 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]17
18 ret i8 %tmp.1
19 ; FUN: rtsd
20 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame]21 ; FUN-NOT: bsll
22 ; SHT-NEXT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]23}
24
25define i8 @testc_i8(i8 %a, i8 %b) {
26 ; FUN: testc_i8:
27 ; SHT: testc_i8:
28
29 %tmp.1 = shl i8 %a, 5
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]30 ; FUN: andi
31 ; FUN: add
32 ; FUN: bnei
33 ; SHT-NOT: andi
34 ; SHT-NOT: add
35 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]36
37 ret i8 %tmp.1
38 ; FUN: rtsd
39 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame]40 ; FUN-NOT: bsll
41 ; SHT-NEXT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]42}
43
44define i16 @test_i16(i16 %a, i16 %b) {
45 ; FUN: test_i16:
46 ; SHT: test_i16:
47
48 %tmp.1 = shl i16 %a, %b
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]49 ; FUN: andi
50 ; FUN: add
51 ; FUN: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]52 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]53
54 ret i16 %tmp.1
55 ; FUN: rtsd
56 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame]57 ; FUN-NOT: bsll
58 ; SHT-NEXT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]59}
60
61define i16 @testc_i16(i16 %a, i16 %b) {
62 ; FUN: testc_i16:
63 ; SHT: testc_i16:
64
65 %tmp.1 = shl i16 %a, 5
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]66 ; FUN: andi
67 ; FUN: add
68 ; FUN: bnei
69 ; SHT-NOT: andi
70 ; SHT-NOT: add
71 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]72
73 ret i16 %tmp.1
74 ; FUN: rtsd
75 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame]76 ; FUN-NOT: bsll
77 ; SHT-NEXT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]78}
79
80define i32 @test_i32(i32 %a, i32 %b) {
81 ; FUN: test_i32:
82 ; SHT: test_i32:
83
84 %tmp.1 = shl i32 %a, %b
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]85 ; FUN: andi
86 ; FUN: add
87 ; FUN: bnei
88 ; SHT-NOT: andi
89 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]90
91 ret i32 %tmp.1
92 ; FUN: rtsd
93 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame]94 ; FUN-NOT: bsll
95 ; SHT-NEXT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]96}
97
98define i32 @testc_i32(i32 %a, i32 %b) {
99 ; FUN: testc_i32:
100 ; SHT: testc_i32:
101
102 %tmp.1 = shl i32 %a, 5
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]103 ; FUN: andi
104 ; FUN: add
105 ; FUN: bnei
106 ; SHT-NOT: andi
107 ; SHT-NOT: add
108 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]109
110 ret i32 %tmp.1
111 ; FUN: rtsd
112 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame]113 ; FUN-NOT: bsll
114 ; SHT-NEXT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]115}