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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 4e9141fd4c0040cd7d4d830211f7d27fd98e9338 / . / test / CodeGen / MBlaze / shift.ll
blob: 7eac6411dec0bf83e46cbdfc521a1a4359a79496 [file] [log] [blame]
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]1; Ensure that shifts are lowered to loops when the barrel shifter unit is
2; not available in the hardware and that loops are not used when the
3; barrel shifter unit is available in the hardware.
4;
5; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
6; RUN: llc < %s -march=mblaze -mattr=+barrel | FileCheck -check-prefix=SHT %s
7
8define i8 @test_i8(i8 %a, i8 %b) {
9 ; FUN: test_i8:
10 ; SHT: test_i8:
11
12 %tmp.1 = shl i8 %a, %b
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]13 ; FUN: andi
14 ; FUN: add
15 ; FUN: bnei
16 ; SHT-NOT: andi
17 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]18
19 ret i8 %tmp.1
20 ; FUN: rtsd
21 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame^]22 ; FUN-NOT: bsll
23 ; SHT-NEXT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]24}
25
26define i8 @testc_i8(i8 %a, i8 %b) {
27 ; FUN: testc_i8:
28 ; SHT: testc_i8:
29
30 %tmp.1 = shl i8 %a, 5
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]31 ; FUN: andi
32 ; FUN: add
33 ; FUN: bnei
34 ; SHT-NOT: andi
35 ; SHT-NOT: add
36 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]37
38 ret i8 %tmp.1
39 ; FUN: rtsd
40 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame^]41 ; FUN-NOT: bsll
42 ; SHT-NEXT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]43}
44
45define i16 @test_i16(i16 %a, i16 %b) {
46 ; FUN: test_i16:
47 ; SHT: test_i16:
48
49 %tmp.1 = shl i16 %a, %b
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]50 ; FUN: andi
51 ; FUN: add
52 ; FUN: bnei
53 ; SHT-NOT: andi
54 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]55
56 ret i16 %tmp.1
57 ; FUN: rtsd
58 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame^]59 ; FUN-NOT: bsll
60 ; SHT-NEXT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]61}
62
63define i16 @testc_i16(i16 %a, i16 %b) {
64 ; FUN: testc_i16:
65 ; SHT: testc_i16:
66
67 %tmp.1 = shl i16 %a, 5
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]68 ; FUN: andi
69 ; FUN: add
70 ; FUN: bnei
71 ; SHT-NOT: andi
72 ; SHT-NOT: add
73 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]74
75 ret i16 %tmp.1
76 ; FUN: rtsd
77 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame^]78 ; FUN-NOT: bsll
79 ; SHT-NEXT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]80}
81
82define i32 @test_i32(i32 %a, i32 %b) {
83 ; FUN: test_i32:
84 ; SHT: test_i32:
85
86 %tmp.1 = shl i32 %a, %b
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]87 ; FUN: andi
88 ; FUN: add
89 ; FUN: bnei
90 ; SHT-NOT: andi
91 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]92
93 ret i32 %tmp.1
94 ; FUN: rtsd
95 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame^]96 ; FUN-NOT: bsll
97 ; SHT-NEXT: bsll
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]98}
99
100define i32 @testc_i32(i32 %a, i32 %b) {
101 ; FUN: testc_i32:
102 ; SHT: testc_i32:
103
104 %tmp.1 = shl i32 %a, 5
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]105 ; FUN: andi
106 ; FUN: add
107 ; FUN: bnei
108 ; SHT-NOT: andi
109 ; SHT-NOT: add
110 ; SHT-NOT: bnei
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]111
112 ret i32 %tmp.1
113 ; FUN: rtsd
114 ; SHT: rtsd
Wesley Peck4e9141f2010-10-21 03:57:26 +0000[diff] [blame^]115 ; FUN-NOT: bsll
116 ; SHT-NEXT: bslli
Wesley Pecka70f28c2010-02-23 19:15:24 +0000[diff] [blame]117}