Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 1 | //===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===// |
| 2 | // |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains a printer that converts from our internal representation |
| 11 | // of machine-dependent LLVM code to GAS-format ARM assembly language. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
Chris Lattner | 95b2c7d | 2006-12-19 22:59:26 +0000 | [diff] [blame] | 15 | #define DEBUG_TYPE "asm-printer" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 16 | #include "ARM.h" |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 17 | #include "ARMBuildAttrs.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 18 | #include "ARMAddressingModes.h" |
| 19 | #include "ARMConstantPoolValue.h" |
Jim Grosbach | 7ac1609 | 2010-10-01 22:39:28 +0000 | [diff] [blame] | 20 | #include "InstPrinter/ARMInstPrinter.h" |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 21 | #include "ARMMachineFunctionInfo.h" |
| 22 | #include "ARMMCInstLower.h" |
| 23 | #include "ARMTargetMachine.h" |
Dale Johannesen | 3f282aa | 2010-04-26 20:07:31 +0000 | [diff] [blame] | 24 | #include "llvm/Analysis/DebugInfo.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 25 | #include "llvm/Constants.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 26 | #include "llvm/Module.h" |
Benjamin Kramer | e55b15f | 2009-12-28 12:27:56 +0000 | [diff] [blame] | 27 | #include "llvm/Type.h" |
Dan Gohman | cf20ac4 | 2009-08-13 01:36:44 +0000 | [diff] [blame] | 28 | #include "llvm/Assembly/Writer.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/AsmPrinter.h" |
Chris Lattner | b0f294c | 2009-10-19 18:38:33 +0000 | [diff] [blame] | 30 | #include "llvm/CodeGen/MachineModuleInfoImpls.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 31 | #include "llvm/CodeGen/MachineFunctionPass.h" |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 32 | #include "llvm/CodeGen/MachineJumpTableInfo.h" |
Anton Korobeynikov | 362dd0b | 2010-02-15 22:37:53 +0000 | [diff] [blame] | 33 | #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" |
Chris Lattner | b0f294c | 2009-10-19 18:38:33 +0000 | [diff] [blame] | 34 | #include "llvm/MC/MCAsmInfo.h" |
| 35 | #include "llvm/MC/MCContext.h" |
Bill Wendling | becd83e | 2010-03-09 00:40:17 +0000 | [diff] [blame] | 36 | #include "llvm/MC/MCExpr.h" |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 37 | #include "llvm/MC/MCInst.h" |
Chris Lattner | f9bdedd | 2009-08-10 18:15:01 +0000 | [diff] [blame] | 38 | #include "llvm/MC/MCSectionMachO.h" |
Chris Lattner | 6c2f9e1 | 2009-08-19 05:49:37 +0000 | [diff] [blame] | 39 | #include "llvm/MC/MCStreamer.h" |
Chris Lattner | 325d3dc | 2009-09-13 17:14:04 +0000 | [diff] [blame] | 40 | #include "llvm/MC/MCSymbol.h" |
Chris Lattner | d62f1b4 | 2010-03-12 21:19:23 +0000 | [diff] [blame] | 41 | #include "llvm/Target/Mangler.h" |
Rafael Espindola | b01c4bb | 2006-07-27 11:38:51 +0000 | [diff] [blame] | 42 | #include "llvm/Target/TargetData.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 43 | #include "llvm/Target/TargetMachine.h" |
Evan Cheng | 5be54b0 | 2007-01-19 19:25:36 +0000 | [diff] [blame] | 44 | #include "llvm/Target/TargetOptions.h" |
Daniel Dunbar | 51b198a | 2009-07-15 20:24:03 +0000 | [diff] [blame] | 45 | #include "llvm/Target/TargetRegistry.h" |
Evan Cheng | c324ecb | 2009-07-24 18:19:46 +0000 | [diff] [blame] | 46 | #include "llvm/ADT/SmallPtrSet.h" |
Jim Grosbach | c40d9f9 | 2009-09-01 18:49:12 +0000 | [diff] [blame] | 47 | #include "llvm/ADT/SmallString.h" |
Bob Wilson | 54c78ef | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 48 | #include "llvm/ADT/StringExtras.h" |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 49 | #include "llvm/Support/CommandLine.h" |
Devang Patel | 59135f4 | 2010-08-04 22:39:39 +0000 | [diff] [blame] | 50 | #include "llvm/Support/Debug.h" |
Torok Edwin | 3046470 | 2009-07-08 20:55:50 +0000 | [diff] [blame] | 51 | #include "llvm/Support/ErrorHandling.h" |
Chris Lattner | b23569a | 2010-04-04 08:18:47 +0000 | [diff] [blame] | 52 | #include "llvm/Support/raw_ostream.h" |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 53 | #include <cctype> |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 54 | using namespace llvm; |
| 55 | |
Jim Grosbach | 9172900 | 2010-07-21 23:03:52 +0000 | [diff] [blame] | 56 | namespace llvm { |
| 57 | namespace ARM { |
| 58 | enum DW_ISA { |
| 59 | DW_ISA_ARM_thumb = 1, |
| 60 | DW_ISA_ARM_arm = 2 |
| 61 | }; |
| 62 | } |
| 63 | } |
| 64 | |
Chris Lattner | 95b2c7d | 2006-12-19 22:59:26 +0000 | [diff] [blame] | 65 | namespace { |
Chris Lattner | 4a071d6 | 2009-10-19 17:59:19 +0000 | [diff] [blame] | 66 | class ARMAsmPrinter : public AsmPrinter { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 67 | |
| 68 | /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can |
| 69 | /// make the right decision when printing asm code for different targets. |
| 70 | const ARMSubtarget *Subtarget; |
| 71 | |
| 72 | /// AFI - Keep a pointer to ARMFunctionInfo for the current |
Evan Cheng | 6d63a72 | 2008-09-18 07:27:23 +0000 | [diff] [blame] | 73 | /// MachineFunction. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 74 | ARMFunctionInfo *AFI; |
| 75 | |
Evan Cheng | 6d63a72 | 2008-09-18 07:27:23 +0000 | [diff] [blame] | 76 | /// MCP - Keep a pointer to constantpool entries of the current |
| 77 | /// MachineFunction. |
| 78 | const MachineConstantPool *MCP; |
| 79 | |
Bill Wendling | 57f0db8 | 2009-02-24 08:30:20 +0000 | [diff] [blame] | 80 | public: |
Chris Lattner | b23569a | 2010-04-04 08:18:47 +0000 | [diff] [blame] | 81 | explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) |
| 82 | : AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL) { |
Bill Wendling | 57f0db8 | 2009-02-24 08:30:20 +0000 | [diff] [blame] | 83 | Subtarget = &TM.getSubtarget<ARMSubtarget>(); |
| 84 | } |
| 85 | |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 86 | virtual const char *getPassName() const { |
| 87 | return "ARM Assembly Printer"; |
| 88 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 89 | |
Chris Lattner | 35c33bd | 2010-04-04 04:47:45 +0000 | [diff] [blame] | 90 | void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 91 | const char *Modifier = 0); |
Bob Wilson | 54c78ef | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 92 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 93 | virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, |
Chris Lattner | c75c028 | 2010-04-04 05:29:35 +0000 | [diff] [blame] | 94 | unsigned AsmVariant, const char *ExtraCode, |
| 95 | raw_ostream &O); |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 96 | virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, |
Bob Wilson | 224c244 | 2009-05-19 05:53:42 +0000 | [diff] [blame] | 97 | unsigned AsmVariant, |
Chris Lattner | c75c028 | 2010-04-04 05:29:35 +0000 | [diff] [blame] | 98 | const char *ExtraCode, raw_ostream &O); |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 99 | |
Jim Grosbach | 2317e40 | 2010-09-30 01:57:53 +0000 | [diff] [blame] | 100 | void EmitJumpTable(const MachineInstr *MI); |
| 101 | void EmitJump2Table(const MachineInstr *MI); |
Chris Lattner | a786cea | 2010-01-28 01:10:34 +0000 | [diff] [blame] | 102 | virtual void EmitInstruction(const MachineInstr *MI); |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 103 | bool runOnMachineFunction(MachineFunction &F); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 104 | |
Chris Lattner | a240619 | 2010-01-28 00:19:24 +0000 | [diff] [blame] | 105 | virtual void EmitConstantPool() {} // we emit constant pools customly! |
Chris Lattner | 953ebb7 | 2010-01-27 23:58:11 +0000 | [diff] [blame] | 106 | virtual void EmitFunctionEntryLabel(); |
Bob Wilson | 812209a | 2009-09-30 22:06:26 +0000 | [diff] [blame] | 107 | void EmitStartOfAsmFile(Module &M); |
Chris Lattner | 4a071d6 | 2009-10-19 17:59:19 +0000 | [diff] [blame] | 108 | void EmitEndOfAsmFile(Module &M); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 109 | |
Jim Grosbach | 2d0f53b | 2010-09-28 17:05:56 +0000 | [diff] [blame] | 110 | void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS); |
| 111 | |
Devang Patel | 59135f4 | 2010-08-04 22:39:39 +0000 | [diff] [blame] | 112 | MachineLocation getDebugValueLocation(const MachineInstr *MI) const { |
| 113 | MachineLocation Location; |
| 114 | assert (MI->getNumOperands() == 4 && "Invalid no. of machine operands!"); |
| 115 | // Frame address. Currently handles register +- offset only. |
| 116 | if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm()) |
| 117 | Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm()); |
| 118 | else { |
| 119 | DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n"); |
| 120 | } |
| 121 | return Location; |
| 122 | } |
| 123 | |
Jim Grosbach | 9172900 | 2010-07-21 23:03:52 +0000 | [diff] [blame] | 124 | virtual unsigned getISAEncoding() { |
| 125 | // ARM/Darwin adds ISA to the DWARF info for each function. |
| 126 | if (!Subtarget->isTargetDarwin()) |
| 127 | return 0; |
| 128 | return Subtarget->isThumb() ? |
| 129 | llvm::ARM::DW_ISA_ARM_thumb : llvm::ARM::DW_ISA_ARM_arm; |
| 130 | } |
| 131 | |
Chris Lattner | 0890cf1 | 2010-01-25 19:51:38 +0000 | [diff] [blame] | 132 | MCSymbol *GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2, |
| 133 | const MachineBasicBlock *MBB) const; |
| 134 | MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const; |
Chris Lattner | bfcb096 | 2010-01-25 19:39:52 +0000 | [diff] [blame] | 135 | |
Jim Grosbach | 433a578 | 2010-09-24 20:47:58 +0000 | [diff] [blame] | 136 | MCSymbol *GetARMSJLJEHLabel(void) const; |
| 137 | |
Evan Cheng | 711b6dc | 2008-08-08 06:56:16 +0000 | [diff] [blame] | 138 | /// EmitMachineConstantPoolValue - Print a machine constantpool value to |
| 139 | /// the .s file. |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 140 | virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 141 | SmallString<128> Str; |
| 142 | raw_svector_ostream OS(Str); |
| 143 | EmitMachineConstantPoolValue(MCPV, OS); |
| 144 | OutStreamer.EmitRawText(OS.str()); |
| 145 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 146 | |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 147 | void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV, |
| 148 | raw_ostream &O) { |
Chris Lattner | ea3cb40 | 2010-01-20 07:33:29 +0000 | [diff] [blame] | 149 | switch (TM.getTargetData()->getTypeAllocSize(MCPV->getType())) { |
| 150 | case 1: O << MAI->getData8bitsDirective(0); break; |
| 151 | case 2: O << MAI->getData16bitsDirective(0); break; |
| 152 | case 4: O << MAI->getData32bitsDirective(0); break; |
| 153 | default: assert(0 && "Unknown CPV size"); |
| 154 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 155 | |
Evan Cheng | 711b6dc | 2008-08-08 06:56:16 +0000 | [diff] [blame] | 156 | ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV); |
Jim Grosbach | 3fb2b1e | 2009-09-01 01:57:56 +0000 | [diff] [blame] | 157 | |
| 158 | if (ACPV->isLSDA()) { |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 159 | O << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber(); |
Bob Wilson | 28989a8 | 2009-11-02 16:59:06 +0000 | [diff] [blame] | 160 | } else if (ACPV->isBlockAddress()) { |
Chris Lattner | 0752cda | 2010-04-05 16:32:14 +0000 | [diff] [blame] | 161 | O << *GetBlockAddressSymbol(ACPV->getBlockAddress()); |
Bob Wilson | 28989a8 | 2009-11-02 16:59:06 +0000 | [diff] [blame] | 162 | } else if (ACPV->isGlobalValue()) { |
Dan Gohman | 46510a7 | 2010-04-15 01:51:59 +0000 | [diff] [blame] | 163 | const GlobalValue *GV = ACPV->getGV(); |
Evan Cheng | e4e4ed3 | 2009-08-28 23:18:09 +0000 | [diff] [blame] | 164 | bool isIndirect = Subtarget->isTargetDarwin() && |
Evan Cheng | 63476a8 | 2009-09-03 07:04:02 +0000 | [diff] [blame] | 165 | Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel()); |
Evan Cheng | e4e4ed3 | 2009-08-28 23:18:09 +0000 | [diff] [blame] | 166 | if (!isIndirect) |
Chris Lattner | d62f1b4 | 2010-03-12 21:19:23 +0000 | [diff] [blame] | 167 | O << *Mang->getSymbol(GV); |
Evan Cheng | e4e4ed3 | 2009-08-28 23:18:09 +0000 | [diff] [blame] | 168 | else { |
| 169 | // FIXME: Remove this when Darwin transition to @GOT like syntax. |
Chris Lattner | 7a2ba94 | 2010-01-16 18:37:32 +0000 | [diff] [blame] | 170 | MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); |
Chris Lattner | 10b318b | 2010-01-17 21:43:43 +0000 | [diff] [blame] | 171 | O << *Sym; |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 172 | |
Chris Lattner | b8f64a7 | 2009-10-19 18:49:14 +0000 | [diff] [blame] | 173 | MachineModuleInfoMachO &MMIMachO = |
| 174 | MMI->getObjFileInfo<MachineModuleInfoMachO>(); |
Bill Wendling | cebae36 | 2010-03-10 22:34:10 +0000 | [diff] [blame] | 175 | MachineModuleInfoImpl::StubValueTy &StubSym = |
Chris Lattner | b8f64a7 | 2009-10-19 18:49:14 +0000 | [diff] [blame] | 176 | GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(Sym) : |
| 177 | MMIMachO.getGVStubEntry(Sym); |
Bill Wendling | cebae36 | 2010-03-10 22:34:10 +0000 | [diff] [blame] | 178 | if (StubSym.getPointer() == 0) |
| 179 | StubSym = MachineModuleInfoImpl:: |
Chris Lattner | d62f1b4 | 2010-03-12 21:19:23 +0000 | [diff] [blame] | 180 | StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); |
Evan Cheng | e4e4ed3 | 2009-08-28 23:18:09 +0000 | [diff] [blame] | 181 | } |
Bob Wilson | 28989a8 | 2009-11-02 16:59:06 +0000 | [diff] [blame] | 182 | } else { |
| 183 | assert(ACPV->isExtSymbol() && "unrecognized constant pool value"); |
Chris Lattner | 10b318b | 2010-01-17 21:43:43 +0000 | [diff] [blame] | 184 | O << *GetExternalSymbolSymbol(ACPV->getSymbol()); |
Bob Wilson | 28989a8 | 2009-11-02 16:59:06 +0000 | [diff] [blame] | 185 | } |
Jim Grosbach | e995221 | 2009-09-04 01:38:51 +0000 | [diff] [blame] | 186 | |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 187 | if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")"; |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 188 | if (ACPV->getPCAdjustment() != 0) { |
Chris Lattner | 33adcfb | 2009-08-22 21:43:10 +0000 | [diff] [blame] | 189 | O << "-(" << MAI->getPrivateGlobalPrefix() << "PC" |
Evan Cheng | e7e0d62 | 2009-11-06 22:24:13 +0000 | [diff] [blame] | 190 | << getFunctionNumber() << "_" << ACPV->getLabelId() |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 191 | << "+" << (unsigned)ACPV->getPCAdjustment(); |
| 192 | if (ACPV->mustAddCurrentAddress()) |
| 193 | O << "-."; |
Chris Lattner | 8b37875 | 2010-01-15 23:26:49 +0000 | [diff] [blame] | 194 | O << ')'; |
Lauro Ramos Venancio | 64f4fa5 | 2007-04-27 13:54:47 +0000 | [diff] [blame] | 195 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 196 | } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 197 | }; |
| 198 | } // end of anonymous namespace |
| 199 | |
Chris Lattner | 953ebb7 | 2010-01-27 23:58:11 +0000 | [diff] [blame] | 200 | void ARMAsmPrinter::EmitFunctionEntryLabel() { |
| 201 | if (AFI->isThumbFunction()) { |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 202 | OutStreamer.EmitRawText(StringRef("\t.code\t16")); |
Chris Lattner | 0752cda | 2010-04-05 16:32:14 +0000 | [diff] [blame] | 203 | if (!Subtarget->isTargetDarwin()) |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 204 | OutStreamer.EmitRawText(StringRef("\t.thumb_func")); |
Chris Lattner | 0752cda | 2010-04-05 16:32:14 +0000 | [diff] [blame] | 205 | else { |
| 206 | // This needs to emit to a temporary string to get properly quoted |
| 207 | // MCSymbols when they have spaces in them. |
| 208 | SmallString<128> Tmp; |
| 209 | raw_svector_ostream OS(Tmp); |
| 210 | OS << "\t.thumb_func\t" << *CurrentFnSym; |
| 211 | OutStreamer.EmitRawText(OS.str()); |
| 212 | } |
Chris Lattner | 953ebb7 | 2010-01-27 23:58:11 +0000 | [diff] [blame] | 213 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 214 | |
Chris Lattner | 953ebb7 | 2010-01-27 23:58:11 +0000 | [diff] [blame] | 215 | OutStreamer.EmitLabel(CurrentFnSym); |
| 216 | } |
| 217 | |
Jim Grosbach | 2317e40 | 2010-09-30 01:57:53 +0000 | [diff] [blame] | 218 | /// runOnMachineFunction - This uses the EmitInstruction() |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 219 | /// method to print assembly for each instruction. |
| 220 | /// |
| 221 | bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 222 | AFI = MF.getInfo<ARMFunctionInfo>(); |
Evan Cheng | 6d63a72 | 2008-09-18 07:27:23 +0000 | [diff] [blame] | 223 | MCP = MF.getConstantPool(); |
Rafael Espindola | 4b442b5 | 2006-05-23 02:48:20 +0000 | [diff] [blame] | 224 | |
Chris Lattner | d49fe1b | 2010-01-28 01:28:58 +0000 | [diff] [blame] | 225 | return AsmPrinter::runOnMachineFunction(MF); |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 226 | } |
| 227 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 228 | void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, |
Chris Lattner | 35c33bd | 2010-04-04 04:47:45 +0000 | [diff] [blame] | 229 | raw_ostream &O, const char *Modifier) { |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 230 | const MachineOperand &MO = MI->getOperand(OpNum); |
Anton Korobeynikov | 5cdc3a9 | 2009-11-24 00:44:37 +0000 | [diff] [blame] | 231 | unsigned TF = MO.getTargetFlags(); |
| 232 | |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 233 | switch (MO.getType()) { |
Chris Lattner | 8bc86cb | 2009-10-19 20:59:55 +0000 | [diff] [blame] | 234 | default: |
| 235 | assert(0 && "<unknown operand type>"); |
Bob Wilson | 5bafff3 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 236 | case MachineOperand::MO_Register: { |
| 237 | unsigned Reg = MO.getReg(); |
Chris Lattner | 8bc86cb | 2009-10-19 20:59:55 +0000 | [diff] [blame] | 238 | assert(TargetRegisterInfo::isPhysicalRegister(Reg)); |
Bob Wilson | de0ae8f | 2010-09-16 04:55:00 +0000 | [diff] [blame] | 239 | if (Modifier && strcmp(Modifier, "lane") == 0) { |
Jim Grosbach | a4c3c8f | 2010-09-15 20:26:25 +0000 | [diff] [blame] | 240 | unsigned RegNum = getARMRegisterNumbering(Reg); |
Chris Lattner | 9d1c1ad | 2010-04-04 18:06:11 +0000 | [diff] [blame] | 241 | unsigned DReg = |
Jakob Stoklund Olesen | e00fa64 | 2010-05-25 00:15:15 +0000 | [diff] [blame] | 242 | TM.getRegisterInfo()->getMatchingSuperReg(Reg, |
| 243 | RegNum & 1 ? ARM::ssub_1 : ARM::ssub_0, &ARM::DPR_VFP2RegClass); |
Jim Grosbach | 2317e40 | 2010-09-30 01:57:53 +0000 | [diff] [blame] | 244 | O << ARMInstPrinter::getRegisterName(DReg) << '[' << (RegNum & 1) << ']'; |
Chris Lattner | 8bc86cb | 2009-10-19 20:59:55 +0000 | [diff] [blame] | 245 | } else { |
Anton Korobeynikov | e8ea011 | 2009-11-07 15:20:32 +0000 | [diff] [blame] | 246 | assert(!MO.getSubReg() && "Subregs should be eliminated!"); |
Jim Grosbach | 2317e40 | 2010-09-30 01:57:53 +0000 | [diff] [blame] | 247 | O << ARMInstPrinter::getRegisterName(Reg); |
Chris Lattner | 8bc86cb | 2009-10-19 20:59:55 +0000 | [diff] [blame] | 248 | } |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 249 | break; |
Bob Wilson | 5bafff3 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 250 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 251 | case MachineOperand::MO_Immediate: { |
Evan Cheng | 5adb66a | 2009-09-28 09:14:39 +0000 | [diff] [blame] | 252 | int64_t Imm = MO.getImm(); |
Anton Korobeynikov | 632606c | 2009-10-08 20:43:22 +0000 | [diff] [blame] | 253 | O << '#'; |
Anton Korobeynikov | 5cdc3a9 | 2009-11-24 00:44:37 +0000 | [diff] [blame] | 254 | if ((Modifier && strcmp(Modifier, "lo16") == 0) || |
Jim Grosbach | 4dea941 | 2010-10-06 16:51:55 +0000 | [diff] [blame^] | 255 | (TF == ARMII::MO_LO16)) |
Anton Korobeynikov | 5cdc3a9 | 2009-11-24 00:44:37 +0000 | [diff] [blame] | 256 | O << ":lower16:"; |
| 257 | else if ((Modifier && strcmp(Modifier, "hi16") == 0) || |
Jim Grosbach | 4dea941 | 2010-10-06 16:51:55 +0000 | [diff] [blame^] | 258 | (TF == ARMII::MO_HI16)) |
Anton Korobeynikov | 5cdc3a9 | 2009-11-24 00:44:37 +0000 | [diff] [blame] | 259 | O << ":upper16:"; |
Anton Korobeynikov | 632606c | 2009-10-08 20:43:22 +0000 | [diff] [blame] | 260 | O << Imm; |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 261 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 262 | } |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 263 | case MachineOperand::MO_MachineBasicBlock: |
Chris Lattner | 1b2eb0e | 2010-03-13 21:04:28 +0000 | [diff] [blame] | 264 | O << *MO.getMBB()->getSymbol(); |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 265 | return; |
Rafael Espindola | 84b19be | 2006-07-16 01:02:57 +0000 | [diff] [blame] | 266 | case MachineOperand::MO_GlobalAddress: { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 267 | bool isCallOp = Modifier && !strcmp(Modifier, "call"); |
Dan Gohman | 46510a7 | 2010-04-15 01:51:59 +0000 | [diff] [blame] | 268 | const GlobalValue *GV = MO.getGlobal(); |
Anton Korobeynikov | 5cdc3a9 | 2009-11-24 00:44:37 +0000 | [diff] [blame] | 269 | |
| 270 | if ((Modifier && strcmp(Modifier, "lo16") == 0) || |
| 271 | (TF & ARMII::MO_LO16)) |
| 272 | O << ":lower16:"; |
| 273 | else if ((Modifier && strcmp(Modifier, "hi16") == 0) || |
| 274 | (TF & ARMII::MO_HI16)) |
| 275 | O << ":upper16:"; |
Chris Lattner | d62f1b4 | 2010-03-12 21:19:23 +0000 | [diff] [blame] | 276 | O << *Mang->getSymbol(GV); |
Anton Korobeynikov | 7751ad9 | 2008-11-22 16:15:34 +0000 | [diff] [blame] | 277 | |
Chris Lattner | 0c08d09 | 2010-04-03 22:28:33 +0000 | [diff] [blame] | 278 | printOffset(MO.getOffset(), O); |
Anton Korobeynikov | 7751ad9 | 2008-11-22 16:15:34 +0000 | [diff] [blame] | 279 | |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 280 | if (isCallOp && Subtarget->isTargetELF() && |
| 281 | TM.getRelocationModel() == Reloc::PIC_) |
| 282 | O << "(PLT)"; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 283 | break; |
Rafael Espindola | 84b19be | 2006-07-16 01:02:57 +0000 | [diff] [blame] | 284 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 285 | case MachineOperand::MO_ExternalSymbol: { |
| 286 | bool isCallOp = Modifier && !strcmp(Modifier, "call"); |
Chris Lattner | 10b318b | 2010-01-17 21:43:43 +0000 | [diff] [blame] | 287 | O << *GetExternalSymbolSymbol(MO.getSymbolName()); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 288 | |
Lauro Ramos Venancio | 0ae4a33 | 2007-04-22 00:04:12 +0000 | [diff] [blame] | 289 | if (isCallOp && Subtarget->isTargetELF() && |
| 290 | TM.getRelocationModel() == Reloc::PIC_) |
| 291 | O << "(PLT)"; |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 292 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 293 | } |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 294 | case MachineOperand::MO_ConstantPoolIndex: |
Chris Lattner | 1b46f43 | 2010-01-23 07:00:21 +0000 | [diff] [blame] | 295 | O << *GetCPISymbol(MO.getIndex()); |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 296 | break; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 297 | case MachineOperand::MO_JumpTableIndex: |
Chris Lattner | 1b46f43 | 2010-01-23 07:00:21 +0000 | [diff] [blame] | 298 | O << *GetJTISymbol(MO.getIndex()); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 299 | break; |
Rafael Espindola | 2f99b6b | 2006-05-25 12:57:06 +0000 | [diff] [blame] | 300 | } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 301 | } |
| 302 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 303 | //===--------------------------------------------------------------------===// |
| 304 | |
Chris Lattner | 0890cf1 | 2010-01-25 19:51:38 +0000 | [diff] [blame] | 305 | MCSymbol *ARMAsmPrinter:: |
| 306 | GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2, |
| 307 | const MachineBasicBlock *MBB) const { |
| 308 | SmallString<60> Name; |
| 309 | raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() |
Chris Lattner | bfcb096 | 2010-01-25 19:39:52 +0000 | [diff] [blame] | 310 | << getFunctionNumber() << '_' << uid << '_' << uid2 |
Chris Lattner | 0890cf1 | 2010-01-25 19:51:38 +0000 | [diff] [blame] | 311 | << "_set_" << MBB->getNumber(); |
Chris Lattner | 9b97a73 | 2010-03-30 18:10:53 +0000 | [diff] [blame] | 312 | return OutContext.GetOrCreateSymbol(Name.str()); |
Chris Lattner | 0890cf1 | 2010-01-25 19:51:38 +0000 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | MCSymbol *ARMAsmPrinter:: |
| 316 | GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const { |
| 317 | SmallString<60> Name; |
| 318 | raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI" |
Chris Lattner | 281e776 | 2010-01-25 23:28:03 +0000 | [diff] [blame] | 319 | << getFunctionNumber() << '_' << uid << '_' << uid2; |
Chris Lattner | 9b97a73 | 2010-03-30 18:10:53 +0000 | [diff] [blame] | 320 | return OutContext.GetOrCreateSymbol(Name.str()); |
Chris Lattner | bfcb096 | 2010-01-25 19:39:52 +0000 | [diff] [blame] | 321 | } |
| 322 | |
Jim Grosbach | 433a578 | 2010-09-24 20:47:58 +0000 | [diff] [blame] | 323 | |
| 324 | MCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel(void) const { |
| 325 | SmallString<60> Name; |
| 326 | raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "SJLJEH" |
| 327 | << getFunctionNumber(); |
| 328 | return OutContext.GetOrCreateSymbol(Name.str()); |
| 329 | } |
| 330 | |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 331 | bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, |
Chris Lattner | c75c028 | 2010-04-04 05:29:35 +0000 | [diff] [blame] | 332 | unsigned AsmVariant, const char *ExtraCode, |
| 333 | raw_ostream &O) { |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 334 | // Does this asm operand have a single letter operand modifier? |
| 335 | if (ExtraCode && ExtraCode[0]) { |
| 336 | if (ExtraCode[1] != 0) return true; // Unknown modifier. |
Anton Korobeynikov | 8e9ece7 | 2009-08-08 23:10:41 +0000 | [diff] [blame] | 337 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 338 | switch (ExtraCode[0]) { |
| 339 | default: return true; // Unknown modifier. |
Bob Wilson | 9b4b00a | 2009-07-09 23:54:51 +0000 | [diff] [blame] | 340 | case 'a': // Print as a memory address. |
| 341 | if (MI->getOperand(OpNum).isReg()) { |
Jim Grosbach | 2f24c4e | 2010-09-30 15:25:22 +0000 | [diff] [blame] | 342 | O << "[" |
| 343 | << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) |
| 344 | << "]"; |
Bob Wilson | 9b4b00a | 2009-07-09 23:54:51 +0000 | [diff] [blame] | 345 | return false; |
| 346 | } |
| 347 | // Fallthrough |
| 348 | case 'c': // Don't print "#" before an immediate operand. |
Bob Wilson | 4f38b38 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 349 | if (!MI->getOperand(OpNum).isImm()) |
| 350 | return true; |
Jim Grosbach | 2317e40 | 2010-09-30 01:57:53 +0000 | [diff] [blame] | 351 | O << MI->getOperand(OpNum).getImm(); |
Bob Wilson | 8f34346 | 2009-04-06 21:46:51 +0000 | [diff] [blame] | 352 | return false; |
Evan Cheng | e21e396 | 2007-04-04 00:13:29 +0000 | [diff] [blame] | 353 | case 'P': // Print a VFP double precision register. |
Evan Cheng | d831cda | 2009-12-08 23:06:22 +0000 | [diff] [blame] | 354 | case 'q': // Print a NEON quad precision register. |
Chris Lattner | 35c33bd | 2010-04-04 04:47:45 +0000 | [diff] [blame] | 355 | printOperand(MI, OpNum, O); |
Evan Cheng | 23a9570 | 2007-03-08 22:42:46 +0000 | [diff] [blame] | 356 | return false; |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 357 | case 'Q': |
Bob Wilson | d984eb6 | 2010-05-27 20:23:42 +0000 | [diff] [blame] | 358 | case 'R': |
Bob Wilson | d984eb6 | 2010-05-27 20:23:42 +0000 | [diff] [blame] | 359 | case 'H': |
Evan Cheng | 1261672 | 2010-05-27 23:45:31 +0000 | [diff] [blame] | 360 | report_fatal_error("llvm does not support 'Q', 'R', and 'H' modifiers!"); |
Bob Wilson | d984eb6 | 2010-05-27 20:23:42 +0000 | [diff] [blame] | 361 | return true; |
Evan Cheng | 84f60b7 | 2010-05-27 22:08:38 +0000 | [diff] [blame] | 362 | } |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 363 | } |
Jim Grosbach | e995221 | 2009-09-04 01:38:51 +0000 | [diff] [blame] | 364 | |
Chris Lattner | 35c33bd | 2010-04-04 04:47:45 +0000 | [diff] [blame] | 365 | printOperand(MI, OpNum, O); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 366 | return false; |
| 367 | } |
| 368 | |
Bob Wilson | 224c244 | 2009-05-19 05:53:42 +0000 | [diff] [blame] | 369 | bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, |
Evan Cheng | 055b031 | 2009-06-29 07:51:04 +0000 | [diff] [blame] | 370 | unsigned OpNum, unsigned AsmVariant, |
Chris Lattner | c75c028 | 2010-04-04 05:29:35 +0000 | [diff] [blame] | 371 | const char *ExtraCode, |
| 372 | raw_ostream &O) { |
Bob Wilson | 224c244 | 2009-05-19 05:53:42 +0000 | [diff] [blame] | 373 | if (ExtraCode && ExtraCode[0]) |
| 374 | return true; // Unknown modifier. |
Bob Wilson | 765cc0b | 2009-10-13 20:50:28 +0000 | [diff] [blame] | 375 | |
| 376 | const MachineOperand &MO = MI->getOperand(OpNum); |
| 377 | assert(MO.isReg() && "unexpected inline asm memory operand"); |
Jim Grosbach | 2317e40 | 2010-09-30 01:57:53 +0000 | [diff] [blame] | 378 | O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]"; |
Bob Wilson | 224c244 | 2009-05-19 05:53:42 +0000 | [diff] [blame] | 379 | return false; |
| 380 | } |
| 381 | |
Bob Wilson | 812209a | 2009-09-30 22:06:26 +0000 | [diff] [blame] | 382 | void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) { |
Bob Wilson | 0fb3468 | 2009-09-30 00:23:42 +0000 | [diff] [blame] | 383 | if (Subtarget->isTargetDarwin()) { |
| 384 | Reloc::Model RelocM = TM.getRelocationModel(); |
| 385 | if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) { |
| 386 | // Declare all the text sections up front (before the DWARF sections |
| 387 | // emitted by AsmPrinter::doInitialization) so the assembler will keep |
| 388 | // them together at the beginning of the object file. This helps |
| 389 | // avoid out-of-range branches that are due a fundamental limitation of |
| 390 | // the way symbol offsets are encoded with the current Darwin ARM |
| 391 | // relocations. |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 392 | const TargetLoweringObjectFileMachO &TLOFMacho = |
Dan Gohman | 0d805c3 | 2010-04-17 16:44:48 +0000 | [diff] [blame] | 393 | static_cast<const TargetLoweringObjectFileMachO &>( |
| 394 | getObjFileLowering()); |
Bob Wilson | 29e0669 | 2009-09-30 22:25:37 +0000 | [diff] [blame] | 395 | OutStreamer.SwitchSection(TLOFMacho.getTextSection()); |
| 396 | OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection()); |
| 397 | OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection()); |
| 398 | if (RelocM == Reloc::DynamicNoPIC) { |
| 399 | const MCSection *sect = |
Chris Lattner | 2277221 | 2010-04-08 20:40:11 +0000 | [diff] [blame] | 400 | OutContext.getMachOSection("__TEXT", "__symbol_stub4", |
| 401 | MCSectionMachO::S_SYMBOL_STUBS, |
| 402 | 12, SectionKind::getText()); |
Bob Wilson | 29e0669 | 2009-09-30 22:25:37 +0000 | [diff] [blame] | 403 | OutStreamer.SwitchSection(sect); |
| 404 | } else { |
| 405 | const MCSection *sect = |
Chris Lattner | 2277221 | 2010-04-08 20:40:11 +0000 | [diff] [blame] | 406 | OutContext.getMachOSection("__TEXT", "__picsymbolstub4", |
| 407 | MCSectionMachO::S_SYMBOL_STUBS, |
| 408 | 16, SectionKind::getText()); |
Bob Wilson | 29e0669 | 2009-09-30 22:25:37 +0000 | [diff] [blame] | 409 | OutStreamer.SwitchSection(sect); |
| 410 | } |
Bob Wilson | 63db594 | 2010-07-30 19:55:47 +0000 | [diff] [blame] | 411 | const MCSection *StaticInitSect = |
| 412 | OutContext.getMachOSection("__TEXT", "__StaticInit", |
| 413 | MCSectionMachO::S_REGULAR | |
| 414 | MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS, |
| 415 | SectionKind::getText()); |
| 416 | OutStreamer.SwitchSection(StaticInitSect); |
Bob Wilson | 0fb3468 | 2009-09-30 00:23:42 +0000 | [diff] [blame] | 417 | } |
| 418 | } |
| 419 | |
Jim Grosbach | e516549 | 2009-11-09 00:11:35 +0000 | [diff] [blame] | 420 | // Use unified assembler syntax. |
Jason W Kim | afd1cc2 | 2010-09-30 02:45:56 +0000 | [diff] [blame] | 421 | OutStreamer.EmitAssemblerFlag(MCAF_SyntaxUnified); |
Anton Korobeynikov | d61eca5 | 2009-06-17 23:43:18 +0000 | [diff] [blame] | 422 | |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 423 | // Emit ARM Build Attributes |
| 424 | if (Subtarget->isTargetELF()) { |
| 425 | // CPU Type |
Anton Korobeynikov | d260c24 | 2009-06-01 19:03:17 +0000 | [diff] [blame] | 426 | std::string CPUString = Subtarget->getCPUString(); |
| 427 | if (CPUString != "generic") |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 428 | OutStreamer.EmitRawText("\t.cpu " + Twine(CPUString)); |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 429 | |
| 430 | // FIXME: Emit FPU type |
| 431 | if (Subtarget->hasVFP2()) |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 432 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 433 | Twine(ARMBuildAttrs::VFP_arch) + ", 2"); |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 434 | |
| 435 | // Signal various FP modes. |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 436 | if (!UnsafeFPMath) { |
| 437 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 438 | Twine(ARMBuildAttrs::ABI_FP_denormal) + ", 1"); |
| 439 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 440 | Twine(ARMBuildAttrs::ABI_FP_exceptions) + ", 1"); |
| 441 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 442 | |
Evan Cheng | 60108e9 | 2010-07-15 22:07:12 +0000 | [diff] [blame] | 443 | if (NoInfsFPMath && NoNaNsFPMath) |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 444 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 445 | Twine(ARMBuildAttrs::ABI_FP_number_model)+ ", 1"); |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 446 | else |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 447 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 448 | Twine(ARMBuildAttrs::ABI_FP_number_model)+ ", 3"); |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 449 | |
| 450 | // 8-bytes alignment stuff. |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 451 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 452 | Twine(ARMBuildAttrs::ABI_align8_needed) + ", 1"); |
| 453 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 454 | Twine(ARMBuildAttrs::ABI_align8_preserved) + ", 1"); |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 455 | |
Anton Korobeynikov | 567d14f | 2009-08-05 19:04:42 +0000 | [diff] [blame] | 456 | // Hard float. Use both S and D registers and conform to AAPCS-VFP. |
Chris Lattner | 9d7efd3 | 2010-04-04 07:05:53 +0000 | [diff] [blame] | 457 | if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) { |
| 458 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 459 | Twine(ARMBuildAttrs::ABI_HardFP_use) + ", 3"); |
| 460 | OutStreamer.EmitRawText("\t.eabi_attribute " + |
| 461 | Twine(ARMBuildAttrs::ABI_VFP_args) + ", 1"); |
| 462 | } |
Anton Korobeynikov | 88ce667 | 2009-05-23 19:51:20 +0000 | [diff] [blame] | 463 | // FIXME: Should we signal R9 usage? |
| 464 | } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 465 | } |
| 466 | |
Anton Korobeynikov | 0f3cc65 | 2008-08-07 09:54:23 +0000 | [diff] [blame] | 467 | |
Chris Lattner | 4a071d6 | 2009-10-19 17:59:19 +0000 | [diff] [blame] | 468 | void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) { |
Evan Cheng | 5be54b0 | 2007-01-19 19:25:36 +0000 | [diff] [blame] | 469 | if (Subtarget->isTargetDarwin()) { |
Chris Lattner | f61159b | 2009-08-03 22:18:15 +0000 | [diff] [blame] | 470 | // All darwin targets use mach-o. |
Dan Gohman | 0d805c3 | 2010-04-17 16:44:48 +0000 | [diff] [blame] | 471 | const TargetLoweringObjectFileMachO &TLOFMacho = |
| 472 | static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); |
Chris Lattner | b0f294c | 2009-10-19 18:38:33 +0000 | [diff] [blame] | 473 | MachineModuleInfoMachO &MMIMacho = |
| 474 | MMI->getObjFileInfo<MachineModuleInfoMachO>(); |
Jim Grosbach | e995221 | 2009-09-04 01:38:51 +0000 | [diff] [blame] | 475 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 476 | // Output non-lazy-pointers for external and common global variables. |
Chris Lattner | b0f294c | 2009-10-19 18:38:33 +0000 | [diff] [blame] | 477 | MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); |
Bill Wendling | cebae36 | 2010-03-10 22:34:10 +0000 | [diff] [blame] | 478 | |
Chris Lattner | b0f294c | 2009-10-19 18:38:33 +0000 | [diff] [blame] | 479 | if (!Stubs.empty()) { |
Chris Lattner | ff4bc46 | 2009-08-10 01:39:42 +0000 | [diff] [blame] | 480 | // Switch with ".non_lazy_symbol_pointer" directive. |
Chris Lattner | 6c2f9e1 | 2009-08-19 05:49:37 +0000 | [diff] [blame] | 481 | OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); |
Chris Lattner | c076a97 | 2009-08-10 18:01:34 +0000 | [diff] [blame] | 482 | EmitAlignment(2); |
Chris Lattner | b0f294c | 2009-10-19 18:38:33 +0000 | [diff] [blame] | 483 | for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { |
Bill Wendling | becd83e | 2010-03-09 00:40:17 +0000 | [diff] [blame] | 484 | // L_foo$stub: |
| 485 | OutStreamer.EmitLabel(Stubs[i].first); |
| 486 | // .indirect_symbol _foo |
Bill Wendling | 52a50e5 | 2010-03-11 01:18:13 +0000 | [diff] [blame] | 487 | MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; |
| 488 | OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol); |
Bill Wendling | cf6f28d | 2010-03-09 00:43:34 +0000 | [diff] [blame] | 489 | |
Bill Wendling | 52a50e5 | 2010-03-11 01:18:13 +0000 | [diff] [blame] | 490 | if (MCSym.getInt()) |
Bill Wendling | cf6f28d | 2010-03-09 00:43:34 +0000 | [diff] [blame] | 491 | // External to current translation unit. |
| 492 | OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); |
| 493 | else |
| 494 | // Internal to current translation unit. |
Bill Wendling | 5e1b55d | 2010-03-31 18:47:10 +0000 | [diff] [blame] | 495 | // |
Jim Grosbach | 1b935a3 | 2010-09-22 16:45:13 +0000 | [diff] [blame] | 496 | // When we place the LSDA into the TEXT section, the type info |
| 497 | // pointers need to be indirect and pc-rel. We accomplish this by |
| 498 | // using NLPs; however, sometimes the types are local to the file. |
| 499 | // We need to fill in the value for the NLP in those cases. |
Bill Wendling | 52a50e5 | 2010-03-11 01:18:13 +0000 | [diff] [blame] | 500 | OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(), |
| 501 | OutContext), |
Bill Wendling | cf6f28d | 2010-03-09 00:43:34 +0000 | [diff] [blame] | 502 | 4/*size*/, 0/*addrspace*/); |
Evan Cheng | ae94e59 | 2008-12-05 01:06:39 +0000 | [diff] [blame] | 503 | } |
Bill Wendling | becd83e | 2010-03-09 00:40:17 +0000 | [diff] [blame] | 504 | |
| 505 | Stubs.clear(); |
| 506 | OutStreamer.AddBlankLine(); |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 507 | } |
| 508 | |
Chris Lattner | e4d9ea8 | 2009-10-19 18:44:38 +0000 | [diff] [blame] | 509 | Stubs = MMIMacho.GetHiddenGVStubList(); |
| 510 | if (!Stubs.empty()) { |
Chris Lattner | 6c2f9e1 | 2009-08-19 05:49:37 +0000 | [diff] [blame] | 511 | OutStreamer.SwitchSection(getObjFileLowering().getDataSection()); |
Chris Lattner | f3231de | 2009-08-10 18:02:16 +0000 | [diff] [blame] | 512 | EmitAlignment(2); |
Bill Wendling | becd83e | 2010-03-09 00:40:17 +0000 | [diff] [blame] | 513 | for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { |
| 514 | // L_foo$stub: |
| 515 | OutStreamer.EmitLabel(Stubs[i].first); |
| 516 | // .long _foo |
Bill Wendling | cebae36 | 2010-03-10 22:34:10 +0000 | [diff] [blame] | 517 | OutStreamer.EmitValue(MCSymbolRefExpr:: |
| 518 | Create(Stubs[i].second.getPointer(), |
| 519 | OutContext), |
Bill Wendling | becd83e | 2010-03-09 00:40:17 +0000 | [diff] [blame] | 520 | 4/*size*/, 0/*addrspace*/); |
| 521 | } |
Bill Wendling | cf6f28d | 2010-03-09 00:43:34 +0000 | [diff] [blame] | 522 | |
| 523 | Stubs.clear(); |
| 524 | OutStreamer.AddBlankLine(); |
Evan Cheng | ae94e59 | 2008-12-05 01:06:39 +0000 | [diff] [blame] | 525 | } |
| 526 | |
Evan Cheng | a8e2989 | 2007-01-19 07:51:42 +0000 | [diff] [blame] | 527 | // Funny Darwin hack: This flag tells the linker that no global symbols |
| 528 | // contain code that falls through to other global symbols (e.g. the obvious |
| 529 | // implementation of multiple entry points). If this doesn't occur, the |
| 530 | // linker can safely perform dead code stripping. Since LLVM never |
| 531 | // generates code that does this, it is always safe to set. |
Chris Lattner | a5ad93a | 2010-01-23 06:39:22 +0000 | [diff] [blame] | 532 | OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); |
Rafael Espindola | b01c4bb | 2006-07-27 11:38:51 +0000 | [diff] [blame] | 533 | } |
Rafael Espindola | 7bc59bc | 2006-05-14 22:18:28 +0000 | [diff] [blame] | 534 | } |
Anton Korobeynikov | 0bd8971 | 2008-08-17 13:55:10 +0000 | [diff] [blame] | 535 | |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 536 | //===----------------------------------------------------------------------===// |
| 537 | |
Jim Grosbach | 988ce09 | 2010-09-18 00:05:05 +0000 | [diff] [blame] | 538 | static MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber, |
| 539 | unsigned LabelId, MCContext &Ctx) { |
| 540 | |
| 541 | MCSymbol *Label = Ctx.GetOrCreateSymbol(Twine(Prefix) |
| 542 | + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId)); |
| 543 | return Label; |
| 544 | } |
| 545 | |
Jim Grosbach | a2244cb | 2010-09-22 17:39:48 +0000 | [diff] [blame] | 546 | void ARMAsmPrinter::EmitJumpTable(const MachineInstr *MI) { |
| 547 | unsigned Opcode = MI->getOpcode(); |
| 548 | int OpNum = 1; |
| 549 | if (Opcode == ARM::BR_JTadd) |
| 550 | OpNum = 2; |
| 551 | else if (Opcode == ARM::BR_JTm) |
| 552 | OpNum = 3; |
| 553 | |
| 554 | const MachineOperand &MO1 = MI->getOperand(OpNum); |
| 555 | const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id |
| 556 | unsigned JTI = MO1.getIndex(); |
| 557 | |
| 558 | // Emit a label for the jump table. |
| 559 | MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); |
| 560 | OutStreamer.EmitLabel(JTISymbol); |
| 561 | |
| 562 | // Emit each entry of the table. |
| 563 | const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); |
| 564 | const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); |
| 565 | const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; |
| 566 | |
| 567 | for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { |
| 568 | MachineBasicBlock *MBB = JTBBs[i]; |
| 569 | // Construct an MCExpr for the entry. We want a value of the form: |
| 570 | // (BasicBlockAddr - TableBeginAddr) |
| 571 | // |
| 572 | // For example, a table with entries jumping to basic blocks BB0 and BB1 |
| 573 | // would look like: |
| 574 | // LJTI_0_0: |
| 575 | // .word (LBB0 - LJTI_0_0) |
| 576 | // .word (LBB1 - LJTI_0_0) |
| 577 | const MCExpr *Expr = MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext); |
| 578 | |
| 579 | if (TM.getRelocationModel() == Reloc::PIC_) |
| 580 | Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(JTISymbol, |
| 581 | OutContext), |
| 582 | OutContext); |
| 583 | OutStreamer.EmitValue(Expr, 4); |
| 584 | } |
| 585 | } |
| 586 | |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 587 | void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) { |
| 588 | unsigned Opcode = MI->getOpcode(); |
| 589 | int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; |
| 590 | const MachineOperand &MO1 = MI->getOperand(OpNum); |
| 591 | const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id |
| 592 | unsigned JTI = MO1.getIndex(); |
| 593 | |
| 594 | // Emit a label for the jump table. |
| 595 | MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); |
| 596 | OutStreamer.EmitLabel(JTISymbol); |
| 597 | |
| 598 | // Emit each entry of the table. |
| 599 | const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); |
| 600 | const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); |
| 601 | const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs; |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 602 | unsigned OffsetWidth = 4; |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 603 | if (MI->getOpcode() == ARM::t2TBB) |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 604 | OffsetWidth = 1; |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 605 | else if (MI->getOpcode() == ARM::t2TBH) |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 606 | OffsetWidth = 2; |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 607 | |
| 608 | for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { |
| 609 | MachineBasicBlock *MBB = JTBBs[i]; |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 610 | const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::Create(MBB->getSymbol(), |
| 611 | OutContext); |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 612 | // If this isn't a TBB or TBH, the entries are direct branch instructions. |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 613 | if (OffsetWidth == 4) { |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 614 | MCInst BrInst; |
| 615 | BrInst.setOpcode(ARM::t2B); |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 616 | BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr)); |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 617 | OutStreamer.EmitInstruction(BrInst); |
| 618 | continue; |
| 619 | } |
| 620 | // Otherwise it's an offset from the dispatch instruction. Construct an |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 621 | // MCExpr for the entry. We want a value of the form: |
| 622 | // (BasicBlockAddr - TableBeginAddr) / 2 |
| 623 | // |
| 624 | // For example, a TBB table with entries jumping to basic blocks BB0 and BB1 |
| 625 | // would look like: |
| 626 | // LJTI_0_0: |
| 627 | // .byte (LBB0 - LJTI_0_0) / 2 |
| 628 | // .byte (LBB1 - LJTI_0_0) / 2 |
| 629 | const MCExpr *Expr = |
| 630 | MCBinaryExpr::CreateSub(MBBSymbolExpr, |
| 631 | MCSymbolRefExpr::Create(JTISymbol, OutContext), |
| 632 | OutContext); |
| 633 | Expr = MCBinaryExpr::CreateDiv(Expr, MCConstantExpr::Create(2, OutContext), |
| 634 | OutContext); |
| 635 | OutStreamer.EmitValue(Expr, OffsetWidth); |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 636 | } |
Jim Grosbach | 205a5fa | 2010-09-22 17:15:35 +0000 | [diff] [blame] | 637 | |
| 638 | // Make sure the instruction that follows TBB is 2-byte aligned. |
| 639 | // FIXME: Constant island pass should insert an "ALIGN" instruction instead. |
| 640 | if (MI->getOpcode() == ARM::t2TBB) |
| 641 | EmitAlignment(1); |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 642 | } |
| 643 | |
Jim Grosbach | 2d0f53b | 2010-09-28 17:05:56 +0000 | [diff] [blame] | 644 | void ARMAsmPrinter::PrintDebugValueComment(const MachineInstr *MI, |
| 645 | raw_ostream &OS) { |
| 646 | unsigned NOps = MI->getNumOperands(); |
| 647 | assert(NOps==4); |
| 648 | OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; |
| 649 | // cast away const; DIetc do not take const operands for some reason. |
| 650 | DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata())); |
| 651 | OS << V.getName(); |
| 652 | OS << " <- "; |
| 653 | // Frame address. Currently handles register +- offset only. |
| 654 | assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm()); |
| 655 | OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS); |
| 656 | OS << ']'; |
| 657 | OS << "+"; |
| 658 | printOperand(MI, NOps-2, OS); |
| 659 | } |
| 660 | |
Jim Grosbach | b454cda | 2010-09-29 15:23:40 +0000 | [diff] [blame] | 661 | void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { |
Chris Lattner | 96bc217 | 2009-10-20 00:52:47 +0000 | [diff] [blame] | 662 | ARMMCInstLower MCInstLowering(OutContext, *Mang, *this); |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 663 | switch (MI->getOpcode()) { |
Chris Lattner | c6b8a99 | 2009-10-20 05:58:02 +0000 | [diff] [blame] | 664 | case ARM::t2MOVi32imm: |
| 665 | assert(0 && "Should be lowered by thumb2it pass"); |
Chris Lattner | 4d15222 | 2009-10-19 22:23:04 +0000 | [diff] [blame] | 666 | default: break; |
Jim Grosbach | 2d0f53b | 2010-09-28 17:05:56 +0000 | [diff] [blame] | 667 | case ARM::DBG_VALUE: { |
| 668 | if (isVerbose() && OutStreamer.hasRawTextSupport()) { |
| 669 | SmallString<128> TmpStr; |
| 670 | raw_svector_ostream OS(TmpStr); |
| 671 | PrintDebugValueComment(MI, OS); |
| 672 | OutStreamer.EmitRawText(StringRef(OS.str())); |
| 673 | } |
| 674 | return; |
| 675 | } |
Jim Grosbach | fbd1873 | 2010-09-17 23:41:53 +0000 | [diff] [blame] | 676 | case ARM::tPICADD: { |
| 677 | // This is a pseudo op for a label + instruction sequence, which looks like: |
| 678 | // LPC0: |
| 679 | // add r0, pc |
| 680 | // This adds the address of LPC0 to r0. |
| 681 | |
| 682 | // Emit the label. |
Jim Grosbach | 988ce09 | 2010-09-18 00:05:05 +0000 | [diff] [blame] | 683 | OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), |
| 684 | getFunctionNumber(), MI->getOperand(2).getImm(), |
| 685 | OutContext)); |
Jim Grosbach | fbd1873 | 2010-09-17 23:41:53 +0000 | [diff] [blame] | 686 | |
| 687 | // Form and emit the add. |
| 688 | MCInst AddInst; |
| 689 | AddInst.setOpcode(ARM::tADDhirr); |
| 690 | AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); |
| 691 | AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); |
| 692 | AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 693 | // Add predicate operands. |
| 694 | AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 695 | AddInst.addOperand(MCOperand::CreateReg(0)); |
| 696 | OutStreamer.EmitInstruction(AddInst); |
| 697 | return; |
| 698 | } |
Jim Grosbach | a3fbadf | 2010-09-30 19:53:58 +0000 | [diff] [blame] | 699 | case ARM::PICADD: { |
Chris Lattner | 4d15222 | 2009-10-19 22:23:04 +0000 | [diff] [blame] | 700 | // This is a pseudo op for a label + instruction sequence, which looks like: |
| 701 | // LPC0: |
| 702 | // add r0, pc, r0 |
| 703 | // This adds the address of LPC0 to r0. |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 704 | |
Chris Lattner | 4d15222 | 2009-10-19 22:23:04 +0000 | [diff] [blame] | 705 | // Emit the label. |
Jim Grosbach | 988ce09 | 2010-09-18 00:05:05 +0000 | [diff] [blame] | 706 | OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), |
| 707 | getFunctionNumber(), MI->getOperand(2).getImm(), |
| 708 | OutContext)); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 709 | |
Jim Grosbach | f3f0952 | 2010-09-14 21:05:34 +0000 | [diff] [blame] | 710 | // Form and emit the add. |
Chris Lattner | 4d15222 | 2009-10-19 22:23:04 +0000 | [diff] [blame] | 711 | MCInst AddInst; |
| 712 | AddInst.setOpcode(ARM::ADDrr); |
| 713 | AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); |
| 714 | AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 715 | AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); |
Jim Grosbach | 5b46d62 | 2010-09-14 21:28:17 +0000 | [diff] [blame] | 716 | // Add predicate operands. |
| 717 | AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); |
| 718 | AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); |
| 719 | // Add 's' bit operand (always reg0 for this) |
| 720 | AddInst.addOperand(MCOperand::CreateReg(0)); |
Chris Lattner | 850d2e2 | 2010-02-03 01:16:28 +0000 | [diff] [blame] | 721 | OutStreamer.EmitInstruction(AddInst); |
Chris Lattner | 4d15222 | 2009-10-19 22:23:04 +0000 | [diff] [blame] | 722 | return; |
| 723 | } |
Jim Grosbach | a28abbe | 2010-09-17 16:25:52 +0000 | [diff] [blame] | 724 | case ARM::PICSTR: |
| 725 | case ARM::PICSTRB: |
| 726 | case ARM::PICSTRH: |
| 727 | case ARM::PICLDR: |
| 728 | case ARM::PICLDRB: |
| 729 | case ARM::PICLDRH: |
| 730 | case ARM::PICLDRSB: |
| 731 | case ARM::PICLDRSH: { |
Jim Grosbach | b74ca9d | 2010-09-16 17:43:25 +0000 | [diff] [blame] | 732 | // This is a pseudo op for a label + instruction sequence, which looks like: |
| 733 | // LPC0: |
Jim Grosbach | a28abbe | 2010-09-17 16:25:52 +0000 | [diff] [blame] | 734 | // OP r0, [pc, r0] |
Jim Grosbach | b74ca9d | 2010-09-16 17:43:25 +0000 | [diff] [blame] | 735 | // The LCP0 label is referenced by a constant pool entry in order to get |
| 736 | // a PC-relative address at the ldr instruction. |
| 737 | |
| 738 | // Emit the label. |
Jim Grosbach | 988ce09 | 2010-09-18 00:05:05 +0000 | [diff] [blame] | 739 | OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(), |
| 740 | getFunctionNumber(), MI->getOperand(2).getImm(), |
| 741 | OutContext)); |
Jim Grosbach | b74ca9d | 2010-09-16 17:43:25 +0000 | [diff] [blame] | 742 | |
| 743 | // Form and emit the load |
Jim Grosbach | a28abbe | 2010-09-17 16:25:52 +0000 | [diff] [blame] | 744 | unsigned Opcode; |
| 745 | switch (MI->getOpcode()) { |
| 746 | default: |
| 747 | llvm_unreachable("Unexpected opcode!"); |
| 748 | case ARM::PICSTR: Opcode = ARM::STR; break; |
| 749 | case ARM::PICSTRB: Opcode = ARM::STRB; break; |
| 750 | case ARM::PICSTRH: Opcode = ARM::STRH; break; |
| 751 | case ARM::PICLDR: Opcode = ARM::LDR; break; |
| 752 | case ARM::PICLDRB: Opcode = ARM::LDRB; break; |
| 753 | case ARM::PICLDRH: Opcode = ARM::LDRH; break; |
| 754 | case ARM::PICLDRSB: Opcode = ARM::LDRSB; break; |
| 755 | case ARM::PICLDRSH: Opcode = ARM::LDRSH; break; |
| 756 | } |
| 757 | MCInst LdStInst; |
| 758 | LdStInst.setOpcode(Opcode); |
| 759 | LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); |
| 760 | LdStInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 761 | LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); |
| 762 | LdStInst.addOperand(MCOperand::CreateImm(0)); |
Jim Grosbach | b74ca9d | 2010-09-16 17:43:25 +0000 | [diff] [blame] | 763 | // Add predicate operands. |
Jim Grosbach | a28abbe | 2010-09-17 16:25:52 +0000 | [diff] [blame] | 764 | LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); |
| 765 | LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); |
| 766 | OutStreamer.EmitInstruction(LdStInst); |
Jim Grosbach | b74ca9d | 2010-09-16 17:43:25 +0000 | [diff] [blame] | 767 | |
| 768 | return; |
| 769 | } |
Jim Grosbach | a3fbadf | 2010-09-30 19:53:58 +0000 | [diff] [blame] | 770 | case ARM::CONSTPOOL_ENTRY: { |
Chris Lattner | a70e644 | 2009-10-19 22:33:05 +0000 | [diff] [blame] | 771 | /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool |
| 772 | /// in the function. The first operand is the ID# for this instruction, the |
| 773 | /// second is the index into the MachineConstantPool that this is, the third |
| 774 | /// is the size in bytes of this constant pool entry. |
| 775 | unsigned LabelId = (unsigned)MI->getOperand(0).getImm(); |
| 776 | unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex(); |
| 777 | |
| 778 | EmitAlignment(2); |
Chris Lattner | 1b46f43 | 2010-01-23 07:00:21 +0000 | [diff] [blame] | 779 | OutStreamer.EmitLabel(GetCPISymbol(LabelId)); |
Chris Lattner | a70e644 | 2009-10-19 22:33:05 +0000 | [diff] [blame] | 780 | |
| 781 | const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx]; |
| 782 | if (MCPE.isMachineConstantPoolEntry()) |
| 783 | EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal); |
| 784 | else |
| 785 | EmitGlobalConstant(MCPE.Val.ConstVal); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 786 | |
Chris Lattner | a70e644 | 2009-10-19 22:33:05 +0000 | [diff] [blame] | 787 | return; |
| 788 | } |
Jim Grosbach | a3fbadf | 2010-09-30 19:53:58 +0000 | [diff] [blame] | 789 | case ARM::MOVi2pieces: { |
| 790 | // FIXME: We'd like to remove the asm string in the .td file, but the |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 791 | // This is a hack that lowers as a two instruction sequence. |
| 792 | unsigned DstReg = MI->getOperand(0).getReg(); |
| 793 | unsigned ImmVal = (unsigned)MI->getOperand(1).getImm(); |
| 794 | |
| 795 | unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal); |
| 796 | unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 797 | |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 798 | { |
| 799 | MCInst TmpInst; |
| 800 | TmpInst.setOpcode(ARM::MOVi); |
| 801 | TmpInst.addOperand(MCOperand::CreateReg(DstReg)); |
| 802 | TmpInst.addOperand(MCOperand::CreateImm(SOImmValV1)); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 803 | |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 804 | // Predicate. |
| 805 | TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); |
| 806 | TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg())); |
Chris Lattner | 233917c | 2009-10-20 00:46:11 +0000 | [diff] [blame] | 807 | |
| 808 | TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out |
Chris Lattner | 850d2e2 | 2010-02-03 01:16:28 +0000 | [diff] [blame] | 809 | OutStreamer.EmitInstruction(TmpInst); |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 810 | } |
| 811 | |
| 812 | { |
| 813 | MCInst TmpInst; |
| 814 | TmpInst.setOpcode(ARM::ORRri); |
| 815 | TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg |
| 816 | TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // inreg |
| 817 | TmpInst.addOperand(MCOperand::CreateImm(SOImmValV2)); // so_imm |
| 818 | // Predicate. |
| 819 | TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); |
| 820 | TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg())); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 821 | |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 822 | TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out |
Chris Lattner | 850d2e2 | 2010-02-03 01:16:28 +0000 | [diff] [blame] | 823 | OutStreamer.EmitInstruction(TmpInst); |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 824 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 825 | return; |
Chris Lattner | 017d947 | 2009-10-20 00:40:56 +0000 | [diff] [blame] | 826 | } |
Jim Grosbach | a3fbadf | 2010-09-30 19:53:58 +0000 | [diff] [blame] | 827 | case ARM::MOVi32imm: { |
| 828 | // FIXME: We'd like to remove the asm string in the .td file, but the |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 829 | // This is a hack that lowers as a two instruction sequence. |
| 830 | unsigned DstReg = MI->getOperand(0).getReg(); |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 831 | const MachineOperand &MO = MI->getOperand(1); |
| 832 | MCOperand V1, V2; |
| 833 | if (MO.isImm()) { |
| 834 | unsigned ImmVal = (unsigned)MI->getOperand(1).getImm(); |
| 835 | V1 = MCOperand::CreateImm(ImmVal & 65535); |
| 836 | V2 = MCOperand::CreateImm(ImmVal >> 16); |
| 837 | } else if (MO.isGlobal()) { |
Jim Grosbach | c686e33 | 2010-09-17 18:25:25 +0000 | [diff] [blame] | 838 | MCSymbol *Symbol = MCInstLowering.GetGlobalAddressSymbol(MO.getGlobal()); |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 839 | const MCSymbolRefExpr *SymRef1 = |
Duncan Sands | 3472766 | 2010-07-12 08:16:59 +0000 | [diff] [blame] | 840 | MCSymbolRefExpr::Create(Symbol, |
| 841 | MCSymbolRefExpr::VK_ARM_LO16, OutContext); |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 842 | const MCSymbolRefExpr *SymRef2 = |
Duncan Sands | 3472766 | 2010-07-12 08:16:59 +0000 | [diff] [blame] | 843 | MCSymbolRefExpr::Create(Symbol, |
| 844 | MCSymbolRefExpr::VK_ARM_HI16, OutContext); |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 845 | V1 = MCOperand::CreateExpr(SymRef1); |
| 846 | V2 = MCOperand::CreateExpr(SymRef2); |
| 847 | } else { |
Jim Grosbach | f0633e4 | 2010-09-22 20:55:15 +0000 | [diff] [blame] | 848 | // FIXME: External symbol? |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 849 | MI->dump(); |
| 850 | llvm_unreachable("cannot handle this operand"); |
| 851 | } |
| 852 | |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 853 | { |
| 854 | MCInst TmpInst; |
| 855 | TmpInst.setOpcode(ARM::MOVi16); |
| 856 | TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 857 | TmpInst.addOperand(V1); // lower16(imm) |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 858 | |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 859 | // Predicate. |
| 860 | TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); |
| 861 | TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg())); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 862 | |
Chris Lattner | 850d2e2 | 2010-02-03 01:16:28 +0000 | [diff] [blame] | 863 | OutStreamer.EmitInstruction(TmpInst); |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 864 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 865 | |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 866 | { |
| 867 | MCInst TmpInst; |
| 868 | TmpInst.setOpcode(ARM::MOVTi16); |
| 869 | TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg |
| 870 | TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // srcreg |
Rafael Espindola | 18c1021 | 2010-05-12 05:16:34 +0000 | [diff] [blame] | 871 | TmpInst.addOperand(V2); // upper16(imm) |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 872 | |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 873 | // Predicate. |
| 874 | TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); |
| 875 | TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg())); |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 876 | |
Chris Lattner | 850d2e2 | 2010-02-03 01:16:28 +0000 | [diff] [blame] | 877 | OutStreamer.EmitInstruction(TmpInst); |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 878 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 879 | |
Chris Lattner | 161dcbf | 2009-10-20 01:11:37 +0000 | [diff] [blame] | 880 | return; |
| 881 | } |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 882 | case ARM::t2TBB: |
| 883 | case ARM::t2TBH: |
| 884 | case ARM::t2BR_JT: { |
| 885 | // Lower and emit the instruction itself, then the jump table following it. |
| 886 | MCInst TmpInst; |
| 887 | MCInstLowering.Lower(MI, TmpInst); |
| 888 | OutStreamer.EmitInstruction(TmpInst); |
Jim Grosbach | 882ef2b | 2010-09-21 23:28:16 +0000 | [diff] [blame] | 889 | EmitJump2Table(MI); |
| 890 | return; |
| 891 | } |
| 892 | case ARM::tBR_JTr: |
| 893 | case ARM::BR_JTr: |
| 894 | case ARM::BR_JTm: |
Jim Grosbach | a2244cb | 2010-09-22 17:39:48 +0000 | [diff] [blame] | 895 | case ARM::BR_JTadd: { |
| 896 | // Lower and emit the instruction itself, then the jump table following it. |
| 897 | MCInst TmpInst; |
| 898 | MCInstLowering.Lower(MI, TmpInst); |
| 899 | OutStreamer.EmitInstruction(TmpInst); |
| 900 | EmitJumpTable(MI); |
| 901 | return; |
| 902 | } |
Jim Grosbach | 2e6ae13 | 2010-09-23 18:05:37 +0000 | [diff] [blame] | 903 | case ARM::TRAP: { |
| 904 | // Non-Darwin binutils don't yet support the "trap" mnemonic. |
| 905 | // FIXME: Remove this special case when they do. |
| 906 | if (!Subtarget->isTargetDarwin()) { |
Jim Grosbach | 78890f4 | 2010-10-01 23:21:38 +0000 | [diff] [blame] | 907 | //.long 0xe7ffdefe @ trap |
Jim Grosbach | b2dda4b | 2010-09-23 19:42:17 +0000 | [diff] [blame] | 908 | uint32_t Val = 0xe7ffdefeUL; |
Jim Grosbach | 2e6ae13 | 2010-09-23 18:05:37 +0000 | [diff] [blame] | 909 | OutStreamer.AddComment("trap"); |
| 910 | OutStreamer.EmitIntValue(Val, 4); |
| 911 | return; |
| 912 | } |
| 913 | break; |
| 914 | } |
| 915 | case ARM::tTRAP: { |
| 916 | // Non-Darwin binutils don't yet support the "trap" mnemonic. |
| 917 | // FIXME: Remove this special case when they do. |
| 918 | if (!Subtarget->isTargetDarwin()) { |
Jim Grosbach | 78890f4 | 2010-10-01 23:21:38 +0000 | [diff] [blame] | 919 | //.short 57086 @ trap |
Benjamin Kramer | c8ab9eb | 2010-09-23 18:57:26 +0000 | [diff] [blame] | 920 | uint16_t Val = 0xdefe; |
Jim Grosbach | 2e6ae13 | 2010-09-23 18:05:37 +0000 | [diff] [blame] | 921 | OutStreamer.AddComment("trap"); |
| 922 | OutStreamer.EmitIntValue(Val, 2); |
| 923 | return; |
| 924 | } |
| 925 | break; |
| 926 | } |
Jim Grosbach | 433a578 | 2010-09-24 20:47:58 +0000 | [diff] [blame] | 927 | case ARM::t2Int_eh_sjlj_setjmp: |
| 928 | case ARM::t2Int_eh_sjlj_setjmp_nofp: |
Jim Grosbach | a3fbadf | 2010-09-30 19:53:58 +0000 | [diff] [blame] | 929 | case ARM::tInt_eh_sjlj_setjmp: { |
Jim Grosbach | 433a578 | 2010-09-24 20:47:58 +0000 | [diff] [blame] | 930 | // Two incoming args: GPR:$src, GPR:$val |
| 931 | // mov $val, pc |
| 932 | // adds $val, #7 |
| 933 | // str $val, [$src, #4] |
| 934 | // movs r0, #0 |
| 935 | // b 1f |
| 936 | // movs r0, #1 |
| 937 | // 1: |
| 938 | unsigned SrcReg = MI->getOperand(0).getReg(); |
| 939 | unsigned ValReg = MI->getOperand(1).getReg(); |
| 940 | MCSymbol *Label = GetARMSJLJEHLabel(); |
| 941 | { |
| 942 | MCInst TmpInst; |
| 943 | TmpInst.setOpcode(ARM::tMOVgpr2tgpr); |
| 944 | TmpInst.addOperand(MCOperand::CreateReg(ValReg)); |
| 945 | TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 946 | // 's' bit operand |
| 947 | TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); |
| 948 | OutStreamer.AddComment("eh_setjmp begin"); |
| 949 | OutStreamer.EmitInstruction(TmpInst); |
| 950 | } |
| 951 | { |
| 952 | MCInst TmpInst; |
| 953 | TmpInst.setOpcode(ARM::tADDi3); |
| 954 | TmpInst.addOperand(MCOperand::CreateReg(ValReg)); |
| 955 | // 's' bit operand |
| 956 | TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); |
| 957 | TmpInst.addOperand(MCOperand::CreateReg(ValReg)); |
| 958 | TmpInst.addOperand(MCOperand::CreateImm(7)); |
| 959 | // Predicate. |
| 960 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 961 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 962 | OutStreamer.EmitInstruction(TmpInst); |
| 963 | } |
| 964 | { |
| 965 | MCInst TmpInst; |
| 966 | TmpInst.setOpcode(ARM::tSTR); |
| 967 | TmpInst.addOperand(MCOperand::CreateReg(ValReg)); |
| 968 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 969 | // The offset immediate is #4. The operand value is scaled by 4 for the |
| 970 | // tSTR instruction. |
| 971 | TmpInst.addOperand(MCOperand::CreateImm(1)); |
| 972 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 973 | // Predicate. |
| 974 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 975 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 976 | OutStreamer.EmitInstruction(TmpInst); |
| 977 | } |
| 978 | { |
| 979 | MCInst TmpInst; |
| 980 | TmpInst.setOpcode(ARM::tMOVi8); |
| 981 | TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); |
| 982 | TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); |
| 983 | TmpInst.addOperand(MCOperand::CreateImm(0)); |
| 984 | // Predicate. |
| 985 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 986 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 987 | OutStreamer.EmitInstruction(TmpInst); |
| 988 | } |
| 989 | { |
| 990 | const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, OutContext); |
| 991 | MCInst TmpInst; |
| 992 | TmpInst.setOpcode(ARM::tB); |
| 993 | TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr)); |
| 994 | OutStreamer.EmitInstruction(TmpInst); |
| 995 | } |
| 996 | { |
| 997 | MCInst TmpInst; |
| 998 | TmpInst.setOpcode(ARM::tMOVi8); |
| 999 | TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); |
| 1000 | TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); |
| 1001 | TmpInst.addOperand(MCOperand::CreateImm(1)); |
| 1002 | // Predicate. |
| 1003 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1004 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1005 | OutStreamer.AddComment("eh_setjmp end"); |
| 1006 | OutStreamer.EmitInstruction(TmpInst); |
| 1007 | } |
| 1008 | OutStreamer.EmitLabel(Label); |
| 1009 | return; |
| 1010 | } |
| 1011 | |
Jim Grosbach | 4539008 | 2010-09-23 23:33:56 +0000 | [diff] [blame] | 1012 | case ARM::Int_eh_sjlj_setjmp_nofp: |
Jim Grosbach | a3fbadf | 2010-09-30 19:53:58 +0000 | [diff] [blame] | 1013 | case ARM::Int_eh_sjlj_setjmp: { |
Jim Grosbach | 4539008 | 2010-09-23 23:33:56 +0000 | [diff] [blame] | 1014 | // Two incoming args: GPR:$src, GPR:$val |
| 1015 | // add $val, pc, #8 |
| 1016 | // str $val, [$src, #+4] |
| 1017 | // mov r0, #0 |
| 1018 | // add pc, pc, #0 |
| 1019 | // mov r0, #1 |
| 1020 | unsigned SrcReg = MI->getOperand(0).getReg(); |
| 1021 | unsigned ValReg = MI->getOperand(1).getReg(); |
| 1022 | |
| 1023 | { |
| 1024 | MCInst TmpInst; |
| 1025 | TmpInst.setOpcode(ARM::ADDri); |
| 1026 | TmpInst.addOperand(MCOperand::CreateReg(ValReg)); |
| 1027 | TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 1028 | TmpInst.addOperand(MCOperand::CreateImm(8)); |
| 1029 | // Predicate. |
| 1030 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1031 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1032 | // 's' bit operand (always reg0 for this). |
| 1033 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1034 | OutStreamer.AddComment("eh_setjmp begin"); |
| 1035 | OutStreamer.EmitInstruction(TmpInst); |
| 1036 | } |
| 1037 | { |
| 1038 | MCInst TmpInst; |
| 1039 | TmpInst.setOpcode(ARM::STR); |
| 1040 | TmpInst.addOperand(MCOperand::CreateReg(ValReg)); |
| 1041 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1042 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1043 | TmpInst.addOperand(MCOperand::CreateImm(4)); |
| 1044 | // Predicate. |
| 1045 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1046 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1047 | OutStreamer.EmitInstruction(TmpInst); |
| 1048 | } |
| 1049 | { |
| 1050 | MCInst TmpInst; |
| 1051 | TmpInst.setOpcode(ARM::MOVi); |
| 1052 | TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); |
| 1053 | TmpInst.addOperand(MCOperand::CreateImm(0)); |
| 1054 | // Predicate. |
| 1055 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1056 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1057 | // 's' bit operand (always reg0 for this). |
| 1058 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1059 | OutStreamer.EmitInstruction(TmpInst); |
| 1060 | } |
| 1061 | { |
| 1062 | MCInst TmpInst; |
| 1063 | TmpInst.setOpcode(ARM::ADDri); |
| 1064 | TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 1065 | TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); |
| 1066 | TmpInst.addOperand(MCOperand::CreateImm(0)); |
| 1067 | // Predicate. |
| 1068 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1069 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1070 | // 's' bit operand (always reg0 for this). |
| 1071 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1072 | OutStreamer.EmitInstruction(TmpInst); |
| 1073 | } |
| 1074 | { |
| 1075 | MCInst TmpInst; |
| 1076 | TmpInst.setOpcode(ARM::MOVi); |
| 1077 | TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); |
| 1078 | TmpInst.addOperand(MCOperand::CreateImm(1)); |
| 1079 | // Predicate. |
| 1080 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1081 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1082 | // 's' bit operand (always reg0 for this). |
| 1083 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1084 | OutStreamer.AddComment("eh_setjmp end"); |
| 1085 | OutStreamer.EmitInstruction(TmpInst); |
| 1086 | } |
| 1087 | return; |
| 1088 | } |
Jim Grosbach | 5acb3de | 2010-09-27 21:47:04 +0000 | [diff] [blame] | 1089 | case ARM::Int_eh_sjlj_longjmp: { |
| 1090 | // ldr sp, [$src, #8] |
| 1091 | // ldr $scratch, [$src, #4] |
| 1092 | // ldr r7, [$src] |
| 1093 | // bx $scratch |
| 1094 | unsigned SrcReg = MI->getOperand(0).getReg(); |
| 1095 | unsigned ScratchReg = MI->getOperand(1).getReg(); |
| 1096 | { |
| 1097 | MCInst TmpInst; |
| 1098 | TmpInst.setOpcode(ARM::LDR); |
| 1099 | TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); |
| 1100 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1101 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1102 | TmpInst.addOperand(MCOperand::CreateImm(8)); |
| 1103 | // Predicate. |
| 1104 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1105 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1106 | OutStreamer.EmitInstruction(TmpInst); |
| 1107 | } |
| 1108 | { |
| 1109 | MCInst TmpInst; |
| 1110 | TmpInst.setOpcode(ARM::LDR); |
| 1111 | TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); |
| 1112 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1113 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1114 | TmpInst.addOperand(MCOperand::CreateImm(4)); |
| 1115 | // Predicate. |
| 1116 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1117 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1118 | OutStreamer.EmitInstruction(TmpInst); |
| 1119 | } |
| 1120 | { |
| 1121 | MCInst TmpInst; |
| 1122 | TmpInst.setOpcode(ARM::LDR); |
| 1123 | TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); |
| 1124 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1125 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1126 | TmpInst.addOperand(MCOperand::CreateImm(0)); |
| 1127 | // Predicate. |
| 1128 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1129 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1130 | OutStreamer.EmitInstruction(TmpInst); |
| 1131 | } |
| 1132 | { |
| 1133 | MCInst TmpInst; |
| 1134 | TmpInst.setOpcode(ARM::BRIND); |
| 1135 | TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); |
| 1136 | // Predicate. |
| 1137 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1138 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1139 | OutStreamer.EmitInstruction(TmpInst); |
| 1140 | } |
| 1141 | return; |
| 1142 | } |
Jim Grosbach | 385cc5e | 2010-09-27 22:28:11 +0000 | [diff] [blame] | 1143 | case ARM::tInt_eh_sjlj_longjmp: { |
| 1144 | // ldr $scratch, [$src, #8] |
| 1145 | // mov sp, $scratch |
| 1146 | // ldr $scratch, [$src, #4] |
| 1147 | // ldr r7, [$src] |
| 1148 | // bx $scratch |
| 1149 | unsigned SrcReg = MI->getOperand(0).getReg(); |
| 1150 | unsigned ScratchReg = MI->getOperand(1).getReg(); |
| 1151 | { |
| 1152 | MCInst TmpInst; |
| 1153 | TmpInst.setOpcode(ARM::tLDR); |
| 1154 | TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); |
| 1155 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1156 | // The offset immediate is #8. The operand value is scaled by 4 for the |
| 1157 | // tSTR instruction. |
| 1158 | TmpInst.addOperand(MCOperand::CreateImm(2)); |
| 1159 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1160 | // Predicate. |
| 1161 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1162 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1163 | OutStreamer.EmitInstruction(TmpInst); |
| 1164 | } |
| 1165 | { |
| 1166 | MCInst TmpInst; |
| 1167 | TmpInst.setOpcode(ARM::tMOVtgpr2gpr); |
| 1168 | TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); |
| 1169 | TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); |
| 1170 | // Predicate. |
| 1171 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1172 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1173 | OutStreamer.EmitInstruction(TmpInst); |
| 1174 | } |
| 1175 | { |
| 1176 | MCInst TmpInst; |
| 1177 | TmpInst.setOpcode(ARM::tLDR); |
| 1178 | TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); |
| 1179 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1180 | TmpInst.addOperand(MCOperand::CreateImm(1)); |
| 1181 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1182 | // Predicate. |
| 1183 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1184 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1185 | OutStreamer.EmitInstruction(TmpInst); |
| 1186 | } |
| 1187 | { |
| 1188 | MCInst TmpInst; |
| 1189 | TmpInst.setOpcode(ARM::tLDR); |
| 1190 | TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); |
| 1191 | TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); |
| 1192 | TmpInst.addOperand(MCOperand::CreateImm(0)); |
| 1193 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1194 | // Predicate. |
| 1195 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1196 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1197 | OutStreamer.EmitInstruction(TmpInst); |
| 1198 | } |
| 1199 | { |
| 1200 | MCInst TmpInst; |
| 1201 | TmpInst.setOpcode(ARM::tBX_RET_vararg); |
| 1202 | TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); |
| 1203 | // Predicate. |
| 1204 | TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); |
| 1205 | TmpInst.addOperand(MCOperand::CreateReg(0)); |
| 1206 | OutStreamer.EmitInstruction(TmpInst); |
| 1207 | } |
| 1208 | return; |
| 1209 | } |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 1210 | } |
Jim Grosbach | b0739b7 | 2010-09-02 01:02:06 +0000 | [diff] [blame] | 1211 | |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 1212 | MCInst TmpInst; |
| 1213 | MCInstLowering.Lower(MI, TmpInst); |
Chris Lattner | 850d2e2 | 2010-02-03 01:16:28 +0000 | [diff] [blame] | 1214 | OutStreamer.EmitInstruction(TmpInst); |
Chris Lattner | 97f0693 | 2009-10-19 20:20:46 +0000 | [diff] [blame] | 1215 | } |
Daniel Dunbar | 2685a29 | 2009-10-20 05:15:36 +0000 | [diff] [blame] | 1216 | |
| 1217 | //===----------------------------------------------------------------------===// |
| 1218 | // Target Registry Stuff |
| 1219 | //===----------------------------------------------------------------------===// |
| 1220 | |
| 1221 | static MCInstPrinter *createARMMCInstPrinter(const Target &T, |
| 1222 | unsigned SyntaxVariant, |
Chris Lattner | d374087 | 2010-04-04 05:04:31 +0000 | [diff] [blame] | 1223 | const MCAsmInfo &MAI) { |
Daniel Dunbar | 2685a29 | 2009-10-20 05:15:36 +0000 | [diff] [blame] | 1224 | if (SyntaxVariant == 0) |
Jim Grosbach | 74d7e6c | 2010-09-17 21:33:25 +0000 | [diff] [blame] | 1225 | return new ARMInstPrinter(MAI); |
Daniel Dunbar | 2685a29 | 2009-10-20 05:15:36 +0000 | [diff] [blame] | 1226 | return 0; |
| 1227 | } |
| 1228 | |
| 1229 | // Force static initialization. |
| 1230 | extern "C" void LLVMInitializeARMAsmPrinter() { |
| 1231 | RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget); |
| 1232 | RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget); |
| 1233 | |
| 1234 | TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter); |
| 1235 | TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter); |
| 1236 | } |
| 1237 | |