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Arnold Schwaighofer373e8652007-10-12 21:30:57 +00001//===- X86CallingConv.td - Calling Conventions X86 32/64 ---*- tablegen -*-===//
Dan Gohmanf17a25c2007-07-18 16:29:46 +00002//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9//
10// This describes the calling conventions for the X86-32 and X86-64
11// architectures.
12//
13//===----------------------------------------------------------------------===//
14
15/// CCIfSubtarget - Match if the current subtarget has a feature F.
16class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>;
18
19//===----------------------------------------------------------------------===//
20// Return Value Calling Conventions
21//===----------------------------------------------------------------------===//
22
23// Return-value conventions common to all X86 CC's.
24def RetCC_X86Common : CallingConv<[
25 // Scalar values are returned in AX first, then DX.
26 CCIfType<[i8] , CCAssignToReg<[AL]>>,
27 CCIfType<[i16], CCAssignToReg<[AX]>>,
28 CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
29 CCIfType<[i64], CCAssignToReg<[RAX, RDX]>>,
30
31 // Vector types are returned in XMM0 and XMM1, when they fit. If the target
32 // doesn't have XMM registers, it won't have vector types.
33 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
34 CCAssignToReg<[XMM0,XMM1]>>,
35
36 // MMX vector types are always returned in MM0. If the target doesn't have
37 // MM0, it doesn't support these vector types.
Dale Johannesen19f781d2007-08-06 21:31:06 +000038 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToReg<[MM0]>>,
39
40 // Long double types are always returned in ST0 (even with SSE).
Chris Lattner6bac50e2008-03-21 05:57:20 +000041 CCIfType<[f80], CCAssignToReg<[ST0, ST1]>>
Dan Gohmanf17a25c2007-07-18 16:29:46 +000042]>;
43
44// X86-32 C return-value convention.
45def RetCC_X86_32_C : CallingConv<[
46 // The X86-32 calling convention returns FP values in ST0, otherwise it is the
47 // same as the common X86 calling conv.
Chris Lattner6bac50e2008-03-21 05:57:20 +000048 CCIfType<[f32], CCAssignToReg<[ST0, ST1]>>,
49 CCIfType<[f64], CCAssignToReg<[ST0, ST1]>>,
Dan Gohmanf17a25c2007-07-18 16:29:46 +000050 CCDelegateTo<RetCC_X86Common>
51]>;
52
53// X86-32 FastCC return-value convention.
54def RetCC_X86_32_Fast : CallingConv<[
Nate Begeman3d83c3f2007-11-27 19:28:48 +000055 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
56 // SSE2, otherwise it is the the C calling conventions.
57 // This can happen when a float, 2 x float, or 3 x float vector is split by
58 // target lowering, and is returned in 1-3 sse regs.
59 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
60 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
Dan Gohmanf17a25c2007-07-18 16:29:46 +000061 CCDelegateTo<RetCC_X86Common>
62]>;
63
Dale Johannesen51552f62008-02-05 20:46:33 +000064// X86-32 SSEregparm return-value convention.
65def RetCC_X86_32_SSE : CallingConv<[
66 // The X86-32 sseregparm calling convention returns FP values in XMM0 if the
67 // target has SSE2, otherwise it is the C calling convention.
68 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
69 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
70 CCDelegateTo<RetCC_X86Common>
71]>;
72
Dan Gohmanf17a25c2007-07-18 16:29:46 +000073// X86-64 C return-value convention.
74def RetCC_X86_64_C : CallingConv<[
75 // The X86-64 calling convention always returns FP values in XMM0.
76 CCIfType<[f32], CCAssignToReg<[XMM0]>>,
77 CCIfType<[f64], CCAssignToReg<[XMM0]>>,
78 CCDelegateTo<RetCC_X86Common>
79]>;
80
Dan Gohmanf17a25c2007-07-18 16:29:46 +000081// This is the root return-value convention for the X86-32 backend.
82def RetCC_X86_32 : CallingConv<[
83 // If FastCC, use RetCC_X86_32_Fast.
84 CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
Dale Johannesen51552f62008-02-05 20:46:33 +000085 // If SSECC, use RetCC_X86_32_SSE.
86 CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
Dan Gohmanf17a25c2007-07-18 16:29:46 +000087 // Otherwise, use RetCC_X86_32_C.
88 CCDelegateTo<RetCC_X86_32_C>
89]>;
90
91// This is the root return-value convention for the X86-64 backend.
92def RetCC_X86_64 : CallingConv<[
93 // Always just the same as C calling conv for X86-64.
94 CCDelegateTo<RetCC_X86_64_C>
95]>;
96
97// This is the return-value convention used for the entire X86 backend.
98def RetCC_X86 : CallingConv<[
99 CCIfSubtarget<"is64Bit()", CCDelegateTo<RetCC_X86_64>>,
100 CCDelegateTo<RetCC_X86_32>
101]>;
102
103//===----------------------------------------------------------------------===//
104// X86-64 Argument Calling Conventions
105//===----------------------------------------------------------------------===//
106
107def CC_X86_64_C : CallingConv<[
Evan Chengf7e2f7a2008-01-15 03:15:41 +0000108 // Handles byval parameters.
Evan Chengfc149022008-01-15 03:34:58 +0000109 CCIfByVal<CCPassByVal<8, 8>>,
Evan Chengf7e2f7a2008-01-15 03:15:41 +0000110
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000111 // Promote i8/i16 arguments to i32.
112 CCIfType<[i8, i16], CCPromoteToType<i32>>,
Duncan Sands0705eb52008-01-19 16:42:10 +0000113
114 // The 'nest' parameter, if any, is passed in R10.
115 CCIfNest<CCAssignToReg<[R10]>>,
116
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000117 // The first 6 integer arguments are passed in integer registers.
118 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
119 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
120
121 // The first 8 FP/Vector arguments are passed in XMM registers.
122 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
123 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
124
125 // The first 8 MMX vector arguments are passed in GPRs.
126 CCIfType<[v8i8, v4i16, v2i32, v1i64],
127 CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
128
129 // Integer/FP values get stored in stack slots that are 8 bytes in size and
130 // 8-byte aligned if there are no more registers to hold them.
131 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
132
Dale Johannesen471b8182007-11-10 22:07:15 +0000133 // Long doubles get stack slots whose size and alignment depends on the
134 // subtarget.
Duncan Sandsa1d516d2007-11-14 08:29:13 +0000135 CCIfType<[f80], CCAssignToStack<0, 0>>,
Dale Johannesen471b8182007-11-10 22:07:15 +0000136
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000137 // Vectors get 16-byte stack slots that are 16-byte aligned.
Dale Johannesen471b8182007-11-10 22:07:15 +0000138 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000139
140 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
141 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
142]>;
143
Arnold Schwaighofer373e8652007-10-12 21:30:57 +0000144// Tail call convention (fast): One register is reserved for target address,
Arnold Schwaighofere2d6bbb2007-10-11 19:40:01 +0000145// namely R9
146def CC_X86_64_TailCall : CallingConv<[
Evan Chengf7e2f7a2008-01-15 03:15:41 +0000147 // Handles byval parameters.
Evan Chengfc149022008-01-15 03:34:58 +0000148 CCIfByVal<CCPassByVal<8, 8>>,
Evan Chengf7e2f7a2008-01-15 03:15:41 +0000149
Arnold Schwaighofere2d6bbb2007-10-11 19:40:01 +0000150 // Promote i8/i16 arguments to i32.
151 CCIfType<[i8, i16], CCPromoteToType<i32>>,
Duncan Sands0705eb52008-01-19 16:42:10 +0000152
153 // The 'nest' parameter, if any, is passed in R10.
154 CCIfNest<CCAssignToReg<[R10]>>,
155
Arnold Schwaighofere2d6bbb2007-10-11 19:40:01 +0000156 // The first 6 integer arguments are passed in integer registers.
157 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D]>>,
158 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
159
160 // The first 8 FP/Vector arguments are passed in XMM registers.
161 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
162 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>,
163
164 // The first 8 MMX vector arguments are passed in GPRs.
165 CCIfType<[v8i8, v4i16, v2i32, v1i64],
166 CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
167
Arnold Schwaighofere2d6bbb2007-10-11 19:40:01 +0000168 // Integer/FP values get stored in stack slots that are 8 bytes in size and
169 // 8-byte aligned if there are no more registers to hold them.
170 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
171
172 // Vectors get 16-byte stack slots that are 16-byte aligned.
173 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
174
175 // __m64 vectors get 8-byte stack slots that are 8-byte aligned.
176 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
177]>;
178
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000179
180//===----------------------------------------------------------------------===//
181// X86 C Calling Convention
182//===----------------------------------------------------------------------===//
183
184/// CC_X86_32_Common - In all X86-32 calling conventions, extra integers and FP
185/// values are spilled on the stack, and the first 4 vector values go in XMM
186/// regs.
187def CC_X86_32_Common : CallingConv<[
Evan Chengf7e2f7a2008-01-15 03:15:41 +0000188 // Handles byval parameters.
Evan Chengfc149022008-01-15 03:34:58 +0000189 CCIfByVal<CCPassByVal<4, 4>>,
Evan Chengf7e2f7a2008-01-15 03:15:41 +0000190
Dale Johannesen51552f62008-02-05 20:46:33 +0000191 // The first 3 float or double arguments, if marked 'inreg' and if the call
192 // is not a vararg call and if SSE2 is available, are passed in SSE registers.
193 CCIfNotVarArg<CCIfInReg<CCIfType<[f32,f64], CCIfSubtarget<"hasSSE2()",
194 CCAssignToReg<[XMM0,XMM1,XMM2]>>>>>,
195
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000196 // Integer/Float values get stored in stack slots that are 4 bytes in
197 // size and 4-byte aligned.
198 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
199
200 // Doubles get 8-byte slots that are 4-byte aligned.
201 CCIfType<[f64], CCAssignToStack<8, 4>>,
Dale Johannesen19f781d2007-08-06 21:31:06 +0000202
Duncan Sands7c44f1a2008-01-07 16:36:38 +0000203 // Long doubles get slots whose size depends on the subtarget.
204 CCIfType<[f80], CCAssignToStack<0, 4>>,
Dale Johannesen19f781d2007-08-06 21:31:06 +0000205
Dale Johannesen8fc3d652008-02-22 17:47:28 +0000206 // The first 4 SSE vector arguments are passed in XMM registers.
Evan Cheng335a6aa2008-01-22 23:26:53 +0000207 CCIfNotVarArg<CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
208 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>>,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000209
Dale Johannesen8fc3d652008-02-22 17:47:28 +0000210 // Other SSE vectors get 16-byte stack slots that are 16-byte aligned.
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000211 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>,
212
Dale Johannesen8fc3d652008-02-22 17:47:28 +0000213 // __m64 vectors get 8-byte stack slots that are 4-byte aligned. They are
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000214 // passed in the parameter area.
Dale Johannesen8fc3d652008-02-22 17:47:28 +0000215 CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 4>>
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000216]>;
217
218def CC_X86_32_C : CallingConv<[
219 // Promote i8/i16 arguments to i32.
220 CCIfType<[i8, i16], CCPromoteToType<i32>>,
Duncan Sandsd8455ca2007-07-27 20:02:49 +0000221
222 // The 'nest' parameter, if any, is passed in ECX.
223 CCIfNest<CCAssignToReg<[ECX]>>,
224
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000225 // The first 3 integer arguments, if marked 'inreg' and if the call is not
226 // a vararg call, are passed in integer registers.
227 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
Duncan Sandsd8455ca2007-07-27 20:02:49 +0000228
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000229 // Otherwise, same as everything else.
230 CCDelegateTo<CC_X86_32_Common>
231]>;
232
Arnold Schwaighofer373e8652007-10-12 21:30:57 +0000233/// Same as C calling convention except for non-free ECX which is used for storing
234/// a potential pointer to the tail called function.
Arnold Schwaighofere2d6bbb2007-10-11 19:40:01 +0000235def CC_X86_32_TailCall : CallingConv<[
236 // Promote i8/i16 arguments to i32.
237 CCIfType<[i8, i16], CCPromoteToType<i32>>,
238
Duncan Sands4dd632b2007-10-13 07:38:37 +0000239 // Nested function trampolines are currently not supported by fastcc.
Arnold Schwaighofer373e8652007-10-12 21:30:57 +0000240
Arnold Schwaighofere2d6bbb2007-10-11 19:40:01 +0000241 // The first 3 integer arguments, if marked 'inreg' and if the call is not
242 // a vararg call, are passed in integer registers.
243 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>>>,
244
245 // Otherwise, same as everything else.
246 CCDelegateTo<CC_X86_32_Common>
247]>;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000248
249def CC_X86_32_FastCall : CallingConv<[
250 // Promote i8/i16 arguments to i32.
251 CCIfType<[i8, i16], CCPromoteToType<i32>>,
Duncan Sandsd8455ca2007-07-27 20:02:49 +0000252
253 // The 'nest' parameter, if any, is passed in EAX.
254 CCIfNest<CCAssignToReg<[EAX]>>,
255
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000256 // The first 2 integer arguments are passed in ECX/EDX
257 CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,
Duncan Sandsd8455ca2007-07-27 20:02:49 +0000258
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000259 // Otherwise, same as everything else.
260 CCDelegateTo<CC_X86_32_Common>
261]>;